drivers/scsi/isci/core/scic_sds_phy.h

   1 /*
   2  * This file is provided under a dual BSD/GPLv2 license.  When using or
   3  * redistributing this file, you may do so under either license.
   4  *
   5  * GPL LICENSE SUMMARY
   6  *
   7  * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of version 2 of the GNU General Public License as
  11  * published by the Free Software Foundation.
  12  *
  13  * This program is distributed in the hope that it will be useful, but
  14  * WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  16  * General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  21  * The full GNU General Public License is included in this distribution
  22  * in the file called LICENSE.GPL.
  23  *
  24  * BSD LICENSE
  25  *
  26  * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
  27  * All rights reserved.
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  29  * Redistribution and use in source and binary forms, with or without
  30  * modification, are permitted provided that the following conditions
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  32  *
  33  *   * Redistributions of source code must retain the above copyright
  34  *     notice, this list of conditions and the following disclaimer.
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  41  *     from this software without specific prior written permission.
  42  *
  43  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  44  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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  53  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  54  */
  55
  56 #ifndef _SCIC_SDS_PHY_H_
  57 #define _SCIC_SDS_PHY_H_
  58
  59 #include "sas.h"
  60 #include "scic_phy.h"
  61 #include "scu_registers.h"
  62 #include "sci_base_state_machine.h"
  63 #include <scsi/libsas.h>
  64
  65 struct scic_sds_port;
  66 /**
  67  *
  68  *
  69  * This is the timeout value for the SATA phy to wait for a SIGNATURE FIS
  70  * before restarting the starting state machine.  Technically, the old parallel
  71  * ATA specification required up to 30 seconds for a device to issue its
  72  * signature FIS as a result of a soft reset.  Now we see that devices respond
  73  * generally within 15 seconds, but we'll use 25 for now.
  74  */
  75 #define SCIC_SDS_SIGNATURE_FIS_TIMEOUT    25000
  76
  77 /**
  78  *
  79  *
  80  * This is the timeout for the SATA OOB/SN because the hardware does not
  81  * recognize a hot plug after OOB signal but before the SN signals.  We need to
  82  * make sure after a hotplug timeout if we have not received the speed event
  83  * notification from the hardware that we restart the hardware OOB state
  84  * machine.
  85  */
  86 #define SCIC_SDS_SATA_LINK_TRAINING_TIMEOUT  250
  87
  88 enum scic_sds_phy_states {
  89         /**
  90          * Simply the initial state for the base domain state machine.
  91          */
  92         SCI_BASE_PHY_STATE_INITIAL,
  93
  94         /**
  95          * This state indicates that the phy has successfully been stopped.
  96          * In this state no new IO operations are permitted on this phy.
  97          * This state is entered from the INITIAL state.
  98          * This state is entered from the STARTING state.
  99          * This state is entered from the READY state.
 100          * This state is entered from the RESETTING state.
 101          */
 102         SCI_BASE_PHY_STATE_STOPPED,
 103
 104         /**
 105          * This state indicates that the phy is in the process of becomming
 106          * ready.  In this state no new IO operations are permitted on this phy.
 107          * This state is entered from the STOPPED state.
 108          * This state is entered from the READY state.
 109          * This state is entered from the RESETTING state.
 110          */
 111         SCI_BASE_PHY_STATE_STARTING,
 112
 113         /**
 114          * This state indicates the the phy is now ready.  Thus, the user
 115          * is able to perform IO operations utilizing this phy as long as it
 116          * is currently part of a valid port.
 117          * This state is entered from the STARTING state.
 118          */
 119         SCI_BASE_PHY_STATE_READY,
 120
 121         /**
 122          * This state indicates that the phy is in the process of being reset.
 123          * In this state no new IO operations are permitted on this phy.
 124          * This state is entered from the READY state.
 125          */
 126         SCI_BASE_PHY_STATE_RESETTING,
 127
 128         /**
 129          * Simply the final state for the base phy state machine.
 130          */
 131         SCI_BASE_PHY_STATE_FINAL,
 132 };
 133
 134
 135 /**
 136  * enum scic_sds_phy_starting_substates -
 137  *
 138  *
 139  */
 140 enum scic_sds_phy_starting_substates {
 141         /**
 142          * Initial state
 143          */
 144         SCIC_SDS_PHY_STARTING_SUBSTATE_INITIAL,
 145
 146         /**
 147          * Wait state for the hardware OSSP event type notification
 148          */
 149         SCIC_SDS_PHY_STARTING_SUBSTATE_AWAIT_OSSP_EN,
 150
 151         /**
 152          * Wait state for the PHY speed notification
 153          */
 154         SCIC_SDS_PHY_STARTING_SUBSTATE_AWAIT_SAS_SPEED_EN,
 155
 156         /**
 157          * Wait state for the IAF Unsolicited frame notification
 158          */
 159         SCIC_SDS_PHY_STARTING_SUBSTATE_AWAIT_IAF_UF,
 160
 161         /**
 162          * Wait state for the request to consume power
 163          */
 164         SCIC_SDS_PHY_STARTING_SUBSTATE_AWAIT_SAS_POWER,
 165
 166         /**
 167          * Wait state for request to consume power
 168          */
 169         SCIC_SDS_PHY_STARTING_SUBSTATE_AWAIT_SATA_POWER,
 170
 171         /**
 172          * Wait state for the SATA PHY notification
 173          */
 174         SCIC_SDS_PHY_STARTING_SUBSTATE_AWAIT_SATA_PHY_EN,
 175
 176         /**
 177          * Wait for the SATA PHY speed notification
 178          */
 179         SCIC_SDS_PHY_STARTING_SUBSTATE_AWAIT_SATA_SPEED_EN,
 180
 181         /**
 182          * Wait state for the SIGNATURE FIS unsolicited frame notification
 183          */
 184         SCIC_SDS_PHY_STARTING_SUBSTATE_AWAIT_SIG_FIS_UF,
 185
 186         /**
 187          * Exit state for this state machine
 188          */
 189         SCIC_SDS_PHY_STARTING_SUBSTATE_FINAL,
 190 };
 191
 192 struct scic_sds_port;
 193 struct scic_sds_controller;
 194
 195 /**
 196  * This enumeration provides a named phy type for the state machine
 197  *
 198  *
 199  */
 200 enum scic_sds_phy_protocol {
 201         /**
 202          * This is an unknown phy type since there is either nothing on the other
 203          * end or we have not detected the phy type as yet.
 204          */
 205         SCIC_SDS_PHY_PROTOCOL_UNKNOWN,
 206
 207         /**
 208          * This is a SAS PHY
 209          */
 210         SCIC_SDS_PHY_PROTOCOL_SAS,
 211
 212         /**
 213          * This is a SATA PHY
 214          */
 215         SCIC_SDS_PHY_PROTOCOL_SATA,
 216
 217         SCIC_SDS_MAX_PHY_PROTOCOLS
 218 };
 219
 220 /**
 221  * struct scic_sds_phy - This structure  contains or references all of the data
 222  *    necessary to represent the core phy object and SCU harware protocol
 223  *    engine.
 224  *
 225  *
 226  */
 227 struct scic_sds_phy {
 228         /**
 229          * This field contains the information for the base phy state machine.
 230          */
 231         struct sci_base_state_machine state_machine;
 232
 233         /**
 234          * This field specifies the port object that owns/contains this phy.
 235          */
 236         struct scic_sds_port *owning_port;
 237
 238         /**
 239          * This field indicates whether the phy supports 1.5 Gb/s, 3.0 Gb/s,
 240          * or 6.0 Gb/s operation.
 241          */
 242         enum sas_linkrate max_negotiated_speed;
 243
 244         /**
 245          * This member specifies the protocol being utilized on this phy.  This
 246          * field contains a legitamite value once the PHY has link trained with
 247          * a remote phy.
 248          */
 249         enum scic_sds_phy_protocol protocol;
 250
 251         /**
 252          * This field specifies the index with which this phy is associated (0-3).
 253          */
 254         u8 phy_index;
 255
 256         /**
 257          * This member indicates if this particular PHY has received a BCN while
 258          * it had no port assignement.  This BCN will be reported once the phy is
 259          * assigned to a port.
 260          */
 261         bool bcn_received_while_port_unassigned;
 262
 263         /**
 264          * This field indicates if this PHY is currently in the process of
 265          * link training (i.e. it has started OOB, but has yet to perform
 266          * IAF exchange/Signature FIS reception).
 267          */
 268         bool is_in_link_training;
 269
 270         /**
 271          * This field contains a reference to the timer utilized in detecting
 272          * when a signature FIS timeout has occurred.  The signature FIS is the
 273          * first FIS sent by an attached SATA device after OOB/SN.
 274          */
 275         void *sata_timeout_timer;
 276
 277         const struct scic_sds_phy_state_handler *state_handlers;
 278
 279         struct sci_base_state_machine starting_substate_machine;
 280
 281         /**
 282          * This field is the pointer to the transport layer register for the SCU
 283          * hardware.
 284          */
 285         struct scu_transport_layer_registers __iomem *transport_layer_registers;
 286
 287         /**
 288          * This field points to the link layer register set within the SCU.
 289          */
 290         struct scu_link_layer_registers __iomem *link_layer_registers;
 291
 292 };
 293
 294 typedef enum sci_status (*scic_sds_phy_handler_t)(struct scic_sds_phy *);
 295 typedef enum sci_status (*scic_sds_phy_event_handler_t)(struct scic_sds_phy *, u32);
 296 typedef enum sci_status (*scic_sds_phy_frame_handler_t)(struct scic_sds_phy *, u32);
 297 typedef enum sci_status (*scic_sds_phy_power_handler_t)(struct scic_sds_phy *);
 298
 299 /**
 300  * struct scic_sds_phy_state_handler -
 301  *
 302  *
 303  */
 304 struct scic_sds_phy_state_handler {
 305         /**
 306          * The start_handler specifies the method invoked when there is an
 307          * attempt to start a phy.
 308          */
 309         scic_sds_phy_handler_t start_handler;
 310
 311         /**
 312          * The stop_handler specifies the method invoked when there is an
 313          * attempt to stop a phy.
 314          */
 315         scic_sds_phy_handler_t stop_handler;
 316
 317         /**
 318          * The reset_handler specifies the method invoked when there is an
 319          * attempt to reset a phy.
 320          */
 321         scic_sds_phy_handler_t reset_handler;
 322
 323         /**
 324          * The destruct_handler specifies the method invoked when attempting to
 325          * destruct a phy.
 326          */
 327         scic_sds_phy_handler_t destruct_handler;
 328
 329         /**
 330          * The state handler for unsolicited frames received from the SCU hardware.
 331          */
 332         scic_sds_phy_frame_handler_t frame_handler;
 333
 334         /**
 335          * The state handler for events received from the SCU hardware.
 336          */
 337         scic_sds_phy_event_handler_t event_handler;
 338
 339         /**
 340          * The state handler for staggered spinup.
 341          */
 342         scic_sds_phy_power_handler_t consume_power_handler;
 343
 344 };
 345
 346 /**
 347  * scic_sds_phy_get_index() -
 348  *
 349  * This macro returns the phy index for the specified phy
 350  */
 351 #define scic_sds_phy_get_index(phy) \
 352         ((phy)->phy_index)
 353
 354 /**
 355  * scic_sds_phy_get_controller() - This macro returns the controller for this
 356  *    phy
 357  *
 358  *
 359  */
 360 #define scic_sds_phy_get_controller(phy) \
 361         (scic_sds_port_get_controller((phy)->owning_port))
 362
 363 /**
 364  * scic_sds_phy_set_state_handlers() - This macro sets the state handlers for
 365  *    this phy object
 366  *
 367  *
 368  */
 369 #define scic_sds_phy_set_state_handlers(phy, handlers) \
 370         ((phy)->state_handlers = (handlers))
 371
 372 /**
 373  * scic_sds_phy_set_base_state_handlers() -
 374  *
 375  * This macro set the base state handlers for the phy object.
 376  */
 377 #define scic_sds_phy_set_base_state_handlers(phy, state_id) \
 378         scic_sds_phy_set_state_handlers(\
 379                 (phy), \
 380                 &scic_sds_phy_state_handler_table[(state_id)] \
 381                 )
 382
 383 void scic_sds_phy_construct(
 384         struct scic_sds_phy *this_phy,
 385         struct scic_sds_port *owning_port,
 386         u8 phy_index);
 387
 388 struct scic_sds_port *scic_sds_phy_get_port(
 389         struct scic_sds_phy *this_phy);
 390
 391 void scic_sds_phy_set_port(
 392         struct scic_sds_phy *this_phy,
 393         struct scic_sds_port *owning_port);
 394
 395 enum sci_status scic_sds_phy_initialize(
 396         struct scic_sds_phy *this_phy,
 397         struct scu_transport_layer_registers __iomem *transport_layer_registers,
 398         struct scu_link_layer_registers __iomem *link_layer_registers);
 399
 400 enum sci_status scic_sds_phy_start(
 401         struct scic_sds_phy *this_phy);
 402
 403 enum sci_status scic_sds_phy_stop(
 404         struct scic_sds_phy *this_phy);
 405
 406 enum sci_status scic_sds_phy_reset(
 407         struct scic_sds_phy *this_phy);
 408
 409 void scic_sds_phy_resume(
 410         struct scic_sds_phy *this_phy);
 411
 412 void scic_sds_phy_setup_transport(
 413         struct scic_sds_phy *this_phy,
 414         u32 device_id);
 415
 416 enum sci_status scic_sds_phy_event_handler(
 417         struct scic_sds_phy *this_phy,
 418         u32 event_code);
 419
 420 enum sci_status scic_sds_phy_frame_handler(
 421         struct scic_sds_phy *this_phy,
 422         u32 frame_index);
 423
 424 enum sci_status scic_sds_phy_consume_power_handler(
 425         struct scic_sds_phy *this_phy);
 426
 427 void scic_sds_phy_get_sas_address(
 428         struct scic_sds_phy *this_phy,
 429         struct sci_sas_address *sas_address);
 430
 431 void scic_sds_phy_get_attached_sas_address(
 432         struct scic_sds_phy *this_phy,
 433         struct sci_sas_address *sas_address);
 434
 435 void scic_sds_phy_get_protocols(
 436         struct scic_sds_phy *sci_phy,
 437         struct scic_phy_proto *protocols);
 438
 439 #endif /* _SCIC_SDS_PHY_H_ */