Merge /spare/repo/linux-2.6/
[deliverable/linux.git] / drivers / scsi / libata-core.c
1 /*
2 * libata-core.c - helper library for ATA
3 *
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
32 *
33 */
34
35 #include <linux/config.h>
36 #include <linux/kernel.h>
37 #include <linux/module.h>
38 #include <linux/pci.h>
39 #include <linux/init.h>
40 #include <linux/list.h>
41 #include <linux/mm.h>
42 #include <linux/highmem.h>
43 #include <linux/spinlock.h>
44 #include <linux/blkdev.h>
45 #include <linux/delay.h>
46 #include <linux/timer.h>
47 #include <linux/interrupt.h>
48 #include <linux/completion.h>
49 #include <linux/suspend.h>
50 #include <linux/workqueue.h>
51 #include <scsi/scsi.h>
52 #include "scsi.h"
53 #include "scsi_priv.h"
54 #include <scsi/scsi_host.h>
55 #include <linux/libata.h>
56 #include <asm/io.h>
57 #include <asm/semaphore.h>
58 #include <asm/byteorder.h>
59
60 #include "libata.h"
61
62 static unsigned int ata_busy_sleep (struct ata_port *ap,
63 unsigned long tmout_pat,
64 unsigned long tmout);
65 static void ata_dev_init_params(struct ata_port *ap, struct ata_device *dev);
66 static void ata_set_mode(struct ata_port *ap);
67 static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev);
68 static unsigned int ata_get_mode_mask(struct ata_port *ap, int shift);
69 static int fgb(u32 bitmap);
70 static int ata_choose_xfer_mode(struct ata_port *ap,
71 u8 *xfer_mode_out,
72 unsigned int *xfer_shift_out);
73 static int ata_qc_complete_noop(struct ata_queued_cmd *qc, u8 drv_stat);
74 static void __ata_qc_complete(struct ata_queued_cmd *qc);
75
76 static unsigned int ata_unique_id = 1;
77 static struct workqueue_struct *ata_wq;
78
79 int atapi_enabled = 0;
80 module_param(atapi_enabled, int, 0444);
81 MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
82
83 MODULE_AUTHOR("Jeff Garzik");
84 MODULE_DESCRIPTION("Library module for ATA devices");
85 MODULE_LICENSE("GPL");
86 MODULE_VERSION(DRV_VERSION);
87
88 /**
89 * ata_tf_load - send taskfile registers to host controller
90 * @ap: Port to which output is sent
91 * @tf: ATA taskfile register set
92 *
93 * Outputs ATA taskfile to standard ATA host controller.
94 *
95 * LOCKING:
96 * Inherited from caller.
97 */
98
99 static void ata_tf_load_pio(struct ata_port *ap, struct ata_taskfile *tf)
100 {
101 struct ata_ioports *ioaddr = &ap->ioaddr;
102 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
103
104 if (tf->ctl != ap->last_ctl) {
105 outb(tf->ctl, ioaddr->ctl_addr);
106 ap->last_ctl = tf->ctl;
107 ata_wait_idle(ap);
108 }
109
110 if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
111 outb(tf->hob_feature, ioaddr->feature_addr);
112 outb(tf->hob_nsect, ioaddr->nsect_addr);
113 outb(tf->hob_lbal, ioaddr->lbal_addr);
114 outb(tf->hob_lbam, ioaddr->lbam_addr);
115 outb(tf->hob_lbah, ioaddr->lbah_addr);
116 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
117 tf->hob_feature,
118 tf->hob_nsect,
119 tf->hob_lbal,
120 tf->hob_lbam,
121 tf->hob_lbah);
122 }
123
124 if (is_addr) {
125 outb(tf->feature, ioaddr->feature_addr);
126 outb(tf->nsect, ioaddr->nsect_addr);
127 outb(tf->lbal, ioaddr->lbal_addr);
128 outb(tf->lbam, ioaddr->lbam_addr);
129 outb(tf->lbah, ioaddr->lbah_addr);
130 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
131 tf->feature,
132 tf->nsect,
133 tf->lbal,
134 tf->lbam,
135 tf->lbah);
136 }
137
138 if (tf->flags & ATA_TFLAG_DEVICE) {
139 outb(tf->device, ioaddr->device_addr);
140 VPRINTK("device 0x%X\n", tf->device);
141 }
142
143 ata_wait_idle(ap);
144 }
145
146 /**
147 * ata_tf_load_mmio - send taskfile registers to host controller
148 * @ap: Port to which output is sent
149 * @tf: ATA taskfile register set
150 *
151 * Outputs ATA taskfile to standard ATA host controller using MMIO.
152 *
153 * LOCKING:
154 * Inherited from caller.
155 */
156
157 static void ata_tf_load_mmio(struct ata_port *ap, struct ata_taskfile *tf)
158 {
159 struct ata_ioports *ioaddr = &ap->ioaddr;
160 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
161
162 if (tf->ctl != ap->last_ctl) {
163 writeb(tf->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
164 ap->last_ctl = tf->ctl;
165 ata_wait_idle(ap);
166 }
167
168 if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
169 writeb(tf->hob_feature, (void __iomem *) ioaddr->feature_addr);
170 writeb(tf->hob_nsect, (void __iomem *) ioaddr->nsect_addr);
171 writeb(tf->hob_lbal, (void __iomem *) ioaddr->lbal_addr);
172 writeb(tf->hob_lbam, (void __iomem *) ioaddr->lbam_addr);
173 writeb(tf->hob_lbah, (void __iomem *) ioaddr->lbah_addr);
174 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
175 tf->hob_feature,
176 tf->hob_nsect,
177 tf->hob_lbal,
178 tf->hob_lbam,
179 tf->hob_lbah);
180 }
181
182 if (is_addr) {
183 writeb(tf->feature, (void __iomem *) ioaddr->feature_addr);
184 writeb(tf->nsect, (void __iomem *) ioaddr->nsect_addr);
185 writeb(tf->lbal, (void __iomem *) ioaddr->lbal_addr);
186 writeb(tf->lbam, (void __iomem *) ioaddr->lbam_addr);
187 writeb(tf->lbah, (void __iomem *) ioaddr->lbah_addr);
188 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
189 tf->feature,
190 tf->nsect,
191 tf->lbal,
192 tf->lbam,
193 tf->lbah);
194 }
195
196 if (tf->flags & ATA_TFLAG_DEVICE) {
197 writeb(tf->device, (void __iomem *) ioaddr->device_addr);
198 VPRINTK("device 0x%X\n", tf->device);
199 }
200
201 ata_wait_idle(ap);
202 }
203
204
205 /**
206 * ata_tf_load - send taskfile registers to host controller
207 * @ap: Port to which output is sent
208 * @tf: ATA taskfile register set
209 *
210 * Outputs ATA taskfile to standard ATA host controller using MMIO
211 * or PIO as indicated by the ATA_FLAG_MMIO flag.
212 * Writes the control, feature, nsect, lbal, lbam, and lbah registers.
213 * Optionally (ATA_TFLAG_LBA48) writes hob_feature, hob_nsect,
214 * hob_lbal, hob_lbam, and hob_lbah.
215 *
216 * This function waits for idle (!BUSY and !DRQ) after writing
217 * registers. If the control register has a new value, this
218 * function also waits for idle after writing control and before
219 * writing the remaining registers.
220 *
221 * May be used as the tf_load() entry in ata_port_operations.
222 *
223 * LOCKING:
224 * Inherited from caller.
225 */
226 void ata_tf_load(struct ata_port *ap, struct ata_taskfile *tf)
227 {
228 if (ap->flags & ATA_FLAG_MMIO)
229 ata_tf_load_mmio(ap, tf);
230 else
231 ata_tf_load_pio(ap, tf);
232 }
233
234 /**
235 * ata_exec_command_pio - issue ATA command to host controller
236 * @ap: port to which command is being issued
237 * @tf: ATA taskfile register set
238 *
239 * Issues PIO write to ATA command register, with proper
240 * synchronization with interrupt handler / other threads.
241 *
242 * LOCKING:
243 * spin_lock_irqsave(host_set lock)
244 */
245
246 static void ata_exec_command_pio(struct ata_port *ap, struct ata_taskfile *tf)
247 {
248 DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command);
249
250 outb(tf->command, ap->ioaddr.command_addr);
251 ata_pause(ap);
252 }
253
254
255 /**
256 * ata_exec_command_mmio - issue ATA command to host controller
257 * @ap: port to which command is being issued
258 * @tf: ATA taskfile register set
259 *
260 * Issues MMIO write to ATA command register, with proper
261 * synchronization with interrupt handler / other threads.
262 *
263 * LOCKING:
264 * spin_lock_irqsave(host_set lock)
265 */
266
267 static void ata_exec_command_mmio(struct ata_port *ap, struct ata_taskfile *tf)
268 {
269 DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command);
270
271 writeb(tf->command, (void __iomem *) ap->ioaddr.command_addr);
272 ata_pause(ap);
273 }
274
275
276 /**
277 * ata_exec_command - issue ATA command to host controller
278 * @ap: port to which command is being issued
279 * @tf: ATA taskfile register set
280 *
281 * Issues PIO/MMIO write to ATA command register, with proper
282 * synchronization with interrupt handler / other threads.
283 *
284 * LOCKING:
285 * spin_lock_irqsave(host_set lock)
286 */
287 void ata_exec_command(struct ata_port *ap, struct ata_taskfile *tf)
288 {
289 if (ap->flags & ATA_FLAG_MMIO)
290 ata_exec_command_mmio(ap, tf);
291 else
292 ata_exec_command_pio(ap, tf);
293 }
294
295 /**
296 * ata_exec - issue ATA command to host controller
297 * @ap: port to which command is being issued
298 * @tf: ATA taskfile register set
299 *
300 * Issues PIO/MMIO write to ATA command register, with proper
301 * synchronization with interrupt handler / other threads.
302 *
303 * LOCKING:
304 * Obtains host_set lock.
305 */
306
307 static inline void ata_exec(struct ata_port *ap, struct ata_taskfile *tf)
308 {
309 unsigned long flags;
310
311 DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command);
312 spin_lock_irqsave(&ap->host_set->lock, flags);
313 ap->ops->exec_command(ap, tf);
314 spin_unlock_irqrestore(&ap->host_set->lock, flags);
315 }
316
317 /**
318 * ata_tf_to_host - issue ATA taskfile to host controller
319 * @ap: port to which command is being issued
320 * @tf: ATA taskfile register set
321 *
322 * Issues ATA taskfile register set to ATA host controller,
323 * with proper synchronization with interrupt handler and
324 * other threads.
325 *
326 * LOCKING:
327 * Obtains host_set lock.
328 */
329
330 static void ata_tf_to_host(struct ata_port *ap, struct ata_taskfile *tf)
331 {
332 ap->ops->tf_load(ap, tf);
333
334 ata_exec(ap, tf);
335 }
336
337 /**
338 * ata_tf_to_host_nolock - issue ATA taskfile to host controller
339 * @ap: port to which command is being issued
340 * @tf: ATA taskfile register set
341 *
342 * Issues ATA taskfile register set to ATA host controller,
343 * with proper synchronization with interrupt handler and
344 * other threads.
345 *
346 * LOCKING:
347 * spin_lock_irqsave(host_set lock)
348 */
349
350 void ata_tf_to_host_nolock(struct ata_port *ap, struct ata_taskfile *tf)
351 {
352 ap->ops->tf_load(ap, tf);
353 ap->ops->exec_command(ap, tf);
354 }
355
356 /**
357 * ata_tf_read_pio - input device's ATA taskfile shadow registers
358 * @ap: Port from which input is read
359 * @tf: ATA taskfile register set for storing input
360 *
361 * Reads ATA taskfile registers for currently-selected device
362 * into @tf.
363 *
364 * LOCKING:
365 * Inherited from caller.
366 */
367
368 static void ata_tf_read_pio(struct ata_port *ap, struct ata_taskfile *tf)
369 {
370 struct ata_ioports *ioaddr = &ap->ioaddr;
371
372 tf->nsect = inb(ioaddr->nsect_addr);
373 tf->lbal = inb(ioaddr->lbal_addr);
374 tf->lbam = inb(ioaddr->lbam_addr);
375 tf->lbah = inb(ioaddr->lbah_addr);
376 tf->device = inb(ioaddr->device_addr);
377
378 if (tf->flags & ATA_TFLAG_LBA48) {
379 outb(tf->ctl | ATA_HOB, ioaddr->ctl_addr);
380 tf->hob_feature = inb(ioaddr->error_addr);
381 tf->hob_nsect = inb(ioaddr->nsect_addr);
382 tf->hob_lbal = inb(ioaddr->lbal_addr);
383 tf->hob_lbam = inb(ioaddr->lbam_addr);
384 tf->hob_lbah = inb(ioaddr->lbah_addr);
385 }
386 }
387
388 /**
389 * ata_tf_read_mmio - input device's ATA taskfile shadow registers
390 * @ap: Port from which input is read
391 * @tf: ATA taskfile register set for storing input
392 *
393 * Reads ATA taskfile registers for currently-selected device
394 * into @tf via MMIO.
395 *
396 * LOCKING:
397 * Inherited from caller.
398 */
399
400 static void ata_tf_read_mmio(struct ata_port *ap, struct ata_taskfile *tf)
401 {
402 struct ata_ioports *ioaddr = &ap->ioaddr;
403
404 tf->nsect = readb((void __iomem *)ioaddr->nsect_addr);
405 tf->lbal = readb((void __iomem *)ioaddr->lbal_addr);
406 tf->lbam = readb((void __iomem *)ioaddr->lbam_addr);
407 tf->lbah = readb((void __iomem *)ioaddr->lbah_addr);
408 tf->device = readb((void __iomem *)ioaddr->device_addr);
409
410 if (tf->flags & ATA_TFLAG_LBA48) {
411 writeb(tf->ctl | ATA_HOB, (void __iomem *) ap->ioaddr.ctl_addr);
412 tf->hob_feature = readb((void __iomem *)ioaddr->error_addr);
413 tf->hob_nsect = readb((void __iomem *)ioaddr->nsect_addr);
414 tf->hob_lbal = readb((void __iomem *)ioaddr->lbal_addr);
415 tf->hob_lbam = readb((void __iomem *)ioaddr->lbam_addr);
416 tf->hob_lbah = readb((void __iomem *)ioaddr->lbah_addr);
417 }
418 }
419
420
421 /**
422 * ata_tf_read - input device's ATA taskfile shadow registers
423 * @ap: Port from which input is read
424 * @tf: ATA taskfile register set for storing input
425 *
426 * Reads ATA taskfile registers for currently-selected device
427 * into @tf.
428 *
429 * Reads nsect, lbal, lbam, lbah, and device. If ATA_TFLAG_LBA48
430 * is set, also reads the hob registers.
431 *
432 * May be used as the tf_read() entry in ata_port_operations.
433 *
434 * LOCKING:
435 * Inherited from caller.
436 */
437 void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
438 {
439 if (ap->flags & ATA_FLAG_MMIO)
440 ata_tf_read_mmio(ap, tf);
441 else
442 ata_tf_read_pio(ap, tf);
443 }
444
445 /**
446 * ata_check_status_pio - Read device status reg & clear interrupt
447 * @ap: port where the device is
448 *
449 * Reads ATA taskfile status register for currently-selected device
450 * and return its value. This also clears pending interrupts
451 * from this device
452 *
453 * LOCKING:
454 * Inherited from caller.
455 */
456 static u8 ata_check_status_pio(struct ata_port *ap)
457 {
458 return inb(ap->ioaddr.status_addr);
459 }
460
461 /**
462 * ata_check_status_mmio - Read device status reg & clear interrupt
463 * @ap: port where the device is
464 *
465 * Reads ATA taskfile status register for currently-selected device
466 * via MMIO and return its value. This also clears pending interrupts
467 * from this device
468 *
469 * LOCKING:
470 * Inherited from caller.
471 */
472 static u8 ata_check_status_mmio(struct ata_port *ap)
473 {
474 return readb((void __iomem *) ap->ioaddr.status_addr);
475 }
476
477
478 /**
479 * ata_check_status - Read device status reg & clear interrupt
480 * @ap: port where the device is
481 *
482 * Reads ATA taskfile status register for currently-selected device
483 * and return its value. This also clears pending interrupts
484 * from this device
485 *
486 * May be used as the check_status() entry in ata_port_operations.
487 *
488 * LOCKING:
489 * Inherited from caller.
490 */
491 u8 ata_check_status(struct ata_port *ap)
492 {
493 if (ap->flags & ATA_FLAG_MMIO)
494 return ata_check_status_mmio(ap);
495 return ata_check_status_pio(ap);
496 }
497
498
499 /**
500 * ata_altstatus - Read device alternate status reg
501 * @ap: port where the device is
502 *
503 * Reads ATA taskfile alternate status register for
504 * currently-selected device and return its value.
505 *
506 * Note: may NOT be used as the check_altstatus() entry in
507 * ata_port_operations.
508 *
509 * LOCKING:
510 * Inherited from caller.
511 */
512 u8 ata_altstatus(struct ata_port *ap)
513 {
514 if (ap->ops->check_altstatus)
515 return ap->ops->check_altstatus(ap);
516
517 if (ap->flags & ATA_FLAG_MMIO)
518 return readb((void __iomem *)ap->ioaddr.altstatus_addr);
519 return inb(ap->ioaddr.altstatus_addr);
520 }
521
522
523 /**
524 * ata_chk_err - Read device error reg
525 * @ap: port where the device is
526 *
527 * Reads ATA taskfile error register for
528 * currently-selected device and return its value.
529 *
530 * Note: may NOT be used as the check_err() entry in
531 * ata_port_operations.
532 *
533 * LOCKING:
534 * Inherited from caller.
535 */
536 u8 ata_chk_err(struct ata_port *ap)
537 {
538 if (ap->ops->check_err)
539 return ap->ops->check_err(ap);
540
541 if (ap->flags & ATA_FLAG_MMIO) {
542 return readb((void __iomem *) ap->ioaddr.error_addr);
543 }
544 return inb(ap->ioaddr.error_addr);
545 }
546
547 /**
548 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
549 * @tf: Taskfile to convert
550 * @fis: Buffer into which data will output
551 * @pmp: Port multiplier port
552 *
553 * Converts a standard ATA taskfile to a Serial ATA
554 * FIS structure (Register - Host to Device).
555 *
556 * LOCKING:
557 * Inherited from caller.
558 */
559
560 void ata_tf_to_fis(struct ata_taskfile *tf, u8 *fis, u8 pmp)
561 {
562 fis[0] = 0x27; /* Register - Host to Device FIS */
563 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
564 bit 7 indicates Command FIS */
565 fis[2] = tf->command;
566 fis[3] = tf->feature;
567
568 fis[4] = tf->lbal;
569 fis[5] = tf->lbam;
570 fis[6] = tf->lbah;
571 fis[7] = tf->device;
572
573 fis[8] = tf->hob_lbal;
574 fis[9] = tf->hob_lbam;
575 fis[10] = tf->hob_lbah;
576 fis[11] = tf->hob_feature;
577
578 fis[12] = tf->nsect;
579 fis[13] = tf->hob_nsect;
580 fis[14] = 0;
581 fis[15] = tf->ctl;
582
583 fis[16] = 0;
584 fis[17] = 0;
585 fis[18] = 0;
586 fis[19] = 0;
587 }
588
589 /**
590 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
591 * @fis: Buffer from which data will be input
592 * @tf: Taskfile to output
593 *
594 * Converts a standard ATA taskfile to a Serial ATA
595 * FIS structure (Register - Host to Device).
596 *
597 * LOCKING:
598 * Inherited from caller.
599 */
600
601 void ata_tf_from_fis(u8 *fis, struct ata_taskfile *tf)
602 {
603 tf->command = fis[2]; /* status */
604 tf->feature = fis[3]; /* error */
605
606 tf->lbal = fis[4];
607 tf->lbam = fis[5];
608 tf->lbah = fis[6];
609 tf->device = fis[7];
610
611 tf->hob_lbal = fis[8];
612 tf->hob_lbam = fis[9];
613 tf->hob_lbah = fis[10];
614
615 tf->nsect = fis[12];
616 tf->hob_nsect = fis[13];
617 }
618
619 /**
620 * ata_prot_to_cmd - determine which read/write opcodes to use
621 * @protocol: ATA_PROT_xxx taskfile protocol
622 * @lba48: true is lba48 is present
623 *
624 * Given necessary input, determine which read/write commands
625 * to use to transfer data.
626 *
627 * LOCKING:
628 * None.
629 */
630 static int ata_prot_to_cmd(int protocol, int lba48)
631 {
632 int rcmd = 0, wcmd = 0;
633
634 switch (protocol) {
635 case ATA_PROT_PIO:
636 if (lba48) {
637 rcmd = ATA_CMD_PIO_READ_EXT;
638 wcmd = ATA_CMD_PIO_WRITE_EXT;
639 } else {
640 rcmd = ATA_CMD_PIO_READ;
641 wcmd = ATA_CMD_PIO_WRITE;
642 }
643 break;
644
645 case ATA_PROT_DMA:
646 if (lba48) {
647 rcmd = ATA_CMD_READ_EXT;
648 wcmd = ATA_CMD_WRITE_EXT;
649 } else {
650 rcmd = ATA_CMD_READ;
651 wcmd = ATA_CMD_WRITE;
652 }
653 break;
654
655 default:
656 return -1;
657 }
658
659 return rcmd | (wcmd << 8);
660 }
661
662 /**
663 * ata_dev_set_protocol - set taskfile protocol and r/w commands
664 * @dev: device to examine and configure
665 *
666 * Examine the device configuration, after we have
667 * read the identify-device page and configured the
668 * data transfer mode. Set internal state related to
669 * the ATA taskfile protocol (pio, pio mult, dma, etc.)
670 * and calculate the proper read/write commands to use.
671 *
672 * LOCKING:
673 * caller.
674 */
675 static void ata_dev_set_protocol(struct ata_device *dev)
676 {
677 int pio = (dev->flags & ATA_DFLAG_PIO);
678 int lba48 = (dev->flags & ATA_DFLAG_LBA48);
679 int proto, cmd;
680
681 if (pio)
682 proto = dev->xfer_protocol = ATA_PROT_PIO;
683 else
684 proto = dev->xfer_protocol = ATA_PROT_DMA;
685
686 cmd = ata_prot_to_cmd(proto, lba48);
687 if (cmd < 0)
688 BUG();
689
690 dev->read_cmd = cmd & 0xff;
691 dev->write_cmd = (cmd >> 8) & 0xff;
692 }
693
694 static const char * xfer_mode_str[] = {
695 "UDMA/16",
696 "UDMA/25",
697 "UDMA/33",
698 "UDMA/44",
699 "UDMA/66",
700 "UDMA/100",
701 "UDMA/133",
702 "UDMA7",
703 "MWDMA0",
704 "MWDMA1",
705 "MWDMA2",
706 "PIO0",
707 "PIO1",
708 "PIO2",
709 "PIO3",
710 "PIO4",
711 };
712
713 /**
714 * ata_udma_string - convert UDMA bit offset to string
715 * @mask: mask of bits supported; only highest bit counts.
716 *
717 * Determine string which represents the highest speed
718 * (highest bit in @udma_mask).
719 *
720 * LOCKING:
721 * None.
722 *
723 * RETURNS:
724 * Constant C string representing highest speed listed in
725 * @udma_mask, or the constant C string "<n/a>".
726 */
727
728 static const char *ata_mode_string(unsigned int mask)
729 {
730 int i;
731
732 for (i = 7; i >= 0; i--)
733 if (mask & (1 << i))
734 goto out;
735 for (i = ATA_SHIFT_MWDMA + 2; i >= ATA_SHIFT_MWDMA; i--)
736 if (mask & (1 << i))
737 goto out;
738 for (i = ATA_SHIFT_PIO + 4; i >= ATA_SHIFT_PIO; i--)
739 if (mask & (1 << i))
740 goto out;
741
742 return "<n/a>";
743
744 out:
745 return xfer_mode_str[i];
746 }
747
748 /**
749 * ata_pio_devchk - PATA device presence detection
750 * @ap: ATA channel to examine
751 * @device: Device to examine (starting at zero)
752 *
753 * This technique was originally described in
754 * Hale Landis's ATADRVR (www.ata-atapi.com), and
755 * later found its way into the ATA/ATAPI spec.
756 *
757 * Write a pattern to the ATA shadow registers,
758 * and if a device is present, it will respond by
759 * correctly storing and echoing back the
760 * ATA shadow register contents.
761 *
762 * LOCKING:
763 * caller.
764 */
765
766 static unsigned int ata_pio_devchk(struct ata_port *ap,
767 unsigned int device)
768 {
769 struct ata_ioports *ioaddr = &ap->ioaddr;
770 u8 nsect, lbal;
771
772 ap->ops->dev_select(ap, device);
773
774 outb(0x55, ioaddr->nsect_addr);
775 outb(0xaa, ioaddr->lbal_addr);
776
777 outb(0xaa, ioaddr->nsect_addr);
778 outb(0x55, ioaddr->lbal_addr);
779
780 outb(0x55, ioaddr->nsect_addr);
781 outb(0xaa, ioaddr->lbal_addr);
782
783 nsect = inb(ioaddr->nsect_addr);
784 lbal = inb(ioaddr->lbal_addr);
785
786 if ((nsect == 0x55) && (lbal == 0xaa))
787 return 1; /* we found a device */
788
789 return 0; /* nothing found */
790 }
791
792 /**
793 * ata_mmio_devchk - PATA device presence detection
794 * @ap: ATA channel to examine
795 * @device: Device to examine (starting at zero)
796 *
797 * This technique was originally described in
798 * Hale Landis's ATADRVR (www.ata-atapi.com), and
799 * later found its way into the ATA/ATAPI spec.
800 *
801 * Write a pattern to the ATA shadow registers,
802 * and if a device is present, it will respond by
803 * correctly storing and echoing back the
804 * ATA shadow register contents.
805 *
806 * LOCKING:
807 * caller.
808 */
809
810 static unsigned int ata_mmio_devchk(struct ata_port *ap,
811 unsigned int device)
812 {
813 struct ata_ioports *ioaddr = &ap->ioaddr;
814 u8 nsect, lbal;
815
816 ap->ops->dev_select(ap, device);
817
818 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
819 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
820
821 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
822 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
823
824 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
825 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
826
827 nsect = readb((void __iomem *) ioaddr->nsect_addr);
828 lbal = readb((void __iomem *) ioaddr->lbal_addr);
829
830 if ((nsect == 0x55) && (lbal == 0xaa))
831 return 1; /* we found a device */
832
833 return 0; /* nothing found */
834 }
835
836 /**
837 * ata_devchk - PATA device presence detection
838 * @ap: ATA channel to examine
839 * @device: Device to examine (starting at zero)
840 *
841 * Dispatch ATA device presence detection, depending
842 * on whether we are using PIO or MMIO to talk to the
843 * ATA shadow registers.
844 *
845 * LOCKING:
846 * caller.
847 */
848
849 static unsigned int ata_devchk(struct ata_port *ap,
850 unsigned int device)
851 {
852 if (ap->flags & ATA_FLAG_MMIO)
853 return ata_mmio_devchk(ap, device);
854 return ata_pio_devchk(ap, device);
855 }
856
857 /**
858 * ata_dev_classify - determine device type based on ATA-spec signature
859 * @tf: ATA taskfile register set for device to be identified
860 *
861 * Determine from taskfile register contents whether a device is
862 * ATA or ATAPI, as per "Signature and persistence" section
863 * of ATA/PI spec (volume 1, sect 5.14).
864 *
865 * LOCKING:
866 * None.
867 *
868 * RETURNS:
869 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
870 * the event of failure.
871 */
872
873 unsigned int ata_dev_classify(struct ata_taskfile *tf)
874 {
875 /* Apple's open source Darwin code hints that some devices only
876 * put a proper signature into the LBA mid/high registers,
877 * So, we only check those. It's sufficient for uniqueness.
878 */
879
880 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
881 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
882 DPRINTK("found ATA device by sig\n");
883 return ATA_DEV_ATA;
884 }
885
886 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
887 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
888 DPRINTK("found ATAPI device by sig\n");
889 return ATA_DEV_ATAPI;
890 }
891
892 DPRINTK("unknown device\n");
893 return ATA_DEV_UNKNOWN;
894 }
895
896 /**
897 * ata_dev_try_classify - Parse returned ATA device signature
898 * @ap: ATA channel to examine
899 * @device: Device to examine (starting at zero)
900 *
901 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
902 * an ATA/ATAPI-defined set of values is placed in the ATA
903 * shadow registers, indicating the results of device detection
904 * and diagnostics.
905 *
906 * Select the ATA device, and read the values from the ATA shadow
907 * registers. Then parse according to the Error register value,
908 * and the spec-defined values examined by ata_dev_classify().
909 *
910 * LOCKING:
911 * caller.
912 */
913
914 static u8 ata_dev_try_classify(struct ata_port *ap, unsigned int device)
915 {
916 struct ata_device *dev = &ap->device[device];
917 struct ata_taskfile tf;
918 unsigned int class;
919 u8 err;
920
921 ap->ops->dev_select(ap, device);
922
923 memset(&tf, 0, sizeof(tf));
924
925 err = ata_chk_err(ap);
926 ap->ops->tf_read(ap, &tf);
927
928 dev->class = ATA_DEV_NONE;
929
930 /* see if device passed diags */
931 if (err == 1)
932 /* do nothing */ ;
933 else if ((device == 0) && (err == 0x81))
934 /* do nothing */ ;
935 else
936 return err;
937
938 /* determine if device if ATA or ATAPI */
939 class = ata_dev_classify(&tf);
940 if (class == ATA_DEV_UNKNOWN)
941 return err;
942 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
943 return err;
944
945 dev->class = class;
946
947 return err;
948 }
949
950 /**
951 * ata_dev_id_string - Convert IDENTIFY DEVICE page into string
952 * @id: IDENTIFY DEVICE results we will examine
953 * @s: string into which data is output
954 * @ofs: offset into identify device page
955 * @len: length of string to return. must be an even number.
956 *
957 * The strings in the IDENTIFY DEVICE page are broken up into
958 * 16-bit chunks. Run through the string, and output each
959 * 8-bit chunk linearly, regardless of platform.
960 *
961 * LOCKING:
962 * caller.
963 */
964
965 void ata_dev_id_string(u16 *id, unsigned char *s,
966 unsigned int ofs, unsigned int len)
967 {
968 unsigned int c;
969
970 while (len > 0) {
971 c = id[ofs] >> 8;
972 *s = c;
973 s++;
974
975 c = id[ofs] & 0xff;
976 *s = c;
977 s++;
978
979 ofs++;
980 len -= 2;
981 }
982 }
983
984
985 /**
986 * ata_noop_dev_select - Select device 0/1 on ATA bus
987 * @ap: ATA channel to manipulate
988 * @device: ATA device (numbered from zero) to select
989 *
990 * This function performs no actual function.
991 *
992 * May be used as the dev_select() entry in ata_port_operations.
993 *
994 * LOCKING:
995 * caller.
996 */
997 void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
998 {
999 }
1000
1001
1002 /**
1003 * ata_std_dev_select - Select device 0/1 on ATA bus
1004 * @ap: ATA channel to manipulate
1005 * @device: ATA device (numbered from zero) to select
1006 *
1007 * Use the method defined in the ATA specification to
1008 * make either device 0, or device 1, active on the
1009 * ATA channel. Works with both PIO and MMIO.
1010 *
1011 * May be used as the dev_select() entry in ata_port_operations.
1012 *
1013 * LOCKING:
1014 * caller.
1015 */
1016
1017 void ata_std_dev_select (struct ata_port *ap, unsigned int device)
1018 {
1019 u8 tmp;
1020
1021 if (device == 0)
1022 tmp = ATA_DEVICE_OBS;
1023 else
1024 tmp = ATA_DEVICE_OBS | ATA_DEV1;
1025
1026 if (ap->flags & ATA_FLAG_MMIO) {
1027 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
1028 } else {
1029 outb(tmp, ap->ioaddr.device_addr);
1030 }
1031 ata_pause(ap); /* needed; also flushes, for mmio */
1032 }
1033
1034 /**
1035 * ata_dev_select - Select device 0/1 on ATA bus
1036 * @ap: ATA channel to manipulate
1037 * @device: ATA device (numbered from zero) to select
1038 * @wait: non-zero to wait for Status register BSY bit to clear
1039 * @can_sleep: non-zero if context allows sleeping
1040 *
1041 * Use the method defined in the ATA specification to
1042 * make either device 0, or device 1, active on the
1043 * ATA channel.
1044 *
1045 * This is a high-level version of ata_std_dev_select(),
1046 * which additionally provides the services of inserting
1047 * the proper pauses and status polling, where needed.
1048 *
1049 * LOCKING:
1050 * caller.
1051 */
1052
1053 void ata_dev_select(struct ata_port *ap, unsigned int device,
1054 unsigned int wait, unsigned int can_sleep)
1055 {
1056 VPRINTK("ENTER, ata%u: device %u, wait %u\n",
1057 ap->id, device, wait);
1058
1059 if (wait)
1060 ata_wait_idle(ap);
1061
1062 ap->ops->dev_select(ap, device);
1063
1064 if (wait) {
1065 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
1066 msleep(150);
1067 ata_wait_idle(ap);
1068 }
1069 }
1070
1071 /**
1072 * ata_dump_id - IDENTIFY DEVICE info debugging output
1073 * @dev: Device whose IDENTIFY DEVICE page we will dump
1074 *
1075 * Dump selected 16-bit words from a detected device's
1076 * IDENTIFY PAGE page.
1077 *
1078 * LOCKING:
1079 * caller.
1080 */
1081
1082 static inline void ata_dump_id(struct ata_device *dev)
1083 {
1084 DPRINTK("49==0x%04x "
1085 "53==0x%04x "
1086 "63==0x%04x "
1087 "64==0x%04x "
1088 "75==0x%04x \n",
1089 dev->id[49],
1090 dev->id[53],
1091 dev->id[63],
1092 dev->id[64],
1093 dev->id[75]);
1094 DPRINTK("80==0x%04x "
1095 "81==0x%04x "
1096 "82==0x%04x "
1097 "83==0x%04x "
1098 "84==0x%04x \n",
1099 dev->id[80],
1100 dev->id[81],
1101 dev->id[82],
1102 dev->id[83],
1103 dev->id[84]);
1104 DPRINTK("88==0x%04x "
1105 "93==0x%04x\n",
1106 dev->id[88],
1107 dev->id[93]);
1108 }
1109
1110 /**
1111 * ata_dev_identify - obtain IDENTIFY x DEVICE page
1112 * @ap: port on which device we wish to probe resides
1113 * @device: device bus address, starting at zero
1114 *
1115 * Following bus reset, we issue the IDENTIFY [PACKET] DEVICE
1116 * command, and read back the 512-byte device information page.
1117 * The device information page is fed to us via the standard
1118 * PIO-IN protocol, but we hand-code it here. (TODO: investigate
1119 * using standard PIO-IN paths)
1120 *
1121 * After reading the device information page, we use several
1122 * bits of information from it to initialize data structures
1123 * that will be used during the lifetime of the ata_device.
1124 * Other data from the info page is used to disqualify certain
1125 * older ATA devices we do not wish to support.
1126 *
1127 * LOCKING:
1128 * Inherited from caller. Some functions called by this function
1129 * obtain the host_set lock.
1130 */
1131
1132 static void ata_dev_identify(struct ata_port *ap, unsigned int device)
1133 {
1134 struct ata_device *dev = &ap->device[device];
1135 unsigned int major_version;
1136 u16 tmp;
1137 unsigned long xfer_modes;
1138 u8 status;
1139 unsigned int using_edd;
1140 DECLARE_COMPLETION(wait);
1141 struct ata_queued_cmd *qc;
1142 unsigned long flags;
1143 int rc;
1144
1145 if (!ata_dev_present(dev)) {
1146 DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
1147 ap->id, device);
1148 return;
1149 }
1150
1151 if (ap->flags & (ATA_FLAG_SRST | ATA_FLAG_SATA_RESET))
1152 using_edd = 0;
1153 else
1154 using_edd = 1;
1155
1156 DPRINTK("ENTER, host %u, dev %u\n", ap->id, device);
1157
1158 assert (dev->class == ATA_DEV_ATA || dev->class == ATA_DEV_ATAPI ||
1159 dev->class == ATA_DEV_NONE);
1160
1161 ata_dev_select(ap, device, 1, 1); /* select device 0/1 */
1162
1163 qc = ata_qc_new_init(ap, dev);
1164 BUG_ON(qc == NULL);
1165
1166 ata_sg_init_one(qc, dev->id, sizeof(dev->id));
1167 qc->dma_dir = DMA_FROM_DEVICE;
1168 qc->tf.protocol = ATA_PROT_PIO;
1169 qc->nsect = 1;
1170
1171 retry:
1172 if (dev->class == ATA_DEV_ATA) {
1173 qc->tf.command = ATA_CMD_ID_ATA;
1174 DPRINTK("do ATA identify\n");
1175 } else {
1176 qc->tf.command = ATA_CMD_ID_ATAPI;
1177 DPRINTK("do ATAPI identify\n");
1178 }
1179
1180 qc->waiting = &wait;
1181 qc->complete_fn = ata_qc_complete_noop;
1182
1183 spin_lock_irqsave(&ap->host_set->lock, flags);
1184 rc = ata_qc_issue(qc);
1185 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1186
1187 if (rc)
1188 goto err_out;
1189 else
1190 wait_for_completion(&wait);
1191
1192 status = ata_chk_status(ap);
1193 if (status & ATA_ERR) {
1194 /*
1195 * arg! EDD works for all test cases, but seems to return
1196 * the ATA signature for some ATAPI devices. Until the
1197 * reason for this is found and fixed, we fix up the mess
1198 * here. If IDENTIFY DEVICE returns command aborted
1199 * (as ATAPI devices do), then we issue an
1200 * IDENTIFY PACKET DEVICE.
1201 *
1202 * ATA software reset (SRST, the default) does not appear
1203 * to have this problem.
1204 */
1205 if ((using_edd) && (qc->tf.command == ATA_CMD_ID_ATA)) {
1206 u8 err = ata_chk_err(ap);
1207 if (err & ATA_ABORTED) {
1208 dev->class = ATA_DEV_ATAPI;
1209 qc->cursg = 0;
1210 qc->cursg_ofs = 0;
1211 qc->cursect = 0;
1212 qc->nsect = 1;
1213 goto retry;
1214 }
1215 }
1216 goto err_out;
1217 }
1218
1219 swap_buf_le16(dev->id, ATA_ID_WORDS);
1220
1221 /* print device capabilities */
1222 printk(KERN_DEBUG "ata%u: dev %u cfg "
1223 "49:%04x 82:%04x 83:%04x 84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
1224 ap->id, device, dev->id[49],
1225 dev->id[82], dev->id[83], dev->id[84],
1226 dev->id[85], dev->id[86], dev->id[87],
1227 dev->id[88]);
1228
1229 /*
1230 * common ATA, ATAPI feature tests
1231 */
1232
1233 /* we require DMA support (bits 8 of word 49) */
1234 if (!ata_id_has_dma(dev->id)) {
1235 printk(KERN_DEBUG "ata%u: no dma\n", ap->id);
1236 goto err_out_nosup;
1237 }
1238
1239 /* quick-n-dirty find max transfer mode; for printk only */
1240 xfer_modes = dev->id[ATA_ID_UDMA_MODES];
1241 if (!xfer_modes)
1242 xfer_modes = (dev->id[ATA_ID_MWDMA_MODES]) << ATA_SHIFT_MWDMA;
1243 if (!xfer_modes) {
1244 xfer_modes = (dev->id[ATA_ID_PIO_MODES]) << (ATA_SHIFT_PIO + 3);
1245 xfer_modes |= (0x7 << ATA_SHIFT_PIO);
1246 }
1247
1248 ata_dump_id(dev);
1249
1250 /* ATA-specific feature tests */
1251 if (dev->class == ATA_DEV_ATA) {
1252 if (!ata_id_is_ata(dev->id)) /* sanity check */
1253 goto err_out_nosup;
1254
1255 /* get major version */
1256 tmp = dev->id[ATA_ID_MAJOR_VER];
1257 for (major_version = 14; major_version >= 1; major_version--)
1258 if (tmp & (1 << major_version))
1259 break;
1260
1261 /*
1262 * The exact sequence expected by certain pre-ATA4 drives is:
1263 * SRST RESET
1264 * IDENTIFY
1265 * INITIALIZE DEVICE PARAMETERS
1266 * anything else..
1267 * Some drives were very specific about that exact sequence.
1268 */
1269 if (major_version < 4 || (!ata_id_has_lba(dev->id)))
1270 ata_dev_init_params(ap, dev);
1271
1272 if (ata_id_has_lba(dev->id)) {
1273 dev->flags |= ATA_DFLAG_LBA;
1274
1275 if (ata_id_has_lba48(dev->id)) {
1276 dev->flags |= ATA_DFLAG_LBA48;
1277 dev->n_sectors = ata_id_u64(dev->id, 100);
1278 } else {
1279 dev->n_sectors = ata_id_u32(dev->id, 60);
1280 }
1281
1282 /* print device info to dmesg */
1283 printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors:%s\n",
1284 ap->id, device,
1285 major_version,
1286 ata_mode_string(xfer_modes),
1287 (unsigned long long)dev->n_sectors,
1288 dev->flags & ATA_DFLAG_LBA48 ? " LBA48" : " LBA");
1289 } else {
1290 /* CHS */
1291
1292 /* Default translation */
1293 dev->cylinders = dev->id[1];
1294 dev->heads = dev->id[3];
1295 dev->sectors = dev->id[6];
1296 dev->n_sectors = dev->cylinders * dev->heads * dev->sectors;
1297
1298 if (ata_id_current_chs_valid(dev->id)) {
1299 /* Current CHS translation is valid. */
1300 dev->cylinders = dev->id[54];
1301 dev->heads = dev->id[55];
1302 dev->sectors = dev->id[56];
1303
1304 dev->n_sectors = ata_id_u32(dev->id, 57);
1305 }
1306
1307 /* print device info to dmesg */
1308 printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors: CHS %d/%d/%d\n",
1309 ap->id, device,
1310 major_version,
1311 ata_mode_string(xfer_modes),
1312 (unsigned long long)dev->n_sectors,
1313 (int)dev->cylinders, (int)dev->heads, (int)dev->sectors);
1314
1315 }
1316
1317 ap->host->max_cmd_len = 16;
1318 }
1319
1320 /* ATAPI-specific feature tests */
1321 else {
1322 if (ata_id_is_ata(dev->id)) /* sanity check */
1323 goto err_out_nosup;
1324
1325 rc = atapi_cdb_len(dev->id);
1326 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1327 printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id);
1328 goto err_out_nosup;
1329 }
1330 ap->cdb_len = (unsigned int) rc;
1331 ap->host->max_cmd_len = (unsigned char) ap->cdb_len;
1332
1333 /* print device info to dmesg */
1334 printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n",
1335 ap->id, device,
1336 ata_mode_string(xfer_modes));
1337 }
1338
1339 DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
1340 return;
1341
1342 err_out_nosup:
1343 printk(KERN_WARNING "ata%u: dev %u not supported, ignoring\n",
1344 ap->id, device);
1345 err_out:
1346 dev->class++; /* converts ATA_DEV_xxx into ATA_DEV_xxx_UNSUP */
1347 DPRINTK("EXIT, err\n");
1348 }
1349
1350
1351 static inline u8 ata_dev_knobble(struct ata_port *ap)
1352 {
1353 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(ap->device->id)));
1354 }
1355
1356 /**
1357 * ata_dev_config - Run device specific handlers and check for
1358 * SATA->PATA bridges
1359 * @ap: Bus
1360 * @i: Device
1361 *
1362 * LOCKING:
1363 */
1364
1365 void ata_dev_config(struct ata_port *ap, unsigned int i)
1366 {
1367 /* limit bridge transfers to udma5, 200 sectors */
1368 if (ata_dev_knobble(ap)) {
1369 printk(KERN_INFO "ata%u(%u): applying bridge limits\n",
1370 ap->id, ap->device->devno);
1371 ap->udma_mask &= ATA_UDMA5;
1372 ap->host->max_sectors = ATA_MAX_SECTORS;
1373 ap->host->hostt->max_sectors = ATA_MAX_SECTORS;
1374 ap->device->flags |= ATA_DFLAG_LOCK_SECTORS;
1375 }
1376
1377 if (ap->ops->dev_config)
1378 ap->ops->dev_config(ap, &ap->device[i]);
1379 }
1380
1381 /**
1382 * ata_bus_probe - Reset and probe ATA bus
1383 * @ap: Bus to probe
1384 *
1385 * Master ATA bus probing function. Initiates a hardware-dependent
1386 * bus reset, then attempts to identify any devices found on
1387 * the bus.
1388 *
1389 * LOCKING:
1390 * PCI/etc. bus probe sem.
1391 *
1392 * RETURNS:
1393 * Zero on success, non-zero on error.
1394 */
1395
1396 static int ata_bus_probe(struct ata_port *ap)
1397 {
1398 unsigned int i, found = 0;
1399
1400 ap->ops->phy_reset(ap);
1401 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1402 goto err_out;
1403
1404 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1405 ata_dev_identify(ap, i);
1406 if (ata_dev_present(&ap->device[i])) {
1407 found = 1;
1408 ata_dev_config(ap,i);
1409 }
1410 }
1411
1412 if ((!found) || (ap->flags & ATA_FLAG_PORT_DISABLED))
1413 goto err_out_disable;
1414
1415 ata_set_mode(ap);
1416 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1417 goto err_out_disable;
1418
1419 return 0;
1420
1421 err_out_disable:
1422 ap->ops->port_disable(ap);
1423 err_out:
1424 return -1;
1425 }
1426
1427 /**
1428 * ata_port_probe - Mark port as enabled
1429 * @ap: Port for which we indicate enablement
1430 *
1431 * Modify @ap data structure such that the system
1432 * thinks that the entire port is enabled.
1433 *
1434 * LOCKING: host_set lock, or some other form of
1435 * serialization.
1436 */
1437
1438 void ata_port_probe(struct ata_port *ap)
1439 {
1440 ap->flags &= ~ATA_FLAG_PORT_DISABLED;
1441 }
1442
1443 /**
1444 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1445 * @ap: SATA port associated with target SATA PHY.
1446 *
1447 * This function issues commands to standard SATA Sxxx
1448 * PHY registers, to wake up the phy (and device), and
1449 * clear any reset condition.
1450 *
1451 * LOCKING:
1452 * PCI/etc. bus probe sem.
1453 *
1454 */
1455 void __sata_phy_reset(struct ata_port *ap)
1456 {
1457 u32 sstatus;
1458 unsigned long timeout = jiffies + (HZ * 5);
1459
1460 if (ap->flags & ATA_FLAG_SATA_RESET) {
1461 /* issue phy wake/reset */
1462 scr_write_flush(ap, SCR_CONTROL, 0x301);
1463 /* Couldn't find anything in SATA I/II specs, but
1464 * AHCI-1.1 10.4.2 says at least 1 ms. */
1465 mdelay(1);
1466 }
1467 scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */
1468
1469 /* wait for phy to become ready, if necessary */
1470 do {
1471 msleep(200);
1472 sstatus = scr_read(ap, SCR_STATUS);
1473 if ((sstatus & 0xf) != 1)
1474 break;
1475 } while (time_before(jiffies, timeout));
1476
1477 /* TODO: phy layer with polling, timeouts, etc. */
1478 if (sata_dev_present(ap))
1479 ata_port_probe(ap);
1480 else {
1481 sstatus = scr_read(ap, SCR_STATUS);
1482 printk(KERN_INFO "ata%u: no device found (phy stat %08x)\n",
1483 ap->id, sstatus);
1484 ata_port_disable(ap);
1485 }
1486
1487 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1488 return;
1489
1490 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1491 ata_port_disable(ap);
1492 return;
1493 }
1494
1495 ap->cbl = ATA_CBL_SATA;
1496 }
1497
1498 /**
1499 * sata_phy_reset - Reset SATA bus.
1500 * @ap: SATA port associated with target SATA PHY.
1501 *
1502 * This function resets the SATA bus, and then probes
1503 * the bus for devices.
1504 *
1505 * LOCKING:
1506 * PCI/etc. bus probe sem.
1507 *
1508 */
1509 void sata_phy_reset(struct ata_port *ap)
1510 {
1511 __sata_phy_reset(ap);
1512 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1513 return;
1514 ata_bus_reset(ap);
1515 }
1516
1517 /**
1518 * ata_port_disable - Disable port.
1519 * @ap: Port to be disabled.
1520 *
1521 * Modify @ap data structure such that the system
1522 * thinks that the entire port is disabled, and should
1523 * never attempt to probe or communicate with devices
1524 * on this port.
1525 *
1526 * LOCKING: host_set lock, or some other form of
1527 * serialization.
1528 */
1529
1530 void ata_port_disable(struct ata_port *ap)
1531 {
1532 ap->device[0].class = ATA_DEV_NONE;
1533 ap->device[1].class = ATA_DEV_NONE;
1534 ap->flags |= ATA_FLAG_PORT_DISABLED;
1535 }
1536
1537 static struct {
1538 unsigned int shift;
1539 u8 base;
1540 } xfer_mode_classes[] = {
1541 { ATA_SHIFT_UDMA, XFER_UDMA_0 },
1542 { ATA_SHIFT_MWDMA, XFER_MW_DMA_0 },
1543 { ATA_SHIFT_PIO, XFER_PIO_0 },
1544 };
1545
1546 static inline u8 base_from_shift(unsigned int shift)
1547 {
1548 int i;
1549
1550 for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++)
1551 if (xfer_mode_classes[i].shift == shift)
1552 return xfer_mode_classes[i].base;
1553
1554 return 0xff;
1555 }
1556
1557 static void ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev)
1558 {
1559 int ofs, idx;
1560 u8 base;
1561
1562 if (!ata_dev_present(dev) || (ap->flags & ATA_FLAG_PORT_DISABLED))
1563 return;
1564
1565 if (dev->xfer_shift == ATA_SHIFT_PIO)
1566 dev->flags |= ATA_DFLAG_PIO;
1567
1568 ata_dev_set_xfermode(ap, dev);
1569
1570 base = base_from_shift(dev->xfer_shift);
1571 ofs = dev->xfer_mode - base;
1572 idx = ofs + dev->xfer_shift;
1573 WARN_ON(idx >= ARRAY_SIZE(xfer_mode_str));
1574
1575 DPRINTK("idx=%d xfer_shift=%u, xfer_mode=0x%x, base=0x%x, offset=%d\n",
1576 idx, dev->xfer_shift, (int)dev->xfer_mode, (int)base, ofs);
1577
1578 printk(KERN_INFO "ata%u: dev %u configured for %s\n",
1579 ap->id, dev->devno, xfer_mode_str[idx]);
1580 }
1581
1582 static int ata_host_set_pio(struct ata_port *ap)
1583 {
1584 unsigned int mask;
1585 int x, i;
1586 u8 base, xfer_mode;
1587
1588 mask = ata_get_mode_mask(ap, ATA_SHIFT_PIO);
1589 x = fgb(mask);
1590 if (x < 0) {
1591 printk(KERN_WARNING "ata%u: no PIO support\n", ap->id);
1592 return -1;
1593 }
1594
1595 base = base_from_shift(ATA_SHIFT_PIO);
1596 xfer_mode = base + x;
1597
1598 DPRINTK("base 0x%x xfer_mode 0x%x mask 0x%x x %d\n",
1599 (int)base, (int)xfer_mode, mask, x);
1600
1601 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1602 struct ata_device *dev = &ap->device[i];
1603 if (ata_dev_present(dev)) {
1604 dev->pio_mode = xfer_mode;
1605 dev->xfer_mode = xfer_mode;
1606 dev->xfer_shift = ATA_SHIFT_PIO;
1607 if (ap->ops->set_piomode)
1608 ap->ops->set_piomode(ap, dev);
1609 }
1610 }
1611
1612 return 0;
1613 }
1614
1615 static void ata_host_set_dma(struct ata_port *ap, u8 xfer_mode,
1616 unsigned int xfer_shift)
1617 {
1618 int i;
1619
1620 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1621 struct ata_device *dev = &ap->device[i];
1622 if (ata_dev_present(dev)) {
1623 dev->dma_mode = xfer_mode;
1624 dev->xfer_mode = xfer_mode;
1625 dev->xfer_shift = xfer_shift;
1626 if (ap->ops->set_dmamode)
1627 ap->ops->set_dmamode(ap, dev);
1628 }
1629 }
1630 }
1631
1632 /**
1633 * ata_set_mode - Program timings and issue SET FEATURES - XFER
1634 * @ap: port on which timings will be programmed
1635 *
1636 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.).
1637 *
1638 * LOCKING:
1639 * PCI/etc. bus probe sem.
1640 *
1641 */
1642 static void ata_set_mode(struct ata_port *ap)
1643 {
1644 unsigned int i, xfer_shift;
1645 u8 xfer_mode;
1646 int rc;
1647
1648 /* step 1: always set host PIO timings */
1649 rc = ata_host_set_pio(ap);
1650 if (rc)
1651 goto err_out;
1652
1653 /* step 2: choose the best data xfer mode */
1654 xfer_mode = xfer_shift = 0;
1655 rc = ata_choose_xfer_mode(ap, &xfer_mode, &xfer_shift);
1656 if (rc)
1657 goto err_out;
1658
1659 /* step 3: if that xfer mode isn't PIO, set host DMA timings */
1660 if (xfer_shift != ATA_SHIFT_PIO)
1661 ata_host_set_dma(ap, xfer_mode, xfer_shift);
1662
1663 /* step 4: update devices' xfer mode */
1664 ata_dev_set_mode(ap, &ap->device[0]);
1665 ata_dev_set_mode(ap, &ap->device[1]);
1666
1667 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1668 return;
1669
1670 if (ap->ops->post_set_mode)
1671 ap->ops->post_set_mode(ap);
1672
1673 for (i = 0; i < 2; i++) {
1674 struct ata_device *dev = &ap->device[i];
1675 ata_dev_set_protocol(dev);
1676 }
1677
1678 return;
1679
1680 err_out:
1681 ata_port_disable(ap);
1682 }
1683
1684 /**
1685 * ata_busy_sleep - sleep until BSY clears, or timeout
1686 * @ap: port containing status register to be polled
1687 * @tmout_pat: impatience timeout
1688 * @tmout: overall timeout
1689 *
1690 * Sleep until ATA Status register bit BSY clears,
1691 * or a timeout occurs.
1692 *
1693 * LOCKING: None.
1694 *
1695 */
1696
1697 static unsigned int ata_busy_sleep (struct ata_port *ap,
1698 unsigned long tmout_pat,
1699 unsigned long tmout)
1700 {
1701 unsigned long timer_start, timeout;
1702 u8 status;
1703
1704 status = ata_busy_wait(ap, ATA_BUSY, 300);
1705 timer_start = jiffies;
1706 timeout = timer_start + tmout_pat;
1707 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1708 msleep(50);
1709 status = ata_busy_wait(ap, ATA_BUSY, 3);
1710 }
1711
1712 if (status & ATA_BUSY)
1713 printk(KERN_WARNING "ata%u is slow to respond, "
1714 "please be patient\n", ap->id);
1715
1716 timeout = timer_start + tmout;
1717 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1718 msleep(50);
1719 status = ata_chk_status(ap);
1720 }
1721
1722 if (status & ATA_BUSY) {
1723 printk(KERN_ERR "ata%u failed to respond (%lu secs)\n",
1724 ap->id, tmout / HZ);
1725 return 1;
1726 }
1727
1728 return 0;
1729 }
1730
1731 static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
1732 {
1733 struct ata_ioports *ioaddr = &ap->ioaddr;
1734 unsigned int dev0 = devmask & (1 << 0);
1735 unsigned int dev1 = devmask & (1 << 1);
1736 unsigned long timeout;
1737
1738 /* if device 0 was found in ata_devchk, wait for its
1739 * BSY bit to clear
1740 */
1741 if (dev0)
1742 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1743
1744 /* if device 1 was found in ata_devchk, wait for
1745 * register access, then wait for BSY to clear
1746 */
1747 timeout = jiffies + ATA_TMOUT_BOOT;
1748 while (dev1) {
1749 u8 nsect, lbal;
1750
1751 ap->ops->dev_select(ap, 1);
1752 if (ap->flags & ATA_FLAG_MMIO) {
1753 nsect = readb((void __iomem *) ioaddr->nsect_addr);
1754 lbal = readb((void __iomem *) ioaddr->lbal_addr);
1755 } else {
1756 nsect = inb(ioaddr->nsect_addr);
1757 lbal = inb(ioaddr->lbal_addr);
1758 }
1759 if ((nsect == 1) && (lbal == 1))
1760 break;
1761 if (time_after(jiffies, timeout)) {
1762 dev1 = 0;
1763 break;
1764 }
1765 msleep(50); /* give drive a breather */
1766 }
1767 if (dev1)
1768 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1769
1770 /* is all this really necessary? */
1771 ap->ops->dev_select(ap, 0);
1772 if (dev1)
1773 ap->ops->dev_select(ap, 1);
1774 if (dev0)
1775 ap->ops->dev_select(ap, 0);
1776 }
1777
1778 /**
1779 * ata_bus_edd - Issue EXECUTE DEVICE DIAGNOSTIC command.
1780 * @ap: Port to reset and probe
1781 *
1782 * Use the EXECUTE DEVICE DIAGNOSTIC command to reset and
1783 * probe the bus. Not often used these days.
1784 *
1785 * LOCKING:
1786 * PCI/etc. bus probe sem.
1787 *
1788 */
1789
1790 static unsigned int ata_bus_edd(struct ata_port *ap)
1791 {
1792 struct ata_taskfile tf;
1793
1794 /* set up execute-device-diag (bus reset) taskfile */
1795 /* also, take interrupts to a known state (disabled) */
1796 DPRINTK("execute-device-diag\n");
1797 ata_tf_init(ap, &tf, 0);
1798 tf.ctl |= ATA_NIEN;
1799 tf.command = ATA_CMD_EDD;
1800 tf.protocol = ATA_PROT_NODATA;
1801
1802 /* do bus reset */
1803 ata_tf_to_host(ap, &tf);
1804
1805 /* spec says at least 2ms. but who knows with those
1806 * crazy ATAPI devices...
1807 */
1808 msleep(150);
1809
1810 return ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1811 }
1812
1813 static unsigned int ata_bus_softreset(struct ata_port *ap,
1814 unsigned int devmask)
1815 {
1816 struct ata_ioports *ioaddr = &ap->ioaddr;
1817
1818 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
1819
1820 /* software reset. causes dev0 to be selected */
1821 if (ap->flags & ATA_FLAG_MMIO) {
1822 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1823 udelay(20); /* FIXME: flush */
1824 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
1825 udelay(20); /* FIXME: flush */
1826 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1827 } else {
1828 outb(ap->ctl, ioaddr->ctl_addr);
1829 udelay(10);
1830 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
1831 udelay(10);
1832 outb(ap->ctl, ioaddr->ctl_addr);
1833 }
1834
1835 /* spec mandates ">= 2ms" before checking status.
1836 * We wait 150ms, because that was the magic delay used for
1837 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
1838 * between when the ATA command register is written, and then
1839 * status is checked. Because waiting for "a while" before
1840 * checking status is fine, post SRST, we perform this magic
1841 * delay here as well.
1842 */
1843 msleep(150);
1844
1845 ata_bus_post_reset(ap, devmask);
1846
1847 return 0;
1848 }
1849
1850 /**
1851 * ata_bus_reset - reset host port and associated ATA channel
1852 * @ap: port to reset
1853 *
1854 * This is typically the first time we actually start issuing
1855 * commands to the ATA channel. We wait for BSY to clear, then
1856 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
1857 * result. Determine what devices, if any, are on the channel
1858 * by looking at the device 0/1 error register. Look at the signature
1859 * stored in each device's taskfile registers, to determine if
1860 * the device is ATA or ATAPI.
1861 *
1862 * LOCKING:
1863 * PCI/etc. bus probe sem.
1864 * Obtains host_set lock.
1865 *
1866 * SIDE EFFECTS:
1867 * Sets ATA_FLAG_PORT_DISABLED if bus reset fails.
1868 */
1869
1870 void ata_bus_reset(struct ata_port *ap)
1871 {
1872 struct ata_ioports *ioaddr = &ap->ioaddr;
1873 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
1874 u8 err;
1875 unsigned int dev0, dev1 = 0, rc = 0, devmask = 0;
1876
1877 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
1878
1879 /* determine if device 0/1 are present */
1880 if (ap->flags & ATA_FLAG_SATA_RESET)
1881 dev0 = 1;
1882 else {
1883 dev0 = ata_devchk(ap, 0);
1884 if (slave_possible)
1885 dev1 = ata_devchk(ap, 1);
1886 }
1887
1888 if (dev0)
1889 devmask |= (1 << 0);
1890 if (dev1)
1891 devmask |= (1 << 1);
1892
1893 /* select device 0 again */
1894 ap->ops->dev_select(ap, 0);
1895
1896 /* issue bus reset */
1897 if (ap->flags & ATA_FLAG_SRST)
1898 rc = ata_bus_softreset(ap, devmask);
1899 else if ((ap->flags & ATA_FLAG_SATA_RESET) == 0) {
1900 /* set up device control */
1901 if (ap->flags & ATA_FLAG_MMIO)
1902 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1903 else
1904 outb(ap->ctl, ioaddr->ctl_addr);
1905 rc = ata_bus_edd(ap);
1906 }
1907
1908 if (rc)
1909 goto err_out;
1910
1911 /*
1912 * determine by signature whether we have ATA or ATAPI devices
1913 */
1914 err = ata_dev_try_classify(ap, 0);
1915 if ((slave_possible) && (err != 0x81))
1916 ata_dev_try_classify(ap, 1);
1917
1918 /* re-enable interrupts */
1919 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
1920 ata_irq_on(ap);
1921
1922 /* is double-select really necessary? */
1923 if (ap->device[1].class != ATA_DEV_NONE)
1924 ap->ops->dev_select(ap, 1);
1925 if (ap->device[0].class != ATA_DEV_NONE)
1926 ap->ops->dev_select(ap, 0);
1927
1928 /* if no devices were detected, disable this port */
1929 if ((ap->device[0].class == ATA_DEV_NONE) &&
1930 (ap->device[1].class == ATA_DEV_NONE))
1931 goto err_out;
1932
1933 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
1934 /* set up device control for ATA_FLAG_SATA_RESET */
1935 if (ap->flags & ATA_FLAG_MMIO)
1936 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1937 else
1938 outb(ap->ctl, ioaddr->ctl_addr);
1939 }
1940
1941 DPRINTK("EXIT\n");
1942 return;
1943
1944 err_out:
1945 printk(KERN_ERR "ata%u: disabling port\n", ap->id);
1946 ap->ops->port_disable(ap);
1947
1948 DPRINTK("EXIT\n");
1949 }
1950
1951 static void ata_pr_blacklisted(struct ata_port *ap, struct ata_device *dev)
1952 {
1953 printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, disabling DMA\n",
1954 ap->id, dev->devno);
1955 }
1956
1957 static const char * ata_dma_blacklist [] = {
1958 "WDC AC11000H",
1959 "WDC AC22100H",
1960 "WDC AC32500H",
1961 "WDC AC33100H",
1962 "WDC AC31600H",
1963 "WDC AC32100H",
1964 "WDC AC23200L",
1965 "Compaq CRD-8241B",
1966 "CRD-8400B",
1967 "CRD-8480B",
1968 "CRD-8482B",
1969 "CRD-84",
1970 "SanDisk SDP3B",
1971 "SanDisk SDP3B-64",
1972 "SANYO CD-ROM CRD",
1973 "HITACHI CDR-8",
1974 "HITACHI CDR-8335",
1975 "HITACHI CDR-8435",
1976 "Toshiba CD-ROM XM-6202B",
1977 "TOSHIBA CD-ROM XM-1702BC",
1978 "CD-532E-A",
1979 "E-IDE CD-ROM CR-840",
1980 "CD-ROM Drive/F5A",
1981 "WPI CDD-820",
1982 "SAMSUNG CD-ROM SC-148C",
1983 "SAMSUNG CD-ROM SC",
1984 "SanDisk SDP3B-64",
1985 "ATAPI CD-ROM DRIVE 40X MAXIMUM",
1986 "_NEC DV5800A",
1987 };
1988
1989 static int ata_dma_blacklisted(struct ata_port *ap, struct ata_device *dev)
1990 {
1991 unsigned char model_num[40];
1992 char *s;
1993 unsigned int len;
1994 int i;
1995
1996 ata_dev_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
1997 sizeof(model_num));
1998 s = &model_num[0];
1999 len = strnlen(s, sizeof(model_num));
2000
2001 /* ATAPI specifies that empty space is blank-filled; remove blanks */
2002 while ((len > 0) && (s[len - 1] == ' ')) {
2003 len--;
2004 s[len] = 0;
2005 }
2006
2007 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i++)
2008 if (!strncmp(ata_dma_blacklist[i], s, len))
2009 return 1;
2010
2011 return 0;
2012 }
2013
2014 static unsigned int ata_get_mode_mask(struct ata_port *ap, int shift)
2015 {
2016 struct ata_device *master, *slave;
2017 unsigned int mask;
2018
2019 master = &ap->device[0];
2020 slave = &ap->device[1];
2021
2022 assert (ata_dev_present(master) || ata_dev_present(slave));
2023
2024 if (shift == ATA_SHIFT_UDMA) {
2025 mask = ap->udma_mask;
2026 if (ata_dev_present(master)) {
2027 mask &= (master->id[ATA_ID_UDMA_MODES] & 0xff);
2028 if (ata_dma_blacklisted(ap, master)) {
2029 mask = 0;
2030 ata_pr_blacklisted(ap, master);
2031 }
2032 }
2033 if (ata_dev_present(slave)) {
2034 mask &= (slave->id[ATA_ID_UDMA_MODES] & 0xff);
2035 if (ata_dma_blacklisted(ap, slave)) {
2036 mask = 0;
2037 ata_pr_blacklisted(ap, slave);
2038 }
2039 }
2040 }
2041 else if (shift == ATA_SHIFT_MWDMA) {
2042 mask = ap->mwdma_mask;
2043 if (ata_dev_present(master)) {
2044 mask &= (master->id[ATA_ID_MWDMA_MODES] & 0x07);
2045 if (ata_dma_blacklisted(ap, master)) {
2046 mask = 0;
2047 ata_pr_blacklisted(ap, master);
2048 }
2049 }
2050 if (ata_dev_present(slave)) {
2051 mask &= (slave->id[ATA_ID_MWDMA_MODES] & 0x07);
2052 if (ata_dma_blacklisted(ap, slave)) {
2053 mask = 0;
2054 ata_pr_blacklisted(ap, slave);
2055 }
2056 }
2057 }
2058 else if (shift == ATA_SHIFT_PIO) {
2059 mask = ap->pio_mask;
2060 if (ata_dev_present(master)) {
2061 /* spec doesn't return explicit support for
2062 * PIO0-2, so we fake it
2063 */
2064 u16 tmp_mode = master->id[ATA_ID_PIO_MODES] & 0x03;
2065 tmp_mode <<= 3;
2066 tmp_mode |= 0x7;
2067 mask &= tmp_mode;
2068 }
2069 if (ata_dev_present(slave)) {
2070 /* spec doesn't return explicit support for
2071 * PIO0-2, so we fake it
2072 */
2073 u16 tmp_mode = slave->id[ATA_ID_PIO_MODES] & 0x03;
2074 tmp_mode <<= 3;
2075 tmp_mode |= 0x7;
2076 mask &= tmp_mode;
2077 }
2078 }
2079 else {
2080 mask = 0xffffffff; /* shut up compiler warning */
2081 BUG();
2082 }
2083
2084 return mask;
2085 }
2086
2087 /* find greatest bit */
2088 static int fgb(u32 bitmap)
2089 {
2090 unsigned int i;
2091 int x = -1;
2092
2093 for (i = 0; i < 32; i++)
2094 if (bitmap & (1 << i))
2095 x = i;
2096
2097 return x;
2098 }
2099
2100 /**
2101 * ata_choose_xfer_mode - attempt to find best transfer mode
2102 * @ap: Port for which an xfer mode will be selected
2103 * @xfer_mode_out: (output) SET FEATURES - XFER MODE code
2104 * @xfer_shift_out: (output) bit shift that selects this mode
2105 *
2106 * Based on host and device capabilities, determine the
2107 * maximum transfer mode that is amenable to all.
2108 *
2109 * LOCKING:
2110 * PCI/etc. bus probe sem.
2111 *
2112 * RETURNS:
2113 * Zero on success, negative on error.
2114 */
2115
2116 static int ata_choose_xfer_mode(struct ata_port *ap,
2117 u8 *xfer_mode_out,
2118 unsigned int *xfer_shift_out)
2119 {
2120 unsigned int mask, shift;
2121 int x, i;
2122
2123 for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++) {
2124 shift = xfer_mode_classes[i].shift;
2125 mask = ata_get_mode_mask(ap, shift);
2126
2127 x = fgb(mask);
2128 if (x >= 0) {
2129 *xfer_mode_out = xfer_mode_classes[i].base + x;
2130 *xfer_shift_out = shift;
2131 return 0;
2132 }
2133 }
2134
2135 return -1;
2136 }
2137
2138 /**
2139 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
2140 * @ap: Port associated with device @dev
2141 * @dev: Device to which command will be sent
2142 *
2143 * Issue SET FEATURES - XFER MODE command to device @dev
2144 * on port @ap.
2145 *
2146 * LOCKING:
2147 * PCI/etc. bus probe sem.
2148 */
2149
2150 static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev)
2151 {
2152 DECLARE_COMPLETION(wait);
2153 struct ata_queued_cmd *qc;
2154 int rc;
2155 unsigned long flags;
2156
2157 /* set up set-features taskfile */
2158 DPRINTK("set features - xfer mode\n");
2159
2160 qc = ata_qc_new_init(ap, dev);
2161 BUG_ON(qc == NULL);
2162
2163 qc->tf.command = ATA_CMD_SET_FEATURES;
2164 qc->tf.feature = SETFEATURES_XFER;
2165 qc->tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2166 qc->tf.protocol = ATA_PROT_NODATA;
2167 qc->tf.nsect = dev->xfer_mode;
2168
2169 qc->waiting = &wait;
2170 qc->complete_fn = ata_qc_complete_noop;
2171
2172 spin_lock_irqsave(&ap->host_set->lock, flags);
2173 rc = ata_qc_issue(qc);
2174 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2175
2176 if (rc)
2177 ata_port_disable(ap);
2178 else
2179 wait_for_completion(&wait);
2180
2181 DPRINTK("EXIT\n");
2182 }
2183
2184 /**
2185 * ata_dev_init_params - Issue INIT DEV PARAMS command
2186 * @ap: Port associated with device @dev
2187 * @dev: Device to which command will be sent
2188 *
2189 * LOCKING:
2190 */
2191
2192 static void ata_dev_init_params(struct ata_port *ap, struct ata_device *dev)
2193 {
2194 DECLARE_COMPLETION(wait);
2195 struct ata_queued_cmd *qc;
2196 int rc;
2197 unsigned long flags;
2198 u16 sectors = dev->id[6];
2199 u16 heads = dev->id[3];
2200
2201 /* Number of sectors per track 1-255. Number of heads 1-16 */
2202 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
2203 return;
2204
2205 /* set up init dev params taskfile */
2206 DPRINTK("init dev params \n");
2207
2208 qc = ata_qc_new_init(ap, dev);
2209 BUG_ON(qc == NULL);
2210
2211 qc->tf.command = ATA_CMD_INIT_DEV_PARAMS;
2212 qc->tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2213 qc->tf.protocol = ATA_PROT_NODATA;
2214 qc->tf.nsect = sectors;
2215 qc->tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
2216
2217 qc->waiting = &wait;
2218 qc->complete_fn = ata_qc_complete_noop;
2219
2220 spin_lock_irqsave(&ap->host_set->lock, flags);
2221 rc = ata_qc_issue(qc);
2222 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2223
2224 if (rc)
2225 ata_port_disable(ap);
2226 else
2227 wait_for_completion(&wait);
2228
2229 DPRINTK("EXIT\n");
2230 }
2231
2232 /**
2233 * ata_sg_clean - Unmap DMA memory associated with command
2234 * @qc: Command containing DMA memory to be released
2235 *
2236 * Unmap all mapped DMA memory associated with this command.
2237 *
2238 * LOCKING:
2239 * spin_lock_irqsave(host_set lock)
2240 */
2241
2242 static void ata_sg_clean(struct ata_queued_cmd *qc)
2243 {
2244 struct ata_port *ap = qc->ap;
2245 struct scatterlist *sg = qc->sg;
2246 int dir = qc->dma_dir;
2247
2248 assert(qc->flags & ATA_QCFLAG_DMAMAP);
2249 assert(sg != NULL);
2250
2251 if (qc->flags & ATA_QCFLAG_SINGLE)
2252 assert(qc->n_elem == 1);
2253
2254 DPRINTK("unmapping %u sg elements\n", qc->n_elem);
2255
2256 if (qc->flags & ATA_QCFLAG_SG)
2257 dma_unmap_sg(ap->host_set->dev, sg, qc->n_elem, dir);
2258 else
2259 dma_unmap_single(ap->host_set->dev, sg_dma_address(&sg[0]),
2260 sg_dma_len(&sg[0]), dir);
2261
2262 qc->flags &= ~ATA_QCFLAG_DMAMAP;
2263 qc->sg = NULL;
2264 }
2265
2266 /**
2267 * ata_fill_sg - Fill PCI IDE PRD table
2268 * @qc: Metadata associated with taskfile to be transferred
2269 *
2270 * Fill PCI IDE PRD (scatter-gather) table with segments
2271 * associated with the current disk command.
2272 *
2273 * LOCKING:
2274 * spin_lock_irqsave(host_set lock)
2275 *
2276 */
2277 static void ata_fill_sg(struct ata_queued_cmd *qc)
2278 {
2279 struct scatterlist *sg = qc->sg;
2280 struct ata_port *ap = qc->ap;
2281 unsigned int idx, nelem;
2282
2283 assert(sg != NULL);
2284 assert(qc->n_elem > 0);
2285
2286 idx = 0;
2287 for (nelem = qc->n_elem; nelem; nelem--,sg++) {
2288 u32 addr, offset;
2289 u32 sg_len, len;
2290
2291 /* determine if physical DMA addr spans 64K boundary.
2292 * Note h/w doesn't support 64-bit, so we unconditionally
2293 * truncate dma_addr_t to u32.
2294 */
2295 addr = (u32) sg_dma_address(sg);
2296 sg_len = sg_dma_len(sg);
2297
2298 while (sg_len) {
2299 offset = addr & 0xffff;
2300 len = sg_len;
2301 if ((offset + sg_len) > 0x10000)
2302 len = 0x10000 - offset;
2303
2304 ap->prd[idx].addr = cpu_to_le32(addr);
2305 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
2306 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
2307
2308 idx++;
2309 sg_len -= len;
2310 addr += len;
2311 }
2312 }
2313
2314 if (idx)
2315 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
2316 }
2317 /**
2318 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
2319 * @qc: Metadata associated with taskfile to check
2320 *
2321 * Allow low-level driver to filter ATA PACKET commands, returning
2322 * a status indicating whether or not it is OK to use DMA for the
2323 * supplied PACKET command.
2324 *
2325 * LOCKING:
2326 * spin_lock_irqsave(host_set lock)
2327 *
2328 * RETURNS: 0 when ATAPI DMA can be used
2329 * nonzero otherwise
2330 */
2331 int ata_check_atapi_dma(struct ata_queued_cmd *qc)
2332 {
2333 struct ata_port *ap = qc->ap;
2334 int rc = 0; /* Assume ATAPI DMA is OK by default */
2335
2336 if (ap->ops->check_atapi_dma)
2337 rc = ap->ops->check_atapi_dma(qc);
2338
2339 return rc;
2340 }
2341 /**
2342 * ata_qc_prep - Prepare taskfile for submission
2343 * @qc: Metadata associated with taskfile to be prepared
2344 *
2345 * Prepare ATA taskfile for submission.
2346 *
2347 * LOCKING:
2348 * spin_lock_irqsave(host_set lock)
2349 */
2350 void ata_qc_prep(struct ata_queued_cmd *qc)
2351 {
2352 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
2353 return;
2354
2355 ata_fill_sg(qc);
2356 }
2357
2358 /**
2359 * ata_sg_init_one - Associate command with memory buffer
2360 * @qc: Command to be associated
2361 * @buf: Memory buffer
2362 * @buflen: Length of memory buffer, in bytes.
2363 *
2364 * Initialize the data-related elements of queued_cmd @qc
2365 * to point to a single memory buffer, @buf of byte length @buflen.
2366 *
2367 * LOCKING:
2368 * spin_lock_irqsave(host_set lock)
2369 */
2370
2371 void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
2372 {
2373 struct scatterlist *sg;
2374
2375 qc->flags |= ATA_QCFLAG_SINGLE;
2376
2377 memset(&qc->sgent, 0, sizeof(qc->sgent));
2378 qc->sg = &qc->sgent;
2379 qc->n_elem = 1;
2380 qc->buf_virt = buf;
2381
2382 sg = qc->sg;
2383 sg->page = virt_to_page(buf);
2384 sg->offset = (unsigned long) buf & ~PAGE_MASK;
2385 sg->length = buflen;
2386 }
2387
2388 /**
2389 * ata_sg_init - Associate command with scatter-gather table.
2390 * @qc: Command to be associated
2391 * @sg: Scatter-gather table.
2392 * @n_elem: Number of elements in s/g table.
2393 *
2394 * Initialize the data-related elements of queued_cmd @qc
2395 * to point to a scatter-gather table @sg, containing @n_elem
2396 * elements.
2397 *
2398 * LOCKING:
2399 * spin_lock_irqsave(host_set lock)
2400 */
2401
2402 void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
2403 unsigned int n_elem)
2404 {
2405 qc->flags |= ATA_QCFLAG_SG;
2406 qc->sg = sg;
2407 qc->n_elem = n_elem;
2408 }
2409
2410 /**
2411 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
2412 * @qc: Command with memory buffer to be mapped.
2413 *
2414 * DMA-map the memory buffer associated with queued_cmd @qc.
2415 *
2416 * LOCKING:
2417 * spin_lock_irqsave(host_set lock)
2418 *
2419 * RETURNS:
2420 * Zero on success, negative on error.
2421 */
2422
2423 static int ata_sg_setup_one(struct ata_queued_cmd *qc)
2424 {
2425 struct ata_port *ap = qc->ap;
2426 int dir = qc->dma_dir;
2427 struct scatterlist *sg = qc->sg;
2428 dma_addr_t dma_address;
2429
2430 dma_address = dma_map_single(ap->host_set->dev, qc->buf_virt,
2431 sg->length, dir);
2432 if (dma_mapping_error(dma_address))
2433 return -1;
2434
2435 sg_dma_address(sg) = dma_address;
2436 sg_dma_len(sg) = sg->length;
2437
2438 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
2439 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
2440
2441 return 0;
2442 }
2443
2444 /**
2445 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
2446 * @qc: Command with scatter-gather table to be mapped.
2447 *
2448 * DMA-map the scatter-gather table associated with queued_cmd @qc.
2449 *
2450 * LOCKING:
2451 * spin_lock_irqsave(host_set lock)
2452 *
2453 * RETURNS:
2454 * Zero on success, negative on error.
2455 *
2456 */
2457
2458 static int ata_sg_setup(struct ata_queued_cmd *qc)
2459 {
2460 struct ata_port *ap = qc->ap;
2461 struct scatterlist *sg = qc->sg;
2462 int n_elem, dir;
2463
2464 VPRINTK("ENTER, ata%u\n", ap->id);
2465 assert(qc->flags & ATA_QCFLAG_SG);
2466
2467 dir = qc->dma_dir;
2468 n_elem = dma_map_sg(ap->host_set->dev, sg, qc->n_elem, dir);
2469 if (n_elem < 1)
2470 return -1;
2471
2472 DPRINTK("%d sg elements mapped\n", n_elem);
2473
2474 qc->n_elem = n_elem;
2475
2476 return 0;
2477 }
2478
2479 /**
2480 * ata_poll_qc_complete - turn irq back on and finish qc
2481 * @qc: Command to complete
2482 * @drv_stat: ATA status register content
2483 *
2484 * LOCKING:
2485 * None. (grabs host lock)
2486 */
2487
2488 void ata_poll_qc_complete(struct ata_queued_cmd *qc, u8 drv_stat)
2489 {
2490 struct ata_port *ap = qc->ap;
2491 unsigned long flags;
2492
2493 spin_lock_irqsave(&ap->host_set->lock, flags);
2494 ap->flags &= ~ATA_FLAG_NOINTR;
2495 ata_irq_on(ap);
2496 ata_qc_complete(qc, drv_stat);
2497 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2498 }
2499
2500 /**
2501 * ata_pio_poll -
2502 * @ap:
2503 *
2504 * LOCKING:
2505 * None. (executing in kernel thread context)
2506 *
2507 * RETURNS:
2508 *
2509 */
2510
2511 static unsigned long ata_pio_poll(struct ata_port *ap)
2512 {
2513 u8 status;
2514 unsigned int poll_state = PIO_ST_UNKNOWN;
2515 unsigned int reg_state = PIO_ST_UNKNOWN;
2516 const unsigned int tmout_state = PIO_ST_TMOUT;
2517
2518 switch (ap->pio_task_state) {
2519 case PIO_ST:
2520 case PIO_ST_POLL:
2521 poll_state = PIO_ST_POLL;
2522 reg_state = PIO_ST;
2523 break;
2524 case PIO_ST_LAST:
2525 case PIO_ST_LAST_POLL:
2526 poll_state = PIO_ST_LAST_POLL;
2527 reg_state = PIO_ST_LAST;
2528 break;
2529 default:
2530 BUG();
2531 break;
2532 }
2533
2534 status = ata_chk_status(ap);
2535 if (status & ATA_BUSY) {
2536 if (time_after(jiffies, ap->pio_task_timeout)) {
2537 ap->pio_task_state = tmout_state;
2538 return 0;
2539 }
2540 ap->pio_task_state = poll_state;
2541 return ATA_SHORT_PAUSE;
2542 }
2543
2544 ap->pio_task_state = reg_state;
2545 return 0;
2546 }
2547
2548 /**
2549 * ata_pio_complete -
2550 * @ap:
2551 *
2552 * LOCKING:
2553 * None. (executing in kernel thread context)
2554 *
2555 * RETURNS:
2556 * Non-zero if qc completed, zero otherwise.
2557 */
2558
2559 static int ata_pio_complete (struct ata_port *ap)
2560 {
2561 struct ata_queued_cmd *qc;
2562 u8 drv_stat;
2563
2564 /*
2565 * This is purely heuristic. This is a fast path. Sometimes when
2566 * we enter, BSY will be cleared in a chk-status or two. If not,
2567 * the drive is probably seeking or something. Snooze for a couple
2568 * msecs, then chk-status again. If still busy, fall back to
2569 * PIO_ST_POLL state.
2570 */
2571 drv_stat = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 10);
2572 if (drv_stat & (ATA_BUSY | ATA_DRQ)) {
2573 msleep(2);
2574 drv_stat = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 10);
2575 if (drv_stat & (ATA_BUSY | ATA_DRQ)) {
2576 ap->pio_task_state = PIO_ST_LAST_POLL;
2577 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
2578 return 0;
2579 }
2580 }
2581
2582 drv_stat = ata_wait_idle(ap);
2583 if (!ata_ok(drv_stat)) {
2584 ap->pio_task_state = PIO_ST_ERR;
2585 return 0;
2586 }
2587
2588 qc = ata_qc_from_tag(ap, ap->active_tag);
2589 assert(qc != NULL);
2590
2591 ap->pio_task_state = PIO_ST_IDLE;
2592
2593 ata_poll_qc_complete(qc, drv_stat);
2594
2595 /* another command may start at this point */
2596
2597 return 1;
2598 }
2599
2600
2601 /**
2602 * swap_buf_le16 -
2603 * @buf: Buffer to swap
2604 * @buf_words: Number of 16-bit words in buffer.
2605 *
2606 * Swap halves of 16-bit words if needed to convert from
2607 * little-endian byte order to native cpu byte order, or
2608 * vice-versa.
2609 *
2610 * LOCKING:
2611 */
2612 void swap_buf_le16(u16 *buf, unsigned int buf_words)
2613 {
2614 #ifdef __BIG_ENDIAN
2615 unsigned int i;
2616
2617 for (i = 0; i < buf_words; i++)
2618 buf[i] = le16_to_cpu(buf[i]);
2619 #endif /* __BIG_ENDIAN */
2620 }
2621
2622 /**
2623 * ata_mmio_data_xfer - Transfer data by MMIO
2624 * @ap: port to read/write
2625 * @buf: data buffer
2626 * @buflen: buffer length
2627 * @write_data: read/write
2628 *
2629 * Transfer data from/to the device data register by MMIO.
2630 *
2631 * LOCKING:
2632 * Inherited from caller.
2633 *
2634 */
2635
2636 static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
2637 unsigned int buflen, int write_data)
2638 {
2639 unsigned int i;
2640 unsigned int words = buflen >> 1;
2641 u16 *buf16 = (u16 *) buf;
2642 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
2643
2644 /* Transfer multiple of 2 bytes */
2645 if (write_data) {
2646 for (i = 0; i < words; i++)
2647 writew(le16_to_cpu(buf16[i]), mmio);
2648 } else {
2649 for (i = 0; i < words; i++)
2650 buf16[i] = cpu_to_le16(readw(mmio));
2651 }
2652
2653 /* Transfer trailing 1 byte, if any. */
2654 if (unlikely(buflen & 0x01)) {
2655 u16 align_buf[1] = { 0 };
2656 unsigned char *trailing_buf = buf + buflen - 1;
2657
2658 if (write_data) {
2659 memcpy(align_buf, trailing_buf, 1);
2660 writew(le16_to_cpu(align_buf[0]), mmio);
2661 } else {
2662 align_buf[0] = cpu_to_le16(readw(mmio));
2663 memcpy(trailing_buf, align_buf, 1);
2664 }
2665 }
2666 }
2667
2668 /**
2669 * ata_pio_data_xfer - Transfer data by PIO
2670 * @ap: port to read/write
2671 * @buf: data buffer
2672 * @buflen: buffer length
2673 * @write_data: read/write
2674 *
2675 * Transfer data from/to the device data register by PIO.
2676 *
2677 * LOCKING:
2678 * Inherited from caller.
2679 *
2680 */
2681
2682 static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
2683 unsigned int buflen, int write_data)
2684 {
2685 unsigned int words = buflen >> 1;
2686
2687 /* Transfer multiple of 2 bytes */
2688 if (write_data)
2689 outsw(ap->ioaddr.data_addr, buf, words);
2690 else
2691 insw(ap->ioaddr.data_addr, buf, words);
2692
2693 /* Transfer trailing 1 byte, if any. */
2694 if (unlikely(buflen & 0x01)) {
2695 u16 align_buf[1] = { 0 };
2696 unsigned char *trailing_buf = buf + buflen - 1;
2697
2698 if (write_data) {
2699 memcpy(align_buf, trailing_buf, 1);
2700 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
2701 } else {
2702 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
2703 memcpy(trailing_buf, align_buf, 1);
2704 }
2705 }
2706 }
2707
2708 /**
2709 * ata_data_xfer - Transfer data from/to the data register.
2710 * @ap: port to read/write
2711 * @buf: data buffer
2712 * @buflen: buffer length
2713 * @do_write: read/write
2714 *
2715 * Transfer data from/to the device data register.
2716 *
2717 * LOCKING:
2718 * Inherited from caller.
2719 *
2720 */
2721
2722 static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
2723 unsigned int buflen, int do_write)
2724 {
2725 if (ap->flags & ATA_FLAG_MMIO)
2726 ata_mmio_data_xfer(ap, buf, buflen, do_write);
2727 else
2728 ata_pio_data_xfer(ap, buf, buflen, do_write);
2729 }
2730
2731 /**
2732 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
2733 * @qc: Command on going
2734 *
2735 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
2736 *
2737 * LOCKING:
2738 * Inherited from caller.
2739 */
2740
2741 static void ata_pio_sector(struct ata_queued_cmd *qc)
2742 {
2743 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
2744 struct scatterlist *sg = qc->sg;
2745 struct ata_port *ap = qc->ap;
2746 struct page *page;
2747 unsigned int offset;
2748 unsigned char *buf;
2749
2750 if (qc->cursect == (qc->nsect - 1))
2751 ap->pio_task_state = PIO_ST_LAST;
2752
2753 page = sg[qc->cursg].page;
2754 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
2755
2756 /* get the current page and offset */
2757 page = nth_page(page, (offset >> PAGE_SHIFT));
2758 offset %= PAGE_SIZE;
2759
2760 buf = kmap(page) + offset;
2761
2762 qc->cursect++;
2763 qc->cursg_ofs++;
2764
2765 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
2766 qc->cursg++;
2767 qc->cursg_ofs = 0;
2768 }
2769
2770 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
2771
2772 /* do the actual data transfer */
2773 do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
2774 ata_data_xfer(ap, buf, ATA_SECT_SIZE, do_write);
2775
2776 kunmap(page);
2777 }
2778
2779 /**
2780 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
2781 * @qc: Command on going
2782 * @bytes: number of bytes
2783 *
2784 * Transfer Transfer data from/to the ATAPI device.
2785 *
2786 * LOCKING:
2787 * Inherited from caller.
2788 *
2789 */
2790
2791 static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
2792 {
2793 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
2794 struct scatterlist *sg = qc->sg;
2795 struct ata_port *ap = qc->ap;
2796 struct page *page;
2797 unsigned char *buf;
2798 unsigned int offset, count;
2799
2800 if (qc->curbytes + bytes >= qc->nbytes)
2801 ap->pio_task_state = PIO_ST_LAST;
2802
2803 next_sg:
2804 if (unlikely(qc->cursg >= qc->n_elem)) {
2805 /*
2806 * The end of qc->sg is reached and the device expects
2807 * more data to transfer. In order not to overrun qc->sg
2808 * and fulfill length specified in the byte count register,
2809 * - for read case, discard trailing data from the device
2810 * - for write case, padding zero data to the device
2811 */
2812 u16 pad_buf[1] = { 0 };
2813 unsigned int words = bytes >> 1;
2814 unsigned int i;
2815
2816 if (words) /* warning if bytes > 1 */
2817 printk(KERN_WARNING "ata%u: %u bytes trailing data\n",
2818 ap->id, bytes);
2819
2820 for (i = 0; i < words; i++)
2821 ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write);
2822
2823 ap->pio_task_state = PIO_ST_LAST;
2824 return;
2825 }
2826
2827 sg = &qc->sg[qc->cursg];
2828
2829 page = sg->page;
2830 offset = sg->offset + qc->cursg_ofs;
2831
2832 /* get the current page and offset */
2833 page = nth_page(page, (offset >> PAGE_SHIFT));
2834 offset %= PAGE_SIZE;
2835
2836 /* don't overrun current sg */
2837 count = min(sg->length - qc->cursg_ofs, bytes);
2838
2839 /* don't cross page boundaries */
2840 count = min(count, (unsigned int)PAGE_SIZE - offset);
2841
2842 buf = kmap(page) + offset;
2843
2844 bytes -= count;
2845 qc->curbytes += count;
2846 qc->cursg_ofs += count;
2847
2848 if (qc->cursg_ofs == sg->length) {
2849 qc->cursg++;
2850 qc->cursg_ofs = 0;
2851 }
2852
2853 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
2854
2855 /* do the actual data transfer */
2856 ata_data_xfer(ap, buf, count, do_write);
2857
2858 kunmap(page);
2859
2860 if (bytes)
2861 goto next_sg;
2862 }
2863
2864 /**
2865 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
2866 * @qc: Command on going
2867 *
2868 * Transfer Transfer data from/to the ATAPI device.
2869 *
2870 * LOCKING:
2871 * Inherited from caller.
2872 *
2873 */
2874
2875 static void atapi_pio_bytes(struct ata_queued_cmd *qc)
2876 {
2877 struct ata_port *ap = qc->ap;
2878 struct ata_device *dev = qc->dev;
2879 unsigned int ireason, bc_lo, bc_hi, bytes;
2880 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
2881
2882 ap->ops->tf_read(ap, &qc->tf);
2883 ireason = qc->tf.nsect;
2884 bc_lo = qc->tf.lbam;
2885 bc_hi = qc->tf.lbah;
2886 bytes = (bc_hi << 8) | bc_lo;
2887
2888 /* shall be cleared to zero, indicating xfer of data */
2889 if (ireason & (1 << 0))
2890 goto err_out;
2891
2892 /* make sure transfer direction matches expected */
2893 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
2894 if (do_write != i_write)
2895 goto err_out;
2896
2897 __atapi_pio_bytes(qc, bytes);
2898
2899 return;
2900
2901 err_out:
2902 printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n",
2903 ap->id, dev->devno);
2904 ap->pio_task_state = PIO_ST_ERR;
2905 }
2906
2907 /**
2908 * ata_pio_sector -
2909 * @ap:
2910 *
2911 * LOCKING:
2912 * None. (executing in kernel thread context)
2913 */
2914
2915 static void ata_pio_block(struct ata_port *ap)
2916 {
2917 struct ata_queued_cmd *qc;
2918 u8 status;
2919
2920 /*
2921 * This is purely hueristic. This is a fast path.
2922 * Sometimes when we enter, BSY will be cleared in
2923 * a chk-status or two. If not, the drive is probably seeking
2924 * or something. Snooze for a couple msecs, then
2925 * chk-status again. If still busy, fall back to
2926 * PIO_ST_POLL state.
2927 */
2928 status = ata_busy_wait(ap, ATA_BUSY, 5);
2929 if (status & ATA_BUSY) {
2930 msleep(2);
2931 status = ata_busy_wait(ap, ATA_BUSY, 10);
2932 if (status & ATA_BUSY) {
2933 ap->pio_task_state = PIO_ST_POLL;
2934 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
2935 return;
2936 }
2937 }
2938
2939 qc = ata_qc_from_tag(ap, ap->active_tag);
2940 assert(qc != NULL);
2941
2942 if (is_atapi_taskfile(&qc->tf)) {
2943 /* no more data to transfer or unsupported ATAPI command */
2944 if ((status & ATA_DRQ) == 0) {
2945 ap->pio_task_state = PIO_ST_LAST;
2946 return;
2947 }
2948
2949 atapi_pio_bytes(qc);
2950 } else {
2951 /* handle BSY=0, DRQ=0 as error */
2952 if ((status & ATA_DRQ) == 0) {
2953 ap->pio_task_state = PIO_ST_ERR;
2954 return;
2955 }
2956
2957 ata_pio_sector(qc);
2958 }
2959 }
2960
2961 static void ata_pio_error(struct ata_port *ap)
2962 {
2963 struct ata_queued_cmd *qc;
2964 u8 drv_stat;
2965
2966 qc = ata_qc_from_tag(ap, ap->active_tag);
2967 assert(qc != NULL);
2968
2969 drv_stat = ata_chk_status(ap);
2970 printk(KERN_WARNING "ata%u: PIO error, drv_stat 0x%x\n",
2971 ap->id, drv_stat);
2972
2973 ap->pio_task_state = PIO_ST_IDLE;
2974
2975 ata_poll_qc_complete(qc, drv_stat | ATA_ERR);
2976 }
2977
2978 static void ata_pio_task(void *_data)
2979 {
2980 struct ata_port *ap = _data;
2981 unsigned long timeout;
2982 int qc_completed;
2983
2984 fsm_start:
2985 timeout = 0;
2986 qc_completed = 0;
2987
2988 switch (ap->pio_task_state) {
2989 case PIO_ST_IDLE:
2990 return;
2991
2992 case PIO_ST:
2993 ata_pio_block(ap);
2994 break;
2995
2996 case PIO_ST_LAST:
2997 qc_completed = ata_pio_complete(ap);
2998 break;
2999
3000 case PIO_ST_POLL:
3001 case PIO_ST_LAST_POLL:
3002 timeout = ata_pio_poll(ap);
3003 break;
3004
3005 case PIO_ST_TMOUT:
3006 case PIO_ST_ERR:
3007 ata_pio_error(ap);
3008 return;
3009 }
3010
3011 if (timeout)
3012 queue_delayed_work(ata_wq, &ap->pio_task, timeout);
3013 else if (!qc_completed)
3014 goto fsm_start;
3015 }
3016
3017 static void atapi_request_sense(struct ata_port *ap, struct ata_device *dev,
3018 struct scsi_cmnd *cmd)
3019 {
3020 DECLARE_COMPLETION(wait);
3021 struct ata_queued_cmd *qc;
3022 unsigned long flags;
3023 int rc;
3024
3025 DPRINTK("ATAPI request sense\n");
3026
3027 qc = ata_qc_new_init(ap, dev);
3028 BUG_ON(qc == NULL);
3029
3030 /* FIXME: is this needed? */
3031 memset(cmd->sense_buffer, 0, sizeof(cmd->sense_buffer));
3032
3033 ata_sg_init_one(qc, cmd->sense_buffer, sizeof(cmd->sense_buffer));
3034 qc->dma_dir = DMA_FROM_DEVICE;
3035
3036 memset(&qc->cdb, 0, ap->cdb_len);
3037 qc->cdb[0] = REQUEST_SENSE;
3038 qc->cdb[4] = SCSI_SENSE_BUFFERSIZE;
3039
3040 qc->tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
3041 qc->tf.command = ATA_CMD_PACKET;
3042
3043 qc->tf.protocol = ATA_PROT_ATAPI;
3044 qc->tf.lbam = (8 * 1024) & 0xff;
3045 qc->tf.lbah = (8 * 1024) >> 8;
3046 qc->nbytes = SCSI_SENSE_BUFFERSIZE;
3047
3048 qc->waiting = &wait;
3049 qc->complete_fn = ata_qc_complete_noop;
3050
3051 spin_lock_irqsave(&ap->host_set->lock, flags);
3052 rc = ata_qc_issue(qc);
3053 spin_unlock_irqrestore(&ap->host_set->lock, flags);
3054
3055 if (rc)
3056 ata_port_disable(ap);
3057 else
3058 wait_for_completion(&wait);
3059
3060 DPRINTK("EXIT\n");
3061 }
3062
3063 /**
3064 * ata_qc_timeout - Handle timeout of queued command
3065 * @qc: Command that timed out
3066 *
3067 * Some part of the kernel (currently, only the SCSI layer)
3068 * has noticed that the active command on port @ap has not
3069 * completed after a specified length of time. Handle this
3070 * condition by disabling DMA (if necessary) and completing
3071 * transactions, with error if necessary.
3072 *
3073 * This also handles the case of the "lost interrupt", where
3074 * for some reason (possibly hardware bug, possibly driver bug)
3075 * an interrupt was not delivered to the driver, even though the
3076 * transaction completed successfully.
3077 *
3078 * LOCKING:
3079 * Inherited from SCSI layer (none, can sleep)
3080 */
3081
3082 static void ata_qc_timeout(struct ata_queued_cmd *qc)
3083 {
3084 struct ata_port *ap = qc->ap;
3085 struct ata_host_set *host_set = ap->host_set;
3086 struct ata_device *dev = qc->dev;
3087 u8 host_stat = 0, drv_stat;
3088 unsigned long flags;
3089
3090 DPRINTK("ENTER\n");
3091
3092 /* FIXME: doesn't this conflict with timeout handling? */
3093 if (qc->dev->class == ATA_DEV_ATAPI && qc->scsicmd) {
3094 struct scsi_cmnd *cmd = qc->scsicmd;
3095
3096 if (!(cmd->eh_eflags & SCSI_EH_CANCEL_CMD)) {
3097
3098 /* finish completing original command */
3099 spin_lock_irqsave(&host_set->lock, flags);
3100 __ata_qc_complete(qc);
3101 spin_unlock_irqrestore(&host_set->lock, flags);
3102
3103 atapi_request_sense(ap, dev, cmd);
3104
3105 cmd->result = (CHECK_CONDITION << 1) | (DID_OK << 16);
3106 scsi_finish_command(cmd);
3107
3108 goto out;
3109 }
3110 }
3111
3112 spin_lock_irqsave(&host_set->lock, flags);
3113
3114 /* hack alert! We cannot use the supplied completion
3115 * function from inside the ->eh_strategy_handler() thread.
3116 * libata is the only user of ->eh_strategy_handler() in
3117 * any kernel, so the default scsi_done() assumes it is
3118 * not being called from the SCSI EH.
3119 */
3120 qc->scsidone = scsi_finish_command;
3121
3122 switch (qc->tf.protocol) {
3123
3124 case ATA_PROT_DMA:
3125 case ATA_PROT_ATAPI_DMA:
3126 host_stat = ap->ops->bmdma_status(ap);
3127
3128 /* before we do anything else, clear DMA-Start bit */
3129 ap->ops->bmdma_stop(qc);
3130
3131 /* fall through */
3132
3133 default:
3134 ata_altstatus(ap);
3135 drv_stat = ata_chk_status(ap);
3136
3137 /* ack bmdma irq events */
3138 ap->ops->irq_clear(ap);
3139
3140 printk(KERN_ERR "ata%u: command 0x%x timeout, stat 0x%x host_stat 0x%x\n",
3141 ap->id, qc->tf.command, drv_stat, host_stat);
3142
3143 /* complete taskfile transaction */
3144 ata_qc_complete(qc, drv_stat);
3145 break;
3146 }
3147
3148 spin_unlock_irqrestore(&host_set->lock, flags);
3149
3150 out:
3151 DPRINTK("EXIT\n");
3152 }
3153
3154 /**
3155 * ata_eng_timeout - Handle timeout of queued command
3156 * @ap: Port on which timed-out command is active
3157 *
3158 * Some part of the kernel (currently, only the SCSI layer)
3159 * has noticed that the active command on port @ap has not
3160 * completed after a specified length of time. Handle this
3161 * condition by disabling DMA (if necessary) and completing
3162 * transactions, with error if necessary.
3163 *
3164 * This also handles the case of the "lost interrupt", where
3165 * for some reason (possibly hardware bug, possibly driver bug)
3166 * an interrupt was not delivered to the driver, even though the
3167 * transaction completed successfully.
3168 *
3169 * LOCKING:
3170 * Inherited from SCSI layer (none, can sleep)
3171 */
3172
3173 void ata_eng_timeout(struct ata_port *ap)
3174 {
3175 struct ata_queued_cmd *qc;
3176
3177 DPRINTK("ENTER\n");
3178
3179 qc = ata_qc_from_tag(ap, ap->active_tag);
3180 if (!qc) {
3181 printk(KERN_ERR "ata%u: BUG: timeout without command\n",
3182 ap->id);
3183 goto out;
3184 }
3185
3186 ata_qc_timeout(qc);
3187
3188 out:
3189 DPRINTK("EXIT\n");
3190 }
3191
3192 /**
3193 * ata_qc_new - Request an available ATA command, for queueing
3194 * @ap: Port associated with device @dev
3195 * @dev: Device from whom we request an available command structure
3196 *
3197 * LOCKING:
3198 * None.
3199 */
3200
3201 static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
3202 {
3203 struct ata_queued_cmd *qc = NULL;
3204 unsigned int i;
3205
3206 for (i = 0; i < ATA_MAX_QUEUE; i++)
3207 if (!test_and_set_bit(i, &ap->qactive)) {
3208 qc = ata_qc_from_tag(ap, i);
3209 break;
3210 }
3211
3212 if (qc)
3213 qc->tag = i;
3214
3215 return qc;
3216 }
3217
3218 /**
3219 * ata_qc_new_init - Request an available ATA command, and initialize it
3220 * @ap: Port associated with device @dev
3221 * @dev: Device from whom we request an available command structure
3222 *
3223 * LOCKING:
3224 * None.
3225 */
3226
3227 struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap,
3228 struct ata_device *dev)
3229 {
3230 struct ata_queued_cmd *qc;
3231
3232 qc = ata_qc_new(ap);
3233 if (qc) {
3234 qc->sg = NULL;
3235 qc->flags = 0;
3236 qc->scsicmd = NULL;
3237 qc->ap = ap;
3238 qc->dev = dev;
3239 qc->cursect = qc->cursg = qc->cursg_ofs = 0;
3240 qc->nsect = 0;
3241 qc->nbytes = qc->curbytes = 0;
3242
3243 ata_tf_init(ap, &qc->tf, dev->devno);
3244
3245 if (dev->flags & ATA_DFLAG_LBA) {
3246 qc->tf.flags |= ATA_TFLAG_LBA;
3247
3248 if (dev->flags & ATA_DFLAG_LBA48)
3249 qc->tf.flags |= ATA_TFLAG_LBA48;
3250 }
3251 }
3252
3253 return qc;
3254 }
3255
3256 static int ata_qc_complete_noop(struct ata_queued_cmd *qc, u8 drv_stat)
3257 {
3258 return 0;
3259 }
3260
3261 static void __ata_qc_complete(struct ata_queued_cmd *qc)
3262 {
3263 struct ata_port *ap = qc->ap;
3264 unsigned int tag, do_clear = 0;
3265
3266 qc->flags = 0;
3267 tag = qc->tag;
3268 if (likely(ata_tag_valid(tag))) {
3269 if (tag == ap->active_tag)
3270 ap->active_tag = ATA_TAG_POISON;
3271 qc->tag = ATA_TAG_POISON;
3272 do_clear = 1;
3273 }
3274
3275 if (qc->waiting) {
3276 struct completion *waiting = qc->waiting;
3277 qc->waiting = NULL;
3278 complete(waiting);
3279 }
3280
3281 if (likely(do_clear))
3282 clear_bit(tag, &ap->qactive);
3283 }
3284
3285 /**
3286 * ata_qc_free - free unused ata_queued_cmd
3287 * @qc: Command to complete
3288 *
3289 * Designed to free unused ata_queued_cmd object
3290 * in case something prevents using it.
3291 *
3292 * LOCKING:
3293 * spin_lock_irqsave(host_set lock)
3294 *
3295 */
3296 void ata_qc_free(struct ata_queued_cmd *qc)
3297 {
3298 assert(qc != NULL); /* ata_qc_from_tag _might_ return NULL */
3299 assert(qc->waiting == NULL); /* nothing should be waiting */
3300
3301 __ata_qc_complete(qc);
3302 }
3303
3304 /**
3305 * ata_qc_complete - Complete an active ATA command
3306 * @qc: Command to complete
3307 * @drv_stat: ATA Status register contents
3308 *
3309 * Indicate to the mid and upper layers that an ATA
3310 * command has completed, with either an ok or not-ok status.
3311 *
3312 * LOCKING:
3313 * spin_lock_irqsave(host_set lock)
3314 *
3315 */
3316
3317 void ata_qc_complete(struct ata_queued_cmd *qc, u8 drv_stat)
3318 {
3319 int rc;
3320
3321 assert(qc != NULL); /* ata_qc_from_tag _might_ return NULL */
3322 assert(qc->flags & ATA_QCFLAG_ACTIVE);
3323
3324 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
3325 ata_sg_clean(qc);
3326
3327 /* atapi: mark qc as inactive to prevent the interrupt handler
3328 * from completing the command twice later, before the error handler
3329 * is called. (when rc != 0 and atapi request sense is needed)
3330 */
3331 qc->flags &= ~ATA_QCFLAG_ACTIVE;
3332
3333 /* call completion callback */
3334 rc = qc->complete_fn(qc, drv_stat);
3335
3336 /* if callback indicates not to complete command (non-zero),
3337 * return immediately
3338 */
3339 if (rc != 0)
3340 return;
3341
3342 __ata_qc_complete(qc);
3343
3344 VPRINTK("EXIT\n");
3345 }
3346
3347 static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
3348 {
3349 struct ata_port *ap = qc->ap;
3350
3351 switch (qc->tf.protocol) {
3352 case ATA_PROT_DMA:
3353 case ATA_PROT_ATAPI_DMA:
3354 return 1;
3355
3356 case ATA_PROT_ATAPI:
3357 case ATA_PROT_PIO:
3358 case ATA_PROT_PIO_MULT:
3359 if (ap->flags & ATA_FLAG_PIO_DMA)
3360 return 1;
3361
3362 /* fall through */
3363
3364 default:
3365 return 0;
3366 }
3367
3368 /* never reached */
3369 }
3370
3371 /**
3372 * ata_qc_issue - issue taskfile to device
3373 * @qc: command to issue to device
3374 *
3375 * Prepare an ATA command to submission to device.
3376 * This includes mapping the data into a DMA-able
3377 * area, filling in the S/G table, and finally
3378 * writing the taskfile to hardware, starting the command.
3379 *
3380 * LOCKING:
3381 * spin_lock_irqsave(host_set lock)
3382 *
3383 * RETURNS:
3384 * Zero on success, negative on error.
3385 */
3386
3387 int ata_qc_issue(struct ata_queued_cmd *qc)
3388 {
3389 struct ata_port *ap = qc->ap;
3390
3391 if (ata_should_dma_map(qc)) {
3392 if (qc->flags & ATA_QCFLAG_SG) {
3393 if (ata_sg_setup(qc))
3394 goto err_out;
3395 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
3396 if (ata_sg_setup_one(qc))
3397 goto err_out;
3398 }
3399 } else {
3400 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3401 }
3402
3403 ap->ops->qc_prep(qc);
3404
3405 qc->ap->active_tag = qc->tag;
3406 qc->flags |= ATA_QCFLAG_ACTIVE;
3407
3408 return ap->ops->qc_issue(qc);
3409
3410 err_out:
3411 return -1;
3412 }
3413
3414
3415 /**
3416 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
3417 * @qc: command to issue to device
3418 *
3419 * Using various libata functions and hooks, this function
3420 * starts an ATA command. ATA commands are grouped into
3421 * classes called "protocols", and issuing each type of protocol
3422 * is slightly different.
3423 *
3424 * May be used as the qc_issue() entry in ata_port_operations.
3425 *
3426 * LOCKING:
3427 * spin_lock_irqsave(host_set lock)
3428 *
3429 * RETURNS:
3430 * Zero on success, negative on error.
3431 */
3432
3433 int ata_qc_issue_prot(struct ata_queued_cmd *qc)
3434 {
3435 struct ata_port *ap = qc->ap;
3436
3437 ata_dev_select(ap, qc->dev->devno, 1, 0);
3438
3439 switch (qc->tf.protocol) {
3440 case ATA_PROT_NODATA:
3441 ata_tf_to_host_nolock(ap, &qc->tf);
3442 break;
3443
3444 case ATA_PROT_DMA:
3445 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
3446 ap->ops->bmdma_setup(qc); /* set up bmdma */
3447 ap->ops->bmdma_start(qc); /* initiate bmdma */
3448 break;
3449
3450 case ATA_PROT_PIO: /* load tf registers, initiate polling pio */
3451 ata_qc_set_polling(qc);
3452 ata_tf_to_host_nolock(ap, &qc->tf);
3453 ap->pio_task_state = PIO_ST;
3454 queue_work(ata_wq, &ap->pio_task);
3455 break;
3456
3457 case ATA_PROT_ATAPI:
3458 ata_qc_set_polling(qc);
3459 ata_tf_to_host_nolock(ap, &qc->tf);
3460 queue_work(ata_wq, &ap->packet_task);
3461 break;
3462
3463 case ATA_PROT_ATAPI_NODATA:
3464 ap->flags |= ATA_FLAG_NOINTR;
3465 ata_tf_to_host_nolock(ap, &qc->tf);
3466 queue_work(ata_wq, &ap->packet_task);
3467 break;
3468
3469 case ATA_PROT_ATAPI_DMA:
3470 ap->flags |= ATA_FLAG_NOINTR;
3471 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
3472 ap->ops->bmdma_setup(qc); /* set up bmdma */
3473 queue_work(ata_wq, &ap->packet_task);
3474 break;
3475
3476 default:
3477 WARN_ON(1);
3478 return -1;
3479 }
3480
3481 return 0;
3482 }
3483
3484 /**
3485 * ata_bmdma_setup_mmio - Set up PCI IDE BMDMA transaction
3486 * @qc: Info associated with this ATA transaction.
3487 *
3488 * LOCKING:
3489 * spin_lock_irqsave(host_set lock)
3490 */
3491
3492 static void ata_bmdma_setup_mmio (struct ata_queued_cmd *qc)
3493 {
3494 struct ata_port *ap = qc->ap;
3495 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
3496 u8 dmactl;
3497 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3498
3499 /* load PRD table addr. */
3500 mb(); /* make sure PRD table writes are visible to controller */
3501 writel(ap->prd_dma, mmio + ATA_DMA_TABLE_OFS);
3502
3503 /* specify data direction, triple-check start bit is clear */
3504 dmactl = readb(mmio + ATA_DMA_CMD);
3505 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
3506 if (!rw)
3507 dmactl |= ATA_DMA_WR;
3508 writeb(dmactl, mmio + ATA_DMA_CMD);
3509
3510 /* issue r/w command */
3511 ap->ops->exec_command(ap, &qc->tf);
3512 }
3513
3514 /**
3515 * ata_bmdma_start_mmio - Start a PCI IDE BMDMA transaction
3516 * @qc: Info associated with this ATA transaction.
3517 *
3518 * LOCKING:
3519 * spin_lock_irqsave(host_set lock)
3520 */
3521
3522 static void ata_bmdma_start_mmio (struct ata_queued_cmd *qc)
3523 {
3524 struct ata_port *ap = qc->ap;
3525 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3526 u8 dmactl;
3527
3528 /* start host DMA transaction */
3529 dmactl = readb(mmio + ATA_DMA_CMD);
3530 writeb(dmactl | ATA_DMA_START, mmio + ATA_DMA_CMD);
3531
3532 /* Strictly, one may wish to issue a readb() here, to
3533 * flush the mmio write. However, control also passes
3534 * to the hardware at this point, and it will interrupt
3535 * us when we are to resume control. So, in effect,
3536 * we don't care when the mmio write flushes.
3537 * Further, a read of the DMA status register _immediately_
3538 * following the write may not be what certain flaky hardware
3539 * is expected, so I think it is best to not add a readb()
3540 * without first all the MMIO ATA cards/mobos.
3541 * Or maybe I'm just being paranoid.
3542 */
3543 }
3544
3545 /**
3546 * ata_bmdma_setup_pio - Set up PCI IDE BMDMA transaction (PIO)
3547 * @qc: Info associated with this ATA transaction.
3548 *
3549 * LOCKING:
3550 * spin_lock_irqsave(host_set lock)
3551 */
3552
3553 static void ata_bmdma_setup_pio (struct ata_queued_cmd *qc)
3554 {
3555 struct ata_port *ap = qc->ap;
3556 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
3557 u8 dmactl;
3558
3559 /* load PRD table addr. */
3560 outl(ap->prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS);
3561
3562 /* specify data direction, triple-check start bit is clear */
3563 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3564 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
3565 if (!rw)
3566 dmactl |= ATA_DMA_WR;
3567 outb(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3568
3569 /* issue r/w command */
3570 ap->ops->exec_command(ap, &qc->tf);
3571 }
3572
3573 /**
3574 * ata_bmdma_start_pio - Start a PCI IDE BMDMA transaction (PIO)
3575 * @qc: Info associated with this ATA transaction.
3576 *
3577 * LOCKING:
3578 * spin_lock_irqsave(host_set lock)
3579 */
3580
3581 static void ata_bmdma_start_pio (struct ata_queued_cmd *qc)
3582 {
3583 struct ata_port *ap = qc->ap;
3584 u8 dmactl;
3585
3586 /* start host DMA transaction */
3587 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3588 outb(dmactl | ATA_DMA_START,
3589 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3590 }
3591
3592
3593 /**
3594 * ata_bmdma_start - Start a PCI IDE BMDMA transaction
3595 * @qc: Info associated with this ATA transaction.
3596 *
3597 * Writes the ATA_DMA_START flag to the DMA command register.
3598 *
3599 * May be used as the bmdma_start() entry in ata_port_operations.
3600 *
3601 * LOCKING:
3602 * spin_lock_irqsave(host_set lock)
3603 */
3604 void ata_bmdma_start(struct ata_queued_cmd *qc)
3605 {
3606 if (qc->ap->flags & ATA_FLAG_MMIO)
3607 ata_bmdma_start_mmio(qc);
3608 else
3609 ata_bmdma_start_pio(qc);
3610 }
3611
3612
3613 /**
3614 * ata_bmdma_setup - Set up PCI IDE BMDMA transaction
3615 * @qc: Info associated with this ATA transaction.
3616 *
3617 * Writes address of PRD table to device's PRD Table Address
3618 * register, sets the DMA control register, and calls
3619 * ops->exec_command() to start the transfer.
3620 *
3621 * May be used as the bmdma_setup() entry in ata_port_operations.
3622 *
3623 * LOCKING:
3624 * spin_lock_irqsave(host_set lock)
3625 */
3626 void ata_bmdma_setup(struct ata_queued_cmd *qc)
3627 {
3628 if (qc->ap->flags & ATA_FLAG_MMIO)
3629 ata_bmdma_setup_mmio(qc);
3630 else
3631 ata_bmdma_setup_pio(qc);
3632 }
3633
3634
3635 /**
3636 * ata_bmdma_irq_clear - Clear PCI IDE BMDMA interrupt.
3637 * @ap: Port associated with this ATA transaction.
3638 *
3639 * Clear interrupt and error flags in DMA status register.
3640 *
3641 * May be used as the irq_clear() entry in ata_port_operations.
3642 *
3643 * LOCKING:
3644 * spin_lock_irqsave(host_set lock)
3645 */
3646
3647 void ata_bmdma_irq_clear(struct ata_port *ap)
3648 {
3649 if (ap->flags & ATA_FLAG_MMIO) {
3650 void __iomem *mmio = ((void __iomem *) ap->ioaddr.bmdma_addr) + ATA_DMA_STATUS;
3651 writeb(readb(mmio), mmio);
3652 } else {
3653 unsigned long addr = ap->ioaddr.bmdma_addr + ATA_DMA_STATUS;
3654 outb(inb(addr), addr);
3655 }
3656
3657 }
3658
3659
3660 /**
3661 * ata_bmdma_status - Read PCI IDE BMDMA status
3662 * @ap: Port associated with this ATA transaction.
3663 *
3664 * Read and return BMDMA status register.
3665 *
3666 * May be used as the bmdma_status() entry in ata_port_operations.
3667 *
3668 * LOCKING:
3669 * spin_lock_irqsave(host_set lock)
3670 */
3671
3672 u8 ata_bmdma_status(struct ata_port *ap)
3673 {
3674 u8 host_stat;
3675 if (ap->flags & ATA_FLAG_MMIO) {
3676 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3677 host_stat = readb(mmio + ATA_DMA_STATUS);
3678 } else
3679 host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
3680 return host_stat;
3681 }
3682
3683
3684 /**
3685 * ata_bmdma_stop - Stop PCI IDE BMDMA transfer
3686 * @qc: Command we are ending DMA for
3687 *
3688 * Clears the ATA_DMA_START flag in the dma control register
3689 *
3690 * May be used as the bmdma_stop() entry in ata_port_operations.
3691 *
3692 * LOCKING:
3693 * spin_lock_irqsave(host_set lock)
3694 */
3695
3696 void ata_bmdma_stop(struct ata_queued_cmd *qc)
3697 {
3698 struct ata_port *ap = qc->ap;
3699 if (ap->flags & ATA_FLAG_MMIO) {
3700 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3701
3702 /* clear start/stop bit */
3703 writeb(readb(mmio + ATA_DMA_CMD) & ~ATA_DMA_START,
3704 mmio + ATA_DMA_CMD);
3705 } else {
3706 /* clear start/stop bit */
3707 outb(inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD) & ~ATA_DMA_START,
3708 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3709 }
3710
3711 /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
3712 ata_altstatus(ap); /* dummy read */
3713 }
3714
3715 /**
3716 * ata_host_intr - Handle host interrupt for given (port, task)
3717 * @ap: Port on which interrupt arrived (possibly...)
3718 * @qc: Taskfile currently active in engine
3719 *
3720 * Handle host interrupt for given queued command. Currently,
3721 * only DMA interrupts are handled. All other commands are
3722 * handled via polling with interrupts disabled (nIEN bit).
3723 *
3724 * LOCKING:
3725 * spin_lock_irqsave(host_set lock)
3726 *
3727 * RETURNS:
3728 * One if interrupt was handled, zero if not (shared irq).
3729 */
3730
3731 inline unsigned int ata_host_intr (struct ata_port *ap,
3732 struct ata_queued_cmd *qc)
3733 {
3734 u8 status, host_stat;
3735
3736 switch (qc->tf.protocol) {
3737
3738 case ATA_PROT_DMA:
3739 case ATA_PROT_ATAPI_DMA:
3740 case ATA_PROT_ATAPI:
3741 /* check status of DMA engine */
3742 host_stat = ap->ops->bmdma_status(ap);
3743 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
3744
3745 /* if it's not our irq... */
3746 if (!(host_stat & ATA_DMA_INTR))
3747 goto idle_irq;
3748
3749 /* before we do anything else, clear DMA-Start bit */
3750 ap->ops->bmdma_stop(qc);
3751
3752 /* fall through */
3753
3754 case ATA_PROT_ATAPI_NODATA:
3755 case ATA_PROT_NODATA:
3756 /* check altstatus */
3757 status = ata_altstatus(ap);
3758 if (status & ATA_BUSY)
3759 goto idle_irq;
3760
3761 /* check main status, clearing INTRQ */
3762 status = ata_chk_status(ap);
3763 if (unlikely(status & ATA_BUSY))
3764 goto idle_irq;
3765 DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n",
3766 ap->id, qc->tf.protocol, status);
3767
3768 /* ack bmdma irq events */
3769 ap->ops->irq_clear(ap);
3770
3771 /* complete taskfile transaction */
3772 ata_qc_complete(qc, status);
3773 break;
3774
3775 default:
3776 goto idle_irq;
3777 }
3778
3779 return 1; /* irq handled */
3780
3781 idle_irq:
3782 ap->stats.idle_irq++;
3783
3784 #ifdef ATA_IRQ_TRAP
3785 if ((ap->stats.idle_irq % 1000) == 0) {
3786 handled = 1;
3787 ata_irq_ack(ap, 0); /* debug trap */
3788 printk(KERN_WARNING "ata%d: irq trap\n", ap->id);
3789 }
3790 #endif
3791 return 0; /* irq not handled */
3792 }
3793
3794 /**
3795 * ata_interrupt - Default ATA host interrupt handler
3796 * @irq: irq line (unused)
3797 * @dev_instance: pointer to our ata_host_set information structure
3798 * @regs: unused
3799 *
3800 * Default interrupt handler for PCI IDE devices. Calls
3801 * ata_host_intr() for each port that is not disabled.
3802 *
3803 * LOCKING:
3804 * Obtains host_set lock during operation.
3805 *
3806 * RETURNS:
3807 * IRQ_NONE or IRQ_HANDLED.
3808 *
3809 */
3810
3811 irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
3812 {
3813 struct ata_host_set *host_set = dev_instance;
3814 unsigned int i;
3815 unsigned int handled = 0;
3816 unsigned long flags;
3817
3818 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
3819 spin_lock_irqsave(&host_set->lock, flags);
3820
3821 for (i = 0; i < host_set->n_ports; i++) {
3822 struct ata_port *ap;
3823
3824 ap = host_set->ports[i];
3825 if (ap &&
3826 !(ap->flags & (ATA_FLAG_PORT_DISABLED | ATA_FLAG_NOINTR))) {
3827 struct ata_queued_cmd *qc;
3828
3829 qc = ata_qc_from_tag(ap, ap->active_tag);
3830 if (qc && (!(qc->tf.ctl & ATA_NIEN)) &&
3831 (qc->flags & ATA_QCFLAG_ACTIVE))
3832 handled |= ata_host_intr(ap, qc);
3833 }
3834 }
3835
3836 spin_unlock_irqrestore(&host_set->lock, flags);
3837
3838 return IRQ_RETVAL(handled);
3839 }
3840
3841 /**
3842 * atapi_packet_task - Write CDB bytes to hardware
3843 * @_data: Port to which ATAPI device is attached.
3844 *
3845 * When device has indicated its readiness to accept
3846 * a CDB, this function is called. Send the CDB.
3847 * If DMA is to be performed, exit immediately.
3848 * Otherwise, we are in polling mode, so poll
3849 * status under operation succeeds or fails.
3850 *
3851 * LOCKING:
3852 * Kernel thread context (may sleep)
3853 */
3854
3855 static void atapi_packet_task(void *_data)
3856 {
3857 struct ata_port *ap = _data;
3858 struct ata_queued_cmd *qc;
3859 u8 status;
3860
3861 qc = ata_qc_from_tag(ap, ap->active_tag);
3862 assert(qc != NULL);
3863 assert(qc->flags & ATA_QCFLAG_ACTIVE);
3864
3865 /* sleep-wait for BSY to clear */
3866 DPRINTK("busy wait\n");
3867 if (ata_busy_sleep(ap, ATA_TMOUT_CDB_QUICK, ATA_TMOUT_CDB))
3868 goto err_out;
3869
3870 /* make sure DRQ is set */
3871 status = ata_chk_status(ap);
3872 if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ)
3873 goto err_out;
3874
3875 /* send SCSI cdb */
3876 DPRINTK("send cdb\n");
3877 assert(ap->cdb_len >= 12);
3878
3879 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA ||
3880 qc->tf.protocol == ATA_PROT_ATAPI_NODATA) {
3881 unsigned long flags;
3882
3883 /* Once we're done issuing command and kicking bmdma,
3884 * irq handler takes over. To not lose irq, we need
3885 * to clear NOINTR flag before sending cdb, but
3886 * interrupt handler shouldn't be invoked before we're
3887 * finished. Hence, the following locking.
3888 */
3889 spin_lock_irqsave(&ap->host_set->lock, flags);
3890 ap->flags &= ~ATA_FLAG_NOINTR;
3891 ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1);
3892 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA)
3893 ap->ops->bmdma_start(qc); /* initiate bmdma */
3894 spin_unlock_irqrestore(&ap->host_set->lock, flags);
3895 } else {
3896 ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1);
3897
3898 /* PIO commands are handled by polling */
3899 ap->pio_task_state = PIO_ST;
3900 queue_work(ata_wq, &ap->pio_task);
3901 }
3902
3903 return;
3904
3905 err_out:
3906 ata_poll_qc_complete(qc, ATA_ERR);
3907 }
3908
3909
3910 /**
3911 * ata_port_start - Set port up for dma.
3912 * @ap: Port to initialize
3913 *
3914 * Called just after data structures for each port are
3915 * initialized. Allocates space for PRD table.
3916 *
3917 * May be used as the port_start() entry in ata_port_operations.
3918 *
3919 * LOCKING:
3920 */
3921
3922 int ata_port_start (struct ata_port *ap)
3923 {
3924 struct device *dev = ap->host_set->dev;
3925
3926 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
3927 if (!ap->prd)
3928 return -ENOMEM;
3929
3930 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
3931
3932 return 0;
3933 }
3934
3935
3936 /**
3937 * ata_port_stop - Undo ata_port_start()
3938 * @ap: Port to shut down
3939 *
3940 * Frees the PRD table.
3941 *
3942 * May be used as the port_stop() entry in ata_port_operations.
3943 *
3944 * LOCKING:
3945 */
3946
3947 void ata_port_stop (struct ata_port *ap)
3948 {
3949 struct device *dev = ap->host_set->dev;
3950
3951 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
3952 }
3953
3954 void ata_host_stop (struct ata_host_set *host_set)
3955 {
3956 if (host_set->mmio_base)
3957 iounmap(host_set->mmio_base);
3958 }
3959
3960
3961 /**
3962 * ata_host_remove - Unregister SCSI host structure with upper layers
3963 * @ap: Port to unregister
3964 * @do_unregister: 1 if we fully unregister, 0 to just stop the port
3965 *
3966 * LOCKING:
3967 */
3968
3969 static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
3970 {
3971 struct Scsi_Host *sh = ap->host;
3972
3973 DPRINTK("ENTER\n");
3974
3975 if (do_unregister)
3976 scsi_remove_host(sh);
3977
3978 ap->ops->port_stop(ap);
3979 }
3980
3981 /**
3982 * ata_host_init - Initialize an ata_port structure
3983 * @ap: Structure to initialize
3984 * @host: associated SCSI mid-layer structure
3985 * @host_set: Collection of hosts to which @ap belongs
3986 * @ent: Probe information provided by low-level driver
3987 * @port_no: Port number associated with this ata_port
3988 *
3989 * Initialize a new ata_port structure, and its associated
3990 * scsi_host.
3991 *
3992 * LOCKING:
3993 * Inherited from caller.
3994 *
3995 */
3996
3997 static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
3998 struct ata_host_set *host_set,
3999 struct ata_probe_ent *ent, unsigned int port_no)
4000 {
4001 unsigned int i;
4002
4003 host->max_id = 16;
4004 host->max_lun = 1;
4005 host->max_channel = 1;
4006 host->unique_id = ata_unique_id++;
4007 host->max_cmd_len = 12;
4008
4009 scsi_assign_lock(host, &host_set->lock);
4010
4011 ap->flags = ATA_FLAG_PORT_DISABLED;
4012 ap->id = host->unique_id;
4013 ap->host = host;
4014 ap->ctl = ATA_DEVCTL_OBS;
4015 ap->host_set = host_set;
4016 ap->port_no = port_no;
4017 ap->hard_port_no =
4018 ent->legacy_mode ? ent->hard_port_no : port_no;
4019 ap->pio_mask = ent->pio_mask;
4020 ap->mwdma_mask = ent->mwdma_mask;
4021 ap->udma_mask = ent->udma_mask;
4022 ap->flags |= ent->host_flags;
4023 ap->ops = ent->port_ops;
4024 ap->cbl = ATA_CBL_NONE;
4025 ap->active_tag = ATA_TAG_POISON;
4026 ap->last_ctl = 0xFF;
4027
4028 INIT_WORK(&ap->packet_task, atapi_packet_task, ap);
4029 INIT_WORK(&ap->pio_task, ata_pio_task, ap);
4030
4031 for (i = 0; i < ATA_MAX_DEVICES; i++)
4032 ap->device[i].devno = i;
4033
4034 #ifdef ATA_IRQ_TRAP
4035 ap->stats.unhandled_irq = 1;
4036 ap->stats.idle_irq = 1;
4037 #endif
4038
4039 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
4040 }
4041
4042 /**
4043 * ata_host_add - Attach low-level ATA driver to system
4044 * @ent: Information provided by low-level driver
4045 * @host_set: Collections of ports to which we add
4046 * @port_no: Port number associated with this host
4047 *
4048 * Attach low-level ATA driver to system.
4049 *
4050 * LOCKING:
4051 * PCI/etc. bus probe sem.
4052 *
4053 * RETURNS:
4054 * New ata_port on success, for NULL on error.
4055 *
4056 */
4057
4058 static struct ata_port * ata_host_add(struct ata_probe_ent *ent,
4059 struct ata_host_set *host_set,
4060 unsigned int port_no)
4061 {
4062 struct Scsi_Host *host;
4063 struct ata_port *ap;
4064 int rc;
4065
4066 DPRINTK("ENTER\n");
4067 host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
4068 if (!host)
4069 return NULL;
4070
4071 ap = (struct ata_port *) &host->hostdata[0];
4072
4073 ata_host_init(ap, host, host_set, ent, port_no);
4074
4075 rc = ap->ops->port_start(ap);
4076 if (rc)
4077 goto err_out;
4078
4079 return ap;
4080
4081 err_out:
4082 scsi_host_put(host);
4083 return NULL;
4084 }
4085
4086 /**
4087 * ata_device_add - Register hardware device with ATA and SCSI layers
4088 * @ent: Probe information describing hardware device to be registered
4089 *
4090 * This function processes the information provided in the probe
4091 * information struct @ent, allocates the necessary ATA and SCSI
4092 * host information structures, initializes them, and registers
4093 * everything with requisite kernel subsystems.
4094 *
4095 * This function requests irqs, probes the ATA bus, and probes
4096 * the SCSI bus.
4097 *
4098 * LOCKING:
4099 * PCI/etc. bus probe sem.
4100 *
4101 * RETURNS:
4102 * Number of ports registered. Zero on error (no ports registered).
4103 *
4104 */
4105
4106 int ata_device_add(struct ata_probe_ent *ent)
4107 {
4108 unsigned int count = 0, i;
4109 struct device *dev = ent->dev;
4110 struct ata_host_set *host_set;
4111
4112 DPRINTK("ENTER\n");
4113 /* alloc a container for our list of ATA ports (buses) */
4114 host_set = kmalloc(sizeof(struct ata_host_set) +
4115 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
4116 if (!host_set)
4117 return 0;
4118 memset(host_set, 0, sizeof(struct ata_host_set) + (ent->n_ports * sizeof(void *)));
4119 spin_lock_init(&host_set->lock);
4120
4121 host_set->dev = dev;
4122 host_set->n_ports = ent->n_ports;
4123 host_set->irq = ent->irq;
4124 host_set->mmio_base = ent->mmio_base;
4125 host_set->private_data = ent->private_data;
4126 host_set->ops = ent->port_ops;
4127
4128 /* register each port bound to this device */
4129 for (i = 0; i < ent->n_ports; i++) {
4130 struct ata_port *ap;
4131 unsigned long xfer_mode_mask;
4132
4133 ap = ata_host_add(ent, host_set, i);
4134 if (!ap)
4135 goto err_out;
4136
4137 host_set->ports[i] = ap;
4138 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
4139 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
4140 (ap->pio_mask << ATA_SHIFT_PIO);
4141
4142 /* print per-port info to dmesg */
4143 printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX "
4144 "bmdma 0x%lX irq %lu\n",
4145 ap->id,
4146 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
4147 ata_mode_string(xfer_mode_mask),
4148 ap->ioaddr.cmd_addr,
4149 ap->ioaddr.ctl_addr,
4150 ap->ioaddr.bmdma_addr,
4151 ent->irq);
4152
4153 ata_chk_status(ap);
4154 host_set->ops->irq_clear(ap);
4155 count++;
4156 }
4157
4158 if (!count) {
4159 kfree(host_set);
4160 return 0;
4161 }
4162
4163 /* obtain irq, that is shared between channels */
4164 if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
4165 DRV_NAME, host_set))
4166 goto err_out;
4167
4168 /* perform each probe synchronously */
4169 DPRINTK("probe begin\n");
4170 for (i = 0; i < count; i++) {
4171 struct ata_port *ap;
4172 int rc;
4173
4174 ap = host_set->ports[i];
4175
4176 DPRINTK("ata%u: probe begin\n", ap->id);
4177 rc = ata_bus_probe(ap);
4178 DPRINTK("ata%u: probe end\n", ap->id);
4179
4180 if (rc) {
4181 /* FIXME: do something useful here?
4182 * Current libata behavior will
4183 * tear down everything when
4184 * the module is removed
4185 * or the h/w is unplugged.
4186 */
4187 }
4188
4189 rc = scsi_add_host(ap->host, dev);
4190 if (rc) {
4191 printk(KERN_ERR "ata%u: scsi_add_host failed\n",
4192 ap->id);
4193 /* FIXME: do something useful here */
4194 /* FIXME: handle unconditional calls to
4195 * scsi_scan_host and ata_host_remove, below,
4196 * at the very least
4197 */
4198 }
4199 }
4200
4201 /* probes are done, now scan each port's disk(s) */
4202 DPRINTK("probe begin\n");
4203 for (i = 0; i < count; i++) {
4204 struct ata_port *ap = host_set->ports[i];
4205
4206 scsi_scan_host(ap->host);
4207 }
4208
4209 dev_set_drvdata(dev, host_set);
4210
4211 VPRINTK("EXIT, returning %u\n", ent->n_ports);
4212 return ent->n_ports; /* success */
4213
4214 err_out:
4215 for (i = 0; i < count; i++) {
4216 ata_host_remove(host_set->ports[i], 1);
4217 scsi_host_put(host_set->ports[i]->host);
4218 }
4219 kfree(host_set);
4220 VPRINTK("EXIT, returning 0\n");
4221 return 0;
4222 }
4223
4224 /**
4225 * ata_host_set_remove - PCI layer callback for device removal
4226 * @host_set: ATA host set that was removed
4227 *
4228 * Unregister all objects associated with this host set. Free those
4229 * objects.
4230 *
4231 * LOCKING:
4232 * Inherited from calling layer (may sleep).
4233 */
4234
4235
4236 void ata_host_set_remove(struct ata_host_set *host_set)
4237 {
4238 struct ata_port *ap;
4239 unsigned int i;
4240
4241 for (i = 0; i < host_set->n_ports; i++) {
4242 ap = host_set->ports[i];
4243 scsi_remove_host(ap->host);
4244 }
4245
4246 free_irq(host_set->irq, host_set);
4247
4248 for (i = 0; i < host_set->n_ports; i++) {
4249 ap = host_set->ports[i];
4250
4251 ata_scsi_release(ap->host);
4252
4253 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
4254 struct ata_ioports *ioaddr = &ap->ioaddr;
4255
4256 if (ioaddr->cmd_addr == 0x1f0)
4257 release_region(0x1f0, 8);
4258 else if (ioaddr->cmd_addr == 0x170)
4259 release_region(0x170, 8);
4260 }
4261
4262 scsi_host_put(ap->host);
4263 }
4264
4265 if (host_set->ops->host_stop)
4266 host_set->ops->host_stop(host_set);
4267
4268 kfree(host_set);
4269 }
4270
4271 /**
4272 * ata_scsi_release - SCSI layer callback hook for host unload
4273 * @host: libata host to be unloaded
4274 *
4275 * Performs all duties necessary to shut down a libata port...
4276 * Kill port kthread, disable port, and release resources.
4277 *
4278 * LOCKING:
4279 * Inherited from SCSI layer.
4280 *
4281 * RETURNS:
4282 * One.
4283 */
4284
4285 int ata_scsi_release(struct Scsi_Host *host)
4286 {
4287 struct ata_port *ap = (struct ata_port *) &host->hostdata[0];
4288
4289 DPRINTK("ENTER\n");
4290
4291 ap->ops->port_disable(ap);
4292 ata_host_remove(ap, 0);
4293
4294 DPRINTK("EXIT\n");
4295 return 1;
4296 }
4297
4298 /**
4299 * ata_std_ports - initialize ioaddr with standard port offsets.
4300 * @ioaddr: IO address structure to be initialized
4301 *
4302 * Utility function which initializes data_addr, error_addr,
4303 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
4304 * device_addr, status_addr, and command_addr to standard offsets
4305 * relative to cmd_addr.
4306 *
4307 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
4308 */
4309
4310 void ata_std_ports(struct ata_ioports *ioaddr)
4311 {
4312 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
4313 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
4314 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
4315 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
4316 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
4317 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
4318 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
4319 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
4320 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
4321 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
4322 }
4323
4324 static struct ata_probe_ent *
4325 ata_probe_ent_alloc(struct device *dev, struct ata_port_info *port)
4326 {
4327 struct ata_probe_ent *probe_ent;
4328
4329 probe_ent = kmalloc(sizeof(*probe_ent), GFP_KERNEL);
4330 if (!probe_ent) {
4331 printk(KERN_ERR DRV_NAME "(%s): out of memory\n",
4332 kobject_name(&(dev->kobj)));
4333 return NULL;
4334 }
4335
4336 memset(probe_ent, 0, sizeof(*probe_ent));
4337
4338 INIT_LIST_HEAD(&probe_ent->node);
4339 probe_ent->dev = dev;
4340
4341 probe_ent->sht = port->sht;
4342 probe_ent->host_flags = port->host_flags;
4343 probe_ent->pio_mask = port->pio_mask;
4344 probe_ent->mwdma_mask = port->mwdma_mask;
4345 probe_ent->udma_mask = port->udma_mask;
4346 probe_ent->port_ops = port->port_ops;
4347
4348 return probe_ent;
4349 }
4350
4351
4352
4353 #ifdef CONFIG_PCI
4354
4355 void ata_pci_host_stop (struct ata_host_set *host_set)
4356 {
4357 struct pci_dev *pdev = to_pci_dev(host_set->dev);
4358
4359 pci_iounmap(pdev, host_set->mmio_base);
4360 }
4361
4362 /**
4363 * ata_pci_init_native_mode - Initialize native-mode driver
4364 * @pdev: pci device to be initialized
4365 * @port: array[2] of pointers to port info structures.
4366 *
4367 * Utility function which allocates and initializes an
4368 * ata_probe_ent structure for a standard dual-port
4369 * PIO-based IDE controller. The returned ata_probe_ent
4370 * structure can be passed to ata_device_add(). The returned
4371 * ata_probe_ent structure should then be freed with kfree().
4372 */
4373
4374 struct ata_probe_ent *
4375 ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port)
4376 {
4377 struct ata_probe_ent *probe_ent =
4378 ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[0]);
4379 if (!probe_ent)
4380 return NULL;
4381
4382 probe_ent->n_ports = 2;
4383 probe_ent->irq = pdev->irq;
4384 probe_ent->irq_flags = SA_SHIRQ;
4385
4386 probe_ent->port[0].cmd_addr = pci_resource_start(pdev, 0);
4387 probe_ent->port[0].altstatus_addr =
4388 probe_ent->port[0].ctl_addr =
4389 pci_resource_start(pdev, 1) | ATA_PCI_CTL_OFS;
4390 probe_ent->port[0].bmdma_addr = pci_resource_start(pdev, 4);
4391
4392 probe_ent->port[1].cmd_addr = pci_resource_start(pdev, 2);
4393 probe_ent->port[1].altstatus_addr =
4394 probe_ent->port[1].ctl_addr =
4395 pci_resource_start(pdev, 3) | ATA_PCI_CTL_OFS;
4396 probe_ent->port[1].bmdma_addr = pci_resource_start(pdev, 4) + 8;
4397
4398 ata_std_ports(&probe_ent->port[0]);
4399 ata_std_ports(&probe_ent->port[1]);
4400
4401 return probe_ent;
4402 }
4403
4404 static struct ata_probe_ent *
4405 ata_pci_init_legacy_mode(struct pci_dev *pdev, struct ata_port_info **port,
4406 struct ata_probe_ent **ppe2)
4407 {
4408 struct ata_probe_ent *probe_ent, *probe_ent2;
4409
4410 probe_ent = ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[0]);
4411 if (!probe_ent)
4412 return NULL;
4413 probe_ent2 = ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[1]);
4414 if (!probe_ent2) {
4415 kfree(probe_ent);
4416 return NULL;
4417 }
4418
4419 probe_ent->n_ports = 1;
4420 probe_ent->irq = 14;
4421
4422 probe_ent->hard_port_no = 0;
4423 probe_ent->legacy_mode = 1;
4424
4425 probe_ent2->n_ports = 1;
4426 probe_ent2->irq = 15;
4427
4428 probe_ent2->hard_port_no = 1;
4429 probe_ent2->legacy_mode = 1;
4430
4431 probe_ent->port[0].cmd_addr = 0x1f0;
4432 probe_ent->port[0].altstatus_addr =
4433 probe_ent->port[0].ctl_addr = 0x3f6;
4434 probe_ent->port[0].bmdma_addr = pci_resource_start(pdev, 4);
4435
4436 probe_ent2->port[0].cmd_addr = 0x170;
4437 probe_ent2->port[0].altstatus_addr =
4438 probe_ent2->port[0].ctl_addr = 0x376;
4439 probe_ent2->port[0].bmdma_addr = pci_resource_start(pdev, 4)+8;
4440
4441 ata_std_ports(&probe_ent->port[0]);
4442 ata_std_ports(&probe_ent2->port[0]);
4443
4444 *ppe2 = probe_ent2;
4445 return probe_ent;
4446 }
4447
4448 /**
4449 * ata_pci_init_one - Initialize/register PCI IDE host controller
4450 * @pdev: Controller to be initialized
4451 * @port_info: Information from low-level host driver
4452 * @n_ports: Number of ports attached to host controller
4453 *
4454 * This is a helper function which can be called from a driver's
4455 * xxx_init_one() probe function if the hardware uses traditional
4456 * IDE taskfile registers.
4457 *
4458 * This function calls pci_enable_device(), reserves its register
4459 * regions, sets the dma mask, enables bus master mode, and calls
4460 * ata_device_add()
4461 *
4462 * LOCKING:
4463 * Inherited from PCI layer (may sleep).
4464 *
4465 * RETURNS:
4466 * Zero on success, negative on errno-based value on error.
4467 *
4468 */
4469
4470 int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info,
4471 unsigned int n_ports)
4472 {
4473 struct ata_probe_ent *probe_ent, *probe_ent2 = NULL;
4474 struct ata_port_info *port[2];
4475 u8 tmp8, mask;
4476 unsigned int legacy_mode = 0;
4477 int disable_dev_on_err = 1;
4478 int rc;
4479
4480 DPRINTK("ENTER\n");
4481
4482 port[0] = port_info[0];
4483 if (n_ports > 1)
4484 port[1] = port_info[1];
4485 else
4486 port[1] = port[0];
4487
4488 if ((port[0]->host_flags & ATA_FLAG_NO_LEGACY) == 0
4489 && (pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) {
4490 /* TODO: support transitioning to native mode? */
4491 pci_read_config_byte(pdev, PCI_CLASS_PROG, &tmp8);
4492 mask = (1 << 2) | (1 << 0);
4493 if ((tmp8 & mask) != mask)
4494 legacy_mode = (1 << 3);
4495 }
4496
4497 /* FIXME... */
4498 if ((!legacy_mode) && (n_ports > 1)) {
4499 printk(KERN_ERR "ata: BUG: native mode, n_ports > 1\n");
4500 return -EINVAL;
4501 }
4502
4503 rc = pci_enable_device(pdev);
4504 if (rc)
4505 return rc;
4506
4507 rc = pci_request_regions(pdev, DRV_NAME);
4508 if (rc) {
4509 disable_dev_on_err = 0;
4510 goto err_out;
4511 }
4512
4513 if (legacy_mode) {
4514 if (!request_region(0x1f0, 8, "libata")) {
4515 struct resource *conflict, res;
4516 res.start = 0x1f0;
4517 res.end = 0x1f0 + 8 - 1;
4518 conflict = ____request_resource(&ioport_resource, &res);
4519 if (!strcmp(conflict->name, "libata"))
4520 legacy_mode |= (1 << 0);
4521 else {
4522 disable_dev_on_err = 0;
4523 printk(KERN_WARNING "ata: 0x1f0 IDE port busy\n");
4524 }
4525 } else
4526 legacy_mode |= (1 << 0);
4527
4528 if (!request_region(0x170, 8, "libata")) {
4529 struct resource *conflict, res;
4530 res.start = 0x170;
4531 res.end = 0x170 + 8 - 1;
4532 conflict = ____request_resource(&ioport_resource, &res);
4533 if (!strcmp(conflict->name, "libata"))
4534 legacy_mode |= (1 << 1);
4535 else {
4536 disable_dev_on_err = 0;
4537 printk(KERN_WARNING "ata: 0x170 IDE port busy\n");
4538 }
4539 } else
4540 legacy_mode |= (1 << 1);
4541 }
4542
4543 /* we have legacy mode, but all ports are unavailable */
4544 if (legacy_mode == (1 << 3)) {
4545 rc = -EBUSY;
4546 goto err_out_regions;
4547 }
4548
4549 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
4550 if (rc)
4551 goto err_out_regions;
4552 rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
4553 if (rc)
4554 goto err_out_regions;
4555
4556 if (legacy_mode) {
4557 probe_ent = ata_pci_init_legacy_mode(pdev, port, &probe_ent2);
4558 } else
4559 probe_ent = ata_pci_init_native_mode(pdev, port);
4560 if (!probe_ent) {
4561 rc = -ENOMEM;
4562 goto err_out_regions;
4563 }
4564
4565 pci_set_master(pdev);
4566
4567 /* FIXME: check ata_device_add return */
4568 if (legacy_mode) {
4569 if (legacy_mode & (1 << 0))
4570 ata_device_add(probe_ent);
4571 if (legacy_mode & (1 << 1))
4572 ata_device_add(probe_ent2);
4573 } else
4574 ata_device_add(probe_ent);
4575
4576 kfree(probe_ent);
4577 kfree(probe_ent2);
4578
4579 return 0;
4580
4581 err_out_regions:
4582 if (legacy_mode & (1 << 0))
4583 release_region(0x1f0, 8);
4584 if (legacy_mode & (1 << 1))
4585 release_region(0x170, 8);
4586 pci_release_regions(pdev);
4587 err_out:
4588 if (disable_dev_on_err)
4589 pci_disable_device(pdev);
4590 return rc;
4591 }
4592
4593 /**
4594 * ata_pci_remove_one - PCI layer callback for device removal
4595 * @pdev: PCI device that was removed
4596 *
4597 * PCI layer indicates to libata via this hook that
4598 * hot-unplug or module unload event has occured.
4599 * Handle this by unregistering all objects associated
4600 * with this PCI device. Free those objects. Then finally
4601 * release PCI resources and disable device.
4602 *
4603 * LOCKING:
4604 * Inherited from PCI layer (may sleep).
4605 */
4606
4607 void ata_pci_remove_one (struct pci_dev *pdev)
4608 {
4609 struct device *dev = pci_dev_to_dev(pdev);
4610 struct ata_host_set *host_set = dev_get_drvdata(dev);
4611
4612 ata_host_set_remove(host_set);
4613 pci_release_regions(pdev);
4614 pci_disable_device(pdev);
4615 dev_set_drvdata(dev, NULL);
4616 }
4617
4618 /* move to PCI subsystem */
4619 int pci_test_config_bits(struct pci_dev *pdev, struct pci_bits *bits)
4620 {
4621 unsigned long tmp = 0;
4622
4623 switch (bits->width) {
4624 case 1: {
4625 u8 tmp8 = 0;
4626 pci_read_config_byte(pdev, bits->reg, &tmp8);
4627 tmp = tmp8;
4628 break;
4629 }
4630 case 2: {
4631 u16 tmp16 = 0;
4632 pci_read_config_word(pdev, bits->reg, &tmp16);
4633 tmp = tmp16;
4634 break;
4635 }
4636 case 4: {
4637 u32 tmp32 = 0;
4638 pci_read_config_dword(pdev, bits->reg, &tmp32);
4639 tmp = tmp32;
4640 break;
4641 }
4642
4643 default:
4644 return -EINVAL;
4645 }
4646
4647 tmp &= bits->mask;
4648
4649 return (tmp == bits->val) ? 1 : 0;
4650 }
4651 #endif /* CONFIG_PCI */
4652
4653
4654 static int __init ata_init(void)
4655 {
4656 ata_wq = create_workqueue("ata");
4657 if (!ata_wq)
4658 return -ENOMEM;
4659
4660 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
4661 return 0;
4662 }
4663
4664 static void __exit ata_exit(void)
4665 {
4666 destroy_workqueue(ata_wq);
4667 }
4668
4669 module_init(ata_init);
4670 module_exit(ata_exit);
4671
4672 /*
4673 * libata is essentially a library of internal helper functions for
4674 * low-level ATA host controller drivers. As such, the API/ABI is
4675 * likely to change as new drivers are added and updated.
4676 * Do not depend on ABI/API stability.
4677 */
4678
4679 EXPORT_SYMBOL_GPL(ata_std_bios_param);
4680 EXPORT_SYMBOL_GPL(ata_std_ports);
4681 EXPORT_SYMBOL_GPL(ata_device_add);
4682 EXPORT_SYMBOL_GPL(ata_host_set_remove);
4683 EXPORT_SYMBOL_GPL(ata_sg_init);
4684 EXPORT_SYMBOL_GPL(ata_sg_init_one);
4685 EXPORT_SYMBOL_GPL(ata_qc_complete);
4686 EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
4687 EXPORT_SYMBOL_GPL(ata_eng_timeout);
4688 EXPORT_SYMBOL_GPL(ata_tf_load);
4689 EXPORT_SYMBOL_GPL(ata_tf_read);
4690 EXPORT_SYMBOL_GPL(ata_noop_dev_select);
4691 EXPORT_SYMBOL_GPL(ata_std_dev_select);
4692 EXPORT_SYMBOL_GPL(ata_tf_to_fis);
4693 EXPORT_SYMBOL_GPL(ata_tf_from_fis);
4694 EXPORT_SYMBOL_GPL(ata_check_status);
4695 EXPORT_SYMBOL_GPL(ata_altstatus);
4696 EXPORT_SYMBOL_GPL(ata_chk_err);
4697 EXPORT_SYMBOL_GPL(ata_exec_command);
4698 EXPORT_SYMBOL_GPL(ata_port_start);
4699 EXPORT_SYMBOL_GPL(ata_port_stop);
4700 EXPORT_SYMBOL_GPL(ata_host_stop);
4701 EXPORT_SYMBOL_GPL(ata_interrupt);
4702 EXPORT_SYMBOL_GPL(ata_qc_prep);
4703 EXPORT_SYMBOL_GPL(ata_bmdma_setup);
4704 EXPORT_SYMBOL_GPL(ata_bmdma_start);
4705 EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
4706 EXPORT_SYMBOL_GPL(ata_bmdma_status);
4707 EXPORT_SYMBOL_GPL(ata_bmdma_stop);
4708 EXPORT_SYMBOL_GPL(ata_port_probe);
4709 EXPORT_SYMBOL_GPL(sata_phy_reset);
4710 EXPORT_SYMBOL_GPL(__sata_phy_reset);
4711 EXPORT_SYMBOL_GPL(ata_bus_reset);
4712 EXPORT_SYMBOL_GPL(ata_port_disable);
4713 EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
4714 EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
4715 EXPORT_SYMBOL_GPL(ata_scsi_error);
4716 EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
4717 EXPORT_SYMBOL_GPL(ata_scsi_release);
4718 EXPORT_SYMBOL_GPL(ata_host_intr);
4719 EXPORT_SYMBOL_GPL(ata_dev_classify);
4720 EXPORT_SYMBOL_GPL(ata_dev_id_string);
4721 EXPORT_SYMBOL_GPL(ata_dev_config);
4722 EXPORT_SYMBOL_GPL(ata_scsi_simulate);
4723
4724 #ifdef CONFIG_PCI
4725 EXPORT_SYMBOL_GPL(pci_test_config_bits);
4726 EXPORT_SYMBOL_GPL(ata_pci_host_stop);
4727 EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
4728 EXPORT_SYMBOL_GPL(ata_pci_init_one);
4729 EXPORT_SYMBOL_GPL(ata_pci_remove_one);
4730 #endif /* CONFIG_PCI */
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