[PATCH] libata-eh-fw: use special reserved tag and qc for internal commands
[deliverable/linux.git] / drivers / scsi / libata-core.c
1 /*
2 * libata-core.c - helper library for ATA
3 *
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
32 *
33 */
34
35 #include <linux/config.h>
36 #include <linux/kernel.h>
37 #include <linux/module.h>
38 #include <linux/pci.h>
39 #include <linux/init.h>
40 #include <linux/list.h>
41 #include <linux/mm.h>
42 #include <linux/highmem.h>
43 #include <linux/spinlock.h>
44 #include <linux/blkdev.h>
45 #include <linux/delay.h>
46 #include <linux/timer.h>
47 #include <linux/interrupt.h>
48 #include <linux/completion.h>
49 #include <linux/suspend.h>
50 #include <linux/workqueue.h>
51 #include <linux/jiffies.h>
52 #include <linux/scatterlist.h>
53 #include <scsi/scsi.h>
54 #include "scsi_priv.h"
55 #include <scsi/scsi_cmnd.h>
56 #include <scsi/scsi_host.h>
57 #include <linux/libata.h>
58 #include <asm/io.h>
59 #include <asm/semaphore.h>
60 #include <asm/byteorder.h>
61
62 #include "libata.h"
63
64 static unsigned int ata_dev_init_params(struct ata_device *dev,
65 u16 heads, u16 sectors);
66 static unsigned int ata_dev_set_xfermode(struct ata_device *dev);
67 static void ata_dev_xfermask(struct ata_device *dev);
68
69 static unsigned int ata_unique_id = 1;
70 static struct workqueue_struct *ata_wq;
71
72 int atapi_enabled = 1;
73 module_param(atapi_enabled, int, 0444);
74 MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
75
76 int atapi_dmadir = 0;
77 module_param(atapi_dmadir, int, 0444);
78 MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off, 1=on)");
79
80 int libata_fua = 0;
81 module_param_named(fua, libata_fua, int, 0444);
82 MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
83
84 MODULE_AUTHOR("Jeff Garzik");
85 MODULE_DESCRIPTION("Library module for ATA devices");
86 MODULE_LICENSE("GPL");
87 MODULE_VERSION(DRV_VERSION);
88
89
90 /**
91 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
92 * @tf: Taskfile to convert
93 * @fis: Buffer into which data will output
94 * @pmp: Port multiplier port
95 *
96 * Converts a standard ATA taskfile to a Serial ATA
97 * FIS structure (Register - Host to Device).
98 *
99 * LOCKING:
100 * Inherited from caller.
101 */
102
103 void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
104 {
105 fis[0] = 0x27; /* Register - Host to Device FIS */
106 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
107 bit 7 indicates Command FIS */
108 fis[2] = tf->command;
109 fis[3] = tf->feature;
110
111 fis[4] = tf->lbal;
112 fis[5] = tf->lbam;
113 fis[6] = tf->lbah;
114 fis[7] = tf->device;
115
116 fis[8] = tf->hob_lbal;
117 fis[9] = tf->hob_lbam;
118 fis[10] = tf->hob_lbah;
119 fis[11] = tf->hob_feature;
120
121 fis[12] = tf->nsect;
122 fis[13] = tf->hob_nsect;
123 fis[14] = 0;
124 fis[15] = tf->ctl;
125
126 fis[16] = 0;
127 fis[17] = 0;
128 fis[18] = 0;
129 fis[19] = 0;
130 }
131
132 /**
133 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
134 * @fis: Buffer from which data will be input
135 * @tf: Taskfile to output
136 *
137 * Converts a serial ATA FIS structure to a standard ATA taskfile.
138 *
139 * LOCKING:
140 * Inherited from caller.
141 */
142
143 void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
144 {
145 tf->command = fis[2]; /* status */
146 tf->feature = fis[3]; /* error */
147
148 tf->lbal = fis[4];
149 tf->lbam = fis[5];
150 tf->lbah = fis[6];
151 tf->device = fis[7];
152
153 tf->hob_lbal = fis[8];
154 tf->hob_lbam = fis[9];
155 tf->hob_lbah = fis[10];
156
157 tf->nsect = fis[12];
158 tf->hob_nsect = fis[13];
159 }
160
161 static const u8 ata_rw_cmds[] = {
162 /* pio multi */
163 ATA_CMD_READ_MULTI,
164 ATA_CMD_WRITE_MULTI,
165 ATA_CMD_READ_MULTI_EXT,
166 ATA_CMD_WRITE_MULTI_EXT,
167 0,
168 0,
169 0,
170 ATA_CMD_WRITE_MULTI_FUA_EXT,
171 /* pio */
172 ATA_CMD_PIO_READ,
173 ATA_CMD_PIO_WRITE,
174 ATA_CMD_PIO_READ_EXT,
175 ATA_CMD_PIO_WRITE_EXT,
176 0,
177 0,
178 0,
179 0,
180 /* dma */
181 ATA_CMD_READ,
182 ATA_CMD_WRITE,
183 ATA_CMD_READ_EXT,
184 ATA_CMD_WRITE_EXT,
185 0,
186 0,
187 0,
188 ATA_CMD_WRITE_FUA_EXT
189 };
190
191 /**
192 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
193 * @qc: command to examine and configure
194 *
195 * Examine the device configuration and tf->flags to calculate
196 * the proper read/write commands and protocol to use.
197 *
198 * LOCKING:
199 * caller.
200 */
201 int ata_rwcmd_protocol(struct ata_queued_cmd *qc)
202 {
203 struct ata_taskfile *tf = &qc->tf;
204 struct ata_device *dev = qc->dev;
205 u8 cmd;
206
207 int index, fua, lba48, write;
208
209 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
210 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
211 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
212
213 if (dev->flags & ATA_DFLAG_PIO) {
214 tf->protocol = ATA_PROT_PIO;
215 index = dev->multi_count ? 0 : 8;
216 } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) {
217 /* Unable to use DMA due to host limitation */
218 tf->protocol = ATA_PROT_PIO;
219 index = dev->multi_count ? 0 : 8;
220 } else {
221 tf->protocol = ATA_PROT_DMA;
222 index = 16;
223 }
224
225 cmd = ata_rw_cmds[index + fua + lba48 + write];
226 if (cmd) {
227 tf->command = cmd;
228 return 0;
229 }
230 return -1;
231 }
232
233 /**
234 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
235 * @pio_mask: pio_mask
236 * @mwdma_mask: mwdma_mask
237 * @udma_mask: udma_mask
238 *
239 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
240 * unsigned int xfer_mask.
241 *
242 * LOCKING:
243 * None.
244 *
245 * RETURNS:
246 * Packed xfer_mask.
247 */
248 static unsigned int ata_pack_xfermask(unsigned int pio_mask,
249 unsigned int mwdma_mask,
250 unsigned int udma_mask)
251 {
252 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
253 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
254 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
255 }
256
257 /**
258 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
259 * @xfer_mask: xfer_mask to unpack
260 * @pio_mask: resulting pio_mask
261 * @mwdma_mask: resulting mwdma_mask
262 * @udma_mask: resulting udma_mask
263 *
264 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
265 * Any NULL distination masks will be ignored.
266 */
267 static void ata_unpack_xfermask(unsigned int xfer_mask,
268 unsigned int *pio_mask,
269 unsigned int *mwdma_mask,
270 unsigned int *udma_mask)
271 {
272 if (pio_mask)
273 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
274 if (mwdma_mask)
275 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
276 if (udma_mask)
277 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
278 }
279
280 static const struct ata_xfer_ent {
281 int shift, bits;
282 u8 base;
283 } ata_xfer_tbl[] = {
284 { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
285 { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
286 { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
287 { -1, },
288 };
289
290 /**
291 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
292 * @xfer_mask: xfer_mask of interest
293 *
294 * Return matching XFER_* value for @xfer_mask. Only the highest
295 * bit of @xfer_mask is considered.
296 *
297 * LOCKING:
298 * None.
299 *
300 * RETURNS:
301 * Matching XFER_* value, 0 if no match found.
302 */
303 static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
304 {
305 int highbit = fls(xfer_mask) - 1;
306 const struct ata_xfer_ent *ent;
307
308 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
309 if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
310 return ent->base + highbit - ent->shift;
311 return 0;
312 }
313
314 /**
315 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
316 * @xfer_mode: XFER_* of interest
317 *
318 * Return matching xfer_mask for @xfer_mode.
319 *
320 * LOCKING:
321 * None.
322 *
323 * RETURNS:
324 * Matching xfer_mask, 0 if no match found.
325 */
326 static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
327 {
328 const struct ata_xfer_ent *ent;
329
330 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
331 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
332 return 1 << (ent->shift + xfer_mode - ent->base);
333 return 0;
334 }
335
336 /**
337 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
338 * @xfer_mode: XFER_* of interest
339 *
340 * Return matching xfer_shift for @xfer_mode.
341 *
342 * LOCKING:
343 * None.
344 *
345 * RETURNS:
346 * Matching xfer_shift, -1 if no match found.
347 */
348 static int ata_xfer_mode2shift(unsigned int xfer_mode)
349 {
350 const struct ata_xfer_ent *ent;
351
352 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
353 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
354 return ent->shift;
355 return -1;
356 }
357
358 /**
359 * ata_mode_string - convert xfer_mask to string
360 * @xfer_mask: mask of bits supported; only highest bit counts.
361 *
362 * Determine string which represents the highest speed
363 * (highest bit in @modemask).
364 *
365 * LOCKING:
366 * None.
367 *
368 * RETURNS:
369 * Constant C string representing highest speed listed in
370 * @mode_mask, or the constant C string "<n/a>".
371 */
372 static const char *ata_mode_string(unsigned int xfer_mask)
373 {
374 static const char * const xfer_mode_str[] = {
375 "PIO0",
376 "PIO1",
377 "PIO2",
378 "PIO3",
379 "PIO4",
380 "MWDMA0",
381 "MWDMA1",
382 "MWDMA2",
383 "UDMA/16",
384 "UDMA/25",
385 "UDMA/33",
386 "UDMA/44",
387 "UDMA/66",
388 "UDMA/100",
389 "UDMA/133",
390 "UDMA7",
391 };
392 int highbit;
393
394 highbit = fls(xfer_mask) - 1;
395 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
396 return xfer_mode_str[highbit];
397 return "<n/a>";
398 }
399
400 static const char *sata_spd_string(unsigned int spd)
401 {
402 static const char * const spd_str[] = {
403 "1.5 Gbps",
404 "3.0 Gbps",
405 };
406
407 if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
408 return "<unknown>";
409 return spd_str[spd - 1];
410 }
411
412 void ata_dev_disable(struct ata_device *dev)
413 {
414 if (ata_dev_enabled(dev)) {
415 ata_dev_printk(dev, KERN_WARNING, "disabled\n");
416 dev->class++;
417 }
418 }
419
420 /**
421 * ata_pio_devchk - PATA device presence detection
422 * @ap: ATA channel to examine
423 * @device: Device to examine (starting at zero)
424 *
425 * This technique was originally described in
426 * Hale Landis's ATADRVR (www.ata-atapi.com), and
427 * later found its way into the ATA/ATAPI spec.
428 *
429 * Write a pattern to the ATA shadow registers,
430 * and if a device is present, it will respond by
431 * correctly storing and echoing back the
432 * ATA shadow register contents.
433 *
434 * LOCKING:
435 * caller.
436 */
437
438 static unsigned int ata_pio_devchk(struct ata_port *ap,
439 unsigned int device)
440 {
441 struct ata_ioports *ioaddr = &ap->ioaddr;
442 u8 nsect, lbal;
443
444 ap->ops->dev_select(ap, device);
445
446 outb(0x55, ioaddr->nsect_addr);
447 outb(0xaa, ioaddr->lbal_addr);
448
449 outb(0xaa, ioaddr->nsect_addr);
450 outb(0x55, ioaddr->lbal_addr);
451
452 outb(0x55, ioaddr->nsect_addr);
453 outb(0xaa, ioaddr->lbal_addr);
454
455 nsect = inb(ioaddr->nsect_addr);
456 lbal = inb(ioaddr->lbal_addr);
457
458 if ((nsect == 0x55) && (lbal == 0xaa))
459 return 1; /* we found a device */
460
461 return 0; /* nothing found */
462 }
463
464 /**
465 * ata_mmio_devchk - PATA device presence detection
466 * @ap: ATA channel to examine
467 * @device: Device to examine (starting at zero)
468 *
469 * This technique was originally described in
470 * Hale Landis's ATADRVR (www.ata-atapi.com), and
471 * later found its way into the ATA/ATAPI spec.
472 *
473 * Write a pattern to the ATA shadow registers,
474 * and if a device is present, it will respond by
475 * correctly storing and echoing back the
476 * ATA shadow register contents.
477 *
478 * LOCKING:
479 * caller.
480 */
481
482 static unsigned int ata_mmio_devchk(struct ata_port *ap,
483 unsigned int device)
484 {
485 struct ata_ioports *ioaddr = &ap->ioaddr;
486 u8 nsect, lbal;
487
488 ap->ops->dev_select(ap, device);
489
490 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
491 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
492
493 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
494 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
495
496 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
497 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
498
499 nsect = readb((void __iomem *) ioaddr->nsect_addr);
500 lbal = readb((void __iomem *) ioaddr->lbal_addr);
501
502 if ((nsect == 0x55) && (lbal == 0xaa))
503 return 1; /* we found a device */
504
505 return 0; /* nothing found */
506 }
507
508 /**
509 * ata_devchk - PATA device presence detection
510 * @ap: ATA channel to examine
511 * @device: Device to examine (starting at zero)
512 *
513 * Dispatch ATA device presence detection, depending
514 * on whether we are using PIO or MMIO to talk to the
515 * ATA shadow registers.
516 *
517 * LOCKING:
518 * caller.
519 */
520
521 static unsigned int ata_devchk(struct ata_port *ap,
522 unsigned int device)
523 {
524 if (ap->flags & ATA_FLAG_MMIO)
525 return ata_mmio_devchk(ap, device);
526 return ata_pio_devchk(ap, device);
527 }
528
529 /**
530 * ata_dev_classify - determine device type based on ATA-spec signature
531 * @tf: ATA taskfile register set for device to be identified
532 *
533 * Determine from taskfile register contents whether a device is
534 * ATA or ATAPI, as per "Signature and persistence" section
535 * of ATA/PI spec (volume 1, sect 5.14).
536 *
537 * LOCKING:
538 * None.
539 *
540 * RETURNS:
541 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
542 * the event of failure.
543 */
544
545 unsigned int ata_dev_classify(const struct ata_taskfile *tf)
546 {
547 /* Apple's open source Darwin code hints that some devices only
548 * put a proper signature into the LBA mid/high registers,
549 * So, we only check those. It's sufficient for uniqueness.
550 */
551
552 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
553 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
554 DPRINTK("found ATA device by sig\n");
555 return ATA_DEV_ATA;
556 }
557
558 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
559 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
560 DPRINTK("found ATAPI device by sig\n");
561 return ATA_DEV_ATAPI;
562 }
563
564 DPRINTK("unknown device\n");
565 return ATA_DEV_UNKNOWN;
566 }
567
568 /**
569 * ata_dev_try_classify - Parse returned ATA device signature
570 * @ap: ATA channel to examine
571 * @device: Device to examine (starting at zero)
572 * @r_err: Value of error register on completion
573 *
574 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
575 * an ATA/ATAPI-defined set of values is placed in the ATA
576 * shadow registers, indicating the results of device detection
577 * and diagnostics.
578 *
579 * Select the ATA device, and read the values from the ATA shadow
580 * registers. Then parse according to the Error register value,
581 * and the spec-defined values examined by ata_dev_classify().
582 *
583 * LOCKING:
584 * caller.
585 *
586 * RETURNS:
587 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
588 */
589
590 static unsigned int
591 ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
592 {
593 struct ata_taskfile tf;
594 unsigned int class;
595 u8 err;
596
597 ap->ops->dev_select(ap, device);
598
599 memset(&tf, 0, sizeof(tf));
600
601 ap->ops->tf_read(ap, &tf);
602 err = tf.feature;
603 if (r_err)
604 *r_err = err;
605
606 /* see if device passed diags */
607 if (err == 1)
608 /* do nothing */ ;
609 else if ((device == 0) && (err == 0x81))
610 /* do nothing */ ;
611 else
612 return ATA_DEV_NONE;
613
614 /* determine if device is ATA or ATAPI */
615 class = ata_dev_classify(&tf);
616
617 if (class == ATA_DEV_UNKNOWN)
618 return ATA_DEV_NONE;
619 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
620 return ATA_DEV_NONE;
621 return class;
622 }
623
624 /**
625 * ata_id_string - Convert IDENTIFY DEVICE page into string
626 * @id: IDENTIFY DEVICE results we will examine
627 * @s: string into which data is output
628 * @ofs: offset into identify device page
629 * @len: length of string to return. must be an even number.
630 *
631 * The strings in the IDENTIFY DEVICE page are broken up into
632 * 16-bit chunks. Run through the string, and output each
633 * 8-bit chunk linearly, regardless of platform.
634 *
635 * LOCKING:
636 * caller.
637 */
638
639 void ata_id_string(const u16 *id, unsigned char *s,
640 unsigned int ofs, unsigned int len)
641 {
642 unsigned int c;
643
644 while (len > 0) {
645 c = id[ofs] >> 8;
646 *s = c;
647 s++;
648
649 c = id[ofs] & 0xff;
650 *s = c;
651 s++;
652
653 ofs++;
654 len -= 2;
655 }
656 }
657
658 /**
659 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
660 * @id: IDENTIFY DEVICE results we will examine
661 * @s: string into which data is output
662 * @ofs: offset into identify device page
663 * @len: length of string to return. must be an odd number.
664 *
665 * This function is identical to ata_id_string except that it
666 * trims trailing spaces and terminates the resulting string with
667 * null. @len must be actual maximum length (even number) + 1.
668 *
669 * LOCKING:
670 * caller.
671 */
672 void ata_id_c_string(const u16 *id, unsigned char *s,
673 unsigned int ofs, unsigned int len)
674 {
675 unsigned char *p;
676
677 WARN_ON(!(len & 1));
678
679 ata_id_string(id, s, ofs, len - 1);
680
681 p = s + strnlen(s, len - 1);
682 while (p > s && p[-1] == ' ')
683 p--;
684 *p = '\0';
685 }
686
687 static u64 ata_id_n_sectors(const u16 *id)
688 {
689 if (ata_id_has_lba(id)) {
690 if (ata_id_has_lba48(id))
691 return ata_id_u64(id, 100);
692 else
693 return ata_id_u32(id, 60);
694 } else {
695 if (ata_id_current_chs_valid(id))
696 return ata_id_u32(id, 57);
697 else
698 return id[1] * id[3] * id[6];
699 }
700 }
701
702 /**
703 * ata_noop_dev_select - Select device 0/1 on ATA bus
704 * @ap: ATA channel to manipulate
705 * @device: ATA device (numbered from zero) to select
706 *
707 * This function performs no actual function.
708 *
709 * May be used as the dev_select() entry in ata_port_operations.
710 *
711 * LOCKING:
712 * caller.
713 */
714 void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
715 {
716 }
717
718
719 /**
720 * ata_std_dev_select - Select device 0/1 on ATA bus
721 * @ap: ATA channel to manipulate
722 * @device: ATA device (numbered from zero) to select
723 *
724 * Use the method defined in the ATA specification to
725 * make either device 0, or device 1, active on the
726 * ATA channel. Works with both PIO and MMIO.
727 *
728 * May be used as the dev_select() entry in ata_port_operations.
729 *
730 * LOCKING:
731 * caller.
732 */
733
734 void ata_std_dev_select (struct ata_port *ap, unsigned int device)
735 {
736 u8 tmp;
737
738 if (device == 0)
739 tmp = ATA_DEVICE_OBS;
740 else
741 tmp = ATA_DEVICE_OBS | ATA_DEV1;
742
743 if (ap->flags & ATA_FLAG_MMIO) {
744 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
745 } else {
746 outb(tmp, ap->ioaddr.device_addr);
747 }
748 ata_pause(ap); /* needed; also flushes, for mmio */
749 }
750
751 /**
752 * ata_dev_select - Select device 0/1 on ATA bus
753 * @ap: ATA channel to manipulate
754 * @device: ATA device (numbered from zero) to select
755 * @wait: non-zero to wait for Status register BSY bit to clear
756 * @can_sleep: non-zero if context allows sleeping
757 *
758 * Use the method defined in the ATA specification to
759 * make either device 0, or device 1, active on the
760 * ATA channel.
761 *
762 * This is a high-level version of ata_std_dev_select(),
763 * which additionally provides the services of inserting
764 * the proper pauses and status polling, where needed.
765 *
766 * LOCKING:
767 * caller.
768 */
769
770 void ata_dev_select(struct ata_port *ap, unsigned int device,
771 unsigned int wait, unsigned int can_sleep)
772 {
773 VPRINTK("ENTER, ata%u: device %u, wait %u\n",
774 ap->id, device, wait);
775
776 if (wait)
777 ata_wait_idle(ap);
778
779 ap->ops->dev_select(ap, device);
780
781 if (wait) {
782 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
783 msleep(150);
784 ata_wait_idle(ap);
785 }
786 }
787
788 /**
789 * ata_dump_id - IDENTIFY DEVICE info debugging output
790 * @id: IDENTIFY DEVICE page to dump
791 *
792 * Dump selected 16-bit words from the given IDENTIFY DEVICE
793 * page.
794 *
795 * LOCKING:
796 * caller.
797 */
798
799 static inline void ata_dump_id(const u16 *id)
800 {
801 DPRINTK("49==0x%04x "
802 "53==0x%04x "
803 "63==0x%04x "
804 "64==0x%04x "
805 "75==0x%04x \n",
806 id[49],
807 id[53],
808 id[63],
809 id[64],
810 id[75]);
811 DPRINTK("80==0x%04x "
812 "81==0x%04x "
813 "82==0x%04x "
814 "83==0x%04x "
815 "84==0x%04x \n",
816 id[80],
817 id[81],
818 id[82],
819 id[83],
820 id[84]);
821 DPRINTK("88==0x%04x "
822 "93==0x%04x\n",
823 id[88],
824 id[93]);
825 }
826
827 /**
828 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
829 * @id: IDENTIFY data to compute xfer mask from
830 *
831 * Compute the xfermask for this device. This is not as trivial
832 * as it seems if we must consider early devices correctly.
833 *
834 * FIXME: pre IDE drive timing (do we care ?).
835 *
836 * LOCKING:
837 * None.
838 *
839 * RETURNS:
840 * Computed xfermask
841 */
842 static unsigned int ata_id_xfermask(const u16 *id)
843 {
844 unsigned int pio_mask, mwdma_mask, udma_mask;
845
846 /* Usual case. Word 53 indicates word 64 is valid */
847 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
848 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
849 pio_mask <<= 3;
850 pio_mask |= 0x7;
851 } else {
852 /* If word 64 isn't valid then Word 51 high byte holds
853 * the PIO timing number for the maximum. Turn it into
854 * a mask.
855 */
856 pio_mask = (2 << (id[ATA_ID_OLD_PIO_MODES] & 0xFF)) - 1 ;
857
858 /* But wait.. there's more. Design your standards by
859 * committee and you too can get a free iordy field to
860 * process. However its the speeds not the modes that
861 * are supported... Note drivers using the timing API
862 * will get this right anyway
863 */
864 }
865
866 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
867
868 udma_mask = 0;
869 if (id[ATA_ID_FIELD_VALID] & (1 << 2))
870 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
871
872 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
873 }
874
875 /**
876 * ata_port_queue_task - Queue port_task
877 * @ap: The ata_port to queue port_task for
878 *
879 * Schedule @fn(@data) for execution after @delay jiffies using
880 * port_task. There is one port_task per port and it's the
881 * user(low level driver)'s responsibility to make sure that only
882 * one task is active at any given time.
883 *
884 * libata core layer takes care of synchronization between
885 * port_task and EH. ata_port_queue_task() may be ignored for EH
886 * synchronization.
887 *
888 * LOCKING:
889 * Inherited from caller.
890 */
891 void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *), void *data,
892 unsigned long delay)
893 {
894 int rc;
895
896 if (ap->flags & ATA_FLAG_FLUSH_PORT_TASK)
897 return;
898
899 PREPARE_WORK(&ap->port_task, fn, data);
900
901 if (!delay)
902 rc = queue_work(ata_wq, &ap->port_task);
903 else
904 rc = queue_delayed_work(ata_wq, &ap->port_task, delay);
905
906 /* rc == 0 means that another user is using port task */
907 WARN_ON(rc == 0);
908 }
909
910 /**
911 * ata_port_flush_task - Flush port_task
912 * @ap: The ata_port to flush port_task for
913 *
914 * After this function completes, port_task is guranteed not to
915 * be running or scheduled.
916 *
917 * LOCKING:
918 * Kernel thread context (may sleep)
919 */
920 void ata_port_flush_task(struct ata_port *ap)
921 {
922 unsigned long flags;
923
924 DPRINTK("ENTER\n");
925
926 spin_lock_irqsave(&ap->host_set->lock, flags);
927 ap->flags |= ATA_FLAG_FLUSH_PORT_TASK;
928 spin_unlock_irqrestore(&ap->host_set->lock, flags);
929
930 DPRINTK("flush #1\n");
931 flush_workqueue(ata_wq);
932
933 /*
934 * At this point, if a task is running, it's guaranteed to see
935 * the FLUSH flag; thus, it will never queue pio tasks again.
936 * Cancel and flush.
937 */
938 if (!cancel_delayed_work(&ap->port_task)) {
939 DPRINTK("flush #2\n");
940 flush_workqueue(ata_wq);
941 }
942
943 spin_lock_irqsave(&ap->host_set->lock, flags);
944 ap->flags &= ~ATA_FLAG_FLUSH_PORT_TASK;
945 spin_unlock_irqrestore(&ap->host_set->lock, flags);
946
947 DPRINTK("EXIT\n");
948 }
949
950 void ata_qc_complete_internal(struct ata_queued_cmd *qc)
951 {
952 struct completion *waiting = qc->private_data;
953
954 complete(waiting);
955 }
956
957 /**
958 * ata_exec_internal - execute libata internal command
959 * @dev: Device to which the command is sent
960 * @tf: Taskfile registers for the command and the result
961 * @cdb: CDB for packet command
962 * @dma_dir: Data tranfer direction of the command
963 * @buf: Data buffer of the command
964 * @buflen: Length of data buffer
965 *
966 * Executes libata internal command with timeout. @tf contains
967 * command on entry and result on return. Timeout and error
968 * conditions are reported via return value. No recovery action
969 * is taken after a command times out. It's caller's duty to
970 * clean up after timeout.
971 *
972 * LOCKING:
973 * None. Should be called with kernel context, might sleep.
974 */
975
976 unsigned ata_exec_internal(struct ata_device *dev,
977 struct ata_taskfile *tf, const u8 *cdb,
978 int dma_dir, void *buf, unsigned int buflen)
979 {
980 struct ata_port *ap = dev->ap;
981 u8 command = tf->command;
982 struct ata_queued_cmd *qc;
983 unsigned int tag, preempted_tag;
984 DECLARE_COMPLETION(wait);
985 unsigned long flags;
986 unsigned int err_mask;
987
988 spin_lock_irqsave(&ap->host_set->lock, flags);
989
990 /* initialize internal qc */
991
992 /* XXX: Tag 0 is used for drivers with legacy EH as some
993 * drivers choke if any other tag is given. This breaks
994 * ata_tag_internal() test for those drivers. Don't use new
995 * EH stuff without converting to it.
996 */
997 if (ap->ops->error_handler)
998 tag = ATA_TAG_INTERNAL;
999 else
1000 tag = 0;
1001
1002 if (test_and_set_bit(tag, &ap->qactive))
1003 BUG();
1004 qc = ata_qc_from_tag(ap, tag);
1005
1006 qc->tag = tag;
1007 qc->scsicmd = NULL;
1008 qc->ap = ap;
1009 qc->dev = dev;
1010 ata_qc_reinit(qc);
1011
1012 preempted_tag = ap->active_tag;
1013 ap->active_tag = ATA_TAG_POISON;
1014
1015 /* prepare & issue qc */
1016 qc->tf = *tf;
1017 if (cdb)
1018 memcpy(qc->cdb, cdb, ATAPI_CDB_LEN);
1019 qc->flags |= ATA_QCFLAG_RESULT_TF;
1020 qc->dma_dir = dma_dir;
1021 if (dma_dir != DMA_NONE) {
1022 ata_sg_init_one(qc, buf, buflen);
1023 qc->nsect = buflen / ATA_SECT_SIZE;
1024 }
1025
1026 qc->private_data = &wait;
1027 qc->complete_fn = ata_qc_complete_internal;
1028
1029 ata_qc_issue(qc);
1030
1031 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1032
1033 if (!wait_for_completion_timeout(&wait, ATA_TMOUT_INTERNAL)) {
1034 ata_port_flush_task(ap);
1035
1036 spin_lock_irqsave(&ap->host_set->lock, flags);
1037
1038 /* We're racing with irq here. If we lose, the
1039 * following test prevents us from completing the qc
1040 * again. If completion irq occurs after here but
1041 * before the caller cleans up, it will result in a
1042 * spurious interrupt. We can live with that.
1043 */
1044 if (qc->flags & ATA_QCFLAG_ACTIVE) {
1045 qc->err_mask = AC_ERR_TIMEOUT;
1046 ata_qc_complete(qc);
1047
1048 ata_dev_printk(dev, KERN_WARNING,
1049 "qc timeout (cmd 0x%x)\n", command);
1050 }
1051
1052 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1053 }
1054
1055 /* finish up */
1056 spin_lock_irqsave(&ap->host_set->lock, flags);
1057
1058 *tf = qc->result_tf;
1059 err_mask = qc->err_mask;
1060
1061 ata_qc_free(qc);
1062 ap->active_tag = preempted_tag;
1063
1064 /* XXX - Some LLDDs (sata_mv) disable port on command failure.
1065 * Until those drivers are fixed, we detect the condition
1066 * here, fail the command with AC_ERR_SYSTEM and reenable the
1067 * port.
1068 *
1069 * Note that this doesn't change any behavior as internal
1070 * command failure results in disabling the device in the
1071 * higher layer for LLDDs without new reset/EH callbacks.
1072 *
1073 * Kill the following code as soon as those drivers are fixed.
1074 */
1075 if (ap->flags & ATA_FLAG_DISABLED) {
1076 err_mask |= AC_ERR_SYSTEM;
1077 ata_port_probe(ap);
1078 }
1079
1080 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1081
1082 return err_mask;
1083 }
1084
1085 /**
1086 * ata_pio_need_iordy - check if iordy needed
1087 * @adev: ATA device
1088 *
1089 * Check if the current speed of the device requires IORDY. Used
1090 * by various controllers for chip configuration.
1091 */
1092
1093 unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1094 {
1095 int pio;
1096 int speed = adev->pio_mode - XFER_PIO_0;
1097
1098 if (speed < 2)
1099 return 0;
1100 if (speed > 2)
1101 return 1;
1102
1103 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1104
1105 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
1106 pio = adev->id[ATA_ID_EIDE_PIO];
1107 /* Is the speed faster than the drive allows non IORDY ? */
1108 if (pio) {
1109 /* This is cycle times not frequency - watch the logic! */
1110 if (pio > 240) /* PIO2 is 240nS per cycle */
1111 return 1;
1112 return 0;
1113 }
1114 }
1115 return 0;
1116 }
1117
1118 /**
1119 * ata_dev_read_id - Read ID data from the specified device
1120 * @dev: target device
1121 * @p_class: pointer to class of the target device (may be changed)
1122 * @post_reset: is this read ID post-reset?
1123 * @id: buffer to read IDENTIFY data into
1124 *
1125 * Read ID data from the specified device. ATA_CMD_ID_ATA is
1126 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
1127 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
1128 * for pre-ATA4 drives.
1129 *
1130 * LOCKING:
1131 * Kernel thread context (may sleep)
1132 *
1133 * RETURNS:
1134 * 0 on success, -errno otherwise.
1135 */
1136 static int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class,
1137 int post_reset, u16 *id)
1138 {
1139 struct ata_port *ap = dev->ap;
1140 unsigned int class = *p_class;
1141 struct ata_taskfile tf;
1142 unsigned int err_mask = 0;
1143 const char *reason;
1144 int rc;
1145
1146 DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
1147
1148 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
1149
1150 retry:
1151 ata_tf_init(dev, &tf);
1152
1153 switch (class) {
1154 case ATA_DEV_ATA:
1155 tf.command = ATA_CMD_ID_ATA;
1156 break;
1157 case ATA_DEV_ATAPI:
1158 tf.command = ATA_CMD_ID_ATAPI;
1159 break;
1160 default:
1161 rc = -ENODEV;
1162 reason = "unsupported class";
1163 goto err_out;
1164 }
1165
1166 tf.protocol = ATA_PROT_PIO;
1167
1168 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE,
1169 id, sizeof(id[0]) * ATA_ID_WORDS);
1170 if (err_mask) {
1171 rc = -EIO;
1172 reason = "I/O error";
1173 goto err_out;
1174 }
1175
1176 swap_buf_le16(id, ATA_ID_WORDS);
1177
1178 /* sanity check */
1179 if ((class == ATA_DEV_ATA) != (ata_id_is_ata(id) | ata_id_is_cfa(id))) {
1180 rc = -EINVAL;
1181 reason = "device reports illegal type";
1182 goto err_out;
1183 }
1184
1185 if (post_reset && class == ATA_DEV_ATA) {
1186 /*
1187 * The exact sequence expected by certain pre-ATA4 drives is:
1188 * SRST RESET
1189 * IDENTIFY
1190 * INITIALIZE DEVICE PARAMETERS
1191 * anything else..
1192 * Some drives were very specific about that exact sequence.
1193 */
1194 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
1195 err_mask = ata_dev_init_params(dev, id[3], id[6]);
1196 if (err_mask) {
1197 rc = -EIO;
1198 reason = "INIT_DEV_PARAMS failed";
1199 goto err_out;
1200 }
1201
1202 /* current CHS translation info (id[53-58]) might be
1203 * changed. reread the identify device info.
1204 */
1205 post_reset = 0;
1206 goto retry;
1207 }
1208 }
1209
1210 *p_class = class;
1211
1212 return 0;
1213
1214 err_out:
1215 ata_dev_printk(dev, KERN_WARNING, "failed to IDENTIFY "
1216 "(%s, err_mask=0x%x)\n", reason, err_mask);
1217 return rc;
1218 }
1219
1220 static inline u8 ata_dev_knobble(struct ata_device *dev)
1221 {
1222 return ((dev->ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
1223 }
1224
1225 /**
1226 * ata_dev_configure - Configure the specified ATA/ATAPI device
1227 * @dev: Target device to configure
1228 * @print_info: Enable device info printout
1229 *
1230 * Configure @dev according to @dev->id. Generic and low-level
1231 * driver specific fixups are also applied.
1232 *
1233 * LOCKING:
1234 * Kernel thread context (may sleep)
1235 *
1236 * RETURNS:
1237 * 0 on success, -errno otherwise
1238 */
1239 static int ata_dev_configure(struct ata_device *dev, int print_info)
1240 {
1241 struct ata_port *ap = dev->ap;
1242 const u16 *id = dev->id;
1243 unsigned int xfer_mask;
1244 int i, rc;
1245
1246 if (!ata_dev_enabled(dev)) {
1247 DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
1248 ap->id, dev->devno);
1249 return 0;
1250 }
1251
1252 DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
1253
1254 /* print device capabilities */
1255 if (print_info)
1256 ata_dev_printk(dev, KERN_DEBUG, "cfg 49:%04x 82:%04x 83:%04x "
1257 "84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
1258 id[49], id[82], id[83], id[84],
1259 id[85], id[86], id[87], id[88]);
1260
1261 /* initialize to-be-configured parameters */
1262 dev->flags &= ~ATA_DFLAG_CFG_MASK;
1263 dev->max_sectors = 0;
1264 dev->cdb_len = 0;
1265 dev->n_sectors = 0;
1266 dev->cylinders = 0;
1267 dev->heads = 0;
1268 dev->sectors = 0;
1269
1270 /*
1271 * common ATA, ATAPI feature tests
1272 */
1273
1274 /* find max transfer mode; for printk only */
1275 xfer_mask = ata_id_xfermask(id);
1276
1277 ata_dump_id(id);
1278
1279 /* ATA-specific feature tests */
1280 if (dev->class == ATA_DEV_ATA) {
1281 dev->n_sectors = ata_id_n_sectors(id);
1282
1283 if (ata_id_has_lba(id)) {
1284 const char *lba_desc;
1285
1286 lba_desc = "LBA";
1287 dev->flags |= ATA_DFLAG_LBA;
1288 if (ata_id_has_lba48(id)) {
1289 dev->flags |= ATA_DFLAG_LBA48;
1290 lba_desc = "LBA48";
1291 }
1292
1293 /* print device info to dmesg */
1294 if (print_info)
1295 ata_dev_printk(dev, KERN_INFO, "ATA-%d, "
1296 "max %s, %Lu sectors: %s\n",
1297 ata_id_major_version(id),
1298 ata_mode_string(xfer_mask),
1299 (unsigned long long)dev->n_sectors,
1300 lba_desc);
1301 } else {
1302 /* CHS */
1303
1304 /* Default translation */
1305 dev->cylinders = id[1];
1306 dev->heads = id[3];
1307 dev->sectors = id[6];
1308
1309 if (ata_id_current_chs_valid(id)) {
1310 /* Current CHS translation is valid. */
1311 dev->cylinders = id[54];
1312 dev->heads = id[55];
1313 dev->sectors = id[56];
1314 }
1315
1316 /* print device info to dmesg */
1317 if (print_info)
1318 ata_dev_printk(dev, KERN_INFO, "ATA-%d, "
1319 "max %s, %Lu sectors: CHS %u/%u/%u\n",
1320 ata_id_major_version(id),
1321 ata_mode_string(xfer_mask),
1322 (unsigned long long)dev->n_sectors,
1323 dev->cylinders, dev->heads, dev->sectors);
1324 }
1325
1326 dev->cdb_len = 16;
1327 }
1328
1329 /* ATAPI-specific feature tests */
1330 else if (dev->class == ATA_DEV_ATAPI) {
1331 rc = atapi_cdb_len(id);
1332 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1333 ata_dev_printk(dev, KERN_WARNING,
1334 "unsupported CDB len\n");
1335 rc = -EINVAL;
1336 goto err_out_nosup;
1337 }
1338 dev->cdb_len = (unsigned int) rc;
1339
1340 /* print device info to dmesg */
1341 if (print_info)
1342 ata_dev_printk(dev, KERN_INFO, "ATAPI, max %s\n",
1343 ata_mode_string(xfer_mask));
1344 }
1345
1346 ap->host->max_cmd_len = 0;
1347 for (i = 0; i < ATA_MAX_DEVICES; i++)
1348 ap->host->max_cmd_len = max_t(unsigned int,
1349 ap->host->max_cmd_len,
1350 ap->device[i].cdb_len);
1351
1352 /* limit bridge transfers to udma5, 200 sectors */
1353 if (ata_dev_knobble(dev)) {
1354 if (print_info)
1355 ata_dev_printk(dev, KERN_INFO,
1356 "applying bridge limits\n");
1357 dev->udma_mask &= ATA_UDMA5;
1358 dev->max_sectors = ATA_MAX_SECTORS;
1359 }
1360
1361 if (ap->ops->dev_config)
1362 ap->ops->dev_config(ap, dev);
1363
1364 DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
1365 return 0;
1366
1367 err_out_nosup:
1368 DPRINTK("EXIT, err\n");
1369 return rc;
1370 }
1371
1372 /**
1373 * ata_bus_probe - Reset and probe ATA bus
1374 * @ap: Bus to probe
1375 *
1376 * Master ATA bus probing function. Initiates a hardware-dependent
1377 * bus reset, then attempts to identify any devices found on
1378 * the bus.
1379 *
1380 * LOCKING:
1381 * PCI/etc. bus probe sem.
1382 *
1383 * RETURNS:
1384 * Zero on success, negative errno otherwise.
1385 */
1386
1387 static int ata_bus_probe(struct ata_port *ap)
1388 {
1389 unsigned int classes[ATA_MAX_DEVICES];
1390 int tries[ATA_MAX_DEVICES];
1391 int i, rc, down_xfermask;
1392 struct ata_device *dev;
1393
1394 ata_port_probe(ap);
1395
1396 for (i = 0; i < ATA_MAX_DEVICES; i++)
1397 tries[i] = ATA_PROBE_MAX_TRIES;
1398
1399 retry:
1400 down_xfermask = 0;
1401
1402 /* reset and determine device classes */
1403 for (i = 0; i < ATA_MAX_DEVICES; i++)
1404 classes[i] = ATA_DEV_UNKNOWN;
1405
1406 if (ap->ops->probe_reset) {
1407 rc = ap->ops->probe_reset(ap, classes);
1408 if (rc) {
1409 ata_port_printk(ap, KERN_ERR,
1410 "reset failed (errno=%d)\n", rc);
1411 return rc;
1412 }
1413 } else {
1414 ap->ops->phy_reset(ap);
1415
1416 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1417 if (!(ap->flags & ATA_FLAG_DISABLED))
1418 classes[i] = ap->device[i].class;
1419 ap->device[i].class = ATA_DEV_UNKNOWN;
1420 }
1421
1422 ata_port_probe(ap);
1423 }
1424
1425 for (i = 0; i < ATA_MAX_DEVICES; i++)
1426 if (classes[i] == ATA_DEV_UNKNOWN)
1427 classes[i] = ATA_DEV_NONE;
1428
1429 /* read IDENTIFY page and configure devices */
1430 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1431 dev = &ap->device[i];
1432
1433 if (tries[i])
1434 dev->class = classes[i];
1435
1436 if (!ata_dev_enabled(dev))
1437 continue;
1438
1439 rc = ata_dev_read_id(dev, &dev->class, 1, dev->id);
1440 if (rc)
1441 goto fail;
1442
1443 rc = ata_dev_configure(dev, 1);
1444 if (rc)
1445 goto fail;
1446 }
1447
1448 /* configure transfer mode */
1449 rc = ata_set_mode(ap, &dev);
1450 if (rc) {
1451 down_xfermask = 1;
1452 goto fail;
1453 }
1454
1455 for (i = 0; i < ATA_MAX_DEVICES; i++)
1456 if (ata_dev_enabled(&ap->device[i]))
1457 return 0;
1458
1459 /* no device present, disable port */
1460 ata_port_disable(ap);
1461 ap->ops->port_disable(ap);
1462 return -ENODEV;
1463
1464 fail:
1465 switch (rc) {
1466 case -EINVAL:
1467 case -ENODEV:
1468 tries[dev->devno] = 0;
1469 break;
1470 case -EIO:
1471 sata_down_spd_limit(ap);
1472 /* fall through */
1473 default:
1474 tries[dev->devno]--;
1475 if (down_xfermask &&
1476 ata_down_xfermask_limit(dev, tries[dev->devno] == 1))
1477 tries[dev->devno] = 0;
1478 }
1479
1480 if (!tries[dev->devno]) {
1481 ata_down_xfermask_limit(dev, 1);
1482 ata_dev_disable(dev);
1483 }
1484
1485 goto retry;
1486 }
1487
1488 /**
1489 * ata_port_probe - Mark port as enabled
1490 * @ap: Port for which we indicate enablement
1491 *
1492 * Modify @ap data structure such that the system
1493 * thinks that the entire port is enabled.
1494 *
1495 * LOCKING: host_set lock, or some other form of
1496 * serialization.
1497 */
1498
1499 void ata_port_probe(struct ata_port *ap)
1500 {
1501 ap->flags &= ~ATA_FLAG_DISABLED;
1502 }
1503
1504 /**
1505 * sata_print_link_status - Print SATA link status
1506 * @ap: SATA port to printk link status about
1507 *
1508 * This function prints link speed and status of a SATA link.
1509 *
1510 * LOCKING:
1511 * None.
1512 */
1513 static void sata_print_link_status(struct ata_port *ap)
1514 {
1515 u32 sstatus, scontrol, tmp;
1516
1517 if (sata_scr_read(ap, SCR_STATUS, &sstatus))
1518 return;
1519 sata_scr_read(ap, SCR_CONTROL, &scontrol);
1520
1521 if (ata_port_online(ap)) {
1522 tmp = (sstatus >> 4) & 0xf;
1523 ata_port_printk(ap, KERN_INFO,
1524 "SATA link up %s (SStatus %X SControl %X)\n",
1525 sata_spd_string(tmp), sstatus, scontrol);
1526 } else {
1527 ata_port_printk(ap, KERN_INFO,
1528 "SATA link down (SStatus %X SControl %X)\n",
1529 sstatus, scontrol);
1530 }
1531 }
1532
1533 /**
1534 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1535 * @ap: SATA port associated with target SATA PHY.
1536 *
1537 * This function issues commands to standard SATA Sxxx
1538 * PHY registers, to wake up the phy (and device), and
1539 * clear any reset condition.
1540 *
1541 * LOCKING:
1542 * PCI/etc. bus probe sem.
1543 *
1544 */
1545 void __sata_phy_reset(struct ata_port *ap)
1546 {
1547 u32 sstatus;
1548 unsigned long timeout = jiffies + (HZ * 5);
1549
1550 if (ap->flags & ATA_FLAG_SATA_RESET) {
1551 /* issue phy wake/reset */
1552 sata_scr_write_flush(ap, SCR_CONTROL, 0x301);
1553 /* Couldn't find anything in SATA I/II specs, but
1554 * AHCI-1.1 10.4.2 says at least 1 ms. */
1555 mdelay(1);
1556 }
1557 /* phy wake/clear reset */
1558 sata_scr_write_flush(ap, SCR_CONTROL, 0x300);
1559
1560 /* wait for phy to become ready, if necessary */
1561 do {
1562 msleep(200);
1563 sata_scr_read(ap, SCR_STATUS, &sstatus);
1564 if ((sstatus & 0xf) != 1)
1565 break;
1566 } while (time_before(jiffies, timeout));
1567
1568 /* print link status */
1569 sata_print_link_status(ap);
1570
1571 /* TODO: phy layer with polling, timeouts, etc. */
1572 if (!ata_port_offline(ap))
1573 ata_port_probe(ap);
1574 else
1575 ata_port_disable(ap);
1576
1577 if (ap->flags & ATA_FLAG_DISABLED)
1578 return;
1579
1580 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1581 ata_port_disable(ap);
1582 return;
1583 }
1584
1585 ap->cbl = ATA_CBL_SATA;
1586 }
1587
1588 /**
1589 * sata_phy_reset - Reset SATA bus.
1590 * @ap: SATA port associated with target SATA PHY.
1591 *
1592 * This function resets the SATA bus, and then probes
1593 * the bus for devices.
1594 *
1595 * LOCKING:
1596 * PCI/etc. bus probe sem.
1597 *
1598 */
1599 void sata_phy_reset(struct ata_port *ap)
1600 {
1601 __sata_phy_reset(ap);
1602 if (ap->flags & ATA_FLAG_DISABLED)
1603 return;
1604 ata_bus_reset(ap);
1605 }
1606
1607 /**
1608 * ata_dev_pair - return other device on cable
1609 * @adev: device
1610 *
1611 * Obtain the other device on the same cable, or if none is
1612 * present NULL is returned
1613 */
1614
1615 struct ata_device *ata_dev_pair(struct ata_device *adev)
1616 {
1617 struct ata_port *ap = adev->ap;
1618 struct ata_device *pair = &ap->device[1 - adev->devno];
1619 if (!ata_dev_enabled(pair))
1620 return NULL;
1621 return pair;
1622 }
1623
1624 /**
1625 * ata_port_disable - Disable port.
1626 * @ap: Port to be disabled.
1627 *
1628 * Modify @ap data structure such that the system
1629 * thinks that the entire port is disabled, and should
1630 * never attempt to probe or communicate with devices
1631 * on this port.
1632 *
1633 * LOCKING: host_set lock, or some other form of
1634 * serialization.
1635 */
1636
1637 void ata_port_disable(struct ata_port *ap)
1638 {
1639 ap->device[0].class = ATA_DEV_NONE;
1640 ap->device[1].class = ATA_DEV_NONE;
1641 ap->flags |= ATA_FLAG_DISABLED;
1642 }
1643
1644 /**
1645 * sata_down_spd_limit - adjust SATA spd limit downward
1646 * @ap: Port to adjust SATA spd limit for
1647 *
1648 * Adjust SATA spd limit of @ap downward. Note that this
1649 * function only adjusts the limit. The change must be applied
1650 * using sata_set_spd().
1651 *
1652 * LOCKING:
1653 * Inherited from caller.
1654 *
1655 * RETURNS:
1656 * 0 on success, negative errno on failure
1657 */
1658 int sata_down_spd_limit(struct ata_port *ap)
1659 {
1660 u32 sstatus, spd, mask;
1661 int rc, highbit;
1662
1663 rc = sata_scr_read(ap, SCR_STATUS, &sstatus);
1664 if (rc)
1665 return rc;
1666
1667 mask = ap->sata_spd_limit;
1668 if (mask <= 1)
1669 return -EINVAL;
1670 highbit = fls(mask) - 1;
1671 mask &= ~(1 << highbit);
1672
1673 spd = (sstatus >> 4) & 0xf;
1674 if (spd <= 1)
1675 return -EINVAL;
1676 spd--;
1677 mask &= (1 << spd) - 1;
1678 if (!mask)
1679 return -EINVAL;
1680
1681 ap->sata_spd_limit = mask;
1682
1683 ata_port_printk(ap, KERN_WARNING, "limiting SATA link speed to %s\n",
1684 sata_spd_string(fls(mask)));
1685
1686 return 0;
1687 }
1688
1689 static int __sata_set_spd_needed(struct ata_port *ap, u32 *scontrol)
1690 {
1691 u32 spd, limit;
1692
1693 if (ap->sata_spd_limit == UINT_MAX)
1694 limit = 0;
1695 else
1696 limit = fls(ap->sata_spd_limit);
1697
1698 spd = (*scontrol >> 4) & 0xf;
1699 *scontrol = (*scontrol & ~0xf0) | ((limit & 0xf) << 4);
1700
1701 return spd != limit;
1702 }
1703
1704 /**
1705 * sata_set_spd_needed - is SATA spd configuration needed
1706 * @ap: Port in question
1707 *
1708 * Test whether the spd limit in SControl matches
1709 * @ap->sata_spd_limit. This function is used to determine
1710 * whether hardreset is necessary to apply SATA spd
1711 * configuration.
1712 *
1713 * LOCKING:
1714 * Inherited from caller.
1715 *
1716 * RETURNS:
1717 * 1 if SATA spd configuration is needed, 0 otherwise.
1718 */
1719 int sata_set_spd_needed(struct ata_port *ap)
1720 {
1721 u32 scontrol;
1722
1723 if (sata_scr_read(ap, SCR_CONTROL, &scontrol))
1724 return 0;
1725
1726 return __sata_set_spd_needed(ap, &scontrol);
1727 }
1728
1729 /**
1730 * sata_set_spd - set SATA spd according to spd limit
1731 * @ap: Port to set SATA spd for
1732 *
1733 * Set SATA spd of @ap according to sata_spd_limit.
1734 *
1735 * LOCKING:
1736 * Inherited from caller.
1737 *
1738 * RETURNS:
1739 * 0 if spd doesn't need to be changed, 1 if spd has been
1740 * changed. Negative errno if SCR registers are inaccessible.
1741 */
1742 int sata_set_spd(struct ata_port *ap)
1743 {
1744 u32 scontrol;
1745 int rc;
1746
1747 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
1748 return rc;
1749
1750 if (!__sata_set_spd_needed(ap, &scontrol))
1751 return 0;
1752
1753 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
1754 return rc;
1755
1756 return 1;
1757 }
1758
1759 /*
1760 * This mode timing computation functionality is ported over from
1761 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
1762 */
1763 /*
1764 * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
1765 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
1766 * for PIO 5, which is a nonstandard extension and UDMA6, which
1767 * is currently supported only by Maxtor drives.
1768 */
1769
1770 static const struct ata_timing ata_timing[] = {
1771
1772 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
1773 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
1774 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
1775 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
1776
1777 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
1778 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
1779 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
1780
1781 /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
1782
1783 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
1784 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
1785 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
1786
1787 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
1788 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
1789 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
1790
1791 /* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */
1792 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
1793 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
1794
1795 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
1796 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
1797 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
1798
1799 /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
1800
1801 { 0xFF }
1802 };
1803
1804 #define ENOUGH(v,unit) (((v)-1)/(unit)+1)
1805 #define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
1806
1807 static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
1808 {
1809 q->setup = EZ(t->setup * 1000, T);
1810 q->act8b = EZ(t->act8b * 1000, T);
1811 q->rec8b = EZ(t->rec8b * 1000, T);
1812 q->cyc8b = EZ(t->cyc8b * 1000, T);
1813 q->active = EZ(t->active * 1000, T);
1814 q->recover = EZ(t->recover * 1000, T);
1815 q->cycle = EZ(t->cycle * 1000, T);
1816 q->udma = EZ(t->udma * 1000, UT);
1817 }
1818
1819 void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
1820 struct ata_timing *m, unsigned int what)
1821 {
1822 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
1823 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
1824 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
1825 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
1826 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
1827 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
1828 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
1829 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
1830 }
1831
1832 static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
1833 {
1834 const struct ata_timing *t;
1835
1836 for (t = ata_timing; t->mode != speed; t++)
1837 if (t->mode == 0xFF)
1838 return NULL;
1839 return t;
1840 }
1841
1842 int ata_timing_compute(struct ata_device *adev, unsigned short speed,
1843 struct ata_timing *t, int T, int UT)
1844 {
1845 const struct ata_timing *s;
1846 struct ata_timing p;
1847
1848 /*
1849 * Find the mode.
1850 */
1851
1852 if (!(s = ata_timing_find_mode(speed)))
1853 return -EINVAL;
1854
1855 memcpy(t, s, sizeof(*s));
1856
1857 /*
1858 * If the drive is an EIDE drive, it can tell us it needs extended
1859 * PIO/MW_DMA cycle timing.
1860 */
1861
1862 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
1863 memset(&p, 0, sizeof(p));
1864 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
1865 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
1866 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
1867 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
1868 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
1869 }
1870 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
1871 }
1872
1873 /*
1874 * Convert the timing to bus clock counts.
1875 */
1876
1877 ata_timing_quantize(t, t, T, UT);
1878
1879 /*
1880 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
1881 * S.M.A.R.T * and some other commands. We have to ensure that the
1882 * DMA cycle timing is slower/equal than the fastest PIO timing.
1883 */
1884
1885 if (speed > XFER_PIO_4) {
1886 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
1887 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
1888 }
1889
1890 /*
1891 * Lengthen active & recovery time so that cycle time is correct.
1892 */
1893
1894 if (t->act8b + t->rec8b < t->cyc8b) {
1895 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
1896 t->rec8b = t->cyc8b - t->act8b;
1897 }
1898
1899 if (t->active + t->recover < t->cycle) {
1900 t->active += (t->cycle - (t->active + t->recover)) / 2;
1901 t->recover = t->cycle - t->active;
1902 }
1903
1904 return 0;
1905 }
1906
1907 /**
1908 * ata_down_xfermask_limit - adjust dev xfer masks downward
1909 * @dev: Device to adjust xfer masks
1910 * @force_pio0: Force PIO0
1911 *
1912 * Adjust xfer masks of @dev downward. Note that this function
1913 * does not apply the change. Invoking ata_set_mode() afterwards
1914 * will apply the limit.
1915 *
1916 * LOCKING:
1917 * Inherited from caller.
1918 *
1919 * RETURNS:
1920 * 0 on success, negative errno on failure
1921 */
1922 int ata_down_xfermask_limit(struct ata_device *dev, int force_pio0)
1923 {
1924 unsigned long xfer_mask;
1925 int highbit;
1926
1927 xfer_mask = ata_pack_xfermask(dev->pio_mask, dev->mwdma_mask,
1928 dev->udma_mask);
1929
1930 if (!xfer_mask)
1931 goto fail;
1932 /* don't gear down to MWDMA from UDMA, go directly to PIO */
1933 if (xfer_mask & ATA_MASK_UDMA)
1934 xfer_mask &= ~ATA_MASK_MWDMA;
1935
1936 highbit = fls(xfer_mask) - 1;
1937 xfer_mask &= ~(1 << highbit);
1938 if (force_pio0)
1939 xfer_mask &= 1 << ATA_SHIFT_PIO;
1940 if (!xfer_mask)
1941 goto fail;
1942
1943 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
1944 &dev->udma_mask);
1945
1946 ata_dev_printk(dev, KERN_WARNING, "limiting speed to %s\n",
1947 ata_mode_string(xfer_mask));
1948
1949 return 0;
1950
1951 fail:
1952 return -EINVAL;
1953 }
1954
1955 static int ata_dev_set_mode(struct ata_device *dev)
1956 {
1957 unsigned int err_mask;
1958 int rc;
1959
1960 dev->flags &= ~ATA_DFLAG_PIO;
1961 if (dev->xfer_shift == ATA_SHIFT_PIO)
1962 dev->flags |= ATA_DFLAG_PIO;
1963
1964 err_mask = ata_dev_set_xfermode(dev);
1965 if (err_mask) {
1966 ata_dev_printk(dev, KERN_ERR, "failed to set xfermode "
1967 "(err_mask=0x%x)\n", err_mask);
1968 return -EIO;
1969 }
1970
1971 rc = ata_dev_revalidate(dev, 0);
1972 if (rc)
1973 return rc;
1974
1975 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
1976 dev->xfer_shift, (int)dev->xfer_mode);
1977
1978 ata_dev_printk(dev, KERN_INFO, "configured for %s\n",
1979 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
1980 return 0;
1981 }
1982
1983 /**
1984 * ata_set_mode - Program timings and issue SET FEATURES - XFER
1985 * @ap: port on which timings will be programmed
1986 * @r_failed_dev: out paramter for failed device
1987 *
1988 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If
1989 * ata_set_mode() fails, pointer to the failing device is
1990 * returned in @r_failed_dev.
1991 *
1992 * LOCKING:
1993 * PCI/etc. bus probe sem.
1994 *
1995 * RETURNS:
1996 * 0 on success, negative errno otherwise
1997 */
1998 int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev)
1999 {
2000 struct ata_device *dev;
2001 int i, rc = 0, used_dma = 0, found = 0;
2002
2003 /* has private set_mode? */
2004 if (ap->ops->set_mode) {
2005 /* FIXME: make ->set_mode handle no device case and
2006 * return error code and failing device on failure.
2007 */
2008 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2009 if (ata_dev_enabled(&ap->device[i])) {
2010 ap->ops->set_mode(ap);
2011 break;
2012 }
2013 }
2014 return 0;
2015 }
2016
2017 /* step 1: calculate xfer_mask */
2018 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2019 unsigned int pio_mask, dma_mask;
2020
2021 dev = &ap->device[i];
2022
2023 if (!ata_dev_enabled(dev))
2024 continue;
2025
2026 ata_dev_xfermask(dev);
2027
2028 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
2029 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
2030 dev->pio_mode = ata_xfer_mask2mode(pio_mask);
2031 dev->dma_mode = ata_xfer_mask2mode(dma_mask);
2032
2033 found = 1;
2034 if (dev->dma_mode)
2035 used_dma = 1;
2036 }
2037 if (!found)
2038 goto out;
2039
2040 /* step 2: always set host PIO timings */
2041 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2042 dev = &ap->device[i];
2043 if (!ata_dev_enabled(dev))
2044 continue;
2045
2046 if (!dev->pio_mode) {
2047 ata_dev_printk(dev, KERN_WARNING, "no PIO support\n");
2048 rc = -EINVAL;
2049 goto out;
2050 }
2051
2052 dev->xfer_mode = dev->pio_mode;
2053 dev->xfer_shift = ATA_SHIFT_PIO;
2054 if (ap->ops->set_piomode)
2055 ap->ops->set_piomode(ap, dev);
2056 }
2057
2058 /* step 3: set host DMA timings */
2059 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2060 dev = &ap->device[i];
2061
2062 if (!ata_dev_enabled(dev) || !dev->dma_mode)
2063 continue;
2064
2065 dev->xfer_mode = dev->dma_mode;
2066 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
2067 if (ap->ops->set_dmamode)
2068 ap->ops->set_dmamode(ap, dev);
2069 }
2070
2071 /* step 4: update devices' xfer mode */
2072 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2073 dev = &ap->device[i];
2074
2075 if (!ata_dev_enabled(dev))
2076 continue;
2077
2078 rc = ata_dev_set_mode(dev);
2079 if (rc)
2080 goto out;
2081 }
2082
2083 /* Record simplex status. If we selected DMA then the other
2084 * host channels are not permitted to do so.
2085 */
2086 if (used_dma && (ap->host_set->flags & ATA_HOST_SIMPLEX))
2087 ap->host_set->simplex_claimed = 1;
2088
2089 /* step5: chip specific finalisation */
2090 if (ap->ops->post_set_mode)
2091 ap->ops->post_set_mode(ap);
2092
2093 out:
2094 if (rc)
2095 *r_failed_dev = dev;
2096 return rc;
2097 }
2098
2099 /**
2100 * ata_tf_to_host - issue ATA taskfile to host controller
2101 * @ap: port to which command is being issued
2102 * @tf: ATA taskfile register set
2103 *
2104 * Issues ATA taskfile register set to ATA host controller,
2105 * with proper synchronization with interrupt handler and
2106 * other threads.
2107 *
2108 * LOCKING:
2109 * spin_lock_irqsave(host_set lock)
2110 */
2111
2112 static inline void ata_tf_to_host(struct ata_port *ap,
2113 const struct ata_taskfile *tf)
2114 {
2115 ap->ops->tf_load(ap, tf);
2116 ap->ops->exec_command(ap, tf);
2117 }
2118
2119 /**
2120 * ata_busy_sleep - sleep until BSY clears, or timeout
2121 * @ap: port containing status register to be polled
2122 * @tmout_pat: impatience timeout
2123 * @tmout: overall timeout
2124 *
2125 * Sleep until ATA Status register bit BSY clears,
2126 * or a timeout occurs.
2127 *
2128 * LOCKING: None.
2129 */
2130
2131 unsigned int ata_busy_sleep (struct ata_port *ap,
2132 unsigned long tmout_pat, unsigned long tmout)
2133 {
2134 unsigned long timer_start, timeout;
2135 u8 status;
2136
2137 status = ata_busy_wait(ap, ATA_BUSY, 300);
2138 timer_start = jiffies;
2139 timeout = timer_start + tmout_pat;
2140 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
2141 msleep(50);
2142 status = ata_busy_wait(ap, ATA_BUSY, 3);
2143 }
2144
2145 if (status & ATA_BUSY)
2146 ata_port_printk(ap, KERN_WARNING,
2147 "port is slow to respond, please be patient\n");
2148
2149 timeout = timer_start + tmout;
2150 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
2151 msleep(50);
2152 status = ata_chk_status(ap);
2153 }
2154
2155 if (status & ATA_BUSY) {
2156 ata_port_printk(ap, KERN_ERR, "port failed to respond "
2157 "(%lu secs)\n", tmout / HZ);
2158 return 1;
2159 }
2160
2161 return 0;
2162 }
2163
2164 static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
2165 {
2166 struct ata_ioports *ioaddr = &ap->ioaddr;
2167 unsigned int dev0 = devmask & (1 << 0);
2168 unsigned int dev1 = devmask & (1 << 1);
2169 unsigned long timeout;
2170
2171 /* if device 0 was found in ata_devchk, wait for its
2172 * BSY bit to clear
2173 */
2174 if (dev0)
2175 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2176
2177 /* if device 1 was found in ata_devchk, wait for
2178 * register access, then wait for BSY to clear
2179 */
2180 timeout = jiffies + ATA_TMOUT_BOOT;
2181 while (dev1) {
2182 u8 nsect, lbal;
2183
2184 ap->ops->dev_select(ap, 1);
2185 if (ap->flags & ATA_FLAG_MMIO) {
2186 nsect = readb((void __iomem *) ioaddr->nsect_addr);
2187 lbal = readb((void __iomem *) ioaddr->lbal_addr);
2188 } else {
2189 nsect = inb(ioaddr->nsect_addr);
2190 lbal = inb(ioaddr->lbal_addr);
2191 }
2192 if ((nsect == 1) && (lbal == 1))
2193 break;
2194 if (time_after(jiffies, timeout)) {
2195 dev1 = 0;
2196 break;
2197 }
2198 msleep(50); /* give drive a breather */
2199 }
2200 if (dev1)
2201 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2202
2203 /* is all this really necessary? */
2204 ap->ops->dev_select(ap, 0);
2205 if (dev1)
2206 ap->ops->dev_select(ap, 1);
2207 if (dev0)
2208 ap->ops->dev_select(ap, 0);
2209 }
2210
2211 static unsigned int ata_bus_softreset(struct ata_port *ap,
2212 unsigned int devmask)
2213 {
2214 struct ata_ioports *ioaddr = &ap->ioaddr;
2215
2216 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
2217
2218 /* software reset. causes dev0 to be selected */
2219 if (ap->flags & ATA_FLAG_MMIO) {
2220 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2221 udelay(20); /* FIXME: flush */
2222 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
2223 udelay(20); /* FIXME: flush */
2224 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2225 } else {
2226 outb(ap->ctl, ioaddr->ctl_addr);
2227 udelay(10);
2228 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
2229 udelay(10);
2230 outb(ap->ctl, ioaddr->ctl_addr);
2231 }
2232
2233 /* spec mandates ">= 2ms" before checking status.
2234 * We wait 150ms, because that was the magic delay used for
2235 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
2236 * between when the ATA command register is written, and then
2237 * status is checked. Because waiting for "a while" before
2238 * checking status is fine, post SRST, we perform this magic
2239 * delay here as well.
2240 *
2241 * Old drivers/ide uses the 2mS rule and then waits for ready
2242 */
2243 msleep(150);
2244
2245 /* Before we perform post reset processing we want to see if
2246 * the bus shows 0xFF because the odd clown forgets the D7
2247 * pulldown resistor.
2248 */
2249 if (ata_check_status(ap) == 0xFF) {
2250 ata_port_printk(ap, KERN_ERR, "SRST failed (status 0xFF)\n");
2251 return AC_ERR_OTHER;
2252 }
2253
2254 ata_bus_post_reset(ap, devmask);
2255
2256 return 0;
2257 }
2258
2259 /**
2260 * ata_bus_reset - reset host port and associated ATA channel
2261 * @ap: port to reset
2262 *
2263 * This is typically the first time we actually start issuing
2264 * commands to the ATA channel. We wait for BSY to clear, then
2265 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2266 * result. Determine what devices, if any, are on the channel
2267 * by looking at the device 0/1 error register. Look at the signature
2268 * stored in each device's taskfile registers, to determine if
2269 * the device is ATA or ATAPI.
2270 *
2271 * LOCKING:
2272 * PCI/etc. bus probe sem.
2273 * Obtains host_set lock.
2274 *
2275 * SIDE EFFECTS:
2276 * Sets ATA_FLAG_DISABLED if bus reset fails.
2277 */
2278
2279 void ata_bus_reset(struct ata_port *ap)
2280 {
2281 struct ata_ioports *ioaddr = &ap->ioaddr;
2282 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2283 u8 err;
2284 unsigned int dev0, dev1 = 0, devmask = 0;
2285
2286 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
2287
2288 /* determine if device 0/1 are present */
2289 if (ap->flags & ATA_FLAG_SATA_RESET)
2290 dev0 = 1;
2291 else {
2292 dev0 = ata_devchk(ap, 0);
2293 if (slave_possible)
2294 dev1 = ata_devchk(ap, 1);
2295 }
2296
2297 if (dev0)
2298 devmask |= (1 << 0);
2299 if (dev1)
2300 devmask |= (1 << 1);
2301
2302 /* select device 0 again */
2303 ap->ops->dev_select(ap, 0);
2304
2305 /* issue bus reset */
2306 if (ap->flags & ATA_FLAG_SRST)
2307 if (ata_bus_softreset(ap, devmask))
2308 goto err_out;
2309
2310 /*
2311 * determine by signature whether we have ATA or ATAPI devices
2312 */
2313 ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
2314 if ((slave_possible) && (err != 0x81))
2315 ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
2316
2317 /* re-enable interrupts */
2318 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2319 ata_irq_on(ap);
2320
2321 /* is double-select really necessary? */
2322 if (ap->device[1].class != ATA_DEV_NONE)
2323 ap->ops->dev_select(ap, 1);
2324 if (ap->device[0].class != ATA_DEV_NONE)
2325 ap->ops->dev_select(ap, 0);
2326
2327 /* if no devices were detected, disable this port */
2328 if ((ap->device[0].class == ATA_DEV_NONE) &&
2329 (ap->device[1].class == ATA_DEV_NONE))
2330 goto err_out;
2331
2332 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2333 /* set up device control for ATA_FLAG_SATA_RESET */
2334 if (ap->flags & ATA_FLAG_MMIO)
2335 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2336 else
2337 outb(ap->ctl, ioaddr->ctl_addr);
2338 }
2339
2340 DPRINTK("EXIT\n");
2341 return;
2342
2343 err_out:
2344 ata_port_printk(ap, KERN_ERR, "disabling port\n");
2345 ap->ops->port_disable(ap);
2346
2347 DPRINTK("EXIT\n");
2348 }
2349
2350 static int sata_phy_resume(struct ata_port *ap)
2351 {
2352 unsigned long timeout = jiffies + (HZ * 5);
2353 u32 scontrol, sstatus;
2354 int rc;
2355
2356 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2357 return rc;
2358
2359 scontrol = (scontrol & 0x0f0) | 0x300;
2360
2361 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
2362 return rc;
2363
2364 /* Wait for phy to become ready, if necessary. */
2365 do {
2366 msleep(200);
2367 if ((rc = sata_scr_read(ap, SCR_STATUS, &sstatus)))
2368 return rc;
2369 if ((sstatus & 0xf) != 1)
2370 return 0;
2371 } while (time_before(jiffies, timeout));
2372
2373 return -EBUSY;
2374 }
2375
2376 /**
2377 * ata_std_probeinit - initialize probing
2378 * @ap: port to be probed
2379 *
2380 * @ap is about to be probed. Initialize it. This function is
2381 * to be used as standard callback for ata_drive_probe_reset().
2382 *
2383 * NOTE!!! Do not use this function as probeinit if a low level
2384 * driver implements only hardreset. Just pass NULL as probeinit
2385 * in that case. Using this function is probably okay but doing
2386 * so makes reset sequence different from the original
2387 * ->phy_reset implementation and Jeff nervous. :-P
2388 */
2389 void ata_std_probeinit(struct ata_port *ap)
2390 {
2391 u32 scontrol;
2392
2393 /* resume link */
2394 sata_phy_resume(ap);
2395
2396 /* init sata_spd_limit to the current value */
2397 if (sata_scr_read(ap, SCR_CONTROL, &scontrol) == 0) {
2398 int spd = (scontrol >> 4) & 0xf;
2399 ap->sata_spd_limit &= (1 << spd) - 1;
2400 }
2401
2402 /* wait for device */
2403 if (ata_port_online(ap))
2404 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2405 }
2406
2407 /**
2408 * ata_std_softreset - reset host port via ATA SRST
2409 * @ap: port to reset
2410 * @classes: resulting classes of attached devices
2411 *
2412 * Reset host port using ATA SRST. This function is to be used
2413 * as standard callback for ata_drive_*_reset() functions.
2414 *
2415 * LOCKING:
2416 * Kernel thread context (may sleep)
2417 *
2418 * RETURNS:
2419 * 0 on success, -errno otherwise.
2420 */
2421 int ata_std_softreset(struct ata_port *ap, unsigned int *classes)
2422 {
2423 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2424 unsigned int devmask = 0, err_mask;
2425 u8 err;
2426
2427 DPRINTK("ENTER\n");
2428
2429 if (ata_port_offline(ap)) {
2430 classes[0] = ATA_DEV_NONE;
2431 goto out;
2432 }
2433
2434 /* determine if device 0/1 are present */
2435 if (ata_devchk(ap, 0))
2436 devmask |= (1 << 0);
2437 if (slave_possible && ata_devchk(ap, 1))
2438 devmask |= (1 << 1);
2439
2440 /* select device 0 again */
2441 ap->ops->dev_select(ap, 0);
2442
2443 /* issue bus reset */
2444 DPRINTK("about to softreset, devmask=%x\n", devmask);
2445 err_mask = ata_bus_softreset(ap, devmask);
2446 if (err_mask) {
2447 ata_port_printk(ap, KERN_ERR, "SRST failed (err_mask=0x%x)\n",
2448 err_mask);
2449 return -EIO;
2450 }
2451
2452 /* determine by signature whether we have ATA or ATAPI devices */
2453 classes[0] = ata_dev_try_classify(ap, 0, &err);
2454 if (slave_possible && err != 0x81)
2455 classes[1] = ata_dev_try_classify(ap, 1, &err);
2456
2457 out:
2458 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
2459 return 0;
2460 }
2461
2462 /**
2463 * sata_std_hardreset - reset host port via SATA phy reset
2464 * @ap: port to reset
2465 * @class: resulting class of attached device
2466 *
2467 * SATA phy-reset host port using DET bits of SControl register.
2468 * This function is to be used as standard callback for
2469 * ata_drive_*_reset().
2470 *
2471 * LOCKING:
2472 * Kernel thread context (may sleep)
2473 *
2474 * RETURNS:
2475 * 0 on success, -errno otherwise.
2476 */
2477 int sata_std_hardreset(struct ata_port *ap, unsigned int *class)
2478 {
2479 u32 scontrol;
2480 int rc;
2481
2482 DPRINTK("ENTER\n");
2483
2484 if (sata_set_spd_needed(ap)) {
2485 /* SATA spec says nothing about how to reconfigure
2486 * spd. To be on the safe side, turn off phy during
2487 * reconfiguration. This works for at least ICH7 AHCI
2488 * and Sil3124.
2489 */
2490 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2491 return rc;
2492
2493 scontrol = (scontrol & 0x0f0) | 0x302;
2494
2495 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
2496 return rc;
2497
2498 sata_set_spd(ap);
2499 }
2500
2501 /* issue phy wake/reset */
2502 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2503 return rc;
2504
2505 scontrol = (scontrol & 0x0f0) | 0x301;
2506
2507 if ((rc = sata_scr_write_flush(ap, SCR_CONTROL, scontrol)))
2508 return rc;
2509
2510 /* Couldn't find anything in SATA I/II specs, but AHCI-1.1
2511 * 10.4.2 says at least 1 ms.
2512 */
2513 msleep(1);
2514
2515 /* bring phy back */
2516 sata_phy_resume(ap);
2517
2518 /* TODO: phy layer with polling, timeouts, etc. */
2519 if (ata_port_offline(ap)) {
2520 *class = ATA_DEV_NONE;
2521 DPRINTK("EXIT, link offline\n");
2522 return 0;
2523 }
2524
2525 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
2526 ata_port_printk(ap, KERN_ERR,
2527 "COMRESET failed (device not ready)\n");
2528 return -EIO;
2529 }
2530
2531 ap->ops->dev_select(ap, 0); /* probably unnecessary */
2532
2533 *class = ata_dev_try_classify(ap, 0, NULL);
2534
2535 DPRINTK("EXIT, class=%u\n", *class);
2536 return 0;
2537 }
2538
2539 /**
2540 * ata_std_postreset - standard postreset callback
2541 * @ap: the target ata_port
2542 * @classes: classes of attached devices
2543 *
2544 * This function is invoked after a successful reset. Note that
2545 * the device might have been reset more than once using
2546 * different reset methods before postreset is invoked.
2547 *
2548 * This function is to be used as standard callback for
2549 * ata_drive_*_reset().
2550 *
2551 * LOCKING:
2552 * Kernel thread context (may sleep)
2553 */
2554 void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
2555 {
2556 u32 serror;
2557
2558 DPRINTK("ENTER\n");
2559
2560 /* print link status */
2561 sata_print_link_status(ap);
2562
2563 /* clear SError */
2564 if (sata_scr_read(ap, SCR_ERROR, &serror) == 0)
2565 sata_scr_write(ap, SCR_ERROR, serror);
2566
2567 /* re-enable interrupts */
2568 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2569 ata_irq_on(ap);
2570
2571 /* is double-select really necessary? */
2572 if (classes[0] != ATA_DEV_NONE)
2573 ap->ops->dev_select(ap, 1);
2574 if (classes[1] != ATA_DEV_NONE)
2575 ap->ops->dev_select(ap, 0);
2576
2577 /* bail out if no device is present */
2578 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
2579 DPRINTK("EXIT, no device\n");
2580 return;
2581 }
2582
2583 /* set up device control */
2584 if (ap->ioaddr.ctl_addr) {
2585 if (ap->flags & ATA_FLAG_MMIO)
2586 writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
2587 else
2588 outb(ap->ctl, ap->ioaddr.ctl_addr);
2589 }
2590
2591 DPRINTK("EXIT\n");
2592 }
2593
2594 /**
2595 * ata_std_probe_reset - standard probe reset method
2596 * @ap: prot to perform probe-reset
2597 * @classes: resulting classes of attached devices
2598 *
2599 * The stock off-the-shelf ->probe_reset method.
2600 *
2601 * LOCKING:
2602 * Kernel thread context (may sleep)
2603 *
2604 * RETURNS:
2605 * 0 on success, -errno otherwise.
2606 */
2607 int ata_std_probe_reset(struct ata_port *ap, unsigned int *classes)
2608 {
2609 ata_reset_fn_t hardreset;
2610
2611 hardreset = NULL;
2612 if (sata_scr_valid(ap))
2613 hardreset = sata_std_hardreset;
2614
2615 return ata_drive_probe_reset(ap, ata_std_probeinit,
2616 ata_std_softreset, hardreset,
2617 ata_std_postreset, classes);
2618 }
2619
2620 int ata_do_reset(struct ata_port *ap, ata_reset_fn_t reset,
2621 unsigned int *classes)
2622 {
2623 int i, rc;
2624
2625 for (i = 0; i < ATA_MAX_DEVICES; i++)
2626 classes[i] = ATA_DEV_UNKNOWN;
2627
2628 rc = reset(ap, classes);
2629 if (rc)
2630 return rc;
2631
2632 /* If any class isn't ATA_DEV_UNKNOWN, consider classification
2633 * is complete and convert all ATA_DEV_UNKNOWN to
2634 * ATA_DEV_NONE.
2635 */
2636 for (i = 0; i < ATA_MAX_DEVICES; i++)
2637 if (classes[i] != ATA_DEV_UNKNOWN)
2638 break;
2639
2640 if (i < ATA_MAX_DEVICES)
2641 for (i = 0; i < ATA_MAX_DEVICES; i++)
2642 if (classes[i] == ATA_DEV_UNKNOWN)
2643 classes[i] = ATA_DEV_NONE;
2644
2645 return 0;
2646 }
2647
2648 /**
2649 * ata_drive_probe_reset - Perform probe reset with given methods
2650 * @ap: port to reset
2651 * @probeinit: probeinit method (can be NULL)
2652 * @softreset: softreset method (can be NULL)
2653 * @hardreset: hardreset method (can be NULL)
2654 * @postreset: postreset method (can be NULL)
2655 * @classes: resulting classes of attached devices
2656 *
2657 * Reset the specified port and classify attached devices using
2658 * given methods. This function prefers softreset but tries all
2659 * possible reset sequences to reset and classify devices. This
2660 * function is intended to be used for constructing ->probe_reset
2661 * callback by low level drivers.
2662 *
2663 * Reset methods should follow the following rules.
2664 *
2665 * - Return 0 on sucess, -errno on failure.
2666 * - If classification is supported, fill classes[] with
2667 * recognized class codes.
2668 * - If classification is not supported, leave classes[] alone.
2669 *
2670 * LOCKING:
2671 * Kernel thread context (may sleep)
2672 *
2673 * RETURNS:
2674 * 0 on success, -EINVAL if no reset method is avaliable, -ENODEV
2675 * if classification fails, and any error code from reset
2676 * methods.
2677 */
2678 int ata_drive_probe_reset(struct ata_port *ap, ata_probeinit_fn_t probeinit,
2679 ata_reset_fn_t softreset, ata_reset_fn_t hardreset,
2680 ata_postreset_fn_t postreset, unsigned int *classes)
2681 {
2682 int rc = -EINVAL;
2683
2684 if (probeinit)
2685 probeinit(ap);
2686
2687 if (softreset && !sata_set_spd_needed(ap)) {
2688 rc = ata_do_reset(ap, softreset, classes);
2689 if (rc == 0 && classes[0] != ATA_DEV_UNKNOWN)
2690 goto done;
2691 ata_port_printk(ap, KERN_INFO, "softreset failed, "
2692 "will try hardreset in 5 secs\n");
2693 ssleep(5);
2694 }
2695
2696 if (!hardreset)
2697 goto done;
2698
2699 while (1) {
2700 rc = ata_do_reset(ap, hardreset, classes);
2701 if (rc == 0) {
2702 if (classes[0] != ATA_DEV_UNKNOWN)
2703 goto done;
2704 break;
2705 }
2706
2707 if (sata_down_spd_limit(ap))
2708 goto done;
2709
2710 ata_port_printk(ap, KERN_INFO, "hardreset failed, "
2711 "will retry in 5 secs\n");
2712 ssleep(5);
2713 }
2714
2715 if (softreset) {
2716 ata_port_printk(ap, KERN_INFO,
2717 "hardreset succeeded without classification, "
2718 "will retry softreset in 5 secs\n");
2719 ssleep(5);
2720
2721 rc = ata_do_reset(ap, softreset, classes);
2722 }
2723
2724 done:
2725 if (rc == 0) {
2726 if (postreset)
2727 postreset(ap, classes);
2728 if (classes[0] == ATA_DEV_UNKNOWN)
2729 rc = -ENODEV;
2730 }
2731 return rc;
2732 }
2733
2734 /**
2735 * ata_dev_same_device - Determine whether new ID matches configured device
2736 * @dev: device to compare against
2737 * @new_class: class of the new device
2738 * @new_id: IDENTIFY page of the new device
2739 *
2740 * Compare @new_class and @new_id against @dev and determine
2741 * whether @dev is the device indicated by @new_class and
2742 * @new_id.
2743 *
2744 * LOCKING:
2745 * None.
2746 *
2747 * RETURNS:
2748 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
2749 */
2750 static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class,
2751 const u16 *new_id)
2752 {
2753 const u16 *old_id = dev->id;
2754 unsigned char model[2][41], serial[2][21];
2755 u64 new_n_sectors;
2756
2757 if (dev->class != new_class) {
2758 ata_dev_printk(dev, KERN_INFO, "class mismatch %d != %d\n",
2759 dev->class, new_class);
2760 return 0;
2761 }
2762
2763 ata_id_c_string(old_id, model[0], ATA_ID_PROD_OFS, sizeof(model[0]));
2764 ata_id_c_string(new_id, model[1], ATA_ID_PROD_OFS, sizeof(model[1]));
2765 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO_OFS, sizeof(serial[0]));
2766 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO_OFS, sizeof(serial[1]));
2767 new_n_sectors = ata_id_n_sectors(new_id);
2768
2769 if (strcmp(model[0], model[1])) {
2770 ata_dev_printk(dev, KERN_INFO, "model number mismatch "
2771 "'%s' != '%s'\n", model[0], model[1]);
2772 return 0;
2773 }
2774
2775 if (strcmp(serial[0], serial[1])) {
2776 ata_dev_printk(dev, KERN_INFO, "serial number mismatch "
2777 "'%s' != '%s'\n", serial[0], serial[1]);
2778 return 0;
2779 }
2780
2781 if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) {
2782 ata_dev_printk(dev, KERN_INFO, "n_sectors mismatch "
2783 "%llu != %llu\n",
2784 (unsigned long long)dev->n_sectors,
2785 (unsigned long long)new_n_sectors);
2786 return 0;
2787 }
2788
2789 return 1;
2790 }
2791
2792 /**
2793 * ata_dev_revalidate - Revalidate ATA device
2794 * @dev: device to revalidate
2795 * @post_reset: is this revalidation after reset?
2796 *
2797 * Re-read IDENTIFY page and make sure @dev is still attached to
2798 * the port.
2799 *
2800 * LOCKING:
2801 * Kernel thread context (may sleep)
2802 *
2803 * RETURNS:
2804 * 0 on success, negative errno otherwise
2805 */
2806 int ata_dev_revalidate(struct ata_device *dev, int post_reset)
2807 {
2808 unsigned int class = dev->class;
2809 u16 *id = (void *)dev->ap->sector_buf;
2810 int rc;
2811
2812 if (!ata_dev_enabled(dev)) {
2813 rc = -ENODEV;
2814 goto fail;
2815 }
2816
2817 /* read ID data */
2818 rc = ata_dev_read_id(dev, &class, post_reset, id);
2819 if (rc)
2820 goto fail;
2821
2822 /* is the device still there? */
2823 if (!ata_dev_same_device(dev, class, id)) {
2824 rc = -ENODEV;
2825 goto fail;
2826 }
2827
2828 memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS);
2829
2830 /* configure device according to the new ID */
2831 rc = ata_dev_configure(dev, 0);
2832 if (rc == 0)
2833 return 0;
2834
2835 fail:
2836 ata_dev_printk(dev, KERN_ERR, "revalidation failed (errno=%d)\n", rc);
2837 return rc;
2838 }
2839
2840 static const char * const ata_dma_blacklist [] = {
2841 "WDC AC11000H", NULL,
2842 "WDC AC22100H", NULL,
2843 "WDC AC32500H", NULL,
2844 "WDC AC33100H", NULL,
2845 "WDC AC31600H", NULL,
2846 "WDC AC32100H", "24.09P07",
2847 "WDC AC23200L", "21.10N21",
2848 "Compaq CRD-8241B", NULL,
2849 "CRD-8400B", NULL,
2850 "CRD-8480B", NULL,
2851 "CRD-8482B", NULL,
2852 "CRD-84", NULL,
2853 "SanDisk SDP3B", NULL,
2854 "SanDisk SDP3B-64", NULL,
2855 "SANYO CD-ROM CRD", NULL,
2856 "HITACHI CDR-8", NULL,
2857 "HITACHI CDR-8335", NULL,
2858 "HITACHI CDR-8435", NULL,
2859 "Toshiba CD-ROM XM-6202B", NULL,
2860 "TOSHIBA CD-ROM XM-1702BC", NULL,
2861 "CD-532E-A", NULL,
2862 "E-IDE CD-ROM CR-840", NULL,
2863 "CD-ROM Drive/F5A", NULL,
2864 "WPI CDD-820", NULL,
2865 "SAMSUNG CD-ROM SC-148C", NULL,
2866 "SAMSUNG CD-ROM SC", NULL,
2867 "SanDisk SDP3B-64", NULL,
2868 "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,
2869 "_NEC DV5800A", NULL,
2870 "SAMSUNG CD-ROM SN-124", "N001"
2871 };
2872
2873 static int ata_strim(char *s, size_t len)
2874 {
2875 len = strnlen(s, len);
2876
2877 /* ATAPI specifies that empty space is blank-filled; remove blanks */
2878 while ((len > 0) && (s[len - 1] == ' ')) {
2879 len--;
2880 s[len] = 0;
2881 }
2882 return len;
2883 }
2884
2885 static int ata_dma_blacklisted(const struct ata_device *dev)
2886 {
2887 unsigned char model_num[40];
2888 unsigned char model_rev[16];
2889 unsigned int nlen, rlen;
2890 int i;
2891
2892 ata_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
2893 sizeof(model_num));
2894 ata_id_string(dev->id, model_rev, ATA_ID_FW_REV_OFS,
2895 sizeof(model_rev));
2896 nlen = ata_strim(model_num, sizeof(model_num));
2897 rlen = ata_strim(model_rev, sizeof(model_rev));
2898
2899 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i += 2) {
2900 if (!strncmp(ata_dma_blacklist[i], model_num, nlen)) {
2901 if (ata_dma_blacklist[i+1] == NULL)
2902 return 1;
2903 if (!strncmp(ata_dma_blacklist[i], model_rev, rlen))
2904 return 1;
2905 }
2906 }
2907 return 0;
2908 }
2909
2910 /**
2911 * ata_dev_xfermask - Compute supported xfermask of the given device
2912 * @dev: Device to compute xfermask for
2913 *
2914 * Compute supported xfermask of @dev and store it in
2915 * dev->*_mask. This function is responsible for applying all
2916 * known limits including host controller limits, device
2917 * blacklist, etc...
2918 *
2919 * FIXME: The current implementation limits all transfer modes to
2920 * the fastest of the lowested device on the port. This is not
2921 * required on most controllers.
2922 *
2923 * LOCKING:
2924 * None.
2925 */
2926 static void ata_dev_xfermask(struct ata_device *dev)
2927 {
2928 struct ata_port *ap = dev->ap;
2929 struct ata_host_set *hs = ap->host_set;
2930 unsigned long xfer_mask;
2931 int i;
2932
2933 xfer_mask = ata_pack_xfermask(ap->pio_mask,
2934 ap->mwdma_mask, ap->udma_mask);
2935
2936 /* Apply cable rule here. Don't apply it early because when
2937 * we handle hot plug the cable type can itself change.
2938 */
2939 if (ap->cbl == ATA_CBL_PATA40)
2940 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
2941
2942 /* FIXME: Use port-wide xfermask for now */
2943 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2944 struct ata_device *d = &ap->device[i];
2945
2946 if (ata_dev_absent(d))
2947 continue;
2948
2949 if (ata_dev_disabled(d)) {
2950 /* to avoid violating device selection timing */
2951 xfer_mask &= ata_pack_xfermask(d->pio_mask,
2952 UINT_MAX, UINT_MAX);
2953 continue;
2954 }
2955
2956 xfer_mask &= ata_pack_xfermask(d->pio_mask,
2957 d->mwdma_mask, d->udma_mask);
2958 xfer_mask &= ata_id_xfermask(d->id);
2959 if (ata_dma_blacklisted(d))
2960 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
2961 }
2962
2963 if (ata_dma_blacklisted(dev))
2964 ata_dev_printk(dev, KERN_WARNING,
2965 "device is on DMA blacklist, disabling DMA\n");
2966
2967 if (hs->flags & ATA_HOST_SIMPLEX) {
2968 if (hs->simplex_claimed)
2969 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
2970 }
2971
2972 if (ap->ops->mode_filter)
2973 xfer_mask = ap->ops->mode_filter(ap, dev, xfer_mask);
2974
2975 ata_unpack_xfermask(xfer_mask, &dev->pio_mask,
2976 &dev->mwdma_mask, &dev->udma_mask);
2977 }
2978
2979 /**
2980 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
2981 * @dev: Device to which command will be sent
2982 *
2983 * Issue SET FEATURES - XFER MODE command to device @dev
2984 * on port @ap.
2985 *
2986 * LOCKING:
2987 * PCI/etc. bus probe sem.
2988 *
2989 * RETURNS:
2990 * 0 on success, AC_ERR_* mask otherwise.
2991 */
2992
2993 static unsigned int ata_dev_set_xfermode(struct ata_device *dev)
2994 {
2995 struct ata_taskfile tf;
2996 unsigned int err_mask;
2997
2998 /* set up set-features taskfile */
2999 DPRINTK("set features - xfer mode\n");
3000
3001 ata_tf_init(dev, &tf);
3002 tf.command = ATA_CMD_SET_FEATURES;
3003 tf.feature = SETFEATURES_XFER;
3004 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
3005 tf.protocol = ATA_PROT_NODATA;
3006 tf.nsect = dev->xfer_mode;
3007
3008 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
3009
3010 DPRINTK("EXIT, err_mask=%x\n", err_mask);
3011 return err_mask;
3012 }
3013
3014 /**
3015 * ata_dev_init_params - Issue INIT DEV PARAMS command
3016 * @dev: Device to which command will be sent
3017 * @heads: Number of heads
3018 * @sectors: Number of sectors
3019 *
3020 * LOCKING:
3021 * Kernel thread context (may sleep)
3022 *
3023 * RETURNS:
3024 * 0 on success, AC_ERR_* mask otherwise.
3025 */
3026 static unsigned int ata_dev_init_params(struct ata_device *dev,
3027 u16 heads, u16 sectors)
3028 {
3029 struct ata_taskfile tf;
3030 unsigned int err_mask;
3031
3032 /* Number of sectors per track 1-255. Number of heads 1-16 */
3033 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
3034 return AC_ERR_INVALID;
3035
3036 /* set up init dev params taskfile */
3037 DPRINTK("init dev params \n");
3038
3039 ata_tf_init(dev, &tf);
3040 tf.command = ATA_CMD_INIT_DEV_PARAMS;
3041 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
3042 tf.protocol = ATA_PROT_NODATA;
3043 tf.nsect = sectors;
3044 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
3045
3046 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
3047
3048 DPRINTK("EXIT, err_mask=%x\n", err_mask);
3049 return err_mask;
3050 }
3051
3052 /**
3053 * ata_sg_clean - Unmap DMA memory associated with command
3054 * @qc: Command containing DMA memory to be released
3055 *
3056 * Unmap all mapped DMA memory associated with this command.
3057 *
3058 * LOCKING:
3059 * spin_lock_irqsave(host_set lock)
3060 */
3061
3062 static void ata_sg_clean(struct ata_queued_cmd *qc)
3063 {
3064 struct ata_port *ap = qc->ap;
3065 struct scatterlist *sg = qc->__sg;
3066 int dir = qc->dma_dir;
3067 void *pad_buf = NULL;
3068
3069 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
3070 WARN_ON(sg == NULL);
3071
3072 if (qc->flags & ATA_QCFLAG_SINGLE)
3073 WARN_ON(qc->n_elem > 1);
3074
3075 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
3076
3077 /* if we padded the buffer out to 32-bit bound, and data
3078 * xfer direction is from-device, we must copy from the
3079 * pad buffer back into the supplied buffer
3080 */
3081 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
3082 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3083
3084 if (qc->flags & ATA_QCFLAG_SG) {
3085 if (qc->n_elem)
3086 dma_unmap_sg(ap->dev, sg, qc->n_elem, dir);
3087 /* restore last sg */
3088 sg[qc->orig_n_elem - 1].length += qc->pad_len;
3089 if (pad_buf) {
3090 struct scatterlist *psg = &qc->pad_sgent;
3091 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3092 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
3093 kunmap_atomic(addr, KM_IRQ0);
3094 }
3095 } else {
3096 if (qc->n_elem)
3097 dma_unmap_single(ap->dev,
3098 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
3099 dir);
3100 /* restore sg */
3101 sg->length += qc->pad_len;
3102 if (pad_buf)
3103 memcpy(qc->buf_virt + sg->length - qc->pad_len,
3104 pad_buf, qc->pad_len);
3105 }
3106
3107 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3108 qc->__sg = NULL;
3109 }
3110
3111 /**
3112 * ata_fill_sg - Fill PCI IDE PRD table
3113 * @qc: Metadata associated with taskfile to be transferred
3114 *
3115 * Fill PCI IDE PRD (scatter-gather) table with segments
3116 * associated with the current disk command.
3117 *
3118 * LOCKING:
3119 * spin_lock_irqsave(host_set lock)
3120 *
3121 */
3122 static void ata_fill_sg(struct ata_queued_cmd *qc)
3123 {
3124 struct ata_port *ap = qc->ap;
3125 struct scatterlist *sg;
3126 unsigned int idx;
3127
3128 WARN_ON(qc->__sg == NULL);
3129 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
3130
3131 idx = 0;
3132 ata_for_each_sg(sg, qc) {
3133 u32 addr, offset;
3134 u32 sg_len, len;
3135
3136 /* determine if physical DMA addr spans 64K boundary.
3137 * Note h/w doesn't support 64-bit, so we unconditionally
3138 * truncate dma_addr_t to u32.
3139 */
3140 addr = (u32) sg_dma_address(sg);
3141 sg_len = sg_dma_len(sg);
3142
3143 while (sg_len) {
3144 offset = addr & 0xffff;
3145 len = sg_len;
3146 if ((offset + sg_len) > 0x10000)
3147 len = 0x10000 - offset;
3148
3149 ap->prd[idx].addr = cpu_to_le32(addr);
3150 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
3151 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
3152
3153 idx++;
3154 sg_len -= len;
3155 addr += len;
3156 }
3157 }
3158
3159 if (idx)
3160 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
3161 }
3162 /**
3163 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
3164 * @qc: Metadata associated with taskfile to check
3165 *
3166 * Allow low-level driver to filter ATA PACKET commands, returning
3167 * a status indicating whether or not it is OK to use DMA for the
3168 * supplied PACKET command.
3169 *
3170 * LOCKING:
3171 * spin_lock_irqsave(host_set lock)
3172 *
3173 * RETURNS: 0 when ATAPI DMA can be used
3174 * nonzero otherwise
3175 */
3176 int ata_check_atapi_dma(struct ata_queued_cmd *qc)
3177 {
3178 struct ata_port *ap = qc->ap;
3179 int rc = 0; /* Assume ATAPI DMA is OK by default */
3180
3181 if (ap->ops->check_atapi_dma)
3182 rc = ap->ops->check_atapi_dma(qc);
3183
3184 return rc;
3185 }
3186 /**
3187 * ata_qc_prep - Prepare taskfile for submission
3188 * @qc: Metadata associated with taskfile to be prepared
3189 *
3190 * Prepare ATA taskfile for submission.
3191 *
3192 * LOCKING:
3193 * spin_lock_irqsave(host_set lock)
3194 */
3195 void ata_qc_prep(struct ata_queued_cmd *qc)
3196 {
3197 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
3198 return;
3199
3200 ata_fill_sg(qc);
3201 }
3202
3203 void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
3204
3205 /**
3206 * ata_sg_init_one - Associate command with memory buffer
3207 * @qc: Command to be associated
3208 * @buf: Memory buffer
3209 * @buflen: Length of memory buffer, in bytes.
3210 *
3211 * Initialize the data-related elements of queued_cmd @qc
3212 * to point to a single memory buffer, @buf of byte length @buflen.
3213 *
3214 * LOCKING:
3215 * spin_lock_irqsave(host_set lock)
3216 */
3217
3218 void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
3219 {
3220 struct scatterlist *sg;
3221
3222 qc->flags |= ATA_QCFLAG_SINGLE;
3223
3224 memset(&qc->sgent, 0, sizeof(qc->sgent));
3225 qc->__sg = &qc->sgent;
3226 qc->n_elem = 1;
3227 qc->orig_n_elem = 1;
3228 qc->buf_virt = buf;
3229
3230 sg = qc->__sg;
3231 sg_init_one(sg, buf, buflen);
3232 }
3233
3234 /**
3235 * ata_sg_init - Associate command with scatter-gather table.
3236 * @qc: Command to be associated
3237 * @sg: Scatter-gather table.
3238 * @n_elem: Number of elements in s/g table.
3239 *
3240 * Initialize the data-related elements of queued_cmd @qc
3241 * to point to a scatter-gather table @sg, containing @n_elem
3242 * elements.
3243 *
3244 * LOCKING:
3245 * spin_lock_irqsave(host_set lock)
3246 */
3247
3248 void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
3249 unsigned int n_elem)
3250 {
3251 qc->flags |= ATA_QCFLAG_SG;
3252 qc->__sg = sg;
3253 qc->n_elem = n_elem;
3254 qc->orig_n_elem = n_elem;
3255 }
3256
3257 /**
3258 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
3259 * @qc: Command with memory buffer to be mapped.
3260 *
3261 * DMA-map the memory buffer associated with queued_cmd @qc.
3262 *
3263 * LOCKING:
3264 * spin_lock_irqsave(host_set lock)
3265 *
3266 * RETURNS:
3267 * Zero on success, negative on error.
3268 */
3269
3270 static int ata_sg_setup_one(struct ata_queued_cmd *qc)
3271 {
3272 struct ata_port *ap = qc->ap;
3273 int dir = qc->dma_dir;
3274 struct scatterlist *sg = qc->__sg;
3275 dma_addr_t dma_address;
3276 int trim_sg = 0;
3277
3278 /* we must lengthen transfers to end on a 32-bit boundary */
3279 qc->pad_len = sg->length & 3;
3280 if (qc->pad_len) {
3281 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3282 struct scatterlist *psg = &qc->pad_sgent;
3283
3284 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
3285
3286 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3287
3288 if (qc->tf.flags & ATA_TFLAG_WRITE)
3289 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
3290 qc->pad_len);
3291
3292 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3293 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3294 /* trim sg */
3295 sg->length -= qc->pad_len;
3296 if (sg->length == 0)
3297 trim_sg = 1;
3298
3299 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
3300 sg->length, qc->pad_len);
3301 }
3302
3303 if (trim_sg) {
3304 qc->n_elem--;
3305 goto skip_map;
3306 }
3307
3308 dma_address = dma_map_single(ap->dev, qc->buf_virt,
3309 sg->length, dir);
3310 if (dma_mapping_error(dma_address)) {
3311 /* restore sg */
3312 sg->length += qc->pad_len;
3313 return -1;
3314 }
3315
3316 sg_dma_address(sg) = dma_address;
3317 sg_dma_len(sg) = sg->length;
3318
3319 skip_map:
3320 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
3321 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3322
3323 return 0;
3324 }
3325
3326 /**
3327 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
3328 * @qc: Command with scatter-gather table to be mapped.
3329 *
3330 * DMA-map the scatter-gather table associated with queued_cmd @qc.
3331 *
3332 * LOCKING:
3333 * spin_lock_irqsave(host_set lock)
3334 *
3335 * RETURNS:
3336 * Zero on success, negative on error.
3337 *
3338 */
3339
3340 static int ata_sg_setup(struct ata_queued_cmd *qc)
3341 {
3342 struct ata_port *ap = qc->ap;
3343 struct scatterlist *sg = qc->__sg;
3344 struct scatterlist *lsg = &sg[qc->n_elem - 1];
3345 int n_elem, pre_n_elem, dir, trim_sg = 0;
3346
3347 VPRINTK("ENTER, ata%u\n", ap->id);
3348 WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
3349
3350 /* we must lengthen transfers to end on a 32-bit boundary */
3351 qc->pad_len = lsg->length & 3;
3352 if (qc->pad_len) {
3353 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3354 struct scatterlist *psg = &qc->pad_sgent;
3355 unsigned int offset;
3356
3357 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
3358
3359 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3360
3361 /*
3362 * psg->page/offset are used to copy to-be-written
3363 * data in this function or read data in ata_sg_clean.
3364 */
3365 offset = lsg->offset + lsg->length - qc->pad_len;
3366 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
3367 psg->offset = offset_in_page(offset);
3368
3369 if (qc->tf.flags & ATA_TFLAG_WRITE) {
3370 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3371 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
3372 kunmap_atomic(addr, KM_IRQ0);
3373 }
3374
3375 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3376 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3377 /* trim last sg */
3378 lsg->length -= qc->pad_len;
3379 if (lsg->length == 0)
3380 trim_sg = 1;
3381
3382 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
3383 qc->n_elem - 1, lsg->length, qc->pad_len);
3384 }
3385
3386 pre_n_elem = qc->n_elem;
3387 if (trim_sg && pre_n_elem)
3388 pre_n_elem--;
3389
3390 if (!pre_n_elem) {
3391 n_elem = 0;
3392 goto skip_map;
3393 }
3394
3395 dir = qc->dma_dir;
3396 n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir);
3397 if (n_elem < 1) {
3398 /* restore last sg */
3399 lsg->length += qc->pad_len;
3400 return -1;
3401 }
3402
3403 DPRINTK("%d sg elements mapped\n", n_elem);
3404
3405 skip_map:
3406 qc->n_elem = n_elem;
3407
3408 return 0;
3409 }
3410
3411 /**
3412 * ata_poll_qc_complete - turn irq back on and finish qc
3413 * @qc: Command to complete
3414 * @err_mask: ATA status register content
3415 *
3416 * LOCKING:
3417 * None. (grabs host lock)
3418 */
3419
3420 void ata_poll_qc_complete(struct ata_queued_cmd *qc)
3421 {
3422 struct ata_port *ap = qc->ap;
3423 unsigned long flags;
3424
3425 spin_lock_irqsave(&ap->host_set->lock, flags);
3426 ap->flags &= ~ATA_FLAG_NOINTR;
3427 ata_irq_on(ap);
3428 ata_qc_complete(qc);
3429 spin_unlock_irqrestore(&ap->host_set->lock, flags);
3430 }
3431
3432 /**
3433 * ata_pio_poll - poll using PIO, depending on current state
3434 * @qc: qc in progress
3435 *
3436 * LOCKING:
3437 * None. (executing in kernel thread context)
3438 *
3439 * RETURNS:
3440 * timeout value to use
3441 */
3442 static unsigned long ata_pio_poll(struct ata_queued_cmd *qc)
3443 {
3444 struct ata_port *ap = qc->ap;
3445 u8 status;
3446 unsigned int poll_state = HSM_ST_UNKNOWN;
3447 unsigned int reg_state = HSM_ST_UNKNOWN;
3448
3449 switch (ap->hsm_task_state) {
3450 case HSM_ST:
3451 case HSM_ST_POLL:
3452 poll_state = HSM_ST_POLL;
3453 reg_state = HSM_ST;
3454 break;
3455 case HSM_ST_LAST:
3456 case HSM_ST_LAST_POLL:
3457 poll_state = HSM_ST_LAST_POLL;
3458 reg_state = HSM_ST_LAST;
3459 break;
3460 default:
3461 BUG();
3462 break;
3463 }
3464
3465 status = ata_chk_status(ap);
3466 if (status & ATA_BUSY) {
3467 if (time_after(jiffies, ap->pio_task_timeout)) {
3468 qc->err_mask |= AC_ERR_TIMEOUT;
3469 ap->hsm_task_state = HSM_ST_TMOUT;
3470 return 0;
3471 }
3472 ap->hsm_task_state = poll_state;
3473 return ATA_SHORT_PAUSE;
3474 }
3475
3476 ap->hsm_task_state = reg_state;
3477 return 0;
3478 }
3479
3480 /**
3481 * ata_pio_complete - check if drive is busy or idle
3482 * @qc: qc to complete
3483 *
3484 * LOCKING:
3485 * None. (executing in kernel thread context)
3486 *
3487 * RETURNS:
3488 * Non-zero if qc completed, zero otherwise.
3489 */
3490 static int ata_pio_complete(struct ata_queued_cmd *qc)
3491 {
3492 struct ata_port *ap = qc->ap;
3493 u8 drv_stat;
3494
3495 /*
3496 * This is purely heuristic. This is a fast path. Sometimes when
3497 * we enter, BSY will be cleared in a chk-status or two. If not,
3498 * the drive is probably seeking or something. Snooze for a couple
3499 * msecs, then chk-status again. If still busy, fall back to
3500 * HSM_ST_POLL state.
3501 */
3502 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
3503 if (drv_stat & ATA_BUSY) {
3504 msleep(2);
3505 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
3506 if (drv_stat & ATA_BUSY) {
3507 ap->hsm_task_state = HSM_ST_LAST_POLL;
3508 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
3509 return 0;
3510 }
3511 }
3512
3513 drv_stat = ata_wait_idle(ap);
3514 if (!ata_ok(drv_stat)) {
3515 qc->err_mask |= __ac_err_mask(drv_stat);
3516 ap->hsm_task_state = HSM_ST_ERR;
3517 return 0;
3518 }
3519
3520 ap->hsm_task_state = HSM_ST_IDLE;
3521
3522 WARN_ON(qc->err_mask);
3523 ata_poll_qc_complete(qc);
3524
3525 /* another command may start at this point */
3526
3527 return 1;
3528 }
3529
3530
3531 /**
3532 * swap_buf_le16 - swap halves of 16-bit words in place
3533 * @buf: Buffer to swap
3534 * @buf_words: Number of 16-bit words in buffer.
3535 *
3536 * Swap halves of 16-bit words if needed to convert from
3537 * little-endian byte order to native cpu byte order, or
3538 * vice-versa.
3539 *
3540 * LOCKING:
3541 * Inherited from caller.
3542 */
3543 void swap_buf_le16(u16 *buf, unsigned int buf_words)
3544 {
3545 #ifdef __BIG_ENDIAN
3546 unsigned int i;
3547
3548 for (i = 0; i < buf_words; i++)
3549 buf[i] = le16_to_cpu(buf[i]);
3550 #endif /* __BIG_ENDIAN */
3551 }
3552
3553 /**
3554 * ata_mmio_data_xfer - Transfer data by MMIO
3555 * @ap: port to read/write
3556 * @buf: data buffer
3557 * @buflen: buffer length
3558 * @write_data: read/write
3559 *
3560 * Transfer data from/to the device data register by MMIO.
3561 *
3562 * LOCKING:
3563 * Inherited from caller.
3564 */
3565
3566 static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
3567 unsigned int buflen, int write_data)
3568 {
3569 unsigned int i;
3570 unsigned int words = buflen >> 1;
3571 u16 *buf16 = (u16 *) buf;
3572 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
3573
3574 /* Transfer multiple of 2 bytes */
3575 if (write_data) {
3576 for (i = 0; i < words; i++)
3577 writew(le16_to_cpu(buf16[i]), mmio);
3578 } else {
3579 for (i = 0; i < words; i++)
3580 buf16[i] = cpu_to_le16(readw(mmio));
3581 }
3582
3583 /* Transfer trailing 1 byte, if any. */
3584 if (unlikely(buflen & 0x01)) {
3585 u16 align_buf[1] = { 0 };
3586 unsigned char *trailing_buf = buf + buflen - 1;
3587
3588 if (write_data) {
3589 memcpy(align_buf, trailing_buf, 1);
3590 writew(le16_to_cpu(align_buf[0]), mmio);
3591 } else {
3592 align_buf[0] = cpu_to_le16(readw(mmio));
3593 memcpy(trailing_buf, align_buf, 1);
3594 }
3595 }
3596 }
3597
3598 /**
3599 * ata_pio_data_xfer - Transfer data by PIO
3600 * @ap: port to read/write
3601 * @buf: data buffer
3602 * @buflen: buffer length
3603 * @write_data: read/write
3604 *
3605 * Transfer data from/to the device data register by PIO.
3606 *
3607 * LOCKING:
3608 * Inherited from caller.
3609 */
3610
3611 static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
3612 unsigned int buflen, int write_data)
3613 {
3614 unsigned int words = buflen >> 1;
3615
3616 /* Transfer multiple of 2 bytes */
3617 if (write_data)
3618 outsw(ap->ioaddr.data_addr, buf, words);
3619 else
3620 insw(ap->ioaddr.data_addr, buf, words);
3621
3622 /* Transfer trailing 1 byte, if any. */
3623 if (unlikely(buflen & 0x01)) {
3624 u16 align_buf[1] = { 0 };
3625 unsigned char *trailing_buf = buf + buflen - 1;
3626
3627 if (write_data) {
3628 memcpy(align_buf, trailing_buf, 1);
3629 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
3630 } else {
3631 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
3632 memcpy(trailing_buf, align_buf, 1);
3633 }
3634 }
3635 }
3636
3637 /**
3638 * ata_data_xfer - Transfer data from/to the data register.
3639 * @ap: port to read/write
3640 * @buf: data buffer
3641 * @buflen: buffer length
3642 * @do_write: read/write
3643 *
3644 * Transfer data from/to the device data register.
3645 *
3646 * LOCKING:
3647 * Inherited from caller.
3648 */
3649
3650 static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
3651 unsigned int buflen, int do_write)
3652 {
3653 /* Make the crap hardware pay the costs not the good stuff */
3654 if (unlikely(ap->flags & ATA_FLAG_IRQ_MASK)) {
3655 unsigned long flags;
3656 local_irq_save(flags);
3657 if (ap->flags & ATA_FLAG_MMIO)
3658 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3659 else
3660 ata_pio_data_xfer(ap, buf, buflen, do_write);
3661 local_irq_restore(flags);
3662 } else {
3663 if (ap->flags & ATA_FLAG_MMIO)
3664 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3665 else
3666 ata_pio_data_xfer(ap, buf, buflen, do_write);
3667 }
3668 }
3669
3670 /**
3671 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
3672 * @qc: Command on going
3673 *
3674 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3675 *
3676 * LOCKING:
3677 * Inherited from caller.
3678 */
3679
3680 static void ata_pio_sector(struct ata_queued_cmd *qc)
3681 {
3682 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3683 struct scatterlist *sg = qc->__sg;
3684 struct ata_port *ap = qc->ap;
3685 struct page *page;
3686 unsigned int offset;
3687 unsigned char *buf;
3688
3689 if (qc->cursect == (qc->nsect - 1))
3690 ap->hsm_task_state = HSM_ST_LAST;
3691
3692 page = sg[qc->cursg].page;
3693 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
3694
3695 /* get the current page and offset */
3696 page = nth_page(page, (offset >> PAGE_SHIFT));
3697 offset %= PAGE_SIZE;
3698
3699 buf = kmap(page) + offset;
3700
3701 qc->cursect++;
3702 qc->cursg_ofs++;
3703
3704 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
3705 qc->cursg++;
3706 qc->cursg_ofs = 0;
3707 }
3708
3709 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3710
3711 /* do the actual data transfer */
3712 do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3713 ata_data_xfer(ap, buf, ATA_SECT_SIZE, do_write);
3714
3715 kunmap(page);
3716 }
3717
3718 /**
3719 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
3720 * @qc: Command on going
3721 * @bytes: number of bytes
3722 *
3723 * Transfer Transfer data from/to the ATAPI device.
3724 *
3725 * LOCKING:
3726 * Inherited from caller.
3727 *
3728 */
3729
3730 static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
3731 {
3732 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3733 struct scatterlist *sg = qc->__sg;
3734 struct ata_port *ap = qc->ap;
3735 struct page *page;
3736 unsigned char *buf;
3737 unsigned int offset, count;
3738
3739 if (qc->curbytes + bytes >= qc->nbytes)
3740 ap->hsm_task_state = HSM_ST_LAST;
3741
3742 next_sg:
3743 if (unlikely(qc->cursg >= qc->n_elem)) {
3744 /*
3745 * The end of qc->sg is reached and the device expects
3746 * more data to transfer. In order not to overrun qc->sg
3747 * and fulfill length specified in the byte count register,
3748 * - for read case, discard trailing data from the device
3749 * - for write case, padding zero data to the device
3750 */
3751 u16 pad_buf[1] = { 0 };
3752 unsigned int words = bytes >> 1;
3753 unsigned int i;
3754
3755 if (words) /* warning if bytes > 1 */
3756 ata_dev_printk(qc->dev, KERN_WARNING,
3757 "%u bytes trailing data\n", bytes);
3758
3759 for (i = 0; i < words; i++)
3760 ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write);
3761
3762 ap->hsm_task_state = HSM_ST_LAST;
3763 return;
3764 }
3765
3766 sg = &qc->__sg[qc->cursg];
3767
3768 page = sg->page;
3769 offset = sg->offset + qc->cursg_ofs;
3770
3771 /* get the current page and offset */
3772 page = nth_page(page, (offset >> PAGE_SHIFT));
3773 offset %= PAGE_SIZE;
3774
3775 /* don't overrun current sg */
3776 count = min(sg->length - qc->cursg_ofs, bytes);
3777
3778 /* don't cross page boundaries */
3779 count = min(count, (unsigned int)PAGE_SIZE - offset);
3780
3781 buf = kmap(page) + offset;
3782
3783 bytes -= count;
3784 qc->curbytes += count;
3785 qc->cursg_ofs += count;
3786
3787 if (qc->cursg_ofs == sg->length) {
3788 qc->cursg++;
3789 qc->cursg_ofs = 0;
3790 }
3791
3792 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3793
3794 /* do the actual data transfer */
3795 ata_data_xfer(ap, buf, count, do_write);
3796
3797 kunmap(page);
3798
3799 if (bytes)
3800 goto next_sg;
3801 }
3802
3803 /**
3804 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
3805 * @qc: Command on going
3806 *
3807 * Transfer Transfer data from/to the ATAPI device.
3808 *
3809 * LOCKING:
3810 * Inherited from caller.
3811 */
3812
3813 static void atapi_pio_bytes(struct ata_queued_cmd *qc)
3814 {
3815 struct ata_port *ap = qc->ap;
3816 struct ata_device *dev = qc->dev;
3817 unsigned int ireason, bc_lo, bc_hi, bytes;
3818 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
3819
3820 ap->ops->tf_read(ap, &qc->tf);
3821 ireason = qc->tf.nsect;
3822 bc_lo = qc->tf.lbam;
3823 bc_hi = qc->tf.lbah;
3824 bytes = (bc_hi << 8) | bc_lo;
3825
3826 /* shall be cleared to zero, indicating xfer of data */
3827 if (ireason & (1 << 0))
3828 goto err_out;
3829
3830 /* make sure transfer direction matches expected */
3831 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
3832 if (do_write != i_write)
3833 goto err_out;
3834
3835 __atapi_pio_bytes(qc, bytes);
3836
3837 return;
3838
3839 err_out:
3840 ata_dev_printk(dev, KERN_INFO, "ATAPI check failed\n");
3841 qc->err_mask |= AC_ERR_HSM;
3842 ap->hsm_task_state = HSM_ST_ERR;
3843 }
3844
3845 /**
3846 * ata_pio_block - start PIO on a block
3847 * @qc: qc to transfer block for
3848 *
3849 * LOCKING:
3850 * None. (executing in kernel thread context)
3851 */
3852 static void ata_pio_block(struct ata_queued_cmd *qc)
3853 {
3854 struct ata_port *ap = qc->ap;
3855 u8 status;
3856
3857 /*
3858 * This is purely heuristic. This is a fast path.
3859 * Sometimes when we enter, BSY will be cleared in
3860 * a chk-status or two. If not, the drive is probably seeking
3861 * or something. Snooze for a couple msecs, then
3862 * chk-status again. If still busy, fall back to
3863 * HSM_ST_POLL state.
3864 */
3865 status = ata_busy_wait(ap, ATA_BUSY, 5);
3866 if (status & ATA_BUSY) {
3867 msleep(2);
3868 status = ata_busy_wait(ap, ATA_BUSY, 10);
3869 if (status & ATA_BUSY) {
3870 ap->hsm_task_state = HSM_ST_POLL;
3871 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
3872 return;
3873 }
3874 }
3875
3876 /* check error */
3877 if (status & (ATA_ERR | ATA_DF)) {
3878 qc->err_mask |= AC_ERR_DEV;
3879 ap->hsm_task_state = HSM_ST_ERR;
3880 return;
3881 }
3882
3883 /* transfer data if any */
3884 if (is_atapi_taskfile(&qc->tf)) {
3885 /* DRQ=0 means no more data to transfer */
3886 if ((status & ATA_DRQ) == 0) {
3887 ap->hsm_task_state = HSM_ST_LAST;
3888 return;
3889 }
3890
3891 atapi_pio_bytes(qc);
3892 } else {
3893 /* handle BSY=0, DRQ=0 as error */
3894 if ((status & ATA_DRQ) == 0) {
3895 qc->err_mask |= AC_ERR_HSM;
3896 ap->hsm_task_state = HSM_ST_ERR;
3897 return;
3898 }
3899
3900 ata_pio_sector(qc);
3901 }
3902 }
3903
3904 static void ata_pio_error(struct ata_queued_cmd *qc)
3905 {
3906 struct ata_port *ap = qc->ap;
3907
3908 if (qc->tf.command != ATA_CMD_PACKET)
3909 ata_dev_printk(qc->dev, KERN_WARNING, "PIO error\n");
3910
3911 /* make sure qc->err_mask is available to
3912 * know what's wrong and recover
3913 */
3914 WARN_ON(qc->err_mask == 0);
3915
3916 ap->hsm_task_state = HSM_ST_IDLE;
3917
3918 ata_poll_qc_complete(qc);
3919 }
3920
3921 static void ata_pio_task(void *_data)
3922 {
3923 struct ata_queued_cmd *qc = _data;
3924 struct ata_port *ap = qc->ap;
3925 unsigned long timeout;
3926 int qc_completed;
3927
3928 fsm_start:
3929 timeout = 0;
3930 qc_completed = 0;
3931
3932 switch (ap->hsm_task_state) {
3933 case HSM_ST_IDLE:
3934 return;
3935
3936 case HSM_ST:
3937 ata_pio_block(qc);
3938 break;
3939
3940 case HSM_ST_LAST:
3941 qc_completed = ata_pio_complete(qc);
3942 break;
3943
3944 case HSM_ST_POLL:
3945 case HSM_ST_LAST_POLL:
3946 timeout = ata_pio_poll(qc);
3947 break;
3948
3949 case HSM_ST_TMOUT:
3950 case HSM_ST_ERR:
3951 ata_pio_error(qc);
3952 return;
3953 }
3954
3955 if (timeout)
3956 ata_port_queue_task(ap, ata_pio_task, qc, timeout);
3957 else if (!qc_completed)
3958 goto fsm_start;
3959 }
3960
3961 /**
3962 * atapi_packet_task - Write CDB bytes to hardware
3963 * @_data: qc in progress
3964 *
3965 * When device has indicated its readiness to accept
3966 * a CDB, this function is called. Send the CDB.
3967 * If DMA is to be performed, exit immediately.
3968 * Otherwise, we are in polling mode, so poll
3969 * status under operation succeeds or fails.
3970 *
3971 * LOCKING:
3972 * Kernel thread context (may sleep)
3973 */
3974 static void atapi_packet_task(void *_data)
3975 {
3976 struct ata_queued_cmd *qc = _data;
3977 struct ata_port *ap = qc->ap;
3978 u8 status;
3979
3980 /* sleep-wait for BSY to clear */
3981 DPRINTK("busy wait\n");
3982 if (ata_busy_sleep(ap, ATA_TMOUT_CDB_QUICK, ATA_TMOUT_CDB)) {
3983 qc->err_mask |= AC_ERR_TIMEOUT;
3984 goto err_out;
3985 }
3986
3987 /* make sure DRQ is set */
3988 status = ata_chk_status(ap);
3989 if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ) {
3990 qc->err_mask |= AC_ERR_HSM;
3991 goto err_out;
3992 }
3993
3994 /* send SCSI cdb */
3995 DPRINTK("send cdb\n");
3996 WARN_ON(qc->dev->cdb_len < 12);
3997
3998 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA ||
3999 qc->tf.protocol == ATA_PROT_ATAPI_NODATA) {
4000 unsigned long flags;
4001
4002 /* Once we're done issuing command and kicking bmdma,
4003 * irq handler takes over. To not lose irq, we need
4004 * to clear NOINTR flag before sending cdb, but
4005 * interrupt handler shouldn't be invoked before we're
4006 * finished. Hence, the following locking.
4007 */
4008 spin_lock_irqsave(&ap->host_set->lock, flags);
4009 ap->flags &= ~ATA_FLAG_NOINTR;
4010 ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
4011 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA)
4012 ap->ops->bmdma_start(qc); /* initiate bmdma */
4013 spin_unlock_irqrestore(&ap->host_set->lock, flags);
4014 } else {
4015 ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
4016
4017 /* PIO commands are handled by polling */
4018 ap->hsm_task_state = HSM_ST;
4019 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4020 }
4021
4022 return;
4023
4024 err_out:
4025 ata_poll_qc_complete(qc);
4026 }
4027
4028 /**
4029 * ata_qc_new - Request an available ATA command, for queueing
4030 * @ap: Port associated with device @dev
4031 * @dev: Device from whom we request an available command structure
4032 *
4033 * LOCKING:
4034 * None.
4035 */
4036
4037 static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
4038 {
4039 struct ata_queued_cmd *qc = NULL;
4040 unsigned int i;
4041
4042 /* the last tag is reserved for internal command. */
4043 for (i = 0; i < ATA_MAX_QUEUE - 1; i++)
4044 if (!test_and_set_bit(i, &ap->qactive)) {
4045 qc = ata_qc_from_tag(ap, i);
4046 break;
4047 }
4048
4049 if (qc)
4050 qc->tag = i;
4051
4052 return qc;
4053 }
4054
4055 /**
4056 * ata_qc_new_init - Request an available ATA command, and initialize it
4057 * @dev: Device from whom we request an available command structure
4058 *
4059 * LOCKING:
4060 * None.
4061 */
4062
4063 struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev)
4064 {
4065 struct ata_port *ap = dev->ap;
4066 struct ata_queued_cmd *qc;
4067
4068 qc = ata_qc_new(ap);
4069 if (qc) {
4070 qc->scsicmd = NULL;
4071 qc->ap = ap;
4072 qc->dev = dev;
4073
4074 ata_qc_reinit(qc);
4075 }
4076
4077 return qc;
4078 }
4079
4080 /**
4081 * ata_qc_free - free unused ata_queued_cmd
4082 * @qc: Command to complete
4083 *
4084 * Designed to free unused ata_queued_cmd object
4085 * in case something prevents using it.
4086 *
4087 * LOCKING:
4088 * spin_lock_irqsave(host_set lock)
4089 */
4090 void ata_qc_free(struct ata_queued_cmd *qc)
4091 {
4092 struct ata_port *ap = qc->ap;
4093 unsigned int tag;
4094
4095 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4096
4097 qc->flags = 0;
4098 tag = qc->tag;
4099 if (likely(ata_tag_valid(tag))) {
4100 qc->tag = ATA_TAG_POISON;
4101 clear_bit(tag, &ap->qactive);
4102 }
4103 }
4104
4105 void __ata_qc_complete(struct ata_queued_cmd *qc)
4106 {
4107 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4108 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
4109
4110 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
4111 ata_sg_clean(qc);
4112
4113 /* command should be marked inactive atomically with qc completion */
4114 qc->ap->active_tag = ATA_TAG_POISON;
4115
4116 /* atapi: mark qc as inactive to prevent the interrupt handler
4117 * from completing the command twice later, before the error handler
4118 * is called. (when rc != 0 and atapi request sense is needed)
4119 */
4120 qc->flags &= ~ATA_QCFLAG_ACTIVE;
4121
4122 /* call completion callback */
4123 qc->complete_fn(qc);
4124 }
4125
4126 static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
4127 {
4128 struct ata_port *ap = qc->ap;
4129
4130 switch (qc->tf.protocol) {
4131 case ATA_PROT_DMA:
4132 case ATA_PROT_ATAPI_DMA:
4133 return 1;
4134
4135 case ATA_PROT_ATAPI:
4136 case ATA_PROT_PIO:
4137 if (ap->flags & ATA_FLAG_PIO_DMA)
4138 return 1;
4139
4140 /* fall through */
4141
4142 default:
4143 return 0;
4144 }
4145
4146 /* never reached */
4147 }
4148
4149 /**
4150 * ata_qc_issue - issue taskfile to device
4151 * @qc: command to issue to device
4152 *
4153 * Prepare an ATA command to submission to device.
4154 * This includes mapping the data into a DMA-able
4155 * area, filling in the S/G table, and finally
4156 * writing the taskfile to hardware, starting the command.
4157 *
4158 * LOCKING:
4159 * spin_lock_irqsave(host_set lock)
4160 */
4161 void ata_qc_issue(struct ata_queued_cmd *qc)
4162 {
4163 struct ata_port *ap = qc->ap;
4164
4165 qc->ap->active_tag = qc->tag;
4166 qc->flags |= ATA_QCFLAG_ACTIVE;
4167
4168 if (ata_should_dma_map(qc)) {
4169 if (qc->flags & ATA_QCFLAG_SG) {
4170 if (ata_sg_setup(qc))
4171 goto sg_err;
4172 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
4173 if (ata_sg_setup_one(qc))
4174 goto sg_err;
4175 }
4176 } else {
4177 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4178 }
4179
4180 ap->ops->qc_prep(qc);
4181
4182 qc->err_mask |= ap->ops->qc_issue(qc);
4183 if (unlikely(qc->err_mask))
4184 goto err;
4185 return;
4186
4187 sg_err:
4188 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4189 qc->err_mask |= AC_ERR_SYSTEM;
4190 err:
4191 ata_qc_complete(qc);
4192 }
4193
4194 /**
4195 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
4196 * @qc: command to issue to device
4197 *
4198 * Using various libata functions and hooks, this function
4199 * starts an ATA command. ATA commands are grouped into
4200 * classes called "protocols", and issuing each type of protocol
4201 * is slightly different.
4202 *
4203 * May be used as the qc_issue() entry in ata_port_operations.
4204 *
4205 * LOCKING:
4206 * spin_lock_irqsave(host_set lock)
4207 *
4208 * RETURNS:
4209 * Zero on success, AC_ERR_* mask on failure
4210 */
4211
4212 unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
4213 {
4214 struct ata_port *ap = qc->ap;
4215
4216 ata_dev_select(ap, qc->dev->devno, 1, 0);
4217
4218 switch (qc->tf.protocol) {
4219 case ATA_PROT_NODATA:
4220 ata_tf_to_host(ap, &qc->tf);
4221 break;
4222
4223 case ATA_PROT_DMA:
4224 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4225 ap->ops->bmdma_setup(qc); /* set up bmdma */
4226 ap->ops->bmdma_start(qc); /* initiate bmdma */
4227 break;
4228
4229 case ATA_PROT_PIO: /* load tf registers, initiate polling pio */
4230 ata_qc_set_polling(qc);
4231 ata_tf_to_host(ap, &qc->tf);
4232 ap->hsm_task_state = HSM_ST;
4233 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4234 break;
4235
4236 case ATA_PROT_ATAPI:
4237 ata_qc_set_polling(qc);
4238 ata_tf_to_host(ap, &qc->tf);
4239 ata_port_queue_task(ap, atapi_packet_task, qc, 0);
4240 break;
4241
4242 case ATA_PROT_ATAPI_NODATA:
4243 ap->flags |= ATA_FLAG_NOINTR;
4244 ata_tf_to_host(ap, &qc->tf);
4245 ata_port_queue_task(ap, atapi_packet_task, qc, 0);
4246 break;
4247
4248 case ATA_PROT_ATAPI_DMA:
4249 ap->flags |= ATA_FLAG_NOINTR;
4250 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4251 ap->ops->bmdma_setup(qc); /* set up bmdma */
4252 ata_port_queue_task(ap, atapi_packet_task, qc, 0);
4253 break;
4254
4255 default:
4256 WARN_ON(1);
4257 return AC_ERR_SYSTEM;
4258 }
4259
4260 return 0;
4261 }
4262
4263 /**
4264 * ata_host_intr - Handle host interrupt for given (port, task)
4265 * @ap: Port on which interrupt arrived (possibly...)
4266 * @qc: Taskfile currently active in engine
4267 *
4268 * Handle host interrupt for given queued command. Currently,
4269 * only DMA interrupts are handled. All other commands are
4270 * handled via polling with interrupts disabled (nIEN bit).
4271 *
4272 * LOCKING:
4273 * spin_lock_irqsave(host_set lock)
4274 *
4275 * RETURNS:
4276 * One if interrupt was handled, zero if not (shared irq).
4277 */
4278
4279 inline unsigned int ata_host_intr (struct ata_port *ap,
4280 struct ata_queued_cmd *qc)
4281 {
4282 u8 status, host_stat;
4283
4284 switch (qc->tf.protocol) {
4285
4286 case ATA_PROT_DMA:
4287 case ATA_PROT_ATAPI_DMA:
4288 case ATA_PROT_ATAPI:
4289 /* check status of DMA engine */
4290 host_stat = ap->ops->bmdma_status(ap);
4291 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
4292
4293 /* if it's not our irq... */
4294 if (!(host_stat & ATA_DMA_INTR))
4295 goto idle_irq;
4296
4297 /* before we do anything else, clear DMA-Start bit */
4298 ap->ops->bmdma_stop(qc);
4299
4300 /* fall through */
4301
4302 case ATA_PROT_ATAPI_NODATA:
4303 case ATA_PROT_NODATA:
4304 /* check altstatus */
4305 status = ata_altstatus(ap);
4306 if (status & ATA_BUSY)
4307 goto idle_irq;
4308
4309 /* check main status, clearing INTRQ */
4310 status = ata_chk_status(ap);
4311 if (unlikely(status & ATA_BUSY))
4312 goto idle_irq;
4313 DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n",
4314 ap->id, qc->tf.protocol, status);
4315
4316 /* ack bmdma irq events */
4317 ap->ops->irq_clear(ap);
4318
4319 /* complete taskfile transaction */
4320 qc->err_mask |= ac_err_mask(status);
4321 ata_qc_complete(qc);
4322 break;
4323
4324 default:
4325 goto idle_irq;
4326 }
4327
4328 return 1; /* irq handled */
4329
4330 idle_irq:
4331 ap->stats.idle_irq++;
4332
4333 #ifdef ATA_IRQ_TRAP
4334 if ((ap->stats.idle_irq % 1000) == 0) {
4335 ata_irq_ack(ap, 0); /* debug trap */
4336 ata_port_printk(ap, KERN_WARNING, "irq trap\n");
4337 return 1;
4338 }
4339 #endif
4340 return 0; /* irq not handled */
4341 }
4342
4343 /**
4344 * ata_interrupt - Default ATA host interrupt handler
4345 * @irq: irq line (unused)
4346 * @dev_instance: pointer to our ata_host_set information structure
4347 * @regs: unused
4348 *
4349 * Default interrupt handler for PCI IDE devices. Calls
4350 * ata_host_intr() for each port that is not disabled.
4351 *
4352 * LOCKING:
4353 * Obtains host_set lock during operation.
4354 *
4355 * RETURNS:
4356 * IRQ_NONE or IRQ_HANDLED.
4357 */
4358
4359 irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
4360 {
4361 struct ata_host_set *host_set = dev_instance;
4362 unsigned int i;
4363 unsigned int handled = 0;
4364 unsigned long flags;
4365
4366 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
4367 spin_lock_irqsave(&host_set->lock, flags);
4368
4369 for (i = 0; i < host_set->n_ports; i++) {
4370 struct ata_port *ap;
4371
4372 ap = host_set->ports[i];
4373 if (ap &&
4374 !(ap->flags & (ATA_FLAG_DISABLED | ATA_FLAG_NOINTR))) {
4375 struct ata_queued_cmd *qc;
4376
4377 qc = ata_qc_from_tag(ap, ap->active_tag);
4378 if (qc && (!(qc->tf.ctl & ATA_NIEN)) &&
4379 (qc->flags & ATA_QCFLAG_ACTIVE))
4380 handled |= ata_host_intr(ap, qc);
4381 }
4382 }
4383
4384 spin_unlock_irqrestore(&host_set->lock, flags);
4385
4386 return IRQ_RETVAL(handled);
4387 }
4388
4389 /**
4390 * sata_scr_valid - test whether SCRs are accessible
4391 * @ap: ATA port to test SCR accessibility for
4392 *
4393 * Test whether SCRs are accessible for @ap.
4394 *
4395 * LOCKING:
4396 * None.
4397 *
4398 * RETURNS:
4399 * 1 if SCRs are accessible, 0 otherwise.
4400 */
4401 int sata_scr_valid(struct ata_port *ap)
4402 {
4403 return ap->cbl == ATA_CBL_SATA && ap->ops->scr_read;
4404 }
4405
4406 /**
4407 * sata_scr_read - read SCR register of the specified port
4408 * @ap: ATA port to read SCR for
4409 * @reg: SCR to read
4410 * @val: Place to store read value
4411 *
4412 * Read SCR register @reg of @ap into *@val. This function is
4413 * guaranteed to succeed if the cable type of the port is SATA
4414 * and the port implements ->scr_read.
4415 *
4416 * LOCKING:
4417 * None.
4418 *
4419 * RETURNS:
4420 * 0 on success, negative errno on failure.
4421 */
4422 int sata_scr_read(struct ata_port *ap, int reg, u32 *val)
4423 {
4424 if (sata_scr_valid(ap)) {
4425 *val = ap->ops->scr_read(ap, reg);
4426 return 0;
4427 }
4428 return -EOPNOTSUPP;
4429 }
4430
4431 /**
4432 * sata_scr_write - write SCR register of the specified port
4433 * @ap: ATA port to write SCR for
4434 * @reg: SCR to write
4435 * @val: value to write
4436 *
4437 * Write @val to SCR register @reg of @ap. This function is
4438 * guaranteed to succeed if the cable type of the port is SATA
4439 * and the port implements ->scr_read.
4440 *
4441 * LOCKING:
4442 * None.
4443 *
4444 * RETURNS:
4445 * 0 on success, negative errno on failure.
4446 */
4447 int sata_scr_write(struct ata_port *ap, int reg, u32 val)
4448 {
4449 if (sata_scr_valid(ap)) {
4450 ap->ops->scr_write(ap, reg, val);
4451 return 0;
4452 }
4453 return -EOPNOTSUPP;
4454 }
4455
4456 /**
4457 * sata_scr_write_flush - write SCR register of the specified port and flush
4458 * @ap: ATA port to write SCR for
4459 * @reg: SCR to write
4460 * @val: value to write
4461 *
4462 * This function is identical to sata_scr_write() except that this
4463 * function performs flush after writing to the register.
4464 *
4465 * LOCKING:
4466 * None.
4467 *
4468 * RETURNS:
4469 * 0 on success, negative errno on failure.
4470 */
4471 int sata_scr_write_flush(struct ata_port *ap, int reg, u32 val)
4472 {
4473 if (sata_scr_valid(ap)) {
4474 ap->ops->scr_write(ap, reg, val);
4475 ap->ops->scr_read(ap, reg);
4476 return 0;
4477 }
4478 return -EOPNOTSUPP;
4479 }
4480
4481 /**
4482 * ata_port_online - test whether the given port is online
4483 * @ap: ATA port to test
4484 *
4485 * Test whether @ap is online. Note that this function returns 0
4486 * if online status of @ap cannot be obtained, so
4487 * ata_port_online(ap) != !ata_port_offline(ap).
4488 *
4489 * LOCKING:
4490 * None.
4491 *
4492 * RETURNS:
4493 * 1 if the port online status is available and online.
4494 */
4495 int ata_port_online(struct ata_port *ap)
4496 {
4497 u32 sstatus;
4498
4499 if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) == 0x3)
4500 return 1;
4501 return 0;
4502 }
4503
4504 /**
4505 * ata_port_offline - test whether the given port is offline
4506 * @ap: ATA port to test
4507 *
4508 * Test whether @ap is offline. Note that this function returns
4509 * 0 if offline status of @ap cannot be obtained, so
4510 * ata_port_online(ap) != !ata_port_offline(ap).
4511 *
4512 * LOCKING:
4513 * None.
4514 *
4515 * RETURNS:
4516 * 1 if the port offline status is available and offline.
4517 */
4518 int ata_port_offline(struct ata_port *ap)
4519 {
4520 u32 sstatus;
4521
4522 if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) != 0x3)
4523 return 1;
4524 return 0;
4525 }
4526
4527 /*
4528 * Execute a 'simple' command, that only consists of the opcode 'cmd' itself,
4529 * without filling any other registers
4530 */
4531 static int ata_do_simple_cmd(struct ata_device *dev, u8 cmd)
4532 {
4533 struct ata_taskfile tf;
4534 int err;
4535
4536 ata_tf_init(dev, &tf);
4537
4538 tf.command = cmd;
4539 tf.flags |= ATA_TFLAG_DEVICE;
4540 tf.protocol = ATA_PROT_NODATA;
4541
4542 err = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
4543 if (err)
4544 ata_dev_printk(dev, KERN_ERR, "%s: ata command failed: %d\n",
4545 __FUNCTION__, err);
4546
4547 return err;
4548 }
4549
4550 static int ata_flush_cache(struct ata_device *dev)
4551 {
4552 u8 cmd;
4553
4554 if (!ata_try_flush_cache(dev))
4555 return 0;
4556
4557 if (ata_id_has_flush_ext(dev->id))
4558 cmd = ATA_CMD_FLUSH_EXT;
4559 else
4560 cmd = ATA_CMD_FLUSH;
4561
4562 return ata_do_simple_cmd(dev, cmd);
4563 }
4564
4565 static int ata_standby_drive(struct ata_device *dev)
4566 {
4567 return ata_do_simple_cmd(dev, ATA_CMD_STANDBYNOW1);
4568 }
4569
4570 static int ata_start_drive(struct ata_device *dev)
4571 {
4572 return ata_do_simple_cmd(dev, ATA_CMD_IDLEIMMEDIATE);
4573 }
4574
4575 /**
4576 * ata_device_resume - wakeup a previously suspended devices
4577 * @dev: the device to resume
4578 *
4579 * Kick the drive back into action, by sending it an idle immediate
4580 * command and making sure its transfer mode matches between drive
4581 * and host.
4582 *
4583 */
4584 int ata_device_resume(struct ata_device *dev)
4585 {
4586 struct ata_port *ap = dev->ap;
4587
4588 if (ap->flags & ATA_FLAG_SUSPENDED) {
4589 struct ata_device *failed_dev;
4590 ap->flags &= ~ATA_FLAG_SUSPENDED;
4591 while (ata_set_mode(ap, &failed_dev))
4592 ata_dev_disable(failed_dev);
4593 }
4594 if (!ata_dev_enabled(dev))
4595 return 0;
4596 if (dev->class == ATA_DEV_ATA)
4597 ata_start_drive(dev);
4598
4599 return 0;
4600 }
4601
4602 /**
4603 * ata_device_suspend - prepare a device for suspend
4604 * @dev: the device to suspend
4605 *
4606 * Flush the cache on the drive, if appropriate, then issue a
4607 * standbynow command.
4608 */
4609 int ata_device_suspend(struct ata_device *dev, pm_message_t state)
4610 {
4611 struct ata_port *ap = dev->ap;
4612
4613 if (!ata_dev_enabled(dev))
4614 return 0;
4615 if (dev->class == ATA_DEV_ATA)
4616 ata_flush_cache(dev);
4617
4618 if (state.event != PM_EVENT_FREEZE)
4619 ata_standby_drive(dev);
4620 ap->flags |= ATA_FLAG_SUSPENDED;
4621 return 0;
4622 }
4623
4624 /**
4625 * ata_port_start - Set port up for dma.
4626 * @ap: Port to initialize
4627 *
4628 * Called just after data structures for each port are
4629 * initialized. Allocates space for PRD table.
4630 *
4631 * May be used as the port_start() entry in ata_port_operations.
4632 *
4633 * LOCKING:
4634 * Inherited from caller.
4635 */
4636
4637 int ata_port_start (struct ata_port *ap)
4638 {
4639 struct device *dev = ap->dev;
4640 int rc;
4641
4642 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
4643 if (!ap->prd)
4644 return -ENOMEM;
4645
4646 rc = ata_pad_alloc(ap, dev);
4647 if (rc) {
4648 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
4649 return rc;
4650 }
4651
4652 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
4653
4654 return 0;
4655 }
4656
4657
4658 /**
4659 * ata_port_stop - Undo ata_port_start()
4660 * @ap: Port to shut down
4661 *
4662 * Frees the PRD table.
4663 *
4664 * May be used as the port_stop() entry in ata_port_operations.
4665 *
4666 * LOCKING:
4667 * Inherited from caller.
4668 */
4669
4670 void ata_port_stop (struct ata_port *ap)
4671 {
4672 struct device *dev = ap->dev;
4673
4674 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
4675 ata_pad_free(ap, dev);
4676 }
4677
4678 void ata_host_stop (struct ata_host_set *host_set)
4679 {
4680 if (host_set->mmio_base)
4681 iounmap(host_set->mmio_base);
4682 }
4683
4684
4685 /**
4686 * ata_host_remove - Unregister SCSI host structure with upper layers
4687 * @ap: Port to unregister
4688 * @do_unregister: 1 if we fully unregister, 0 to just stop the port
4689 *
4690 * LOCKING:
4691 * Inherited from caller.
4692 */
4693
4694 static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
4695 {
4696 struct Scsi_Host *sh = ap->host;
4697
4698 DPRINTK("ENTER\n");
4699
4700 if (do_unregister)
4701 scsi_remove_host(sh);
4702
4703 ap->ops->port_stop(ap);
4704 }
4705
4706 /**
4707 * ata_host_init - Initialize an ata_port structure
4708 * @ap: Structure to initialize
4709 * @host: associated SCSI mid-layer structure
4710 * @host_set: Collection of hosts to which @ap belongs
4711 * @ent: Probe information provided by low-level driver
4712 * @port_no: Port number associated with this ata_port
4713 *
4714 * Initialize a new ata_port structure, and its associated
4715 * scsi_host.
4716 *
4717 * LOCKING:
4718 * Inherited from caller.
4719 */
4720
4721 static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
4722 struct ata_host_set *host_set,
4723 const struct ata_probe_ent *ent, unsigned int port_no)
4724 {
4725 unsigned int i;
4726
4727 host->max_id = 16;
4728 host->max_lun = 1;
4729 host->max_channel = 1;
4730 host->unique_id = ata_unique_id++;
4731 host->max_cmd_len = 12;
4732
4733 ap->flags = ATA_FLAG_DISABLED;
4734 ap->id = host->unique_id;
4735 ap->host = host;
4736 ap->ctl = ATA_DEVCTL_OBS;
4737 ap->host_set = host_set;
4738 ap->dev = ent->dev;
4739 ap->port_no = port_no;
4740 ap->hard_port_no =
4741 ent->legacy_mode ? ent->hard_port_no : port_no;
4742 ap->pio_mask = ent->pio_mask;
4743 ap->mwdma_mask = ent->mwdma_mask;
4744 ap->udma_mask = ent->udma_mask;
4745 ap->flags |= ent->host_flags;
4746 ap->ops = ent->port_ops;
4747 ap->sata_spd_limit = UINT_MAX;
4748 ap->active_tag = ATA_TAG_POISON;
4749 ap->last_ctl = 0xFF;
4750
4751 INIT_WORK(&ap->port_task, NULL, NULL);
4752 INIT_LIST_HEAD(&ap->eh_done_q);
4753
4754 /* set cable type */
4755 ap->cbl = ATA_CBL_NONE;
4756 if (ap->flags & ATA_FLAG_SATA)
4757 ap->cbl = ATA_CBL_SATA;
4758
4759 for (i = 0; i < ATA_MAX_DEVICES; i++) {
4760 struct ata_device *dev = &ap->device[i];
4761 dev->ap = ap;
4762 dev->devno = i;
4763 dev->pio_mask = UINT_MAX;
4764 dev->mwdma_mask = UINT_MAX;
4765 dev->udma_mask = UINT_MAX;
4766 }
4767
4768 #ifdef ATA_IRQ_TRAP
4769 ap->stats.unhandled_irq = 1;
4770 ap->stats.idle_irq = 1;
4771 #endif
4772
4773 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
4774 }
4775
4776 /**
4777 * ata_host_add - Attach low-level ATA driver to system
4778 * @ent: Information provided by low-level driver
4779 * @host_set: Collections of ports to which we add
4780 * @port_no: Port number associated with this host
4781 *
4782 * Attach low-level ATA driver to system.
4783 *
4784 * LOCKING:
4785 * PCI/etc. bus probe sem.
4786 *
4787 * RETURNS:
4788 * New ata_port on success, for NULL on error.
4789 */
4790
4791 static struct ata_port * ata_host_add(const struct ata_probe_ent *ent,
4792 struct ata_host_set *host_set,
4793 unsigned int port_no)
4794 {
4795 struct Scsi_Host *host;
4796 struct ata_port *ap;
4797 int rc;
4798
4799 DPRINTK("ENTER\n");
4800
4801 if (!ent->port_ops->probe_reset &&
4802 !(ent->host_flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST))) {
4803 printk(KERN_ERR "ata%u: no reset mechanism available\n",
4804 port_no);
4805 return NULL;
4806 }
4807
4808 host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
4809 if (!host)
4810 return NULL;
4811
4812 host->transportt = &ata_scsi_transport_template;
4813
4814 ap = ata_shost_to_port(host);
4815
4816 ata_host_init(ap, host, host_set, ent, port_no);
4817
4818 rc = ap->ops->port_start(ap);
4819 if (rc)
4820 goto err_out;
4821
4822 return ap;
4823
4824 err_out:
4825 scsi_host_put(host);
4826 return NULL;
4827 }
4828
4829 /**
4830 * ata_device_add - Register hardware device with ATA and SCSI layers
4831 * @ent: Probe information describing hardware device to be registered
4832 *
4833 * This function processes the information provided in the probe
4834 * information struct @ent, allocates the necessary ATA and SCSI
4835 * host information structures, initializes them, and registers
4836 * everything with requisite kernel subsystems.
4837 *
4838 * This function requests irqs, probes the ATA bus, and probes
4839 * the SCSI bus.
4840 *
4841 * LOCKING:
4842 * PCI/etc. bus probe sem.
4843 *
4844 * RETURNS:
4845 * Number of ports registered. Zero on error (no ports registered).
4846 */
4847
4848 int ata_device_add(const struct ata_probe_ent *ent)
4849 {
4850 unsigned int count = 0, i;
4851 struct device *dev = ent->dev;
4852 struct ata_host_set *host_set;
4853
4854 DPRINTK("ENTER\n");
4855 /* alloc a container for our list of ATA ports (buses) */
4856 host_set = kzalloc(sizeof(struct ata_host_set) +
4857 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
4858 if (!host_set)
4859 return 0;
4860 spin_lock_init(&host_set->lock);
4861
4862 host_set->dev = dev;
4863 host_set->n_ports = ent->n_ports;
4864 host_set->irq = ent->irq;
4865 host_set->mmio_base = ent->mmio_base;
4866 host_set->private_data = ent->private_data;
4867 host_set->ops = ent->port_ops;
4868 host_set->flags = ent->host_set_flags;
4869
4870 /* register each port bound to this device */
4871 for (i = 0; i < ent->n_ports; i++) {
4872 struct ata_port *ap;
4873 unsigned long xfer_mode_mask;
4874
4875 ap = ata_host_add(ent, host_set, i);
4876 if (!ap)
4877 goto err_out;
4878
4879 host_set->ports[i] = ap;
4880 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
4881 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
4882 (ap->pio_mask << ATA_SHIFT_PIO);
4883
4884 /* print per-port info to dmesg */
4885 ata_port_printk(ap, KERN_INFO, "%cATA max %s cmd 0x%lX "
4886 "ctl 0x%lX bmdma 0x%lX irq %lu\n",
4887 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
4888 ata_mode_string(xfer_mode_mask),
4889 ap->ioaddr.cmd_addr,
4890 ap->ioaddr.ctl_addr,
4891 ap->ioaddr.bmdma_addr,
4892 ent->irq);
4893
4894 ata_chk_status(ap);
4895 host_set->ops->irq_clear(ap);
4896 count++;
4897 }
4898
4899 if (!count)
4900 goto err_free_ret;
4901
4902 /* obtain irq, that is shared between channels */
4903 if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
4904 DRV_NAME, host_set))
4905 goto err_out;
4906
4907 /* perform each probe synchronously */
4908 DPRINTK("probe begin\n");
4909 for (i = 0; i < count; i++) {
4910 struct ata_port *ap;
4911 int rc;
4912
4913 ap = host_set->ports[i];
4914
4915 DPRINTK("ata%u: bus probe begin\n", ap->id);
4916 rc = ata_bus_probe(ap);
4917 DPRINTK("ata%u: bus probe end\n", ap->id);
4918
4919 if (rc) {
4920 /* FIXME: do something useful here?
4921 * Current libata behavior will
4922 * tear down everything when
4923 * the module is removed
4924 * or the h/w is unplugged.
4925 */
4926 }
4927
4928 rc = scsi_add_host(ap->host, dev);
4929 if (rc) {
4930 ata_port_printk(ap, KERN_ERR, "scsi_add_host failed\n");
4931 /* FIXME: do something useful here */
4932 /* FIXME: handle unconditional calls to
4933 * scsi_scan_host and ata_host_remove, below,
4934 * at the very least
4935 */
4936 }
4937 }
4938
4939 /* probes are done, now scan each port's disk(s) */
4940 DPRINTK("host probe begin\n");
4941 for (i = 0; i < count; i++) {
4942 struct ata_port *ap = host_set->ports[i];
4943
4944 ata_scsi_scan_host(ap);
4945 }
4946
4947 dev_set_drvdata(dev, host_set);
4948
4949 VPRINTK("EXIT, returning %u\n", ent->n_ports);
4950 return ent->n_ports; /* success */
4951
4952 err_out:
4953 for (i = 0; i < count; i++) {
4954 ata_host_remove(host_set->ports[i], 1);
4955 scsi_host_put(host_set->ports[i]->host);
4956 }
4957 err_free_ret:
4958 kfree(host_set);
4959 VPRINTK("EXIT, returning 0\n");
4960 return 0;
4961 }
4962
4963 /**
4964 * ata_host_set_remove - PCI layer callback for device removal
4965 * @host_set: ATA host set that was removed
4966 *
4967 * Unregister all objects associated with this host set. Free those
4968 * objects.
4969 *
4970 * LOCKING:
4971 * Inherited from calling layer (may sleep).
4972 */
4973
4974 void ata_host_set_remove(struct ata_host_set *host_set)
4975 {
4976 struct ata_port *ap;
4977 unsigned int i;
4978
4979 for (i = 0; i < host_set->n_ports; i++) {
4980 ap = host_set->ports[i];
4981 scsi_remove_host(ap->host);
4982 }
4983
4984 free_irq(host_set->irq, host_set);
4985
4986 for (i = 0; i < host_set->n_ports; i++) {
4987 ap = host_set->ports[i];
4988
4989 ata_scsi_release(ap->host);
4990
4991 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
4992 struct ata_ioports *ioaddr = &ap->ioaddr;
4993
4994 if (ioaddr->cmd_addr == 0x1f0)
4995 release_region(0x1f0, 8);
4996 else if (ioaddr->cmd_addr == 0x170)
4997 release_region(0x170, 8);
4998 }
4999
5000 scsi_host_put(ap->host);
5001 }
5002
5003 if (host_set->ops->host_stop)
5004 host_set->ops->host_stop(host_set);
5005
5006 kfree(host_set);
5007 }
5008
5009 /**
5010 * ata_scsi_release - SCSI layer callback hook for host unload
5011 * @host: libata host to be unloaded
5012 *
5013 * Performs all duties necessary to shut down a libata port...
5014 * Kill port kthread, disable port, and release resources.
5015 *
5016 * LOCKING:
5017 * Inherited from SCSI layer.
5018 *
5019 * RETURNS:
5020 * One.
5021 */
5022
5023 int ata_scsi_release(struct Scsi_Host *host)
5024 {
5025 struct ata_port *ap = ata_shost_to_port(host);
5026
5027 DPRINTK("ENTER\n");
5028
5029 ap->ops->port_disable(ap);
5030 ata_host_remove(ap, 0);
5031
5032 DPRINTK("EXIT\n");
5033 return 1;
5034 }
5035
5036 /**
5037 * ata_std_ports - initialize ioaddr with standard port offsets.
5038 * @ioaddr: IO address structure to be initialized
5039 *
5040 * Utility function which initializes data_addr, error_addr,
5041 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
5042 * device_addr, status_addr, and command_addr to standard offsets
5043 * relative to cmd_addr.
5044 *
5045 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
5046 */
5047
5048 void ata_std_ports(struct ata_ioports *ioaddr)
5049 {
5050 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
5051 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
5052 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
5053 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
5054 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
5055 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
5056 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
5057 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
5058 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
5059 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
5060 }
5061
5062
5063 #ifdef CONFIG_PCI
5064
5065 void ata_pci_host_stop (struct ata_host_set *host_set)
5066 {
5067 struct pci_dev *pdev = to_pci_dev(host_set->dev);
5068
5069 pci_iounmap(pdev, host_set->mmio_base);
5070 }
5071
5072 /**
5073 * ata_pci_remove_one - PCI layer callback for device removal
5074 * @pdev: PCI device that was removed
5075 *
5076 * PCI layer indicates to libata via this hook that
5077 * hot-unplug or module unload event has occurred.
5078 * Handle this by unregistering all objects associated
5079 * with this PCI device. Free those objects. Then finally
5080 * release PCI resources and disable device.
5081 *
5082 * LOCKING:
5083 * Inherited from PCI layer (may sleep).
5084 */
5085
5086 void ata_pci_remove_one (struct pci_dev *pdev)
5087 {
5088 struct device *dev = pci_dev_to_dev(pdev);
5089 struct ata_host_set *host_set = dev_get_drvdata(dev);
5090
5091 ata_host_set_remove(host_set);
5092 pci_release_regions(pdev);
5093 pci_disable_device(pdev);
5094 dev_set_drvdata(dev, NULL);
5095 }
5096
5097 /* move to PCI subsystem */
5098 int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
5099 {
5100 unsigned long tmp = 0;
5101
5102 switch (bits->width) {
5103 case 1: {
5104 u8 tmp8 = 0;
5105 pci_read_config_byte(pdev, bits->reg, &tmp8);
5106 tmp = tmp8;
5107 break;
5108 }
5109 case 2: {
5110 u16 tmp16 = 0;
5111 pci_read_config_word(pdev, bits->reg, &tmp16);
5112 tmp = tmp16;
5113 break;
5114 }
5115 case 4: {
5116 u32 tmp32 = 0;
5117 pci_read_config_dword(pdev, bits->reg, &tmp32);
5118 tmp = tmp32;
5119 break;
5120 }
5121
5122 default:
5123 return -EINVAL;
5124 }
5125
5126 tmp &= bits->mask;
5127
5128 return (tmp == bits->val) ? 1 : 0;
5129 }
5130
5131 int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state)
5132 {
5133 pci_save_state(pdev);
5134 pci_disable_device(pdev);
5135 pci_set_power_state(pdev, PCI_D3hot);
5136 return 0;
5137 }
5138
5139 int ata_pci_device_resume(struct pci_dev *pdev)
5140 {
5141 pci_set_power_state(pdev, PCI_D0);
5142 pci_restore_state(pdev);
5143 pci_enable_device(pdev);
5144 pci_set_master(pdev);
5145 return 0;
5146 }
5147 #endif /* CONFIG_PCI */
5148
5149
5150 static int __init ata_init(void)
5151 {
5152 ata_wq = create_workqueue("ata");
5153 if (!ata_wq)
5154 return -ENOMEM;
5155
5156 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
5157 return 0;
5158 }
5159
5160 static void __exit ata_exit(void)
5161 {
5162 destroy_workqueue(ata_wq);
5163 }
5164
5165 module_init(ata_init);
5166 module_exit(ata_exit);
5167
5168 static unsigned long ratelimit_time;
5169 static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED;
5170
5171 int ata_ratelimit(void)
5172 {
5173 int rc;
5174 unsigned long flags;
5175
5176 spin_lock_irqsave(&ata_ratelimit_lock, flags);
5177
5178 if (time_after(jiffies, ratelimit_time)) {
5179 rc = 1;
5180 ratelimit_time = jiffies + (HZ/5);
5181 } else
5182 rc = 0;
5183
5184 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
5185
5186 return rc;
5187 }
5188
5189 /**
5190 * ata_wait_register - wait until register value changes
5191 * @reg: IO-mapped register
5192 * @mask: Mask to apply to read register value
5193 * @val: Wait condition
5194 * @interval_msec: polling interval in milliseconds
5195 * @timeout_msec: timeout in milliseconds
5196 *
5197 * Waiting for some bits of register to change is a common
5198 * operation for ATA controllers. This function reads 32bit LE
5199 * IO-mapped register @reg and tests for the following condition.
5200 *
5201 * (*@reg & mask) != val
5202 *
5203 * If the condition is met, it returns; otherwise, the process is
5204 * repeated after @interval_msec until timeout.
5205 *
5206 * LOCKING:
5207 * Kernel thread context (may sleep)
5208 *
5209 * RETURNS:
5210 * The final register value.
5211 */
5212 u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val,
5213 unsigned long interval_msec,
5214 unsigned long timeout_msec)
5215 {
5216 unsigned long timeout;
5217 u32 tmp;
5218
5219 tmp = ioread32(reg);
5220
5221 /* Calculate timeout _after_ the first read to make sure
5222 * preceding writes reach the controller before starting to
5223 * eat away the timeout.
5224 */
5225 timeout = jiffies + (timeout_msec * HZ) / 1000;
5226
5227 while ((tmp & mask) == val && time_before(jiffies, timeout)) {
5228 msleep(interval_msec);
5229 tmp = ioread32(reg);
5230 }
5231
5232 return tmp;
5233 }
5234
5235 /*
5236 * libata is essentially a library of internal helper functions for
5237 * low-level ATA host controller drivers. As such, the API/ABI is
5238 * likely to change as new drivers are added and updated.
5239 * Do not depend on ABI/API stability.
5240 */
5241
5242 EXPORT_SYMBOL_GPL(ata_std_bios_param);
5243 EXPORT_SYMBOL_GPL(ata_std_ports);
5244 EXPORT_SYMBOL_GPL(ata_device_add);
5245 EXPORT_SYMBOL_GPL(ata_host_set_remove);
5246 EXPORT_SYMBOL_GPL(ata_sg_init);
5247 EXPORT_SYMBOL_GPL(ata_sg_init_one);
5248 EXPORT_SYMBOL_GPL(__ata_qc_complete);
5249 EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
5250 EXPORT_SYMBOL_GPL(ata_tf_load);
5251 EXPORT_SYMBOL_GPL(ata_tf_read);
5252 EXPORT_SYMBOL_GPL(ata_noop_dev_select);
5253 EXPORT_SYMBOL_GPL(ata_std_dev_select);
5254 EXPORT_SYMBOL_GPL(ata_tf_to_fis);
5255 EXPORT_SYMBOL_GPL(ata_tf_from_fis);
5256 EXPORT_SYMBOL_GPL(ata_check_status);
5257 EXPORT_SYMBOL_GPL(ata_altstatus);
5258 EXPORT_SYMBOL_GPL(ata_exec_command);
5259 EXPORT_SYMBOL_GPL(ata_port_start);
5260 EXPORT_SYMBOL_GPL(ata_port_stop);
5261 EXPORT_SYMBOL_GPL(ata_host_stop);
5262 EXPORT_SYMBOL_GPL(ata_interrupt);
5263 EXPORT_SYMBOL_GPL(ata_qc_prep);
5264 EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
5265 EXPORT_SYMBOL_GPL(ata_bmdma_setup);
5266 EXPORT_SYMBOL_GPL(ata_bmdma_start);
5267 EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
5268 EXPORT_SYMBOL_GPL(ata_bmdma_status);
5269 EXPORT_SYMBOL_GPL(ata_bmdma_stop);
5270 EXPORT_SYMBOL_GPL(ata_port_probe);
5271 EXPORT_SYMBOL_GPL(sata_set_spd);
5272 EXPORT_SYMBOL_GPL(sata_phy_reset);
5273 EXPORT_SYMBOL_GPL(__sata_phy_reset);
5274 EXPORT_SYMBOL_GPL(ata_bus_reset);
5275 EXPORT_SYMBOL_GPL(ata_std_probeinit);
5276 EXPORT_SYMBOL_GPL(ata_std_softreset);
5277 EXPORT_SYMBOL_GPL(sata_std_hardreset);
5278 EXPORT_SYMBOL_GPL(ata_std_postreset);
5279 EXPORT_SYMBOL_GPL(ata_std_probe_reset);
5280 EXPORT_SYMBOL_GPL(ata_drive_probe_reset);
5281 EXPORT_SYMBOL_GPL(ata_dev_revalidate);
5282 EXPORT_SYMBOL_GPL(ata_dev_classify);
5283 EXPORT_SYMBOL_GPL(ata_dev_pair);
5284 EXPORT_SYMBOL_GPL(ata_port_disable);
5285 EXPORT_SYMBOL_GPL(ata_ratelimit);
5286 EXPORT_SYMBOL_GPL(ata_wait_register);
5287 EXPORT_SYMBOL_GPL(ata_busy_sleep);
5288 EXPORT_SYMBOL_GPL(ata_port_queue_task);
5289 EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
5290 EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
5291 EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
5292 EXPORT_SYMBOL_GPL(ata_scsi_release);
5293 EXPORT_SYMBOL_GPL(ata_host_intr);
5294 EXPORT_SYMBOL_GPL(sata_scr_valid);
5295 EXPORT_SYMBOL_GPL(sata_scr_read);
5296 EXPORT_SYMBOL_GPL(sata_scr_write);
5297 EXPORT_SYMBOL_GPL(sata_scr_write_flush);
5298 EXPORT_SYMBOL_GPL(ata_port_online);
5299 EXPORT_SYMBOL_GPL(ata_port_offline);
5300 EXPORT_SYMBOL_GPL(ata_id_string);
5301 EXPORT_SYMBOL_GPL(ata_id_c_string);
5302 EXPORT_SYMBOL_GPL(ata_scsi_simulate);
5303
5304 EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
5305 EXPORT_SYMBOL_GPL(ata_timing_compute);
5306 EXPORT_SYMBOL_GPL(ata_timing_merge);
5307
5308 #ifdef CONFIG_PCI
5309 EXPORT_SYMBOL_GPL(pci_test_config_bits);
5310 EXPORT_SYMBOL_GPL(ata_pci_host_stop);
5311 EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
5312 EXPORT_SYMBOL_GPL(ata_pci_init_one);
5313 EXPORT_SYMBOL_GPL(ata_pci_remove_one);
5314 EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
5315 EXPORT_SYMBOL_GPL(ata_pci_device_resume);
5316 EXPORT_SYMBOL_GPL(ata_pci_default_filter);
5317 EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);
5318 #endif /* CONFIG_PCI */
5319
5320 EXPORT_SYMBOL_GPL(ata_device_suspend);
5321 EXPORT_SYMBOL_GPL(ata_device_resume);
5322 EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
5323 EXPORT_SYMBOL_GPL(ata_scsi_device_resume);
5324
5325 EXPORT_SYMBOL_GPL(ata_eng_timeout);
5326 EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
5327 EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
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