[PATCH] libata: use SATA speed down in ata_drive_probe_reset()
[deliverable/linux.git] / drivers / scsi / libata-core.c
1 /*
2 * libata-core.c - helper library for ATA
3 *
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
32 *
33 */
34
35 #include <linux/config.h>
36 #include <linux/kernel.h>
37 #include <linux/module.h>
38 #include <linux/pci.h>
39 #include <linux/init.h>
40 #include <linux/list.h>
41 #include <linux/mm.h>
42 #include <linux/highmem.h>
43 #include <linux/spinlock.h>
44 #include <linux/blkdev.h>
45 #include <linux/delay.h>
46 #include <linux/timer.h>
47 #include <linux/interrupt.h>
48 #include <linux/completion.h>
49 #include <linux/suspend.h>
50 #include <linux/workqueue.h>
51 #include <linux/jiffies.h>
52 #include <linux/scatterlist.h>
53 #include <scsi/scsi.h>
54 #include "scsi_priv.h"
55 #include <scsi/scsi_cmnd.h>
56 #include <scsi/scsi_host.h>
57 #include <linux/libata.h>
58 #include <asm/io.h>
59 #include <asm/semaphore.h>
60 #include <asm/byteorder.h>
61
62 #include "libata.h"
63
64 static unsigned int ata_dev_init_params(struct ata_port *ap,
65 struct ata_device *dev,
66 u16 heads,
67 u16 sectors);
68 static int ata_down_sata_spd_limit(struct ata_port *ap);
69 static int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev);
70 static unsigned int ata_dev_set_xfermode(struct ata_port *ap,
71 struct ata_device *dev);
72 static void ata_dev_xfermask(struct ata_port *ap, struct ata_device *dev);
73
74 static unsigned int ata_unique_id = 1;
75 static struct workqueue_struct *ata_wq;
76
77 int atapi_enabled = 1;
78 module_param(atapi_enabled, int, 0444);
79 MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
80
81 int libata_fua = 0;
82 module_param_named(fua, libata_fua, int, 0444);
83 MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
84
85 MODULE_AUTHOR("Jeff Garzik");
86 MODULE_DESCRIPTION("Library module for ATA devices");
87 MODULE_LICENSE("GPL");
88 MODULE_VERSION(DRV_VERSION);
89
90
91 /**
92 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
93 * @tf: Taskfile to convert
94 * @fis: Buffer into which data will output
95 * @pmp: Port multiplier port
96 *
97 * Converts a standard ATA taskfile to a Serial ATA
98 * FIS structure (Register - Host to Device).
99 *
100 * LOCKING:
101 * Inherited from caller.
102 */
103
104 void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
105 {
106 fis[0] = 0x27; /* Register - Host to Device FIS */
107 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
108 bit 7 indicates Command FIS */
109 fis[2] = tf->command;
110 fis[3] = tf->feature;
111
112 fis[4] = tf->lbal;
113 fis[5] = tf->lbam;
114 fis[6] = tf->lbah;
115 fis[7] = tf->device;
116
117 fis[8] = tf->hob_lbal;
118 fis[9] = tf->hob_lbam;
119 fis[10] = tf->hob_lbah;
120 fis[11] = tf->hob_feature;
121
122 fis[12] = tf->nsect;
123 fis[13] = tf->hob_nsect;
124 fis[14] = 0;
125 fis[15] = tf->ctl;
126
127 fis[16] = 0;
128 fis[17] = 0;
129 fis[18] = 0;
130 fis[19] = 0;
131 }
132
133 /**
134 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
135 * @fis: Buffer from which data will be input
136 * @tf: Taskfile to output
137 *
138 * Converts a serial ATA FIS structure to a standard ATA taskfile.
139 *
140 * LOCKING:
141 * Inherited from caller.
142 */
143
144 void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
145 {
146 tf->command = fis[2]; /* status */
147 tf->feature = fis[3]; /* error */
148
149 tf->lbal = fis[4];
150 tf->lbam = fis[5];
151 tf->lbah = fis[6];
152 tf->device = fis[7];
153
154 tf->hob_lbal = fis[8];
155 tf->hob_lbam = fis[9];
156 tf->hob_lbah = fis[10];
157
158 tf->nsect = fis[12];
159 tf->hob_nsect = fis[13];
160 }
161
162 static const u8 ata_rw_cmds[] = {
163 /* pio multi */
164 ATA_CMD_READ_MULTI,
165 ATA_CMD_WRITE_MULTI,
166 ATA_CMD_READ_MULTI_EXT,
167 ATA_CMD_WRITE_MULTI_EXT,
168 0,
169 0,
170 0,
171 ATA_CMD_WRITE_MULTI_FUA_EXT,
172 /* pio */
173 ATA_CMD_PIO_READ,
174 ATA_CMD_PIO_WRITE,
175 ATA_CMD_PIO_READ_EXT,
176 ATA_CMD_PIO_WRITE_EXT,
177 0,
178 0,
179 0,
180 0,
181 /* dma */
182 ATA_CMD_READ,
183 ATA_CMD_WRITE,
184 ATA_CMD_READ_EXT,
185 ATA_CMD_WRITE_EXT,
186 0,
187 0,
188 0,
189 ATA_CMD_WRITE_FUA_EXT
190 };
191
192 /**
193 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
194 * @qc: command to examine and configure
195 *
196 * Examine the device configuration and tf->flags to calculate
197 * the proper read/write commands and protocol to use.
198 *
199 * LOCKING:
200 * caller.
201 */
202 int ata_rwcmd_protocol(struct ata_queued_cmd *qc)
203 {
204 struct ata_taskfile *tf = &qc->tf;
205 struct ata_device *dev = qc->dev;
206 u8 cmd;
207
208 int index, fua, lba48, write;
209
210 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
211 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
212 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
213
214 if (dev->flags & ATA_DFLAG_PIO) {
215 tf->protocol = ATA_PROT_PIO;
216 index = dev->multi_count ? 0 : 8;
217 } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) {
218 /* Unable to use DMA due to host limitation */
219 tf->protocol = ATA_PROT_PIO;
220 index = dev->multi_count ? 0 : 8;
221 } else {
222 tf->protocol = ATA_PROT_DMA;
223 index = 16;
224 }
225
226 cmd = ata_rw_cmds[index + fua + lba48 + write];
227 if (cmd) {
228 tf->command = cmd;
229 return 0;
230 }
231 return -1;
232 }
233
234 /**
235 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
236 * @pio_mask: pio_mask
237 * @mwdma_mask: mwdma_mask
238 * @udma_mask: udma_mask
239 *
240 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
241 * unsigned int xfer_mask.
242 *
243 * LOCKING:
244 * None.
245 *
246 * RETURNS:
247 * Packed xfer_mask.
248 */
249 static unsigned int ata_pack_xfermask(unsigned int pio_mask,
250 unsigned int mwdma_mask,
251 unsigned int udma_mask)
252 {
253 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
254 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
255 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
256 }
257
258 /**
259 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
260 * @xfer_mask: xfer_mask to unpack
261 * @pio_mask: resulting pio_mask
262 * @mwdma_mask: resulting mwdma_mask
263 * @udma_mask: resulting udma_mask
264 *
265 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
266 * Any NULL distination masks will be ignored.
267 */
268 static void ata_unpack_xfermask(unsigned int xfer_mask,
269 unsigned int *pio_mask,
270 unsigned int *mwdma_mask,
271 unsigned int *udma_mask)
272 {
273 if (pio_mask)
274 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
275 if (mwdma_mask)
276 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
277 if (udma_mask)
278 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
279 }
280
281 static const struct ata_xfer_ent {
282 int shift, bits;
283 u8 base;
284 } ata_xfer_tbl[] = {
285 { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
286 { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
287 { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
288 { -1, },
289 };
290
291 /**
292 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
293 * @xfer_mask: xfer_mask of interest
294 *
295 * Return matching XFER_* value for @xfer_mask. Only the highest
296 * bit of @xfer_mask is considered.
297 *
298 * LOCKING:
299 * None.
300 *
301 * RETURNS:
302 * Matching XFER_* value, 0 if no match found.
303 */
304 static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
305 {
306 int highbit = fls(xfer_mask) - 1;
307 const struct ata_xfer_ent *ent;
308
309 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
310 if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
311 return ent->base + highbit - ent->shift;
312 return 0;
313 }
314
315 /**
316 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
317 * @xfer_mode: XFER_* of interest
318 *
319 * Return matching xfer_mask for @xfer_mode.
320 *
321 * LOCKING:
322 * None.
323 *
324 * RETURNS:
325 * Matching xfer_mask, 0 if no match found.
326 */
327 static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
328 {
329 const struct ata_xfer_ent *ent;
330
331 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
332 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
333 return 1 << (ent->shift + xfer_mode - ent->base);
334 return 0;
335 }
336
337 /**
338 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
339 * @xfer_mode: XFER_* of interest
340 *
341 * Return matching xfer_shift for @xfer_mode.
342 *
343 * LOCKING:
344 * None.
345 *
346 * RETURNS:
347 * Matching xfer_shift, -1 if no match found.
348 */
349 static int ata_xfer_mode2shift(unsigned int xfer_mode)
350 {
351 const struct ata_xfer_ent *ent;
352
353 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
354 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
355 return ent->shift;
356 return -1;
357 }
358
359 /**
360 * ata_mode_string - convert xfer_mask to string
361 * @xfer_mask: mask of bits supported; only highest bit counts.
362 *
363 * Determine string which represents the highest speed
364 * (highest bit in @modemask).
365 *
366 * LOCKING:
367 * None.
368 *
369 * RETURNS:
370 * Constant C string representing highest speed listed in
371 * @mode_mask, or the constant C string "<n/a>".
372 */
373 static const char *ata_mode_string(unsigned int xfer_mask)
374 {
375 static const char * const xfer_mode_str[] = {
376 "PIO0",
377 "PIO1",
378 "PIO2",
379 "PIO3",
380 "PIO4",
381 "MWDMA0",
382 "MWDMA1",
383 "MWDMA2",
384 "UDMA/16",
385 "UDMA/25",
386 "UDMA/33",
387 "UDMA/44",
388 "UDMA/66",
389 "UDMA/100",
390 "UDMA/133",
391 "UDMA7",
392 };
393 int highbit;
394
395 highbit = fls(xfer_mask) - 1;
396 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
397 return xfer_mode_str[highbit];
398 return "<n/a>";
399 }
400
401 static const char *sata_spd_string(unsigned int spd)
402 {
403 static const char * const spd_str[] = {
404 "1.5 Gbps",
405 "3.0 Gbps",
406 };
407
408 if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
409 return "<unknown>";
410 return spd_str[spd - 1];
411 }
412
413 static void ata_dev_disable(struct ata_port *ap, struct ata_device *dev)
414 {
415 if (ata_dev_enabled(dev)) {
416 printk(KERN_WARNING "ata%u: dev %u disabled\n",
417 ap->id, dev->devno);
418 dev->class++;
419 }
420 }
421
422 /**
423 * ata_pio_devchk - PATA device presence detection
424 * @ap: ATA channel to examine
425 * @device: Device to examine (starting at zero)
426 *
427 * This technique was originally described in
428 * Hale Landis's ATADRVR (www.ata-atapi.com), and
429 * later found its way into the ATA/ATAPI spec.
430 *
431 * Write a pattern to the ATA shadow registers,
432 * and if a device is present, it will respond by
433 * correctly storing and echoing back the
434 * ATA shadow register contents.
435 *
436 * LOCKING:
437 * caller.
438 */
439
440 static unsigned int ata_pio_devchk(struct ata_port *ap,
441 unsigned int device)
442 {
443 struct ata_ioports *ioaddr = &ap->ioaddr;
444 u8 nsect, lbal;
445
446 ap->ops->dev_select(ap, device);
447
448 outb(0x55, ioaddr->nsect_addr);
449 outb(0xaa, ioaddr->lbal_addr);
450
451 outb(0xaa, ioaddr->nsect_addr);
452 outb(0x55, ioaddr->lbal_addr);
453
454 outb(0x55, ioaddr->nsect_addr);
455 outb(0xaa, ioaddr->lbal_addr);
456
457 nsect = inb(ioaddr->nsect_addr);
458 lbal = inb(ioaddr->lbal_addr);
459
460 if ((nsect == 0x55) && (lbal == 0xaa))
461 return 1; /* we found a device */
462
463 return 0; /* nothing found */
464 }
465
466 /**
467 * ata_mmio_devchk - PATA device presence detection
468 * @ap: ATA channel to examine
469 * @device: Device to examine (starting at zero)
470 *
471 * This technique was originally described in
472 * Hale Landis's ATADRVR (www.ata-atapi.com), and
473 * later found its way into the ATA/ATAPI spec.
474 *
475 * Write a pattern to the ATA shadow registers,
476 * and if a device is present, it will respond by
477 * correctly storing and echoing back the
478 * ATA shadow register contents.
479 *
480 * LOCKING:
481 * caller.
482 */
483
484 static unsigned int ata_mmio_devchk(struct ata_port *ap,
485 unsigned int device)
486 {
487 struct ata_ioports *ioaddr = &ap->ioaddr;
488 u8 nsect, lbal;
489
490 ap->ops->dev_select(ap, device);
491
492 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
493 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
494
495 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
496 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
497
498 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
499 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
500
501 nsect = readb((void __iomem *) ioaddr->nsect_addr);
502 lbal = readb((void __iomem *) ioaddr->lbal_addr);
503
504 if ((nsect == 0x55) && (lbal == 0xaa))
505 return 1; /* we found a device */
506
507 return 0; /* nothing found */
508 }
509
510 /**
511 * ata_devchk - PATA device presence detection
512 * @ap: ATA channel to examine
513 * @device: Device to examine (starting at zero)
514 *
515 * Dispatch ATA device presence detection, depending
516 * on whether we are using PIO or MMIO to talk to the
517 * ATA shadow registers.
518 *
519 * LOCKING:
520 * caller.
521 */
522
523 static unsigned int ata_devchk(struct ata_port *ap,
524 unsigned int device)
525 {
526 if (ap->flags & ATA_FLAG_MMIO)
527 return ata_mmio_devchk(ap, device);
528 return ata_pio_devchk(ap, device);
529 }
530
531 /**
532 * ata_dev_classify - determine device type based on ATA-spec signature
533 * @tf: ATA taskfile register set for device to be identified
534 *
535 * Determine from taskfile register contents whether a device is
536 * ATA or ATAPI, as per "Signature and persistence" section
537 * of ATA/PI spec (volume 1, sect 5.14).
538 *
539 * LOCKING:
540 * None.
541 *
542 * RETURNS:
543 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
544 * the event of failure.
545 */
546
547 unsigned int ata_dev_classify(const struct ata_taskfile *tf)
548 {
549 /* Apple's open source Darwin code hints that some devices only
550 * put a proper signature into the LBA mid/high registers,
551 * So, we only check those. It's sufficient for uniqueness.
552 */
553
554 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
555 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
556 DPRINTK("found ATA device by sig\n");
557 return ATA_DEV_ATA;
558 }
559
560 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
561 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
562 DPRINTK("found ATAPI device by sig\n");
563 return ATA_DEV_ATAPI;
564 }
565
566 DPRINTK("unknown device\n");
567 return ATA_DEV_UNKNOWN;
568 }
569
570 /**
571 * ata_dev_try_classify - Parse returned ATA device signature
572 * @ap: ATA channel to examine
573 * @device: Device to examine (starting at zero)
574 * @r_err: Value of error register on completion
575 *
576 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
577 * an ATA/ATAPI-defined set of values is placed in the ATA
578 * shadow registers, indicating the results of device detection
579 * and diagnostics.
580 *
581 * Select the ATA device, and read the values from the ATA shadow
582 * registers. Then parse according to the Error register value,
583 * and the spec-defined values examined by ata_dev_classify().
584 *
585 * LOCKING:
586 * caller.
587 *
588 * RETURNS:
589 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
590 */
591
592 static unsigned int
593 ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
594 {
595 struct ata_taskfile tf;
596 unsigned int class;
597 u8 err;
598
599 ap->ops->dev_select(ap, device);
600
601 memset(&tf, 0, sizeof(tf));
602
603 ap->ops->tf_read(ap, &tf);
604 err = tf.feature;
605 if (r_err)
606 *r_err = err;
607
608 /* see if device passed diags */
609 if (err == 1)
610 /* do nothing */ ;
611 else if ((device == 0) && (err == 0x81))
612 /* do nothing */ ;
613 else
614 return ATA_DEV_NONE;
615
616 /* determine if device is ATA or ATAPI */
617 class = ata_dev_classify(&tf);
618
619 if (class == ATA_DEV_UNKNOWN)
620 return ATA_DEV_NONE;
621 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
622 return ATA_DEV_NONE;
623 return class;
624 }
625
626 /**
627 * ata_id_string - Convert IDENTIFY DEVICE page into string
628 * @id: IDENTIFY DEVICE results we will examine
629 * @s: string into which data is output
630 * @ofs: offset into identify device page
631 * @len: length of string to return. must be an even number.
632 *
633 * The strings in the IDENTIFY DEVICE page are broken up into
634 * 16-bit chunks. Run through the string, and output each
635 * 8-bit chunk linearly, regardless of platform.
636 *
637 * LOCKING:
638 * caller.
639 */
640
641 void ata_id_string(const u16 *id, unsigned char *s,
642 unsigned int ofs, unsigned int len)
643 {
644 unsigned int c;
645
646 while (len > 0) {
647 c = id[ofs] >> 8;
648 *s = c;
649 s++;
650
651 c = id[ofs] & 0xff;
652 *s = c;
653 s++;
654
655 ofs++;
656 len -= 2;
657 }
658 }
659
660 /**
661 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
662 * @id: IDENTIFY DEVICE results we will examine
663 * @s: string into which data is output
664 * @ofs: offset into identify device page
665 * @len: length of string to return. must be an odd number.
666 *
667 * This function is identical to ata_id_string except that it
668 * trims trailing spaces and terminates the resulting string with
669 * null. @len must be actual maximum length (even number) + 1.
670 *
671 * LOCKING:
672 * caller.
673 */
674 void ata_id_c_string(const u16 *id, unsigned char *s,
675 unsigned int ofs, unsigned int len)
676 {
677 unsigned char *p;
678
679 WARN_ON(!(len & 1));
680
681 ata_id_string(id, s, ofs, len - 1);
682
683 p = s + strnlen(s, len - 1);
684 while (p > s && p[-1] == ' ')
685 p--;
686 *p = '\0';
687 }
688
689 static u64 ata_id_n_sectors(const u16 *id)
690 {
691 if (ata_id_has_lba(id)) {
692 if (ata_id_has_lba48(id))
693 return ata_id_u64(id, 100);
694 else
695 return ata_id_u32(id, 60);
696 } else {
697 if (ata_id_current_chs_valid(id))
698 return ata_id_u32(id, 57);
699 else
700 return id[1] * id[3] * id[6];
701 }
702 }
703
704 /**
705 * ata_noop_dev_select - Select device 0/1 on ATA bus
706 * @ap: ATA channel to manipulate
707 * @device: ATA device (numbered from zero) to select
708 *
709 * This function performs no actual function.
710 *
711 * May be used as the dev_select() entry in ata_port_operations.
712 *
713 * LOCKING:
714 * caller.
715 */
716 void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
717 {
718 }
719
720
721 /**
722 * ata_std_dev_select - Select device 0/1 on ATA bus
723 * @ap: ATA channel to manipulate
724 * @device: ATA device (numbered from zero) to select
725 *
726 * Use the method defined in the ATA specification to
727 * make either device 0, or device 1, active on the
728 * ATA channel. Works with both PIO and MMIO.
729 *
730 * May be used as the dev_select() entry in ata_port_operations.
731 *
732 * LOCKING:
733 * caller.
734 */
735
736 void ata_std_dev_select (struct ata_port *ap, unsigned int device)
737 {
738 u8 tmp;
739
740 if (device == 0)
741 tmp = ATA_DEVICE_OBS;
742 else
743 tmp = ATA_DEVICE_OBS | ATA_DEV1;
744
745 if (ap->flags & ATA_FLAG_MMIO) {
746 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
747 } else {
748 outb(tmp, ap->ioaddr.device_addr);
749 }
750 ata_pause(ap); /* needed; also flushes, for mmio */
751 }
752
753 /**
754 * ata_dev_select - Select device 0/1 on ATA bus
755 * @ap: ATA channel to manipulate
756 * @device: ATA device (numbered from zero) to select
757 * @wait: non-zero to wait for Status register BSY bit to clear
758 * @can_sleep: non-zero if context allows sleeping
759 *
760 * Use the method defined in the ATA specification to
761 * make either device 0, or device 1, active on the
762 * ATA channel.
763 *
764 * This is a high-level version of ata_std_dev_select(),
765 * which additionally provides the services of inserting
766 * the proper pauses and status polling, where needed.
767 *
768 * LOCKING:
769 * caller.
770 */
771
772 void ata_dev_select(struct ata_port *ap, unsigned int device,
773 unsigned int wait, unsigned int can_sleep)
774 {
775 VPRINTK("ENTER, ata%u: device %u, wait %u\n",
776 ap->id, device, wait);
777
778 if (wait)
779 ata_wait_idle(ap);
780
781 ap->ops->dev_select(ap, device);
782
783 if (wait) {
784 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
785 msleep(150);
786 ata_wait_idle(ap);
787 }
788 }
789
790 /**
791 * ata_dump_id - IDENTIFY DEVICE info debugging output
792 * @id: IDENTIFY DEVICE page to dump
793 *
794 * Dump selected 16-bit words from the given IDENTIFY DEVICE
795 * page.
796 *
797 * LOCKING:
798 * caller.
799 */
800
801 static inline void ata_dump_id(const u16 *id)
802 {
803 DPRINTK("49==0x%04x "
804 "53==0x%04x "
805 "63==0x%04x "
806 "64==0x%04x "
807 "75==0x%04x \n",
808 id[49],
809 id[53],
810 id[63],
811 id[64],
812 id[75]);
813 DPRINTK("80==0x%04x "
814 "81==0x%04x "
815 "82==0x%04x "
816 "83==0x%04x "
817 "84==0x%04x \n",
818 id[80],
819 id[81],
820 id[82],
821 id[83],
822 id[84]);
823 DPRINTK("88==0x%04x "
824 "93==0x%04x\n",
825 id[88],
826 id[93]);
827 }
828
829 /**
830 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
831 * @id: IDENTIFY data to compute xfer mask from
832 *
833 * Compute the xfermask for this device. This is not as trivial
834 * as it seems if we must consider early devices correctly.
835 *
836 * FIXME: pre IDE drive timing (do we care ?).
837 *
838 * LOCKING:
839 * None.
840 *
841 * RETURNS:
842 * Computed xfermask
843 */
844 static unsigned int ata_id_xfermask(const u16 *id)
845 {
846 unsigned int pio_mask, mwdma_mask, udma_mask;
847
848 /* Usual case. Word 53 indicates word 64 is valid */
849 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
850 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
851 pio_mask <<= 3;
852 pio_mask |= 0x7;
853 } else {
854 /* If word 64 isn't valid then Word 51 high byte holds
855 * the PIO timing number for the maximum. Turn it into
856 * a mask.
857 */
858 pio_mask = (2 << (id[ATA_ID_OLD_PIO_MODES] & 0xFF)) - 1 ;
859
860 /* But wait.. there's more. Design your standards by
861 * committee and you too can get a free iordy field to
862 * process. However its the speeds not the modes that
863 * are supported... Note drivers using the timing API
864 * will get this right anyway
865 */
866 }
867
868 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
869
870 udma_mask = 0;
871 if (id[ATA_ID_FIELD_VALID] & (1 << 2))
872 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
873
874 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
875 }
876
877 /**
878 * ata_port_queue_task - Queue port_task
879 * @ap: The ata_port to queue port_task for
880 *
881 * Schedule @fn(@data) for execution after @delay jiffies using
882 * port_task. There is one port_task per port and it's the
883 * user(low level driver)'s responsibility to make sure that only
884 * one task is active at any given time.
885 *
886 * libata core layer takes care of synchronization between
887 * port_task and EH. ata_port_queue_task() may be ignored for EH
888 * synchronization.
889 *
890 * LOCKING:
891 * Inherited from caller.
892 */
893 void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *), void *data,
894 unsigned long delay)
895 {
896 int rc;
897
898 if (ap->flags & ATA_FLAG_FLUSH_PORT_TASK)
899 return;
900
901 PREPARE_WORK(&ap->port_task, fn, data);
902
903 if (!delay)
904 rc = queue_work(ata_wq, &ap->port_task);
905 else
906 rc = queue_delayed_work(ata_wq, &ap->port_task, delay);
907
908 /* rc == 0 means that another user is using port task */
909 WARN_ON(rc == 0);
910 }
911
912 /**
913 * ata_port_flush_task - Flush port_task
914 * @ap: The ata_port to flush port_task for
915 *
916 * After this function completes, port_task is guranteed not to
917 * be running or scheduled.
918 *
919 * LOCKING:
920 * Kernel thread context (may sleep)
921 */
922 void ata_port_flush_task(struct ata_port *ap)
923 {
924 unsigned long flags;
925
926 DPRINTK("ENTER\n");
927
928 spin_lock_irqsave(&ap->host_set->lock, flags);
929 ap->flags |= ATA_FLAG_FLUSH_PORT_TASK;
930 spin_unlock_irqrestore(&ap->host_set->lock, flags);
931
932 DPRINTK("flush #1\n");
933 flush_workqueue(ata_wq);
934
935 /*
936 * At this point, if a task is running, it's guaranteed to see
937 * the FLUSH flag; thus, it will never queue pio tasks again.
938 * Cancel and flush.
939 */
940 if (!cancel_delayed_work(&ap->port_task)) {
941 DPRINTK("flush #2\n");
942 flush_workqueue(ata_wq);
943 }
944
945 spin_lock_irqsave(&ap->host_set->lock, flags);
946 ap->flags &= ~ATA_FLAG_FLUSH_PORT_TASK;
947 spin_unlock_irqrestore(&ap->host_set->lock, flags);
948
949 DPRINTK("EXIT\n");
950 }
951
952 void ata_qc_complete_internal(struct ata_queued_cmd *qc)
953 {
954 struct completion *waiting = qc->private_data;
955
956 qc->ap->ops->tf_read(qc->ap, &qc->tf);
957 complete(waiting);
958 }
959
960 /**
961 * ata_exec_internal - execute libata internal command
962 * @ap: Port to which the command is sent
963 * @dev: Device to which the command is sent
964 * @tf: Taskfile registers for the command and the result
965 * @dma_dir: Data tranfer direction of the command
966 * @buf: Data buffer of the command
967 * @buflen: Length of data buffer
968 *
969 * Executes libata internal command with timeout. @tf contains
970 * command on entry and result on return. Timeout and error
971 * conditions are reported via return value. No recovery action
972 * is taken after a command times out. It's caller's duty to
973 * clean up after timeout.
974 *
975 * LOCKING:
976 * None. Should be called with kernel context, might sleep.
977 */
978
979 static unsigned
980 ata_exec_internal(struct ata_port *ap, struct ata_device *dev,
981 struct ata_taskfile *tf,
982 int dma_dir, void *buf, unsigned int buflen)
983 {
984 u8 command = tf->command;
985 struct ata_queued_cmd *qc;
986 DECLARE_COMPLETION(wait);
987 unsigned long flags;
988 unsigned int err_mask;
989
990 spin_lock_irqsave(&ap->host_set->lock, flags);
991
992 qc = ata_qc_new_init(ap, dev);
993 BUG_ON(qc == NULL);
994
995 qc->tf = *tf;
996 qc->dma_dir = dma_dir;
997 if (dma_dir != DMA_NONE) {
998 ata_sg_init_one(qc, buf, buflen);
999 qc->nsect = buflen / ATA_SECT_SIZE;
1000 }
1001
1002 qc->private_data = &wait;
1003 qc->complete_fn = ata_qc_complete_internal;
1004
1005 ata_qc_issue(qc);
1006
1007 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1008
1009 if (!wait_for_completion_timeout(&wait, ATA_TMOUT_INTERNAL)) {
1010 ata_port_flush_task(ap);
1011
1012 spin_lock_irqsave(&ap->host_set->lock, flags);
1013
1014 /* We're racing with irq here. If we lose, the
1015 * following test prevents us from completing the qc
1016 * again. If completion irq occurs after here but
1017 * before the caller cleans up, it will result in a
1018 * spurious interrupt. We can live with that.
1019 */
1020 if (qc->flags & ATA_QCFLAG_ACTIVE) {
1021 qc->err_mask = AC_ERR_TIMEOUT;
1022 ata_qc_complete(qc);
1023 printk(KERN_WARNING "ata%u: qc timeout (cmd 0x%x)\n",
1024 ap->id, command);
1025 }
1026
1027 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1028 }
1029
1030 *tf = qc->tf;
1031 err_mask = qc->err_mask;
1032
1033 ata_qc_free(qc);
1034
1035 /* XXX - Some LLDDs (sata_mv) disable port on command failure.
1036 * Until those drivers are fixed, we detect the condition
1037 * here, fail the command with AC_ERR_SYSTEM and reenable the
1038 * port.
1039 *
1040 * Note that this doesn't change any behavior as internal
1041 * command failure results in disabling the device in the
1042 * higher layer for LLDDs without new reset/EH callbacks.
1043 *
1044 * Kill the following code as soon as those drivers are fixed.
1045 */
1046 if (ap->flags & ATA_FLAG_PORT_DISABLED) {
1047 err_mask |= AC_ERR_SYSTEM;
1048 ata_port_probe(ap);
1049 }
1050
1051 return err_mask;
1052 }
1053
1054 /**
1055 * ata_pio_need_iordy - check if iordy needed
1056 * @adev: ATA device
1057 *
1058 * Check if the current speed of the device requires IORDY. Used
1059 * by various controllers for chip configuration.
1060 */
1061
1062 unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1063 {
1064 int pio;
1065 int speed = adev->pio_mode - XFER_PIO_0;
1066
1067 if (speed < 2)
1068 return 0;
1069 if (speed > 2)
1070 return 1;
1071
1072 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1073
1074 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
1075 pio = adev->id[ATA_ID_EIDE_PIO];
1076 /* Is the speed faster than the drive allows non IORDY ? */
1077 if (pio) {
1078 /* This is cycle times not frequency - watch the logic! */
1079 if (pio > 240) /* PIO2 is 240nS per cycle */
1080 return 1;
1081 return 0;
1082 }
1083 }
1084 return 0;
1085 }
1086
1087 /**
1088 * ata_dev_read_id - Read ID data from the specified device
1089 * @ap: port on which target device resides
1090 * @dev: target device
1091 * @p_class: pointer to class of the target device (may be changed)
1092 * @post_reset: is this read ID post-reset?
1093 * @p_id: read IDENTIFY page (newly allocated)
1094 *
1095 * Read ID data from the specified device. ATA_CMD_ID_ATA is
1096 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
1097 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
1098 * for pre-ATA4 drives.
1099 *
1100 * LOCKING:
1101 * Kernel thread context (may sleep)
1102 *
1103 * RETURNS:
1104 * 0 on success, -errno otherwise.
1105 */
1106 static int ata_dev_read_id(struct ata_port *ap, struct ata_device *dev,
1107 unsigned int *p_class, int post_reset, u16 **p_id)
1108 {
1109 unsigned int class = *p_class;
1110 struct ata_taskfile tf;
1111 unsigned int err_mask = 0;
1112 u16 *id;
1113 const char *reason;
1114 int rc;
1115
1116 DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
1117
1118 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
1119
1120 id = kmalloc(sizeof(id[0]) * ATA_ID_WORDS, GFP_KERNEL);
1121 if (id == NULL) {
1122 rc = -ENOMEM;
1123 reason = "out of memory";
1124 goto err_out;
1125 }
1126
1127 retry:
1128 ata_tf_init(ap, &tf, dev->devno);
1129
1130 switch (class) {
1131 case ATA_DEV_ATA:
1132 tf.command = ATA_CMD_ID_ATA;
1133 break;
1134 case ATA_DEV_ATAPI:
1135 tf.command = ATA_CMD_ID_ATAPI;
1136 break;
1137 default:
1138 rc = -ENODEV;
1139 reason = "unsupported class";
1140 goto err_out;
1141 }
1142
1143 tf.protocol = ATA_PROT_PIO;
1144
1145 err_mask = ata_exec_internal(ap, dev, &tf, DMA_FROM_DEVICE,
1146 id, sizeof(id[0]) * ATA_ID_WORDS);
1147 if (err_mask) {
1148 rc = -EIO;
1149 reason = "I/O error";
1150 goto err_out;
1151 }
1152
1153 swap_buf_le16(id, ATA_ID_WORDS);
1154
1155 /* sanity check */
1156 if ((class == ATA_DEV_ATA) != (ata_id_is_ata(id) | ata_id_is_cfa(id))) {
1157 rc = -EINVAL;
1158 reason = "device reports illegal type";
1159 goto err_out;
1160 }
1161
1162 if (post_reset && class == ATA_DEV_ATA) {
1163 /*
1164 * The exact sequence expected by certain pre-ATA4 drives is:
1165 * SRST RESET
1166 * IDENTIFY
1167 * INITIALIZE DEVICE PARAMETERS
1168 * anything else..
1169 * Some drives were very specific about that exact sequence.
1170 */
1171 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
1172 err_mask = ata_dev_init_params(ap, dev, id[3], id[6]);
1173 if (err_mask) {
1174 rc = -EIO;
1175 reason = "INIT_DEV_PARAMS failed";
1176 goto err_out;
1177 }
1178
1179 /* current CHS translation info (id[53-58]) might be
1180 * changed. reread the identify device info.
1181 */
1182 post_reset = 0;
1183 goto retry;
1184 }
1185 }
1186
1187 *p_class = class;
1188 *p_id = id;
1189 return 0;
1190
1191 err_out:
1192 printk(KERN_WARNING "ata%u: dev %u failed to IDENTIFY (%s)\n",
1193 ap->id, dev->devno, reason);
1194 kfree(id);
1195 return rc;
1196 }
1197
1198 static inline u8 ata_dev_knobble(const struct ata_port *ap,
1199 struct ata_device *dev)
1200 {
1201 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
1202 }
1203
1204 /**
1205 * ata_dev_configure - Configure the specified ATA/ATAPI device
1206 * @ap: Port on which target device resides
1207 * @dev: Target device to configure
1208 * @print_info: Enable device info printout
1209 *
1210 * Configure @dev according to @dev->id. Generic and low-level
1211 * driver specific fixups are also applied.
1212 *
1213 * LOCKING:
1214 * Kernel thread context (may sleep)
1215 *
1216 * RETURNS:
1217 * 0 on success, -errno otherwise
1218 */
1219 static int ata_dev_configure(struct ata_port *ap, struct ata_device *dev,
1220 int print_info)
1221 {
1222 const u16 *id = dev->id;
1223 unsigned int xfer_mask;
1224 int i, rc;
1225
1226 if (!ata_dev_enabled(dev)) {
1227 DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
1228 ap->id, dev->devno);
1229 return 0;
1230 }
1231
1232 DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
1233
1234 /* print device capabilities */
1235 if (print_info)
1236 printk(KERN_DEBUG "ata%u: dev %u cfg 49:%04x 82:%04x 83:%04x "
1237 "84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
1238 ap->id, dev->devno, id[49], id[82], id[83],
1239 id[84], id[85], id[86], id[87], id[88]);
1240
1241 /* initialize to-be-configured parameters */
1242 dev->flags = 0;
1243 dev->max_sectors = 0;
1244 dev->cdb_len = 0;
1245 dev->n_sectors = 0;
1246 dev->cylinders = 0;
1247 dev->heads = 0;
1248 dev->sectors = 0;
1249
1250 /*
1251 * common ATA, ATAPI feature tests
1252 */
1253
1254 /* find max transfer mode; for printk only */
1255 xfer_mask = ata_id_xfermask(id);
1256
1257 ata_dump_id(id);
1258
1259 /* ATA-specific feature tests */
1260 if (dev->class == ATA_DEV_ATA) {
1261 dev->n_sectors = ata_id_n_sectors(id);
1262
1263 if (ata_id_has_lba(id)) {
1264 const char *lba_desc;
1265
1266 lba_desc = "LBA";
1267 dev->flags |= ATA_DFLAG_LBA;
1268 if (ata_id_has_lba48(id)) {
1269 dev->flags |= ATA_DFLAG_LBA48;
1270 lba_desc = "LBA48";
1271 }
1272
1273 /* print device info to dmesg */
1274 if (print_info)
1275 printk(KERN_INFO "ata%u: dev %u ATA-%d, "
1276 "max %s, %Lu sectors: %s\n",
1277 ap->id, dev->devno,
1278 ata_id_major_version(id),
1279 ata_mode_string(xfer_mask),
1280 (unsigned long long)dev->n_sectors,
1281 lba_desc);
1282 } else {
1283 /* CHS */
1284
1285 /* Default translation */
1286 dev->cylinders = id[1];
1287 dev->heads = id[3];
1288 dev->sectors = id[6];
1289
1290 if (ata_id_current_chs_valid(id)) {
1291 /* Current CHS translation is valid. */
1292 dev->cylinders = id[54];
1293 dev->heads = id[55];
1294 dev->sectors = id[56];
1295 }
1296
1297 /* print device info to dmesg */
1298 if (print_info)
1299 printk(KERN_INFO "ata%u: dev %u ATA-%d, "
1300 "max %s, %Lu sectors: CHS %u/%u/%u\n",
1301 ap->id, dev->devno,
1302 ata_id_major_version(id),
1303 ata_mode_string(xfer_mask),
1304 (unsigned long long)dev->n_sectors,
1305 dev->cylinders, dev->heads, dev->sectors);
1306 }
1307
1308 dev->cdb_len = 16;
1309 }
1310
1311 /* ATAPI-specific feature tests */
1312 else if (dev->class == ATA_DEV_ATAPI) {
1313 rc = atapi_cdb_len(id);
1314 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1315 printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id);
1316 rc = -EINVAL;
1317 goto err_out_nosup;
1318 }
1319 dev->cdb_len = (unsigned int) rc;
1320
1321 /* print device info to dmesg */
1322 if (print_info)
1323 printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n",
1324 ap->id, dev->devno, ata_mode_string(xfer_mask));
1325 }
1326
1327 ap->host->max_cmd_len = 0;
1328 for (i = 0; i < ATA_MAX_DEVICES; i++)
1329 ap->host->max_cmd_len = max_t(unsigned int,
1330 ap->host->max_cmd_len,
1331 ap->device[i].cdb_len);
1332
1333 /* limit bridge transfers to udma5, 200 sectors */
1334 if (ata_dev_knobble(ap, dev)) {
1335 if (print_info)
1336 printk(KERN_INFO "ata%u(%u): applying bridge limits\n",
1337 ap->id, dev->devno);
1338 dev->udma_mask &= ATA_UDMA5;
1339 dev->max_sectors = ATA_MAX_SECTORS;
1340 }
1341
1342 if (ap->ops->dev_config)
1343 ap->ops->dev_config(ap, dev);
1344
1345 DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
1346 return 0;
1347
1348 err_out_nosup:
1349 DPRINTK("EXIT, err\n");
1350 return rc;
1351 }
1352
1353 /**
1354 * ata_bus_probe - Reset and probe ATA bus
1355 * @ap: Bus to probe
1356 *
1357 * Master ATA bus probing function. Initiates a hardware-dependent
1358 * bus reset, then attempts to identify any devices found on
1359 * the bus.
1360 *
1361 * LOCKING:
1362 * PCI/etc. bus probe sem.
1363 *
1364 * RETURNS:
1365 * Zero on success, negative errno otherwise.
1366 */
1367
1368 static int ata_bus_probe(struct ata_port *ap)
1369 {
1370 unsigned int classes[ATA_MAX_DEVICES];
1371 int i, rc, found = 0;
1372 struct ata_device *dev;
1373
1374 ata_port_probe(ap);
1375
1376 /* reset and determine device classes */
1377 for (i = 0; i < ATA_MAX_DEVICES; i++)
1378 classes[i] = ATA_DEV_UNKNOWN;
1379
1380 if (ap->ops->probe_reset) {
1381 rc = ap->ops->probe_reset(ap, classes);
1382 if (rc) {
1383 printk("ata%u: reset failed (errno=%d)\n", ap->id, rc);
1384 return rc;
1385 }
1386 } else {
1387 ap->ops->phy_reset(ap);
1388
1389 if (!(ap->flags & ATA_FLAG_PORT_DISABLED))
1390 for (i = 0; i < ATA_MAX_DEVICES; i++)
1391 classes[i] = ap->device[i].class;
1392
1393 ata_port_probe(ap);
1394 }
1395
1396 for (i = 0; i < ATA_MAX_DEVICES; i++)
1397 if (classes[i] == ATA_DEV_UNKNOWN)
1398 classes[i] = ATA_DEV_NONE;
1399
1400 /* read IDENTIFY page and configure devices */
1401 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1402 dev = &ap->device[i];
1403 dev->class = classes[i];
1404
1405 if (!ata_dev_enabled(dev))
1406 continue;
1407
1408 WARN_ON(dev->id != NULL);
1409 if (ata_dev_read_id(ap, dev, &dev->class, 1, &dev->id)) {
1410 dev->class = ATA_DEV_NONE;
1411 continue;
1412 }
1413
1414 if (ata_dev_configure(ap, dev, 1)) {
1415 ata_dev_disable(ap, dev);
1416 continue;
1417 }
1418
1419 found = 1;
1420 }
1421
1422 /* configure transfer mode */
1423 if (ap->ops->set_mode) {
1424 /* FIXME: make ->set_mode handle no device case and
1425 * return error code and failing device on failure as
1426 * ata_set_mode() does.
1427 */
1428 if (found)
1429 ap->ops->set_mode(ap);
1430 rc = 0;
1431 } else {
1432 while (ata_set_mode(ap, &dev))
1433 ata_dev_disable(ap, dev);
1434 }
1435
1436 for (i = 0; i < ATA_MAX_DEVICES; i++)
1437 if (ata_dev_enabled(&ap->device[i]))
1438 return 0;
1439
1440 /* no device present, disable port */
1441 ata_port_disable(ap);
1442 ap->ops->port_disable(ap);
1443 return -ENODEV;
1444 }
1445
1446 /**
1447 * ata_port_probe - Mark port as enabled
1448 * @ap: Port for which we indicate enablement
1449 *
1450 * Modify @ap data structure such that the system
1451 * thinks that the entire port is enabled.
1452 *
1453 * LOCKING: host_set lock, or some other form of
1454 * serialization.
1455 */
1456
1457 void ata_port_probe(struct ata_port *ap)
1458 {
1459 ap->flags &= ~ATA_FLAG_PORT_DISABLED;
1460 }
1461
1462 /**
1463 * sata_print_link_status - Print SATA link status
1464 * @ap: SATA port to printk link status about
1465 *
1466 * This function prints link speed and status of a SATA link.
1467 *
1468 * LOCKING:
1469 * None.
1470 */
1471 static void sata_print_link_status(struct ata_port *ap)
1472 {
1473 u32 sstatus, tmp;
1474
1475 if (!ap->ops->scr_read)
1476 return;
1477
1478 sstatus = scr_read(ap, SCR_STATUS);
1479
1480 if (sata_dev_present(ap)) {
1481 tmp = (sstatus >> 4) & 0xf;
1482 printk(KERN_INFO "ata%u: SATA link up %s (SStatus %X)\n",
1483 ap->id, sata_spd_string(tmp), sstatus);
1484 } else {
1485 printk(KERN_INFO "ata%u: SATA link down (SStatus %X)\n",
1486 ap->id, sstatus);
1487 }
1488 }
1489
1490 /**
1491 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1492 * @ap: SATA port associated with target SATA PHY.
1493 *
1494 * This function issues commands to standard SATA Sxxx
1495 * PHY registers, to wake up the phy (and device), and
1496 * clear any reset condition.
1497 *
1498 * LOCKING:
1499 * PCI/etc. bus probe sem.
1500 *
1501 */
1502 void __sata_phy_reset(struct ata_port *ap)
1503 {
1504 u32 sstatus;
1505 unsigned long timeout = jiffies + (HZ * 5);
1506
1507 if (ap->flags & ATA_FLAG_SATA_RESET) {
1508 /* issue phy wake/reset */
1509 scr_write_flush(ap, SCR_CONTROL, 0x301);
1510 /* Couldn't find anything in SATA I/II specs, but
1511 * AHCI-1.1 10.4.2 says at least 1 ms. */
1512 mdelay(1);
1513 }
1514 scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */
1515
1516 /* wait for phy to become ready, if necessary */
1517 do {
1518 msleep(200);
1519 sstatus = scr_read(ap, SCR_STATUS);
1520 if ((sstatus & 0xf) != 1)
1521 break;
1522 } while (time_before(jiffies, timeout));
1523
1524 /* print link status */
1525 sata_print_link_status(ap);
1526
1527 /* TODO: phy layer with polling, timeouts, etc. */
1528 if (sata_dev_present(ap))
1529 ata_port_probe(ap);
1530 else
1531 ata_port_disable(ap);
1532
1533 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1534 return;
1535
1536 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1537 ata_port_disable(ap);
1538 return;
1539 }
1540
1541 ap->cbl = ATA_CBL_SATA;
1542 }
1543
1544 /**
1545 * sata_phy_reset - Reset SATA bus.
1546 * @ap: SATA port associated with target SATA PHY.
1547 *
1548 * This function resets the SATA bus, and then probes
1549 * the bus for devices.
1550 *
1551 * LOCKING:
1552 * PCI/etc. bus probe sem.
1553 *
1554 */
1555 void sata_phy_reset(struct ata_port *ap)
1556 {
1557 __sata_phy_reset(ap);
1558 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1559 return;
1560 ata_bus_reset(ap);
1561 }
1562
1563 /**
1564 * ata_dev_pair - return other device on cable
1565 * @ap: port
1566 * @adev: device
1567 *
1568 * Obtain the other device on the same cable, or if none is
1569 * present NULL is returned
1570 */
1571
1572 struct ata_device *ata_dev_pair(struct ata_port *ap, struct ata_device *adev)
1573 {
1574 struct ata_device *pair = &ap->device[1 - adev->devno];
1575 if (!ata_dev_enabled(pair))
1576 return NULL;
1577 return pair;
1578 }
1579
1580 /**
1581 * ata_port_disable - Disable port.
1582 * @ap: Port to be disabled.
1583 *
1584 * Modify @ap data structure such that the system
1585 * thinks that the entire port is disabled, and should
1586 * never attempt to probe or communicate with devices
1587 * on this port.
1588 *
1589 * LOCKING: host_set lock, or some other form of
1590 * serialization.
1591 */
1592
1593 void ata_port_disable(struct ata_port *ap)
1594 {
1595 ap->device[0].class = ATA_DEV_NONE;
1596 ap->device[1].class = ATA_DEV_NONE;
1597 ap->flags |= ATA_FLAG_PORT_DISABLED;
1598 }
1599
1600 /**
1601 * ata_down_sata_spd_limit - adjust SATA spd limit downward
1602 * @ap: Port to adjust SATA spd limit for
1603 *
1604 * Adjust SATA spd limit of @ap downward. Note that this
1605 * function only adjusts the limit. The change must be applied
1606 * using ata_set_sata_spd().
1607 *
1608 * LOCKING:
1609 * Inherited from caller.
1610 *
1611 * RETURNS:
1612 * 0 on success, negative errno on failure
1613 */
1614 static int ata_down_sata_spd_limit(struct ata_port *ap)
1615 {
1616 u32 spd, mask;
1617 int highbit;
1618
1619 if (ap->cbl != ATA_CBL_SATA || !ap->ops->scr_read)
1620 return -EOPNOTSUPP;
1621
1622 mask = ap->sata_spd_limit;
1623 if (mask <= 1)
1624 return -EINVAL;
1625 highbit = fls(mask) - 1;
1626 mask &= ~(1 << highbit);
1627
1628 spd = (scr_read(ap, SCR_STATUS) >> 4) & 0xf;
1629 if (spd <= 1)
1630 return -EINVAL;
1631 spd--;
1632 mask &= (1 << spd) - 1;
1633 if (!mask)
1634 return -EINVAL;
1635
1636 ap->sata_spd_limit = mask;
1637
1638 printk(KERN_WARNING "ata%u: limiting SATA link speed to %s\n",
1639 ap->id, sata_spd_string(fls(mask)));
1640
1641 return 0;
1642 }
1643
1644 static int __ata_set_sata_spd_needed(struct ata_port *ap, u32 *scontrol)
1645 {
1646 u32 spd, limit;
1647
1648 if (ap->sata_spd_limit == UINT_MAX)
1649 limit = 0;
1650 else
1651 limit = fls(ap->sata_spd_limit);
1652
1653 spd = (*scontrol >> 4) & 0xf;
1654 *scontrol = (*scontrol & ~0xf0) | ((limit & 0xf) << 4);
1655
1656 return spd != limit;
1657 }
1658
1659 /**
1660 * ata_set_sata_spd_needed - is SATA spd configuration needed
1661 * @ap: Port in question
1662 *
1663 * Test whether the spd limit in SControl matches
1664 * @ap->sata_spd_limit. This function is used to determine
1665 * whether hardreset is necessary to apply SATA spd
1666 * configuration.
1667 *
1668 * LOCKING:
1669 * Inherited from caller.
1670 *
1671 * RETURNS:
1672 * 1 if SATA spd configuration is needed, 0 otherwise.
1673 */
1674 static int ata_set_sata_spd_needed(struct ata_port *ap)
1675 {
1676 u32 scontrol;
1677
1678 if (ap->cbl != ATA_CBL_SATA || !ap->ops->scr_read)
1679 return 0;
1680
1681 scontrol = scr_read(ap, SCR_CONTROL);
1682
1683 return __ata_set_sata_spd_needed(ap, &scontrol);
1684 }
1685
1686 /**
1687 * ata_set_sata_spd - set SATA spd according to spd limit
1688 * @ap: Port to set SATA spd for
1689 *
1690 * Set SATA spd of @ap according to sata_spd_limit.
1691 *
1692 * LOCKING:
1693 * Inherited from caller.
1694 *
1695 * RETURNS:
1696 * 0 if spd doesn't need to be changed, 1 if spd has been
1697 * changed. -EOPNOTSUPP if SCR registers are inaccessible.
1698 */
1699 static int ata_set_sata_spd(struct ata_port *ap)
1700 {
1701 u32 scontrol;
1702
1703 if (ap->cbl != ATA_CBL_SATA || !ap->ops->scr_read)
1704 return -EOPNOTSUPP;
1705
1706 scontrol = scr_read(ap, SCR_CONTROL);
1707 if (!__ata_set_sata_spd_needed(ap, &scontrol))
1708 return 0;
1709
1710 scr_write(ap, SCR_CONTROL, scontrol);
1711 return 1;
1712 }
1713
1714 /*
1715 * This mode timing computation functionality is ported over from
1716 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
1717 */
1718 /*
1719 * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
1720 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
1721 * for PIO 5, which is a nonstandard extension and UDMA6, which
1722 * is currently supported only by Maxtor drives.
1723 */
1724
1725 static const struct ata_timing ata_timing[] = {
1726
1727 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
1728 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
1729 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
1730 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
1731
1732 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
1733 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
1734 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
1735
1736 /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
1737
1738 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
1739 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
1740 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
1741
1742 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
1743 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
1744 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
1745
1746 /* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */
1747 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
1748 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
1749
1750 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
1751 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
1752 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
1753
1754 /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
1755
1756 { 0xFF }
1757 };
1758
1759 #define ENOUGH(v,unit) (((v)-1)/(unit)+1)
1760 #define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
1761
1762 static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
1763 {
1764 q->setup = EZ(t->setup * 1000, T);
1765 q->act8b = EZ(t->act8b * 1000, T);
1766 q->rec8b = EZ(t->rec8b * 1000, T);
1767 q->cyc8b = EZ(t->cyc8b * 1000, T);
1768 q->active = EZ(t->active * 1000, T);
1769 q->recover = EZ(t->recover * 1000, T);
1770 q->cycle = EZ(t->cycle * 1000, T);
1771 q->udma = EZ(t->udma * 1000, UT);
1772 }
1773
1774 void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
1775 struct ata_timing *m, unsigned int what)
1776 {
1777 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
1778 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
1779 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
1780 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
1781 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
1782 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
1783 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
1784 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
1785 }
1786
1787 static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
1788 {
1789 const struct ata_timing *t;
1790
1791 for (t = ata_timing; t->mode != speed; t++)
1792 if (t->mode == 0xFF)
1793 return NULL;
1794 return t;
1795 }
1796
1797 int ata_timing_compute(struct ata_device *adev, unsigned short speed,
1798 struct ata_timing *t, int T, int UT)
1799 {
1800 const struct ata_timing *s;
1801 struct ata_timing p;
1802
1803 /*
1804 * Find the mode.
1805 */
1806
1807 if (!(s = ata_timing_find_mode(speed)))
1808 return -EINVAL;
1809
1810 memcpy(t, s, sizeof(*s));
1811
1812 /*
1813 * If the drive is an EIDE drive, it can tell us it needs extended
1814 * PIO/MW_DMA cycle timing.
1815 */
1816
1817 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
1818 memset(&p, 0, sizeof(p));
1819 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
1820 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
1821 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
1822 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
1823 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
1824 }
1825 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
1826 }
1827
1828 /*
1829 * Convert the timing to bus clock counts.
1830 */
1831
1832 ata_timing_quantize(t, t, T, UT);
1833
1834 /*
1835 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
1836 * S.M.A.R.T * and some other commands. We have to ensure that the
1837 * DMA cycle timing is slower/equal than the fastest PIO timing.
1838 */
1839
1840 if (speed > XFER_PIO_4) {
1841 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
1842 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
1843 }
1844
1845 /*
1846 * Lengthen active & recovery time so that cycle time is correct.
1847 */
1848
1849 if (t->act8b + t->rec8b < t->cyc8b) {
1850 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
1851 t->rec8b = t->cyc8b - t->act8b;
1852 }
1853
1854 if (t->active + t->recover < t->cycle) {
1855 t->active += (t->cycle - (t->active + t->recover)) / 2;
1856 t->recover = t->cycle - t->active;
1857 }
1858
1859 return 0;
1860 }
1861
1862 static int ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev)
1863 {
1864 unsigned int err_mask;
1865 int rc;
1866
1867 if (dev->xfer_shift == ATA_SHIFT_PIO)
1868 dev->flags |= ATA_DFLAG_PIO;
1869
1870 err_mask = ata_dev_set_xfermode(ap, dev);
1871 if (err_mask) {
1872 printk(KERN_ERR
1873 "ata%u: failed to set xfermode (err_mask=0x%x)\n",
1874 ap->id, err_mask);
1875 return -EIO;
1876 }
1877
1878 rc = ata_dev_revalidate(ap, dev, 0);
1879 if (rc) {
1880 printk(KERN_ERR
1881 "ata%u: failed to revalidate after set xfermode\n",
1882 ap->id);
1883 return rc;
1884 }
1885
1886 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
1887 dev->xfer_shift, (int)dev->xfer_mode);
1888
1889 printk(KERN_INFO "ata%u: dev %u configured for %s\n",
1890 ap->id, dev->devno,
1891 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
1892 return 0;
1893 }
1894
1895 /**
1896 * ata_set_mode - Program timings and issue SET FEATURES - XFER
1897 * @ap: port on which timings will be programmed
1898 * @r_failed_dev: out paramter for failed device
1899 *
1900 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If
1901 * ata_set_mode() fails, pointer to the failing device is
1902 * returned in @r_failed_dev.
1903 *
1904 * LOCKING:
1905 * PCI/etc. bus probe sem.
1906 *
1907 * RETURNS:
1908 * 0 on success, negative errno otherwise
1909 */
1910 static int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev)
1911 {
1912 struct ata_device *dev;
1913 int i, rc = 0, used_dma = 0, found = 0;
1914
1915 /* step 1: calculate xfer_mask */
1916 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1917 unsigned int pio_mask, dma_mask;
1918
1919 dev = &ap->device[i];
1920
1921 if (!ata_dev_enabled(dev))
1922 continue;
1923
1924 ata_dev_xfermask(ap, dev);
1925
1926 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
1927 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
1928 dev->pio_mode = ata_xfer_mask2mode(pio_mask);
1929 dev->dma_mode = ata_xfer_mask2mode(dma_mask);
1930
1931 found = 1;
1932 if (dev->dma_mode)
1933 used_dma = 1;
1934 }
1935 if (!found)
1936 goto out;
1937
1938 /* step 2: always set host PIO timings */
1939 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1940 dev = &ap->device[i];
1941 if (!ata_dev_enabled(dev))
1942 continue;
1943
1944 if (!dev->pio_mode) {
1945 printk(KERN_WARNING "ata%u: dev %u no PIO support\n",
1946 ap->id, dev->devno);
1947 rc = -EINVAL;
1948 goto out;
1949 }
1950
1951 dev->xfer_mode = dev->pio_mode;
1952 dev->xfer_shift = ATA_SHIFT_PIO;
1953 if (ap->ops->set_piomode)
1954 ap->ops->set_piomode(ap, dev);
1955 }
1956
1957 /* step 3: set host DMA timings */
1958 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1959 dev = &ap->device[i];
1960
1961 if (!ata_dev_enabled(dev) || !dev->dma_mode)
1962 continue;
1963
1964 dev->xfer_mode = dev->dma_mode;
1965 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
1966 if (ap->ops->set_dmamode)
1967 ap->ops->set_dmamode(ap, dev);
1968 }
1969
1970 /* step 4: update devices' xfer mode */
1971 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1972 dev = &ap->device[i];
1973
1974 if (!ata_dev_enabled(dev))
1975 continue;
1976
1977 rc = ata_dev_set_mode(ap, dev);
1978 if (rc)
1979 goto out;
1980 }
1981
1982 /* Record simplex status. If we selected DMA then the other
1983 * host channels are not permitted to do so.
1984 */
1985 if (used_dma && (ap->host_set->flags & ATA_HOST_SIMPLEX))
1986 ap->host_set->simplex_claimed = 1;
1987
1988 /* step5: chip specific finalisation */
1989 if (ap->ops->post_set_mode)
1990 ap->ops->post_set_mode(ap);
1991
1992 out:
1993 if (rc)
1994 *r_failed_dev = dev;
1995 return rc;
1996 }
1997
1998 /**
1999 * ata_tf_to_host - issue ATA taskfile to host controller
2000 * @ap: port to which command is being issued
2001 * @tf: ATA taskfile register set
2002 *
2003 * Issues ATA taskfile register set to ATA host controller,
2004 * with proper synchronization with interrupt handler and
2005 * other threads.
2006 *
2007 * LOCKING:
2008 * spin_lock_irqsave(host_set lock)
2009 */
2010
2011 static inline void ata_tf_to_host(struct ata_port *ap,
2012 const struct ata_taskfile *tf)
2013 {
2014 ap->ops->tf_load(ap, tf);
2015 ap->ops->exec_command(ap, tf);
2016 }
2017
2018 /**
2019 * ata_busy_sleep - sleep until BSY clears, or timeout
2020 * @ap: port containing status register to be polled
2021 * @tmout_pat: impatience timeout
2022 * @tmout: overall timeout
2023 *
2024 * Sleep until ATA Status register bit BSY clears,
2025 * or a timeout occurs.
2026 *
2027 * LOCKING: None.
2028 */
2029
2030 unsigned int ata_busy_sleep (struct ata_port *ap,
2031 unsigned long tmout_pat, unsigned long tmout)
2032 {
2033 unsigned long timer_start, timeout;
2034 u8 status;
2035
2036 status = ata_busy_wait(ap, ATA_BUSY, 300);
2037 timer_start = jiffies;
2038 timeout = timer_start + tmout_pat;
2039 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
2040 msleep(50);
2041 status = ata_busy_wait(ap, ATA_BUSY, 3);
2042 }
2043
2044 if (status & ATA_BUSY)
2045 printk(KERN_WARNING "ata%u is slow to respond, "
2046 "please be patient\n", ap->id);
2047
2048 timeout = timer_start + tmout;
2049 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
2050 msleep(50);
2051 status = ata_chk_status(ap);
2052 }
2053
2054 if (status & ATA_BUSY) {
2055 printk(KERN_ERR "ata%u failed to respond (%lu secs)\n",
2056 ap->id, tmout / HZ);
2057 return 1;
2058 }
2059
2060 return 0;
2061 }
2062
2063 static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
2064 {
2065 struct ata_ioports *ioaddr = &ap->ioaddr;
2066 unsigned int dev0 = devmask & (1 << 0);
2067 unsigned int dev1 = devmask & (1 << 1);
2068 unsigned long timeout;
2069
2070 /* if device 0 was found in ata_devchk, wait for its
2071 * BSY bit to clear
2072 */
2073 if (dev0)
2074 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2075
2076 /* if device 1 was found in ata_devchk, wait for
2077 * register access, then wait for BSY to clear
2078 */
2079 timeout = jiffies + ATA_TMOUT_BOOT;
2080 while (dev1) {
2081 u8 nsect, lbal;
2082
2083 ap->ops->dev_select(ap, 1);
2084 if (ap->flags & ATA_FLAG_MMIO) {
2085 nsect = readb((void __iomem *) ioaddr->nsect_addr);
2086 lbal = readb((void __iomem *) ioaddr->lbal_addr);
2087 } else {
2088 nsect = inb(ioaddr->nsect_addr);
2089 lbal = inb(ioaddr->lbal_addr);
2090 }
2091 if ((nsect == 1) && (lbal == 1))
2092 break;
2093 if (time_after(jiffies, timeout)) {
2094 dev1 = 0;
2095 break;
2096 }
2097 msleep(50); /* give drive a breather */
2098 }
2099 if (dev1)
2100 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2101
2102 /* is all this really necessary? */
2103 ap->ops->dev_select(ap, 0);
2104 if (dev1)
2105 ap->ops->dev_select(ap, 1);
2106 if (dev0)
2107 ap->ops->dev_select(ap, 0);
2108 }
2109
2110 static unsigned int ata_bus_softreset(struct ata_port *ap,
2111 unsigned int devmask)
2112 {
2113 struct ata_ioports *ioaddr = &ap->ioaddr;
2114
2115 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
2116
2117 /* software reset. causes dev0 to be selected */
2118 if (ap->flags & ATA_FLAG_MMIO) {
2119 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2120 udelay(20); /* FIXME: flush */
2121 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
2122 udelay(20); /* FIXME: flush */
2123 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2124 } else {
2125 outb(ap->ctl, ioaddr->ctl_addr);
2126 udelay(10);
2127 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
2128 udelay(10);
2129 outb(ap->ctl, ioaddr->ctl_addr);
2130 }
2131
2132 /* spec mandates ">= 2ms" before checking status.
2133 * We wait 150ms, because that was the magic delay used for
2134 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
2135 * between when the ATA command register is written, and then
2136 * status is checked. Because waiting for "a while" before
2137 * checking status is fine, post SRST, we perform this magic
2138 * delay here as well.
2139 *
2140 * Old drivers/ide uses the 2mS rule and then waits for ready
2141 */
2142 msleep(150);
2143
2144 /* Before we perform post reset processing we want to see if
2145 * the bus shows 0xFF because the odd clown forgets the D7
2146 * pulldown resistor.
2147 */
2148 if (ata_check_status(ap) == 0xFF)
2149 return AC_ERR_OTHER;
2150
2151 ata_bus_post_reset(ap, devmask);
2152
2153 return 0;
2154 }
2155
2156 /**
2157 * ata_bus_reset - reset host port and associated ATA channel
2158 * @ap: port to reset
2159 *
2160 * This is typically the first time we actually start issuing
2161 * commands to the ATA channel. We wait for BSY to clear, then
2162 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2163 * result. Determine what devices, if any, are on the channel
2164 * by looking at the device 0/1 error register. Look at the signature
2165 * stored in each device's taskfile registers, to determine if
2166 * the device is ATA or ATAPI.
2167 *
2168 * LOCKING:
2169 * PCI/etc. bus probe sem.
2170 * Obtains host_set lock.
2171 *
2172 * SIDE EFFECTS:
2173 * Sets ATA_FLAG_PORT_DISABLED if bus reset fails.
2174 */
2175
2176 void ata_bus_reset(struct ata_port *ap)
2177 {
2178 struct ata_ioports *ioaddr = &ap->ioaddr;
2179 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2180 u8 err;
2181 unsigned int dev0, dev1 = 0, devmask = 0;
2182
2183 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
2184
2185 /* determine if device 0/1 are present */
2186 if (ap->flags & ATA_FLAG_SATA_RESET)
2187 dev0 = 1;
2188 else {
2189 dev0 = ata_devchk(ap, 0);
2190 if (slave_possible)
2191 dev1 = ata_devchk(ap, 1);
2192 }
2193
2194 if (dev0)
2195 devmask |= (1 << 0);
2196 if (dev1)
2197 devmask |= (1 << 1);
2198
2199 /* select device 0 again */
2200 ap->ops->dev_select(ap, 0);
2201
2202 /* issue bus reset */
2203 if (ap->flags & ATA_FLAG_SRST)
2204 if (ata_bus_softreset(ap, devmask))
2205 goto err_out;
2206
2207 /*
2208 * determine by signature whether we have ATA or ATAPI devices
2209 */
2210 ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
2211 if ((slave_possible) && (err != 0x81))
2212 ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
2213
2214 /* re-enable interrupts */
2215 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2216 ata_irq_on(ap);
2217
2218 /* is double-select really necessary? */
2219 if (ap->device[1].class != ATA_DEV_NONE)
2220 ap->ops->dev_select(ap, 1);
2221 if (ap->device[0].class != ATA_DEV_NONE)
2222 ap->ops->dev_select(ap, 0);
2223
2224 /* if no devices were detected, disable this port */
2225 if ((ap->device[0].class == ATA_DEV_NONE) &&
2226 (ap->device[1].class == ATA_DEV_NONE))
2227 goto err_out;
2228
2229 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2230 /* set up device control for ATA_FLAG_SATA_RESET */
2231 if (ap->flags & ATA_FLAG_MMIO)
2232 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2233 else
2234 outb(ap->ctl, ioaddr->ctl_addr);
2235 }
2236
2237 DPRINTK("EXIT\n");
2238 return;
2239
2240 err_out:
2241 printk(KERN_ERR "ata%u: disabling port\n", ap->id);
2242 ap->ops->port_disable(ap);
2243
2244 DPRINTK("EXIT\n");
2245 }
2246
2247 static int sata_phy_resume(struct ata_port *ap)
2248 {
2249 unsigned long timeout = jiffies + (HZ * 5);
2250 u32 scontrol, sstatus;
2251
2252 scontrol = scr_read(ap, SCR_CONTROL);
2253 scontrol = (scontrol & 0x0f0) | 0x300;
2254 scr_write_flush(ap, SCR_CONTROL, scontrol);
2255
2256 /* Wait for phy to become ready, if necessary. */
2257 do {
2258 msleep(200);
2259 sstatus = scr_read(ap, SCR_STATUS);
2260 if ((sstatus & 0xf) != 1)
2261 return 0;
2262 } while (time_before(jiffies, timeout));
2263
2264 return -1;
2265 }
2266
2267 /**
2268 * ata_std_probeinit - initialize probing
2269 * @ap: port to be probed
2270 *
2271 * @ap is about to be probed. Initialize it. This function is
2272 * to be used as standard callback for ata_drive_probe_reset().
2273 *
2274 * NOTE!!! Do not use this function as probeinit if a low level
2275 * driver implements only hardreset. Just pass NULL as probeinit
2276 * in that case. Using this function is probably okay but doing
2277 * so makes reset sequence different from the original
2278 * ->phy_reset implementation and Jeff nervous. :-P
2279 */
2280 void ata_std_probeinit(struct ata_port *ap)
2281 {
2282 if ((ap->flags & ATA_FLAG_SATA) && ap->ops->scr_read) {
2283 u32 spd;
2284
2285 sata_phy_resume(ap);
2286
2287 spd = (scr_read(ap, SCR_CONTROL) & 0xf0) >> 4;
2288 if (spd)
2289 ap->sata_spd_limit &= (1 << spd) - 1;
2290
2291 if (sata_dev_present(ap))
2292 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2293 }
2294 }
2295
2296 /**
2297 * ata_std_softreset - reset host port via ATA SRST
2298 * @ap: port to reset
2299 * @verbose: fail verbosely
2300 * @classes: resulting classes of attached devices
2301 *
2302 * Reset host port using ATA SRST. This function is to be used
2303 * as standard callback for ata_drive_*_reset() functions.
2304 *
2305 * LOCKING:
2306 * Kernel thread context (may sleep)
2307 *
2308 * RETURNS:
2309 * 0 on success, -errno otherwise.
2310 */
2311 int ata_std_softreset(struct ata_port *ap, int verbose, unsigned int *classes)
2312 {
2313 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2314 unsigned int devmask = 0, err_mask;
2315 u8 err;
2316
2317 DPRINTK("ENTER\n");
2318
2319 if (ap->ops->scr_read && !sata_dev_present(ap)) {
2320 classes[0] = ATA_DEV_NONE;
2321 goto out;
2322 }
2323
2324 /* determine if device 0/1 are present */
2325 if (ata_devchk(ap, 0))
2326 devmask |= (1 << 0);
2327 if (slave_possible && ata_devchk(ap, 1))
2328 devmask |= (1 << 1);
2329
2330 /* select device 0 again */
2331 ap->ops->dev_select(ap, 0);
2332
2333 /* issue bus reset */
2334 DPRINTK("about to softreset, devmask=%x\n", devmask);
2335 err_mask = ata_bus_softreset(ap, devmask);
2336 if (err_mask) {
2337 if (verbose)
2338 printk(KERN_ERR "ata%u: SRST failed (err_mask=0x%x)\n",
2339 ap->id, err_mask);
2340 else
2341 DPRINTK("EXIT, softreset failed (err_mask=0x%x)\n",
2342 err_mask);
2343 return -EIO;
2344 }
2345
2346 /* determine by signature whether we have ATA or ATAPI devices */
2347 classes[0] = ata_dev_try_classify(ap, 0, &err);
2348 if (slave_possible && err != 0x81)
2349 classes[1] = ata_dev_try_classify(ap, 1, &err);
2350
2351 out:
2352 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
2353 return 0;
2354 }
2355
2356 /**
2357 * sata_std_hardreset - reset host port via SATA phy reset
2358 * @ap: port to reset
2359 * @verbose: fail verbosely
2360 * @class: resulting class of attached device
2361 *
2362 * SATA phy-reset host port using DET bits of SControl register.
2363 * This function is to be used as standard callback for
2364 * ata_drive_*_reset().
2365 *
2366 * LOCKING:
2367 * Kernel thread context (may sleep)
2368 *
2369 * RETURNS:
2370 * 0 on success, -errno otherwise.
2371 */
2372 int sata_std_hardreset(struct ata_port *ap, int verbose, unsigned int *class)
2373 {
2374 u32 scontrol;
2375
2376 DPRINTK("ENTER\n");
2377
2378 if (ata_set_sata_spd_needed(ap)) {
2379 /* SATA spec says nothing about how to reconfigure
2380 * spd. To be on the safe side, turn off phy during
2381 * reconfiguration. This works for at least ICH7 AHCI
2382 * and Sil3124.
2383 */
2384 scontrol = scr_read(ap, SCR_CONTROL);
2385 scontrol = (scontrol & 0x0f0) | 0x302;
2386 scr_write_flush(ap, SCR_CONTROL, scontrol);
2387
2388 ata_set_sata_spd(ap);
2389 }
2390
2391 /* issue phy wake/reset */
2392 scontrol = scr_read(ap, SCR_CONTROL);
2393 scontrol = (scontrol & 0x0f0) | 0x301;
2394 scr_write_flush(ap, SCR_CONTROL, scontrol);
2395
2396 /* Couldn't find anything in SATA I/II specs, but AHCI-1.1
2397 * 10.4.2 says at least 1 ms.
2398 */
2399 msleep(1);
2400
2401 /* bring phy back */
2402 sata_phy_resume(ap);
2403
2404 /* TODO: phy layer with polling, timeouts, etc. */
2405 if (!sata_dev_present(ap)) {
2406 *class = ATA_DEV_NONE;
2407 DPRINTK("EXIT, link offline\n");
2408 return 0;
2409 }
2410
2411 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
2412 if (verbose)
2413 printk(KERN_ERR "ata%u: COMRESET failed "
2414 "(device not ready)\n", ap->id);
2415 else
2416 DPRINTK("EXIT, device not ready\n");
2417 return -EIO;
2418 }
2419
2420 ap->ops->dev_select(ap, 0); /* probably unnecessary */
2421
2422 *class = ata_dev_try_classify(ap, 0, NULL);
2423
2424 DPRINTK("EXIT, class=%u\n", *class);
2425 return 0;
2426 }
2427
2428 /**
2429 * ata_std_postreset - standard postreset callback
2430 * @ap: the target ata_port
2431 * @classes: classes of attached devices
2432 *
2433 * This function is invoked after a successful reset. Note that
2434 * the device might have been reset more than once using
2435 * different reset methods before postreset is invoked.
2436 *
2437 * This function is to be used as standard callback for
2438 * ata_drive_*_reset().
2439 *
2440 * LOCKING:
2441 * Kernel thread context (may sleep)
2442 */
2443 void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
2444 {
2445 DPRINTK("ENTER\n");
2446
2447 /* set cable type if it isn't already set */
2448 if (ap->cbl == ATA_CBL_NONE && ap->flags & ATA_FLAG_SATA)
2449 ap->cbl = ATA_CBL_SATA;
2450
2451 /* print link status */
2452 if (ap->cbl == ATA_CBL_SATA)
2453 sata_print_link_status(ap);
2454
2455 /* re-enable interrupts */
2456 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2457 ata_irq_on(ap);
2458
2459 /* is double-select really necessary? */
2460 if (classes[0] != ATA_DEV_NONE)
2461 ap->ops->dev_select(ap, 1);
2462 if (classes[1] != ATA_DEV_NONE)
2463 ap->ops->dev_select(ap, 0);
2464
2465 /* bail out if no device is present */
2466 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
2467 DPRINTK("EXIT, no device\n");
2468 return;
2469 }
2470
2471 /* set up device control */
2472 if (ap->ioaddr.ctl_addr) {
2473 if (ap->flags & ATA_FLAG_MMIO)
2474 writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
2475 else
2476 outb(ap->ctl, ap->ioaddr.ctl_addr);
2477 }
2478
2479 DPRINTK("EXIT\n");
2480 }
2481
2482 /**
2483 * ata_std_probe_reset - standard probe reset method
2484 * @ap: prot to perform probe-reset
2485 * @classes: resulting classes of attached devices
2486 *
2487 * The stock off-the-shelf ->probe_reset method.
2488 *
2489 * LOCKING:
2490 * Kernel thread context (may sleep)
2491 *
2492 * RETURNS:
2493 * 0 on success, -errno otherwise.
2494 */
2495 int ata_std_probe_reset(struct ata_port *ap, unsigned int *classes)
2496 {
2497 ata_reset_fn_t hardreset;
2498
2499 hardreset = NULL;
2500 if (ap->flags & ATA_FLAG_SATA && ap->ops->scr_read)
2501 hardreset = sata_std_hardreset;
2502
2503 return ata_drive_probe_reset(ap, ata_std_probeinit,
2504 ata_std_softreset, hardreset,
2505 ata_std_postreset, classes);
2506 }
2507
2508 static int ata_do_reset(struct ata_port *ap,
2509 ata_reset_fn_t reset, ata_postreset_fn_t postreset,
2510 int verbose, unsigned int *classes)
2511 {
2512 int i, rc;
2513
2514 for (i = 0; i < ATA_MAX_DEVICES; i++)
2515 classes[i] = ATA_DEV_UNKNOWN;
2516
2517 rc = reset(ap, verbose, classes);
2518 if (rc)
2519 return rc;
2520
2521 /* If any class isn't ATA_DEV_UNKNOWN, consider classification
2522 * is complete and convert all ATA_DEV_UNKNOWN to
2523 * ATA_DEV_NONE.
2524 */
2525 for (i = 0; i < ATA_MAX_DEVICES; i++)
2526 if (classes[i] != ATA_DEV_UNKNOWN)
2527 break;
2528
2529 if (i < ATA_MAX_DEVICES)
2530 for (i = 0; i < ATA_MAX_DEVICES; i++)
2531 if (classes[i] == ATA_DEV_UNKNOWN)
2532 classes[i] = ATA_DEV_NONE;
2533
2534 if (postreset)
2535 postreset(ap, classes);
2536
2537 return 0;
2538 }
2539
2540 /**
2541 * ata_drive_probe_reset - Perform probe reset with given methods
2542 * @ap: port to reset
2543 * @probeinit: probeinit method (can be NULL)
2544 * @softreset: softreset method (can be NULL)
2545 * @hardreset: hardreset method (can be NULL)
2546 * @postreset: postreset method (can be NULL)
2547 * @classes: resulting classes of attached devices
2548 *
2549 * Reset the specified port and classify attached devices using
2550 * given methods. This function prefers softreset but tries all
2551 * possible reset sequences to reset and classify devices. This
2552 * function is intended to be used for constructing ->probe_reset
2553 * callback by low level drivers.
2554 *
2555 * Reset methods should follow the following rules.
2556 *
2557 * - Return 0 on sucess, -errno on failure.
2558 * - If classification is supported, fill classes[] with
2559 * recognized class codes.
2560 * - If classification is not supported, leave classes[] alone.
2561 * - If verbose is non-zero, print error message on failure;
2562 * otherwise, shut up.
2563 *
2564 * LOCKING:
2565 * Kernel thread context (may sleep)
2566 *
2567 * RETURNS:
2568 * 0 on success, -EINVAL if no reset method is avaliable, -ENODEV
2569 * if classification fails, and any error code from reset
2570 * methods.
2571 */
2572 int ata_drive_probe_reset(struct ata_port *ap, ata_probeinit_fn_t probeinit,
2573 ata_reset_fn_t softreset, ata_reset_fn_t hardreset,
2574 ata_postreset_fn_t postreset, unsigned int *classes)
2575 {
2576 int rc = -EINVAL;
2577
2578 if (probeinit)
2579 probeinit(ap);
2580
2581 if (softreset && !ata_set_sata_spd_needed(ap)) {
2582 rc = ata_do_reset(ap, softreset, postreset, 0, classes);
2583 if (rc == 0 && classes[0] != ATA_DEV_UNKNOWN)
2584 goto done;
2585 }
2586
2587 if (!hardreset)
2588 goto done;
2589
2590 while (1) {
2591 rc = ata_do_reset(ap, hardreset, postreset, 0, classes);
2592 if (rc == 0) {
2593 if (classes[0] != ATA_DEV_UNKNOWN)
2594 goto done;
2595 break;
2596 }
2597
2598 if (ata_down_sata_spd_limit(ap))
2599 goto done;
2600 }
2601
2602 if (softreset)
2603 rc = ata_do_reset(ap, softreset, postreset, 0, classes);
2604
2605 done:
2606 if (rc == 0 && classes[0] == ATA_DEV_UNKNOWN)
2607 rc = -ENODEV;
2608 return rc;
2609 }
2610
2611 /**
2612 * ata_dev_same_device - Determine whether new ID matches configured device
2613 * @ap: port on which the device to compare against resides
2614 * @dev: device to compare against
2615 * @new_class: class of the new device
2616 * @new_id: IDENTIFY page of the new device
2617 *
2618 * Compare @new_class and @new_id against @dev and determine
2619 * whether @dev is the device indicated by @new_class and
2620 * @new_id.
2621 *
2622 * LOCKING:
2623 * None.
2624 *
2625 * RETURNS:
2626 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
2627 */
2628 static int ata_dev_same_device(struct ata_port *ap, struct ata_device *dev,
2629 unsigned int new_class, const u16 *new_id)
2630 {
2631 const u16 *old_id = dev->id;
2632 unsigned char model[2][41], serial[2][21];
2633 u64 new_n_sectors;
2634
2635 if (dev->class != new_class) {
2636 printk(KERN_INFO
2637 "ata%u: dev %u class mismatch %d != %d\n",
2638 ap->id, dev->devno, dev->class, new_class);
2639 return 0;
2640 }
2641
2642 ata_id_c_string(old_id, model[0], ATA_ID_PROD_OFS, sizeof(model[0]));
2643 ata_id_c_string(new_id, model[1], ATA_ID_PROD_OFS, sizeof(model[1]));
2644 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO_OFS, sizeof(serial[0]));
2645 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO_OFS, sizeof(serial[1]));
2646 new_n_sectors = ata_id_n_sectors(new_id);
2647
2648 if (strcmp(model[0], model[1])) {
2649 printk(KERN_INFO
2650 "ata%u: dev %u model number mismatch '%s' != '%s'\n",
2651 ap->id, dev->devno, model[0], model[1]);
2652 return 0;
2653 }
2654
2655 if (strcmp(serial[0], serial[1])) {
2656 printk(KERN_INFO
2657 "ata%u: dev %u serial number mismatch '%s' != '%s'\n",
2658 ap->id, dev->devno, serial[0], serial[1]);
2659 return 0;
2660 }
2661
2662 if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) {
2663 printk(KERN_INFO
2664 "ata%u: dev %u n_sectors mismatch %llu != %llu\n",
2665 ap->id, dev->devno, (unsigned long long)dev->n_sectors,
2666 (unsigned long long)new_n_sectors);
2667 return 0;
2668 }
2669
2670 return 1;
2671 }
2672
2673 /**
2674 * ata_dev_revalidate - Revalidate ATA device
2675 * @ap: port on which the device to revalidate resides
2676 * @dev: device to revalidate
2677 * @post_reset: is this revalidation after reset?
2678 *
2679 * Re-read IDENTIFY page and make sure @dev is still attached to
2680 * the port.
2681 *
2682 * LOCKING:
2683 * Kernel thread context (may sleep)
2684 *
2685 * RETURNS:
2686 * 0 on success, negative errno otherwise
2687 */
2688 int ata_dev_revalidate(struct ata_port *ap, struct ata_device *dev,
2689 int post_reset)
2690 {
2691 unsigned int class;
2692 u16 *id;
2693 int rc;
2694
2695 if (!ata_dev_enabled(dev))
2696 return -ENODEV;
2697
2698 class = dev->class;
2699 id = NULL;
2700
2701 /* allocate & read ID data */
2702 rc = ata_dev_read_id(ap, dev, &class, post_reset, &id);
2703 if (rc)
2704 goto fail;
2705
2706 /* is the device still there? */
2707 if (!ata_dev_same_device(ap, dev, class, id)) {
2708 rc = -ENODEV;
2709 goto fail;
2710 }
2711
2712 kfree(dev->id);
2713 dev->id = id;
2714
2715 /* configure device according to the new ID */
2716 return ata_dev_configure(ap, dev, 0);
2717
2718 fail:
2719 printk(KERN_ERR "ata%u: dev %u revalidation failed (errno=%d)\n",
2720 ap->id, dev->devno, rc);
2721 kfree(id);
2722 return rc;
2723 }
2724
2725 static const char * const ata_dma_blacklist [] = {
2726 "WDC AC11000H", NULL,
2727 "WDC AC22100H", NULL,
2728 "WDC AC32500H", NULL,
2729 "WDC AC33100H", NULL,
2730 "WDC AC31600H", NULL,
2731 "WDC AC32100H", "24.09P07",
2732 "WDC AC23200L", "21.10N21",
2733 "Compaq CRD-8241B", NULL,
2734 "CRD-8400B", NULL,
2735 "CRD-8480B", NULL,
2736 "CRD-8482B", NULL,
2737 "CRD-84", NULL,
2738 "SanDisk SDP3B", NULL,
2739 "SanDisk SDP3B-64", NULL,
2740 "SANYO CD-ROM CRD", NULL,
2741 "HITACHI CDR-8", NULL,
2742 "HITACHI CDR-8335", NULL,
2743 "HITACHI CDR-8435", NULL,
2744 "Toshiba CD-ROM XM-6202B", NULL,
2745 "TOSHIBA CD-ROM XM-1702BC", NULL,
2746 "CD-532E-A", NULL,
2747 "E-IDE CD-ROM CR-840", NULL,
2748 "CD-ROM Drive/F5A", NULL,
2749 "WPI CDD-820", NULL,
2750 "SAMSUNG CD-ROM SC-148C", NULL,
2751 "SAMSUNG CD-ROM SC", NULL,
2752 "SanDisk SDP3B-64", NULL,
2753 "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,
2754 "_NEC DV5800A", NULL,
2755 "SAMSUNG CD-ROM SN-124", "N001"
2756 };
2757
2758 static int ata_strim(char *s, size_t len)
2759 {
2760 len = strnlen(s, len);
2761
2762 /* ATAPI specifies that empty space is blank-filled; remove blanks */
2763 while ((len > 0) && (s[len - 1] == ' ')) {
2764 len--;
2765 s[len] = 0;
2766 }
2767 return len;
2768 }
2769
2770 static int ata_dma_blacklisted(const struct ata_device *dev)
2771 {
2772 unsigned char model_num[40];
2773 unsigned char model_rev[16];
2774 unsigned int nlen, rlen;
2775 int i;
2776
2777 ata_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
2778 sizeof(model_num));
2779 ata_id_string(dev->id, model_rev, ATA_ID_FW_REV_OFS,
2780 sizeof(model_rev));
2781 nlen = ata_strim(model_num, sizeof(model_num));
2782 rlen = ata_strim(model_rev, sizeof(model_rev));
2783
2784 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i += 2) {
2785 if (!strncmp(ata_dma_blacklist[i], model_num, nlen)) {
2786 if (ata_dma_blacklist[i+1] == NULL)
2787 return 1;
2788 if (!strncmp(ata_dma_blacklist[i], model_rev, rlen))
2789 return 1;
2790 }
2791 }
2792 return 0;
2793 }
2794
2795 /**
2796 * ata_dev_xfermask - Compute supported xfermask of the given device
2797 * @ap: Port on which the device to compute xfermask for resides
2798 * @dev: Device to compute xfermask for
2799 *
2800 * Compute supported xfermask of @dev and store it in
2801 * dev->*_mask. This function is responsible for applying all
2802 * known limits including host controller limits, device
2803 * blacklist, etc...
2804 *
2805 * FIXME: The current implementation limits all transfer modes to
2806 * the fastest of the lowested device on the port. This is not
2807 * required on most controllers.
2808 *
2809 * LOCKING:
2810 * None.
2811 */
2812 static void ata_dev_xfermask(struct ata_port *ap, struct ata_device *dev)
2813 {
2814 struct ata_host_set *hs = ap->host_set;
2815 unsigned long xfer_mask;
2816 int i;
2817
2818 xfer_mask = ata_pack_xfermask(ap->pio_mask, ap->mwdma_mask,
2819 ap->udma_mask);
2820
2821 /* FIXME: Use port-wide xfermask for now */
2822 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2823 struct ata_device *d = &ap->device[i];
2824 if (!ata_dev_enabled(d))
2825 continue;
2826 xfer_mask &= ata_pack_xfermask(d->pio_mask, d->mwdma_mask,
2827 d->udma_mask);
2828 xfer_mask &= ata_id_xfermask(d->id);
2829 if (ata_dma_blacklisted(d))
2830 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
2831 /* Apply cable rule here. Don't apply it early because when
2832 we handle hot plug the cable type can itself change */
2833 if (ap->cbl == ATA_CBL_PATA40)
2834 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
2835 }
2836
2837 if (ata_dma_blacklisted(dev))
2838 printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, "
2839 "disabling DMA\n", ap->id, dev->devno);
2840
2841 if (hs->flags & ATA_HOST_SIMPLEX) {
2842 if (hs->simplex_claimed)
2843 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
2844 }
2845 if (ap->ops->mode_filter)
2846 xfer_mask = ap->ops->mode_filter(ap, dev, xfer_mask);
2847
2848 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
2849 &dev->udma_mask);
2850 }
2851
2852 /**
2853 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
2854 * @ap: Port associated with device @dev
2855 * @dev: Device to which command will be sent
2856 *
2857 * Issue SET FEATURES - XFER MODE command to device @dev
2858 * on port @ap.
2859 *
2860 * LOCKING:
2861 * PCI/etc. bus probe sem.
2862 *
2863 * RETURNS:
2864 * 0 on success, AC_ERR_* mask otherwise.
2865 */
2866
2867 static unsigned int ata_dev_set_xfermode(struct ata_port *ap,
2868 struct ata_device *dev)
2869 {
2870 struct ata_taskfile tf;
2871 unsigned int err_mask;
2872
2873 /* set up set-features taskfile */
2874 DPRINTK("set features - xfer mode\n");
2875
2876 ata_tf_init(ap, &tf, dev->devno);
2877 tf.command = ATA_CMD_SET_FEATURES;
2878 tf.feature = SETFEATURES_XFER;
2879 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2880 tf.protocol = ATA_PROT_NODATA;
2881 tf.nsect = dev->xfer_mode;
2882
2883 err_mask = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
2884
2885 DPRINTK("EXIT, err_mask=%x\n", err_mask);
2886 return err_mask;
2887 }
2888
2889 /**
2890 * ata_dev_init_params - Issue INIT DEV PARAMS command
2891 * @ap: Port associated with device @dev
2892 * @dev: Device to which command will be sent
2893 *
2894 * LOCKING:
2895 * Kernel thread context (may sleep)
2896 *
2897 * RETURNS:
2898 * 0 on success, AC_ERR_* mask otherwise.
2899 */
2900
2901 static unsigned int ata_dev_init_params(struct ata_port *ap,
2902 struct ata_device *dev,
2903 u16 heads,
2904 u16 sectors)
2905 {
2906 struct ata_taskfile tf;
2907 unsigned int err_mask;
2908
2909 /* Number of sectors per track 1-255. Number of heads 1-16 */
2910 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
2911 return AC_ERR_INVALID;
2912
2913 /* set up init dev params taskfile */
2914 DPRINTK("init dev params \n");
2915
2916 ata_tf_init(ap, &tf, dev->devno);
2917 tf.command = ATA_CMD_INIT_DEV_PARAMS;
2918 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2919 tf.protocol = ATA_PROT_NODATA;
2920 tf.nsect = sectors;
2921 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
2922
2923 err_mask = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
2924
2925 DPRINTK("EXIT, err_mask=%x\n", err_mask);
2926 return err_mask;
2927 }
2928
2929 /**
2930 * ata_sg_clean - Unmap DMA memory associated with command
2931 * @qc: Command containing DMA memory to be released
2932 *
2933 * Unmap all mapped DMA memory associated with this command.
2934 *
2935 * LOCKING:
2936 * spin_lock_irqsave(host_set lock)
2937 */
2938
2939 static void ata_sg_clean(struct ata_queued_cmd *qc)
2940 {
2941 struct ata_port *ap = qc->ap;
2942 struct scatterlist *sg = qc->__sg;
2943 int dir = qc->dma_dir;
2944 void *pad_buf = NULL;
2945
2946 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
2947 WARN_ON(sg == NULL);
2948
2949 if (qc->flags & ATA_QCFLAG_SINGLE)
2950 WARN_ON(qc->n_elem > 1);
2951
2952 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
2953
2954 /* if we padded the buffer out to 32-bit bound, and data
2955 * xfer direction is from-device, we must copy from the
2956 * pad buffer back into the supplied buffer
2957 */
2958 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
2959 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2960
2961 if (qc->flags & ATA_QCFLAG_SG) {
2962 if (qc->n_elem)
2963 dma_unmap_sg(ap->dev, sg, qc->n_elem, dir);
2964 /* restore last sg */
2965 sg[qc->orig_n_elem - 1].length += qc->pad_len;
2966 if (pad_buf) {
2967 struct scatterlist *psg = &qc->pad_sgent;
2968 void *addr = kmap_atomic(psg->page, KM_IRQ0);
2969 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
2970 kunmap_atomic(addr, KM_IRQ0);
2971 }
2972 } else {
2973 if (qc->n_elem)
2974 dma_unmap_single(ap->dev,
2975 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
2976 dir);
2977 /* restore sg */
2978 sg->length += qc->pad_len;
2979 if (pad_buf)
2980 memcpy(qc->buf_virt + sg->length - qc->pad_len,
2981 pad_buf, qc->pad_len);
2982 }
2983
2984 qc->flags &= ~ATA_QCFLAG_DMAMAP;
2985 qc->__sg = NULL;
2986 }
2987
2988 /**
2989 * ata_fill_sg - Fill PCI IDE PRD table
2990 * @qc: Metadata associated with taskfile to be transferred
2991 *
2992 * Fill PCI IDE PRD (scatter-gather) table with segments
2993 * associated with the current disk command.
2994 *
2995 * LOCKING:
2996 * spin_lock_irqsave(host_set lock)
2997 *
2998 */
2999 static void ata_fill_sg(struct ata_queued_cmd *qc)
3000 {
3001 struct ata_port *ap = qc->ap;
3002 struct scatterlist *sg;
3003 unsigned int idx;
3004
3005 WARN_ON(qc->__sg == NULL);
3006 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
3007
3008 idx = 0;
3009 ata_for_each_sg(sg, qc) {
3010 u32 addr, offset;
3011 u32 sg_len, len;
3012
3013 /* determine if physical DMA addr spans 64K boundary.
3014 * Note h/w doesn't support 64-bit, so we unconditionally
3015 * truncate dma_addr_t to u32.
3016 */
3017 addr = (u32) sg_dma_address(sg);
3018 sg_len = sg_dma_len(sg);
3019
3020 while (sg_len) {
3021 offset = addr & 0xffff;
3022 len = sg_len;
3023 if ((offset + sg_len) > 0x10000)
3024 len = 0x10000 - offset;
3025
3026 ap->prd[idx].addr = cpu_to_le32(addr);
3027 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
3028 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
3029
3030 idx++;
3031 sg_len -= len;
3032 addr += len;
3033 }
3034 }
3035
3036 if (idx)
3037 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
3038 }
3039 /**
3040 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
3041 * @qc: Metadata associated with taskfile to check
3042 *
3043 * Allow low-level driver to filter ATA PACKET commands, returning
3044 * a status indicating whether or not it is OK to use DMA for the
3045 * supplied PACKET command.
3046 *
3047 * LOCKING:
3048 * spin_lock_irqsave(host_set lock)
3049 *
3050 * RETURNS: 0 when ATAPI DMA can be used
3051 * nonzero otherwise
3052 */
3053 int ata_check_atapi_dma(struct ata_queued_cmd *qc)
3054 {
3055 struct ata_port *ap = qc->ap;
3056 int rc = 0; /* Assume ATAPI DMA is OK by default */
3057
3058 if (ap->ops->check_atapi_dma)
3059 rc = ap->ops->check_atapi_dma(qc);
3060
3061 return rc;
3062 }
3063 /**
3064 * ata_qc_prep - Prepare taskfile for submission
3065 * @qc: Metadata associated with taskfile to be prepared
3066 *
3067 * Prepare ATA taskfile for submission.
3068 *
3069 * LOCKING:
3070 * spin_lock_irqsave(host_set lock)
3071 */
3072 void ata_qc_prep(struct ata_queued_cmd *qc)
3073 {
3074 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
3075 return;
3076
3077 ata_fill_sg(qc);
3078 }
3079
3080 void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
3081
3082 /**
3083 * ata_sg_init_one - Associate command with memory buffer
3084 * @qc: Command to be associated
3085 * @buf: Memory buffer
3086 * @buflen: Length of memory buffer, in bytes.
3087 *
3088 * Initialize the data-related elements of queued_cmd @qc
3089 * to point to a single memory buffer, @buf of byte length @buflen.
3090 *
3091 * LOCKING:
3092 * spin_lock_irqsave(host_set lock)
3093 */
3094
3095 void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
3096 {
3097 struct scatterlist *sg;
3098
3099 qc->flags |= ATA_QCFLAG_SINGLE;
3100
3101 memset(&qc->sgent, 0, sizeof(qc->sgent));
3102 qc->__sg = &qc->sgent;
3103 qc->n_elem = 1;
3104 qc->orig_n_elem = 1;
3105 qc->buf_virt = buf;
3106
3107 sg = qc->__sg;
3108 sg_init_one(sg, buf, buflen);
3109 }
3110
3111 /**
3112 * ata_sg_init - Associate command with scatter-gather table.
3113 * @qc: Command to be associated
3114 * @sg: Scatter-gather table.
3115 * @n_elem: Number of elements in s/g table.
3116 *
3117 * Initialize the data-related elements of queued_cmd @qc
3118 * to point to a scatter-gather table @sg, containing @n_elem
3119 * elements.
3120 *
3121 * LOCKING:
3122 * spin_lock_irqsave(host_set lock)
3123 */
3124
3125 void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
3126 unsigned int n_elem)
3127 {
3128 qc->flags |= ATA_QCFLAG_SG;
3129 qc->__sg = sg;
3130 qc->n_elem = n_elem;
3131 qc->orig_n_elem = n_elem;
3132 }
3133
3134 /**
3135 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
3136 * @qc: Command with memory buffer to be mapped.
3137 *
3138 * DMA-map the memory buffer associated with queued_cmd @qc.
3139 *
3140 * LOCKING:
3141 * spin_lock_irqsave(host_set lock)
3142 *
3143 * RETURNS:
3144 * Zero on success, negative on error.
3145 */
3146
3147 static int ata_sg_setup_one(struct ata_queued_cmd *qc)
3148 {
3149 struct ata_port *ap = qc->ap;
3150 int dir = qc->dma_dir;
3151 struct scatterlist *sg = qc->__sg;
3152 dma_addr_t dma_address;
3153 int trim_sg = 0;
3154
3155 /* we must lengthen transfers to end on a 32-bit boundary */
3156 qc->pad_len = sg->length & 3;
3157 if (qc->pad_len) {
3158 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3159 struct scatterlist *psg = &qc->pad_sgent;
3160
3161 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
3162
3163 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3164
3165 if (qc->tf.flags & ATA_TFLAG_WRITE)
3166 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
3167 qc->pad_len);
3168
3169 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3170 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3171 /* trim sg */
3172 sg->length -= qc->pad_len;
3173 if (sg->length == 0)
3174 trim_sg = 1;
3175
3176 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
3177 sg->length, qc->pad_len);
3178 }
3179
3180 if (trim_sg) {
3181 qc->n_elem--;
3182 goto skip_map;
3183 }
3184
3185 dma_address = dma_map_single(ap->dev, qc->buf_virt,
3186 sg->length, dir);
3187 if (dma_mapping_error(dma_address)) {
3188 /* restore sg */
3189 sg->length += qc->pad_len;
3190 return -1;
3191 }
3192
3193 sg_dma_address(sg) = dma_address;
3194 sg_dma_len(sg) = sg->length;
3195
3196 skip_map:
3197 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
3198 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3199
3200 return 0;
3201 }
3202
3203 /**
3204 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
3205 * @qc: Command with scatter-gather table to be mapped.
3206 *
3207 * DMA-map the scatter-gather table associated with queued_cmd @qc.
3208 *
3209 * LOCKING:
3210 * spin_lock_irqsave(host_set lock)
3211 *
3212 * RETURNS:
3213 * Zero on success, negative on error.
3214 *
3215 */
3216
3217 static int ata_sg_setup(struct ata_queued_cmd *qc)
3218 {
3219 struct ata_port *ap = qc->ap;
3220 struct scatterlist *sg = qc->__sg;
3221 struct scatterlist *lsg = &sg[qc->n_elem - 1];
3222 int n_elem, pre_n_elem, dir, trim_sg = 0;
3223
3224 VPRINTK("ENTER, ata%u\n", ap->id);
3225 WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
3226
3227 /* we must lengthen transfers to end on a 32-bit boundary */
3228 qc->pad_len = lsg->length & 3;
3229 if (qc->pad_len) {
3230 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3231 struct scatterlist *psg = &qc->pad_sgent;
3232 unsigned int offset;
3233
3234 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
3235
3236 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3237
3238 /*
3239 * psg->page/offset are used to copy to-be-written
3240 * data in this function or read data in ata_sg_clean.
3241 */
3242 offset = lsg->offset + lsg->length - qc->pad_len;
3243 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
3244 psg->offset = offset_in_page(offset);
3245
3246 if (qc->tf.flags & ATA_TFLAG_WRITE) {
3247 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3248 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
3249 kunmap_atomic(addr, KM_IRQ0);
3250 }
3251
3252 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3253 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3254 /* trim last sg */
3255 lsg->length -= qc->pad_len;
3256 if (lsg->length == 0)
3257 trim_sg = 1;
3258
3259 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
3260 qc->n_elem - 1, lsg->length, qc->pad_len);
3261 }
3262
3263 pre_n_elem = qc->n_elem;
3264 if (trim_sg && pre_n_elem)
3265 pre_n_elem--;
3266
3267 if (!pre_n_elem) {
3268 n_elem = 0;
3269 goto skip_map;
3270 }
3271
3272 dir = qc->dma_dir;
3273 n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir);
3274 if (n_elem < 1) {
3275 /* restore last sg */
3276 lsg->length += qc->pad_len;
3277 return -1;
3278 }
3279
3280 DPRINTK("%d sg elements mapped\n", n_elem);
3281
3282 skip_map:
3283 qc->n_elem = n_elem;
3284
3285 return 0;
3286 }
3287
3288 /**
3289 * ata_poll_qc_complete - turn irq back on and finish qc
3290 * @qc: Command to complete
3291 * @err_mask: ATA status register content
3292 *
3293 * LOCKING:
3294 * None. (grabs host lock)
3295 */
3296
3297 void ata_poll_qc_complete(struct ata_queued_cmd *qc)
3298 {
3299 struct ata_port *ap = qc->ap;
3300 unsigned long flags;
3301
3302 spin_lock_irqsave(&ap->host_set->lock, flags);
3303 ap->flags &= ~ATA_FLAG_NOINTR;
3304 ata_irq_on(ap);
3305 ata_qc_complete(qc);
3306 spin_unlock_irqrestore(&ap->host_set->lock, flags);
3307 }
3308
3309 /**
3310 * ata_pio_poll - poll using PIO, depending on current state
3311 * @ap: the target ata_port
3312 *
3313 * LOCKING:
3314 * None. (executing in kernel thread context)
3315 *
3316 * RETURNS:
3317 * timeout value to use
3318 */
3319
3320 static unsigned long ata_pio_poll(struct ata_port *ap)
3321 {
3322 struct ata_queued_cmd *qc;
3323 u8 status;
3324 unsigned int poll_state = HSM_ST_UNKNOWN;
3325 unsigned int reg_state = HSM_ST_UNKNOWN;
3326
3327 qc = ata_qc_from_tag(ap, ap->active_tag);
3328 WARN_ON(qc == NULL);
3329
3330 switch (ap->hsm_task_state) {
3331 case HSM_ST:
3332 case HSM_ST_POLL:
3333 poll_state = HSM_ST_POLL;
3334 reg_state = HSM_ST;
3335 break;
3336 case HSM_ST_LAST:
3337 case HSM_ST_LAST_POLL:
3338 poll_state = HSM_ST_LAST_POLL;
3339 reg_state = HSM_ST_LAST;
3340 break;
3341 default:
3342 BUG();
3343 break;
3344 }
3345
3346 status = ata_chk_status(ap);
3347 if (status & ATA_BUSY) {
3348 if (time_after(jiffies, ap->pio_task_timeout)) {
3349 qc->err_mask |= AC_ERR_TIMEOUT;
3350 ap->hsm_task_state = HSM_ST_TMOUT;
3351 return 0;
3352 }
3353 ap->hsm_task_state = poll_state;
3354 return ATA_SHORT_PAUSE;
3355 }
3356
3357 ap->hsm_task_state = reg_state;
3358 return 0;
3359 }
3360
3361 /**
3362 * ata_pio_complete - check if drive is busy or idle
3363 * @ap: the target ata_port
3364 *
3365 * LOCKING:
3366 * None. (executing in kernel thread context)
3367 *
3368 * RETURNS:
3369 * Non-zero if qc completed, zero otherwise.
3370 */
3371
3372 static int ata_pio_complete (struct ata_port *ap)
3373 {
3374 struct ata_queued_cmd *qc;
3375 u8 drv_stat;
3376
3377 /*
3378 * This is purely heuristic. This is a fast path. Sometimes when
3379 * we enter, BSY will be cleared in a chk-status or two. If not,
3380 * the drive is probably seeking or something. Snooze for a couple
3381 * msecs, then chk-status again. If still busy, fall back to
3382 * HSM_ST_POLL state.
3383 */
3384 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
3385 if (drv_stat & ATA_BUSY) {
3386 msleep(2);
3387 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
3388 if (drv_stat & ATA_BUSY) {
3389 ap->hsm_task_state = HSM_ST_LAST_POLL;
3390 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
3391 return 0;
3392 }
3393 }
3394
3395 qc = ata_qc_from_tag(ap, ap->active_tag);
3396 WARN_ON(qc == NULL);
3397
3398 drv_stat = ata_wait_idle(ap);
3399 if (!ata_ok(drv_stat)) {
3400 qc->err_mask |= __ac_err_mask(drv_stat);
3401 ap->hsm_task_state = HSM_ST_ERR;
3402 return 0;
3403 }
3404
3405 ap->hsm_task_state = HSM_ST_IDLE;
3406
3407 WARN_ON(qc->err_mask);
3408 ata_poll_qc_complete(qc);
3409
3410 /* another command may start at this point */
3411
3412 return 1;
3413 }
3414
3415
3416 /**
3417 * swap_buf_le16 - swap halves of 16-bit words in place
3418 * @buf: Buffer to swap
3419 * @buf_words: Number of 16-bit words in buffer.
3420 *
3421 * Swap halves of 16-bit words if needed to convert from
3422 * little-endian byte order to native cpu byte order, or
3423 * vice-versa.
3424 *
3425 * LOCKING:
3426 * Inherited from caller.
3427 */
3428 void swap_buf_le16(u16 *buf, unsigned int buf_words)
3429 {
3430 #ifdef __BIG_ENDIAN
3431 unsigned int i;
3432
3433 for (i = 0; i < buf_words; i++)
3434 buf[i] = le16_to_cpu(buf[i]);
3435 #endif /* __BIG_ENDIAN */
3436 }
3437
3438 /**
3439 * ata_mmio_data_xfer - Transfer data by MMIO
3440 * @ap: port to read/write
3441 * @buf: data buffer
3442 * @buflen: buffer length
3443 * @write_data: read/write
3444 *
3445 * Transfer data from/to the device data register by MMIO.
3446 *
3447 * LOCKING:
3448 * Inherited from caller.
3449 */
3450
3451 static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
3452 unsigned int buflen, int write_data)
3453 {
3454 unsigned int i;
3455 unsigned int words = buflen >> 1;
3456 u16 *buf16 = (u16 *) buf;
3457 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
3458
3459 /* Transfer multiple of 2 bytes */
3460 if (write_data) {
3461 for (i = 0; i < words; i++)
3462 writew(le16_to_cpu(buf16[i]), mmio);
3463 } else {
3464 for (i = 0; i < words; i++)
3465 buf16[i] = cpu_to_le16(readw(mmio));
3466 }
3467
3468 /* Transfer trailing 1 byte, if any. */
3469 if (unlikely(buflen & 0x01)) {
3470 u16 align_buf[1] = { 0 };
3471 unsigned char *trailing_buf = buf + buflen - 1;
3472
3473 if (write_data) {
3474 memcpy(align_buf, trailing_buf, 1);
3475 writew(le16_to_cpu(align_buf[0]), mmio);
3476 } else {
3477 align_buf[0] = cpu_to_le16(readw(mmio));
3478 memcpy(trailing_buf, align_buf, 1);
3479 }
3480 }
3481 }
3482
3483 /**
3484 * ata_pio_data_xfer - Transfer data by PIO
3485 * @ap: port to read/write
3486 * @buf: data buffer
3487 * @buflen: buffer length
3488 * @write_data: read/write
3489 *
3490 * Transfer data from/to the device data register by PIO.
3491 *
3492 * LOCKING:
3493 * Inherited from caller.
3494 */
3495
3496 static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
3497 unsigned int buflen, int write_data)
3498 {
3499 unsigned int words = buflen >> 1;
3500
3501 /* Transfer multiple of 2 bytes */
3502 if (write_data)
3503 outsw(ap->ioaddr.data_addr, buf, words);
3504 else
3505 insw(ap->ioaddr.data_addr, buf, words);
3506
3507 /* Transfer trailing 1 byte, if any. */
3508 if (unlikely(buflen & 0x01)) {
3509 u16 align_buf[1] = { 0 };
3510 unsigned char *trailing_buf = buf + buflen - 1;
3511
3512 if (write_data) {
3513 memcpy(align_buf, trailing_buf, 1);
3514 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
3515 } else {
3516 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
3517 memcpy(trailing_buf, align_buf, 1);
3518 }
3519 }
3520 }
3521
3522 /**
3523 * ata_data_xfer - Transfer data from/to the data register.
3524 * @ap: port to read/write
3525 * @buf: data buffer
3526 * @buflen: buffer length
3527 * @do_write: read/write
3528 *
3529 * Transfer data from/to the device data register.
3530 *
3531 * LOCKING:
3532 * Inherited from caller.
3533 */
3534
3535 static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
3536 unsigned int buflen, int do_write)
3537 {
3538 /* Make the crap hardware pay the costs not the good stuff */
3539 if (unlikely(ap->flags & ATA_FLAG_IRQ_MASK)) {
3540 unsigned long flags;
3541 local_irq_save(flags);
3542 if (ap->flags & ATA_FLAG_MMIO)
3543 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3544 else
3545 ata_pio_data_xfer(ap, buf, buflen, do_write);
3546 local_irq_restore(flags);
3547 } else {
3548 if (ap->flags & ATA_FLAG_MMIO)
3549 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3550 else
3551 ata_pio_data_xfer(ap, buf, buflen, do_write);
3552 }
3553 }
3554
3555 /**
3556 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
3557 * @qc: Command on going
3558 *
3559 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3560 *
3561 * LOCKING:
3562 * Inherited from caller.
3563 */
3564
3565 static void ata_pio_sector(struct ata_queued_cmd *qc)
3566 {
3567 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3568 struct scatterlist *sg = qc->__sg;
3569 struct ata_port *ap = qc->ap;
3570 struct page *page;
3571 unsigned int offset;
3572 unsigned char *buf;
3573
3574 if (qc->cursect == (qc->nsect - 1))
3575 ap->hsm_task_state = HSM_ST_LAST;
3576
3577 page = sg[qc->cursg].page;
3578 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
3579
3580 /* get the current page and offset */
3581 page = nth_page(page, (offset >> PAGE_SHIFT));
3582 offset %= PAGE_SIZE;
3583
3584 buf = kmap(page) + offset;
3585
3586 qc->cursect++;
3587 qc->cursg_ofs++;
3588
3589 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
3590 qc->cursg++;
3591 qc->cursg_ofs = 0;
3592 }
3593
3594 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3595
3596 /* do the actual data transfer */
3597 do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3598 ata_data_xfer(ap, buf, ATA_SECT_SIZE, do_write);
3599
3600 kunmap(page);
3601 }
3602
3603 /**
3604 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
3605 * @qc: Command on going
3606 * @bytes: number of bytes
3607 *
3608 * Transfer Transfer data from/to the ATAPI device.
3609 *
3610 * LOCKING:
3611 * Inherited from caller.
3612 *
3613 */
3614
3615 static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
3616 {
3617 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3618 struct scatterlist *sg = qc->__sg;
3619 struct ata_port *ap = qc->ap;
3620 struct page *page;
3621 unsigned char *buf;
3622 unsigned int offset, count;
3623
3624 if (qc->curbytes + bytes >= qc->nbytes)
3625 ap->hsm_task_state = HSM_ST_LAST;
3626
3627 next_sg:
3628 if (unlikely(qc->cursg >= qc->n_elem)) {
3629 /*
3630 * The end of qc->sg is reached and the device expects
3631 * more data to transfer. In order not to overrun qc->sg
3632 * and fulfill length specified in the byte count register,
3633 * - for read case, discard trailing data from the device
3634 * - for write case, padding zero data to the device
3635 */
3636 u16 pad_buf[1] = { 0 };
3637 unsigned int words = bytes >> 1;
3638 unsigned int i;
3639
3640 if (words) /* warning if bytes > 1 */
3641 printk(KERN_WARNING "ata%u: %u bytes trailing data\n",
3642 ap->id, bytes);
3643
3644 for (i = 0; i < words; i++)
3645 ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write);
3646
3647 ap->hsm_task_state = HSM_ST_LAST;
3648 return;
3649 }
3650
3651 sg = &qc->__sg[qc->cursg];
3652
3653 page = sg->page;
3654 offset = sg->offset + qc->cursg_ofs;
3655
3656 /* get the current page and offset */
3657 page = nth_page(page, (offset >> PAGE_SHIFT));
3658 offset %= PAGE_SIZE;
3659
3660 /* don't overrun current sg */
3661 count = min(sg->length - qc->cursg_ofs, bytes);
3662
3663 /* don't cross page boundaries */
3664 count = min(count, (unsigned int)PAGE_SIZE - offset);
3665
3666 buf = kmap(page) + offset;
3667
3668 bytes -= count;
3669 qc->curbytes += count;
3670 qc->cursg_ofs += count;
3671
3672 if (qc->cursg_ofs == sg->length) {
3673 qc->cursg++;
3674 qc->cursg_ofs = 0;
3675 }
3676
3677 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3678
3679 /* do the actual data transfer */
3680 ata_data_xfer(ap, buf, count, do_write);
3681
3682 kunmap(page);
3683
3684 if (bytes)
3685 goto next_sg;
3686 }
3687
3688 /**
3689 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
3690 * @qc: Command on going
3691 *
3692 * Transfer Transfer data from/to the ATAPI device.
3693 *
3694 * LOCKING:
3695 * Inherited from caller.
3696 */
3697
3698 static void atapi_pio_bytes(struct ata_queued_cmd *qc)
3699 {
3700 struct ata_port *ap = qc->ap;
3701 struct ata_device *dev = qc->dev;
3702 unsigned int ireason, bc_lo, bc_hi, bytes;
3703 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
3704
3705 ap->ops->tf_read(ap, &qc->tf);
3706 ireason = qc->tf.nsect;
3707 bc_lo = qc->tf.lbam;
3708 bc_hi = qc->tf.lbah;
3709 bytes = (bc_hi << 8) | bc_lo;
3710
3711 /* shall be cleared to zero, indicating xfer of data */
3712 if (ireason & (1 << 0))
3713 goto err_out;
3714
3715 /* make sure transfer direction matches expected */
3716 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
3717 if (do_write != i_write)
3718 goto err_out;
3719
3720 __atapi_pio_bytes(qc, bytes);
3721
3722 return;
3723
3724 err_out:
3725 printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n",
3726 ap->id, dev->devno);
3727 qc->err_mask |= AC_ERR_HSM;
3728 ap->hsm_task_state = HSM_ST_ERR;
3729 }
3730
3731 /**
3732 * ata_pio_block - start PIO on a block
3733 * @ap: the target ata_port
3734 *
3735 * LOCKING:
3736 * None. (executing in kernel thread context)
3737 */
3738
3739 static void ata_pio_block(struct ata_port *ap)
3740 {
3741 struct ata_queued_cmd *qc;
3742 u8 status;
3743
3744 /*
3745 * This is purely heuristic. This is a fast path.
3746 * Sometimes when we enter, BSY will be cleared in
3747 * a chk-status or two. If not, the drive is probably seeking
3748 * or something. Snooze for a couple msecs, then
3749 * chk-status again. If still busy, fall back to
3750 * HSM_ST_POLL state.
3751 */
3752 status = ata_busy_wait(ap, ATA_BUSY, 5);
3753 if (status & ATA_BUSY) {
3754 msleep(2);
3755 status = ata_busy_wait(ap, ATA_BUSY, 10);
3756 if (status & ATA_BUSY) {
3757 ap->hsm_task_state = HSM_ST_POLL;
3758 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
3759 return;
3760 }
3761 }
3762
3763 qc = ata_qc_from_tag(ap, ap->active_tag);
3764 WARN_ON(qc == NULL);
3765
3766 /* check error */
3767 if (status & (ATA_ERR | ATA_DF)) {
3768 qc->err_mask |= AC_ERR_DEV;
3769 ap->hsm_task_state = HSM_ST_ERR;
3770 return;
3771 }
3772
3773 /* transfer data if any */
3774 if (is_atapi_taskfile(&qc->tf)) {
3775 /* DRQ=0 means no more data to transfer */
3776 if ((status & ATA_DRQ) == 0) {
3777 ap->hsm_task_state = HSM_ST_LAST;
3778 return;
3779 }
3780
3781 atapi_pio_bytes(qc);
3782 } else {
3783 /* handle BSY=0, DRQ=0 as error */
3784 if ((status & ATA_DRQ) == 0) {
3785 qc->err_mask |= AC_ERR_HSM;
3786 ap->hsm_task_state = HSM_ST_ERR;
3787 return;
3788 }
3789
3790 ata_pio_sector(qc);
3791 }
3792 }
3793
3794 static void ata_pio_error(struct ata_port *ap)
3795 {
3796 struct ata_queued_cmd *qc;
3797
3798 qc = ata_qc_from_tag(ap, ap->active_tag);
3799 WARN_ON(qc == NULL);
3800
3801 if (qc->tf.command != ATA_CMD_PACKET)
3802 printk(KERN_WARNING "ata%u: PIO error\n", ap->id);
3803
3804 /* make sure qc->err_mask is available to
3805 * know what's wrong and recover
3806 */
3807 WARN_ON(qc->err_mask == 0);
3808
3809 ap->hsm_task_state = HSM_ST_IDLE;
3810
3811 ata_poll_qc_complete(qc);
3812 }
3813
3814 static void ata_pio_task(void *_data)
3815 {
3816 struct ata_port *ap = _data;
3817 unsigned long timeout;
3818 int qc_completed;
3819
3820 fsm_start:
3821 timeout = 0;
3822 qc_completed = 0;
3823
3824 switch (ap->hsm_task_state) {
3825 case HSM_ST_IDLE:
3826 return;
3827
3828 case HSM_ST:
3829 ata_pio_block(ap);
3830 break;
3831
3832 case HSM_ST_LAST:
3833 qc_completed = ata_pio_complete(ap);
3834 break;
3835
3836 case HSM_ST_POLL:
3837 case HSM_ST_LAST_POLL:
3838 timeout = ata_pio_poll(ap);
3839 break;
3840
3841 case HSM_ST_TMOUT:
3842 case HSM_ST_ERR:
3843 ata_pio_error(ap);
3844 return;
3845 }
3846
3847 if (timeout)
3848 ata_port_queue_task(ap, ata_pio_task, ap, timeout);
3849 else if (!qc_completed)
3850 goto fsm_start;
3851 }
3852
3853 /**
3854 * atapi_packet_task - Write CDB bytes to hardware
3855 * @_data: Port to which ATAPI device is attached.
3856 *
3857 * When device has indicated its readiness to accept
3858 * a CDB, this function is called. Send the CDB.
3859 * If DMA is to be performed, exit immediately.
3860 * Otherwise, we are in polling mode, so poll
3861 * status under operation succeeds or fails.
3862 *
3863 * LOCKING:
3864 * Kernel thread context (may sleep)
3865 */
3866
3867 static void atapi_packet_task(void *_data)
3868 {
3869 struct ata_port *ap = _data;
3870 struct ata_queued_cmd *qc;
3871 u8 status;
3872
3873 qc = ata_qc_from_tag(ap, ap->active_tag);
3874 WARN_ON(qc == NULL);
3875 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
3876
3877 /* sleep-wait for BSY to clear */
3878 DPRINTK("busy wait\n");
3879 if (ata_busy_sleep(ap, ATA_TMOUT_CDB_QUICK, ATA_TMOUT_CDB)) {
3880 qc->err_mask |= AC_ERR_TIMEOUT;
3881 goto err_out;
3882 }
3883
3884 /* make sure DRQ is set */
3885 status = ata_chk_status(ap);
3886 if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ) {
3887 qc->err_mask |= AC_ERR_HSM;
3888 goto err_out;
3889 }
3890
3891 /* send SCSI cdb */
3892 DPRINTK("send cdb\n");
3893 WARN_ON(qc->dev->cdb_len < 12);
3894
3895 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA ||
3896 qc->tf.protocol == ATA_PROT_ATAPI_NODATA) {
3897 unsigned long flags;
3898
3899 /* Once we're done issuing command and kicking bmdma,
3900 * irq handler takes over. To not lose irq, we need
3901 * to clear NOINTR flag before sending cdb, but
3902 * interrupt handler shouldn't be invoked before we're
3903 * finished. Hence, the following locking.
3904 */
3905 spin_lock_irqsave(&ap->host_set->lock, flags);
3906 ap->flags &= ~ATA_FLAG_NOINTR;
3907 ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
3908 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA)
3909 ap->ops->bmdma_start(qc); /* initiate bmdma */
3910 spin_unlock_irqrestore(&ap->host_set->lock, flags);
3911 } else {
3912 ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
3913
3914 /* PIO commands are handled by polling */
3915 ap->hsm_task_state = HSM_ST;
3916 ata_port_queue_task(ap, ata_pio_task, ap, 0);
3917 }
3918
3919 return;
3920
3921 err_out:
3922 ata_poll_qc_complete(qc);
3923 }
3924
3925 /**
3926 * ata_qc_timeout - Handle timeout of queued command
3927 * @qc: Command that timed out
3928 *
3929 * Some part of the kernel (currently, only the SCSI layer)
3930 * has noticed that the active command on port @ap has not
3931 * completed after a specified length of time. Handle this
3932 * condition by disabling DMA (if necessary) and completing
3933 * transactions, with error if necessary.
3934 *
3935 * This also handles the case of the "lost interrupt", where
3936 * for some reason (possibly hardware bug, possibly driver bug)
3937 * an interrupt was not delivered to the driver, even though the
3938 * transaction completed successfully.
3939 *
3940 * LOCKING:
3941 * Inherited from SCSI layer (none, can sleep)
3942 */
3943
3944 static void ata_qc_timeout(struct ata_queued_cmd *qc)
3945 {
3946 struct ata_port *ap = qc->ap;
3947 struct ata_host_set *host_set = ap->host_set;
3948 u8 host_stat = 0, drv_stat;
3949 unsigned long flags;
3950
3951 DPRINTK("ENTER\n");
3952
3953 ap->hsm_task_state = HSM_ST_IDLE;
3954
3955 spin_lock_irqsave(&host_set->lock, flags);
3956
3957 switch (qc->tf.protocol) {
3958
3959 case ATA_PROT_DMA:
3960 case ATA_PROT_ATAPI_DMA:
3961 host_stat = ap->ops->bmdma_status(ap);
3962
3963 /* before we do anything else, clear DMA-Start bit */
3964 ap->ops->bmdma_stop(qc);
3965
3966 /* fall through */
3967
3968 default:
3969 ata_altstatus(ap);
3970 drv_stat = ata_chk_status(ap);
3971
3972 /* ack bmdma irq events */
3973 ap->ops->irq_clear(ap);
3974
3975 printk(KERN_ERR "ata%u: command 0x%x timeout, stat 0x%x host_stat 0x%x\n",
3976 ap->id, qc->tf.command, drv_stat, host_stat);
3977
3978 /* complete taskfile transaction */
3979 qc->err_mask |= ac_err_mask(drv_stat);
3980 break;
3981 }
3982
3983 spin_unlock_irqrestore(&host_set->lock, flags);
3984
3985 ata_eh_qc_complete(qc);
3986
3987 DPRINTK("EXIT\n");
3988 }
3989
3990 /**
3991 * ata_eng_timeout - Handle timeout of queued command
3992 * @ap: Port on which timed-out command is active
3993 *
3994 * Some part of the kernel (currently, only the SCSI layer)
3995 * has noticed that the active command on port @ap has not
3996 * completed after a specified length of time. Handle this
3997 * condition by disabling DMA (if necessary) and completing
3998 * transactions, with error if necessary.
3999 *
4000 * This also handles the case of the "lost interrupt", where
4001 * for some reason (possibly hardware bug, possibly driver bug)
4002 * an interrupt was not delivered to the driver, even though the
4003 * transaction completed successfully.
4004 *
4005 * LOCKING:
4006 * Inherited from SCSI layer (none, can sleep)
4007 */
4008
4009 void ata_eng_timeout(struct ata_port *ap)
4010 {
4011 DPRINTK("ENTER\n");
4012
4013 ata_qc_timeout(ata_qc_from_tag(ap, ap->active_tag));
4014
4015 DPRINTK("EXIT\n");
4016 }
4017
4018 /**
4019 * ata_qc_new - Request an available ATA command, for queueing
4020 * @ap: Port associated with device @dev
4021 * @dev: Device from whom we request an available command structure
4022 *
4023 * LOCKING:
4024 * None.
4025 */
4026
4027 static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
4028 {
4029 struct ata_queued_cmd *qc = NULL;
4030 unsigned int i;
4031
4032 for (i = 0; i < ATA_MAX_QUEUE; i++)
4033 if (!test_and_set_bit(i, &ap->qactive)) {
4034 qc = ata_qc_from_tag(ap, i);
4035 break;
4036 }
4037
4038 if (qc)
4039 qc->tag = i;
4040
4041 return qc;
4042 }
4043
4044 /**
4045 * ata_qc_new_init - Request an available ATA command, and initialize it
4046 * @ap: Port associated with device @dev
4047 * @dev: Device from whom we request an available command structure
4048 *
4049 * LOCKING:
4050 * None.
4051 */
4052
4053 struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap,
4054 struct ata_device *dev)
4055 {
4056 struct ata_queued_cmd *qc;
4057
4058 qc = ata_qc_new(ap);
4059 if (qc) {
4060 qc->scsicmd = NULL;
4061 qc->ap = ap;
4062 qc->dev = dev;
4063
4064 ata_qc_reinit(qc);
4065 }
4066
4067 return qc;
4068 }
4069
4070 /**
4071 * ata_qc_free - free unused ata_queued_cmd
4072 * @qc: Command to complete
4073 *
4074 * Designed to free unused ata_queued_cmd object
4075 * in case something prevents using it.
4076 *
4077 * LOCKING:
4078 * spin_lock_irqsave(host_set lock)
4079 */
4080 void ata_qc_free(struct ata_queued_cmd *qc)
4081 {
4082 struct ata_port *ap = qc->ap;
4083 unsigned int tag;
4084
4085 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4086
4087 qc->flags = 0;
4088 tag = qc->tag;
4089 if (likely(ata_tag_valid(tag))) {
4090 if (tag == ap->active_tag)
4091 ap->active_tag = ATA_TAG_POISON;
4092 qc->tag = ATA_TAG_POISON;
4093 clear_bit(tag, &ap->qactive);
4094 }
4095 }
4096
4097 void __ata_qc_complete(struct ata_queued_cmd *qc)
4098 {
4099 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4100 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
4101
4102 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
4103 ata_sg_clean(qc);
4104
4105 /* atapi: mark qc as inactive to prevent the interrupt handler
4106 * from completing the command twice later, before the error handler
4107 * is called. (when rc != 0 and atapi request sense is needed)
4108 */
4109 qc->flags &= ~ATA_QCFLAG_ACTIVE;
4110
4111 /* call completion callback */
4112 qc->complete_fn(qc);
4113 }
4114
4115 static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
4116 {
4117 struct ata_port *ap = qc->ap;
4118
4119 switch (qc->tf.protocol) {
4120 case ATA_PROT_DMA:
4121 case ATA_PROT_ATAPI_DMA:
4122 return 1;
4123
4124 case ATA_PROT_ATAPI:
4125 case ATA_PROT_PIO:
4126 if (ap->flags & ATA_FLAG_PIO_DMA)
4127 return 1;
4128
4129 /* fall through */
4130
4131 default:
4132 return 0;
4133 }
4134
4135 /* never reached */
4136 }
4137
4138 /**
4139 * ata_qc_issue - issue taskfile to device
4140 * @qc: command to issue to device
4141 *
4142 * Prepare an ATA command to submission to device.
4143 * This includes mapping the data into a DMA-able
4144 * area, filling in the S/G table, and finally
4145 * writing the taskfile to hardware, starting the command.
4146 *
4147 * LOCKING:
4148 * spin_lock_irqsave(host_set lock)
4149 */
4150 void ata_qc_issue(struct ata_queued_cmd *qc)
4151 {
4152 struct ata_port *ap = qc->ap;
4153
4154 qc->ap->active_tag = qc->tag;
4155 qc->flags |= ATA_QCFLAG_ACTIVE;
4156
4157 if (ata_should_dma_map(qc)) {
4158 if (qc->flags & ATA_QCFLAG_SG) {
4159 if (ata_sg_setup(qc))
4160 goto sg_err;
4161 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
4162 if (ata_sg_setup_one(qc))
4163 goto sg_err;
4164 }
4165 } else {
4166 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4167 }
4168
4169 ap->ops->qc_prep(qc);
4170
4171 qc->err_mask |= ap->ops->qc_issue(qc);
4172 if (unlikely(qc->err_mask))
4173 goto err;
4174 return;
4175
4176 sg_err:
4177 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4178 qc->err_mask |= AC_ERR_SYSTEM;
4179 err:
4180 ata_qc_complete(qc);
4181 }
4182
4183 /**
4184 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
4185 * @qc: command to issue to device
4186 *
4187 * Using various libata functions and hooks, this function
4188 * starts an ATA command. ATA commands are grouped into
4189 * classes called "protocols", and issuing each type of protocol
4190 * is slightly different.
4191 *
4192 * May be used as the qc_issue() entry in ata_port_operations.
4193 *
4194 * LOCKING:
4195 * spin_lock_irqsave(host_set lock)
4196 *
4197 * RETURNS:
4198 * Zero on success, AC_ERR_* mask on failure
4199 */
4200
4201 unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
4202 {
4203 struct ata_port *ap = qc->ap;
4204
4205 ata_dev_select(ap, qc->dev->devno, 1, 0);
4206
4207 switch (qc->tf.protocol) {
4208 case ATA_PROT_NODATA:
4209 ata_tf_to_host(ap, &qc->tf);
4210 break;
4211
4212 case ATA_PROT_DMA:
4213 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4214 ap->ops->bmdma_setup(qc); /* set up bmdma */
4215 ap->ops->bmdma_start(qc); /* initiate bmdma */
4216 break;
4217
4218 case ATA_PROT_PIO: /* load tf registers, initiate polling pio */
4219 ata_qc_set_polling(qc);
4220 ata_tf_to_host(ap, &qc->tf);
4221 ap->hsm_task_state = HSM_ST;
4222 ata_port_queue_task(ap, ata_pio_task, ap, 0);
4223 break;
4224
4225 case ATA_PROT_ATAPI:
4226 ata_qc_set_polling(qc);
4227 ata_tf_to_host(ap, &qc->tf);
4228 ata_port_queue_task(ap, atapi_packet_task, ap, 0);
4229 break;
4230
4231 case ATA_PROT_ATAPI_NODATA:
4232 ap->flags |= ATA_FLAG_NOINTR;
4233 ata_tf_to_host(ap, &qc->tf);
4234 ata_port_queue_task(ap, atapi_packet_task, ap, 0);
4235 break;
4236
4237 case ATA_PROT_ATAPI_DMA:
4238 ap->flags |= ATA_FLAG_NOINTR;
4239 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4240 ap->ops->bmdma_setup(qc); /* set up bmdma */
4241 ata_port_queue_task(ap, atapi_packet_task, ap, 0);
4242 break;
4243
4244 default:
4245 WARN_ON(1);
4246 return AC_ERR_SYSTEM;
4247 }
4248
4249 return 0;
4250 }
4251
4252 /**
4253 * ata_host_intr - Handle host interrupt for given (port, task)
4254 * @ap: Port on which interrupt arrived (possibly...)
4255 * @qc: Taskfile currently active in engine
4256 *
4257 * Handle host interrupt for given queued command. Currently,
4258 * only DMA interrupts are handled. All other commands are
4259 * handled via polling with interrupts disabled (nIEN bit).
4260 *
4261 * LOCKING:
4262 * spin_lock_irqsave(host_set lock)
4263 *
4264 * RETURNS:
4265 * One if interrupt was handled, zero if not (shared irq).
4266 */
4267
4268 inline unsigned int ata_host_intr (struct ata_port *ap,
4269 struct ata_queued_cmd *qc)
4270 {
4271 u8 status, host_stat;
4272
4273 switch (qc->tf.protocol) {
4274
4275 case ATA_PROT_DMA:
4276 case ATA_PROT_ATAPI_DMA:
4277 case ATA_PROT_ATAPI:
4278 /* check status of DMA engine */
4279 host_stat = ap->ops->bmdma_status(ap);
4280 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
4281
4282 /* if it's not our irq... */
4283 if (!(host_stat & ATA_DMA_INTR))
4284 goto idle_irq;
4285
4286 /* before we do anything else, clear DMA-Start bit */
4287 ap->ops->bmdma_stop(qc);
4288
4289 /* fall through */
4290
4291 case ATA_PROT_ATAPI_NODATA:
4292 case ATA_PROT_NODATA:
4293 /* check altstatus */
4294 status = ata_altstatus(ap);
4295 if (status & ATA_BUSY)
4296 goto idle_irq;
4297
4298 /* check main status, clearing INTRQ */
4299 status = ata_chk_status(ap);
4300 if (unlikely(status & ATA_BUSY))
4301 goto idle_irq;
4302 DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n",
4303 ap->id, qc->tf.protocol, status);
4304
4305 /* ack bmdma irq events */
4306 ap->ops->irq_clear(ap);
4307
4308 /* complete taskfile transaction */
4309 qc->err_mask |= ac_err_mask(status);
4310 ata_qc_complete(qc);
4311 break;
4312
4313 default:
4314 goto idle_irq;
4315 }
4316
4317 return 1; /* irq handled */
4318
4319 idle_irq:
4320 ap->stats.idle_irq++;
4321
4322 #ifdef ATA_IRQ_TRAP
4323 if ((ap->stats.idle_irq % 1000) == 0) {
4324 ata_irq_ack(ap, 0); /* debug trap */
4325 printk(KERN_WARNING "ata%d: irq trap\n", ap->id);
4326 return 1;
4327 }
4328 #endif
4329 return 0; /* irq not handled */
4330 }
4331
4332 /**
4333 * ata_interrupt - Default ATA host interrupt handler
4334 * @irq: irq line (unused)
4335 * @dev_instance: pointer to our ata_host_set information structure
4336 * @regs: unused
4337 *
4338 * Default interrupt handler for PCI IDE devices. Calls
4339 * ata_host_intr() for each port that is not disabled.
4340 *
4341 * LOCKING:
4342 * Obtains host_set lock during operation.
4343 *
4344 * RETURNS:
4345 * IRQ_NONE or IRQ_HANDLED.
4346 */
4347
4348 irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
4349 {
4350 struct ata_host_set *host_set = dev_instance;
4351 unsigned int i;
4352 unsigned int handled = 0;
4353 unsigned long flags;
4354
4355 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
4356 spin_lock_irqsave(&host_set->lock, flags);
4357
4358 for (i = 0; i < host_set->n_ports; i++) {
4359 struct ata_port *ap;
4360
4361 ap = host_set->ports[i];
4362 if (ap &&
4363 !(ap->flags & (ATA_FLAG_PORT_DISABLED | ATA_FLAG_NOINTR))) {
4364 struct ata_queued_cmd *qc;
4365
4366 qc = ata_qc_from_tag(ap, ap->active_tag);
4367 if (qc && (!(qc->tf.ctl & ATA_NIEN)) &&
4368 (qc->flags & ATA_QCFLAG_ACTIVE))
4369 handled |= ata_host_intr(ap, qc);
4370 }
4371 }
4372
4373 spin_unlock_irqrestore(&host_set->lock, flags);
4374
4375 return IRQ_RETVAL(handled);
4376 }
4377
4378
4379 /*
4380 * Execute a 'simple' command, that only consists of the opcode 'cmd' itself,
4381 * without filling any other registers
4382 */
4383 static int ata_do_simple_cmd(struct ata_port *ap, struct ata_device *dev,
4384 u8 cmd)
4385 {
4386 struct ata_taskfile tf;
4387 int err;
4388
4389 ata_tf_init(ap, &tf, dev->devno);
4390
4391 tf.command = cmd;
4392 tf.flags |= ATA_TFLAG_DEVICE;
4393 tf.protocol = ATA_PROT_NODATA;
4394
4395 err = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
4396 if (err)
4397 printk(KERN_ERR "%s: ata command failed: %d\n",
4398 __FUNCTION__, err);
4399
4400 return err;
4401 }
4402
4403 static int ata_flush_cache(struct ata_port *ap, struct ata_device *dev)
4404 {
4405 u8 cmd;
4406
4407 if (!ata_try_flush_cache(dev))
4408 return 0;
4409
4410 if (ata_id_has_flush_ext(dev->id))
4411 cmd = ATA_CMD_FLUSH_EXT;
4412 else
4413 cmd = ATA_CMD_FLUSH;
4414
4415 return ata_do_simple_cmd(ap, dev, cmd);
4416 }
4417
4418 static int ata_standby_drive(struct ata_port *ap, struct ata_device *dev)
4419 {
4420 return ata_do_simple_cmd(ap, dev, ATA_CMD_STANDBYNOW1);
4421 }
4422
4423 static int ata_start_drive(struct ata_port *ap, struct ata_device *dev)
4424 {
4425 return ata_do_simple_cmd(ap, dev, ATA_CMD_IDLEIMMEDIATE);
4426 }
4427
4428 /**
4429 * ata_device_resume - wakeup a previously suspended devices
4430 * @ap: port the device is connected to
4431 * @dev: the device to resume
4432 *
4433 * Kick the drive back into action, by sending it an idle immediate
4434 * command and making sure its transfer mode matches between drive
4435 * and host.
4436 *
4437 */
4438 int ata_device_resume(struct ata_port *ap, struct ata_device *dev)
4439 {
4440 if (ap->flags & ATA_FLAG_SUSPENDED) {
4441 struct ata_device *failed_dev;
4442 ap->flags &= ~ATA_FLAG_SUSPENDED;
4443 while (ata_set_mode(ap, &failed_dev))
4444 ata_dev_disable(ap, failed_dev);
4445 }
4446 if (!ata_dev_enabled(dev))
4447 return 0;
4448 if (dev->class == ATA_DEV_ATA)
4449 ata_start_drive(ap, dev);
4450
4451 return 0;
4452 }
4453
4454 /**
4455 * ata_device_suspend - prepare a device for suspend
4456 * @ap: port the device is connected to
4457 * @dev: the device to suspend
4458 *
4459 * Flush the cache on the drive, if appropriate, then issue a
4460 * standbynow command.
4461 */
4462 int ata_device_suspend(struct ata_port *ap, struct ata_device *dev, pm_message_t state)
4463 {
4464 if (!ata_dev_enabled(dev))
4465 return 0;
4466 if (dev->class == ATA_DEV_ATA)
4467 ata_flush_cache(ap, dev);
4468
4469 if (state.event != PM_EVENT_FREEZE)
4470 ata_standby_drive(ap, dev);
4471 ap->flags |= ATA_FLAG_SUSPENDED;
4472 return 0;
4473 }
4474
4475 /**
4476 * ata_port_start - Set port up for dma.
4477 * @ap: Port to initialize
4478 *
4479 * Called just after data structures for each port are
4480 * initialized. Allocates space for PRD table.
4481 *
4482 * May be used as the port_start() entry in ata_port_operations.
4483 *
4484 * LOCKING:
4485 * Inherited from caller.
4486 */
4487
4488 int ata_port_start (struct ata_port *ap)
4489 {
4490 struct device *dev = ap->dev;
4491 int rc;
4492
4493 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
4494 if (!ap->prd)
4495 return -ENOMEM;
4496
4497 rc = ata_pad_alloc(ap, dev);
4498 if (rc) {
4499 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
4500 return rc;
4501 }
4502
4503 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
4504
4505 return 0;
4506 }
4507
4508
4509 /**
4510 * ata_port_stop - Undo ata_port_start()
4511 * @ap: Port to shut down
4512 *
4513 * Frees the PRD table.
4514 *
4515 * May be used as the port_stop() entry in ata_port_operations.
4516 *
4517 * LOCKING:
4518 * Inherited from caller.
4519 */
4520
4521 void ata_port_stop (struct ata_port *ap)
4522 {
4523 struct device *dev = ap->dev;
4524
4525 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
4526 ata_pad_free(ap, dev);
4527 }
4528
4529 void ata_host_stop (struct ata_host_set *host_set)
4530 {
4531 if (host_set->mmio_base)
4532 iounmap(host_set->mmio_base);
4533 }
4534
4535
4536 /**
4537 * ata_host_remove - Unregister SCSI host structure with upper layers
4538 * @ap: Port to unregister
4539 * @do_unregister: 1 if we fully unregister, 0 to just stop the port
4540 *
4541 * LOCKING:
4542 * Inherited from caller.
4543 */
4544
4545 static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
4546 {
4547 struct Scsi_Host *sh = ap->host;
4548
4549 DPRINTK("ENTER\n");
4550
4551 if (do_unregister)
4552 scsi_remove_host(sh);
4553
4554 ap->ops->port_stop(ap);
4555 }
4556
4557 /**
4558 * ata_host_init - Initialize an ata_port structure
4559 * @ap: Structure to initialize
4560 * @host: associated SCSI mid-layer structure
4561 * @host_set: Collection of hosts to which @ap belongs
4562 * @ent: Probe information provided by low-level driver
4563 * @port_no: Port number associated with this ata_port
4564 *
4565 * Initialize a new ata_port structure, and its associated
4566 * scsi_host.
4567 *
4568 * LOCKING:
4569 * Inherited from caller.
4570 */
4571
4572 static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
4573 struct ata_host_set *host_set,
4574 const struct ata_probe_ent *ent, unsigned int port_no)
4575 {
4576 unsigned int i;
4577
4578 host->max_id = 16;
4579 host->max_lun = 1;
4580 host->max_channel = 1;
4581 host->unique_id = ata_unique_id++;
4582 host->max_cmd_len = 12;
4583
4584 ap->flags = ATA_FLAG_PORT_DISABLED;
4585 ap->id = host->unique_id;
4586 ap->host = host;
4587 ap->ctl = ATA_DEVCTL_OBS;
4588 ap->host_set = host_set;
4589 ap->dev = ent->dev;
4590 ap->port_no = port_no;
4591 ap->hard_port_no =
4592 ent->legacy_mode ? ent->hard_port_no : port_no;
4593 ap->pio_mask = ent->pio_mask;
4594 ap->mwdma_mask = ent->mwdma_mask;
4595 ap->udma_mask = ent->udma_mask;
4596 ap->flags |= ent->host_flags;
4597 ap->ops = ent->port_ops;
4598 ap->cbl = ATA_CBL_NONE;
4599 ap->sata_spd_limit = UINT_MAX;
4600 ap->active_tag = ATA_TAG_POISON;
4601 ap->last_ctl = 0xFF;
4602
4603 INIT_WORK(&ap->port_task, NULL, NULL);
4604 INIT_LIST_HEAD(&ap->eh_done_q);
4605
4606 for (i = 0; i < ATA_MAX_DEVICES; i++) {
4607 struct ata_device *dev = &ap->device[i];
4608 dev->devno = i;
4609 dev->pio_mask = UINT_MAX;
4610 dev->mwdma_mask = UINT_MAX;
4611 dev->udma_mask = UINT_MAX;
4612 }
4613
4614 #ifdef ATA_IRQ_TRAP
4615 ap->stats.unhandled_irq = 1;
4616 ap->stats.idle_irq = 1;
4617 #endif
4618
4619 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
4620 }
4621
4622 /**
4623 * ata_host_add - Attach low-level ATA driver to system
4624 * @ent: Information provided by low-level driver
4625 * @host_set: Collections of ports to which we add
4626 * @port_no: Port number associated with this host
4627 *
4628 * Attach low-level ATA driver to system.
4629 *
4630 * LOCKING:
4631 * PCI/etc. bus probe sem.
4632 *
4633 * RETURNS:
4634 * New ata_port on success, for NULL on error.
4635 */
4636
4637 static struct ata_port * ata_host_add(const struct ata_probe_ent *ent,
4638 struct ata_host_set *host_set,
4639 unsigned int port_no)
4640 {
4641 struct Scsi_Host *host;
4642 struct ata_port *ap;
4643 int rc;
4644
4645 DPRINTK("ENTER\n");
4646
4647 if (!ent->port_ops->probe_reset &&
4648 !(ent->host_flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST))) {
4649 printk(KERN_ERR "ata%u: no reset mechanism available\n",
4650 port_no);
4651 return NULL;
4652 }
4653
4654 host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
4655 if (!host)
4656 return NULL;
4657
4658 host->transportt = &ata_scsi_transport_template;
4659
4660 ap = (struct ata_port *) &host->hostdata[0];
4661
4662 ata_host_init(ap, host, host_set, ent, port_no);
4663
4664 rc = ap->ops->port_start(ap);
4665 if (rc)
4666 goto err_out;
4667
4668 return ap;
4669
4670 err_out:
4671 scsi_host_put(host);
4672 return NULL;
4673 }
4674
4675 /**
4676 * ata_device_add - Register hardware device with ATA and SCSI layers
4677 * @ent: Probe information describing hardware device to be registered
4678 *
4679 * This function processes the information provided in the probe
4680 * information struct @ent, allocates the necessary ATA and SCSI
4681 * host information structures, initializes them, and registers
4682 * everything with requisite kernel subsystems.
4683 *
4684 * This function requests irqs, probes the ATA bus, and probes
4685 * the SCSI bus.
4686 *
4687 * LOCKING:
4688 * PCI/etc. bus probe sem.
4689 *
4690 * RETURNS:
4691 * Number of ports registered. Zero on error (no ports registered).
4692 */
4693
4694 int ata_device_add(const struct ata_probe_ent *ent)
4695 {
4696 unsigned int count = 0, i;
4697 struct device *dev = ent->dev;
4698 struct ata_host_set *host_set;
4699
4700 DPRINTK("ENTER\n");
4701 /* alloc a container for our list of ATA ports (buses) */
4702 host_set = kzalloc(sizeof(struct ata_host_set) +
4703 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
4704 if (!host_set)
4705 return 0;
4706 spin_lock_init(&host_set->lock);
4707
4708 host_set->dev = dev;
4709 host_set->n_ports = ent->n_ports;
4710 host_set->irq = ent->irq;
4711 host_set->mmio_base = ent->mmio_base;
4712 host_set->private_data = ent->private_data;
4713 host_set->ops = ent->port_ops;
4714 host_set->flags = ent->host_set_flags;
4715
4716 /* register each port bound to this device */
4717 for (i = 0; i < ent->n_ports; i++) {
4718 struct ata_port *ap;
4719 unsigned long xfer_mode_mask;
4720
4721 ap = ata_host_add(ent, host_set, i);
4722 if (!ap)
4723 goto err_out;
4724
4725 host_set->ports[i] = ap;
4726 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
4727 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
4728 (ap->pio_mask << ATA_SHIFT_PIO);
4729
4730 /* print per-port info to dmesg */
4731 printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX "
4732 "bmdma 0x%lX irq %lu\n",
4733 ap->id,
4734 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
4735 ata_mode_string(xfer_mode_mask),
4736 ap->ioaddr.cmd_addr,
4737 ap->ioaddr.ctl_addr,
4738 ap->ioaddr.bmdma_addr,
4739 ent->irq);
4740
4741 ata_chk_status(ap);
4742 host_set->ops->irq_clear(ap);
4743 count++;
4744 }
4745
4746 if (!count)
4747 goto err_free_ret;
4748
4749 /* obtain irq, that is shared between channels */
4750 if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
4751 DRV_NAME, host_set))
4752 goto err_out;
4753
4754 /* perform each probe synchronously */
4755 DPRINTK("probe begin\n");
4756 for (i = 0; i < count; i++) {
4757 struct ata_port *ap;
4758 int rc;
4759
4760 ap = host_set->ports[i];
4761
4762 DPRINTK("ata%u: bus probe begin\n", ap->id);
4763 rc = ata_bus_probe(ap);
4764 DPRINTK("ata%u: bus probe end\n", ap->id);
4765
4766 if (rc) {
4767 /* FIXME: do something useful here?
4768 * Current libata behavior will
4769 * tear down everything when
4770 * the module is removed
4771 * or the h/w is unplugged.
4772 */
4773 }
4774
4775 rc = scsi_add_host(ap->host, dev);
4776 if (rc) {
4777 printk(KERN_ERR "ata%u: scsi_add_host failed\n",
4778 ap->id);
4779 /* FIXME: do something useful here */
4780 /* FIXME: handle unconditional calls to
4781 * scsi_scan_host and ata_host_remove, below,
4782 * at the very least
4783 */
4784 }
4785 }
4786
4787 /* probes are done, now scan each port's disk(s) */
4788 DPRINTK("host probe begin\n");
4789 for (i = 0; i < count; i++) {
4790 struct ata_port *ap = host_set->ports[i];
4791
4792 ata_scsi_scan_host(ap);
4793 }
4794
4795 dev_set_drvdata(dev, host_set);
4796
4797 VPRINTK("EXIT, returning %u\n", ent->n_ports);
4798 return ent->n_ports; /* success */
4799
4800 err_out:
4801 for (i = 0; i < count; i++) {
4802 ata_host_remove(host_set->ports[i], 1);
4803 scsi_host_put(host_set->ports[i]->host);
4804 }
4805 err_free_ret:
4806 kfree(host_set);
4807 VPRINTK("EXIT, returning 0\n");
4808 return 0;
4809 }
4810
4811 /**
4812 * ata_host_set_remove - PCI layer callback for device removal
4813 * @host_set: ATA host set that was removed
4814 *
4815 * Unregister all objects associated with this host set. Free those
4816 * objects.
4817 *
4818 * LOCKING:
4819 * Inherited from calling layer (may sleep).
4820 */
4821
4822 void ata_host_set_remove(struct ata_host_set *host_set)
4823 {
4824 struct ata_port *ap;
4825 unsigned int i;
4826
4827 for (i = 0; i < host_set->n_ports; i++) {
4828 ap = host_set->ports[i];
4829 scsi_remove_host(ap->host);
4830 }
4831
4832 free_irq(host_set->irq, host_set);
4833
4834 for (i = 0; i < host_set->n_ports; i++) {
4835 ap = host_set->ports[i];
4836
4837 ata_scsi_release(ap->host);
4838
4839 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
4840 struct ata_ioports *ioaddr = &ap->ioaddr;
4841
4842 if (ioaddr->cmd_addr == 0x1f0)
4843 release_region(0x1f0, 8);
4844 else if (ioaddr->cmd_addr == 0x170)
4845 release_region(0x170, 8);
4846 }
4847
4848 scsi_host_put(ap->host);
4849 }
4850
4851 if (host_set->ops->host_stop)
4852 host_set->ops->host_stop(host_set);
4853
4854 kfree(host_set);
4855 }
4856
4857 /**
4858 * ata_scsi_release - SCSI layer callback hook for host unload
4859 * @host: libata host to be unloaded
4860 *
4861 * Performs all duties necessary to shut down a libata port...
4862 * Kill port kthread, disable port, and release resources.
4863 *
4864 * LOCKING:
4865 * Inherited from SCSI layer.
4866 *
4867 * RETURNS:
4868 * One.
4869 */
4870
4871 int ata_scsi_release(struct Scsi_Host *host)
4872 {
4873 struct ata_port *ap = (struct ata_port *) &host->hostdata[0];
4874 int i;
4875
4876 DPRINTK("ENTER\n");
4877
4878 ap->ops->port_disable(ap);
4879 ata_host_remove(ap, 0);
4880 for (i = 0; i < ATA_MAX_DEVICES; i++)
4881 kfree(ap->device[i].id);
4882
4883 DPRINTK("EXIT\n");
4884 return 1;
4885 }
4886
4887 /**
4888 * ata_std_ports - initialize ioaddr with standard port offsets.
4889 * @ioaddr: IO address structure to be initialized
4890 *
4891 * Utility function which initializes data_addr, error_addr,
4892 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
4893 * device_addr, status_addr, and command_addr to standard offsets
4894 * relative to cmd_addr.
4895 *
4896 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
4897 */
4898
4899 void ata_std_ports(struct ata_ioports *ioaddr)
4900 {
4901 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
4902 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
4903 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
4904 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
4905 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
4906 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
4907 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
4908 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
4909 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
4910 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
4911 }
4912
4913
4914 #ifdef CONFIG_PCI
4915
4916 void ata_pci_host_stop (struct ata_host_set *host_set)
4917 {
4918 struct pci_dev *pdev = to_pci_dev(host_set->dev);
4919
4920 pci_iounmap(pdev, host_set->mmio_base);
4921 }
4922
4923 /**
4924 * ata_pci_remove_one - PCI layer callback for device removal
4925 * @pdev: PCI device that was removed
4926 *
4927 * PCI layer indicates to libata via this hook that
4928 * hot-unplug or module unload event has occurred.
4929 * Handle this by unregistering all objects associated
4930 * with this PCI device. Free those objects. Then finally
4931 * release PCI resources and disable device.
4932 *
4933 * LOCKING:
4934 * Inherited from PCI layer (may sleep).
4935 */
4936
4937 void ata_pci_remove_one (struct pci_dev *pdev)
4938 {
4939 struct device *dev = pci_dev_to_dev(pdev);
4940 struct ata_host_set *host_set = dev_get_drvdata(dev);
4941
4942 ata_host_set_remove(host_set);
4943 pci_release_regions(pdev);
4944 pci_disable_device(pdev);
4945 dev_set_drvdata(dev, NULL);
4946 }
4947
4948 /* move to PCI subsystem */
4949 int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
4950 {
4951 unsigned long tmp = 0;
4952
4953 switch (bits->width) {
4954 case 1: {
4955 u8 tmp8 = 0;
4956 pci_read_config_byte(pdev, bits->reg, &tmp8);
4957 tmp = tmp8;
4958 break;
4959 }
4960 case 2: {
4961 u16 tmp16 = 0;
4962 pci_read_config_word(pdev, bits->reg, &tmp16);
4963 tmp = tmp16;
4964 break;
4965 }
4966 case 4: {
4967 u32 tmp32 = 0;
4968 pci_read_config_dword(pdev, bits->reg, &tmp32);
4969 tmp = tmp32;
4970 break;
4971 }
4972
4973 default:
4974 return -EINVAL;
4975 }
4976
4977 tmp &= bits->mask;
4978
4979 return (tmp == bits->val) ? 1 : 0;
4980 }
4981
4982 int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state)
4983 {
4984 pci_save_state(pdev);
4985 pci_disable_device(pdev);
4986 pci_set_power_state(pdev, PCI_D3hot);
4987 return 0;
4988 }
4989
4990 int ata_pci_device_resume(struct pci_dev *pdev)
4991 {
4992 pci_set_power_state(pdev, PCI_D0);
4993 pci_restore_state(pdev);
4994 pci_enable_device(pdev);
4995 pci_set_master(pdev);
4996 return 0;
4997 }
4998 #endif /* CONFIG_PCI */
4999
5000
5001 static int __init ata_init(void)
5002 {
5003 ata_wq = create_workqueue("ata");
5004 if (!ata_wq)
5005 return -ENOMEM;
5006
5007 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
5008 return 0;
5009 }
5010
5011 static void __exit ata_exit(void)
5012 {
5013 destroy_workqueue(ata_wq);
5014 }
5015
5016 module_init(ata_init);
5017 module_exit(ata_exit);
5018
5019 static unsigned long ratelimit_time;
5020 static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED;
5021
5022 int ata_ratelimit(void)
5023 {
5024 int rc;
5025 unsigned long flags;
5026
5027 spin_lock_irqsave(&ata_ratelimit_lock, flags);
5028
5029 if (time_after(jiffies, ratelimit_time)) {
5030 rc = 1;
5031 ratelimit_time = jiffies + (HZ/5);
5032 } else
5033 rc = 0;
5034
5035 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
5036
5037 return rc;
5038 }
5039
5040 /*
5041 * libata is essentially a library of internal helper functions for
5042 * low-level ATA host controller drivers. As such, the API/ABI is
5043 * likely to change as new drivers are added and updated.
5044 * Do not depend on ABI/API stability.
5045 */
5046
5047 EXPORT_SYMBOL_GPL(ata_std_bios_param);
5048 EXPORT_SYMBOL_GPL(ata_std_ports);
5049 EXPORT_SYMBOL_GPL(ata_device_add);
5050 EXPORT_SYMBOL_GPL(ata_host_set_remove);
5051 EXPORT_SYMBOL_GPL(ata_sg_init);
5052 EXPORT_SYMBOL_GPL(ata_sg_init_one);
5053 EXPORT_SYMBOL_GPL(__ata_qc_complete);
5054 EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
5055 EXPORT_SYMBOL_GPL(ata_eng_timeout);
5056 EXPORT_SYMBOL_GPL(ata_tf_load);
5057 EXPORT_SYMBOL_GPL(ata_tf_read);
5058 EXPORT_SYMBOL_GPL(ata_noop_dev_select);
5059 EXPORT_SYMBOL_GPL(ata_std_dev_select);
5060 EXPORT_SYMBOL_GPL(ata_tf_to_fis);
5061 EXPORT_SYMBOL_GPL(ata_tf_from_fis);
5062 EXPORT_SYMBOL_GPL(ata_check_status);
5063 EXPORT_SYMBOL_GPL(ata_altstatus);
5064 EXPORT_SYMBOL_GPL(ata_exec_command);
5065 EXPORT_SYMBOL_GPL(ata_port_start);
5066 EXPORT_SYMBOL_GPL(ata_port_stop);
5067 EXPORT_SYMBOL_GPL(ata_host_stop);
5068 EXPORT_SYMBOL_GPL(ata_interrupt);
5069 EXPORT_SYMBOL_GPL(ata_qc_prep);
5070 EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
5071 EXPORT_SYMBOL_GPL(ata_bmdma_setup);
5072 EXPORT_SYMBOL_GPL(ata_bmdma_start);
5073 EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
5074 EXPORT_SYMBOL_GPL(ata_bmdma_status);
5075 EXPORT_SYMBOL_GPL(ata_bmdma_stop);
5076 EXPORT_SYMBOL_GPL(ata_port_probe);
5077 EXPORT_SYMBOL_GPL(sata_phy_reset);
5078 EXPORT_SYMBOL_GPL(__sata_phy_reset);
5079 EXPORT_SYMBOL_GPL(ata_bus_reset);
5080 EXPORT_SYMBOL_GPL(ata_std_probeinit);
5081 EXPORT_SYMBOL_GPL(ata_std_softreset);
5082 EXPORT_SYMBOL_GPL(sata_std_hardreset);
5083 EXPORT_SYMBOL_GPL(ata_std_postreset);
5084 EXPORT_SYMBOL_GPL(ata_std_probe_reset);
5085 EXPORT_SYMBOL_GPL(ata_drive_probe_reset);
5086 EXPORT_SYMBOL_GPL(ata_dev_revalidate);
5087 EXPORT_SYMBOL_GPL(ata_dev_classify);
5088 EXPORT_SYMBOL_GPL(ata_dev_pair);
5089 EXPORT_SYMBOL_GPL(ata_port_disable);
5090 EXPORT_SYMBOL_GPL(ata_ratelimit);
5091 EXPORT_SYMBOL_GPL(ata_busy_sleep);
5092 EXPORT_SYMBOL_GPL(ata_port_queue_task);
5093 EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
5094 EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
5095 EXPORT_SYMBOL_GPL(ata_scsi_error);
5096 EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
5097 EXPORT_SYMBOL_GPL(ata_scsi_release);
5098 EXPORT_SYMBOL_GPL(ata_host_intr);
5099 EXPORT_SYMBOL_GPL(ata_id_string);
5100 EXPORT_SYMBOL_GPL(ata_id_c_string);
5101 EXPORT_SYMBOL_GPL(ata_scsi_simulate);
5102 EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
5103 EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
5104
5105 EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
5106 EXPORT_SYMBOL_GPL(ata_timing_compute);
5107 EXPORT_SYMBOL_GPL(ata_timing_merge);
5108
5109 #ifdef CONFIG_PCI
5110 EXPORT_SYMBOL_GPL(pci_test_config_bits);
5111 EXPORT_SYMBOL_GPL(ata_pci_host_stop);
5112 EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
5113 EXPORT_SYMBOL_GPL(ata_pci_init_one);
5114 EXPORT_SYMBOL_GPL(ata_pci_remove_one);
5115 EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
5116 EXPORT_SYMBOL_GPL(ata_pci_device_resume);
5117 EXPORT_SYMBOL_GPL(ata_pci_default_filter);
5118 EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);
5119 #endif /* CONFIG_PCI */
5120
5121 EXPORT_SYMBOL_GPL(ata_device_suspend);
5122 EXPORT_SYMBOL_GPL(ata_device_resume);
5123 EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
5124 EXPORT_SYMBOL_GPL(ata_scsi_device_resume);
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