[PATCH] libata: remove postreset handling from ata_do_reset()
[deliverable/linux.git] / drivers / scsi / libata-core.c
1 /*
2 * libata-core.c - helper library for ATA
3 *
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
32 *
33 */
34
35 #include <linux/config.h>
36 #include <linux/kernel.h>
37 #include <linux/module.h>
38 #include <linux/pci.h>
39 #include <linux/init.h>
40 #include <linux/list.h>
41 #include <linux/mm.h>
42 #include <linux/highmem.h>
43 #include <linux/spinlock.h>
44 #include <linux/blkdev.h>
45 #include <linux/delay.h>
46 #include <linux/timer.h>
47 #include <linux/interrupt.h>
48 #include <linux/completion.h>
49 #include <linux/suspend.h>
50 #include <linux/workqueue.h>
51 #include <linux/jiffies.h>
52 #include <linux/scatterlist.h>
53 #include <scsi/scsi.h>
54 #include "scsi_priv.h"
55 #include <scsi/scsi_cmnd.h>
56 #include <scsi/scsi_host.h>
57 #include <linux/libata.h>
58 #include <asm/io.h>
59 #include <asm/semaphore.h>
60 #include <asm/byteorder.h>
61
62 #include "libata.h"
63
64 static unsigned int ata_dev_init_params(struct ata_port *ap,
65 struct ata_device *dev,
66 u16 heads,
67 u16 sectors);
68 static unsigned int ata_dev_set_xfermode(struct ata_port *ap,
69 struct ata_device *dev);
70 static void ata_dev_xfermask(struct ata_port *ap, struct ata_device *dev);
71
72 static unsigned int ata_unique_id = 1;
73 static struct workqueue_struct *ata_wq;
74
75 int atapi_enabled = 1;
76 module_param(atapi_enabled, int, 0444);
77 MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
78
79 int atapi_dmadir = 0;
80 module_param(atapi_dmadir, int, 0444);
81 MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off, 1=on)");
82
83 int libata_fua = 0;
84 module_param_named(fua, libata_fua, int, 0444);
85 MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
86
87 MODULE_AUTHOR("Jeff Garzik");
88 MODULE_DESCRIPTION("Library module for ATA devices");
89 MODULE_LICENSE("GPL");
90 MODULE_VERSION(DRV_VERSION);
91
92
93 /**
94 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
95 * @tf: Taskfile to convert
96 * @fis: Buffer into which data will output
97 * @pmp: Port multiplier port
98 *
99 * Converts a standard ATA taskfile to a Serial ATA
100 * FIS structure (Register - Host to Device).
101 *
102 * LOCKING:
103 * Inherited from caller.
104 */
105
106 void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
107 {
108 fis[0] = 0x27; /* Register - Host to Device FIS */
109 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
110 bit 7 indicates Command FIS */
111 fis[2] = tf->command;
112 fis[3] = tf->feature;
113
114 fis[4] = tf->lbal;
115 fis[5] = tf->lbam;
116 fis[6] = tf->lbah;
117 fis[7] = tf->device;
118
119 fis[8] = tf->hob_lbal;
120 fis[9] = tf->hob_lbam;
121 fis[10] = tf->hob_lbah;
122 fis[11] = tf->hob_feature;
123
124 fis[12] = tf->nsect;
125 fis[13] = tf->hob_nsect;
126 fis[14] = 0;
127 fis[15] = tf->ctl;
128
129 fis[16] = 0;
130 fis[17] = 0;
131 fis[18] = 0;
132 fis[19] = 0;
133 }
134
135 /**
136 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
137 * @fis: Buffer from which data will be input
138 * @tf: Taskfile to output
139 *
140 * Converts a serial ATA FIS structure to a standard ATA taskfile.
141 *
142 * LOCKING:
143 * Inherited from caller.
144 */
145
146 void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
147 {
148 tf->command = fis[2]; /* status */
149 tf->feature = fis[3]; /* error */
150
151 tf->lbal = fis[4];
152 tf->lbam = fis[5];
153 tf->lbah = fis[6];
154 tf->device = fis[7];
155
156 tf->hob_lbal = fis[8];
157 tf->hob_lbam = fis[9];
158 tf->hob_lbah = fis[10];
159
160 tf->nsect = fis[12];
161 tf->hob_nsect = fis[13];
162 }
163
164 static const u8 ata_rw_cmds[] = {
165 /* pio multi */
166 ATA_CMD_READ_MULTI,
167 ATA_CMD_WRITE_MULTI,
168 ATA_CMD_READ_MULTI_EXT,
169 ATA_CMD_WRITE_MULTI_EXT,
170 0,
171 0,
172 0,
173 ATA_CMD_WRITE_MULTI_FUA_EXT,
174 /* pio */
175 ATA_CMD_PIO_READ,
176 ATA_CMD_PIO_WRITE,
177 ATA_CMD_PIO_READ_EXT,
178 ATA_CMD_PIO_WRITE_EXT,
179 0,
180 0,
181 0,
182 0,
183 /* dma */
184 ATA_CMD_READ,
185 ATA_CMD_WRITE,
186 ATA_CMD_READ_EXT,
187 ATA_CMD_WRITE_EXT,
188 0,
189 0,
190 0,
191 ATA_CMD_WRITE_FUA_EXT
192 };
193
194 /**
195 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
196 * @qc: command to examine and configure
197 *
198 * Examine the device configuration and tf->flags to calculate
199 * the proper read/write commands and protocol to use.
200 *
201 * LOCKING:
202 * caller.
203 */
204 int ata_rwcmd_protocol(struct ata_queued_cmd *qc)
205 {
206 struct ata_taskfile *tf = &qc->tf;
207 struct ata_device *dev = qc->dev;
208 u8 cmd;
209
210 int index, fua, lba48, write;
211
212 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
213 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
214 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
215
216 if (dev->flags & ATA_DFLAG_PIO) {
217 tf->protocol = ATA_PROT_PIO;
218 index = dev->multi_count ? 0 : 8;
219 } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) {
220 /* Unable to use DMA due to host limitation */
221 tf->protocol = ATA_PROT_PIO;
222 index = dev->multi_count ? 0 : 8;
223 } else {
224 tf->protocol = ATA_PROT_DMA;
225 index = 16;
226 }
227
228 cmd = ata_rw_cmds[index + fua + lba48 + write];
229 if (cmd) {
230 tf->command = cmd;
231 return 0;
232 }
233 return -1;
234 }
235
236 /**
237 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
238 * @pio_mask: pio_mask
239 * @mwdma_mask: mwdma_mask
240 * @udma_mask: udma_mask
241 *
242 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
243 * unsigned int xfer_mask.
244 *
245 * LOCKING:
246 * None.
247 *
248 * RETURNS:
249 * Packed xfer_mask.
250 */
251 static unsigned int ata_pack_xfermask(unsigned int pio_mask,
252 unsigned int mwdma_mask,
253 unsigned int udma_mask)
254 {
255 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
256 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
257 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
258 }
259
260 /**
261 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
262 * @xfer_mask: xfer_mask to unpack
263 * @pio_mask: resulting pio_mask
264 * @mwdma_mask: resulting mwdma_mask
265 * @udma_mask: resulting udma_mask
266 *
267 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
268 * Any NULL distination masks will be ignored.
269 */
270 static void ata_unpack_xfermask(unsigned int xfer_mask,
271 unsigned int *pio_mask,
272 unsigned int *mwdma_mask,
273 unsigned int *udma_mask)
274 {
275 if (pio_mask)
276 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
277 if (mwdma_mask)
278 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
279 if (udma_mask)
280 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
281 }
282
283 static const struct ata_xfer_ent {
284 int shift, bits;
285 u8 base;
286 } ata_xfer_tbl[] = {
287 { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
288 { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
289 { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
290 { -1, },
291 };
292
293 /**
294 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
295 * @xfer_mask: xfer_mask of interest
296 *
297 * Return matching XFER_* value for @xfer_mask. Only the highest
298 * bit of @xfer_mask is considered.
299 *
300 * LOCKING:
301 * None.
302 *
303 * RETURNS:
304 * Matching XFER_* value, 0 if no match found.
305 */
306 static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
307 {
308 int highbit = fls(xfer_mask) - 1;
309 const struct ata_xfer_ent *ent;
310
311 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
312 if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
313 return ent->base + highbit - ent->shift;
314 return 0;
315 }
316
317 /**
318 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
319 * @xfer_mode: XFER_* of interest
320 *
321 * Return matching xfer_mask for @xfer_mode.
322 *
323 * LOCKING:
324 * None.
325 *
326 * RETURNS:
327 * Matching xfer_mask, 0 if no match found.
328 */
329 static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
330 {
331 const struct ata_xfer_ent *ent;
332
333 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
334 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
335 return 1 << (ent->shift + xfer_mode - ent->base);
336 return 0;
337 }
338
339 /**
340 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
341 * @xfer_mode: XFER_* of interest
342 *
343 * Return matching xfer_shift for @xfer_mode.
344 *
345 * LOCKING:
346 * None.
347 *
348 * RETURNS:
349 * Matching xfer_shift, -1 if no match found.
350 */
351 static int ata_xfer_mode2shift(unsigned int xfer_mode)
352 {
353 const struct ata_xfer_ent *ent;
354
355 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
356 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
357 return ent->shift;
358 return -1;
359 }
360
361 /**
362 * ata_mode_string - convert xfer_mask to string
363 * @xfer_mask: mask of bits supported; only highest bit counts.
364 *
365 * Determine string which represents the highest speed
366 * (highest bit in @modemask).
367 *
368 * LOCKING:
369 * None.
370 *
371 * RETURNS:
372 * Constant C string representing highest speed listed in
373 * @mode_mask, or the constant C string "<n/a>".
374 */
375 static const char *ata_mode_string(unsigned int xfer_mask)
376 {
377 static const char * const xfer_mode_str[] = {
378 "PIO0",
379 "PIO1",
380 "PIO2",
381 "PIO3",
382 "PIO4",
383 "MWDMA0",
384 "MWDMA1",
385 "MWDMA2",
386 "UDMA/16",
387 "UDMA/25",
388 "UDMA/33",
389 "UDMA/44",
390 "UDMA/66",
391 "UDMA/100",
392 "UDMA/133",
393 "UDMA7",
394 };
395 int highbit;
396
397 highbit = fls(xfer_mask) - 1;
398 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
399 return xfer_mode_str[highbit];
400 return "<n/a>";
401 }
402
403 static const char *sata_spd_string(unsigned int spd)
404 {
405 static const char * const spd_str[] = {
406 "1.5 Gbps",
407 "3.0 Gbps",
408 };
409
410 if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
411 return "<unknown>";
412 return spd_str[spd - 1];
413 }
414
415 void ata_dev_disable(struct ata_port *ap, struct ata_device *dev)
416 {
417 if (ata_dev_enabled(dev)) {
418 printk(KERN_WARNING "ata%u: dev %u disabled\n",
419 ap->id, dev->devno);
420 dev->class++;
421 }
422 }
423
424 /**
425 * ata_pio_devchk - PATA device presence detection
426 * @ap: ATA channel to examine
427 * @device: Device to examine (starting at zero)
428 *
429 * This technique was originally described in
430 * Hale Landis's ATADRVR (www.ata-atapi.com), and
431 * later found its way into the ATA/ATAPI spec.
432 *
433 * Write a pattern to the ATA shadow registers,
434 * and if a device is present, it will respond by
435 * correctly storing and echoing back the
436 * ATA shadow register contents.
437 *
438 * LOCKING:
439 * caller.
440 */
441
442 static unsigned int ata_pio_devchk(struct ata_port *ap,
443 unsigned int device)
444 {
445 struct ata_ioports *ioaddr = &ap->ioaddr;
446 u8 nsect, lbal;
447
448 ap->ops->dev_select(ap, device);
449
450 outb(0x55, ioaddr->nsect_addr);
451 outb(0xaa, ioaddr->lbal_addr);
452
453 outb(0xaa, ioaddr->nsect_addr);
454 outb(0x55, ioaddr->lbal_addr);
455
456 outb(0x55, ioaddr->nsect_addr);
457 outb(0xaa, ioaddr->lbal_addr);
458
459 nsect = inb(ioaddr->nsect_addr);
460 lbal = inb(ioaddr->lbal_addr);
461
462 if ((nsect == 0x55) && (lbal == 0xaa))
463 return 1; /* we found a device */
464
465 return 0; /* nothing found */
466 }
467
468 /**
469 * ata_mmio_devchk - PATA device presence detection
470 * @ap: ATA channel to examine
471 * @device: Device to examine (starting at zero)
472 *
473 * This technique was originally described in
474 * Hale Landis's ATADRVR (www.ata-atapi.com), and
475 * later found its way into the ATA/ATAPI spec.
476 *
477 * Write a pattern to the ATA shadow registers,
478 * and if a device is present, it will respond by
479 * correctly storing and echoing back the
480 * ATA shadow register contents.
481 *
482 * LOCKING:
483 * caller.
484 */
485
486 static unsigned int ata_mmio_devchk(struct ata_port *ap,
487 unsigned int device)
488 {
489 struct ata_ioports *ioaddr = &ap->ioaddr;
490 u8 nsect, lbal;
491
492 ap->ops->dev_select(ap, device);
493
494 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
495 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
496
497 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
498 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
499
500 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
501 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
502
503 nsect = readb((void __iomem *) ioaddr->nsect_addr);
504 lbal = readb((void __iomem *) ioaddr->lbal_addr);
505
506 if ((nsect == 0x55) && (lbal == 0xaa))
507 return 1; /* we found a device */
508
509 return 0; /* nothing found */
510 }
511
512 /**
513 * ata_devchk - PATA device presence detection
514 * @ap: ATA channel to examine
515 * @device: Device to examine (starting at zero)
516 *
517 * Dispatch ATA device presence detection, depending
518 * on whether we are using PIO or MMIO to talk to the
519 * ATA shadow registers.
520 *
521 * LOCKING:
522 * caller.
523 */
524
525 static unsigned int ata_devchk(struct ata_port *ap,
526 unsigned int device)
527 {
528 if (ap->flags & ATA_FLAG_MMIO)
529 return ata_mmio_devchk(ap, device);
530 return ata_pio_devchk(ap, device);
531 }
532
533 /**
534 * ata_dev_classify - determine device type based on ATA-spec signature
535 * @tf: ATA taskfile register set for device to be identified
536 *
537 * Determine from taskfile register contents whether a device is
538 * ATA or ATAPI, as per "Signature and persistence" section
539 * of ATA/PI spec (volume 1, sect 5.14).
540 *
541 * LOCKING:
542 * None.
543 *
544 * RETURNS:
545 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
546 * the event of failure.
547 */
548
549 unsigned int ata_dev_classify(const struct ata_taskfile *tf)
550 {
551 /* Apple's open source Darwin code hints that some devices only
552 * put a proper signature into the LBA mid/high registers,
553 * So, we only check those. It's sufficient for uniqueness.
554 */
555
556 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
557 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
558 DPRINTK("found ATA device by sig\n");
559 return ATA_DEV_ATA;
560 }
561
562 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
563 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
564 DPRINTK("found ATAPI device by sig\n");
565 return ATA_DEV_ATAPI;
566 }
567
568 DPRINTK("unknown device\n");
569 return ATA_DEV_UNKNOWN;
570 }
571
572 /**
573 * ata_dev_try_classify - Parse returned ATA device signature
574 * @ap: ATA channel to examine
575 * @device: Device to examine (starting at zero)
576 * @r_err: Value of error register on completion
577 *
578 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
579 * an ATA/ATAPI-defined set of values is placed in the ATA
580 * shadow registers, indicating the results of device detection
581 * and diagnostics.
582 *
583 * Select the ATA device, and read the values from the ATA shadow
584 * registers. Then parse according to the Error register value,
585 * and the spec-defined values examined by ata_dev_classify().
586 *
587 * LOCKING:
588 * caller.
589 *
590 * RETURNS:
591 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
592 */
593
594 static unsigned int
595 ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
596 {
597 struct ata_taskfile tf;
598 unsigned int class;
599 u8 err;
600
601 ap->ops->dev_select(ap, device);
602
603 memset(&tf, 0, sizeof(tf));
604
605 ap->ops->tf_read(ap, &tf);
606 err = tf.feature;
607 if (r_err)
608 *r_err = err;
609
610 /* see if device passed diags */
611 if (err == 1)
612 /* do nothing */ ;
613 else if ((device == 0) && (err == 0x81))
614 /* do nothing */ ;
615 else
616 return ATA_DEV_NONE;
617
618 /* determine if device is ATA or ATAPI */
619 class = ata_dev_classify(&tf);
620
621 if (class == ATA_DEV_UNKNOWN)
622 return ATA_DEV_NONE;
623 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
624 return ATA_DEV_NONE;
625 return class;
626 }
627
628 /**
629 * ata_id_string - Convert IDENTIFY DEVICE page into string
630 * @id: IDENTIFY DEVICE results we will examine
631 * @s: string into which data is output
632 * @ofs: offset into identify device page
633 * @len: length of string to return. must be an even number.
634 *
635 * The strings in the IDENTIFY DEVICE page are broken up into
636 * 16-bit chunks. Run through the string, and output each
637 * 8-bit chunk linearly, regardless of platform.
638 *
639 * LOCKING:
640 * caller.
641 */
642
643 void ata_id_string(const u16 *id, unsigned char *s,
644 unsigned int ofs, unsigned int len)
645 {
646 unsigned int c;
647
648 while (len > 0) {
649 c = id[ofs] >> 8;
650 *s = c;
651 s++;
652
653 c = id[ofs] & 0xff;
654 *s = c;
655 s++;
656
657 ofs++;
658 len -= 2;
659 }
660 }
661
662 /**
663 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
664 * @id: IDENTIFY DEVICE results we will examine
665 * @s: string into which data is output
666 * @ofs: offset into identify device page
667 * @len: length of string to return. must be an odd number.
668 *
669 * This function is identical to ata_id_string except that it
670 * trims trailing spaces and terminates the resulting string with
671 * null. @len must be actual maximum length (even number) + 1.
672 *
673 * LOCKING:
674 * caller.
675 */
676 void ata_id_c_string(const u16 *id, unsigned char *s,
677 unsigned int ofs, unsigned int len)
678 {
679 unsigned char *p;
680
681 WARN_ON(!(len & 1));
682
683 ata_id_string(id, s, ofs, len - 1);
684
685 p = s + strnlen(s, len - 1);
686 while (p > s && p[-1] == ' ')
687 p--;
688 *p = '\0';
689 }
690
691 static u64 ata_id_n_sectors(const u16 *id)
692 {
693 if (ata_id_has_lba(id)) {
694 if (ata_id_has_lba48(id))
695 return ata_id_u64(id, 100);
696 else
697 return ata_id_u32(id, 60);
698 } else {
699 if (ata_id_current_chs_valid(id))
700 return ata_id_u32(id, 57);
701 else
702 return id[1] * id[3] * id[6];
703 }
704 }
705
706 /**
707 * ata_noop_dev_select - Select device 0/1 on ATA bus
708 * @ap: ATA channel to manipulate
709 * @device: ATA device (numbered from zero) to select
710 *
711 * This function performs no actual function.
712 *
713 * May be used as the dev_select() entry in ata_port_operations.
714 *
715 * LOCKING:
716 * caller.
717 */
718 void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
719 {
720 }
721
722
723 /**
724 * ata_std_dev_select - Select device 0/1 on ATA bus
725 * @ap: ATA channel to manipulate
726 * @device: ATA device (numbered from zero) to select
727 *
728 * Use the method defined in the ATA specification to
729 * make either device 0, or device 1, active on the
730 * ATA channel. Works with both PIO and MMIO.
731 *
732 * May be used as the dev_select() entry in ata_port_operations.
733 *
734 * LOCKING:
735 * caller.
736 */
737
738 void ata_std_dev_select (struct ata_port *ap, unsigned int device)
739 {
740 u8 tmp;
741
742 if (device == 0)
743 tmp = ATA_DEVICE_OBS;
744 else
745 tmp = ATA_DEVICE_OBS | ATA_DEV1;
746
747 if (ap->flags & ATA_FLAG_MMIO) {
748 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
749 } else {
750 outb(tmp, ap->ioaddr.device_addr);
751 }
752 ata_pause(ap); /* needed; also flushes, for mmio */
753 }
754
755 /**
756 * ata_dev_select - Select device 0/1 on ATA bus
757 * @ap: ATA channel to manipulate
758 * @device: ATA device (numbered from zero) to select
759 * @wait: non-zero to wait for Status register BSY bit to clear
760 * @can_sleep: non-zero if context allows sleeping
761 *
762 * Use the method defined in the ATA specification to
763 * make either device 0, or device 1, active on the
764 * ATA channel.
765 *
766 * This is a high-level version of ata_std_dev_select(),
767 * which additionally provides the services of inserting
768 * the proper pauses and status polling, where needed.
769 *
770 * LOCKING:
771 * caller.
772 */
773
774 void ata_dev_select(struct ata_port *ap, unsigned int device,
775 unsigned int wait, unsigned int can_sleep)
776 {
777 VPRINTK("ENTER, ata%u: device %u, wait %u\n",
778 ap->id, device, wait);
779
780 if (wait)
781 ata_wait_idle(ap);
782
783 ap->ops->dev_select(ap, device);
784
785 if (wait) {
786 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
787 msleep(150);
788 ata_wait_idle(ap);
789 }
790 }
791
792 /**
793 * ata_dump_id - IDENTIFY DEVICE info debugging output
794 * @id: IDENTIFY DEVICE page to dump
795 *
796 * Dump selected 16-bit words from the given IDENTIFY DEVICE
797 * page.
798 *
799 * LOCKING:
800 * caller.
801 */
802
803 static inline void ata_dump_id(const u16 *id)
804 {
805 DPRINTK("49==0x%04x "
806 "53==0x%04x "
807 "63==0x%04x "
808 "64==0x%04x "
809 "75==0x%04x \n",
810 id[49],
811 id[53],
812 id[63],
813 id[64],
814 id[75]);
815 DPRINTK("80==0x%04x "
816 "81==0x%04x "
817 "82==0x%04x "
818 "83==0x%04x "
819 "84==0x%04x \n",
820 id[80],
821 id[81],
822 id[82],
823 id[83],
824 id[84]);
825 DPRINTK("88==0x%04x "
826 "93==0x%04x\n",
827 id[88],
828 id[93]);
829 }
830
831 /**
832 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
833 * @id: IDENTIFY data to compute xfer mask from
834 *
835 * Compute the xfermask for this device. This is not as trivial
836 * as it seems if we must consider early devices correctly.
837 *
838 * FIXME: pre IDE drive timing (do we care ?).
839 *
840 * LOCKING:
841 * None.
842 *
843 * RETURNS:
844 * Computed xfermask
845 */
846 static unsigned int ata_id_xfermask(const u16 *id)
847 {
848 unsigned int pio_mask, mwdma_mask, udma_mask;
849
850 /* Usual case. Word 53 indicates word 64 is valid */
851 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
852 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
853 pio_mask <<= 3;
854 pio_mask |= 0x7;
855 } else {
856 /* If word 64 isn't valid then Word 51 high byte holds
857 * the PIO timing number for the maximum. Turn it into
858 * a mask.
859 */
860 pio_mask = (2 << (id[ATA_ID_OLD_PIO_MODES] & 0xFF)) - 1 ;
861
862 /* But wait.. there's more. Design your standards by
863 * committee and you too can get a free iordy field to
864 * process. However its the speeds not the modes that
865 * are supported... Note drivers using the timing API
866 * will get this right anyway
867 */
868 }
869
870 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
871
872 udma_mask = 0;
873 if (id[ATA_ID_FIELD_VALID] & (1 << 2))
874 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
875
876 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
877 }
878
879 /**
880 * ata_port_queue_task - Queue port_task
881 * @ap: The ata_port to queue port_task for
882 *
883 * Schedule @fn(@data) for execution after @delay jiffies using
884 * port_task. There is one port_task per port and it's the
885 * user(low level driver)'s responsibility to make sure that only
886 * one task is active at any given time.
887 *
888 * libata core layer takes care of synchronization between
889 * port_task and EH. ata_port_queue_task() may be ignored for EH
890 * synchronization.
891 *
892 * LOCKING:
893 * Inherited from caller.
894 */
895 void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *), void *data,
896 unsigned long delay)
897 {
898 int rc;
899
900 if (ap->flags & ATA_FLAG_FLUSH_PORT_TASK)
901 return;
902
903 PREPARE_WORK(&ap->port_task, fn, data);
904
905 if (!delay)
906 rc = queue_work(ata_wq, &ap->port_task);
907 else
908 rc = queue_delayed_work(ata_wq, &ap->port_task, delay);
909
910 /* rc == 0 means that another user is using port task */
911 WARN_ON(rc == 0);
912 }
913
914 /**
915 * ata_port_flush_task - Flush port_task
916 * @ap: The ata_port to flush port_task for
917 *
918 * After this function completes, port_task is guranteed not to
919 * be running or scheduled.
920 *
921 * LOCKING:
922 * Kernel thread context (may sleep)
923 */
924 void ata_port_flush_task(struct ata_port *ap)
925 {
926 unsigned long flags;
927
928 DPRINTK("ENTER\n");
929
930 spin_lock_irqsave(&ap->host_set->lock, flags);
931 ap->flags |= ATA_FLAG_FLUSH_PORT_TASK;
932 spin_unlock_irqrestore(&ap->host_set->lock, flags);
933
934 DPRINTK("flush #1\n");
935 flush_workqueue(ata_wq);
936
937 /*
938 * At this point, if a task is running, it's guaranteed to see
939 * the FLUSH flag; thus, it will never queue pio tasks again.
940 * Cancel and flush.
941 */
942 if (!cancel_delayed_work(&ap->port_task)) {
943 DPRINTK("flush #2\n");
944 flush_workqueue(ata_wq);
945 }
946
947 spin_lock_irqsave(&ap->host_set->lock, flags);
948 ap->flags &= ~ATA_FLAG_FLUSH_PORT_TASK;
949 spin_unlock_irqrestore(&ap->host_set->lock, flags);
950
951 DPRINTK("EXIT\n");
952 }
953
954 void ata_qc_complete_internal(struct ata_queued_cmd *qc)
955 {
956 struct completion *waiting = qc->private_data;
957
958 qc->ap->ops->tf_read(qc->ap, &qc->tf);
959 complete(waiting);
960 }
961
962 /**
963 * ata_exec_internal - execute libata internal command
964 * @ap: Port to which the command is sent
965 * @dev: Device to which the command is sent
966 * @tf: Taskfile registers for the command and the result
967 * @cdb: CDB for packet command
968 * @dma_dir: Data tranfer direction of the command
969 * @buf: Data buffer of the command
970 * @buflen: Length of data buffer
971 *
972 * Executes libata internal command with timeout. @tf contains
973 * command on entry and result on return. Timeout and error
974 * conditions are reported via return value. No recovery action
975 * is taken after a command times out. It's caller's duty to
976 * clean up after timeout.
977 *
978 * LOCKING:
979 * None. Should be called with kernel context, might sleep.
980 */
981
982 unsigned ata_exec_internal(struct ata_port *ap, struct ata_device *dev,
983 struct ata_taskfile *tf, const u8 *cdb,
984 int dma_dir, void *buf, unsigned int buflen)
985 {
986 u8 command = tf->command;
987 struct ata_queued_cmd *qc;
988 DECLARE_COMPLETION(wait);
989 unsigned long flags;
990 unsigned int err_mask;
991
992 spin_lock_irqsave(&ap->host_set->lock, flags);
993
994 qc = ata_qc_new_init(ap, dev);
995 BUG_ON(qc == NULL);
996
997 qc->tf = *tf;
998 if (cdb)
999 memcpy(qc->cdb, cdb, ATAPI_CDB_LEN);
1000 qc->dma_dir = dma_dir;
1001 if (dma_dir != DMA_NONE) {
1002 ata_sg_init_one(qc, buf, buflen);
1003 qc->nsect = buflen / ATA_SECT_SIZE;
1004 }
1005
1006 qc->private_data = &wait;
1007 qc->complete_fn = ata_qc_complete_internal;
1008
1009 ata_qc_issue(qc);
1010
1011 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1012
1013 if (!wait_for_completion_timeout(&wait, ATA_TMOUT_INTERNAL)) {
1014 ata_port_flush_task(ap);
1015
1016 spin_lock_irqsave(&ap->host_set->lock, flags);
1017
1018 /* We're racing with irq here. If we lose, the
1019 * following test prevents us from completing the qc
1020 * again. If completion irq occurs after here but
1021 * before the caller cleans up, it will result in a
1022 * spurious interrupt. We can live with that.
1023 */
1024 if (qc->flags & ATA_QCFLAG_ACTIVE) {
1025 qc->err_mask = AC_ERR_TIMEOUT;
1026 ata_qc_complete(qc);
1027 printk(KERN_WARNING "ata%u: qc timeout (cmd 0x%x)\n",
1028 ap->id, command);
1029 }
1030
1031 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1032 }
1033
1034 /* finish up */
1035 spin_lock_irqsave(&ap->host_set->lock, flags);
1036
1037 *tf = qc->tf;
1038 err_mask = qc->err_mask;
1039
1040 ata_qc_free(qc);
1041
1042 /* XXX - Some LLDDs (sata_mv) disable port on command failure.
1043 * Until those drivers are fixed, we detect the condition
1044 * here, fail the command with AC_ERR_SYSTEM and reenable the
1045 * port.
1046 *
1047 * Note that this doesn't change any behavior as internal
1048 * command failure results in disabling the device in the
1049 * higher layer for LLDDs without new reset/EH callbacks.
1050 *
1051 * Kill the following code as soon as those drivers are fixed.
1052 */
1053 if (ap->flags & ATA_FLAG_DISABLED) {
1054 err_mask |= AC_ERR_SYSTEM;
1055 ata_port_probe(ap);
1056 }
1057
1058 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1059
1060 return err_mask;
1061 }
1062
1063 /**
1064 * ata_pio_need_iordy - check if iordy needed
1065 * @adev: ATA device
1066 *
1067 * Check if the current speed of the device requires IORDY. Used
1068 * by various controllers for chip configuration.
1069 */
1070
1071 unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1072 {
1073 int pio;
1074 int speed = adev->pio_mode - XFER_PIO_0;
1075
1076 if (speed < 2)
1077 return 0;
1078 if (speed > 2)
1079 return 1;
1080
1081 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1082
1083 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
1084 pio = adev->id[ATA_ID_EIDE_PIO];
1085 /* Is the speed faster than the drive allows non IORDY ? */
1086 if (pio) {
1087 /* This is cycle times not frequency - watch the logic! */
1088 if (pio > 240) /* PIO2 is 240nS per cycle */
1089 return 1;
1090 return 0;
1091 }
1092 }
1093 return 0;
1094 }
1095
1096 /**
1097 * ata_dev_read_id - Read ID data from the specified device
1098 * @ap: port on which target device resides
1099 * @dev: target device
1100 * @p_class: pointer to class of the target device (may be changed)
1101 * @post_reset: is this read ID post-reset?
1102 * @id: buffer to read IDENTIFY data into
1103 *
1104 * Read ID data from the specified device. ATA_CMD_ID_ATA is
1105 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
1106 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
1107 * for pre-ATA4 drives.
1108 *
1109 * LOCKING:
1110 * Kernel thread context (may sleep)
1111 *
1112 * RETURNS:
1113 * 0 on success, -errno otherwise.
1114 */
1115 static int ata_dev_read_id(struct ata_port *ap, struct ata_device *dev,
1116 unsigned int *p_class, int post_reset, u16 *id)
1117 {
1118 unsigned int class = *p_class;
1119 struct ata_taskfile tf;
1120 unsigned int err_mask = 0;
1121 const char *reason;
1122 int rc;
1123
1124 DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
1125
1126 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
1127
1128 retry:
1129 ata_tf_init(ap, &tf, dev->devno);
1130
1131 switch (class) {
1132 case ATA_DEV_ATA:
1133 tf.command = ATA_CMD_ID_ATA;
1134 break;
1135 case ATA_DEV_ATAPI:
1136 tf.command = ATA_CMD_ID_ATAPI;
1137 break;
1138 default:
1139 rc = -ENODEV;
1140 reason = "unsupported class";
1141 goto err_out;
1142 }
1143
1144 tf.protocol = ATA_PROT_PIO;
1145
1146 err_mask = ata_exec_internal(ap, dev, &tf, NULL, DMA_FROM_DEVICE,
1147 id, sizeof(id[0]) * ATA_ID_WORDS);
1148 if (err_mask) {
1149 rc = -EIO;
1150 reason = "I/O error";
1151 goto err_out;
1152 }
1153
1154 swap_buf_le16(id, ATA_ID_WORDS);
1155
1156 /* sanity check */
1157 if ((class == ATA_DEV_ATA) != (ata_id_is_ata(id) | ata_id_is_cfa(id))) {
1158 rc = -EINVAL;
1159 reason = "device reports illegal type";
1160 goto err_out;
1161 }
1162
1163 if (post_reset && class == ATA_DEV_ATA) {
1164 /*
1165 * The exact sequence expected by certain pre-ATA4 drives is:
1166 * SRST RESET
1167 * IDENTIFY
1168 * INITIALIZE DEVICE PARAMETERS
1169 * anything else..
1170 * Some drives were very specific about that exact sequence.
1171 */
1172 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
1173 err_mask = ata_dev_init_params(ap, dev, id[3], id[6]);
1174 if (err_mask) {
1175 rc = -EIO;
1176 reason = "INIT_DEV_PARAMS failed";
1177 goto err_out;
1178 }
1179
1180 /* current CHS translation info (id[53-58]) might be
1181 * changed. reread the identify device info.
1182 */
1183 post_reset = 0;
1184 goto retry;
1185 }
1186 }
1187
1188 *p_class = class;
1189
1190 return 0;
1191
1192 err_out:
1193 printk(KERN_WARNING "ata%u: dev %u failed to IDENTIFY (%s)\n",
1194 ap->id, dev->devno, reason);
1195 return rc;
1196 }
1197
1198 static inline u8 ata_dev_knobble(const struct ata_port *ap,
1199 struct ata_device *dev)
1200 {
1201 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
1202 }
1203
1204 /**
1205 * ata_dev_configure - Configure the specified ATA/ATAPI device
1206 * @ap: Port on which target device resides
1207 * @dev: Target device to configure
1208 * @print_info: Enable device info printout
1209 *
1210 * Configure @dev according to @dev->id. Generic and low-level
1211 * driver specific fixups are also applied.
1212 *
1213 * LOCKING:
1214 * Kernel thread context (may sleep)
1215 *
1216 * RETURNS:
1217 * 0 on success, -errno otherwise
1218 */
1219 static int ata_dev_configure(struct ata_port *ap, struct ata_device *dev,
1220 int print_info)
1221 {
1222 const u16 *id = dev->id;
1223 unsigned int xfer_mask;
1224 int i, rc;
1225
1226 if (!ata_dev_enabled(dev)) {
1227 DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
1228 ap->id, dev->devno);
1229 return 0;
1230 }
1231
1232 DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
1233
1234 /* print device capabilities */
1235 if (print_info)
1236 printk(KERN_DEBUG "ata%u: dev %u cfg 49:%04x 82:%04x 83:%04x "
1237 "84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
1238 ap->id, dev->devno, id[49], id[82], id[83],
1239 id[84], id[85], id[86], id[87], id[88]);
1240
1241 /* initialize to-be-configured parameters */
1242 dev->flags &= ~ATA_DFLAG_CFG_MASK;
1243 dev->max_sectors = 0;
1244 dev->cdb_len = 0;
1245 dev->n_sectors = 0;
1246 dev->cylinders = 0;
1247 dev->heads = 0;
1248 dev->sectors = 0;
1249
1250 /*
1251 * common ATA, ATAPI feature tests
1252 */
1253
1254 /* find max transfer mode; for printk only */
1255 xfer_mask = ata_id_xfermask(id);
1256
1257 ata_dump_id(id);
1258
1259 /* ATA-specific feature tests */
1260 if (dev->class == ATA_DEV_ATA) {
1261 dev->n_sectors = ata_id_n_sectors(id);
1262
1263 if (ata_id_has_lba(id)) {
1264 const char *lba_desc;
1265
1266 lba_desc = "LBA";
1267 dev->flags |= ATA_DFLAG_LBA;
1268 if (ata_id_has_lba48(id)) {
1269 dev->flags |= ATA_DFLAG_LBA48;
1270 lba_desc = "LBA48";
1271 }
1272
1273 /* print device info to dmesg */
1274 if (print_info)
1275 printk(KERN_INFO "ata%u: dev %u ATA-%d, "
1276 "max %s, %Lu sectors: %s\n",
1277 ap->id, dev->devno,
1278 ata_id_major_version(id),
1279 ata_mode_string(xfer_mask),
1280 (unsigned long long)dev->n_sectors,
1281 lba_desc);
1282 } else {
1283 /* CHS */
1284
1285 /* Default translation */
1286 dev->cylinders = id[1];
1287 dev->heads = id[3];
1288 dev->sectors = id[6];
1289
1290 if (ata_id_current_chs_valid(id)) {
1291 /* Current CHS translation is valid. */
1292 dev->cylinders = id[54];
1293 dev->heads = id[55];
1294 dev->sectors = id[56];
1295 }
1296
1297 /* print device info to dmesg */
1298 if (print_info)
1299 printk(KERN_INFO "ata%u: dev %u ATA-%d, "
1300 "max %s, %Lu sectors: CHS %u/%u/%u\n",
1301 ap->id, dev->devno,
1302 ata_id_major_version(id),
1303 ata_mode_string(xfer_mask),
1304 (unsigned long long)dev->n_sectors,
1305 dev->cylinders, dev->heads, dev->sectors);
1306 }
1307
1308 dev->cdb_len = 16;
1309 }
1310
1311 /* ATAPI-specific feature tests */
1312 else if (dev->class == ATA_DEV_ATAPI) {
1313 rc = atapi_cdb_len(id);
1314 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1315 printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id);
1316 rc = -EINVAL;
1317 goto err_out_nosup;
1318 }
1319 dev->cdb_len = (unsigned int) rc;
1320
1321 /* print device info to dmesg */
1322 if (print_info)
1323 printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n",
1324 ap->id, dev->devno, ata_mode_string(xfer_mask));
1325 }
1326
1327 ap->host->max_cmd_len = 0;
1328 for (i = 0; i < ATA_MAX_DEVICES; i++)
1329 ap->host->max_cmd_len = max_t(unsigned int,
1330 ap->host->max_cmd_len,
1331 ap->device[i].cdb_len);
1332
1333 /* limit bridge transfers to udma5, 200 sectors */
1334 if (ata_dev_knobble(ap, dev)) {
1335 if (print_info)
1336 printk(KERN_INFO "ata%u(%u): applying bridge limits\n",
1337 ap->id, dev->devno);
1338 dev->udma_mask &= ATA_UDMA5;
1339 dev->max_sectors = ATA_MAX_SECTORS;
1340 }
1341
1342 if (ap->ops->dev_config)
1343 ap->ops->dev_config(ap, dev);
1344
1345 DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
1346 return 0;
1347
1348 err_out_nosup:
1349 DPRINTK("EXIT, err\n");
1350 return rc;
1351 }
1352
1353 /**
1354 * ata_bus_probe - Reset and probe ATA bus
1355 * @ap: Bus to probe
1356 *
1357 * Master ATA bus probing function. Initiates a hardware-dependent
1358 * bus reset, then attempts to identify any devices found on
1359 * the bus.
1360 *
1361 * LOCKING:
1362 * PCI/etc. bus probe sem.
1363 *
1364 * RETURNS:
1365 * Zero on success, negative errno otherwise.
1366 */
1367
1368 static int ata_bus_probe(struct ata_port *ap)
1369 {
1370 unsigned int classes[ATA_MAX_DEVICES];
1371 int tries[ATA_MAX_DEVICES];
1372 int i, rc, down_xfermask;
1373 struct ata_device *dev;
1374
1375 ata_port_probe(ap);
1376
1377 for (i = 0; i < ATA_MAX_DEVICES; i++)
1378 tries[i] = ATA_PROBE_MAX_TRIES;
1379
1380 retry:
1381 down_xfermask = 0;
1382
1383 /* reset and determine device classes */
1384 for (i = 0; i < ATA_MAX_DEVICES; i++)
1385 classes[i] = ATA_DEV_UNKNOWN;
1386
1387 if (ap->ops->probe_reset) {
1388 rc = ap->ops->probe_reset(ap, classes);
1389 if (rc) {
1390 printk("ata%u: reset failed (errno=%d)\n", ap->id, rc);
1391 return rc;
1392 }
1393 } else {
1394 ap->ops->phy_reset(ap);
1395
1396 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1397 if (!(ap->flags & ATA_FLAG_DISABLED))
1398 classes[i] = ap->device[i].class;
1399 ap->device[i].class = ATA_DEV_UNKNOWN;
1400 }
1401
1402 ata_port_probe(ap);
1403 }
1404
1405 for (i = 0; i < ATA_MAX_DEVICES; i++)
1406 if (classes[i] == ATA_DEV_UNKNOWN)
1407 classes[i] = ATA_DEV_NONE;
1408
1409 /* read IDENTIFY page and configure devices */
1410 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1411 dev = &ap->device[i];
1412
1413 if (tries[i])
1414 dev->class = classes[i];
1415
1416 if (!ata_dev_enabled(dev))
1417 continue;
1418
1419 rc = ata_dev_read_id(ap, dev, &dev->class, 1, dev->id);
1420 if (rc)
1421 goto fail;
1422
1423 rc = ata_dev_configure(ap, dev, 1);
1424 if (rc)
1425 goto fail;
1426 }
1427
1428 /* configure transfer mode */
1429 rc = ata_set_mode(ap, &dev);
1430 if (rc) {
1431 down_xfermask = 1;
1432 goto fail;
1433 }
1434
1435 for (i = 0; i < ATA_MAX_DEVICES; i++)
1436 if (ata_dev_enabled(&ap->device[i]))
1437 return 0;
1438
1439 /* no device present, disable port */
1440 ata_port_disable(ap);
1441 ap->ops->port_disable(ap);
1442 return -ENODEV;
1443
1444 fail:
1445 switch (rc) {
1446 case -EINVAL:
1447 case -ENODEV:
1448 tries[dev->devno] = 0;
1449 break;
1450 case -EIO:
1451 sata_down_spd_limit(ap);
1452 /* fall through */
1453 default:
1454 tries[dev->devno]--;
1455 if (down_xfermask &&
1456 ata_down_xfermask_limit(ap, dev, tries[dev->devno] == 1))
1457 tries[dev->devno] = 0;
1458 }
1459
1460 if (!tries[dev->devno]) {
1461 ata_down_xfermask_limit(ap, dev, 1);
1462 ata_dev_disable(ap, dev);
1463 }
1464
1465 goto retry;
1466 }
1467
1468 /**
1469 * ata_port_probe - Mark port as enabled
1470 * @ap: Port for which we indicate enablement
1471 *
1472 * Modify @ap data structure such that the system
1473 * thinks that the entire port is enabled.
1474 *
1475 * LOCKING: host_set lock, or some other form of
1476 * serialization.
1477 */
1478
1479 void ata_port_probe(struct ata_port *ap)
1480 {
1481 ap->flags &= ~ATA_FLAG_DISABLED;
1482 }
1483
1484 /**
1485 * sata_print_link_status - Print SATA link status
1486 * @ap: SATA port to printk link status about
1487 *
1488 * This function prints link speed and status of a SATA link.
1489 *
1490 * LOCKING:
1491 * None.
1492 */
1493 static void sata_print_link_status(struct ata_port *ap)
1494 {
1495 u32 sstatus, scontrol, tmp;
1496
1497 if (!ap->ops->scr_read)
1498 return;
1499
1500 sstatus = scr_read(ap, SCR_STATUS);
1501 scontrol = scr_read(ap, SCR_CONTROL);
1502
1503 if (sata_dev_present(ap)) {
1504 tmp = (sstatus >> 4) & 0xf;
1505 printk(KERN_INFO
1506 "ata%u: SATA link up %s (SStatus %X SControl %X)\n",
1507 ap->id, sata_spd_string(tmp), sstatus, scontrol);
1508 } else {
1509 printk(KERN_INFO
1510 "ata%u: SATA link down (SStatus %X SControl %X)\n",
1511 ap->id, sstatus, scontrol);
1512 }
1513 }
1514
1515 /**
1516 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1517 * @ap: SATA port associated with target SATA PHY.
1518 *
1519 * This function issues commands to standard SATA Sxxx
1520 * PHY registers, to wake up the phy (and device), and
1521 * clear any reset condition.
1522 *
1523 * LOCKING:
1524 * PCI/etc. bus probe sem.
1525 *
1526 */
1527 void __sata_phy_reset(struct ata_port *ap)
1528 {
1529 u32 sstatus;
1530 unsigned long timeout = jiffies + (HZ * 5);
1531
1532 if (ap->flags & ATA_FLAG_SATA_RESET) {
1533 /* issue phy wake/reset */
1534 scr_write_flush(ap, SCR_CONTROL, 0x301);
1535 /* Couldn't find anything in SATA I/II specs, but
1536 * AHCI-1.1 10.4.2 says at least 1 ms. */
1537 mdelay(1);
1538 }
1539 scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */
1540
1541 /* wait for phy to become ready, if necessary */
1542 do {
1543 msleep(200);
1544 sstatus = scr_read(ap, SCR_STATUS);
1545 if ((sstatus & 0xf) != 1)
1546 break;
1547 } while (time_before(jiffies, timeout));
1548
1549 /* print link status */
1550 sata_print_link_status(ap);
1551
1552 /* TODO: phy layer with polling, timeouts, etc. */
1553 if (sata_dev_present(ap))
1554 ata_port_probe(ap);
1555 else
1556 ata_port_disable(ap);
1557
1558 if (ap->flags & ATA_FLAG_DISABLED)
1559 return;
1560
1561 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1562 ata_port_disable(ap);
1563 return;
1564 }
1565
1566 ap->cbl = ATA_CBL_SATA;
1567 }
1568
1569 /**
1570 * sata_phy_reset - Reset SATA bus.
1571 * @ap: SATA port associated with target SATA PHY.
1572 *
1573 * This function resets the SATA bus, and then probes
1574 * the bus for devices.
1575 *
1576 * LOCKING:
1577 * PCI/etc. bus probe sem.
1578 *
1579 */
1580 void sata_phy_reset(struct ata_port *ap)
1581 {
1582 __sata_phy_reset(ap);
1583 if (ap->flags & ATA_FLAG_DISABLED)
1584 return;
1585 ata_bus_reset(ap);
1586 }
1587
1588 /**
1589 * ata_dev_pair - return other device on cable
1590 * @ap: port
1591 * @adev: device
1592 *
1593 * Obtain the other device on the same cable, or if none is
1594 * present NULL is returned
1595 */
1596
1597 struct ata_device *ata_dev_pair(struct ata_port *ap, struct ata_device *adev)
1598 {
1599 struct ata_device *pair = &ap->device[1 - adev->devno];
1600 if (!ata_dev_enabled(pair))
1601 return NULL;
1602 return pair;
1603 }
1604
1605 /**
1606 * ata_port_disable - Disable port.
1607 * @ap: Port to be disabled.
1608 *
1609 * Modify @ap data structure such that the system
1610 * thinks that the entire port is disabled, and should
1611 * never attempt to probe or communicate with devices
1612 * on this port.
1613 *
1614 * LOCKING: host_set lock, or some other form of
1615 * serialization.
1616 */
1617
1618 void ata_port_disable(struct ata_port *ap)
1619 {
1620 ap->device[0].class = ATA_DEV_NONE;
1621 ap->device[1].class = ATA_DEV_NONE;
1622 ap->flags |= ATA_FLAG_DISABLED;
1623 }
1624
1625 /**
1626 * sata_down_spd_limit - adjust SATA spd limit downward
1627 * @ap: Port to adjust SATA spd limit for
1628 *
1629 * Adjust SATA spd limit of @ap downward. Note that this
1630 * function only adjusts the limit. The change must be applied
1631 * using sata_set_spd().
1632 *
1633 * LOCKING:
1634 * Inherited from caller.
1635 *
1636 * RETURNS:
1637 * 0 on success, negative errno on failure
1638 */
1639 int sata_down_spd_limit(struct ata_port *ap)
1640 {
1641 u32 spd, mask;
1642 int highbit;
1643
1644 if (ap->cbl != ATA_CBL_SATA || !ap->ops->scr_read)
1645 return -EOPNOTSUPP;
1646
1647 mask = ap->sata_spd_limit;
1648 if (mask <= 1)
1649 return -EINVAL;
1650 highbit = fls(mask) - 1;
1651 mask &= ~(1 << highbit);
1652
1653 spd = (scr_read(ap, SCR_STATUS) >> 4) & 0xf;
1654 if (spd <= 1)
1655 return -EINVAL;
1656 spd--;
1657 mask &= (1 << spd) - 1;
1658 if (!mask)
1659 return -EINVAL;
1660
1661 ap->sata_spd_limit = mask;
1662
1663 printk(KERN_WARNING "ata%u: limiting SATA link speed to %s\n",
1664 ap->id, sata_spd_string(fls(mask)));
1665
1666 return 0;
1667 }
1668
1669 static int __sata_set_spd_needed(struct ata_port *ap, u32 *scontrol)
1670 {
1671 u32 spd, limit;
1672
1673 if (ap->sata_spd_limit == UINT_MAX)
1674 limit = 0;
1675 else
1676 limit = fls(ap->sata_spd_limit);
1677
1678 spd = (*scontrol >> 4) & 0xf;
1679 *scontrol = (*scontrol & ~0xf0) | ((limit & 0xf) << 4);
1680
1681 return spd != limit;
1682 }
1683
1684 /**
1685 * sata_set_spd_needed - is SATA spd configuration needed
1686 * @ap: Port in question
1687 *
1688 * Test whether the spd limit in SControl matches
1689 * @ap->sata_spd_limit. This function is used to determine
1690 * whether hardreset is necessary to apply SATA spd
1691 * configuration.
1692 *
1693 * LOCKING:
1694 * Inherited from caller.
1695 *
1696 * RETURNS:
1697 * 1 if SATA spd configuration is needed, 0 otherwise.
1698 */
1699 int sata_set_spd_needed(struct ata_port *ap)
1700 {
1701 u32 scontrol;
1702
1703 if (ap->cbl != ATA_CBL_SATA || !ap->ops->scr_read)
1704 return 0;
1705
1706 scontrol = scr_read(ap, SCR_CONTROL);
1707
1708 return __sata_set_spd_needed(ap, &scontrol);
1709 }
1710
1711 /**
1712 * sata_set_spd - set SATA spd according to spd limit
1713 * @ap: Port to set SATA spd for
1714 *
1715 * Set SATA spd of @ap according to sata_spd_limit.
1716 *
1717 * LOCKING:
1718 * Inherited from caller.
1719 *
1720 * RETURNS:
1721 * 0 if spd doesn't need to be changed, 1 if spd has been
1722 * changed. -EOPNOTSUPP if SCR registers are inaccessible.
1723 */
1724 int sata_set_spd(struct ata_port *ap)
1725 {
1726 u32 scontrol;
1727
1728 if (ap->cbl != ATA_CBL_SATA || !ap->ops->scr_read)
1729 return -EOPNOTSUPP;
1730
1731 scontrol = scr_read(ap, SCR_CONTROL);
1732 if (!__sata_set_spd_needed(ap, &scontrol))
1733 return 0;
1734
1735 scr_write(ap, SCR_CONTROL, scontrol);
1736 return 1;
1737 }
1738
1739 /*
1740 * This mode timing computation functionality is ported over from
1741 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
1742 */
1743 /*
1744 * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
1745 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
1746 * for PIO 5, which is a nonstandard extension and UDMA6, which
1747 * is currently supported only by Maxtor drives.
1748 */
1749
1750 static const struct ata_timing ata_timing[] = {
1751
1752 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
1753 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
1754 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
1755 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
1756
1757 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
1758 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
1759 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
1760
1761 /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
1762
1763 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
1764 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
1765 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
1766
1767 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
1768 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
1769 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
1770
1771 /* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */
1772 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
1773 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
1774
1775 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
1776 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
1777 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
1778
1779 /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
1780
1781 { 0xFF }
1782 };
1783
1784 #define ENOUGH(v,unit) (((v)-1)/(unit)+1)
1785 #define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
1786
1787 static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
1788 {
1789 q->setup = EZ(t->setup * 1000, T);
1790 q->act8b = EZ(t->act8b * 1000, T);
1791 q->rec8b = EZ(t->rec8b * 1000, T);
1792 q->cyc8b = EZ(t->cyc8b * 1000, T);
1793 q->active = EZ(t->active * 1000, T);
1794 q->recover = EZ(t->recover * 1000, T);
1795 q->cycle = EZ(t->cycle * 1000, T);
1796 q->udma = EZ(t->udma * 1000, UT);
1797 }
1798
1799 void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
1800 struct ata_timing *m, unsigned int what)
1801 {
1802 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
1803 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
1804 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
1805 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
1806 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
1807 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
1808 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
1809 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
1810 }
1811
1812 static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
1813 {
1814 const struct ata_timing *t;
1815
1816 for (t = ata_timing; t->mode != speed; t++)
1817 if (t->mode == 0xFF)
1818 return NULL;
1819 return t;
1820 }
1821
1822 int ata_timing_compute(struct ata_device *adev, unsigned short speed,
1823 struct ata_timing *t, int T, int UT)
1824 {
1825 const struct ata_timing *s;
1826 struct ata_timing p;
1827
1828 /*
1829 * Find the mode.
1830 */
1831
1832 if (!(s = ata_timing_find_mode(speed)))
1833 return -EINVAL;
1834
1835 memcpy(t, s, sizeof(*s));
1836
1837 /*
1838 * If the drive is an EIDE drive, it can tell us it needs extended
1839 * PIO/MW_DMA cycle timing.
1840 */
1841
1842 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
1843 memset(&p, 0, sizeof(p));
1844 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
1845 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
1846 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
1847 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
1848 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
1849 }
1850 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
1851 }
1852
1853 /*
1854 * Convert the timing to bus clock counts.
1855 */
1856
1857 ata_timing_quantize(t, t, T, UT);
1858
1859 /*
1860 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
1861 * S.M.A.R.T * and some other commands. We have to ensure that the
1862 * DMA cycle timing is slower/equal than the fastest PIO timing.
1863 */
1864
1865 if (speed > XFER_PIO_4) {
1866 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
1867 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
1868 }
1869
1870 /*
1871 * Lengthen active & recovery time so that cycle time is correct.
1872 */
1873
1874 if (t->act8b + t->rec8b < t->cyc8b) {
1875 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
1876 t->rec8b = t->cyc8b - t->act8b;
1877 }
1878
1879 if (t->active + t->recover < t->cycle) {
1880 t->active += (t->cycle - (t->active + t->recover)) / 2;
1881 t->recover = t->cycle - t->active;
1882 }
1883
1884 return 0;
1885 }
1886
1887 /**
1888 * ata_down_xfermask_limit - adjust dev xfer masks downward
1889 * @ap: Port associated with device @dev
1890 * @dev: Device to adjust xfer masks
1891 * @force_pio0: Force PIO0
1892 *
1893 * Adjust xfer masks of @dev downward. Note that this function
1894 * does not apply the change. Invoking ata_set_mode() afterwards
1895 * will apply the limit.
1896 *
1897 * LOCKING:
1898 * Inherited from caller.
1899 *
1900 * RETURNS:
1901 * 0 on success, negative errno on failure
1902 */
1903 int ata_down_xfermask_limit(struct ata_port *ap, struct ata_device *dev,
1904 int force_pio0)
1905 {
1906 unsigned long xfer_mask;
1907 int highbit;
1908
1909 xfer_mask = ata_pack_xfermask(dev->pio_mask, dev->mwdma_mask,
1910 dev->udma_mask);
1911
1912 if (!xfer_mask)
1913 goto fail;
1914 /* don't gear down to MWDMA from UDMA, go directly to PIO */
1915 if (xfer_mask & ATA_MASK_UDMA)
1916 xfer_mask &= ~ATA_MASK_MWDMA;
1917
1918 highbit = fls(xfer_mask) - 1;
1919 xfer_mask &= ~(1 << highbit);
1920 if (force_pio0)
1921 xfer_mask &= 1 << ATA_SHIFT_PIO;
1922 if (!xfer_mask)
1923 goto fail;
1924
1925 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
1926 &dev->udma_mask);
1927
1928 printk(KERN_WARNING "ata%u: dev %u limiting speed to %s\n",
1929 ap->id, dev->devno, ata_mode_string(xfer_mask));
1930
1931 return 0;
1932
1933 fail:
1934 return -EINVAL;
1935 }
1936
1937 static int ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev)
1938 {
1939 unsigned int err_mask;
1940 int rc;
1941
1942 dev->flags &= ~ATA_DFLAG_PIO;
1943 if (dev->xfer_shift == ATA_SHIFT_PIO)
1944 dev->flags |= ATA_DFLAG_PIO;
1945
1946 err_mask = ata_dev_set_xfermode(ap, dev);
1947 if (err_mask) {
1948 printk(KERN_ERR
1949 "ata%u: failed to set xfermode (err_mask=0x%x)\n",
1950 ap->id, err_mask);
1951 return -EIO;
1952 }
1953
1954 rc = ata_dev_revalidate(ap, dev, 0);
1955 if (rc)
1956 return rc;
1957
1958 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
1959 dev->xfer_shift, (int)dev->xfer_mode);
1960
1961 printk(KERN_INFO "ata%u: dev %u configured for %s\n",
1962 ap->id, dev->devno,
1963 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
1964 return 0;
1965 }
1966
1967 /**
1968 * ata_set_mode - Program timings and issue SET FEATURES - XFER
1969 * @ap: port on which timings will be programmed
1970 * @r_failed_dev: out paramter for failed device
1971 *
1972 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If
1973 * ata_set_mode() fails, pointer to the failing device is
1974 * returned in @r_failed_dev.
1975 *
1976 * LOCKING:
1977 * PCI/etc. bus probe sem.
1978 *
1979 * RETURNS:
1980 * 0 on success, negative errno otherwise
1981 */
1982 int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev)
1983 {
1984 struct ata_device *dev;
1985 int i, rc = 0, used_dma = 0, found = 0;
1986
1987 /* has private set_mode? */
1988 if (ap->ops->set_mode) {
1989 /* FIXME: make ->set_mode handle no device case and
1990 * return error code and failing device on failure.
1991 */
1992 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1993 if (ata_dev_enabled(&ap->device[i])) {
1994 ap->ops->set_mode(ap);
1995 break;
1996 }
1997 }
1998 return 0;
1999 }
2000
2001 /* step 1: calculate xfer_mask */
2002 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2003 unsigned int pio_mask, dma_mask;
2004
2005 dev = &ap->device[i];
2006
2007 if (!ata_dev_enabled(dev))
2008 continue;
2009
2010 ata_dev_xfermask(ap, dev);
2011
2012 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
2013 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
2014 dev->pio_mode = ata_xfer_mask2mode(pio_mask);
2015 dev->dma_mode = ata_xfer_mask2mode(dma_mask);
2016
2017 found = 1;
2018 if (dev->dma_mode)
2019 used_dma = 1;
2020 }
2021 if (!found)
2022 goto out;
2023
2024 /* step 2: always set host PIO timings */
2025 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2026 dev = &ap->device[i];
2027 if (!ata_dev_enabled(dev))
2028 continue;
2029
2030 if (!dev->pio_mode) {
2031 printk(KERN_WARNING "ata%u: dev %u no PIO support\n",
2032 ap->id, dev->devno);
2033 rc = -EINVAL;
2034 goto out;
2035 }
2036
2037 dev->xfer_mode = dev->pio_mode;
2038 dev->xfer_shift = ATA_SHIFT_PIO;
2039 if (ap->ops->set_piomode)
2040 ap->ops->set_piomode(ap, dev);
2041 }
2042
2043 /* step 3: set host DMA timings */
2044 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2045 dev = &ap->device[i];
2046
2047 if (!ata_dev_enabled(dev) || !dev->dma_mode)
2048 continue;
2049
2050 dev->xfer_mode = dev->dma_mode;
2051 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
2052 if (ap->ops->set_dmamode)
2053 ap->ops->set_dmamode(ap, dev);
2054 }
2055
2056 /* step 4: update devices' xfer mode */
2057 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2058 dev = &ap->device[i];
2059
2060 if (!ata_dev_enabled(dev))
2061 continue;
2062
2063 rc = ata_dev_set_mode(ap, dev);
2064 if (rc)
2065 goto out;
2066 }
2067
2068 /* Record simplex status. If we selected DMA then the other
2069 * host channels are not permitted to do so.
2070 */
2071 if (used_dma && (ap->host_set->flags & ATA_HOST_SIMPLEX))
2072 ap->host_set->simplex_claimed = 1;
2073
2074 /* step5: chip specific finalisation */
2075 if (ap->ops->post_set_mode)
2076 ap->ops->post_set_mode(ap);
2077
2078 out:
2079 if (rc)
2080 *r_failed_dev = dev;
2081 return rc;
2082 }
2083
2084 /**
2085 * ata_tf_to_host - issue ATA taskfile to host controller
2086 * @ap: port to which command is being issued
2087 * @tf: ATA taskfile register set
2088 *
2089 * Issues ATA taskfile register set to ATA host controller,
2090 * with proper synchronization with interrupt handler and
2091 * other threads.
2092 *
2093 * LOCKING:
2094 * spin_lock_irqsave(host_set lock)
2095 */
2096
2097 static inline void ata_tf_to_host(struct ata_port *ap,
2098 const struct ata_taskfile *tf)
2099 {
2100 ap->ops->tf_load(ap, tf);
2101 ap->ops->exec_command(ap, tf);
2102 }
2103
2104 /**
2105 * ata_busy_sleep - sleep until BSY clears, or timeout
2106 * @ap: port containing status register to be polled
2107 * @tmout_pat: impatience timeout
2108 * @tmout: overall timeout
2109 *
2110 * Sleep until ATA Status register bit BSY clears,
2111 * or a timeout occurs.
2112 *
2113 * LOCKING: None.
2114 */
2115
2116 unsigned int ata_busy_sleep (struct ata_port *ap,
2117 unsigned long tmout_pat, unsigned long tmout)
2118 {
2119 unsigned long timer_start, timeout;
2120 u8 status;
2121
2122 status = ata_busy_wait(ap, ATA_BUSY, 300);
2123 timer_start = jiffies;
2124 timeout = timer_start + tmout_pat;
2125 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
2126 msleep(50);
2127 status = ata_busy_wait(ap, ATA_BUSY, 3);
2128 }
2129
2130 if (status & ATA_BUSY)
2131 printk(KERN_WARNING "ata%u is slow to respond, "
2132 "please be patient\n", ap->id);
2133
2134 timeout = timer_start + tmout;
2135 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
2136 msleep(50);
2137 status = ata_chk_status(ap);
2138 }
2139
2140 if (status & ATA_BUSY) {
2141 printk(KERN_ERR "ata%u failed to respond (%lu secs)\n",
2142 ap->id, tmout / HZ);
2143 return 1;
2144 }
2145
2146 return 0;
2147 }
2148
2149 static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
2150 {
2151 struct ata_ioports *ioaddr = &ap->ioaddr;
2152 unsigned int dev0 = devmask & (1 << 0);
2153 unsigned int dev1 = devmask & (1 << 1);
2154 unsigned long timeout;
2155
2156 /* if device 0 was found in ata_devchk, wait for its
2157 * BSY bit to clear
2158 */
2159 if (dev0)
2160 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2161
2162 /* if device 1 was found in ata_devchk, wait for
2163 * register access, then wait for BSY to clear
2164 */
2165 timeout = jiffies + ATA_TMOUT_BOOT;
2166 while (dev1) {
2167 u8 nsect, lbal;
2168
2169 ap->ops->dev_select(ap, 1);
2170 if (ap->flags & ATA_FLAG_MMIO) {
2171 nsect = readb((void __iomem *) ioaddr->nsect_addr);
2172 lbal = readb((void __iomem *) ioaddr->lbal_addr);
2173 } else {
2174 nsect = inb(ioaddr->nsect_addr);
2175 lbal = inb(ioaddr->lbal_addr);
2176 }
2177 if ((nsect == 1) && (lbal == 1))
2178 break;
2179 if (time_after(jiffies, timeout)) {
2180 dev1 = 0;
2181 break;
2182 }
2183 msleep(50); /* give drive a breather */
2184 }
2185 if (dev1)
2186 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2187
2188 /* is all this really necessary? */
2189 ap->ops->dev_select(ap, 0);
2190 if (dev1)
2191 ap->ops->dev_select(ap, 1);
2192 if (dev0)
2193 ap->ops->dev_select(ap, 0);
2194 }
2195
2196 static unsigned int ata_bus_softreset(struct ata_port *ap,
2197 unsigned int devmask)
2198 {
2199 struct ata_ioports *ioaddr = &ap->ioaddr;
2200
2201 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
2202
2203 /* software reset. causes dev0 to be selected */
2204 if (ap->flags & ATA_FLAG_MMIO) {
2205 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2206 udelay(20); /* FIXME: flush */
2207 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
2208 udelay(20); /* FIXME: flush */
2209 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2210 } else {
2211 outb(ap->ctl, ioaddr->ctl_addr);
2212 udelay(10);
2213 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
2214 udelay(10);
2215 outb(ap->ctl, ioaddr->ctl_addr);
2216 }
2217
2218 /* spec mandates ">= 2ms" before checking status.
2219 * We wait 150ms, because that was the magic delay used for
2220 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
2221 * between when the ATA command register is written, and then
2222 * status is checked. Because waiting for "a while" before
2223 * checking status is fine, post SRST, we perform this magic
2224 * delay here as well.
2225 *
2226 * Old drivers/ide uses the 2mS rule and then waits for ready
2227 */
2228 msleep(150);
2229
2230 /* Before we perform post reset processing we want to see if
2231 * the bus shows 0xFF because the odd clown forgets the D7
2232 * pulldown resistor.
2233 */
2234 if (ata_check_status(ap) == 0xFF) {
2235 printk(KERN_ERR "ata%u: SRST failed (status 0xFF)\n", ap->id);
2236 return AC_ERR_OTHER;
2237 }
2238
2239 ata_bus_post_reset(ap, devmask);
2240
2241 return 0;
2242 }
2243
2244 /**
2245 * ata_bus_reset - reset host port and associated ATA channel
2246 * @ap: port to reset
2247 *
2248 * This is typically the first time we actually start issuing
2249 * commands to the ATA channel. We wait for BSY to clear, then
2250 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2251 * result. Determine what devices, if any, are on the channel
2252 * by looking at the device 0/1 error register. Look at the signature
2253 * stored in each device's taskfile registers, to determine if
2254 * the device is ATA or ATAPI.
2255 *
2256 * LOCKING:
2257 * PCI/etc. bus probe sem.
2258 * Obtains host_set lock.
2259 *
2260 * SIDE EFFECTS:
2261 * Sets ATA_FLAG_DISABLED if bus reset fails.
2262 */
2263
2264 void ata_bus_reset(struct ata_port *ap)
2265 {
2266 struct ata_ioports *ioaddr = &ap->ioaddr;
2267 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2268 u8 err;
2269 unsigned int dev0, dev1 = 0, devmask = 0;
2270
2271 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
2272
2273 /* determine if device 0/1 are present */
2274 if (ap->flags & ATA_FLAG_SATA_RESET)
2275 dev0 = 1;
2276 else {
2277 dev0 = ata_devchk(ap, 0);
2278 if (slave_possible)
2279 dev1 = ata_devchk(ap, 1);
2280 }
2281
2282 if (dev0)
2283 devmask |= (1 << 0);
2284 if (dev1)
2285 devmask |= (1 << 1);
2286
2287 /* select device 0 again */
2288 ap->ops->dev_select(ap, 0);
2289
2290 /* issue bus reset */
2291 if (ap->flags & ATA_FLAG_SRST)
2292 if (ata_bus_softreset(ap, devmask))
2293 goto err_out;
2294
2295 /*
2296 * determine by signature whether we have ATA or ATAPI devices
2297 */
2298 ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
2299 if ((slave_possible) && (err != 0x81))
2300 ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
2301
2302 /* re-enable interrupts */
2303 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2304 ata_irq_on(ap);
2305
2306 /* is double-select really necessary? */
2307 if (ap->device[1].class != ATA_DEV_NONE)
2308 ap->ops->dev_select(ap, 1);
2309 if (ap->device[0].class != ATA_DEV_NONE)
2310 ap->ops->dev_select(ap, 0);
2311
2312 /* if no devices were detected, disable this port */
2313 if ((ap->device[0].class == ATA_DEV_NONE) &&
2314 (ap->device[1].class == ATA_DEV_NONE))
2315 goto err_out;
2316
2317 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2318 /* set up device control for ATA_FLAG_SATA_RESET */
2319 if (ap->flags & ATA_FLAG_MMIO)
2320 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2321 else
2322 outb(ap->ctl, ioaddr->ctl_addr);
2323 }
2324
2325 DPRINTK("EXIT\n");
2326 return;
2327
2328 err_out:
2329 printk(KERN_ERR "ata%u: disabling port\n", ap->id);
2330 ap->ops->port_disable(ap);
2331
2332 DPRINTK("EXIT\n");
2333 }
2334
2335 static int sata_phy_resume(struct ata_port *ap)
2336 {
2337 unsigned long timeout = jiffies + (HZ * 5);
2338 u32 scontrol, sstatus;
2339
2340 scontrol = scr_read(ap, SCR_CONTROL);
2341 scontrol = (scontrol & 0x0f0) | 0x300;
2342 scr_write_flush(ap, SCR_CONTROL, scontrol);
2343
2344 /* Wait for phy to become ready, if necessary. */
2345 do {
2346 msleep(200);
2347 sstatus = scr_read(ap, SCR_STATUS);
2348 if ((sstatus & 0xf) != 1)
2349 return 0;
2350 } while (time_before(jiffies, timeout));
2351
2352 return -1;
2353 }
2354
2355 /**
2356 * ata_std_probeinit - initialize probing
2357 * @ap: port to be probed
2358 *
2359 * @ap is about to be probed. Initialize it. This function is
2360 * to be used as standard callback for ata_drive_probe_reset().
2361 *
2362 * NOTE!!! Do not use this function as probeinit if a low level
2363 * driver implements only hardreset. Just pass NULL as probeinit
2364 * in that case. Using this function is probably okay but doing
2365 * so makes reset sequence different from the original
2366 * ->phy_reset implementation and Jeff nervous. :-P
2367 */
2368 void ata_std_probeinit(struct ata_port *ap)
2369 {
2370 if ((ap->flags & ATA_FLAG_SATA) && ap->ops->scr_read) {
2371 u32 spd;
2372
2373 /* set cable type and resume link */
2374 ap->cbl = ATA_CBL_SATA;
2375 sata_phy_resume(ap);
2376
2377 /* init sata_spd_limit to the current value */
2378 spd = (scr_read(ap, SCR_CONTROL) & 0xf0) >> 4;
2379 if (spd)
2380 ap->sata_spd_limit &= (1 << spd) - 1;
2381
2382 /* wait for device */
2383 if (sata_dev_present(ap))
2384 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2385 }
2386 }
2387
2388 /**
2389 * ata_std_softreset - reset host port via ATA SRST
2390 * @ap: port to reset
2391 * @classes: resulting classes of attached devices
2392 *
2393 * Reset host port using ATA SRST. This function is to be used
2394 * as standard callback for ata_drive_*_reset() functions.
2395 *
2396 * LOCKING:
2397 * Kernel thread context (may sleep)
2398 *
2399 * RETURNS:
2400 * 0 on success, -errno otherwise.
2401 */
2402 int ata_std_softreset(struct ata_port *ap, unsigned int *classes)
2403 {
2404 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2405 unsigned int devmask = 0, err_mask;
2406 u8 err;
2407
2408 DPRINTK("ENTER\n");
2409
2410 if (ap->ops->scr_read && !sata_dev_present(ap)) {
2411 classes[0] = ATA_DEV_NONE;
2412 goto out;
2413 }
2414
2415 /* determine if device 0/1 are present */
2416 if (ata_devchk(ap, 0))
2417 devmask |= (1 << 0);
2418 if (slave_possible && ata_devchk(ap, 1))
2419 devmask |= (1 << 1);
2420
2421 /* select device 0 again */
2422 ap->ops->dev_select(ap, 0);
2423
2424 /* issue bus reset */
2425 DPRINTK("about to softreset, devmask=%x\n", devmask);
2426 err_mask = ata_bus_softreset(ap, devmask);
2427 if (err_mask) {
2428 printk(KERN_ERR "ata%u: SRST failed (err_mask=0x%x)\n",
2429 ap->id, err_mask);
2430 return -EIO;
2431 }
2432
2433 /* determine by signature whether we have ATA or ATAPI devices */
2434 classes[0] = ata_dev_try_classify(ap, 0, &err);
2435 if (slave_possible && err != 0x81)
2436 classes[1] = ata_dev_try_classify(ap, 1, &err);
2437
2438 out:
2439 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
2440 return 0;
2441 }
2442
2443 /**
2444 * sata_std_hardreset - reset host port via SATA phy reset
2445 * @ap: port to reset
2446 * @class: resulting class of attached device
2447 *
2448 * SATA phy-reset host port using DET bits of SControl register.
2449 * This function is to be used as standard callback for
2450 * ata_drive_*_reset().
2451 *
2452 * LOCKING:
2453 * Kernel thread context (may sleep)
2454 *
2455 * RETURNS:
2456 * 0 on success, -errno otherwise.
2457 */
2458 int sata_std_hardreset(struct ata_port *ap, unsigned int *class)
2459 {
2460 u32 scontrol;
2461
2462 DPRINTK("ENTER\n");
2463
2464 if (sata_set_spd_needed(ap)) {
2465 /* SATA spec says nothing about how to reconfigure
2466 * spd. To be on the safe side, turn off phy during
2467 * reconfiguration. This works for at least ICH7 AHCI
2468 * and Sil3124.
2469 */
2470 scontrol = scr_read(ap, SCR_CONTROL);
2471 scontrol = (scontrol & 0x0f0) | 0x302;
2472 scr_write_flush(ap, SCR_CONTROL, scontrol);
2473
2474 sata_set_spd(ap);
2475 }
2476
2477 /* issue phy wake/reset */
2478 scontrol = scr_read(ap, SCR_CONTROL);
2479 scontrol = (scontrol & 0x0f0) | 0x301;
2480 scr_write_flush(ap, SCR_CONTROL, scontrol);
2481
2482 /* Couldn't find anything in SATA I/II specs, but AHCI-1.1
2483 * 10.4.2 says at least 1 ms.
2484 */
2485 msleep(1);
2486
2487 /* bring phy back */
2488 sata_phy_resume(ap);
2489
2490 /* TODO: phy layer with polling, timeouts, etc. */
2491 if (!sata_dev_present(ap)) {
2492 *class = ATA_DEV_NONE;
2493 DPRINTK("EXIT, link offline\n");
2494 return 0;
2495 }
2496
2497 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
2498 printk(KERN_ERR
2499 "ata%u: COMRESET failed (device not ready)\n", ap->id);
2500 return -EIO;
2501 }
2502
2503 ap->ops->dev_select(ap, 0); /* probably unnecessary */
2504
2505 *class = ata_dev_try_classify(ap, 0, NULL);
2506
2507 DPRINTK("EXIT, class=%u\n", *class);
2508 return 0;
2509 }
2510
2511 /**
2512 * ata_std_postreset - standard postreset callback
2513 * @ap: the target ata_port
2514 * @classes: classes of attached devices
2515 *
2516 * This function is invoked after a successful reset. Note that
2517 * the device might have been reset more than once using
2518 * different reset methods before postreset is invoked.
2519 *
2520 * This function is to be used as standard callback for
2521 * ata_drive_*_reset().
2522 *
2523 * LOCKING:
2524 * Kernel thread context (may sleep)
2525 */
2526 void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
2527 {
2528 DPRINTK("ENTER\n");
2529
2530 /* print link status */
2531 if (ap->cbl == ATA_CBL_SATA)
2532 sata_print_link_status(ap);
2533
2534 /* re-enable interrupts */
2535 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2536 ata_irq_on(ap);
2537
2538 /* is double-select really necessary? */
2539 if (classes[0] != ATA_DEV_NONE)
2540 ap->ops->dev_select(ap, 1);
2541 if (classes[1] != ATA_DEV_NONE)
2542 ap->ops->dev_select(ap, 0);
2543
2544 /* bail out if no device is present */
2545 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
2546 DPRINTK("EXIT, no device\n");
2547 return;
2548 }
2549
2550 /* set up device control */
2551 if (ap->ioaddr.ctl_addr) {
2552 if (ap->flags & ATA_FLAG_MMIO)
2553 writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
2554 else
2555 outb(ap->ctl, ap->ioaddr.ctl_addr);
2556 }
2557
2558 DPRINTK("EXIT\n");
2559 }
2560
2561 /**
2562 * ata_std_probe_reset - standard probe reset method
2563 * @ap: prot to perform probe-reset
2564 * @classes: resulting classes of attached devices
2565 *
2566 * The stock off-the-shelf ->probe_reset method.
2567 *
2568 * LOCKING:
2569 * Kernel thread context (may sleep)
2570 *
2571 * RETURNS:
2572 * 0 on success, -errno otherwise.
2573 */
2574 int ata_std_probe_reset(struct ata_port *ap, unsigned int *classes)
2575 {
2576 ata_reset_fn_t hardreset;
2577
2578 hardreset = NULL;
2579 if (ap->cbl == ATA_CBL_SATA && ap->ops->scr_read)
2580 hardreset = sata_std_hardreset;
2581
2582 return ata_drive_probe_reset(ap, ata_std_probeinit,
2583 ata_std_softreset, hardreset,
2584 ata_std_postreset, classes);
2585 }
2586
2587 int ata_do_reset(struct ata_port *ap, ata_reset_fn_t reset,
2588 unsigned int *classes)
2589 {
2590 int i, rc;
2591
2592 for (i = 0; i < ATA_MAX_DEVICES; i++)
2593 classes[i] = ATA_DEV_UNKNOWN;
2594
2595 rc = reset(ap, classes);
2596 if (rc)
2597 return rc;
2598
2599 /* If any class isn't ATA_DEV_UNKNOWN, consider classification
2600 * is complete and convert all ATA_DEV_UNKNOWN to
2601 * ATA_DEV_NONE.
2602 */
2603 for (i = 0; i < ATA_MAX_DEVICES; i++)
2604 if (classes[i] != ATA_DEV_UNKNOWN)
2605 break;
2606
2607 if (i < ATA_MAX_DEVICES)
2608 for (i = 0; i < ATA_MAX_DEVICES; i++)
2609 if (classes[i] == ATA_DEV_UNKNOWN)
2610 classes[i] = ATA_DEV_NONE;
2611
2612 return 0;
2613 }
2614
2615 /**
2616 * ata_drive_probe_reset - Perform probe reset with given methods
2617 * @ap: port to reset
2618 * @probeinit: probeinit method (can be NULL)
2619 * @softreset: softreset method (can be NULL)
2620 * @hardreset: hardreset method (can be NULL)
2621 * @postreset: postreset method (can be NULL)
2622 * @classes: resulting classes of attached devices
2623 *
2624 * Reset the specified port and classify attached devices using
2625 * given methods. This function prefers softreset but tries all
2626 * possible reset sequences to reset and classify devices. This
2627 * function is intended to be used for constructing ->probe_reset
2628 * callback by low level drivers.
2629 *
2630 * Reset methods should follow the following rules.
2631 *
2632 * - Return 0 on sucess, -errno on failure.
2633 * - If classification is supported, fill classes[] with
2634 * recognized class codes.
2635 * - If classification is not supported, leave classes[] alone.
2636 *
2637 * LOCKING:
2638 * Kernel thread context (may sleep)
2639 *
2640 * RETURNS:
2641 * 0 on success, -EINVAL if no reset method is avaliable, -ENODEV
2642 * if classification fails, and any error code from reset
2643 * methods.
2644 */
2645 int ata_drive_probe_reset(struct ata_port *ap, ata_probeinit_fn_t probeinit,
2646 ata_reset_fn_t softreset, ata_reset_fn_t hardreset,
2647 ata_postreset_fn_t postreset, unsigned int *classes)
2648 {
2649 int rc = -EINVAL;
2650
2651 if (probeinit)
2652 probeinit(ap);
2653
2654 if (softreset && !sata_set_spd_needed(ap)) {
2655 rc = ata_do_reset(ap, softreset, classes);
2656 if (rc == 0 && classes[0] != ATA_DEV_UNKNOWN)
2657 goto done;
2658 printk(KERN_INFO "ata%u: softreset failed, will try "
2659 "hardreset in 5 secs\n", ap->id);
2660 ssleep(5);
2661 }
2662
2663 if (!hardreset)
2664 goto done;
2665
2666 while (1) {
2667 rc = ata_do_reset(ap, hardreset, classes);
2668 if (rc == 0) {
2669 if (classes[0] != ATA_DEV_UNKNOWN)
2670 goto done;
2671 break;
2672 }
2673
2674 if (sata_down_spd_limit(ap))
2675 goto done;
2676
2677 printk(KERN_INFO "ata%u: hardreset failed, will retry "
2678 "in 5 secs\n", ap->id);
2679 ssleep(5);
2680 }
2681
2682 if (softreset) {
2683 printk(KERN_INFO "ata%u: hardreset succeeded without "
2684 "classification, will retry softreset in 5 secs\n",
2685 ap->id);
2686 ssleep(5);
2687
2688 rc = ata_do_reset(ap, softreset, classes);
2689 }
2690
2691 done:
2692 if (rc == 0) {
2693 if (postreset)
2694 postreset(ap, classes);
2695 if (classes[0] == ATA_DEV_UNKNOWN)
2696 rc = -ENODEV;
2697 }
2698 return rc;
2699 }
2700
2701 /**
2702 * ata_dev_same_device - Determine whether new ID matches configured device
2703 * @ap: port on which the device to compare against resides
2704 * @dev: device to compare against
2705 * @new_class: class of the new device
2706 * @new_id: IDENTIFY page of the new device
2707 *
2708 * Compare @new_class and @new_id against @dev and determine
2709 * whether @dev is the device indicated by @new_class and
2710 * @new_id.
2711 *
2712 * LOCKING:
2713 * None.
2714 *
2715 * RETURNS:
2716 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
2717 */
2718 static int ata_dev_same_device(struct ata_port *ap, struct ata_device *dev,
2719 unsigned int new_class, const u16 *new_id)
2720 {
2721 const u16 *old_id = dev->id;
2722 unsigned char model[2][41], serial[2][21];
2723 u64 new_n_sectors;
2724
2725 if (dev->class != new_class) {
2726 printk(KERN_INFO
2727 "ata%u: dev %u class mismatch %d != %d\n",
2728 ap->id, dev->devno, dev->class, new_class);
2729 return 0;
2730 }
2731
2732 ata_id_c_string(old_id, model[0], ATA_ID_PROD_OFS, sizeof(model[0]));
2733 ata_id_c_string(new_id, model[1], ATA_ID_PROD_OFS, sizeof(model[1]));
2734 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO_OFS, sizeof(serial[0]));
2735 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO_OFS, sizeof(serial[1]));
2736 new_n_sectors = ata_id_n_sectors(new_id);
2737
2738 if (strcmp(model[0], model[1])) {
2739 printk(KERN_INFO
2740 "ata%u: dev %u model number mismatch '%s' != '%s'\n",
2741 ap->id, dev->devno, model[0], model[1]);
2742 return 0;
2743 }
2744
2745 if (strcmp(serial[0], serial[1])) {
2746 printk(KERN_INFO
2747 "ata%u: dev %u serial number mismatch '%s' != '%s'\n",
2748 ap->id, dev->devno, serial[0], serial[1]);
2749 return 0;
2750 }
2751
2752 if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) {
2753 printk(KERN_INFO
2754 "ata%u: dev %u n_sectors mismatch %llu != %llu\n",
2755 ap->id, dev->devno, (unsigned long long)dev->n_sectors,
2756 (unsigned long long)new_n_sectors);
2757 return 0;
2758 }
2759
2760 return 1;
2761 }
2762
2763 /**
2764 * ata_dev_revalidate - Revalidate ATA device
2765 * @ap: port on which the device to revalidate resides
2766 * @dev: device to revalidate
2767 * @post_reset: is this revalidation after reset?
2768 *
2769 * Re-read IDENTIFY page and make sure @dev is still attached to
2770 * the port.
2771 *
2772 * LOCKING:
2773 * Kernel thread context (may sleep)
2774 *
2775 * RETURNS:
2776 * 0 on success, negative errno otherwise
2777 */
2778 int ata_dev_revalidate(struct ata_port *ap, struct ata_device *dev,
2779 int post_reset)
2780 {
2781 unsigned int class = dev->class;
2782 u16 *id = (void *)ap->sector_buf;
2783 int rc;
2784
2785 if (!ata_dev_enabled(dev)) {
2786 rc = -ENODEV;
2787 goto fail;
2788 }
2789
2790 /* read ID data */
2791 rc = ata_dev_read_id(ap, dev, &class, post_reset, id);
2792 if (rc)
2793 goto fail;
2794
2795 /* is the device still there? */
2796 if (!ata_dev_same_device(ap, dev, class, id)) {
2797 rc = -ENODEV;
2798 goto fail;
2799 }
2800
2801 memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS);
2802
2803 /* configure device according to the new ID */
2804 rc = ata_dev_configure(ap, dev, 0);
2805 if (rc == 0)
2806 return 0;
2807
2808 fail:
2809 printk(KERN_ERR "ata%u: dev %u revalidation failed (errno=%d)\n",
2810 ap->id, dev->devno, rc);
2811 return rc;
2812 }
2813
2814 static const char * const ata_dma_blacklist [] = {
2815 "WDC AC11000H", NULL,
2816 "WDC AC22100H", NULL,
2817 "WDC AC32500H", NULL,
2818 "WDC AC33100H", NULL,
2819 "WDC AC31600H", NULL,
2820 "WDC AC32100H", "24.09P07",
2821 "WDC AC23200L", "21.10N21",
2822 "Compaq CRD-8241B", NULL,
2823 "CRD-8400B", NULL,
2824 "CRD-8480B", NULL,
2825 "CRD-8482B", NULL,
2826 "CRD-84", NULL,
2827 "SanDisk SDP3B", NULL,
2828 "SanDisk SDP3B-64", NULL,
2829 "SANYO CD-ROM CRD", NULL,
2830 "HITACHI CDR-8", NULL,
2831 "HITACHI CDR-8335", NULL,
2832 "HITACHI CDR-8435", NULL,
2833 "Toshiba CD-ROM XM-6202B", NULL,
2834 "TOSHIBA CD-ROM XM-1702BC", NULL,
2835 "CD-532E-A", NULL,
2836 "E-IDE CD-ROM CR-840", NULL,
2837 "CD-ROM Drive/F5A", NULL,
2838 "WPI CDD-820", NULL,
2839 "SAMSUNG CD-ROM SC-148C", NULL,
2840 "SAMSUNG CD-ROM SC", NULL,
2841 "SanDisk SDP3B-64", NULL,
2842 "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,
2843 "_NEC DV5800A", NULL,
2844 "SAMSUNG CD-ROM SN-124", "N001"
2845 };
2846
2847 static int ata_strim(char *s, size_t len)
2848 {
2849 len = strnlen(s, len);
2850
2851 /* ATAPI specifies that empty space is blank-filled; remove blanks */
2852 while ((len > 0) && (s[len - 1] == ' ')) {
2853 len--;
2854 s[len] = 0;
2855 }
2856 return len;
2857 }
2858
2859 static int ata_dma_blacklisted(const struct ata_device *dev)
2860 {
2861 unsigned char model_num[40];
2862 unsigned char model_rev[16];
2863 unsigned int nlen, rlen;
2864 int i;
2865
2866 ata_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
2867 sizeof(model_num));
2868 ata_id_string(dev->id, model_rev, ATA_ID_FW_REV_OFS,
2869 sizeof(model_rev));
2870 nlen = ata_strim(model_num, sizeof(model_num));
2871 rlen = ata_strim(model_rev, sizeof(model_rev));
2872
2873 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i += 2) {
2874 if (!strncmp(ata_dma_blacklist[i], model_num, nlen)) {
2875 if (ata_dma_blacklist[i+1] == NULL)
2876 return 1;
2877 if (!strncmp(ata_dma_blacklist[i], model_rev, rlen))
2878 return 1;
2879 }
2880 }
2881 return 0;
2882 }
2883
2884 /**
2885 * ata_dev_xfermask - Compute supported xfermask of the given device
2886 * @ap: Port on which the device to compute xfermask for resides
2887 * @dev: Device to compute xfermask for
2888 *
2889 * Compute supported xfermask of @dev and store it in
2890 * dev->*_mask. This function is responsible for applying all
2891 * known limits including host controller limits, device
2892 * blacklist, etc...
2893 *
2894 * FIXME: The current implementation limits all transfer modes to
2895 * the fastest of the lowested device on the port. This is not
2896 * required on most controllers.
2897 *
2898 * LOCKING:
2899 * None.
2900 */
2901 static void ata_dev_xfermask(struct ata_port *ap, struct ata_device *dev)
2902 {
2903 struct ata_host_set *hs = ap->host_set;
2904 unsigned long xfer_mask;
2905 int i;
2906
2907 xfer_mask = ata_pack_xfermask(ap->pio_mask,
2908 ap->mwdma_mask, ap->udma_mask);
2909
2910 /* Apply cable rule here. Don't apply it early because when
2911 * we handle hot plug the cable type can itself change.
2912 */
2913 if (ap->cbl == ATA_CBL_PATA40)
2914 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
2915
2916 /* FIXME: Use port-wide xfermask for now */
2917 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2918 struct ata_device *d = &ap->device[i];
2919
2920 if (ata_dev_absent(d))
2921 continue;
2922
2923 if (ata_dev_disabled(d)) {
2924 /* to avoid violating device selection timing */
2925 xfer_mask &= ata_pack_xfermask(d->pio_mask,
2926 UINT_MAX, UINT_MAX);
2927 continue;
2928 }
2929
2930 xfer_mask &= ata_pack_xfermask(d->pio_mask,
2931 d->mwdma_mask, d->udma_mask);
2932 xfer_mask &= ata_id_xfermask(d->id);
2933 if (ata_dma_blacklisted(d))
2934 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
2935 }
2936
2937 if (ata_dma_blacklisted(dev))
2938 printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, "
2939 "disabling DMA\n", ap->id, dev->devno);
2940
2941 if (hs->flags & ATA_HOST_SIMPLEX) {
2942 if (hs->simplex_claimed)
2943 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
2944 }
2945
2946 if (ap->ops->mode_filter)
2947 xfer_mask = ap->ops->mode_filter(ap, dev, xfer_mask);
2948
2949 ata_unpack_xfermask(xfer_mask, &dev->pio_mask,
2950 &dev->mwdma_mask, &dev->udma_mask);
2951 }
2952
2953 /**
2954 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
2955 * @ap: Port associated with device @dev
2956 * @dev: Device to which command will be sent
2957 *
2958 * Issue SET FEATURES - XFER MODE command to device @dev
2959 * on port @ap.
2960 *
2961 * LOCKING:
2962 * PCI/etc. bus probe sem.
2963 *
2964 * RETURNS:
2965 * 0 on success, AC_ERR_* mask otherwise.
2966 */
2967
2968 static unsigned int ata_dev_set_xfermode(struct ata_port *ap,
2969 struct ata_device *dev)
2970 {
2971 struct ata_taskfile tf;
2972 unsigned int err_mask;
2973
2974 /* set up set-features taskfile */
2975 DPRINTK("set features - xfer mode\n");
2976
2977 ata_tf_init(ap, &tf, dev->devno);
2978 tf.command = ATA_CMD_SET_FEATURES;
2979 tf.feature = SETFEATURES_XFER;
2980 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2981 tf.protocol = ATA_PROT_NODATA;
2982 tf.nsect = dev->xfer_mode;
2983
2984 err_mask = ata_exec_internal(ap, dev, &tf, NULL, DMA_NONE, NULL, 0);
2985
2986 DPRINTK("EXIT, err_mask=%x\n", err_mask);
2987 return err_mask;
2988 }
2989
2990 /**
2991 * ata_dev_init_params - Issue INIT DEV PARAMS command
2992 * @ap: Port associated with device @dev
2993 * @dev: Device to which command will be sent
2994 *
2995 * LOCKING:
2996 * Kernel thread context (may sleep)
2997 *
2998 * RETURNS:
2999 * 0 on success, AC_ERR_* mask otherwise.
3000 */
3001
3002 static unsigned int ata_dev_init_params(struct ata_port *ap,
3003 struct ata_device *dev,
3004 u16 heads,
3005 u16 sectors)
3006 {
3007 struct ata_taskfile tf;
3008 unsigned int err_mask;
3009
3010 /* Number of sectors per track 1-255. Number of heads 1-16 */
3011 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
3012 return AC_ERR_INVALID;
3013
3014 /* set up init dev params taskfile */
3015 DPRINTK("init dev params \n");
3016
3017 ata_tf_init(ap, &tf, dev->devno);
3018 tf.command = ATA_CMD_INIT_DEV_PARAMS;
3019 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
3020 tf.protocol = ATA_PROT_NODATA;
3021 tf.nsect = sectors;
3022 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
3023
3024 err_mask = ata_exec_internal(ap, dev, &tf, NULL, DMA_NONE, NULL, 0);
3025
3026 DPRINTK("EXIT, err_mask=%x\n", err_mask);
3027 return err_mask;
3028 }
3029
3030 /**
3031 * ata_sg_clean - Unmap DMA memory associated with command
3032 * @qc: Command containing DMA memory to be released
3033 *
3034 * Unmap all mapped DMA memory associated with this command.
3035 *
3036 * LOCKING:
3037 * spin_lock_irqsave(host_set lock)
3038 */
3039
3040 static void ata_sg_clean(struct ata_queued_cmd *qc)
3041 {
3042 struct ata_port *ap = qc->ap;
3043 struct scatterlist *sg = qc->__sg;
3044 int dir = qc->dma_dir;
3045 void *pad_buf = NULL;
3046
3047 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
3048 WARN_ON(sg == NULL);
3049
3050 if (qc->flags & ATA_QCFLAG_SINGLE)
3051 WARN_ON(qc->n_elem > 1);
3052
3053 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
3054
3055 /* if we padded the buffer out to 32-bit bound, and data
3056 * xfer direction is from-device, we must copy from the
3057 * pad buffer back into the supplied buffer
3058 */
3059 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
3060 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3061
3062 if (qc->flags & ATA_QCFLAG_SG) {
3063 if (qc->n_elem)
3064 dma_unmap_sg(ap->dev, sg, qc->n_elem, dir);
3065 /* restore last sg */
3066 sg[qc->orig_n_elem - 1].length += qc->pad_len;
3067 if (pad_buf) {
3068 struct scatterlist *psg = &qc->pad_sgent;
3069 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3070 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
3071 kunmap_atomic(addr, KM_IRQ0);
3072 }
3073 } else {
3074 if (qc->n_elem)
3075 dma_unmap_single(ap->dev,
3076 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
3077 dir);
3078 /* restore sg */
3079 sg->length += qc->pad_len;
3080 if (pad_buf)
3081 memcpy(qc->buf_virt + sg->length - qc->pad_len,
3082 pad_buf, qc->pad_len);
3083 }
3084
3085 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3086 qc->__sg = NULL;
3087 }
3088
3089 /**
3090 * ata_fill_sg - Fill PCI IDE PRD table
3091 * @qc: Metadata associated with taskfile to be transferred
3092 *
3093 * Fill PCI IDE PRD (scatter-gather) table with segments
3094 * associated with the current disk command.
3095 *
3096 * LOCKING:
3097 * spin_lock_irqsave(host_set lock)
3098 *
3099 */
3100 static void ata_fill_sg(struct ata_queued_cmd *qc)
3101 {
3102 struct ata_port *ap = qc->ap;
3103 struct scatterlist *sg;
3104 unsigned int idx;
3105
3106 WARN_ON(qc->__sg == NULL);
3107 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
3108
3109 idx = 0;
3110 ata_for_each_sg(sg, qc) {
3111 u32 addr, offset;
3112 u32 sg_len, len;
3113
3114 /* determine if physical DMA addr spans 64K boundary.
3115 * Note h/w doesn't support 64-bit, so we unconditionally
3116 * truncate dma_addr_t to u32.
3117 */
3118 addr = (u32) sg_dma_address(sg);
3119 sg_len = sg_dma_len(sg);
3120
3121 while (sg_len) {
3122 offset = addr & 0xffff;
3123 len = sg_len;
3124 if ((offset + sg_len) > 0x10000)
3125 len = 0x10000 - offset;
3126
3127 ap->prd[idx].addr = cpu_to_le32(addr);
3128 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
3129 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
3130
3131 idx++;
3132 sg_len -= len;
3133 addr += len;
3134 }
3135 }
3136
3137 if (idx)
3138 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
3139 }
3140 /**
3141 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
3142 * @qc: Metadata associated with taskfile to check
3143 *
3144 * Allow low-level driver to filter ATA PACKET commands, returning
3145 * a status indicating whether or not it is OK to use DMA for the
3146 * supplied PACKET command.
3147 *
3148 * LOCKING:
3149 * spin_lock_irqsave(host_set lock)
3150 *
3151 * RETURNS: 0 when ATAPI DMA can be used
3152 * nonzero otherwise
3153 */
3154 int ata_check_atapi_dma(struct ata_queued_cmd *qc)
3155 {
3156 struct ata_port *ap = qc->ap;
3157 int rc = 0; /* Assume ATAPI DMA is OK by default */
3158
3159 if (ap->ops->check_atapi_dma)
3160 rc = ap->ops->check_atapi_dma(qc);
3161
3162 return rc;
3163 }
3164 /**
3165 * ata_qc_prep - Prepare taskfile for submission
3166 * @qc: Metadata associated with taskfile to be prepared
3167 *
3168 * Prepare ATA taskfile for submission.
3169 *
3170 * LOCKING:
3171 * spin_lock_irqsave(host_set lock)
3172 */
3173 void ata_qc_prep(struct ata_queued_cmd *qc)
3174 {
3175 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
3176 return;
3177
3178 ata_fill_sg(qc);
3179 }
3180
3181 void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
3182
3183 /**
3184 * ata_sg_init_one - Associate command with memory buffer
3185 * @qc: Command to be associated
3186 * @buf: Memory buffer
3187 * @buflen: Length of memory buffer, in bytes.
3188 *
3189 * Initialize the data-related elements of queued_cmd @qc
3190 * to point to a single memory buffer, @buf of byte length @buflen.
3191 *
3192 * LOCKING:
3193 * spin_lock_irqsave(host_set lock)
3194 */
3195
3196 void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
3197 {
3198 struct scatterlist *sg;
3199
3200 qc->flags |= ATA_QCFLAG_SINGLE;
3201
3202 memset(&qc->sgent, 0, sizeof(qc->sgent));
3203 qc->__sg = &qc->sgent;
3204 qc->n_elem = 1;
3205 qc->orig_n_elem = 1;
3206 qc->buf_virt = buf;
3207
3208 sg = qc->__sg;
3209 sg_init_one(sg, buf, buflen);
3210 }
3211
3212 /**
3213 * ata_sg_init - Associate command with scatter-gather table.
3214 * @qc: Command to be associated
3215 * @sg: Scatter-gather table.
3216 * @n_elem: Number of elements in s/g table.
3217 *
3218 * Initialize the data-related elements of queued_cmd @qc
3219 * to point to a scatter-gather table @sg, containing @n_elem
3220 * elements.
3221 *
3222 * LOCKING:
3223 * spin_lock_irqsave(host_set lock)
3224 */
3225
3226 void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
3227 unsigned int n_elem)
3228 {
3229 qc->flags |= ATA_QCFLAG_SG;
3230 qc->__sg = sg;
3231 qc->n_elem = n_elem;
3232 qc->orig_n_elem = n_elem;
3233 }
3234
3235 /**
3236 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
3237 * @qc: Command with memory buffer to be mapped.
3238 *
3239 * DMA-map the memory buffer associated with queued_cmd @qc.
3240 *
3241 * LOCKING:
3242 * spin_lock_irqsave(host_set lock)
3243 *
3244 * RETURNS:
3245 * Zero on success, negative on error.
3246 */
3247
3248 static int ata_sg_setup_one(struct ata_queued_cmd *qc)
3249 {
3250 struct ata_port *ap = qc->ap;
3251 int dir = qc->dma_dir;
3252 struct scatterlist *sg = qc->__sg;
3253 dma_addr_t dma_address;
3254 int trim_sg = 0;
3255
3256 /* we must lengthen transfers to end on a 32-bit boundary */
3257 qc->pad_len = sg->length & 3;
3258 if (qc->pad_len) {
3259 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3260 struct scatterlist *psg = &qc->pad_sgent;
3261
3262 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
3263
3264 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3265
3266 if (qc->tf.flags & ATA_TFLAG_WRITE)
3267 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
3268 qc->pad_len);
3269
3270 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3271 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3272 /* trim sg */
3273 sg->length -= qc->pad_len;
3274 if (sg->length == 0)
3275 trim_sg = 1;
3276
3277 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
3278 sg->length, qc->pad_len);
3279 }
3280
3281 if (trim_sg) {
3282 qc->n_elem--;
3283 goto skip_map;
3284 }
3285
3286 dma_address = dma_map_single(ap->dev, qc->buf_virt,
3287 sg->length, dir);
3288 if (dma_mapping_error(dma_address)) {
3289 /* restore sg */
3290 sg->length += qc->pad_len;
3291 return -1;
3292 }
3293
3294 sg_dma_address(sg) = dma_address;
3295 sg_dma_len(sg) = sg->length;
3296
3297 skip_map:
3298 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
3299 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3300
3301 return 0;
3302 }
3303
3304 /**
3305 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
3306 * @qc: Command with scatter-gather table to be mapped.
3307 *
3308 * DMA-map the scatter-gather table associated with queued_cmd @qc.
3309 *
3310 * LOCKING:
3311 * spin_lock_irqsave(host_set lock)
3312 *
3313 * RETURNS:
3314 * Zero on success, negative on error.
3315 *
3316 */
3317
3318 static int ata_sg_setup(struct ata_queued_cmd *qc)
3319 {
3320 struct ata_port *ap = qc->ap;
3321 struct scatterlist *sg = qc->__sg;
3322 struct scatterlist *lsg = &sg[qc->n_elem - 1];
3323 int n_elem, pre_n_elem, dir, trim_sg = 0;
3324
3325 VPRINTK("ENTER, ata%u\n", ap->id);
3326 WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
3327
3328 /* we must lengthen transfers to end on a 32-bit boundary */
3329 qc->pad_len = lsg->length & 3;
3330 if (qc->pad_len) {
3331 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3332 struct scatterlist *psg = &qc->pad_sgent;
3333 unsigned int offset;
3334
3335 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
3336
3337 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3338
3339 /*
3340 * psg->page/offset are used to copy to-be-written
3341 * data in this function or read data in ata_sg_clean.
3342 */
3343 offset = lsg->offset + lsg->length - qc->pad_len;
3344 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
3345 psg->offset = offset_in_page(offset);
3346
3347 if (qc->tf.flags & ATA_TFLAG_WRITE) {
3348 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3349 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
3350 kunmap_atomic(addr, KM_IRQ0);
3351 }
3352
3353 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3354 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3355 /* trim last sg */
3356 lsg->length -= qc->pad_len;
3357 if (lsg->length == 0)
3358 trim_sg = 1;
3359
3360 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
3361 qc->n_elem - 1, lsg->length, qc->pad_len);
3362 }
3363
3364 pre_n_elem = qc->n_elem;
3365 if (trim_sg && pre_n_elem)
3366 pre_n_elem--;
3367
3368 if (!pre_n_elem) {
3369 n_elem = 0;
3370 goto skip_map;
3371 }
3372
3373 dir = qc->dma_dir;
3374 n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir);
3375 if (n_elem < 1) {
3376 /* restore last sg */
3377 lsg->length += qc->pad_len;
3378 return -1;
3379 }
3380
3381 DPRINTK("%d sg elements mapped\n", n_elem);
3382
3383 skip_map:
3384 qc->n_elem = n_elem;
3385
3386 return 0;
3387 }
3388
3389 /**
3390 * ata_poll_qc_complete - turn irq back on and finish qc
3391 * @qc: Command to complete
3392 * @err_mask: ATA status register content
3393 *
3394 * LOCKING:
3395 * None. (grabs host lock)
3396 */
3397
3398 void ata_poll_qc_complete(struct ata_queued_cmd *qc)
3399 {
3400 struct ata_port *ap = qc->ap;
3401 unsigned long flags;
3402
3403 spin_lock_irqsave(&ap->host_set->lock, flags);
3404 ap->flags &= ~ATA_FLAG_NOINTR;
3405 ata_irq_on(ap);
3406 ata_qc_complete(qc);
3407 spin_unlock_irqrestore(&ap->host_set->lock, flags);
3408 }
3409
3410 /**
3411 * ata_pio_poll - poll using PIO, depending on current state
3412 * @qc: qc in progress
3413 *
3414 * LOCKING:
3415 * None. (executing in kernel thread context)
3416 *
3417 * RETURNS:
3418 * timeout value to use
3419 */
3420 static unsigned long ata_pio_poll(struct ata_queued_cmd *qc)
3421 {
3422 struct ata_port *ap = qc->ap;
3423 u8 status;
3424 unsigned int poll_state = HSM_ST_UNKNOWN;
3425 unsigned int reg_state = HSM_ST_UNKNOWN;
3426
3427 switch (ap->hsm_task_state) {
3428 case HSM_ST:
3429 case HSM_ST_POLL:
3430 poll_state = HSM_ST_POLL;
3431 reg_state = HSM_ST;
3432 break;
3433 case HSM_ST_LAST:
3434 case HSM_ST_LAST_POLL:
3435 poll_state = HSM_ST_LAST_POLL;
3436 reg_state = HSM_ST_LAST;
3437 break;
3438 default:
3439 BUG();
3440 break;
3441 }
3442
3443 status = ata_chk_status(ap);
3444 if (status & ATA_BUSY) {
3445 if (time_after(jiffies, ap->pio_task_timeout)) {
3446 qc->err_mask |= AC_ERR_TIMEOUT;
3447 ap->hsm_task_state = HSM_ST_TMOUT;
3448 return 0;
3449 }
3450 ap->hsm_task_state = poll_state;
3451 return ATA_SHORT_PAUSE;
3452 }
3453
3454 ap->hsm_task_state = reg_state;
3455 return 0;
3456 }
3457
3458 /**
3459 * ata_pio_complete - check if drive is busy or idle
3460 * @qc: qc to complete
3461 *
3462 * LOCKING:
3463 * None. (executing in kernel thread context)
3464 *
3465 * RETURNS:
3466 * Non-zero if qc completed, zero otherwise.
3467 */
3468 static int ata_pio_complete(struct ata_queued_cmd *qc)
3469 {
3470 struct ata_port *ap = qc->ap;
3471 u8 drv_stat;
3472
3473 /*
3474 * This is purely heuristic. This is a fast path. Sometimes when
3475 * we enter, BSY will be cleared in a chk-status or two. If not,
3476 * the drive is probably seeking or something. Snooze for a couple
3477 * msecs, then chk-status again. If still busy, fall back to
3478 * HSM_ST_POLL state.
3479 */
3480 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
3481 if (drv_stat & ATA_BUSY) {
3482 msleep(2);
3483 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
3484 if (drv_stat & ATA_BUSY) {
3485 ap->hsm_task_state = HSM_ST_LAST_POLL;
3486 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
3487 return 0;
3488 }
3489 }
3490
3491 drv_stat = ata_wait_idle(ap);
3492 if (!ata_ok(drv_stat)) {
3493 qc->err_mask |= __ac_err_mask(drv_stat);
3494 ap->hsm_task_state = HSM_ST_ERR;
3495 return 0;
3496 }
3497
3498 ap->hsm_task_state = HSM_ST_IDLE;
3499
3500 WARN_ON(qc->err_mask);
3501 ata_poll_qc_complete(qc);
3502
3503 /* another command may start at this point */
3504
3505 return 1;
3506 }
3507
3508
3509 /**
3510 * swap_buf_le16 - swap halves of 16-bit words in place
3511 * @buf: Buffer to swap
3512 * @buf_words: Number of 16-bit words in buffer.
3513 *
3514 * Swap halves of 16-bit words if needed to convert from
3515 * little-endian byte order to native cpu byte order, or
3516 * vice-versa.
3517 *
3518 * LOCKING:
3519 * Inherited from caller.
3520 */
3521 void swap_buf_le16(u16 *buf, unsigned int buf_words)
3522 {
3523 #ifdef __BIG_ENDIAN
3524 unsigned int i;
3525
3526 for (i = 0; i < buf_words; i++)
3527 buf[i] = le16_to_cpu(buf[i]);
3528 #endif /* __BIG_ENDIAN */
3529 }
3530
3531 /**
3532 * ata_mmio_data_xfer - Transfer data by MMIO
3533 * @ap: port to read/write
3534 * @buf: data buffer
3535 * @buflen: buffer length
3536 * @write_data: read/write
3537 *
3538 * Transfer data from/to the device data register by MMIO.
3539 *
3540 * LOCKING:
3541 * Inherited from caller.
3542 */
3543
3544 static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
3545 unsigned int buflen, int write_data)
3546 {
3547 unsigned int i;
3548 unsigned int words = buflen >> 1;
3549 u16 *buf16 = (u16 *) buf;
3550 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
3551
3552 /* Transfer multiple of 2 bytes */
3553 if (write_data) {
3554 for (i = 0; i < words; i++)
3555 writew(le16_to_cpu(buf16[i]), mmio);
3556 } else {
3557 for (i = 0; i < words; i++)
3558 buf16[i] = cpu_to_le16(readw(mmio));
3559 }
3560
3561 /* Transfer trailing 1 byte, if any. */
3562 if (unlikely(buflen & 0x01)) {
3563 u16 align_buf[1] = { 0 };
3564 unsigned char *trailing_buf = buf + buflen - 1;
3565
3566 if (write_data) {
3567 memcpy(align_buf, trailing_buf, 1);
3568 writew(le16_to_cpu(align_buf[0]), mmio);
3569 } else {
3570 align_buf[0] = cpu_to_le16(readw(mmio));
3571 memcpy(trailing_buf, align_buf, 1);
3572 }
3573 }
3574 }
3575
3576 /**
3577 * ata_pio_data_xfer - Transfer data by PIO
3578 * @ap: port to read/write
3579 * @buf: data buffer
3580 * @buflen: buffer length
3581 * @write_data: read/write
3582 *
3583 * Transfer data from/to the device data register by PIO.
3584 *
3585 * LOCKING:
3586 * Inherited from caller.
3587 */
3588
3589 static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
3590 unsigned int buflen, int write_data)
3591 {
3592 unsigned int words = buflen >> 1;
3593
3594 /* Transfer multiple of 2 bytes */
3595 if (write_data)
3596 outsw(ap->ioaddr.data_addr, buf, words);
3597 else
3598 insw(ap->ioaddr.data_addr, buf, words);
3599
3600 /* Transfer trailing 1 byte, if any. */
3601 if (unlikely(buflen & 0x01)) {
3602 u16 align_buf[1] = { 0 };
3603 unsigned char *trailing_buf = buf + buflen - 1;
3604
3605 if (write_data) {
3606 memcpy(align_buf, trailing_buf, 1);
3607 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
3608 } else {
3609 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
3610 memcpy(trailing_buf, align_buf, 1);
3611 }
3612 }
3613 }
3614
3615 /**
3616 * ata_data_xfer - Transfer data from/to the data register.
3617 * @ap: port to read/write
3618 * @buf: data buffer
3619 * @buflen: buffer length
3620 * @do_write: read/write
3621 *
3622 * Transfer data from/to the device data register.
3623 *
3624 * LOCKING:
3625 * Inherited from caller.
3626 */
3627
3628 static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
3629 unsigned int buflen, int do_write)
3630 {
3631 /* Make the crap hardware pay the costs not the good stuff */
3632 if (unlikely(ap->flags & ATA_FLAG_IRQ_MASK)) {
3633 unsigned long flags;
3634 local_irq_save(flags);
3635 if (ap->flags & ATA_FLAG_MMIO)
3636 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3637 else
3638 ata_pio_data_xfer(ap, buf, buflen, do_write);
3639 local_irq_restore(flags);
3640 } else {
3641 if (ap->flags & ATA_FLAG_MMIO)
3642 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3643 else
3644 ata_pio_data_xfer(ap, buf, buflen, do_write);
3645 }
3646 }
3647
3648 /**
3649 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
3650 * @qc: Command on going
3651 *
3652 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3653 *
3654 * LOCKING:
3655 * Inherited from caller.
3656 */
3657
3658 static void ata_pio_sector(struct ata_queued_cmd *qc)
3659 {
3660 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3661 struct scatterlist *sg = qc->__sg;
3662 struct ata_port *ap = qc->ap;
3663 struct page *page;
3664 unsigned int offset;
3665 unsigned char *buf;
3666
3667 if (qc->cursect == (qc->nsect - 1))
3668 ap->hsm_task_state = HSM_ST_LAST;
3669
3670 page = sg[qc->cursg].page;
3671 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
3672
3673 /* get the current page and offset */
3674 page = nth_page(page, (offset >> PAGE_SHIFT));
3675 offset %= PAGE_SIZE;
3676
3677 buf = kmap(page) + offset;
3678
3679 qc->cursect++;
3680 qc->cursg_ofs++;
3681
3682 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
3683 qc->cursg++;
3684 qc->cursg_ofs = 0;
3685 }
3686
3687 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3688
3689 /* do the actual data transfer */
3690 do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3691 ata_data_xfer(ap, buf, ATA_SECT_SIZE, do_write);
3692
3693 kunmap(page);
3694 }
3695
3696 /**
3697 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
3698 * @qc: Command on going
3699 * @bytes: number of bytes
3700 *
3701 * Transfer Transfer data from/to the ATAPI device.
3702 *
3703 * LOCKING:
3704 * Inherited from caller.
3705 *
3706 */
3707
3708 static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
3709 {
3710 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3711 struct scatterlist *sg = qc->__sg;
3712 struct ata_port *ap = qc->ap;
3713 struct page *page;
3714 unsigned char *buf;
3715 unsigned int offset, count;
3716
3717 if (qc->curbytes + bytes >= qc->nbytes)
3718 ap->hsm_task_state = HSM_ST_LAST;
3719
3720 next_sg:
3721 if (unlikely(qc->cursg >= qc->n_elem)) {
3722 /*
3723 * The end of qc->sg is reached and the device expects
3724 * more data to transfer. In order not to overrun qc->sg
3725 * and fulfill length specified in the byte count register,
3726 * - for read case, discard trailing data from the device
3727 * - for write case, padding zero data to the device
3728 */
3729 u16 pad_buf[1] = { 0 };
3730 unsigned int words = bytes >> 1;
3731 unsigned int i;
3732
3733 if (words) /* warning if bytes > 1 */
3734 printk(KERN_WARNING "ata%u: %u bytes trailing data\n",
3735 ap->id, bytes);
3736
3737 for (i = 0; i < words; i++)
3738 ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write);
3739
3740 ap->hsm_task_state = HSM_ST_LAST;
3741 return;
3742 }
3743
3744 sg = &qc->__sg[qc->cursg];
3745
3746 page = sg->page;
3747 offset = sg->offset + qc->cursg_ofs;
3748
3749 /* get the current page and offset */
3750 page = nth_page(page, (offset >> PAGE_SHIFT));
3751 offset %= PAGE_SIZE;
3752
3753 /* don't overrun current sg */
3754 count = min(sg->length - qc->cursg_ofs, bytes);
3755
3756 /* don't cross page boundaries */
3757 count = min(count, (unsigned int)PAGE_SIZE - offset);
3758
3759 buf = kmap(page) + offset;
3760
3761 bytes -= count;
3762 qc->curbytes += count;
3763 qc->cursg_ofs += count;
3764
3765 if (qc->cursg_ofs == sg->length) {
3766 qc->cursg++;
3767 qc->cursg_ofs = 0;
3768 }
3769
3770 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3771
3772 /* do the actual data transfer */
3773 ata_data_xfer(ap, buf, count, do_write);
3774
3775 kunmap(page);
3776
3777 if (bytes)
3778 goto next_sg;
3779 }
3780
3781 /**
3782 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
3783 * @qc: Command on going
3784 *
3785 * Transfer Transfer data from/to the ATAPI device.
3786 *
3787 * LOCKING:
3788 * Inherited from caller.
3789 */
3790
3791 static void atapi_pio_bytes(struct ata_queued_cmd *qc)
3792 {
3793 struct ata_port *ap = qc->ap;
3794 struct ata_device *dev = qc->dev;
3795 unsigned int ireason, bc_lo, bc_hi, bytes;
3796 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
3797
3798 ap->ops->tf_read(ap, &qc->tf);
3799 ireason = qc->tf.nsect;
3800 bc_lo = qc->tf.lbam;
3801 bc_hi = qc->tf.lbah;
3802 bytes = (bc_hi << 8) | bc_lo;
3803
3804 /* shall be cleared to zero, indicating xfer of data */
3805 if (ireason & (1 << 0))
3806 goto err_out;
3807
3808 /* make sure transfer direction matches expected */
3809 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
3810 if (do_write != i_write)
3811 goto err_out;
3812
3813 __atapi_pio_bytes(qc, bytes);
3814
3815 return;
3816
3817 err_out:
3818 printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n",
3819 ap->id, dev->devno);
3820 qc->err_mask |= AC_ERR_HSM;
3821 ap->hsm_task_state = HSM_ST_ERR;
3822 }
3823
3824 /**
3825 * ata_pio_block - start PIO on a block
3826 * @qc: qc to transfer block for
3827 *
3828 * LOCKING:
3829 * None. (executing in kernel thread context)
3830 */
3831 static void ata_pio_block(struct ata_queued_cmd *qc)
3832 {
3833 struct ata_port *ap = qc->ap;
3834 u8 status;
3835
3836 /*
3837 * This is purely heuristic. This is a fast path.
3838 * Sometimes when we enter, BSY will be cleared in
3839 * a chk-status or two. If not, the drive is probably seeking
3840 * or something. Snooze for a couple msecs, then
3841 * chk-status again. If still busy, fall back to
3842 * HSM_ST_POLL state.
3843 */
3844 status = ata_busy_wait(ap, ATA_BUSY, 5);
3845 if (status & ATA_BUSY) {
3846 msleep(2);
3847 status = ata_busy_wait(ap, ATA_BUSY, 10);
3848 if (status & ATA_BUSY) {
3849 ap->hsm_task_state = HSM_ST_POLL;
3850 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
3851 return;
3852 }
3853 }
3854
3855 /* check error */
3856 if (status & (ATA_ERR | ATA_DF)) {
3857 qc->err_mask |= AC_ERR_DEV;
3858 ap->hsm_task_state = HSM_ST_ERR;
3859 return;
3860 }
3861
3862 /* transfer data if any */
3863 if (is_atapi_taskfile(&qc->tf)) {
3864 /* DRQ=0 means no more data to transfer */
3865 if ((status & ATA_DRQ) == 0) {
3866 ap->hsm_task_state = HSM_ST_LAST;
3867 return;
3868 }
3869
3870 atapi_pio_bytes(qc);
3871 } else {
3872 /* handle BSY=0, DRQ=0 as error */
3873 if ((status & ATA_DRQ) == 0) {
3874 qc->err_mask |= AC_ERR_HSM;
3875 ap->hsm_task_state = HSM_ST_ERR;
3876 return;
3877 }
3878
3879 ata_pio_sector(qc);
3880 }
3881 }
3882
3883 static void ata_pio_error(struct ata_queued_cmd *qc)
3884 {
3885 struct ata_port *ap = qc->ap;
3886
3887 if (qc->tf.command != ATA_CMD_PACKET)
3888 printk(KERN_WARNING "ata%u: dev %u PIO error\n",
3889 ap->id, qc->dev->devno);
3890
3891 /* make sure qc->err_mask is available to
3892 * know what's wrong and recover
3893 */
3894 WARN_ON(qc->err_mask == 0);
3895
3896 ap->hsm_task_state = HSM_ST_IDLE;
3897
3898 ata_poll_qc_complete(qc);
3899 }
3900
3901 static void ata_pio_task(void *_data)
3902 {
3903 struct ata_queued_cmd *qc = _data;
3904 struct ata_port *ap = qc->ap;
3905 unsigned long timeout;
3906 int qc_completed;
3907
3908 fsm_start:
3909 timeout = 0;
3910 qc_completed = 0;
3911
3912 switch (ap->hsm_task_state) {
3913 case HSM_ST_IDLE:
3914 return;
3915
3916 case HSM_ST:
3917 ata_pio_block(qc);
3918 break;
3919
3920 case HSM_ST_LAST:
3921 qc_completed = ata_pio_complete(qc);
3922 break;
3923
3924 case HSM_ST_POLL:
3925 case HSM_ST_LAST_POLL:
3926 timeout = ata_pio_poll(qc);
3927 break;
3928
3929 case HSM_ST_TMOUT:
3930 case HSM_ST_ERR:
3931 ata_pio_error(qc);
3932 return;
3933 }
3934
3935 if (timeout)
3936 ata_port_queue_task(ap, ata_pio_task, qc, timeout);
3937 else if (!qc_completed)
3938 goto fsm_start;
3939 }
3940
3941 /**
3942 * atapi_packet_task - Write CDB bytes to hardware
3943 * @_data: qc in progress
3944 *
3945 * When device has indicated its readiness to accept
3946 * a CDB, this function is called. Send the CDB.
3947 * If DMA is to be performed, exit immediately.
3948 * Otherwise, we are in polling mode, so poll
3949 * status under operation succeeds or fails.
3950 *
3951 * LOCKING:
3952 * Kernel thread context (may sleep)
3953 */
3954 static void atapi_packet_task(void *_data)
3955 {
3956 struct ata_queued_cmd *qc = _data;
3957 struct ata_port *ap = qc->ap;
3958 u8 status;
3959
3960 /* sleep-wait for BSY to clear */
3961 DPRINTK("busy wait\n");
3962 if (ata_busy_sleep(ap, ATA_TMOUT_CDB_QUICK, ATA_TMOUT_CDB)) {
3963 qc->err_mask |= AC_ERR_TIMEOUT;
3964 goto err_out;
3965 }
3966
3967 /* make sure DRQ is set */
3968 status = ata_chk_status(ap);
3969 if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ) {
3970 qc->err_mask |= AC_ERR_HSM;
3971 goto err_out;
3972 }
3973
3974 /* send SCSI cdb */
3975 DPRINTK("send cdb\n");
3976 WARN_ON(qc->dev->cdb_len < 12);
3977
3978 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA ||
3979 qc->tf.protocol == ATA_PROT_ATAPI_NODATA) {
3980 unsigned long flags;
3981
3982 /* Once we're done issuing command and kicking bmdma,
3983 * irq handler takes over. To not lose irq, we need
3984 * to clear NOINTR flag before sending cdb, but
3985 * interrupt handler shouldn't be invoked before we're
3986 * finished. Hence, the following locking.
3987 */
3988 spin_lock_irqsave(&ap->host_set->lock, flags);
3989 ap->flags &= ~ATA_FLAG_NOINTR;
3990 ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
3991 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA)
3992 ap->ops->bmdma_start(qc); /* initiate bmdma */
3993 spin_unlock_irqrestore(&ap->host_set->lock, flags);
3994 } else {
3995 ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
3996
3997 /* PIO commands are handled by polling */
3998 ap->hsm_task_state = HSM_ST;
3999 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4000 }
4001
4002 return;
4003
4004 err_out:
4005 ata_poll_qc_complete(qc);
4006 }
4007
4008 /**
4009 * ata_qc_new - Request an available ATA command, for queueing
4010 * @ap: Port associated with device @dev
4011 * @dev: Device from whom we request an available command structure
4012 *
4013 * LOCKING:
4014 * None.
4015 */
4016
4017 static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
4018 {
4019 struct ata_queued_cmd *qc = NULL;
4020 unsigned int i;
4021
4022 for (i = 0; i < ATA_MAX_QUEUE; i++)
4023 if (!test_and_set_bit(i, &ap->qactive)) {
4024 qc = ata_qc_from_tag(ap, i);
4025 break;
4026 }
4027
4028 if (qc)
4029 qc->tag = i;
4030
4031 return qc;
4032 }
4033
4034 /**
4035 * ata_qc_new_init - Request an available ATA command, and initialize it
4036 * @ap: Port associated with device @dev
4037 * @dev: Device from whom we request an available command structure
4038 *
4039 * LOCKING:
4040 * None.
4041 */
4042
4043 struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap,
4044 struct ata_device *dev)
4045 {
4046 struct ata_queued_cmd *qc;
4047
4048 qc = ata_qc_new(ap);
4049 if (qc) {
4050 qc->scsicmd = NULL;
4051 qc->ap = ap;
4052 qc->dev = dev;
4053
4054 ata_qc_reinit(qc);
4055 }
4056
4057 return qc;
4058 }
4059
4060 /**
4061 * ata_qc_free - free unused ata_queued_cmd
4062 * @qc: Command to complete
4063 *
4064 * Designed to free unused ata_queued_cmd object
4065 * in case something prevents using it.
4066 *
4067 * LOCKING:
4068 * spin_lock_irqsave(host_set lock)
4069 */
4070 void ata_qc_free(struct ata_queued_cmd *qc)
4071 {
4072 struct ata_port *ap = qc->ap;
4073 unsigned int tag;
4074
4075 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4076
4077 qc->flags = 0;
4078 tag = qc->tag;
4079 if (likely(ata_tag_valid(tag))) {
4080 qc->tag = ATA_TAG_POISON;
4081 clear_bit(tag, &ap->qactive);
4082 }
4083 }
4084
4085 void __ata_qc_complete(struct ata_queued_cmd *qc)
4086 {
4087 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4088 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
4089
4090 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
4091 ata_sg_clean(qc);
4092
4093 /* command should be marked inactive atomically with qc completion */
4094 qc->ap->active_tag = ATA_TAG_POISON;
4095
4096 /* atapi: mark qc as inactive to prevent the interrupt handler
4097 * from completing the command twice later, before the error handler
4098 * is called. (when rc != 0 and atapi request sense is needed)
4099 */
4100 qc->flags &= ~ATA_QCFLAG_ACTIVE;
4101
4102 /* call completion callback */
4103 qc->complete_fn(qc);
4104 }
4105
4106 static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
4107 {
4108 struct ata_port *ap = qc->ap;
4109
4110 switch (qc->tf.protocol) {
4111 case ATA_PROT_DMA:
4112 case ATA_PROT_ATAPI_DMA:
4113 return 1;
4114
4115 case ATA_PROT_ATAPI:
4116 case ATA_PROT_PIO:
4117 if (ap->flags & ATA_FLAG_PIO_DMA)
4118 return 1;
4119
4120 /* fall through */
4121
4122 default:
4123 return 0;
4124 }
4125
4126 /* never reached */
4127 }
4128
4129 /**
4130 * ata_qc_issue - issue taskfile to device
4131 * @qc: command to issue to device
4132 *
4133 * Prepare an ATA command to submission to device.
4134 * This includes mapping the data into a DMA-able
4135 * area, filling in the S/G table, and finally
4136 * writing the taskfile to hardware, starting the command.
4137 *
4138 * LOCKING:
4139 * spin_lock_irqsave(host_set lock)
4140 */
4141 void ata_qc_issue(struct ata_queued_cmd *qc)
4142 {
4143 struct ata_port *ap = qc->ap;
4144
4145 qc->ap->active_tag = qc->tag;
4146 qc->flags |= ATA_QCFLAG_ACTIVE;
4147
4148 if (ata_should_dma_map(qc)) {
4149 if (qc->flags & ATA_QCFLAG_SG) {
4150 if (ata_sg_setup(qc))
4151 goto sg_err;
4152 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
4153 if (ata_sg_setup_one(qc))
4154 goto sg_err;
4155 }
4156 } else {
4157 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4158 }
4159
4160 ap->ops->qc_prep(qc);
4161
4162 qc->err_mask |= ap->ops->qc_issue(qc);
4163 if (unlikely(qc->err_mask))
4164 goto err;
4165 return;
4166
4167 sg_err:
4168 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4169 qc->err_mask |= AC_ERR_SYSTEM;
4170 err:
4171 ata_qc_complete(qc);
4172 }
4173
4174 /**
4175 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
4176 * @qc: command to issue to device
4177 *
4178 * Using various libata functions and hooks, this function
4179 * starts an ATA command. ATA commands are grouped into
4180 * classes called "protocols", and issuing each type of protocol
4181 * is slightly different.
4182 *
4183 * May be used as the qc_issue() entry in ata_port_operations.
4184 *
4185 * LOCKING:
4186 * spin_lock_irqsave(host_set lock)
4187 *
4188 * RETURNS:
4189 * Zero on success, AC_ERR_* mask on failure
4190 */
4191
4192 unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
4193 {
4194 struct ata_port *ap = qc->ap;
4195
4196 ata_dev_select(ap, qc->dev->devno, 1, 0);
4197
4198 switch (qc->tf.protocol) {
4199 case ATA_PROT_NODATA:
4200 ata_tf_to_host(ap, &qc->tf);
4201 break;
4202
4203 case ATA_PROT_DMA:
4204 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4205 ap->ops->bmdma_setup(qc); /* set up bmdma */
4206 ap->ops->bmdma_start(qc); /* initiate bmdma */
4207 break;
4208
4209 case ATA_PROT_PIO: /* load tf registers, initiate polling pio */
4210 ata_qc_set_polling(qc);
4211 ata_tf_to_host(ap, &qc->tf);
4212 ap->hsm_task_state = HSM_ST;
4213 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4214 break;
4215
4216 case ATA_PROT_ATAPI:
4217 ata_qc_set_polling(qc);
4218 ata_tf_to_host(ap, &qc->tf);
4219 ata_port_queue_task(ap, atapi_packet_task, qc, 0);
4220 break;
4221
4222 case ATA_PROT_ATAPI_NODATA:
4223 ap->flags |= ATA_FLAG_NOINTR;
4224 ata_tf_to_host(ap, &qc->tf);
4225 ata_port_queue_task(ap, atapi_packet_task, qc, 0);
4226 break;
4227
4228 case ATA_PROT_ATAPI_DMA:
4229 ap->flags |= ATA_FLAG_NOINTR;
4230 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4231 ap->ops->bmdma_setup(qc); /* set up bmdma */
4232 ata_port_queue_task(ap, atapi_packet_task, qc, 0);
4233 break;
4234
4235 default:
4236 WARN_ON(1);
4237 return AC_ERR_SYSTEM;
4238 }
4239
4240 return 0;
4241 }
4242
4243 /**
4244 * ata_host_intr - Handle host interrupt for given (port, task)
4245 * @ap: Port on which interrupt arrived (possibly...)
4246 * @qc: Taskfile currently active in engine
4247 *
4248 * Handle host interrupt for given queued command. Currently,
4249 * only DMA interrupts are handled. All other commands are
4250 * handled via polling with interrupts disabled (nIEN bit).
4251 *
4252 * LOCKING:
4253 * spin_lock_irqsave(host_set lock)
4254 *
4255 * RETURNS:
4256 * One if interrupt was handled, zero if not (shared irq).
4257 */
4258
4259 inline unsigned int ata_host_intr (struct ata_port *ap,
4260 struct ata_queued_cmd *qc)
4261 {
4262 u8 status, host_stat;
4263
4264 switch (qc->tf.protocol) {
4265
4266 case ATA_PROT_DMA:
4267 case ATA_PROT_ATAPI_DMA:
4268 case ATA_PROT_ATAPI:
4269 /* check status of DMA engine */
4270 host_stat = ap->ops->bmdma_status(ap);
4271 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
4272
4273 /* if it's not our irq... */
4274 if (!(host_stat & ATA_DMA_INTR))
4275 goto idle_irq;
4276
4277 /* before we do anything else, clear DMA-Start bit */
4278 ap->ops->bmdma_stop(qc);
4279
4280 /* fall through */
4281
4282 case ATA_PROT_ATAPI_NODATA:
4283 case ATA_PROT_NODATA:
4284 /* check altstatus */
4285 status = ata_altstatus(ap);
4286 if (status & ATA_BUSY)
4287 goto idle_irq;
4288
4289 /* check main status, clearing INTRQ */
4290 status = ata_chk_status(ap);
4291 if (unlikely(status & ATA_BUSY))
4292 goto idle_irq;
4293 DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n",
4294 ap->id, qc->tf.protocol, status);
4295
4296 /* ack bmdma irq events */
4297 ap->ops->irq_clear(ap);
4298
4299 /* complete taskfile transaction */
4300 qc->err_mask |= ac_err_mask(status);
4301 ata_qc_complete(qc);
4302 break;
4303
4304 default:
4305 goto idle_irq;
4306 }
4307
4308 return 1; /* irq handled */
4309
4310 idle_irq:
4311 ap->stats.idle_irq++;
4312
4313 #ifdef ATA_IRQ_TRAP
4314 if ((ap->stats.idle_irq % 1000) == 0) {
4315 ata_irq_ack(ap, 0); /* debug trap */
4316 printk(KERN_WARNING "ata%d: irq trap\n", ap->id);
4317 return 1;
4318 }
4319 #endif
4320 return 0; /* irq not handled */
4321 }
4322
4323 /**
4324 * ata_interrupt - Default ATA host interrupt handler
4325 * @irq: irq line (unused)
4326 * @dev_instance: pointer to our ata_host_set information structure
4327 * @regs: unused
4328 *
4329 * Default interrupt handler for PCI IDE devices. Calls
4330 * ata_host_intr() for each port that is not disabled.
4331 *
4332 * LOCKING:
4333 * Obtains host_set lock during operation.
4334 *
4335 * RETURNS:
4336 * IRQ_NONE or IRQ_HANDLED.
4337 */
4338
4339 irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
4340 {
4341 struct ata_host_set *host_set = dev_instance;
4342 unsigned int i;
4343 unsigned int handled = 0;
4344 unsigned long flags;
4345
4346 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
4347 spin_lock_irqsave(&host_set->lock, flags);
4348
4349 for (i = 0; i < host_set->n_ports; i++) {
4350 struct ata_port *ap;
4351
4352 ap = host_set->ports[i];
4353 if (ap &&
4354 !(ap->flags & (ATA_FLAG_DISABLED | ATA_FLAG_NOINTR))) {
4355 struct ata_queued_cmd *qc;
4356
4357 qc = ata_qc_from_tag(ap, ap->active_tag);
4358 if (qc && (!(qc->tf.ctl & ATA_NIEN)) &&
4359 (qc->flags & ATA_QCFLAG_ACTIVE))
4360 handled |= ata_host_intr(ap, qc);
4361 }
4362 }
4363
4364 spin_unlock_irqrestore(&host_set->lock, flags);
4365
4366 return IRQ_RETVAL(handled);
4367 }
4368
4369
4370 /*
4371 * Execute a 'simple' command, that only consists of the opcode 'cmd' itself,
4372 * without filling any other registers
4373 */
4374 static int ata_do_simple_cmd(struct ata_port *ap, struct ata_device *dev,
4375 u8 cmd)
4376 {
4377 struct ata_taskfile tf;
4378 int err;
4379
4380 ata_tf_init(ap, &tf, dev->devno);
4381
4382 tf.command = cmd;
4383 tf.flags |= ATA_TFLAG_DEVICE;
4384 tf.protocol = ATA_PROT_NODATA;
4385
4386 err = ata_exec_internal(ap, dev, &tf, NULL, DMA_NONE, NULL, 0);
4387 if (err)
4388 printk(KERN_ERR "%s: ata command failed: %d\n",
4389 __FUNCTION__, err);
4390
4391 return err;
4392 }
4393
4394 static int ata_flush_cache(struct ata_port *ap, struct ata_device *dev)
4395 {
4396 u8 cmd;
4397
4398 if (!ata_try_flush_cache(dev))
4399 return 0;
4400
4401 if (ata_id_has_flush_ext(dev->id))
4402 cmd = ATA_CMD_FLUSH_EXT;
4403 else
4404 cmd = ATA_CMD_FLUSH;
4405
4406 return ata_do_simple_cmd(ap, dev, cmd);
4407 }
4408
4409 static int ata_standby_drive(struct ata_port *ap, struct ata_device *dev)
4410 {
4411 return ata_do_simple_cmd(ap, dev, ATA_CMD_STANDBYNOW1);
4412 }
4413
4414 static int ata_start_drive(struct ata_port *ap, struct ata_device *dev)
4415 {
4416 return ata_do_simple_cmd(ap, dev, ATA_CMD_IDLEIMMEDIATE);
4417 }
4418
4419 /**
4420 * ata_device_resume - wakeup a previously suspended devices
4421 * @ap: port the device is connected to
4422 * @dev: the device to resume
4423 *
4424 * Kick the drive back into action, by sending it an idle immediate
4425 * command and making sure its transfer mode matches between drive
4426 * and host.
4427 *
4428 */
4429 int ata_device_resume(struct ata_port *ap, struct ata_device *dev)
4430 {
4431 if (ap->flags & ATA_FLAG_SUSPENDED) {
4432 struct ata_device *failed_dev;
4433 ap->flags &= ~ATA_FLAG_SUSPENDED;
4434 while (ata_set_mode(ap, &failed_dev))
4435 ata_dev_disable(ap, failed_dev);
4436 }
4437 if (!ata_dev_enabled(dev))
4438 return 0;
4439 if (dev->class == ATA_DEV_ATA)
4440 ata_start_drive(ap, dev);
4441
4442 return 0;
4443 }
4444
4445 /**
4446 * ata_device_suspend - prepare a device for suspend
4447 * @ap: port the device is connected to
4448 * @dev: the device to suspend
4449 *
4450 * Flush the cache on the drive, if appropriate, then issue a
4451 * standbynow command.
4452 */
4453 int ata_device_suspend(struct ata_port *ap, struct ata_device *dev, pm_message_t state)
4454 {
4455 if (!ata_dev_enabled(dev))
4456 return 0;
4457 if (dev->class == ATA_DEV_ATA)
4458 ata_flush_cache(ap, dev);
4459
4460 if (state.event != PM_EVENT_FREEZE)
4461 ata_standby_drive(ap, dev);
4462 ap->flags |= ATA_FLAG_SUSPENDED;
4463 return 0;
4464 }
4465
4466 /**
4467 * ata_port_start - Set port up for dma.
4468 * @ap: Port to initialize
4469 *
4470 * Called just after data structures for each port are
4471 * initialized. Allocates space for PRD table.
4472 *
4473 * May be used as the port_start() entry in ata_port_operations.
4474 *
4475 * LOCKING:
4476 * Inherited from caller.
4477 */
4478
4479 int ata_port_start (struct ata_port *ap)
4480 {
4481 struct device *dev = ap->dev;
4482 int rc;
4483
4484 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
4485 if (!ap->prd)
4486 return -ENOMEM;
4487
4488 rc = ata_pad_alloc(ap, dev);
4489 if (rc) {
4490 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
4491 return rc;
4492 }
4493
4494 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
4495
4496 return 0;
4497 }
4498
4499
4500 /**
4501 * ata_port_stop - Undo ata_port_start()
4502 * @ap: Port to shut down
4503 *
4504 * Frees the PRD table.
4505 *
4506 * May be used as the port_stop() entry in ata_port_operations.
4507 *
4508 * LOCKING:
4509 * Inherited from caller.
4510 */
4511
4512 void ata_port_stop (struct ata_port *ap)
4513 {
4514 struct device *dev = ap->dev;
4515
4516 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
4517 ata_pad_free(ap, dev);
4518 }
4519
4520 void ata_host_stop (struct ata_host_set *host_set)
4521 {
4522 if (host_set->mmio_base)
4523 iounmap(host_set->mmio_base);
4524 }
4525
4526
4527 /**
4528 * ata_host_remove - Unregister SCSI host structure with upper layers
4529 * @ap: Port to unregister
4530 * @do_unregister: 1 if we fully unregister, 0 to just stop the port
4531 *
4532 * LOCKING:
4533 * Inherited from caller.
4534 */
4535
4536 static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
4537 {
4538 struct Scsi_Host *sh = ap->host;
4539
4540 DPRINTK("ENTER\n");
4541
4542 if (do_unregister)
4543 scsi_remove_host(sh);
4544
4545 ap->ops->port_stop(ap);
4546 }
4547
4548 /**
4549 * ata_host_init - Initialize an ata_port structure
4550 * @ap: Structure to initialize
4551 * @host: associated SCSI mid-layer structure
4552 * @host_set: Collection of hosts to which @ap belongs
4553 * @ent: Probe information provided by low-level driver
4554 * @port_no: Port number associated with this ata_port
4555 *
4556 * Initialize a new ata_port structure, and its associated
4557 * scsi_host.
4558 *
4559 * LOCKING:
4560 * Inherited from caller.
4561 */
4562
4563 static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
4564 struct ata_host_set *host_set,
4565 const struct ata_probe_ent *ent, unsigned int port_no)
4566 {
4567 unsigned int i;
4568
4569 host->max_id = 16;
4570 host->max_lun = 1;
4571 host->max_channel = 1;
4572 host->unique_id = ata_unique_id++;
4573 host->max_cmd_len = 12;
4574
4575 ap->flags = ATA_FLAG_DISABLED;
4576 ap->id = host->unique_id;
4577 ap->host = host;
4578 ap->ctl = ATA_DEVCTL_OBS;
4579 ap->host_set = host_set;
4580 ap->dev = ent->dev;
4581 ap->port_no = port_no;
4582 ap->hard_port_no =
4583 ent->legacy_mode ? ent->hard_port_no : port_no;
4584 ap->pio_mask = ent->pio_mask;
4585 ap->mwdma_mask = ent->mwdma_mask;
4586 ap->udma_mask = ent->udma_mask;
4587 ap->flags |= ent->host_flags;
4588 ap->ops = ent->port_ops;
4589 ap->cbl = ATA_CBL_NONE;
4590 ap->sata_spd_limit = UINT_MAX;
4591 ap->active_tag = ATA_TAG_POISON;
4592 ap->last_ctl = 0xFF;
4593
4594 INIT_WORK(&ap->port_task, NULL, NULL);
4595 INIT_LIST_HEAD(&ap->eh_done_q);
4596
4597 for (i = 0; i < ATA_MAX_DEVICES; i++) {
4598 struct ata_device *dev = &ap->device[i];
4599 dev->devno = i;
4600 dev->pio_mask = UINT_MAX;
4601 dev->mwdma_mask = UINT_MAX;
4602 dev->udma_mask = UINT_MAX;
4603 }
4604
4605 #ifdef ATA_IRQ_TRAP
4606 ap->stats.unhandled_irq = 1;
4607 ap->stats.idle_irq = 1;
4608 #endif
4609
4610 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
4611 }
4612
4613 /**
4614 * ata_host_add - Attach low-level ATA driver to system
4615 * @ent: Information provided by low-level driver
4616 * @host_set: Collections of ports to which we add
4617 * @port_no: Port number associated with this host
4618 *
4619 * Attach low-level ATA driver to system.
4620 *
4621 * LOCKING:
4622 * PCI/etc. bus probe sem.
4623 *
4624 * RETURNS:
4625 * New ata_port on success, for NULL on error.
4626 */
4627
4628 static struct ata_port * ata_host_add(const struct ata_probe_ent *ent,
4629 struct ata_host_set *host_set,
4630 unsigned int port_no)
4631 {
4632 struct Scsi_Host *host;
4633 struct ata_port *ap;
4634 int rc;
4635
4636 DPRINTK("ENTER\n");
4637
4638 if (!ent->port_ops->probe_reset &&
4639 !(ent->host_flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST))) {
4640 printk(KERN_ERR "ata%u: no reset mechanism available\n",
4641 port_no);
4642 return NULL;
4643 }
4644
4645 host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
4646 if (!host)
4647 return NULL;
4648
4649 host->transportt = &ata_scsi_transport_template;
4650
4651 ap = ata_shost_to_port(host);
4652
4653 ata_host_init(ap, host, host_set, ent, port_no);
4654
4655 rc = ap->ops->port_start(ap);
4656 if (rc)
4657 goto err_out;
4658
4659 return ap;
4660
4661 err_out:
4662 scsi_host_put(host);
4663 return NULL;
4664 }
4665
4666 /**
4667 * ata_device_add - Register hardware device with ATA and SCSI layers
4668 * @ent: Probe information describing hardware device to be registered
4669 *
4670 * This function processes the information provided in the probe
4671 * information struct @ent, allocates the necessary ATA and SCSI
4672 * host information structures, initializes them, and registers
4673 * everything with requisite kernel subsystems.
4674 *
4675 * This function requests irqs, probes the ATA bus, and probes
4676 * the SCSI bus.
4677 *
4678 * LOCKING:
4679 * PCI/etc. bus probe sem.
4680 *
4681 * RETURNS:
4682 * Number of ports registered. Zero on error (no ports registered).
4683 */
4684
4685 int ata_device_add(const struct ata_probe_ent *ent)
4686 {
4687 unsigned int count = 0, i;
4688 struct device *dev = ent->dev;
4689 struct ata_host_set *host_set;
4690
4691 DPRINTK("ENTER\n");
4692 /* alloc a container for our list of ATA ports (buses) */
4693 host_set = kzalloc(sizeof(struct ata_host_set) +
4694 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
4695 if (!host_set)
4696 return 0;
4697 spin_lock_init(&host_set->lock);
4698
4699 host_set->dev = dev;
4700 host_set->n_ports = ent->n_ports;
4701 host_set->irq = ent->irq;
4702 host_set->mmio_base = ent->mmio_base;
4703 host_set->private_data = ent->private_data;
4704 host_set->ops = ent->port_ops;
4705 host_set->flags = ent->host_set_flags;
4706
4707 /* register each port bound to this device */
4708 for (i = 0; i < ent->n_ports; i++) {
4709 struct ata_port *ap;
4710 unsigned long xfer_mode_mask;
4711
4712 ap = ata_host_add(ent, host_set, i);
4713 if (!ap)
4714 goto err_out;
4715
4716 host_set->ports[i] = ap;
4717 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
4718 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
4719 (ap->pio_mask << ATA_SHIFT_PIO);
4720
4721 /* print per-port info to dmesg */
4722 printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX "
4723 "bmdma 0x%lX irq %lu\n",
4724 ap->id,
4725 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
4726 ata_mode_string(xfer_mode_mask),
4727 ap->ioaddr.cmd_addr,
4728 ap->ioaddr.ctl_addr,
4729 ap->ioaddr.bmdma_addr,
4730 ent->irq);
4731
4732 ata_chk_status(ap);
4733 host_set->ops->irq_clear(ap);
4734 count++;
4735 }
4736
4737 if (!count)
4738 goto err_free_ret;
4739
4740 /* obtain irq, that is shared between channels */
4741 if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
4742 DRV_NAME, host_set))
4743 goto err_out;
4744
4745 /* perform each probe synchronously */
4746 DPRINTK("probe begin\n");
4747 for (i = 0; i < count; i++) {
4748 struct ata_port *ap;
4749 int rc;
4750
4751 ap = host_set->ports[i];
4752
4753 DPRINTK("ata%u: bus probe begin\n", ap->id);
4754 rc = ata_bus_probe(ap);
4755 DPRINTK("ata%u: bus probe end\n", ap->id);
4756
4757 if (rc) {
4758 /* FIXME: do something useful here?
4759 * Current libata behavior will
4760 * tear down everything when
4761 * the module is removed
4762 * or the h/w is unplugged.
4763 */
4764 }
4765
4766 rc = scsi_add_host(ap->host, dev);
4767 if (rc) {
4768 printk(KERN_ERR "ata%u: scsi_add_host failed\n",
4769 ap->id);
4770 /* FIXME: do something useful here */
4771 /* FIXME: handle unconditional calls to
4772 * scsi_scan_host and ata_host_remove, below,
4773 * at the very least
4774 */
4775 }
4776 }
4777
4778 /* probes are done, now scan each port's disk(s) */
4779 DPRINTK("host probe begin\n");
4780 for (i = 0; i < count; i++) {
4781 struct ata_port *ap = host_set->ports[i];
4782
4783 ata_scsi_scan_host(ap);
4784 }
4785
4786 dev_set_drvdata(dev, host_set);
4787
4788 VPRINTK("EXIT, returning %u\n", ent->n_ports);
4789 return ent->n_ports; /* success */
4790
4791 err_out:
4792 for (i = 0; i < count; i++) {
4793 ata_host_remove(host_set->ports[i], 1);
4794 scsi_host_put(host_set->ports[i]->host);
4795 }
4796 err_free_ret:
4797 kfree(host_set);
4798 VPRINTK("EXIT, returning 0\n");
4799 return 0;
4800 }
4801
4802 /**
4803 * ata_host_set_remove - PCI layer callback for device removal
4804 * @host_set: ATA host set that was removed
4805 *
4806 * Unregister all objects associated with this host set. Free those
4807 * objects.
4808 *
4809 * LOCKING:
4810 * Inherited from calling layer (may sleep).
4811 */
4812
4813 void ata_host_set_remove(struct ata_host_set *host_set)
4814 {
4815 struct ata_port *ap;
4816 unsigned int i;
4817
4818 for (i = 0; i < host_set->n_ports; i++) {
4819 ap = host_set->ports[i];
4820 scsi_remove_host(ap->host);
4821 }
4822
4823 free_irq(host_set->irq, host_set);
4824
4825 for (i = 0; i < host_set->n_ports; i++) {
4826 ap = host_set->ports[i];
4827
4828 ata_scsi_release(ap->host);
4829
4830 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
4831 struct ata_ioports *ioaddr = &ap->ioaddr;
4832
4833 if (ioaddr->cmd_addr == 0x1f0)
4834 release_region(0x1f0, 8);
4835 else if (ioaddr->cmd_addr == 0x170)
4836 release_region(0x170, 8);
4837 }
4838
4839 scsi_host_put(ap->host);
4840 }
4841
4842 if (host_set->ops->host_stop)
4843 host_set->ops->host_stop(host_set);
4844
4845 kfree(host_set);
4846 }
4847
4848 /**
4849 * ata_scsi_release - SCSI layer callback hook for host unload
4850 * @host: libata host to be unloaded
4851 *
4852 * Performs all duties necessary to shut down a libata port...
4853 * Kill port kthread, disable port, and release resources.
4854 *
4855 * LOCKING:
4856 * Inherited from SCSI layer.
4857 *
4858 * RETURNS:
4859 * One.
4860 */
4861
4862 int ata_scsi_release(struct Scsi_Host *host)
4863 {
4864 struct ata_port *ap = ata_shost_to_port(host);
4865
4866 DPRINTK("ENTER\n");
4867
4868 ap->ops->port_disable(ap);
4869 ata_host_remove(ap, 0);
4870
4871 DPRINTK("EXIT\n");
4872 return 1;
4873 }
4874
4875 /**
4876 * ata_std_ports - initialize ioaddr with standard port offsets.
4877 * @ioaddr: IO address structure to be initialized
4878 *
4879 * Utility function which initializes data_addr, error_addr,
4880 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
4881 * device_addr, status_addr, and command_addr to standard offsets
4882 * relative to cmd_addr.
4883 *
4884 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
4885 */
4886
4887 void ata_std_ports(struct ata_ioports *ioaddr)
4888 {
4889 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
4890 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
4891 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
4892 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
4893 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
4894 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
4895 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
4896 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
4897 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
4898 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
4899 }
4900
4901
4902 #ifdef CONFIG_PCI
4903
4904 void ata_pci_host_stop (struct ata_host_set *host_set)
4905 {
4906 struct pci_dev *pdev = to_pci_dev(host_set->dev);
4907
4908 pci_iounmap(pdev, host_set->mmio_base);
4909 }
4910
4911 /**
4912 * ata_pci_remove_one - PCI layer callback for device removal
4913 * @pdev: PCI device that was removed
4914 *
4915 * PCI layer indicates to libata via this hook that
4916 * hot-unplug or module unload event has occurred.
4917 * Handle this by unregistering all objects associated
4918 * with this PCI device. Free those objects. Then finally
4919 * release PCI resources and disable device.
4920 *
4921 * LOCKING:
4922 * Inherited from PCI layer (may sleep).
4923 */
4924
4925 void ata_pci_remove_one (struct pci_dev *pdev)
4926 {
4927 struct device *dev = pci_dev_to_dev(pdev);
4928 struct ata_host_set *host_set = dev_get_drvdata(dev);
4929
4930 ata_host_set_remove(host_set);
4931 pci_release_regions(pdev);
4932 pci_disable_device(pdev);
4933 dev_set_drvdata(dev, NULL);
4934 }
4935
4936 /* move to PCI subsystem */
4937 int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
4938 {
4939 unsigned long tmp = 0;
4940
4941 switch (bits->width) {
4942 case 1: {
4943 u8 tmp8 = 0;
4944 pci_read_config_byte(pdev, bits->reg, &tmp8);
4945 tmp = tmp8;
4946 break;
4947 }
4948 case 2: {
4949 u16 tmp16 = 0;
4950 pci_read_config_word(pdev, bits->reg, &tmp16);
4951 tmp = tmp16;
4952 break;
4953 }
4954 case 4: {
4955 u32 tmp32 = 0;
4956 pci_read_config_dword(pdev, bits->reg, &tmp32);
4957 tmp = tmp32;
4958 break;
4959 }
4960
4961 default:
4962 return -EINVAL;
4963 }
4964
4965 tmp &= bits->mask;
4966
4967 return (tmp == bits->val) ? 1 : 0;
4968 }
4969
4970 int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state)
4971 {
4972 pci_save_state(pdev);
4973 pci_disable_device(pdev);
4974 pci_set_power_state(pdev, PCI_D3hot);
4975 return 0;
4976 }
4977
4978 int ata_pci_device_resume(struct pci_dev *pdev)
4979 {
4980 pci_set_power_state(pdev, PCI_D0);
4981 pci_restore_state(pdev);
4982 pci_enable_device(pdev);
4983 pci_set_master(pdev);
4984 return 0;
4985 }
4986 #endif /* CONFIG_PCI */
4987
4988
4989 static int __init ata_init(void)
4990 {
4991 ata_wq = create_workqueue("ata");
4992 if (!ata_wq)
4993 return -ENOMEM;
4994
4995 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
4996 return 0;
4997 }
4998
4999 static void __exit ata_exit(void)
5000 {
5001 destroy_workqueue(ata_wq);
5002 }
5003
5004 module_init(ata_init);
5005 module_exit(ata_exit);
5006
5007 static unsigned long ratelimit_time;
5008 static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED;
5009
5010 int ata_ratelimit(void)
5011 {
5012 int rc;
5013 unsigned long flags;
5014
5015 spin_lock_irqsave(&ata_ratelimit_lock, flags);
5016
5017 if (time_after(jiffies, ratelimit_time)) {
5018 rc = 1;
5019 ratelimit_time = jiffies + (HZ/5);
5020 } else
5021 rc = 0;
5022
5023 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
5024
5025 return rc;
5026 }
5027
5028 /**
5029 * ata_wait_register - wait until register value changes
5030 * @reg: IO-mapped register
5031 * @mask: Mask to apply to read register value
5032 * @val: Wait condition
5033 * @interval_msec: polling interval in milliseconds
5034 * @timeout_msec: timeout in milliseconds
5035 *
5036 * Waiting for some bits of register to change is a common
5037 * operation for ATA controllers. This function reads 32bit LE
5038 * IO-mapped register @reg and tests for the following condition.
5039 *
5040 * (*@reg & mask) != val
5041 *
5042 * If the condition is met, it returns; otherwise, the process is
5043 * repeated after @interval_msec until timeout.
5044 *
5045 * LOCKING:
5046 * Kernel thread context (may sleep)
5047 *
5048 * RETURNS:
5049 * The final register value.
5050 */
5051 u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val,
5052 unsigned long interval_msec,
5053 unsigned long timeout_msec)
5054 {
5055 unsigned long timeout;
5056 u32 tmp;
5057
5058 tmp = ioread32(reg);
5059
5060 /* Calculate timeout _after_ the first read to make sure
5061 * preceding writes reach the controller before starting to
5062 * eat away the timeout.
5063 */
5064 timeout = jiffies + (timeout_msec * HZ) / 1000;
5065
5066 while ((tmp & mask) == val && time_before(jiffies, timeout)) {
5067 msleep(interval_msec);
5068 tmp = ioread32(reg);
5069 }
5070
5071 return tmp;
5072 }
5073
5074 /*
5075 * libata is essentially a library of internal helper functions for
5076 * low-level ATA host controller drivers. As such, the API/ABI is
5077 * likely to change as new drivers are added and updated.
5078 * Do not depend on ABI/API stability.
5079 */
5080
5081 EXPORT_SYMBOL_GPL(ata_std_bios_param);
5082 EXPORT_SYMBOL_GPL(ata_std_ports);
5083 EXPORT_SYMBOL_GPL(ata_device_add);
5084 EXPORT_SYMBOL_GPL(ata_host_set_remove);
5085 EXPORT_SYMBOL_GPL(ata_sg_init);
5086 EXPORT_SYMBOL_GPL(ata_sg_init_one);
5087 EXPORT_SYMBOL_GPL(__ata_qc_complete);
5088 EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
5089 EXPORT_SYMBOL_GPL(ata_tf_load);
5090 EXPORT_SYMBOL_GPL(ata_tf_read);
5091 EXPORT_SYMBOL_GPL(ata_noop_dev_select);
5092 EXPORT_SYMBOL_GPL(ata_std_dev_select);
5093 EXPORT_SYMBOL_GPL(ata_tf_to_fis);
5094 EXPORT_SYMBOL_GPL(ata_tf_from_fis);
5095 EXPORT_SYMBOL_GPL(ata_check_status);
5096 EXPORT_SYMBOL_GPL(ata_altstatus);
5097 EXPORT_SYMBOL_GPL(ata_exec_command);
5098 EXPORT_SYMBOL_GPL(ata_port_start);
5099 EXPORT_SYMBOL_GPL(ata_port_stop);
5100 EXPORT_SYMBOL_GPL(ata_host_stop);
5101 EXPORT_SYMBOL_GPL(ata_interrupt);
5102 EXPORT_SYMBOL_GPL(ata_qc_prep);
5103 EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
5104 EXPORT_SYMBOL_GPL(ata_bmdma_setup);
5105 EXPORT_SYMBOL_GPL(ata_bmdma_start);
5106 EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
5107 EXPORT_SYMBOL_GPL(ata_bmdma_status);
5108 EXPORT_SYMBOL_GPL(ata_bmdma_stop);
5109 EXPORT_SYMBOL_GPL(ata_port_probe);
5110 EXPORT_SYMBOL_GPL(sata_set_spd);
5111 EXPORT_SYMBOL_GPL(sata_phy_reset);
5112 EXPORT_SYMBOL_GPL(__sata_phy_reset);
5113 EXPORT_SYMBOL_GPL(ata_bus_reset);
5114 EXPORT_SYMBOL_GPL(ata_std_probeinit);
5115 EXPORT_SYMBOL_GPL(ata_std_softreset);
5116 EXPORT_SYMBOL_GPL(sata_std_hardreset);
5117 EXPORT_SYMBOL_GPL(ata_std_postreset);
5118 EXPORT_SYMBOL_GPL(ata_std_probe_reset);
5119 EXPORT_SYMBOL_GPL(ata_drive_probe_reset);
5120 EXPORT_SYMBOL_GPL(ata_dev_revalidate);
5121 EXPORT_SYMBOL_GPL(ata_dev_classify);
5122 EXPORT_SYMBOL_GPL(ata_dev_pair);
5123 EXPORT_SYMBOL_GPL(ata_port_disable);
5124 EXPORT_SYMBOL_GPL(ata_ratelimit);
5125 EXPORT_SYMBOL_GPL(ata_wait_register);
5126 EXPORT_SYMBOL_GPL(ata_busy_sleep);
5127 EXPORT_SYMBOL_GPL(ata_port_queue_task);
5128 EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
5129 EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
5130 EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
5131 EXPORT_SYMBOL_GPL(ata_scsi_release);
5132 EXPORT_SYMBOL_GPL(ata_host_intr);
5133 EXPORT_SYMBOL_GPL(ata_id_string);
5134 EXPORT_SYMBOL_GPL(ata_id_c_string);
5135 EXPORT_SYMBOL_GPL(ata_scsi_simulate);
5136
5137 EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
5138 EXPORT_SYMBOL_GPL(ata_timing_compute);
5139 EXPORT_SYMBOL_GPL(ata_timing_merge);
5140
5141 #ifdef CONFIG_PCI
5142 EXPORT_SYMBOL_GPL(pci_test_config_bits);
5143 EXPORT_SYMBOL_GPL(ata_pci_host_stop);
5144 EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
5145 EXPORT_SYMBOL_GPL(ata_pci_init_one);
5146 EXPORT_SYMBOL_GPL(ata_pci_remove_one);
5147 EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
5148 EXPORT_SYMBOL_GPL(ata_pci_device_resume);
5149 EXPORT_SYMBOL_GPL(ata_pci_default_filter);
5150 EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);
5151 #endif /* CONFIG_PCI */
5152
5153 EXPORT_SYMBOL_GPL(ata_device_suspend);
5154 EXPORT_SYMBOL_GPL(ata_device_resume);
5155 EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
5156 EXPORT_SYMBOL_GPL(ata_scsi_device_resume);
5157
5158 EXPORT_SYMBOL_GPL(ata_eng_timeout);
5159 EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
5160 EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
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