[SCSI] qla2xxx: Implement FCP priority tagging for 82xx adapters.
[deliverable/linux.git] / drivers / scsi / qla2xxx / qla_init.c
1 /*
2 * QLogic Fibre Channel HBA Driver
3 * Copyright (c) 2003-2011 QLogic Corporation
4 *
5 * See LICENSE.qla2xxx for copyright and licensing details.
6 */
7 #include "qla_def.h"
8 #include "qla_gbl.h"
9
10 #include <linux/delay.h>
11 #include <linux/slab.h>
12 #include <linux/vmalloc.h>
13
14 #include "qla_devtbl.h"
15
16 #ifdef CONFIG_SPARC
17 #include <asm/prom.h>
18 #endif
19
20 /*
21 * QLogic ISP2x00 Hardware Support Function Prototypes.
22 */
23 static int qla2x00_isp_firmware(scsi_qla_host_t *);
24 static int qla2x00_setup_chip(scsi_qla_host_t *);
25 static int qla2x00_init_rings(scsi_qla_host_t *);
26 static int qla2x00_fw_ready(scsi_qla_host_t *);
27 static int qla2x00_configure_hba(scsi_qla_host_t *);
28 static int qla2x00_configure_loop(scsi_qla_host_t *);
29 static int qla2x00_configure_local_loop(scsi_qla_host_t *);
30 static int qla2x00_configure_fabric(scsi_qla_host_t *);
31 static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *);
32 static int qla2x00_device_resync(scsi_qla_host_t *);
33 static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *,
34 uint16_t *);
35
36 static int qla2x00_restart_isp(scsi_qla_host_t *);
37
38 static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
39 static int qla84xx_init_chip(scsi_qla_host_t *);
40 static int qla25xx_init_queues(struct qla_hw_data *);
41
42 /* SRB Extensions ---------------------------------------------------------- */
43
44 static void
45 qla2x00_ctx_sp_timeout(unsigned long __data)
46 {
47 srb_t *sp = (srb_t *)__data;
48 struct srb_ctx *ctx;
49 struct srb_iocb *iocb;
50 fc_port_t *fcport = sp->fcport;
51 struct qla_hw_data *ha = fcport->vha->hw;
52 struct req_que *req;
53 unsigned long flags;
54
55 spin_lock_irqsave(&ha->hardware_lock, flags);
56 req = ha->req_q_map[0];
57 req->outstanding_cmds[sp->handle] = NULL;
58 ctx = sp->ctx;
59 iocb = ctx->u.iocb_cmd;
60 iocb->timeout(sp);
61 iocb->free(sp);
62 spin_unlock_irqrestore(&ha->hardware_lock, flags);
63 }
64
65 static void
66 qla2x00_ctx_sp_free(srb_t *sp)
67 {
68 struct srb_ctx *ctx = sp->ctx;
69 struct srb_iocb *iocb = ctx->u.iocb_cmd;
70 struct scsi_qla_host *vha = sp->fcport->vha;
71
72 del_timer(&iocb->timer);
73 kfree(iocb);
74 kfree(ctx);
75 mempool_free(sp, sp->fcport->vha->hw->srb_mempool);
76
77 QLA_VHA_MARK_NOT_BUSY(vha);
78 }
79
80 inline srb_t *
81 qla2x00_get_ctx_sp(scsi_qla_host_t *vha, fc_port_t *fcport, size_t size,
82 unsigned long tmo)
83 {
84 srb_t *sp = NULL;
85 struct qla_hw_data *ha = vha->hw;
86 struct srb_ctx *ctx;
87 struct srb_iocb *iocb;
88 uint8_t bail;
89
90 QLA_VHA_MARK_BUSY(vha, bail);
91 if (bail)
92 return NULL;
93
94 sp = mempool_alloc(ha->srb_mempool, GFP_KERNEL);
95 if (!sp)
96 goto done;
97 ctx = kzalloc(size, GFP_KERNEL);
98 if (!ctx) {
99 mempool_free(sp, ha->srb_mempool);
100 sp = NULL;
101 goto done;
102 }
103 iocb = kzalloc(sizeof(struct srb_iocb), GFP_KERNEL);
104 if (!iocb) {
105 mempool_free(sp, ha->srb_mempool);
106 sp = NULL;
107 kfree(ctx);
108 goto done;
109 }
110
111 memset(sp, 0, sizeof(*sp));
112 sp->fcport = fcport;
113 sp->ctx = ctx;
114 ctx->u.iocb_cmd = iocb;
115 iocb->free = qla2x00_ctx_sp_free;
116
117 init_timer(&iocb->timer);
118 if (!tmo)
119 goto done;
120 iocb->timer.expires = jiffies + tmo * HZ;
121 iocb->timer.data = (unsigned long)sp;
122 iocb->timer.function = qla2x00_ctx_sp_timeout;
123 add_timer(&iocb->timer);
124 done:
125 if (!sp)
126 QLA_VHA_MARK_NOT_BUSY(vha);
127 return sp;
128 }
129
130 /* Asynchronous Login/Logout Routines -------------------------------------- */
131
132 static inline unsigned long
133 qla2x00_get_async_timeout(struct scsi_qla_host *vha)
134 {
135 unsigned long tmo;
136 struct qla_hw_data *ha = vha->hw;
137
138 /* Firmware should use switch negotiated r_a_tov for timeout. */
139 tmo = ha->r_a_tov / 10 * 2;
140 if (!IS_FWI2_CAPABLE(ha)) {
141 /*
142 * Except for earlier ISPs where the timeout is seeded from the
143 * initialization control block.
144 */
145 tmo = ha->login_timeout;
146 }
147 return tmo;
148 }
149
150 static void
151 qla2x00_async_iocb_timeout(srb_t *sp)
152 {
153 fc_port_t *fcport = sp->fcport;
154 struct srb_ctx *ctx = sp->ctx;
155
156 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071,
157 "Async-%s timeout - hdl=%x portid=%02x%02x%02x.\n",
158 ctx->name, sp->handle, fcport->d_id.b.domain, fcport->d_id.b.area,
159 fcport->d_id.b.al_pa);
160
161 fcport->flags &= ~FCF_ASYNC_SENT;
162 if (ctx->type == SRB_LOGIN_CMD) {
163 struct srb_iocb *lio = ctx->u.iocb_cmd;
164 qla2x00_post_async_logout_work(fcport->vha, fcport, NULL);
165 /* Retry as needed. */
166 lio->u.logio.data[0] = MBS_COMMAND_ERROR;
167 lio->u.logio.data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
168 QLA_LOGIO_LOGIN_RETRIED : 0;
169 qla2x00_post_async_login_done_work(fcport->vha, fcport,
170 lio->u.logio.data);
171 }
172 }
173
174 static void
175 qla2x00_async_login_ctx_done(srb_t *sp)
176 {
177 struct srb_ctx *ctx = sp->ctx;
178 struct srb_iocb *lio = ctx->u.iocb_cmd;
179
180 qla2x00_post_async_login_done_work(sp->fcport->vha, sp->fcport,
181 lio->u.logio.data);
182 lio->free(sp);
183 }
184
185 int
186 qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport,
187 uint16_t *data)
188 {
189 srb_t *sp;
190 struct srb_ctx *ctx;
191 struct srb_iocb *lio;
192 int rval;
193
194 rval = QLA_FUNCTION_FAILED;
195 sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
196 qla2x00_get_async_timeout(vha) + 2);
197 if (!sp)
198 goto done;
199
200 ctx = sp->ctx;
201 ctx->type = SRB_LOGIN_CMD;
202 ctx->name = "login";
203 lio = ctx->u.iocb_cmd;
204 lio->timeout = qla2x00_async_iocb_timeout;
205 lio->done = qla2x00_async_login_ctx_done;
206 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI;
207 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
208 lio->u.logio.flags |= SRB_LOGIN_RETRIED;
209 rval = qla2x00_start_sp(sp);
210 if (rval != QLA_SUCCESS)
211 goto done_free_sp;
212
213 ql_dbg(ql_dbg_disc, vha, 0x2072,
214 "Async-login - hdl=%x, loopid=%x portid=%02x%02x%02x "
215 "retries=%d.\n", sp->handle, fcport->loop_id,
216 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
217 fcport->login_retry);
218 return rval;
219
220 done_free_sp:
221 lio->free(sp);
222 done:
223 return rval;
224 }
225
226 static void
227 qla2x00_async_logout_ctx_done(srb_t *sp)
228 {
229 struct srb_ctx *ctx = sp->ctx;
230 struct srb_iocb *lio = ctx->u.iocb_cmd;
231
232 qla2x00_post_async_logout_done_work(sp->fcport->vha, sp->fcport,
233 lio->u.logio.data);
234 lio->free(sp);
235 }
236
237 int
238 qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport)
239 {
240 srb_t *sp;
241 struct srb_ctx *ctx;
242 struct srb_iocb *lio;
243 int rval;
244
245 rval = QLA_FUNCTION_FAILED;
246 sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
247 qla2x00_get_async_timeout(vha) + 2);
248 if (!sp)
249 goto done;
250
251 ctx = sp->ctx;
252 ctx->type = SRB_LOGOUT_CMD;
253 ctx->name = "logout";
254 lio = ctx->u.iocb_cmd;
255 lio->timeout = qla2x00_async_iocb_timeout;
256 lio->done = qla2x00_async_logout_ctx_done;
257 rval = qla2x00_start_sp(sp);
258 if (rval != QLA_SUCCESS)
259 goto done_free_sp;
260
261 ql_dbg(ql_dbg_disc, vha, 0x2070,
262 "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
263 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
264 fcport->d_id.b.area, fcport->d_id.b.al_pa);
265 return rval;
266
267 done_free_sp:
268 lio->free(sp);
269 done:
270 return rval;
271 }
272
273 static void
274 qla2x00_async_adisc_ctx_done(srb_t *sp)
275 {
276 struct srb_ctx *ctx = sp->ctx;
277 struct srb_iocb *lio = ctx->u.iocb_cmd;
278
279 qla2x00_post_async_adisc_done_work(sp->fcport->vha, sp->fcport,
280 lio->u.logio.data);
281 lio->free(sp);
282 }
283
284 int
285 qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport,
286 uint16_t *data)
287 {
288 srb_t *sp;
289 struct srb_ctx *ctx;
290 struct srb_iocb *lio;
291 int rval;
292
293 rval = QLA_FUNCTION_FAILED;
294 sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
295 qla2x00_get_async_timeout(vha) + 2);
296 if (!sp)
297 goto done;
298
299 ctx = sp->ctx;
300 ctx->type = SRB_ADISC_CMD;
301 ctx->name = "adisc";
302 lio = ctx->u.iocb_cmd;
303 lio->timeout = qla2x00_async_iocb_timeout;
304 lio->done = qla2x00_async_adisc_ctx_done;
305 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
306 lio->u.logio.flags |= SRB_LOGIN_RETRIED;
307 rval = qla2x00_start_sp(sp);
308 if (rval != QLA_SUCCESS)
309 goto done_free_sp;
310
311 ql_dbg(ql_dbg_disc, vha, 0x206f,
312 "Async-adisc - hdl=%x loopid=%x portid=%02x%02x%02x.\n",
313 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
314 fcport->d_id.b.area, fcport->d_id.b.al_pa);
315 return rval;
316
317 done_free_sp:
318 lio->free(sp);
319 done:
320 return rval;
321 }
322
323 static void
324 qla2x00_async_tm_cmd_ctx_done(srb_t *sp)
325 {
326 struct srb_ctx *ctx = sp->ctx;
327 struct srb_iocb *iocb = (struct srb_iocb *)ctx->u.iocb_cmd;
328
329 qla2x00_async_tm_cmd_done(sp->fcport->vha, sp->fcport, iocb);
330 iocb->free(sp);
331 }
332
333 int
334 qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun,
335 uint32_t tag)
336 {
337 struct scsi_qla_host *vha = fcport->vha;
338 srb_t *sp;
339 struct srb_ctx *ctx;
340 struct srb_iocb *tcf;
341 int rval;
342
343 rval = QLA_FUNCTION_FAILED;
344 sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
345 qla2x00_get_async_timeout(vha) + 2);
346 if (!sp)
347 goto done;
348
349 ctx = sp->ctx;
350 ctx->type = SRB_TM_CMD;
351 ctx->name = "tmf";
352 tcf = ctx->u.iocb_cmd;
353 tcf->u.tmf.flags = flags;
354 tcf->u.tmf.lun = lun;
355 tcf->u.tmf.data = tag;
356 tcf->timeout = qla2x00_async_iocb_timeout;
357 tcf->done = qla2x00_async_tm_cmd_ctx_done;
358
359 rval = qla2x00_start_sp(sp);
360 if (rval != QLA_SUCCESS)
361 goto done_free_sp;
362
363 ql_dbg(ql_dbg_taskm, vha, 0x802f,
364 "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
365 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
366 fcport->d_id.b.area, fcport->d_id.b.al_pa);
367 return rval;
368
369 done_free_sp:
370 tcf->free(sp);
371 done:
372 return rval;
373 }
374
375 void
376 qla2x00_async_login_done(struct scsi_qla_host *vha, fc_port_t *fcport,
377 uint16_t *data)
378 {
379 int rval;
380
381 switch (data[0]) {
382 case MBS_COMMAND_COMPLETE:
383 /*
384 * Driver must validate login state - If PRLI not complete,
385 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI
386 * requests.
387 */
388 rval = qla2x00_get_port_database(vha, fcport, 0);
389 if (rval != QLA_SUCCESS) {
390 qla2x00_post_async_logout_work(vha, fcport, NULL);
391 qla2x00_post_async_login_work(vha, fcport, NULL);
392 break;
393 }
394 if (fcport->flags & FCF_FCP2_DEVICE) {
395 qla2x00_post_async_adisc_work(vha, fcport, data);
396 break;
397 }
398 qla2x00_update_fcport(vha, fcport);
399 break;
400 case MBS_COMMAND_ERROR:
401 fcport->flags &= ~FCF_ASYNC_SENT;
402 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
403 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
404 else
405 qla2x00_mark_device_lost(vha, fcport, 1, 0);
406 break;
407 case MBS_PORT_ID_USED:
408 fcport->loop_id = data[1];
409 qla2x00_post_async_logout_work(vha, fcport, NULL);
410 qla2x00_post_async_login_work(vha, fcport, NULL);
411 break;
412 case MBS_LOOP_ID_USED:
413 fcport->loop_id++;
414 rval = qla2x00_find_new_loop_id(vha, fcport);
415 if (rval != QLA_SUCCESS) {
416 fcport->flags &= ~FCF_ASYNC_SENT;
417 qla2x00_mark_device_lost(vha, fcport, 1, 0);
418 break;
419 }
420 qla2x00_post_async_login_work(vha, fcport, NULL);
421 break;
422 }
423 return;
424 }
425
426 void
427 qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport,
428 uint16_t *data)
429 {
430 qla2x00_mark_device_lost(vha, fcport, 1, 0);
431 return;
432 }
433
434 void
435 qla2x00_async_adisc_done(struct scsi_qla_host *vha, fc_port_t *fcport,
436 uint16_t *data)
437 {
438 if (data[0] == MBS_COMMAND_COMPLETE) {
439 qla2x00_update_fcport(vha, fcport);
440
441 return;
442 }
443
444 /* Retry login. */
445 fcport->flags &= ~FCF_ASYNC_SENT;
446 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
447 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
448 else
449 qla2x00_mark_device_lost(vha, fcport, 1, 0);
450
451 return;
452 }
453
454 void
455 qla2x00_async_tm_cmd_done(struct scsi_qla_host *vha, fc_port_t *fcport,
456 struct srb_iocb *iocb)
457 {
458 int rval;
459 uint32_t flags;
460 uint16_t lun;
461
462 flags = iocb->u.tmf.flags;
463 lun = (uint16_t)iocb->u.tmf.lun;
464
465 /* Issue Marker IOCB */
466 rval = qla2x00_marker(vha, vha->hw->req_q_map[0],
467 vha->hw->rsp_q_map[0], fcport->loop_id, lun,
468 flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID);
469
470 if ((rval != QLA_SUCCESS) || iocb->u.tmf.data) {
471 ql_dbg(ql_dbg_taskm, vha, 0x8030,
472 "TM IOCB failed (%x).\n", rval);
473 }
474
475 return;
476 }
477
478 /****************************************************************************/
479 /* QLogic ISP2x00 Hardware Support Functions. */
480 /****************************************************************************/
481
482 /*
483 * qla2x00_initialize_adapter
484 * Initialize board.
485 *
486 * Input:
487 * ha = adapter block pointer.
488 *
489 * Returns:
490 * 0 = success
491 */
492 int
493 qla2x00_initialize_adapter(scsi_qla_host_t *vha)
494 {
495 int rval;
496 struct qla_hw_data *ha = vha->hw;
497 struct req_que *req = ha->req_q_map[0];
498
499 /* Clear adapter flags. */
500 vha->flags.online = 0;
501 ha->flags.chip_reset_done = 0;
502 vha->flags.reset_active = 0;
503 ha->flags.pci_channel_io_perm_failure = 0;
504 ha->flags.eeh_busy = 0;
505 ha->flags.thermal_supported = 1;
506 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
507 atomic_set(&vha->loop_state, LOOP_DOWN);
508 vha->device_flags = DFLG_NO_CABLE;
509 vha->dpc_flags = 0;
510 vha->flags.management_server_logged_in = 0;
511 vha->marker_needed = 0;
512 ha->isp_abort_cnt = 0;
513 ha->beacon_blink_led = 0;
514
515 set_bit(0, ha->req_qid_map);
516 set_bit(0, ha->rsp_qid_map);
517
518 ql_dbg(ql_dbg_init, vha, 0x0040,
519 "Configuring PCI space...\n");
520 rval = ha->isp_ops->pci_config(vha);
521 if (rval) {
522 ql_log(ql_log_warn, vha, 0x0044,
523 "Unable to configure PCI space.\n");
524 return (rval);
525 }
526
527 ha->isp_ops->reset_chip(vha);
528
529 rval = qla2xxx_get_flash_info(vha);
530 if (rval) {
531 ql_log(ql_log_fatal, vha, 0x004f,
532 "Unable to validate FLASH data.\n");
533 return (rval);
534 }
535
536 ha->isp_ops->get_flash_version(vha, req->ring);
537 ql_dbg(ql_dbg_init, vha, 0x0061,
538 "Configure NVRAM parameters...\n");
539
540 ha->isp_ops->nvram_config(vha);
541
542 if (ha->flags.disable_serdes) {
543 /* Mask HBA via NVRAM settings? */
544 ql_log(ql_log_info, vha, 0x0077,
545 "Masking HBA WWPN "
546 "%02x%02x%02x%02x%02x%02x%02x%02x (via NVRAM).\n",
547 vha->port_name[0], vha->port_name[1],
548 vha->port_name[2], vha->port_name[3],
549 vha->port_name[4], vha->port_name[5],
550 vha->port_name[6], vha->port_name[7]);
551 return QLA_FUNCTION_FAILED;
552 }
553
554 ql_dbg(ql_dbg_init, vha, 0x0078,
555 "Verifying loaded RISC code...\n");
556
557 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
558 rval = ha->isp_ops->chip_diag(vha);
559 if (rval)
560 return (rval);
561 rval = qla2x00_setup_chip(vha);
562 if (rval)
563 return (rval);
564 }
565
566 if (IS_QLA84XX(ha)) {
567 ha->cs84xx = qla84xx_get_chip(vha);
568 if (!ha->cs84xx) {
569 ql_log(ql_log_warn, vha, 0x00d0,
570 "Unable to configure ISP84XX.\n");
571 return QLA_FUNCTION_FAILED;
572 }
573 }
574 rval = qla2x00_init_rings(vha);
575 ha->flags.chip_reset_done = 1;
576
577 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) {
578 /* Issue verify 84xx FW IOCB to complete 84xx initialization */
579 rval = qla84xx_init_chip(vha);
580 if (rval != QLA_SUCCESS) {
581 ql_log(ql_log_warn, vha, 0x00d4,
582 "Unable to initialize ISP84XX.\n");
583 qla84xx_put_chip(vha);
584 }
585 }
586
587 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha))
588 qla24xx_read_fcp_prio_cfg(vha);
589
590 return (rval);
591 }
592
593 /**
594 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
595 * @ha: HA context
596 *
597 * Returns 0 on success.
598 */
599 int
600 qla2100_pci_config(scsi_qla_host_t *vha)
601 {
602 uint16_t w;
603 unsigned long flags;
604 struct qla_hw_data *ha = vha->hw;
605 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
606
607 pci_set_master(ha->pdev);
608 pci_try_set_mwi(ha->pdev);
609
610 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
611 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
612 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
613
614 pci_disable_rom(ha->pdev);
615
616 /* Get PCI bus information. */
617 spin_lock_irqsave(&ha->hardware_lock, flags);
618 ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
619 spin_unlock_irqrestore(&ha->hardware_lock, flags);
620
621 return QLA_SUCCESS;
622 }
623
624 /**
625 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
626 * @ha: HA context
627 *
628 * Returns 0 on success.
629 */
630 int
631 qla2300_pci_config(scsi_qla_host_t *vha)
632 {
633 uint16_t w;
634 unsigned long flags = 0;
635 uint32_t cnt;
636 struct qla_hw_data *ha = vha->hw;
637 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
638
639 pci_set_master(ha->pdev);
640 pci_try_set_mwi(ha->pdev);
641
642 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
643 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
644
645 if (IS_QLA2322(ha) || IS_QLA6322(ha))
646 w &= ~PCI_COMMAND_INTX_DISABLE;
647 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
648
649 /*
650 * If this is a 2300 card and not 2312, reset the
651 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
652 * the 2310 also reports itself as a 2300 so we need to get the
653 * fb revision level -- a 6 indicates it really is a 2300 and
654 * not a 2310.
655 */
656 if (IS_QLA2300(ha)) {
657 spin_lock_irqsave(&ha->hardware_lock, flags);
658
659 /* Pause RISC. */
660 WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
661 for (cnt = 0; cnt < 30000; cnt++) {
662 if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
663 break;
664
665 udelay(10);
666 }
667
668 /* Select FPM registers. */
669 WRT_REG_WORD(&reg->ctrl_status, 0x20);
670 RD_REG_WORD(&reg->ctrl_status);
671
672 /* Get the fb rev level */
673 ha->fb_rev = RD_FB_CMD_REG(ha, reg);
674
675 if (ha->fb_rev == FPM_2300)
676 pci_clear_mwi(ha->pdev);
677
678 /* Deselect FPM registers. */
679 WRT_REG_WORD(&reg->ctrl_status, 0x0);
680 RD_REG_WORD(&reg->ctrl_status);
681
682 /* Release RISC module. */
683 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
684 for (cnt = 0; cnt < 30000; cnt++) {
685 if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
686 break;
687
688 udelay(10);
689 }
690
691 spin_unlock_irqrestore(&ha->hardware_lock, flags);
692 }
693
694 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
695
696 pci_disable_rom(ha->pdev);
697
698 /* Get PCI bus information. */
699 spin_lock_irqsave(&ha->hardware_lock, flags);
700 ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
701 spin_unlock_irqrestore(&ha->hardware_lock, flags);
702
703 return QLA_SUCCESS;
704 }
705
706 /**
707 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
708 * @ha: HA context
709 *
710 * Returns 0 on success.
711 */
712 int
713 qla24xx_pci_config(scsi_qla_host_t *vha)
714 {
715 uint16_t w;
716 unsigned long flags = 0;
717 struct qla_hw_data *ha = vha->hw;
718 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
719
720 pci_set_master(ha->pdev);
721 pci_try_set_mwi(ha->pdev);
722
723 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
724 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
725 w &= ~PCI_COMMAND_INTX_DISABLE;
726 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
727
728 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
729
730 /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
731 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
732 pcix_set_mmrbc(ha->pdev, 2048);
733
734 /* PCIe -- adjust Maximum Read Request Size (2048). */
735 if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
736 pcie_set_readrq(ha->pdev, 2048);
737
738 pci_disable_rom(ha->pdev);
739
740 ha->chip_revision = ha->pdev->revision;
741
742 /* Get PCI bus information. */
743 spin_lock_irqsave(&ha->hardware_lock, flags);
744 ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
745 spin_unlock_irqrestore(&ha->hardware_lock, flags);
746
747 return QLA_SUCCESS;
748 }
749
750 /**
751 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
752 * @ha: HA context
753 *
754 * Returns 0 on success.
755 */
756 int
757 qla25xx_pci_config(scsi_qla_host_t *vha)
758 {
759 uint16_t w;
760 struct qla_hw_data *ha = vha->hw;
761
762 pci_set_master(ha->pdev);
763 pci_try_set_mwi(ha->pdev);
764
765 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
766 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
767 w &= ~PCI_COMMAND_INTX_DISABLE;
768 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
769
770 /* PCIe -- adjust Maximum Read Request Size (2048). */
771 if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
772 pcie_set_readrq(ha->pdev, 2048);
773
774 pci_disable_rom(ha->pdev);
775
776 ha->chip_revision = ha->pdev->revision;
777
778 return QLA_SUCCESS;
779 }
780
781 /**
782 * qla2x00_isp_firmware() - Choose firmware image.
783 * @ha: HA context
784 *
785 * Returns 0 on success.
786 */
787 static int
788 qla2x00_isp_firmware(scsi_qla_host_t *vha)
789 {
790 int rval;
791 uint16_t loop_id, topo, sw_cap;
792 uint8_t domain, area, al_pa;
793 struct qla_hw_data *ha = vha->hw;
794
795 /* Assume loading risc code */
796 rval = QLA_FUNCTION_FAILED;
797
798 if (ha->flags.disable_risc_code_load) {
799 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n");
800
801 /* Verify checksum of loaded RISC code. */
802 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
803 if (rval == QLA_SUCCESS) {
804 /* And, verify we are not in ROM code. */
805 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
806 &area, &domain, &topo, &sw_cap);
807 }
808 }
809
810 if (rval)
811 ql_dbg(ql_dbg_init, vha, 0x007a,
812 "**** Load RISC code ****.\n");
813
814 return (rval);
815 }
816
817 /**
818 * qla2x00_reset_chip() - Reset ISP chip.
819 * @ha: HA context
820 *
821 * Returns 0 on success.
822 */
823 void
824 qla2x00_reset_chip(scsi_qla_host_t *vha)
825 {
826 unsigned long flags = 0;
827 struct qla_hw_data *ha = vha->hw;
828 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
829 uint32_t cnt;
830 uint16_t cmd;
831
832 if (unlikely(pci_channel_offline(ha->pdev)))
833 return;
834
835 ha->isp_ops->disable_intrs(ha);
836
837 spin_lock_irqsave(&ha->hardware_lock, flags);
838
839 /* Turn off master enable */
840 cmd = 0;
841 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
842 cmd &= ~PCI_COMMAND_MASTER;
843 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
844
845 if (!IS_QLA2100(ha)) {
846 /* Pause RISC. */
847 WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
848 if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
849 for (cnt = 0; cnt < 30000; cnt++) {
850 if ((RD_REG_WORD(&reg->hccr) &
851 HCCR_RISC_PAUSE) != 0)
852 break;
853 udelay(100);
854 }
855 } else {
856 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
857 udelay(10);
858 }
859
860 /* Select FPM registers. */
861 WRT_REG_WORD(&reg->ctrl_status, 0x20);
862 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
863
864 /* FPM Soft Reset. */
865 WRT_REG_WORD(&reg->fpm_diag_config, 0x100);
866 RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
867
868 /* Toggle Fpm Reset. */
869 if (!IS_QLA2200(ha)) {
870 WRT_REG_WORD(&reg->fpm_diag_config, 0x0);
871 RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
872 }
873
874 /* Select frame buffer registers. */
875 WRT_REG_WORD(&reg->ctrl_status, 0x10);
876 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
877
878 /* Reset frame buffer FIFOs. */
879 if (IS_QLA2200(ha)) {
880 WRT_FB_CMD_REG(ha, reg, 0xa000);
881 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
882 } else {
883 WRT_FB_CMD_REG(ha, reg, 0x00fc);
884
885 /* Read back fb_cmd until zero or 3 seconds max */
886 for (cnt = 0; cnt < 3000; cnt++) {
887 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
888 break;
889 udelay(100);
890 }
891 }
892
893 /* Select RISC module registers. */
894 WRT_REG_WORD(&reg->ctrl_status, 0);
895 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
896
897 /* Reset RISC processor. */
898 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
899 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
900
901 /* Release RISC processor. */
902 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
903 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
904 }
905
906 WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
907 WRT_REG_WORD(&reg->hccr, HCCR_CLR_HOST_INT);
908
909 /* Reset ISP chip. */
910 WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
911
912 /* Wait for RISC to recover from reset. */
913 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
914 /*
915 * It is necessary to for a delay here since the card doesn't
916 * respond to PCI reads during a reset. On some architectures
917 * this will result in an MCA.
918 */
919 udelay(20);
920 for (cnt = 30000; cnt; cnt--) {
921 if ((RD_REG_WORD(&reg->ctrl_status) &
922 CSR_ISP_SOFT_RESET) == 0)
923 break;
924 udelay(100);
925 }
926 } else
927 udelay(10);
928
929 /* Reset RISC processor. */
930 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
931
932 WRT_REG_WORD(&reg->semaphore, 0);
933
934 /* Release RISC processor. */
935 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
936 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
937
938 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
939 for (cnt = 0; cnt < 30000; cnt++) {
940 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
941 break;
942
943 udelay(100);
944 }
945 } else
946 udelay(100);
947
948 /* Turn on master enable */
949 cmd |= PCI_COMMAND_MASTER;
950 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
951
952 /* Disable RISC pause on FPM parity error. */
953 if (!IS_QLA2100(ha)) {
954 WRT_REG_WORD(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
955 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
956 }
957
958 spin_unlock_irqrestore(&ha->hardware_lock, flags);
959 }
960
961 /**
962 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC.
963 *
964 * Returns 0 on success.
965 */
966 int
967 qla81xx_reset_mpi(scsi_qla_host_t *vha)
968 {
969 uint16_t mb[4] = {0x1010, 0, 1, 0};
970
971 return qla81xx_write_mpi_register(vha, mb);
972 }
973
974 /**
975 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
976 * @ha: HA context
977 *
978 * Returns 0 on success.
979 */
980 static inline void
981 qla24xx_reset_risc(scsi_qla_host_t *vha)
982 {
983 unsigned long flags = 0;
984 struct qla_hw_data *ha = vha->hw;
985 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
986 uint32_t cnt, d2;
987 uint16_t wd;
988 static int abts_cnt; /* ISP abort retry counts */
989
990 spin_lock_irqsave(&ha->hardware_lock, flags);
991
992 /* Reset RISC. */
993 WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
994 for (cnt = 0; cnt < 30000; cnt++) {
995 if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
996 break;
997
998 udelay(10);
999 }
1000
1001 WRT_REG_DWORD(&reg->ctrl_status,
1002 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
1003 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
1004
1005 udelay(100);
1006 /* Wait for firmware to complete NVRAM accesses. */
1007 d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
1008 for (cnt = 10000 ; cnt && d2; cnt--) {
1009 udelay(5);
1010 d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
1011 barrier();
1012 }
1013
1014 /* Wait for soft-reset to complete. */
1015 d2 = RD_REG_DWORD(&reg->ctrl_status);
1016 for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) {
1017 udelay(5);
1018 d2 = RD_REG_DWORD(&reg->ctrl_status);
1019 barrier();
1020 }
1021
1022 /* If required, do an MPI FW reset now */
1023 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) {
1024 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) {
1025 if (++abts_cnt < 5) {
1026 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1027 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags);
1028 } else {
1029 /*
1030 * We exhausted the ISP abort retries. We have to
1031 * set the board offline.
1032 */
1033 abts_cnt = 0;
1034 vha->flags.online = 0;
1035 }
1036 }
1037 }
1038
1039 WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
1040 RD_REG_DWORD(&reg->hccr);
1041
1042 WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
1043 RD_REG_DWORD(&reg->hccr);
1044
1045 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
1046 RD_REG_DWORD(&reg->hccr);
1047
1048 d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
1049 for (cnt = 6000000 ; cnt && d2; cnt--) {
1050 udelay(5);
1051 d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
1052 barrier();
1053 }
1054
1055 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1056
1057 if (IS_NOPOLLING_TYPE(ha))
1058 ha->isp_ops->enable_intrs(ha);
1059 }
1060
1061 /**
1062 * qla24xx_reset_chip() - Reset ISP24xx chip.
1063 * @ha: HA context
1064 *
1065 * Returns 0 on success.
1066 */
1067 void
1068 qla24xx_reset_chip(scsi_qla_host_t *vha)
1069 {
1070 struct qla_hw_data *ha = vha->hw;
1071
1072 if (pci_channel_offline(ha->pdev) &&
1073 ha->flags.pci_channel_io_perm_failure) {
1074 return;
1075 }
1076
1077 ha->isp_ops->disable_intrs(ha);
1078
1079 /* Perform RISC reset. */
1080 qla24xx_reset_risc(vha);
1081 }
1082
1083 /**
1084 * qla2x00_chip_diag() - Test chip for proper operation.
1085 * @ha: HA context
1086 *
1087 * Returns 0 on success.
1088 */
1089 int
1090 qla2x00_chip_diag(scsi_qla_host_t *vha)
1091 {
1092 int rval;
1093 struct qla_hw_data *ha = vha->hw;
1094 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1095 unsigned long flags = 0;
1096 uint16_t data;
1097 uint32_t cnt;
1098 uint16_t mb[5];
1099 struct req_que *req = ha->req_q_map[0];
1100
1101 /* Assume a failed state */
1102 rval = QLA_FUNCTION_FAILED;
1103
1104 ql_dbg(ql_dbg_init, vha, 0x007b,
1105 "Testing device at %lx.\n", (u_long)&reg->flash_address);
1106
1107 spin_lock_irqsave(&ha->hardware_lock, flags);
1108
1109 /* Reset ISP chip. */
1110 WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
1111
1112 /*
1113 * We need to have a delay here since the card will not respond while
1114 * in reset causing an MCA on some architectures.
1115 */
1116 udelay(20);
1117 data = qla2x00_debounce_register(&reg->ctrl_status);
1118 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
1119 udelay(5);
1120 data = RD_REG_WORD(&reg->ctrl_status);
1121 barrier();
1122 }
1123
1124 if (!cnt)
1125 goto chip_diag_failed;
1126
1127 ql_dbg(ql_dbg_init, vha, 0x007c,
1128 "Reset register cleared by chip reset.\n");
1129
1130 /* Reset RISC processor. */
1131 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
1132 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
1133
1134 /* Workaround for QLA2312 PCI parity error */
1135 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
1136 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
1137 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
1138 udelay(5);
1139 data = RD_MAILBOX_REG(ha, reg, 0);
1140 barrier();
1141 }
1142 } else
1143 udelay(10);
1144
1145 if (!cnt)
1146 goto chip_diag_failed;
1147
1148 /* Check product ID of chip */
1149 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product Id of chip.\n");
1150
1151 mb[1] = RD_MAILBOX_REG(ha, reg, 1);
1152 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
1153 mb[3] = RD_MAILBOX_REG(ha, reg, 3);
1154 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
1155 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
1156 mb[3] != PROD_ID_3) {
1157 ql_log(ql_log_warn, vha, 0x0062,
1158 "Wrong product ID = 0x%x,0x%x,0x%x.\n",
1159 mb[1], mb[2], mb[3]);
1160
1161 goto chip_diag_failed;
1162 }
1163 ha->product_id[0] = mb[1];
1164 ha->product_id[1] = mb[2];
1165 ha->product_id[2] = mb[3];
1166 ha->product_id[3] = mb[4];
1167
1168 /* Adjust fw RISC transfer size */
1169 if (req->length > 1024)
1170 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
1171 else
1172 ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
1173 req->length;
1174
1175 if (IS_QLA2200(ha) &&
1176 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
1177 /* Limit firmware transfer size with a 2200A */
1178 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n");
1179
1180 ha->device_type |= DT_ISP2200A;
1181 ha->fw_transfer_size = 128;
1182 }
1183
1184 /* Wrap Incoming Mailboxes Test. */
1185 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1186
1187 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n");
1188 rval = qla2x00_mbx_reg_test(vha);
1189 if (rval)
1190 ql_log(ql_log_warn, vha, 0x0080,
1191 "Failed mailbox send register test.\n");
1192 else
1193 /* Flag a successful rval */
1194 rval = QLA_SUCCESS;
1195 spin_lock_irqsave(&ha->hardware_lock, flags);
1196
1197 chip_diag_failed:
1198 if (rval)
1199 ql_log(ql_log_info, vha, 0x0081,
1200 "Chip diagnostics **** FAILED ****.\n");
1201
1202 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1203
1204 return (rval);
1205 }
1206
1207 /**
1208 * qla24xx_chip_diag() - Test ISP24xx for proper operation.
1209 * @ha: HA context
1210 *
1211 * Returns 0 on success.
1212 */
1213 int
1214 qla24xx_chip_diag(scsi_qla_host_t *vha)
1215 {
1216 int rval;
1217 struct qla_hw_data *ha = vha->hw;
1218 struct req_que *req = ha->req_q_map[0];
1219
1220 if (IS_QLA82XX(ha))
1221 return QLA_SUCCESS;
1222
1223 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
1224
1225 rval = qla2x00_mbx_reg_test(vha);
1226 if (rval) {
1227 ql_log(ql_log_warn, vha, 0x0082,
1228 "Failed mailbox send register test.\n");
1229 } else {
1230 /* Flag a successful rval */
1231 rval = QLA_SUCCESS;
1232 }
1233
1234 return rval;
1235 }
1236
1237 void
1238 qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
1239 {
1240 int rval;
1241 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
1242 eft_size, fce_size, mq_size;
1243 dma_addr_t tc_dma;
1244 void *tc;
1245 struct qla_hw_data *ha = vha->hw;
1246 struct req_que *req = ha->req_q_map[0];
1247 struct rsp_que *rsp = ha->rsp_q_map[0];
1248
1249 if (ha->fw_dump) {
1250 ql_dbg(ql_dbg_init, vha, 0x00bd,
1251 "Firmware dump already allocated.\n");
1252 return;
1253 }
1254
1255 ha->fw_dumped = 0;
1256 fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
1257 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
1258 fixed_size = sizeof(struct qla2100_fw_dump);
1259 } else if (IS_QLA23XX(ha)) {
1260 fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
1261 mem_size = (ha->fw_memory_size - 0x11000 + 1) *
1262 sizeof(uint16_t);
1263 } else if (IS_FWI2_CAPABLE(ha)) {
1264 if (IS_QLA81XX(ha))
1265 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
1266 else if (IS_QLA25XX(ha))
1267 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
1268 else
1269 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
1270 mem_size = (ha->fw_memory_size - 0x100000 + 1) *
1271 sizeof(uint32_t);
1272 if (ha->mqenable)
1273 mq_size = sizeof(struct qla2xxx_mq_chain);
1274 /* Allocate memory for Fibre Channel Event Buffer. */
1275 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha))
1276 goto try_eft;
1277
1278 tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
1279 GFP_KERNEL);
1280 if (!tc) {
1281 ql_log(ql_log_warn, vha, 0x00be,
1282 "Unable to allocate (%d KB) for FCE.\n",
1283 FCE_SIZE / 1024);
1284 goto try_eft;
1285 }
1286
1287 memset(tc, 0, FCE_SIZE);
1288 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
1289 ha->fce_mb, &ha->fce_bufs);
1290 if (rval) {
1291 ql_log(ql_log_warn, vha, 0x00bf,
1292 "Unable to initialize FCE (%d).\n", rval);
1293 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc,
1294 tc_dma);
1295 ha->flags.fce_enabled = 0;
1296 goto try_eft;
1297 }
1298 ql_dbg(ql_dbg_init, vha, 0x00c0,
1299 "Allocate (%d KB) for FCE...\n", FCE_SIZE / 1024);
1300
1301 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
1302 ha->flags.fce_enabled = 1;
1303 ha->fce_dma = tc_dma;
1304 ha->fce = tc;
1305 try_eft:
1306 /* Allocate memory for Extended Trace Buffer. */
1307 tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
1308 GFP_KERNEL);
1309 if (!tc) {
1310 ql_log(ql_log_warn, vha, 0x00c1,
1311 "Unable to allocate (%d KB) for EFT.\n",
1312 EFT_SIZE / 1024);
1313 goto cont_alloc;
1314 }
1315
1316 memset(tc, 0, EFT_SIZE);
1317 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
1318 if (rval) {
1319 ql_log(ql_log_warn, vha, 0x00c2,
1320 "Unable to initialize EFT (%d).\n", rval);
1321 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc,
1322 tc_dma);
1323 goto cont_alloc;
1324 }
1325 ql_dbg(ql_dbg_init, vha, 0x00c3,
1326 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024);
1327
1328 eft_size = EFT_SIZE;
1329 ha->eft_dma = tc_dma;
1330 ha->eft = tc;
1331 }
1332 cont_alloc:
1333 req_q_size = req->length * sizeof(request_t);
1334 rsp_q_size = rsp->length * sizeof(response_t);
1335
1336 dump_size = offsetof(struct qla2xxx_fw_dump, isp);
1337 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size;
1338 ha->chain_offset = dump_size;
1339 dump_size += mq_size + fce_size;
1340
1341 ha->fw_dump = vmalloc(dump_size);
1342 if (!ha->fw_dump) {
1343 ql_log(ql_log_warn, vha, 0x00c4,
1344 "Unable to allocate (%d KB) for firmware dump.\n",
1345 dump_size / 1024);
1346
1347 if (ha->fce) {
1348 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce,
1349 ha->fce_dma);
1350 ha->fce = NULL;
1351 ha->fce_dma = 0;
1352 }
1353
1354 if (ha->eft) {
1355 dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft,
1356 ha->eft_dma);
1357 ha->eft = NULL;
1358 ha->eft_dma = 0;
1359 }
1360 return;
1361 }
1362 ql_dbg(ql_dbg_init, vha, 0x00c5,
1363 "Allocated (%d KB) for firmware dump.\n", dump_size / 1024);
1364
1365 ha->fw_dump_len = dump_size;
1366 ha->fw_dump->signature[0] = 'Q';
1367 ha->fw_dump->signature[1] = 'L';
1368 ha->fw_dump->signature[2] = 'G';
1369 ha->fw_dump->signature[3] = 'C';
1370 ha->fw_dump->version = __constant_htonl(1);
1371
1372 ha->fw_dump->fixed_size = htonl(fixed_size);
1373 ha->fw_dump->mem_size = htonl(mem_size);
1374 ha->fw_dump->req_q_size = htonl(req_q_size);
1375 ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
1376
1377 ha->fw_dump->eft_size = htonl(eft_size);
1378 ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma));
1379 ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma));
1380
1381 ha->fw_dump->header_size =
1382 htonl(offsetof(struct qla2xxx_fw_dump, isp));
1383 }
1384
1385 static int
1386 qla81xx_mpi_sync(scsi_qla_host_t *vha)
1387 {
1388 #define MPS_MASK 0xe0
1389 int rval;
1390 uint16_t dc;
1391 uint32_t dw;
1392
1393 if (!IS_QLA81XX(vha->hw))
1394 return QLA_SUCCESS;
1395
1396 rval = qla2x00_write_ram_word(vha, 0x7c00, 1);
1397 if (rval != QLA_SUCCESS) {
1398 ql_log(ql_log_warn, vha, 0x0105,
1399 "Unable to acquire semaphore.\n");
1400 goto done;
1401 }
1402
1403 pci_read_config_word(vha->hw->pdev, 0x54, &dc);
1404 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw);
1405 if (rval != QLA_SUCCESS) {
1406 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n");
1407 goto done_release;
1408 }
1409
1410 dc &= MPS_MASK;
1411 if (dc == (dw & MPS_MASK))
1412 goto done_release;
1413
1414 dw &= ~MPS_MASK;
1415 dw |= dc;
1416 rval = qla2x00_write_ram_word(vha, 0x7a15, dw);
1417 if (rval != QLA_SUCCESS) {
1418 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n");
1419 }
1420
1421 done_release:
1422 rval = qla2x00_write_ram_word(vha, 0x7c00, 0);
1423 if (rval != QLA_SUCCESS) {
1424 ql_log(ql_log_warn, vha, 0x006d,
1425 "Unable to release semaphore.\n");
1426 }
1427
1428 done:
1429 return rval;
1430 }
1431
1432 /**
1433 * qla2x00_setup_chip() - Load and start RISC firmware.
1434 * @ha: HA context
1435 *
1436 * Returns 0 on success.
1437 */
1438 static int
1439 qla2x00_setup_chip(scsi_qla_host_t *vha)
1440 {
1441 int rval;
1442 uint32_t srisc_address = 0;
1443 struct qla_hw_data *ha = vha->hw;
1444 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1445 unsigned long flags;
1446 uint16_t fw_major_version;
1447
1448 if (IS_QLA82XX(ha)) {
1449 rval = ha->isp_ops->load_risc(vha, &srisc_address);
1450 if (rval == QLA_SUCCESS) {
1451 qla2x00_stop_firmware(vha);
1452 goto enable_82xx_npiv;
1453 } else
1454 goto failed;
1455 }
1456
1457 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
1458 /* Disable SRAM, Instruction RAM and GP RAM parity. */
1459 spin_lock_irqsave(&ha->hardware_lock, flags);
1460 WRT_REG_WORD(&reg->hccr, (HCCR_ENABLE_PARITY + 0x0));
1461 RD_REG_WORD(&reg->hccr);
1462 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1463 }
1464
1465 qla81xx_mpi_sync(vha);
1466
1467 /* Load firmware sequences */
1468 rval = ha->isp_ops->load_risc(vha, &srisc_address);
1469 if (rval == QLA_SUCCESS) {
1470 ql_dbg(ql_dbg_init, vha, 0x00c9,
1471 "Verifying Checksum of loaded RISC code.\n");
1472
1473 rval = qla2x00_verify_checksum(vha, srisc_address);
1474 if (rval == QLA_SUCCESS) {
1475 /* Start firmware execution. */
1476 ql_dbg(ql_dbg_init, vha, 0x00ca,
1477 "Starting firmware.\n");
1478
1479 rval = qla2x00_execute_fw(vha, srisc_address);
1480 /* Retrieve firmware information. */
1481 if (rval == QLA_SUCCESS) {
1482 enable_82xx_npiv:
1483 fw_major_version = ha->fw_major_version;
1484 if (IS_QLA82XX(ha))
1485 qla82xx_check_md_needed(vha);
1486 else {
1487 rval = qla2x00_get_fw_version(vha,
1488 &ha->fw_major_version,
1489 &ha->fw_minor_version,
1490 &ha->fw_subminor_version,
1491 &ha->fw_attributes,
1492 &ha->fw_memory_size,
1493 ha->mpi_version,
1494 &ha->mpi_capabilities,
1495 ha->phy_version);
1496 }
1497 if (rval != QLA_SUCCESS)
1498 goto failed;
1499 ha->flags.npiv_supported = 0;
1500 if (IS_QLA2XXX_MIDTYPE(ha) &&
1501 (ha->fw_attributes & BIT_2)) {
1502 ha->flags.npiv_supported = 1;
1503 if ((!ha->max_npiv_vports) ||
1504 ((ha->max_npiv_vports + 1) %
1505 MIN_MULTI_ID_FABRIC))
1506 ha->max_npiv_vports =
1507 MIN_MULTI_ID_FABRIC - 1;
1508 }
1509 qla2x00_get_resource_cnts(vha, NULL,
1510 &ha->fw_xcb_count, NULL, NULL,
1511 &ha->max_npiv_vports, NULL);
1512
1513 if (!fw_major_version && ql2xallocfwdump
1514 && !IS_QLA82XX(ha))
1515 qla2x00_alloc_fw_dump(vha);
1516 }
1517 } else {
1518 ql_log(ql_log_fatal, vha, 0x00cd,
1519 "ISP Firmware failed checksum.\n");
1520 goto failed;
1521 }
1522 }
1523
1524 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
1525 /* Enable proper parity. */
1526 spin_lock_irqsave(&ha->hardware_lock, flags);
1527 if (IS_QLA2300(ha))
1528 /* SRAM parity */
1529 WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x1);
1530 else
1531 /* SRAM, Instruction RAM and GP RAM parity */
1532 WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x7);
1533 RD_REG_WORD(&reg->hccr);
1534 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1535 }
1536
1537 if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
1538 uint32_t size;
1539
1540 rval = qla81xx_fac_get_sector_size(vha, &size);
1541 if (rval == QLA_SUCCESS) {
1542 ha->flags.fac_supported = 1;
1543 ha->fdt_block_size = size << 2;
1544 } else {
1545 ql_log(ql_log_warn, vha, 0x00ce,
1546 "Unsupported FAC firmware (%d.%02d.%02d).\n",
1547 ha->fw_major_version, ha->fw_minor_version,
1548 ha->fw_subminor_version);
1549 }
1550 }
1551 failed:
1552 if (rval) {
1553 ql_log(ql_log_fatal, vha, 0x00cf,
1554 "Setup chip ****FAILED****.\n");
1555 }
1556
1557 return (rval);
1558 }
1559
1560 /**
1561 * qla2x00_init_response_q_entries() - Initializes response queue entries.
1562 * @ha: HA context
1563 *
1564 * Beginning of request ring has initialization control block already built
1565 * by nvram config routine.
1566 *
1567 * Returns 0 on success.
1568 */
1569 void
1570 qla2x00_init_response_q_entries(struct rsp_que *rsp)
1571 {
1572 uint16_t cnt;
1573 response_t *pkt;
1574
1575 rsp->ring_ptr = rsp->ring;
1576 rsp->ring_index = 0;
1577 rsp->status_srb = NULL;
1578 pkt = rsp->ring_ptr;
1579 for (cnt = 0; cnt < rsp->length; cnt++) {
1580 pkt->signature = RESPONSE_PROCESSED;
1581 pkt++;
1582 }
1583 }
1584
1585 /**
1586 * qla2x00_update_fw_options() - Read and process firmware options.
1587 * @ha: HA context
1588 *
1589 * Returns 0 on success.
1590 */
1591 void
1592 qla2x00_update_fw_options(scsi_qla_host_t *vha)
1593 {
1594 uint16_t swing, emphasis, tx_sens, rx_sens;
1595 struct qla_hw_data *ha = vha->hw;
1596
1597 memset(ha->fw_options, 0, sizeof(ha->fw_options));
1598 qla2x00_get_fw_options(vha, ha->fw_options);
1599
1600 if (IS_QLA2100(ha) || IS_QLA2200(ha))
1601 return;
1602
1603 /* Serial Link options. */
1604 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115,
1605 "Serial link options.\n");
1606 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109,
1607 (uint8_t *)&ha->fw_seriallink_options,
1608 sizeof(ha->fw_seriallink_options));
1609
1610 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
1611 if (ha->fw_seriallink_options[3] & BIT_2) {
1612 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
1613
1614 /* 1G settings */
1615 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
1616 emphasis = (ha->fw_seriallink_options[2] &
1617 (BIT_4 | BIT_3)) >> 3;
1618 tx_sens = ha->fw_seriallink_options[0] &
1619 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
1620 rx_sens = (ha->fw_seriallink_options[0] &
1621 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
1622 ha->fw_options[10] = (emphasis << 14) | (swing << 8);
1623 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
1624 if (rx_sens == 0x0)
1625 rx_sens = 0x3;
1626 ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
1627 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
1628 ha->fw_options[10] |= BIT_5 |
1629 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
1630 (tx_sens & (BIT_1 | BIT_0));
1631
1632 /* 2G settings */
1633 swing = (ha->fw_seriallink_options[2] &
1634 (BIT_7 | BIT_6 | BIT_5)) >> 5;
1635 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
1636 tx_sens = ha->fw_seriallink_options[1] &
1637 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
1638 rx_sens = (ha->fw_seriallink_options[1] &
1639 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
1640 ha->fw_options[11] = (emphasis << 14) | (swing << 8);
1641 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
1642 if (rx_sens == 0x0)
1643 rx_sens = 0x3;
1644 ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
1645 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
1646 ha->fw_options[11] |= BIT_5 |
1647 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
1648 (tx_sens & (BIT_1 | BIT_0));
1649 }
1650
1651 /* FCP2 options. */
1652 /* Return command IOCBs without waiting for an ABTS to complete. */
1653 ha->fw_options[3] |= BIT_13;
1654
1655 /* LED scheme. */
1656 if (ha->flags.enable_led_scheme)
1657 ha->fw_options[2] |= BIT_12;
1658
1659 /* Detect ISP6312. */
1660 if (IS_QLA6312(ha))
1661 ha->fw_options[2] |= BIT_13;
1662
1663 /* Update firmware options. */
1664 qla2x00_set_fw_options(vha, ha->fw_options);
1665 }
1666
1667 void
1668 qla24xx_update_fw_options(scsi_qla_host_t *vha)
1669 {
1670 int rval;
1671 struct qla_hw_data *ha = vha->hw;
1672
1673 if (IS_QLA82XX(ha))
1674 return;
1675
1676 /* Update Serial Link options. */
1677 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
1678 return;
1679
1680 rval = qla2x00_set_serdes_params(vha,
1681 le16_to_cpu(ha->fw_seriallink_options24[1]),
1682 le16_to_cpu(ha->fw_seriallink_options24[2]),
1683 le16_to_cpu(ha->fw_seriallink_options24[3]));
1684 if (rval != QLA_SUCCESS) {
1685 ql_log(ql_log_warn, vha, 0x0104,
1686 "Unable to update Serial Link options (%x).\n", rval);
1687 }
1688 }
1689
1690 void
1691 qla2x00_config_rings(struct scsi_qla_host *vha)
1692 {
1693 struct qla_hw_data *ha = vha->hw;
1694 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1695 struct req_que *req = ha->req_q_map[0];
1696 struct rsp_que *rsp = ha->rsp_q_map[0];
1697
1698 /* Setup ring parameters in initialization control block. */
1699 ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0);
1700 ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0);
1701 ha->init_cb->request_q_length = cpu_to_le16(req->length);
1702 ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
1703 ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
1704 ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
1705 ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
1706 ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
1707
1708 WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
1709 WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
1710 WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
1711 WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
1712 RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
1713 }
1714
1715 void
1716 qla24xx_config_rings(struct scsi_qla_host *vha)
1717 {
1718 struct qla_hw_data *ha = vha->hw;
1719 device_reg_t __iomem *reg = ISP_QUE_REG(ha, 0);
1720 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
1721 struct qla_msix_entry *msix;
1722 struct init_cb_24xx *icb;
1723 uint16_t rid = 0;
1724 struct req_que *req = ha->req_q_map[0];
1725 struct rsp_que *rsp = ha->rsp_q_map[0];
1726
1727 /* Setup ring parameters in initialization control block. */
1728 icb = (struct init_cb_24xx *)ha->init_cb;
1729 icb->request_q_outpointer = __constant_cpu_to_le16(0);
1730 icb->response_q_inpointer = __constant_cpu_to_le16(0);
1731 icb->request_q_length = cpu_to_le16(req->length);
1732 icb->response_q_length = cpu_to_le16(rsp->length);
1733 icb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
1734 icb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
1735 icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
1736 icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
1737
1738 if (ha->mqenable) {
1739 icb->qos = __constant_cpu_to_le16(QLA_DEFAULT_QUE_QOS);
1740 icb->rid = __constant_cpu_to_le16(rid);
1741 if (ha->flags.msix_enabled) {
1742 msix = &ha->msix_entries[1];
1743 ql_dbg(ql_dbg_init, vha, 0x00fd,
1744 "Registering vector 0x%x for base que.\n",
1745 msix->entry);
1746 icb->msix = cpu_to_le16(msix->entry);
1747 }
1748 /* Use alternate PCI bus number */
1749 if (MSB(rid))
1750 icb->firmware_options_2 |=
1751 __constant_cpu_to_le32(BIT_19);
1752 /* Use alternate PCI devfn */
1753 if (LSB(rid))
1754 icb->firmware_options_2 |=
1755 __constant_cpu_to_le32(BIT_18);
1756
1757 /* Use Disable MSIX Handshake mode for capable adapters */
1758 if (IS_MSIX_NACK_CAPABLE(ha)) {
1759 icb->firmware_options_2 &=
1760 __constant_cpu_to_le32(~BIT_22);
1761 ha->flags.disable_msix_handshake = 1;
1762 ql_dbg(ql_dbg_init, vha, 0x00fe,
1763 "MSIX Handshake Disable Mode turned on.\n");
1764 } else {
1765 icb->firmware_options_2 |=
1766 __constant_cpu_to_le32(BIT_22);
1767 }
1768 icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23);
1769
1770 WRT_REG_DWORD(&reg->isp25mq.req_q_in, 0);
1771 WRT_REG_DWORD(&reg->isp25mq.req_q_out, 0);
1772 WRT_REG_DWORD(&reg->isp25mq.rsp_q_in, 0);
1773 WRT_REG_DWORD(&reg->isp25mq.rsp_q_out, 0);
1774 } else {
1775 WRT_REG_DWORD(&reg->isp24.req_q_in, 0);
1776 WRT_REG_DWORD(&reg->isp24.req_q_out, 0);
1777 WRT_REG_DWORD(&reg->isp24.rsp_q_in, 0);
1778 WRT_REG_DWORD(&reg->isp24.rsp_q_out, 0);
1779 }
1780 /* PCI posting */
1781 RD_REG_DWORD(&ioreg->hccr);
1782 }
1783
1784 /**
1785 * qla2x00_init_rings() - Initializes firmware.
1786 * @ha: HA context
1787 *
1788 * Beginning of request ring has initialization control block already built
1789 * by nvram config routine.
1790 *
1791 * Returns 0 on success.
1792 */
1793 static int
1794 qla2x00_init_rings(scsi_qla_host_t *vha)
1795 {
1796 int rval;
1797 unsigned long flags = 0;
1798 int cnt, que;
1799 struct qla_hw_data *ha = vha->hw;
1800 struct req_que *req;
1801 struct rsp_que *rsp;
1802 struct scsi_qla_host *vp;
1803 struct mid_init_cb_24xx *mid_init_cb =
1804 (struct mid_init_cb_24xx *) ha->init_cb;
1805
1806 spin_lock_irqsave(&ha->hardware_lock, flags);
1807
1808 /* Clear outstanding commands array. */
1809 for (que = 0; que < ha->max_req_queues; que++) {
1810 req = ha->req_q_map[que];
1811 if (!req)
1812 continue;
1813 for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++)
1814 req->outstanding_cmds[cnt] = NULL;
1815
1816 req->current_outstanding_cmd = 1;
1817
1818 /* Initialize firmware. */
1819 req->ring_ptr = req->ring;
1820 req->ring_index = 0;
1821 req->cnt = req->length;
1822 }
1823
1824 for (que = 0; que < ha->max_rsp_queues; que++) {
1825 rsp = ha->rsp_q_map[que];
1826 if (!rsp)
1827 continue;
1828 /* Initialize response queue entries */
1829 qla2x00_init_response_q_entries(rsp);
1830 }
1831
1832 spin_lock(&ha->vport_slock);
1833 /* Clear RSCN queue. */
1834 list_for_each_entry(vp, &ha->vp_list, list) {
1835 vp->rscn_in_ptr = 0;
1836 vp->rscn_out_ptr = 0;
1837 }
1838
1839 spin_unlock(&ha->vport_slock);
1840
1841 ha->isp_ops->config_rings(vha);
1842
1843 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1844
1845 /* Update any ISP specific firmware options before initialization. */
1846 ha->isp_ops->update_fw_options(vha);
1847
1848 ql_dbg(ql_dbg_init, vha, 0x00d1, "Issue init firmware.\n");
1849
1850 if (ha->flags.npiv_supported) {
1851 if (ha->operating_mode == LOOP)
1852 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
1853 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
1854 }
1855
1856 if (IS_FWI2_CAPABLE(ha)) {
1857 mid_init_cb->options = __constant_cpu_to_le16(BIT_1);
1858 mid_init_cb->init_cb.execution_throttle =
1859 cpu_to_le16(ha->fw_xcb_count);
1860 }
1861
1862 rval = qla2x00_init_firmware(vha, ha->init_cb_size);
1863 if (rval) {
1864 ql_log(ql_log_fatal, vha, 0x00d2,
1865 "Init Firmware **** FAILED ****.\n");
1866 } else {
1867 ql_dbg(ql_dbg_init, vha, 0x00d3,
1868 "Init Firmware -- success.\n");
1869 }
1870
1871 return (rval);
1872 }
1873
1874 /**
1875 * qla2x00_fw_ready() - Waits for firmware ready.
1876 * @ha: HA context
1877 *
1878 * Returns 0 on success.
1879 */
1880 static int
1881 qla2x00_fw_ready(scsi_qla_host_t *vha)
1882 {
1883 int rval;
1884 unsigned long wtime, mtime, cs84xx_time;
1885 uint16_t min_wait; /* Minimum wait time if loop is down */
1886 uint16_t wait_time; /* Wait time if loop is coming ready */
1887 uint16_t state[5];
1888 struct qla_hw_data *ha = vha->hw;
1889
1890 rval = QLA_SUCCESS;
1891
1892 /* 20 seconds for loop down. */
1893 min_wait = 20;
1894
1895 /*
1896 * Firmware should take at most one RATOV to login, plus 5 seconds for
1897 * our own processing.
1898 */
1899 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
1900 wait_time = min_wait;
1901 }
1902
1903 /* Min wait time if loop down */
1904 mtime = jiffies + (min_wait * HZ);
1905
1906 /* wait time before firmware ready */
1907 wtime = jiffies + (wait_time * HZ);
1908
1909 /* Wait for ISP to finish LIP */
1910 if (!vha->flags.init_done)
1911 ql_log(ql_log_info, vha, 0x801e,
1912 "Waiting for LIP to complete.\n");
1913
1914 do {
1915 rval = qla2x00_get_firmware_state(vha, state);
1916 if (rval == QLA_SUCCESS) {
1917 if (state[0] < FSTATE_LOSS_OF_SYNC) {
1918 vha->device_flags &= ~DFLG_NO_CABLE;
1919 }
1920 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
1921 ql_dbg(ql_dbg_taskm, vha, 0x801f,
1922 "fw_state=%x 84xx=%x.\n", state[0],
1923 state[2]);
1924 if ((state[2] & FSTATE_LOGGED_IN) &&
1925 (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
1926 ql_dbg(ql_dbg_taskm, vha, 0x8028,
1927 "Sending verify iocb.\n");
1928
1929 cs84xx_time = jiffies;
1930 rval = qla84xx_init_chip(vha);
1931 if (rval != QLA_SUCCESS) {
1932 ql_log(ql_log_warn,
1933 vha, 0x8007,
1934 "Init chip failed.\n");
1935 break;
1936 }
1937
1938 /* Add time taken to initialize. */
1939 cs84xx_time = jiffies - cs84xx_time;
1940 wtime += cs84xx_time;
1941 mtime += cs84xx_time;
1942 ql_dbg(ql_dbg_taskm, vha, 0x8008,
1943 "Increasing wait time by %ld. "
1944 "New time %ld.\n", cs84xx_time,
1945 wtime);
1946 }
1947 } else if (state[0] == FSTATE_READY) {
1948 ql_dbg(ql_dbg_taskm, vha, 0x8037,
1949 "F/W Ready - OK.\n");
1950
1951 qla2x00_get_retry_cnt(vha, &ha->retry_count,
1952 &ha->login_timeout, &ha->r_a_tov);
1953
1954 rval = QLA_SUCCESS;
1955 break;
1956 }
1957
1958 rval = QLA_FUNCTION_FAILED;
1959
1960 if (atomic_read(&vha->loop_down_timer) &&
1961 state[0] != FSTATE_READY) {
1962 /* Loop down. Timeout on min_wait for states
1963 * other than Wait for Login.
1964 */
1965 if (time_after_eq(jiffies, mtime)) {
1966 ql_log(ql_log_info, vha, 0x8038,
1967 "Cable is unplugged...\n");
1968
1969 vha->device_flags |= DFLG_NO_CABLE;
1970 break;
1971 }
1972 }
1973 } else {
1974 /* Mailbox cmd failed. Timeout on min_wait. */
1975 if (time_after_eq(jiffies, mtime) ||
1976 ha->flags.isp82xx_fw_hung)
1977 break;
1978 }
1979
1980 if (time_after_eq(jiffies, wtime))
1981 break;
1982
1983 /* Delay for a while */
1984 msleep(500);
1985 } while (1);
1986
1987 ql_dbg(ql_dbg_taskm, vha, 0x803a,
1988 "fw_state=%x (%x, %x, %x, %x) " "curr time=%lx.\n", state[0],
1989 state[1], state[2], state[3], state[4], jiffies);
1990
1991 if (rval && !(vha->device_flags & DFLG_NO_CABLE)) {
1992 ql_log(ql_log_warn, vha, 0x803b,
1993 "Firmware ready **** FAILED ****.\n");
1994 }
1995
1996 return (rval);
1997 }
1998
1999 /*
2000 * qla2x00_configure_hba
2001 * Setup adapter context.
2002 *
2003 * Input:
2004 * ha = adapter state pointer.
2005 *
2006 * Returns:
2007 * 0 = success
2008 *
2009 * Context:
2010 * Kernel context.
2011 */
2012 static int
2013 qla2x00_configure_hba(scsi_qla_host_t *vha)
2014 {
2015 int rval;
2016 uint16_t loop_id;
2017 uint16_t topo;
2018 uint16_t sw_cap;
2019 uint8_t al_pa;
2020 uint8_t area;
2021 uint8_t domain;
2022 char connect_type[22];
2023 struct qla_hw_data *ha = vha->hw;
2024
2025 /* Get host addresses. */
2026 rval = qla2x00_get_adapter_id(vha,
2027 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
2028 if (rval != QLA_SUCCESS) {
2029 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
2030 IS_QLA8XXX_TYPE(ha) ||
2031 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
2032 ql_dbg(ql_dbg_disc, vha, 0x2008,
2033 "Loop is in a transition state.\n");
2034 } else {
2035 ql_log(ql_log_warn, vha, 0x2009,
2036 "Unable to get host loop ID.\n");
2037 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2038 }
2039 return (rval);
2040 }
2041
2042 if (topo == 4) {
2043 ql_log(ql_log_info, vha, 0x200a,
2044 "Cannot get topology - retrying.\n");
2045 return (QLA_FUNCTION_FAILED);
2046 }
2047
2048 vha->loop_id = loop_id;
2049
2050 /* initialize */
2051 ha->min_external_loopid = SNS_FIRST_LOOP_ID;
2052 ha->operating_mode = LOOP;
2053 ha->switch_cap = 0;
2054
2055 switch (topo) {
2056 case 0:
2057 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n");
2058 ha->current_topology = ISP_CFG_NL;
2059 strcpy(connect_type, "(Loop)");
2060 break;
2061
2062 case 1:
2063 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n");
2064 ha->switch_cap = sw_cap;
2065 ha->current_topology = ISP_CFG_FL;
2066 strcpy(connect_type, "(FL_Port)");
2067 break;
2068
2069 case 2:
2070 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n");
2071 ha->operating_mode = P2P;
2072 ha->current_topology = ISP_CFG_N;
2073 strcpy(connect_type, "(N_Port-to-N_Port)");
2074 break;
2075
2076 case 3:
2077 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n");
2078 ha->switch_cap = sw_cap;
2079 ha->operating_mode = P2P;
2080 ha->current_topology = ISP_CFG_F;
2081 strcpy(connect_type, "(F_Port)");
2082 break;
2083
2084 default:
2085 ql_dbg(ql_dbg_disc, vha, 0x200f,
2086 "HBA in unknown topology %x, using NL.\n", topo);
2087 ha->current_topology = ISP_CFG_NL;
2088 strcpy(connect_type, "(Loop)");
2089 break;
2090 }
2091
2092 /* Save Host port and loop ID. */
2093 /* byte order - Big Endian */
2094 vha->d_id.b.domain = domain;
2095 vha->d_id.b.area = area;
2096 vha->d_id.b.al_pa = al_pa;
2097
2098 if (!vha->flags.init_done)
2099 ql_log(ql_log_info, vha, 0x2010,
2100 "Topology - %s, Host Loop address 0x%x.\n",
2101 connect_type, vha->loop_id);
2102
2103 if (rval) {
2104 ql_log(ql_log_warn, vha, 0x2011,
2105 "%s FAILED\n", __func__);
2106 } else {
2107 ql_dbg(ql_dbg_disc, vha, 0x2012,
2108 "%s success\n", __func__);
2109 }
2110
2111 return(rval);
2112 }
2113
2114 inline void
2115 qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
2116 char *def)
2117 {
2118 char *st, *en;
2119 uint16_t index;
2120 struct qla_hw_data *ha = vha->hw;
2121 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) &&
2122 !IS_QLA8XXX_TYPE(ha);
2123
2124 if (memcmp(model, BINZERO, len) != 0) {
2125 strncpy(ha->model_number, model, len);
2126 st = en = ha->model_number;
2127 en += len - 1;
2128 while (en > st) {
2129 if (*en != 0x20 && *en != 0x00)
2130 break;
2131 *en-- = '\0';
2132 }
2133
2134 index = (ha->pdev->subsystem_device & 0xff);
2135 if (use_tbl &&
2136 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
2137 index < QLA_MODEL_NAMES)
2138 strncpy(ha->model_desc,
2139 qla2x00_model_name[index * 2 + 1],
2140 sizeof(ha->model_desc) - 1);
2141 } else {
2142 index = (ha->pdev->subsystem_device & 0xff);
2143 if (use_tbl &&
2144 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
2145 index < QLA_MODEL_NAMES) {
2146 strcpy(ha->model_number,
2147 qla2x00_model_name[index * 2]);
2148 strncpy(ha->model_desc,
2149 qla2x00_model_name[index * 2 + 1],
2150 sizeof(ha->model_desc) - 1);
2151 } else {
2152 strcpy(ha->model_number, def);
2153 }
2154 }
2155 if (IS_FWI2_CAPABLE(ha))
2156 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
2157 sizeof(ha->model_desc));
2158 }
2159
2160 /* On sparc systems, obtain port and node WWN from firmware
2161 * properties.
2162 */
2163 static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
2164 {
2165 #ifdef CONFIG_SPARC
2166 struct qla_hw_data *ha = vha->hw;
2167 struct pci_dev *pdev = ha->pdev;
2168 struct device_node *dp = pci_device_to_OF_node(pdev);
2169 const u8 *val;
2170 int len;
2171
2172 val = of_get_property(dp, "port-wwn", &len);
2173 if (val && len >= WWN_SIZE)
2174 memcpy(nv->port_name, val, WWN_SIZE);
2175
2176 val = of_get_property(dp, "node-wwn", &len);
2177 if (val && len >= WWN_SIZE)
2178 memcpy(nv->node_name, val, WWN_SIZE);
2179 #endif
2180 }
2181
2182 /*
2183 * NVRAM configuration for ISP 2xxx
2184 *
2185 * Input:
2186 * ha = adapter block pointer.
2187 *
2188 * Output:
2189 * initialization control block in response_ring
2190 * host adapters parameters in host adapter block
2191 *
2192 * Returns:
2193 * 0 = success.
2194 */
2195 int
2196 qla2x00_nvram_config(scsi_qla_host_t *vha)
2197 {
2198 int rval;
2199 uint8_t chksum = 0;
2200 uint16_t cnt;
2201 uint8_t *dptr1, *dptr2;
2202 struct qla_hw_data *ha = vha->hw;
2203 init_cb_t *icb = ha->init_cb;
2204 nvram_t *nv = ha->nvram;
2205 uint8_t *ptr = ha->nvram;
2206 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2207
2208 rval = QLA_SUCCESS;
2209
2210 /* Determine NVRAM starting address. */
2211 ha->nvram_size = sizeof(nvram_t);
2212 ha->nvram_base = 0;
2213 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
2214 if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)
2215 ha->nvram_base = 0x80;
2216
2217 /* Get NVRAM data and calculate checksum. */
2218 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
2219 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
2220 chksum += *ptr++;
2221
2222 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f,
2223 "Contents of NVRAM.\n");
2224 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110,
2225 (uint8_t *)nv, ha->nvram_size);
2226
2227 /* Bad NVRAM data, set defaults parameters. */
2228 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' ||
2229 nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) {
2230 /* Reset NVRAM data. */
2231 ql_log(ql_log_warn, vha, 0x0064,
2232 "Inconisistent NVRAM "
2233 "detected: checksum=0x%x id=%c version=0x%x.\n",
2234 chksum, nv->id[0], nv->nvram_version);
2235 ql_log(ql_log_warn, vha, 0x0065,
2236 "Falling back to "
2237 "functioning (yet invalid -- WWPN) defaults.\n");
2238
2239 /*
2240 * Set default initialization control block.
2241 */
2242 memset(nv, 0, ha->nvram_size);
2243 nv->parameter_block_version = ICB_VERSION;
2244
2245 if (IS_QLA23XX(ha)) {
2246 nv->firmware_options[0] = BIT_2 | BIT_1;
2247 nv->firmware_options[1] = BIT_7 | BIT_5;
2248 nv->add_firmware_options[0] = BIT_5;
2249 nv->add_firmware_options[1] = BIT_5 | BIT_4;
2250 nv->frame_payload_size = __constant_cpu_to_le16(2048);
2251 nv->special_options[1] = BIT_7;
2252 } else if (IS_QLA2200(ha)) {
2253 nv->firmware_options[0] = BIT_2 | BIT_1;
2254 nv->firmware_options[1] = BIT_7 | BIT_5;
2255 nv->add_firmware_options[0] = BIT_5;
2256 nv->add_firmware_options[1] = BIT_5 | BIT_4;
2257 nv->frame_payload_size = __constant_cpu_to_le16(1024);
2258 } else if (IS_QLA2100(ha)) {
2259 nv->firmware_options[0] = BIT_3 | BIT_1;
2260 nv->firmware_options[1] = BIT_5;
2261 nv->frame_payload_size = __constant_cpu_to_le16(1024);
2262 }
2263
2264 nv->max_iocb_allocation = __constant_cpu_to_le16(256);
2265 nv->execution_throttle = __constant_cpu_to_le16(16);
2266 nv->retry_count = 8;
2267 nv->retry_delay = 1;
2268
2269 nv->port_name[0] = 33;
2270 nv->port_name[3] = 224;
2271 nv->port_name[4] = 139;
2272
2273 qla2xxx_nvram_wwn_from_ofw(vha, nv);
2274
2275 nv->login_timeout = 4;
2276
2277 /*
2278 * Set default host adapter parameters
2279 */
2280 nv->host_p[1] = BIT_2;
2281 nv->reset_delay = 5;
2282 nv->port_down_retry_count = 8;
2283 nv->max_luns_per_target = __constant_cpu_to_le16(8);
2284 nv->link_down_timeout = 60;
2285
2286 rval = 1;
2287 }
2288
2289 #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
2290 /*
2291 * The SN2 does not provide BIOS emulation which means you can't change
2292 * potentially bogus BIOS settings. Force the use of default settings
2293 * for link rate and frame size. Hope that the rest of the settings
2294 * are valid.
2295 */
2296 if (ia64_platform_is("sn2")) {
2297 nv->frame_payload_size = __constant_cpu_to_le16(2048);
2298 if (IS_QLA23XX(ha))
2299 nv->special_options[1] = BIT_7;
2300 }
2301 #endif
2302
2303 /* Reset Initialization control block */
2304 memset(icb, 0, ha->init_cb_size);
2305
2306 /*
2307 * Setup driver NVRAM options.
2308 */
2309 nv->firmware_options[0] |= (BIT_6 | BIT_1);
2310 nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
2311 nv->firmware_options[1] |= (BIT_5 | BIT_0);
2312 nv->firmware_options[1] &= ~BIT_4;
2313
2314 if (IS_QLA23XX(ha)) {
2315 nv->firmware_options[0] |= BIT_2;
2316 nv->firmware_options[0] &= ~BIT_3;
2317 nv->firmware_options[0] &= ~BIT_6;
2318 nv->add_firmware_options[1] |= BIT_5 | BIT_4;
2319
2320 if (IS_QLA2300(ha)) {
2321 if (ha->fb_rev == FPM_2310) {
2322 strcpy(ha->model_number, "QLA2310");
2323 } else {
2324 strcpy(ha->model_number, "QLA2300");
2325 }
2326 } else {
2327 qla2x00_set_model_info(vha, nv->model_number,
2328 sizeof(nv->model_number), "QLA23xx");
2329 }
2330 } else if (IS_QLA2200(ha)) {
2331 nv->firmware_options[0] |= BIT_2;
2332 /*
2333 * 'Point-to-point preferred, else loop' is not a safe
2334 * connection mode setting.
2335 */
2336 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
2337 (BIT_5 | BIT_4)) {
2338 /* Force 'loop preferred, else point-to-point'. */
2339 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
2340 nv->add_firmware_options[0] |= BIT_5;
2341 }
2342 strcpy(ha->model_number, "QLA22xx");
2343 } else /*if (IS_QLA2100(ha))*/ {
2344 strcpy(ha->model_number, "QLA2100");
2345 }
2346
2347 /*
2348 * Copy over NVRAM RISC parameter block to initialization control block.
2349 */
2350 dptr1 = (uint8_t *)icb;
2351 dptr2 = (uint8_t *)&nv->parameter_block_version;
2352 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
2353 while (cnt--)
2354 *dptr1++ = *dptr2++;
2355
2356 /* Copy 2nd half. */
2357 dptr1 = (uint8_t *)icb->add_firmware_options;
2358 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
2359 while (cnt--)
2360 *dptr1++ = *dptr2++;
2361
2362 /* Use alternate WWN? */
2363 if (nv->host_p[1] & BIT_7) {
2364 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
2365 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
2366 }
2367
2368 /* Prepare nodename */
2369 if ((icb->firmware_options[1] & BIT_6) == 0) {
2370 /*
2371 * Firmware will apply the following mask if the nodename was
2372 * not provided.
2373 */
2374 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
2375 icb->node_name[0] &= 0xF0;
2376 }
2377
2378 /*
2379 * Set host adapter parameters.
2380 */
2381
2382 /*
2383 * BIT_7 in the host-parameters section allows for modification to
2384 * internal driver logging.
2385 */
2386 if (nv->host_p[0] & BIT_7)
2387 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK;
2388 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
2389 /* Always load RISC code on non ISP2[12]00 chips. */
2390 if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
2391 ha->flags.disable_risc_code_load = 0;
2392 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
2393 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
2394 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
2395 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
2396 ha->flags.disable_serdes = 0;
2397
2398 ha->operating_mode =
2399 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
2400
2401 memcpy(ha->fw_seriallink_options, nv->seriallink_options,
2402 sizeof(ha->fw_seriallink_options));
2403
2404 /* save HBA serial number */
2405 ha->serial0 = icb->port_name[5];
2406 ha->serial1 = icb->port_name[6];
2407 ha->serial2 = icb->port_name[7];
2408 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
2409 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
2410
2411 icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
2412
2413 ha->retry_count = nv->retry_count;
2414
2415 /* Set minimum login_timeout to 4 seconds. */
2416 if (nv->login_timeout != ql2xlogintimeout)
2417 nv->login_timeout = ql2xlogintimeout;
2418 if (nv->login_timeout < 4)
2419 nv->login_timeout = 4;
2420 ha->login_timeout = nv->login_timeout;
2421 icb->login_timeout = nv->login_timeout;
2422
2423 /* Set minimum RATOV to 100 tenths of a second. */
2424 ha->r_a_tov = 100;
2425
2426 ha->loop_reset_delay = nv->reset_delay;
2427
2428 /* Link Down Timeout = 0:
2429 *
2430 * When Port Down timer expires we will start returning
2431 * I/O's to OS with "DID_NO_CONNECT".
2432 *
2433 * Link Down Timeout != 0:
2434 *
2435 * The driver waits for the link to come up after link down
2436 * before returning I/Os to OS with "DID_NO_CONNECT".
2437 */
2438 if (nv->link_down_timeout == 0) {
2439 ha->loop_down_abort_time =
2440 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
2441 } else {
2442 ha->link_down_timeout = nv->link_down_timeout;
2443 ha->loop_down_abort_time =
2444 (LOOP_DOWN_TIME - ha->link_down_timeout);
2445 }
2446
2447 /*
2448 * Need enough time to try and get the port back.
2449 */
2450 ha->port_down_retry_count = nv->port_down_retry_count;
2451 if (qlport_down_retry)
2452 ha->port_down_retry_count = qlport_down_retry;
2453 /* Set login_retry_count */
2454 ha->login_retry_count = nv->retry_count;
2455 if (ha->port_down_retry_count == nv->port_down_retry_count &&
2456 ha->port_down_retry_count > 3)
2457 ha->login_retry_count = ha->port_down_retry_count;
2458 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
2459 ha->login_retry_count = ha->port_down_retry_count;
2460 if (ql2xloginretrycount)
2461 ha->login_retry_count = ql2xloginretrycount;
2462
2463 icb->lun_enables = __constant_cpu_to_le16(0);
2464 icb->command_resource_count = 0;
2465 icb->immediate_notify_resource_count = 0;
2466 icb->timeout = __constant_cpu_to_le16(0);
2467
2468 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
2469 /* Enable RIO */
2470 icb->firmware_options[0] &= ~BIT_3;
2471 icb->add_firmware_options[0] &=
2472 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
2473 icb->add_firmware_options[0] |= BIT_2;
2474 icb->response_accumulation_timer = 3;
2475 icb->interrupt_delay_timer = 5;
2476
2477 vha->flags.process_response_queue = 1;
2478 } else {
2479 /* Enable ZIO. */
2480 if (!vha->flags.init_done) {
2481 ha->zio_mode = icb->add_firmware_options[0] &
2482 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
2483 ha->zio_timer = icb->interrupt_delay_timer ?
2484 icb->interrupt_delay_timer: 2;
2485 }
2486 icb->add_firmware_options[0] &=
2487 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
2488 vha->flags.process_response_queue = 0;
2489 if (ha->zio_mode != QLA_ZIO_DISABLED) {
2490 ha->zio_mode = QLA_ZIO_MODE_6;
2491
2492 ql_log(ql_log_info, vha, 0x0068,
2493 "ZIO mode %d enabled; timer delay (%d us).\n",
2494 ha->zio_mode, ha->zio_timer * 100);
2495
2496 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
2497 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
2498 vha->flags.process_response_queue = 1;
2499 }
2500 }
2501
2502 if (rval) {
2503 ql_log(ql_log_warn, vha, 0x0069,
2504 "NVRAM configuration failed.\n");
2505 }
2506 return (rval);
2507 }
2508
2509 static void
2510 qla2x00_rport_del(void *data)
2511 {
2512 fc_port_t *fcport = data;
2513 struct fc_rport *rport;
2514 unsigned long flags;
2515
2516 spin_lock_irqsave(fcport->vha->host->host_lock, flags);
2517 rport = fcport->drport ? fcport->drport: fcport->rport;
2518 fcport->drport = NULL;
2519 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
2520 if (rport)
2521 fc_remote_port_delete(rport);
2522 }
2523
2524 /**
2525 * qla2x00_alloc_fcport() - Allocate a generic fcport.
2526 * @ha: HA context
2527 * @flags: allocation flags
2528 *
2529 * Returns a pointer to the allocated fcport, or NULL, if none available.
2530 */
2531 fc_port_t *
2532 qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
2533 {
2534 fc_port_t *fcport;
2535
2536 fcport = kzalloc(sizeof(fc_port_t), flags);
2537 if (!fcport)
2538 return NULL;
2539
2540 /* Setup fcport template structure. */
2541 fcport->vha = vha;
2542 fcport->vp_idx = vha->vp_idx;
2543 fcport->port_type = FCT_UNKNOWN;
2544 fcport->loop_id = FC_NO_LOOP_ID;
2545 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED);
2546 fcport->supported_classes = FC_COS_UNSPECIFIED;
2547
2548 return fcport;
2549 }
2550
2551 /*
2552 * qla2x00_configure_loop
2553 * Updates Fibre Channel Device Database with what is actually on loop.
2554 *
2555 * Input:
2556 * ha = adapter block pointer.
2557 *
2558 * Returns:
2559 * 0 = success.
2560 * 1 = error.
2561 * 2 = database was full and device was not configured.
2562 */
2563 static int
2564 qla2x00_configure_loop(scsi_qla_host_t *vha)
2565 {
2566 int rval;
2567 unsigned long flags, save_flags;
2568 struct qla_hw_data *ha = vha->hw;
2569 rval = QLA_SUCCESS;
2570
2571 /* Get Initiator ID */
2572 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
2573 rval = qla2x00_configure_hba(vha);
2574 if (rval != QLA_SUCCESS) {
2575 ql_dbg(ql_dbg_disc, vha, 0x2013,
2576 "Unable to configure HBA.\n");
2577 return (rval);
2578 }
2579 }
2580
2581 save_flags = flags = vha->dpc_flags;
2582 ql_dbg(ql_dbg_disc, vha, 0x2014,
2583 "Configure loop -- dpc flags = 0x%lx.\n", flags);
2584
2585 /*
2586 * If we have both an RSCN and PORT UPDATE pending then handle them
2587 * both at the same time.
2588 */
2589 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2590 clear_bit(RSCN_UPDATE, &vha->dpc_flags);
2591
2592 qla2x00_get_data_rate(vha);
2593
2594 /* Determine what we need to do */
2595 if (ha->current_topology == ISP_CFG_FL &&
2596 (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
2597
2598 vha->flags.rscn_queue_overflow = 1;
2599 set_bit(RSCN_UPDATE, &flags);
2600
2601 } else if (ha->current_topology == ISP_CFG_F &&
2602 (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
2603
2604 vha->flags.rscn_queue_overflow = 1;
2605 set_bit(RSCN_UPDATE, &flags);
2606 clear_bit(LOCAL_LOOP_UPDATE, &flags);
2607
2608 } else if (ha->current_topology == ISP_CFG_N) {
2609 clear_bit(RSCN_UPDATE, &flags);
2610
2611 } else if (!vha->flags.online ||
2612 (test_bit(ABORT_ISP_ACTIVE, &flags))) {
2613
2614 vha->flags.rscn_queue_overflow = 1;
2615 set_bit(RSCN_UPDATE, &flags);
2616 set_bit(LOCAL_LOOP_UPDATE, &flags);
2617 }
2618
2619 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
2620 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
2621 ql_dbg(ql_dbg_disc, vha, 0x2015,
2622 "Loop resync needed, failing.\n");
2623 rval = QLA_FUNCTION_FAILED;
2624 }
2625 else
2626 rval = qla2x00_configure_local_loop(vha);
2627 }
2628
2629 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
2630 if (LOOP_TRANSITION(vha)) {
2631 ql_dbg(ql_dbg_disc, vha, 0x201e,
2632 "Needs RSCN update and loop transition.\n");
2633 rval = QLA_FUNCTION_FAILED;
2634 }
2635 else
2636 rval = qla2x00_configure_fabric(vha);
2637 }
2638
2639 if (rval == QLA_SUCCESS) {
2640 if (atomic_read(&vha->loop_down_timer) ||
2641 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
2642 rval = QLA_FUNCTION_FAILED;
2643 } else {
2644 atomic_set(&vha->loop_state, LOOP_READY);
2645 ql_dbg(ql_dbg_disc, vha, 0x2069,
2646 "LOOP READY.\n");
2647 }
2648 }
2649
2650 if (rval) {
2651 ql_dbg(ql_dbg_disc, vha, 0x206a,
2652 "%s *** FAILED ***.\n", __func__);
2653 } else {
2654 ql_dbg(ql_dbg_disc, vha, 0x206b,
2655 "%s: exiting normally.\n", __func__);
2656 }
2657
2658 /* Restore state if a resync event occurred during processing */
2659 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
2660 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
2661 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2662 if (test_bit(RSCN_UPDATE, &save_flags)) {
2663 set_bit(RSCN_UPDATE, &vha->dpc_flags);
2664 if (!IS_ALOGIO_CAPABLE(ha))
2665 vha->flags.rscn_queue_overflow = 1;
2666 }
2667 }
2668
2669 return (rval);
2670 }
2671
2672
2673
2674 /*
2675 * qla2x00_configure_local_loop
2676 * Updates Fibre Channel Device Database with local loop devices.
2677 *
2678 * Input:
2679 * ha = adapter block pointer.
2680 *
2681 * Returns:
2682 * 0 = success.
2683 */
2684 static int
2685 qla2x00_configure_local_loop(scsi_qla_host_t *vha)
2686 {
2687 int rval, rval2;
2688 int found_devs;
2689 int found;
2690 fc_port_t *fcport, *new_fcport;
2691
2692 uint16_t index;
2693 uint16_t entries;
2694 char *id_iter;
2695 uint16_t loop_id;
2696 uint8_t domain, area, al_pa;
2697 struct qla_hw_data *ha = vha->hw;
2698
2699 found_devs = 0;
2700 new_fcport = NULL;
2701 entries = MAX_FIBRE_DEVICES;
2702
2703 ql_dbg(ql_dbg_disc, vha, 0x2016,
2704 "Getting FCAL position map.\n");
2705 if (ql2xextended_error_logging & ql_dbg_disc)
2706 qla2x00_get_fcal_position_map(vha, NULL);
2707
2708 /* Get list of logged in devices. */
2709 memset(ha->gid_list, 0, GID_LIST_SIZE);
2710 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
2711 &entries);
2712 if (rval != QLA_SUCCESS)
2713 goto cleanup_allocation;
2714
2715 ql_dbg(ql_dbg_disc, vha, 0x2017,
2716 "Entries in ID list (%d).\n", entries);
2717 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075,
2718 (uint8_t *)ha->gid_list,
2719 entries * sizeof(struct gid_list_info));
2720
2721 /* Allocate temporary fcport for any new fcports discovered. */
2722 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
2723 if (new_fcport == NULL) {
2724 ql_log(ql_log_warn, vha, 0x2018,
2725 "Memory allocation failed for fcport.\n");
2726 rval = QLA_MEMORY_ALLOC_FAILED;
2727 goto cleanup_allocation;
2728 }
2729 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
2730
2731 /*
2732 * Mark local devices that were present with FCF_DEVICE_LOST for now.
2733 */
2734 list_for_each_entry(fcport, &vha->vp_fcports, list) {
2735 if (atomic_read(&fcport->state) == FCS_ONLINE &&
2736 fcport->port_type != FCT_BROADCAST &&
2737 (fcport->flags & FCF_FABRIC_DEVICE) == 0) {
2738
2739 ql_dbg(ql_dbg_disc, vha, 0x2019,
2740 "Marking port lost loop_id=0x%04x.\n",
2741 fcport->loop_id);
2742
2743 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
2744 }
2745 }
2746
2747 /* Add devices to port list. */
2748 id_iter = (char *)ha->gid_list;
2749 for (index = 0; index < entries; index++) {
2750 domain = ((struct gid_list_info *)id_iter)->domain;
2751 area = ((struct gid_list_info *)id_iter)->area;
2752 al_pa = ((struct gid_list_info *)id_iter)->al_pa;
2753 if (IS_QLA2100(ha) || IS_QLA2200(ha))
2754 loop_id = (uint16_t)
2755 ((struct gid_list_info *)id_iter)->loop_id_2100;
2756 else
2757 loop_id = le16_to_cpu(
2758 ((struct gid_list_info *)id_iter)->loop_id);
2759 id_iter += ha->gid_list_info_size;
2760
2761 /* Bypass reserved domain fields. */
2762 if ((domain & 0xf0) == 0xf0)
2763 continue;
2764
2765 /* Bypass if not same domain and area of adapter. */
2766 if (area && domain &&
2767 (area != vha->d_id.b.area || domain != vha->d_id.b.domain))
2768 continue;
2769
2770 /* Bypass invalid local loop ID. */
2771 if (loop_id > LAST_LOCAL_LOOP_ID)
2772 continue;
2773
2774 /* Fill in member data. */
2775 new_fcport->d_id.b.domain = domain;
2776 new_fcport->d_id.b.area = area;
2777 new_fcport->d_id.b.al_pa = al_pa;
2778 new_fcport->loop_id = loop_id;
2779 new_fcport->vp_idx = vha->vp_idx;
2780 rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
2781 if (rval2 != QLA_SUCCESS) {
2782 ql_dbg(ql_dbg_disc, vha, 0x201a,
2783 "Failed to retrieve fcport information "
2784 "-- get_port_database=%x, loop_id=0x%04x.\n",
2785 rval2, new_fcport->loop_id);
2786 ql_dbg(ql_dbg_disc, vha, 0x201b,
2787 "Scheduling resync.\n");
2788 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
2789 continue;
2790 }
2791
2792 /* Check for matching device in port list. */
2793 found = 0;
2794 fcport = NULL;
2795 list_for_each_entry(fcport, &vha->vp_fcports, list) {
2796 if (memcmp(new_fcport->port_name, fcport->port_name,
2797 WWN_SIZE))
2798 continue;
2799
2800 fcport->flags &= ~FCF_FABRIC_DEVICE;
2801 fcport->loop_id = new_fcport->loop_id;
2802 fcport->port_type = new_fcport->port_type;
2803 fcport->d_id.b24 = new_fcport->d_id.b24;
2804 memcpy(fcport->node_name, new_fcport->node_name,
2805 WWN_SIZE);
2806
2807 found++;
2808 break;
2809 }
2810
2811 if (!found) {
2812 /* New device, add to fcports list. */
2813 if (vha->vp_idx) {
2814 new_fcport->vha = vha;
2815 new_fcport->vp_idx = vha->vp_idx;
2816 }
2817 list_add_tail(&new_fcport->list, &vha->vp_fcports);
2818
2819 /* Allocate a new replacement fcport. */
2820 fcport = new_fcport;
2821 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
2822 if (new_fcport == NULL) {
2823 ql_log(ql_log_warn, vha, 0x201c,
2824 "Failed to allocate memory for fcport.\n");
2825 rval = QLA_MEMORY_ALLOC_FAILED;
2826 goto cleanup_allocation;
2827 }
2828 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
2829 }
2830
2831 /* Base iIDMA settings on HBA port speed. */
2832 fcport->fp_speed = ha->link_data_rate;
2833
2834 qla2x00_update_fcport(vha, fcport);
2835
2836 found_devs++;
2837 }
2838
2839 cleanup_allocation:
2840 kfree(new_fcport);
2841
2842 if (rval != QLA_SUCCESS) {
2843 ql_dbg(ql_dbg_disc, vha, 0x201d,
2844 "Configure local loop error exit: rval=%x.\n", rval);
2845 }
2846
2847 return (rval);
2848 }
2849
2850 static void
2851 qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
2852 {
2853 #define LS_UNKNOWN 2
2854 static char *link_speeds[] = { "1", "2", "?", "4", "8", "10" };
2855 char *link_speed;
2856 int rval;
2857 uint16_t mb[4];
2858 struct qla_hw_data *ha = vha->hw;
2859
2860 if (!IS_IIDMA_CAPABLE(ha))
2861 return;
2862
2863 if (atomic_read(&fcport->state) != FCS_ONLINE)
2864 return;
2865
2866 if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
2867 fcport->fp_speed > ha->link_data_rate)
2868 return;
2869
2870 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
2871 mb);
2872 if (rval != QLA_SUCCESS) {
2873 ql_dbg(ql_dbg_disc, vha, 0x2004,
2874 "Unable to adjust iIDMA "
2875 "%02x%02x%02x%02x%02x%02x%02x%02x -- %04x %x %04x "
2876 "%04x.\n", fcport->port_name[0], fcport->port_name[1],
2877 fcport->port_name[2], fcport->port_name[3],
2878 fcport->port_name[4], fcport->port_name[5],
2879 fcport->port_name[6], fcport->port_name[7], rval,
2880 fcport->fp_speed, mb[0], mb[1]);
2881 } else {
2882 link_speed = link_speeds[LS_UNKNOWN];
2883 if (fcport->fp_speed < 5)
2884 link_speed = link_speeds[fcport->fp_speed];
2885 else if (fcport->fp_speed == 0x13)
2886 link_speed = link_speeds[5];
2887 ql_dbg(ql_dbg_disc, vha, 0x2005,
2888 "iIDMA adjusted to %s GB/s "
2889 "on %02x%02x%02x%02x%02x%02x%02x%02x.\n", link_speed,
2890 fcport->port_name[0], fcport->port_name[1],
2891 fcport->port_name[2], fcport->port_name[3],
2892 fcport->port_name[4], fcport->port_name[5],
2893 fcport->port_name[6], fcport->port_name[7]);
2894 }
2895 }
2896
2897 static void
2898 qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
2899 {
2900 struct fc_rport_identifiers rport_ids;
2901 struct fc_rport *rport;
2902 unsigned long flags;
2903
2904 qla2x00_rport_del(fcport);
2905
2906 rport_ids.node_name = wwn_to_u64(fcport->node_name);
2907 rport_ids.port_name = wwn_to_u64(fcport->port_name);
2908 rport_ids.port_id = fcport->d_id.b.domain << 16 |
2909 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
2910 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
2911 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
2912 if (!rport) {
2913 ql_log(ql_log_warn, vha, 0x2006,
2914 "Unable to allocate fc remote port.\n");
2915 return;
2916 }
2917 spin_lock_irqsave(fcport->vha->host->host_lock, flags);
2918 *((fc_port_t **)rport->dd_data) = fcport;
2919 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
2920
2921 rport->supported_classes = fcport->supported_classes;
2922
2923 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
2924 if (fcport->port_type == FCT_INITIATOR)
2925 rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR;
2926 if (fcport->port_type == FCT_TARGET)
2927 rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET;
2928 fc_remote_port_rolechg(rport, rport_ids.roles);
2929 }
2930
2931 /*
2932 * qla2x00_update_fcport
2933 * Updates device on list.
2934 *
2935 * Input:
2936 * ha = adapter block pointer.
2937 * fcport = port structure pointer.
2938 *
2939 * Return:
2940 * 0 - Success
2941 * BIT_0 - error
2942 *
2943 * Context:
2944 * Kernel context.
2945 */
2946 void
2947 qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
2948 {
2949 fcport->vha = vha;
2950 fcport->login_retry = 0;
2951 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
2952
2953 qla2x00_iidma_fcport(vha, fcport);
2954 qla24xx_update_fcport_fcp_prio(vha, fcport);
2955 qla2x00_reg_remote_port(vha, fcport);
2956 qla2x00_set_fcport_state(fcport, FCS_ONLINE);
2957 }
2958
2959 /*
2960 * qla2x00_configure_fabric
2961 * Setup SNS devices with loop ID's.
2962 *
2963 * Input:
2964 * ha = adapter block pointer.
2965 *
2966 * Returns:
2967 * 0 = success.
2968 * BIT_0 = error
2969 */
2970 static int
2971 qla2x00_configure_fabric(scsi_qla_host_t *vha)
2972 {
2973 int rval, rval2;
2974 fc_port_t *fcport, *fcptemp;
2975 uint16_t next_loopid;
2976 uint16_t mb[MAILBOX_REGISTER_COUNT];
2977 uint16_t loop_id;
2978 LIST_HEAD(new_fcports);
2979 struct qla_hw_data *ha = vha->hw;
2980 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
2981
2982 /* If FL port exists, then SNS is present */
2983 if (IS_FWI2_CAPABLE(ha))
2984 loop_id = NPH_F_PORT;
2985 else
2986 loop_id = SNS_FL_PORT;
2987 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
2988 if (rval != QLA_SUCCESS) {
2989 ql_dbg(ql_dbg_disc, vha, 0x201f,
2990 "MBX_GET_PORT_NAME failed, No FL Port.\n");
2991
2992 vha->device_flags &= ~SWITCH_FOUND;
2993 return (QLA_SUCCESS);
2994 }
2995 vha->device_flags |= SWITCH_FOUND;
2996
2997 /* Mark devices that need re-synchronization. */
2998 rval2 = qla2x00_device_resync(vha);
2999 if (rval2 == QLA_RSCNS_HANDLED) {
3000 /* No point doing the scan, just continue. */
3001 return (QLA_SUCCESS);
3002 }
3003 do {
3004 /* FDMI support. */
3005 if (ql2xfdmienable &&
3006 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
3007 qla2x00_fdmi_register(vha);
3008
3009 /* Ensure we are logged into the SNS. */
3010 if (IS_FWI2_CAPABLE(ha))
3011 loop_id = NPH_SNS;
3012 else
3013 loop_id = SIMPLE_NAME_SERVER;
3014 ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
3015 0xfc, mb, BIT_1 | BIT_0);
3016 if (mb[0] != MBS_COMMAND_COMPLETE) {
3017 ql_dbg(ql_dbg_disc, vha, 0x2042,
3018 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x "
3019 "mb[6]=%x mb[7]=%x.\n", loop_id, mb[0], mb[1],
3020 mb[2], mb[6], mb[7]);
3021 return (QLA_SUCCESS);
3022 }
3023
3024 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
3025 if (qla2x00_rft_id(vha)) {
3026 /* EMPTY */
3027 ql_dbg(ql_dbg_disc, vha, 0x2045,
3028 "Register FC-4 TYPE failed.\n");
3029 }
3030 if (qla2x00_rff_id(vha)) {
3031 /* EMPTY */
3032 ql_dbg(ql_dbg_disc, vha, 0x2049,
3033 "Register FC-4 Features failed.\n");
3034 }
3035 if (qla2x00_rnn_id(vha)) {
3036 /* EMPTY */
3037 ql_dbg(ql_dbg_disc, vha, 0x204f,
3038 "Register Node Name failed.\n");
3039 } else if (qla2x00_rsnn_nn(vha)) {
3040 /* EMPTY */
3041 ql_dbg(ql_dbg_disc, vha, 0x2053,
3042 "Register Symobilic Node Name failed.\n");
3043 }
3044 }
3045
3046 rval = qla2x00_find_all_fabric_devs(vha, &new_fcports);
3047 if (rval != QLA_SUCCESS)
3048 break;
3049
3050 /*
3051 * Logout all previous fabric devices marked lost, except
3052 * FCP2 devices.
3053 */
3054 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3055 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
3056 break;
3057
3058 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
3059 continue;
3060
3061 if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
3062 qla2x00_mark_device_lost(vha, fcport,
3063 ql2xplogiabsentdevice, 0);
3064 if (fcport->loop_id != FC_NO_LOOP_ID &&
3065 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
3066 fcport->port_type != FCT_INITIATOR &&
3067 fcport->port_type != FCT_BROADCAST) {
3068 ha->isp_ops->fabric_logout(vha,
3069 fcport->loop_id,
3070 fcport->d_id.b.domain,
3071 fcport->d_id.b.area,
3072 fcport->d_id.b.al_pa);
3073 fcport->loop_id = FC_NO_LOOP_ID;
3074 }
3075 }
3076 }
3077
3078 /* Starting free loop ID. */
3079 next_loopid = ha->min_external_loopid;
3080
3081 /*
3082 * Scan through our port list and login entries that need to be
3083 * logged in.
3084 */
3085 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3086 if (atomic_read(&vha->loop_down_timer) ||
3087 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
3088 break;
3089
3090 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
3091 (fcport->flags & FCF_LOGIN_NEEDED) == 0)
3092 continue;
3093
3094 if (fcport->loop_id == FC_NO_LOOP_ID) {
3095 fcport->loop_id = next_loopid;
3096 rval = qla2x00_find_new_loop_id(
3097 base_vha, fcport);
3098 if (rval != QLA_SUCCESS) {
3099 /* Ran out of IDs to use */
3100 break;
3101 }
3102 }
3103 /* Login and update database */
3104 qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
3105 }
3106
3107 /* Exit if out of loop IDs. */
3108 if (rval != QLA_SUCCESS) {
3109 break;
3110 }
3111
3112 /*
3113 * Login and add the new devices to our port list.
3114 */
3115 list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
3116 if (atomic_read(&vha->loop_down_timer) ||
3117 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
3118 break;
3119
3120 /* Find a new loop ID to use. */
3121 fcport->loop_id = next_loopid;
3122 rval = qla2x00_find_new_loop_id(base_vha, fcport);
3123 if (rval != QLA_SUCCESS) {
3124 /* Ran out of IDs to use */
3125 break;
3126 }
3127
3128 /* Login and update database */
3129 qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
3130
3131 if (vha->vp_idx) {
3132 fcport->vha = vha;
3133 fcport->vp_idx = vha->vp_idx;
3134 }
3135 list_move_tail(&fcport->list, &vha->vp_fcports);
3136 }
3137 } while (0);
3138
3139 /* Free all new device structures not processed. */
3140 list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
3141 list_del(&fcport->list);
3142 kfree(fcport);
3143 }
3144
3145 if (rval) {
3146 ql_dbg(ql_dbg_disc, vha, 0x2068,
3147 "Configure fabric error exit rval=%d.\n", rval);
3148 }
3149
3150 return (rval);
3151 }
3152
3153 /*
3154 * qla2x00_find_all_fabric_devs
3155 *
3156 * Input:
3157 * ha = adapter block pointer.
3158 * dev = database device entry pointer.
3159 *
3160 * Returns:
3161 * 0 = success.
3162 *
3163 * Context:
3164 * Kernel context.
3165 */
3166 static int
3167 qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha,
3168 struct list_head *new_fcports)
3169 {
3170 int rval;
3171 uint16_t loop_id;
3172 fc_port_t *fcport, *new_fcport, *fcptemp;
3173 int found;
3174
3175 sw_info_t *swl;
3176 int swl_idx;
3177 int first_dev, last_dev;
3178 port_id_t wrap = {}, nxt_d_id;
3179 struct qla_hw_data *ha = vha->hw;
3180 struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev);
3181 struct scsi_qla_host *tvp;
3182
3183 rval = QLA_SUCCESS;
3184
3185 /* Try GID_PT to get device list, else GAN. */
3186 swl = kcalloc(MAX_FIBRE_DEVICES, sizeof(sw_info_t), GFP_KERNEL);
3187 if (!swl) {
3188 /*EMPTY*/
3189 ql_dbg(ql_dbg_disc, vha, 0x2054,
3190 "GID_PT allocations failed, fallback on GA_NXT.\n");
3191 } else {
3192 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
3193 kfree(swl);
3194 swl = NULL;
3195 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
3196 kfree(swl);
3197 swl = NULL;
3198 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
3199 kfree(swl);
3200 swl = NULL;
3201 } else if (ql2xiidmaenable &&
3202 qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) {
3203 qla2x00_gpsc(vha, swl);
3204 }
3205
3206 /* If other queries succeeded probe for FC-4 type */
3207 if (swl)
3208 qla2x00_gff_id(vha, swl);
3209 }
3210 swl_idx = 0;
3211
3212 /* Allocate temporary fcport for any new fcports discovered. */
3213 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
3214 if (new_fcport == NULL) {
3215 ql_log(ql_log_warn, vha, 0x205e,
3216 "Failed to allocate memory for fcport.\n");
3217 kfree(swl);
3218 return (QLA_MEMORY_ALLOC_FAILED);
3219 }
3220 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
3221 /* Set start port ID scan at adapter ID. */
3222 first_dev = 1;
3223 last_dev = 0;
3224
3225 /* Starting free loop ID. */
3226 loop_id = ha->min_external_loopid;
3227 for (; loop_id <= ha->max_loop_id; loop_id++) {
3228 if (qla2x00_is_reserved_id(vha, loop_id))
3229 continue;
3230
3231 if (ha->current_topology == ISP_CFG_FL &&
3232 (atomic_read(&vha->loop_down_timer) ||
3233 LOOP_TRANSITION(vha))) {
3234 atomic_set(&vha->loop_down_timer, 0);
3235 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
3236 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
3237 break;
3238 }
3239
3240 if (swl != NULL) {
3241 if (last_dev) {
3242 wrap.b24 = new_fcport->d_id.b24;
3243 } else {
3244 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
3245 memcpy(new_fcport->node_name,
3246 swl[swl_idx].node_name, WWN_SIZE);
3247 memcpy(new_fcport->port_name,
3248 swl[swl_idx].port_name, WWN_SIZE);
3249 memcpy(new_fcport->fabric_port_name,
3250 swl[swl_idx].fabric_port_name, WWN_SIZE);
3251 new_fcport->fp_speed = swl[swl_idx].fp_speed;
3252 new_fcport->fc4_type = swl[swl_idx].fc4_type;
3253
3254 if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
3255 last_dev = 1;
3256 }
3257 swl_idx++;
3258 }
3259 } else {
3260 /* Send GA_NXT to the switch */
3261 rval = qla2x00_ga_nxt(vha, new_fcport);
3262 if (rval != QLA_SUCCESS) {
3263 ql_log(ql_log_warn, vha, 0x2064,
3264 "SNS scan failed -- assuming "
3265 "zero-entry result.\n");
3266 list_for_each_entry_safe(fcport, fcptemp,
3267 new_fcports, list) {
3268 list_del(&fcport->list);
3269 kfree(fcport);
3270 }
3271 rval = QLA_SUCCESS;
3272 break;
3273 }
3274 }
3275
3276 /* If wrap on switch device list, exit. */
3277 if (first_dev) {
3278 wrap.b24 = new_fcport->d_id.b24;
3279 first_dev = 0;
3280 } else if (new_fcport->d_id.b24 == wrap.b24) {
3281 ql_dbg(ql_dbg_disc, vha, 0x2065,
3282 "Device wrap (%02x%02x%02x).\n",
3283 new_fcport->d_id.b.domain,
3284 new_fcport->d_id.b.area,
3285 new_fcport->d_id.b.al_pa);
3286 break;
3287 }
3288
3289 /* Bypass if same physical adapter. */
3290 if (new_fcport->d_id.b24 == base_vha->d_id.b24)
3291 continue;
3292
3293 /* Bypass virtual ports of the same host. */
3294 found = 0;
3295 if (ha->num_vhosts) {
3296 unsigned long flags;
3297
3298 spin_lock_irqsave(&ha->vport_slock, flags);
3299 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
3300 if (new_fcport->d_id.b24 == vp->d_id.b24) {
3301 found = 1;
3302 break;
3303 }
3304 }
3305 spin_unlock_irqrestore(&ha->vport_slock, flags);
3306
3307 if (found)
3308 continue;
3309 }
3310
3311 /* Bypass if same domain and area of adapter. */
3312 if (((new_fcport->d_id.b24 & 0xffff00) ==
3313 (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
3314 ISP_CFG_FL)
3315 continue;
3316
3317 /* Bypass reserved domain fields. */
3318 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
3319 continue;
3320
3321 /* Bypass ports whose FCP-4 type is not FCP_SCSI */
3322 if (ql2xgffidenable &&
3323 (new_fcport->fc4_type != FC4_TYPE_FCP_SCSI &&
3324 new_fcport->fc4_type != FC4_TYPE_UNKNOWN))
3325 continue;
3326
3327 /* Locate matching device in database. */
3328 found = 0;
3329 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3330 if (memcmp(new_fcport->port_name, fcport->port_name,
3331 WWN_SIZE))
3332 continue;
3333
3334 found++;
3335
3336 /* Update port state. */
3337 memcpy(fcport->fabric_port_name,
3338 new_fcport->fabric_port_name, WWN_SIZE);
3339 fcport->fp_speed = new_fcport->fp_speed;
3340
3341 /*
3342 * If address the same and state FCS_ONLINE, nothing
3343 * changed.
3344 */
3345 if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
3346 atomic_read(&fcport->state) == FCS_ONLINE) {
3347 break;
3348 }
3349
3350 /*
3351 * If device was not a fabric device before.
3352 */
3353 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
3354 fcport->d_id.b24 = new_fcport->d_id.b24;
3355 fcport->loop_id = FC_NO_LOOP_ID;
3356 fcport->flags |= (FCF_FABRIC_DEVICE |
3357 FCF_LOGIN_NEEDED);
3358 break;
3359 }
3360
3361 /*
3362 * Port ID changed or device was marked to be updated;
3363 * Log it out if still logged in and mark it for
3364 * relogin later.
3365 */
3366 fcport->d_id.b24 = new_fcport->d_id.b24;
3367 fcport->flags |= FCF_LOGIN_NEEDED;
3368 if (fcport->loop_id != FC_NO_LOOP_ID &&
3369 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
3370 fcport->port_type != FCT_INITIATOR &&
3371 fcport->port_type != FCT_BROADCAST) {
3372 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
3373 fcport->d_id.b.domain, fcport->d_id.b.area,
3374 fcport->d_id.b.al_pa);
3375 fcport->loop_id = FC_NO_LOOP_ID;
3376 }
3377
3378 break;
3379 }
3380
3381 if (found)
3382 continue;
3383 /* If device was not in our fcports list, then add it. */
3384 list_add_tail(&new_fcport->list, new_fcports);
3385
3386 /* Allocate a new replacement fcport. */
3387 nxt_d_id.b24 = new_fcport->d_id.b24;
3388 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
3389 if (new_fcport == NULL) {
3390 ql_log(ql_log_warn, vha, 0x2066,
3391 "Memory allocation failed for fcport.\n");
3392 kfree(swl);
3393 return (QLA_MEMORY_ALLOC_FAILED);
3394 }
3395 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
3396 new_fcport->d_id.b24 = nxt_d_id.b24;
3397 }
3398
3399 kfree(swl);
3400 kfree(new_fcport);
3401
3402 return (rval);
3403 }
3404
3405 /*
3406 * qla2x00_find_new_loop_id
3407 * Scan through our port list and find a new usable loop ID.
3408 *
3409 * Input:
3410 * ha: adapter state pointer.
3411 * dev: port structure pointer.
3412 *
3413 * Returns:
3414 * qla2x00 local function return status code.
3415 *
3416 * Context:
3417 * Kernel context.
3418 */
3419 int
3420 qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
3421 {
3422 int rval;
3423 int found;
3424 fc_port_t *fcport;
3425 uint16_t first_loop_id;
3426 struct qla_hw_data *ha = vha->hw;
3427 struct scsi_qla_host *vp;
3428 struct scsi_qla_host *tvp;
3429 unsigned long flags = 0;
3430
3431 rval = QLA_SUCCESS;
3432
3433 /* Save starting loop ID. */
3434 first_loop_id = dev->loop_id;
3435
3436 for (;;) {
3437 /* Skip loop ID if already used by adapter. */
3438 if (dev->loop_id == vha->loop_id)
3439 dev->loop_id++;
3440
3441 /* Skip reserved loop IDs. */
3442 while (qla2x00_is_reserved_id(vha, dev->loop_id))
3443 dev->loop_id++;
3444
3445 /* Reset loop ID if passed the end. */
3446 if (dev->loop_id > ha->max_loop_id) {
3447 /* first loop ID. */
3448 dev->loop_id = ha->min_external_loopid;
3449 }
3450
3451 /* Check for loop ID being already in use. */
3452 found = 0;
3453 fcport = NULL;
3454
3455 spin_lock_irqsave(&ha->vport_slock, flags);
3456 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
3457 list_for_each_entry(fcport, &vp->vp_fcports, list) {
3458 if (fcport->loop_id == dev->loop_id &&
3459 fcport != dev) {
3460 /* ID possibly in use */
3461 found++;
3462 break;
3463 }
3464 }
3465 if (found)
3466 break;
3467 }
3468 spin_unlock_irqrestore(&ha->vport_slock, flags);
3469
3470 /* If not in use then it is free to use. */
3471 if (!found) {
3472 break;
3473 }
3474
3475 /* ID in use. Try next value. */
3476 dev->loop_id++;
3477
3478 /* If wrap around. No free ID to use. */
3479 if (dev->loop_id == first_loop_id) {
3480 dev->loop_id = FC_NO_LOOP_ID;
3481 rval = QLA_FUNCTION_FAILED;
3482 break;
3483 }
3484 }
3485
3486 return (rval);
3487 }
3488
3489 /*
3490 * qla2x00_device_resync
3491 * Marks devices in the database that needs resynchronization.
3492 *
3493 * Input:
3494 * ha = adapter block pointer.
3495 *
3496 * Context:
3497 * Kernel context.
3498 */
3499 static int
3500 qla2x00_device_resync(scsi_qla_host_t *vha)
3501 {
3502 int rval;
3503 uint32_t mask;
3504 fc_port_t *fcport;
3505 uint32_t rscn_entry;
3506 uint8_t rscn_out_iter;
3507 uint8_t format;
3508 port_id_t d_id = {};
3509
3510 rval = QLA_RSCNS_HANDLED;
3511
3512 while (vha->rscn_out_ptr != vha->rscn_in_ptr ||
3513 vha->flags.rscn_queue_overflow) {
3514
3515 rscn_entry = vha->rscn_queue[vha->rscn_out_ptr];
3516 format = MSB(MSW(rscn_entry));
3517 d_id.b.domain = LSB(MSW(rscn_entry));
3518 d_id.b.area = MSB(LSW(rscn_entry));
3519 d_id.b.al_pa = LSB(LSW(rscn_entry));
3520
3521 ql_dbg(ql_dbg_disc, vha, 0x2020,
3522 "RSCN queue entry[%d] = [%02x/%02x%02x%02x].\n",
3523 vha->rscn_out_ptr, format, d_id.b.domain, d_id.b.area,
3524 d_id.b.al_pa);
3525
3526 vha->rscn_out_ptr++;
3527 if (vha->rscn_out_ptr == MAX_RSCN_COUNT)
3528 vha->rscn_out_ptr = 0;
3529
3530 /* Skip duplicate entries. */
3531 for (rscn_out_iter = vha->rscn_out_ptr;
3532 !vha->flags.rscn_queue_overflow &&
3533 rscn_out_iter != vha->rscn_in_ptr;
3534 rscn_out_iter = (rscn_out_iter ==
3535 (MAX_RSCN_COUNT - 1)) ? 0: rscn_out_iter + 1) {
3536
3537 if (rscn_entry != vha->rscn_queue[rscn_out_iter])
3538 break;
3539
3540 ql_dbg(ql_dbg_disc, vha, 0x2021,
3541 "Skipping duplicate RSCN queue entry found at "
3542 "[%d].\n", rscn_out_iter);
3543
3544 vha->rscn_out_ptr = rscn_out_iter;
3545 }
3546
3547 /* Queue overflow, set switch default case. */
3548 if (vha->flags.rscn_queue_overflow) {
3549 ql_dbg(ql_dbg_disc, vha, 0x2022,
3550 "device_resync: rscn overflow.\n");
3551
3552 format = 3;
3553 vha->flags.rscn_queue_overflow = 0;
3554 }
3555
3556 switch (format) {
3557 case 0:
3558 mask = 0xffffff;
3559 break;
3560 case 1:
3561 mask = 0xffff00;
3562 break;
3563 case 2:
3564 mask = 0xff0000;
3565 break;
3566 default:
3567 mask = 0x0;
3568 d_id.b24 = 0;
3569 vha->rscn_out_ptr = vha->rscn_in_ptr;
3570 break;
3571 }
3572
3573 rval = QLA_SUCCESS;
3574
3575 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3576 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
3577 (fcport->d_id.b24 & mask) != d_id.b24 ||
3578 fcport->port_type == FCT_BROADCAST)
3579 continue;
3580
3581 if (atomic_read(&fcport->state) == FCS_ONLINE) {
3582 if (format != 3 ||
3583 fcport->port_type != FCT_INITIATOR) {
3584 qla2x00_mark_device_lost(vha, fcport,
3585 0, 0);
3586 }
3587 }
3588 }
3589 }
3590 return (rval);
3591 }
3592
3593 /*
3594 * qla2x00_fabric_dev_login
3595 * Login fabric target device and update FC port database.
3596 *
3597 * Input:
3598 * ha: adapter state pointer.
3599 * fcport: port structure list pointer.
3600 * next_loopid: contains value of a new loop ID that can be used
3601 * by the next login attempt.
3602 *
3603 * Returns:
3604 * qla2x00 local function return status code.
3605 *
3606 * Context:
3607 * Kernel context.
3608 */
3609 static int
3610 qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport,
3611 uint16_t *next_loopid)
3612 {
3613 int rval;
3614 int retry;
3615 uint8_t opts;
3616 struct qla_hw_data *ha = vha->hw;
3617
3618 rval = QLA_SUCCESS;
3619 retry = 0;
3620
3621 if (IS_ALOGIO_CAPABLE(ha)) {
3622 if (fcport->flags & FCF_ASYNC_SENT)
3623 return rval;
3624 fcport->flags |= FCF_ASYNC_SENT;
3625 rval = qla2x00_post_async_login_work(vha, fcport, NULL);
3626 if (!rval)
3627 return rval;
3628 }
3629
3630 fcport->flags &= ~FCF_ASYNC_SENT;
3631 rval = qla2x00_fabric_login(vha, fcport, next_loopid);
3632 if (rval == QLA_SUCCESS) {
3633 /* Send an ADISC to FCP2 devices.*/
3634 opts = 0;
3635 if (fcport->flags & FCF_FCP2_DEVICE)
3636 opts |= BIT_1;
3637 rval = qla2x00_get_port_database(vha, fcport, opts);
3638 if (rval != QLA_SUCCESS) {
3639 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
3640 fcport->d_id.b.domain, fcport->d_id.b.area,
3641 fcport->d_id.b.al_pa);
3642 qla2x00_mark_device_lost(vha, fcport, 1, 0);
3643 } else {
3644 qla2x00_update_fcport(vha, fcport);
3645 }
3646 }
3647
3648 return (rval);
3649 }
3650
3651 /*
3652 * qla2x00_fabric_login
3653 * Issue fabric login command.
3654 *
3655 * Input:
3656 * ha = adapter block pointer.
3657 * device = pointer to FC device type structure.
3658 *
3659 * Returns:
3660 * 0 - Login successfully
3661 * 1 - Login failed
3662 * 2 - Initiator device
3663 * 3 - Fatal error
3664 */
3665 int
3666 qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
3667 uint16_t *next_loopid)
3668 {
3669 int rval;
3670 int retry;
3671 uint16_t tmp_loopid;
3672 uint16_t mb[MAILBOX_REGISTER_COUNT];
3673 struct qla_hw_data *ha = vha->hw;
3674
3675 retry = 0;
3676 tmp_loopid = 0;
3677
3678 for (;;) {
3679 ql_dbg(ql_dbg_disc, vha, 0x2000,
3680 "Trying Fabric Login w/loop id 0x%04x for port "
3681 "%02x%02x%02x.\n",
3682 fcport->loop_id, fcport->d_id.b.domain,
3683 fcport->d_id.b.area, fcport->d_id.b.al_pa);
3684
3685 /* Login fcport on switch. */
3686 ha->isp_ops->fabric_login(vha, fcport->loop_id,
3687 fcport->d_id.b.domain, fcport->d_id.b.area,
3688 fcport->d_id.b.al_pa, mb, BIT_0);
3689 if (mb[0] == MBS_PORT_ID_USED) {
3690 /*
3691 * Device has another loop ID. The firmware team
3692 * recommends the driver perform an implicit login with
3693 * the specified ID again. The ID we just used is save
3694 * here so we return with an ID that can be tried by
3695 * the next login.
3696 */
3697 retry++;
3698 tmp_loopid = fcport->loop_id;
3699 fcport->loop_id = mb[1];
3700
3701 ql_dbg(ql_dbg_disc, vha, 0x2001,
3702 "Fabric Login: port in use - next loop "
3703 "id=0x%04x, port id= %02x%02x%02x.\n",
3704 fcport->loop_id, fcport->d_id.b.domain,
3705 fcport->d_id.b.area, fcport->d_id.b.al_pa);
3706
3707 } else if (mb[0] == MBS_COMMAND_COMPLETE) {
3708 /*
3709 * Login succeeded.
3710 */
3711 if (retry) {
3712 /* A retry occurred before. */
3713 *next_loopid = tmp_loopid;
3714 } else {
3715 /*
3716 * No retry occurred before. Just increment the
3717 * ID value for next login.
3718 */
3719 *next_loopid = (fcport->loop_id + 1);
3720 }
3721
3722 if (mb[1] & BIT_0) {
3723 fcport->port_type = FCT_INITIATOR;
3724 } else {
3725 fcport->port_type = FCT_TARGET;
3726 if (mb[1] & BIT_1) {
3727 fcport->flags |= FCF_FCP2_DEVICE;
3728 }
3729 }
3730
3731 if (mb[10] & BIT_0)
3732 fcport->supported_classes |= FC_COS_CLASS2;
3733 if (mb[10] & BIT_1)
3734 fcport->supported_classes |= FC_COS_CLASS3;
3735
3736 rval = QLA_SUCCESS;
3737 break;
3738 } else if (mb[0] == MBS_LOOP_ID_USED) {
3739 /*
3740 * Loop ID already used, try next loop ID.
3741 */
3742 fcport->loop_id++;
3743 rval = qla2x00_find_new_loop_id(vha, fcport);
3744 if (rval != QLA_SUCCESS) {
3745 /* Ran out of loop IDs to use */
3746 break;
3747 }
3748 } else if (mb[0] == MBS_COMMAND_ERROR) {
3749 /*
3750 * Firmware possibly timed out during login. If NO
3751 * retries are left to do then the device is declared
3752 * dead.
3753 */
3754 *next_loopid = fcport->loop_id;
3755 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
3756 fcport->d_id.b.domain, fcport->d_id.b.area,
3757 fcport->d_id.b.al_pa);
3758 qla2x00_mark_device_lost(vha, fcport, 1, 0);
3759
3760 rval = 1;
3761 break;
3762 } else {
3763 /*
3764 * unrecoverable / not handled error
3765 */
3766 ql_dbg(ql_dbg_disc, vha, 0x2002,
3767 "Failed=%x port_id=%02x%02x%02x loop_id=%x "
3768 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain,
3769 fcport->d_id.b.area, fcport->d_id.b.al_pa,
3770 fcport->loop_id, jiffies);
3771
3772 *next_loopid = fcport->loop_id;
3773 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
3774 fcport->d_id.b.domain, fcport->d_id.b.area,
3775 fcport->d_id.b.al_pa);
3776 fcport->loop_id = FC_NO_LOOP_ID;
3777 fcport->login_retry = 0;
3778
3779 rval = 3;
3780 break;
3781 }
3782 }
3783
3784 return (rval);
3785 }
3786
3787 /*
3788 * qla2x00_local_device_login
3789 * Issue local device login command.
3790 *
3791 * Input:
3792 * ha = adapter block pointer.
3793 * loop_id = loop id of device to login to.
3794 *
3795 * Returns (Where's the #define!!!!):
3796 * 0 - Login successfully
3797 * 1 - Login failed
3798 * 3 - Fatal error
3799 */
3800 int
3801 qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
3802 {
3803 int rval;
3804 uint16_t mb[MAILBOX_REGISTER_COUNT];
3805
3806 memset(mb, 0, sizeof(mb));
3807 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
3808 if (rval == QLA_SUCCESS) {
3809 /* Interrogate mailbox registers for any errors */
3810 if (mb[0] == MBS_COMMAND_ERROR)
3811 rval = 1;
3812 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
3813 /* device not in PCB table */
3814 rval = 3;
3815 }
3816
3817 return (rval);
3818 }
3819
3820 /*
3821 * qla2x00_loop_resync
3822 * Resync with fibre channel devices.
3823 *
3824 * Input:
3825 * ha = adapter block pointer.
3826 *
3827 * Returns:
3828 * 0 = success
3829 */
3830 int
3831 qla2x00_loop_resync(scsi_qla_host_t *vha)
3832 {
3833 int rval = QLA_SUCCESS;
3834 uint32_t wait_time;
3835 struct req_que *req;
3836 struct rsp_que *rsp;
3837
3838 if (vha->hw->flags.cpu_affinity_enabled)
3839 req = vha->hw->req_q_map[0];
3840 else
3841 req = vha->req;
3842 rsp = req->rsp;
3843
3844 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
3845 if (vha->flags.online) {
3846 if (!(rval = qla2x00_fw_ready(vha))) {
3847 /* Wait at most MAX_TARGET RSCNs for a stable link. */
3848 wait_time = 256;
3849 do {
3850 /* Issue a marker after FW becomes ready. */
3851 qla2x00_marker(vha, req, rsp, 0, 0,
3852 MK_SYNC_ALL);
3853 vha->marker_needed = 0;
3854
3855 /* Remap devices on Loop. */
3856 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
3857
3858 qla2x00_configure_loop(vha);
3859 wait_time--;
3860 } while (!atomic_read(&vha->loop_down_timer) &&
3861 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
3862 && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
3863 &vha->dpc_flags)));
3864 }
3865 }
3866
3867 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
3868 return (QLA_FUNCTION_FAILED);
3869
3870 if (rval)
3871 ql_dbg(ql_dbg_disc, vha, 0x206c,
3872 "%s *** FAILED ***.\n", __func__);
3873
3874 return (rval);
3875 }
3876
3877 /*
3878 * qla2x00_perform_loop_resync
3879 * Description: This function will set the appropriate flags and call
3880 * qla2x00_loop_resync. If successful loop will be resynced
3881 * Arguments : scsi_qla_host_t pointer
3882 * returm : Success or Failure
3883 */
3884
3885 int qla2x00_perform_loop_resync(scsi_qla_host_t *ha)
3886 {
3887 int32_t rval = 0;
3888
3889 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) {
3890 /*Configure the flags so that resync happens properly*/
3891 atomic_set(&ha->loop_down_timer, 0);
3892 if (!(ha->device_flags & DFLG_NO_CABLE)) {
3893 atomic_set(&ha->loop_state, LOOP_UP);
3894 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags);
3895 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags);
3896 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
3897
3898 rval = qla2x00_loop_resync(ha);
3899 } else
3900 atomic_set(&ha->loop_state, LOOP_DEAD);
3901
3902 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags);
3903 }
3904
3905 return rval;
3906 }
3907
3908 void
3909 qla2x00_update_fcports(scsi_qla_host_t *base_vha)
3910 {
3911 fc_port_t *fcport;
3912 struct scsi_qla_host *vha;
3913 struct qla_hw_data *ha = base_vha->hw;
3914 unsigned long flags;
3915
3916 spin_lock_irqsave(&ha->vport_slock, flags);
3917 /* Go with deferred removal of rport references. */
3918 list_for_each_entry(vha, &base_vha->hw->vp_list, list) {
3919 atomic_inc(&vha->vref_count);
3920 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3921 if (fcport->drport &&
3922 atomic_read(&fcport->state) != FCS_UNCONFIGURED) {
3923 spin_unlock_irqrestore(&ha->vport_slock, flags);
3924
3925 qla2x00_rport_del(fcport);
3926
3927 spin_lock_irqsave(&ha->vport_slock, flags);
3928 }
3929 }
3930 atomic_dec(&vha->vref_count);
3931 }
3932 spin_unlock_irqrestore(&ha->vport_slock, flags);
3933 }
3934
3935 /*
3936 * qla82xx_quiescent_state_cleanup
3937 * Description: This function will block the new I/Os
3938 * Its not aborting any I/Os as context
3939 * is not destroyed during quiescence
3940 * Arguments: scsi_qla_host_t
3941 * return : void
3942 */
3943 void
3944 qla82xx_quiescent_state_cleanup(scsi_qla_host_t *vha)
3945 {
3946 struct qla_hw_data *ha = vha->hw;
3947 struct scsi_qla_host *vp;
3948
3949 ql_dbg(ql_dbg_p3p, vha, 0xb002,
3950 "Performing ISP error recovery - ha=%p.\n", ha);
3951
3952 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME);
3953 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
3954 atomic_set(&vha->loop_state, LOOP_DOWN);
3955 qla2x00_mark_all_devices_lost(vha, 0);
3956 list_for_each_entry(vp, &ha->vp_list, list)
3957 qla2x00_mark_all_devices_lost(vha, 0);
3958 } else {
3959 if (!atomic_read(&vha->loop_down_timer))
3960 atomic_set(&vha->loop_down_timer,
3961 LOOP_DOWN_TIME);
3962 }
3963 /* Wait for pending cmds to complete */
3964 qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST);
3965 }
3966
3967 void
3968 qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha)
3969 {
3970 struct qla_hw_data *ha = vha->hw;
3971 struct scsi_qla_host *vp;
3972 unsigned long flags;
3973 fc_port_t *fcport;
3974
3975 /* For ISP82XX, driver waits for completion of the commands.
3976 * online flag should be set.
3977 */
3978 if (!IS_QLA82XX(ha))
3979 vha->flags.online = 0;
3980 ha->flags.chip_reset_done = 0;
3981 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
3982 ha->qla_stats.total_isp_aborts++;
3983
3984 ql_log(ql_log_info, vha, 0x00af,
3985 "Performing ISP error recovery - ha=%p.\n", ha);
3986
3987 /* For ISP82XX, reset_chip is just disabling interrupts.
3988 * Driver waits for the completion of the commands.
3989 * the interrupts need to be enabled.
3990 */
3991 if (!IS_QLA82XX(ha))
3992 ha->isp_ops->reset_chip(vha);
3993
3994 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
3995 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
3996 atomic_set(&vha->loop_state, LOOP_DOWN);
3997 qla2x00_mark_all_devices_lost(vha, 0);
3998
3999 spin_lock_irqsave(&ha->vport_slock, flags);
4000 list_for_each_entry(vp, &ha->vp_list, list) {
4001 atomic_inc(&vp->vref_count);
4002 spin_unlock_irqrestore(&ha->vport_slock, flags);
4003
4004 qla2x00_mark_all_devices_lost(vp, 0);
4005
4006 spin_lock_irqsave(&ha->vport_slock, flags);
4007 atomic_dec(&vp->vref_count);
4008 }
4009 spin_unlock_irqrestore(&ha->vport_slock, flags);
4010 } else {
4011 if (!atomic_read(&vha->loop_down_timer))
4012 atomic_set(&vha->loop_down_timer,
4013 LOOP_DOWN_TIME);
4014 }
4015
4016 /* Clear all async request states across all VPs. */
4017 list_for_each_entry(fcport, &vha->vp_fcports, list)
4018 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
4019 spin_lock_irqsave(&ha->vport_slock, flags);
4020 list_for_each_entry(vp, &ha->vp_list, list) {
4021 atomic_inc(&vp->vref_count);
4022 spin_unlock_irqrestore(&ha->vport_slock, flags);
4023
4024 list_for_each_entry(fcport, &vp->vp_fcports, list)
4025 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
4026
4027 spin_lock_irqsave(&ha->vport_slock, flags);
4028 atomic_dec(&vp->vref_count);
4029 }
4030 spin_unlock_irqrestore(&ha->vport_slock, flags);
4031
4032 if (!ha->flags.eeh_busy) {
4033 /* Make sure for ISP 82XX IO DMA is complete */
4034 if (IS_QLA82XX(ha)) {
4035 qla82xx_chip_reset_cleanup(vha);
4036 ql_log(ql_log_info, vha, 0x00b4,
4037 "Done chip reset cleanup.\n");
4038
4039 /* Done waiting for pending commands.
4040 * Reset the online flag.
4041 */
4042 vha->flags.online = 0;
4043 }
4044
4045 /* Requeue all commands in outstanding command list. */
4046 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
4047 }
4048 }
4049
4050 /*
4051 * qla2x00_abort_isp
4052 * Resets ISP and aborts all outstanding commands.
4053 *
4054 * Input:
4055 * ha = adapter block pointer.
4056 *
4057 * Returns:
4058 * 0 = success
4059 */
4060 int
4061 qla2x00_abort_isp(scsi_qla_host_t *vha)
4062 {
4063 int rval;
4064 uint8_t status = 0;
4065 struct qla_hw_data *ha = vha->hw;
4066 struct scsi_qla_host *vp;
4067 struct req_que *req = ha->req_q_map[0];
4068 unsigned long flags;
4069
4070 if (vha->flags.online) {
4071 qla2x00_abort_isp_cleanup(vha);
4072
4073 if (unlikely(pci_channel_offline(ha->pdev) &&
4074 ha->flags.pci_channel_io_perm_failure)) {
4075 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
4076 status = 0;
4077 return status;
4078 }
4079
4080 ha->isp_ops->get_flash_version(vha, req->ring);
4081
4082 ha->isp_ops->nvram_config(vha);
4083
4084 if (!qla2x00_restart_isp(vha)) {
4085 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
4086
4087 if (!atomic_read(&vha->loop_down_timer)) {
4088 /*
4089 * Issue marker command only when we are going
4090 * to start the I/O .
4091 */
4092 vha->marker_needed = 1;
4093 }
4094
4095 vha->flags.online = 1;
4096
4097 ha->isp_ops->enable_intrs(ha);
4098
4099 ha->isp_abort_cnt = 0;
4100 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
4101
4102 if (IS_QLA81XX(ha))
4103 qla2x00_get_fw_version(vha,
4104 &ha->fw_major_version,
4105 &ha->fw_minor_version,
4106 &ha->fw_subminor_version,
4107 &ha->fw_attributes, &ha->fw_memory_size,
4108 ha->mpi_version, &ha->mpi_capabilities,
4109 ha->phy_version);
4110
4111 if (ha->fce) {
4112 ha->flags.fce_enabled = 1;
4113 memset(ha->fce, 0,
4114 fce_calc_size(ha->fce_bufs));
4115 rval = qla2x00_enable_fce_trace(vha,
4116 ha->fce_dma, ha->fce_bufs, ha->fce_mb,
4117 &ha->fce_bufs);
4118 if (rval) {
4119 ql_log(ql_log_warn, vha, 0x8033,
4120 "Unable to reinitialize FCE "
4121 "(%d).\n", rval);
4122 ha->flags.fce_enabled = 0;
4123 }
4124 }
4125
4126 if (ha->eft) {
4127 memset(ha->eft, 0, EFT_SIZE);
4128 rval = qla2x00_enable_eft_trace(vha,
4129 ha->eft_dma, EFT_NUM_BUFFERS);
4130 if (rval) {
4131 ql_log(ql_log_warn, vha, 0x8034,
4132 "Unable to reinitialize EFT "
4133 "(%d).\n", rval);
4134 }
4135 }
4136 } else { /* failed the ISP abort */
4137 vha->flags.online = 1;
4138 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
4139 if (ha->isp_abort_cnt == 0) {
4140 ql_log(ql_log_fatal, vha, 0x8035,
4141 "ISP error recover failed - "
4142 "board disabled.\n");
4143 /*
4144 * The next call disables the board
4145 * completely.
4146 */
4147 ha->isp_ops->reset_adapter(vha);
4148 vha->flags.online = 0;
4149 clear_bit(ISP_ABORT_RETRY,
4150 &vha->dpc_flags);
4151 status = 0;
4152 } else { /* schedule another ISP abort */
4153 ha->isp_abort_cnt--;
4154 ql_dbg(ql_dbg_taskm, vha, 0x8020,
4155 "ISP abort - retry remaining %d.\n",
4156 ha->isp_abort_cnt);
4157 status = 1;
4158 }
4159 } else {
4160 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
4161 ql_dbg(ql_dbg_taskm, vha, 0x8021,
4162 "ISP error recovery - retrying (%d) "
4163 "more times.\n", ha->isp_abort_cnt);
4164 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
4165 status = 1;
4166 }
4167 }
4168
4169 }
4170
4171 if (!status) {
4172 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__);
4173
4174 spin_lock_irqsave(&ha->vport_slock, flags);
4175 list_for_each_entry(vp, &ha->vp_list, list) {
4176 if (vp->vp_idx) {
4177 atomic_inc(&vp->vref_count);
4178 spin_unlock_irqrestore(&ha->vport_slock, flags);
4179
4180 qla2x00_vp_abort_isp(vp);
4181
4182 spin_lock_irqsave(&ha->vport_slock, flags);
4183 atomic_dec(&vp->vref_count);
4184 }
4185 }
4186 spin_unlock_irqrestore(&ha->vport_slock, flags);
4187
4188 } else {
4189 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n",
4190 __func__);
4191 }
4192
4193 return(status);
4194 }
4195
4196 /*
4197 * qla2x00_restart_isp
4198 * restarts the ISP after a reset
4199 *
4200 * Input:
4201 * ha = adapter block pointer.
4202 *
4203 * Returns:
4204 * 0 = success
4205 */
4206 static int
4207 qla2x00_restart_isp(scsi_qla_host_t *vha)
4208 {
4209 int status = 0;
4210 uint32_t wait_time;
4211 struct qla_hw_data *ha = vha->hw;
4212 struct req_que *req = ha->req_q_map[0];
4213 struct rsp_que *rsp = ha->rsp_q_map[0];
4214
4215 /* If firmware needs to be loaded */
4216 if (qla2x00_isp_firmware(vha)) {
4217 vha->flags.online = 0;
4218 status = ha->isp_ops->chip_diag(vha);
4219 if (!status)
4220 status = qla2x00_setup_chip(vha);
4221 }
4222
4223 if (!status && !(status = qla2x00_init_rings(vha))) {
4224 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
4225 ha->flags.chip_reset_done = 1;
4226 /* Initialize the queues in use */
4227 qla25xx_init_queues(ha);
4228
4229 status = qla2x00_fw_ready(vha);
4230 if (!status) {
4231 ql_dbg(ql_dbg_taskm, vha, 0x8031,
4232 "Start configure loop status = %d.\n", status);
4233
4234 /* Issue a marker after FW becomes ready. */
4235 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
4236
4237 vha->flags.online = 1;
4238 /* Wait at most MAX_TARGET RSCNs for a stable link. */
4239 wait_time = 256;
4240 do {
4241 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
4242 qla2x00_configure_loop(vha);
4243 wait_time--;
4244 } while (!atomic_read(&vha->loop_down_timer) &&
4245 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
4246 && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
4247 &vha->dpc_flags)));
4248 }
4249
4250 /* if no cable then assume it's good */
4251 if ((vha->device_flags & DFLG_NO_CABLE))
4252 status = 0;
4253
4254 ql_dbg(ql_dbg_taskm, vha, 0x8032,
4255 "Configure loop done, status = 0x%x.\n", status);
4256 }
4257 return (status);
4258 }
4259
4260 static int
4261 qla25xx_init_queues(struct qla_hw_data *ha)
4262 {
4263 struct rsp_que *rsp = NULL;
4264 struct req_que *req = NULL;
4265 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
4266 int ret = -1;
4267 int i;
4268
4269 for (i = 1; i < ha->max_rsp_queues; i++) {
4270 rsp = ha->rsp_q_map[i];
4271 if (rsp) {
4272 rsp->options &= ~BIT_0;
4273 ret = qla25xx_init_rsp_que(base_vha, rsp);
4274 if (ret != QLA_SUCCESS)
4275 ql_dbg(ql_dbg_init, base_vha, 0x00ff,
4276 "%s Rsp que: %d init failed.\n",
4277 __func__, rsp->id);
4278 else
4279 ql_dbg(ql_dbg_init, base_vha, 0x0100,
4280 "%s Rsp que: %d inited.\n",
4281 __func__, rsp->id);
4282 }
4283 }
4284 for (i = 1; i < ha->max_req_queues; i++) {
4285 req = ha->req_q_map[i];
4286 if (req) {
4287 /* Clear outstanding commands array. */
4288 req->options &= ~BIT_0;
4289 ret = qla25xx_init_req_que(base_vha, req);
4290 if (ret != QLA_SUCCESS)
4291 ql_dbg(ql_dbg_init, base_vha, 0x0101,
4292 "%s Req que: %d init failed.\n",
4293 __func__, req->id);
4294 else
4295 ql_dbg(ql_dbg_init, base_vha, 0x0102,
4296 "%s Req que: %d inited.\n",
4297 __func__, req->id);
4298 }
4299 }
4300 return ret;
4301 }
4302
4303 /*
4304 * qla2x00_reset_adapter
4305 * Reset adapter.
4306 *
4307 * Input:
4308 * ha = adapter block pointer.
4309 */
4310 void
4311 qla2x00_reset_adapter(scsi_qla_host_t *vha)
4312 {
4313 unsigned long flags = 0;
4314 struct qla_hw_data *ha = vha->hw;
4315 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
4316
4317 vha->flags.online = 0;
4318 ha->isp_ops->disable_intrs(ha);
4319
4320 spin_lock_irqsave(&ha->hardware_lock, flags);
4321 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
4322 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
4323 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
4324 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
4325 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4326 }
4327
4328 void
4329 qla24xx_reset_adapter(scsi_qla_host_t *vha)
4330 {
4331 unsigned long flags = 0;
4332 struct qla_hw_data *ha = vha->hw;
4333 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
4334
4335 if (IS_QLA82XX(ha))
4336 return;
4337
4338 vha->flags.online = 0;
4339 ha->isp_ops->disable_intrs(ha);
4340
4341 spin_lock_irqsave(&ha->hardware_lock, flags);
4342 WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
4343 RD_REG_DWORD(&reg->hccr);
4344 WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
4345 RD_REG_DWORD(&reg->hccr);
4346 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4347
4348 if (IS_NOPOLLING_TYPE(ha))
4349 ha->isp_ops->enable_intrs(ha);
4350 }
4351
4352 /* On sparc systems, obtain port and node WWN from firmware
4353 * properties.
4354 */
4355 static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
4356 struct nvram_24xx *nv)
4357 {
4358 #ifdef CONFIG_SPARC
4359 struct qla_hw_data *ha = vha->hw;
4360 struct pci_dev *pdev = ha->pdev;
4361 struct device_node *dp = pci_device_to_OF_node(pdev);
4362 const u8 *val;
4363 int len;
4364
4365 val = of_get_property(dp, "port-wwn", &len);
4366 if (val && len >= WWN_SIZE)
4367 memcpy(nv->port_name, val, WWN_SIZE);
4368
4369 val = of_get_property(dp, "node-wwn", &len);
4370 if (val && len >= WWN_SIZE)
4371 memcpy(nv->node_name, val, WWN_SIZE);
4372 #endif
4373 }
4374
4375 int
4376 qla24xx_nvram_config(scsi_qla_host_t *vha)
4377 {
4378 int rval;
4379 struct init_cb_24xx *icb;
4380 struct nvram_24xx *nv;
4381 uint32_t *dptr;
4382 uint8_t *dptr1, *dptr2;
4383 uint32_t chksum;
4384 uint16_t cnt;
4385 struct qla_hw_data *ha = vha->hw;
4386
4387 rval = QLA_SUCCESS;
4388 icb = (struct init_cb_24xx *)ha->init_cb;
4389 nv = ha->nvram;
4390
4391 /* Determine NVRAM starting address. */
4392 if (ha->flags.port0) {
4393 ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
4394 ha->vpd_base = FA_NVRAM_VPD0_ADDR;
4395 } else {
4396 ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
4397 ha->vpd_base = FA_NVRAM_VPD1_ADDR;
4398 }
4399 ha->nvram_size = sizeof(struct nvram_24xx);
4400 ha->vpd_size = FA_NVRAM_VPD_SIZE;
4401 if (IS_QLA82XX(ha))
4402 ha->vpd_size = FA_VPD_SIZE_82XX;
4403
4404 /* Get VPD data into cache */
4405 ha->vpd = ha->nvram + VPD_OFFSET;
4406 ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd,
4407 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
4408
4409 /* Get NVRAM data into cache and calculate checksum. */
4410 dptr = (uint32_t *)nv;
4411 ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base,
4412 ha->nvram_size);
4413 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
4414 chksum += le32_to_cpu(*dptr++);
4415
4416 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a,
4417 "Contents of NVRAM\n");
4418 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d,
4419 (uint8_t *)nv, ha->nvram_size);
4420
4421 /* Bad NVRAM data, set defaults parameters. */
4422 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
4423 || nv->id[3] != ' ' ||
4424 nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
4425 /* Reset NVRAM data. */
4426 ql_log(ql_log_warn, vha, 0x006b,
4427 "Inconisistent NVRAM detected: checksum=0x%x id=%c "
4428 "version=0x%x.\n", chksum, nv->id[0], nv->nvram_version);
4429 ql_log(ql_log_warn, vha, 0x006c,
4430 "Falling back to functioning (yet invalid -- WWPN) "
4431 "defaults.\n");
4432
4433 /*
4434 * Set default initialization control block.
4435 */
4436 memset(nv, 0, ha->nvram_size);
4437 nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
4438 nv->version = __constant_cpu_to_le16(ICB_VERSION);
4439 nv->frame_payload_size = __constant_cpu_to_le16(2048);
4440 nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
4441 nv->exchange_count = __constant_cpu_to_le16(0);
4442 nv->hard_address = __constant_cpu_to_le16(124);
4443 nv->port_name[0] = 0x21;
4444 nv->port_name[1] = 0x00 + ha->port_no;
4445 nv->port_name[2] = 0x00;
4446 nv->port_name[3] = 0xe0;
4447 nv->port_name[4] = 0x8b;
4448 nv->port_name[5] = 0x1c;
4449 nv->port_name[6] = 0x55;
4450 nv->port_name[7] = 0x86;
4451 nv->node_name[0] = 0x20;
4452 nv->node_name[1] = 0x00;
4453 nv->node_name[2] = 0x00;
4454 nv->node_name[3] = 0xe0;
4455 nv->node_name[4] = 0x8b;
4456 nv->node_name[5] = 0x1c;
4457 nv->node_name[6] = 0x55;
4458 nv->node_name[7] = 0x86;
4459 qla24xx_nvram_wwn_from_ofw(vha, nv);
4460 nv->login_retry_count = __constant_cpu_to_le16(8);
4461 nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
4462 nv->login_timeout = __constant_cpu_to_le16(0);
4463 nv->firmware_options_1 =
4464 __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
4465 nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
4466 nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
4467 nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
4468 nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
4469 nv->efi_parameters = __constant_cpu_to_le32(0);
4470 nv->reset_delay = 5;
4471 nv->max_luns_per_target = __constant_cpu_to_le16(128);
4472 nv->port_down_retry_count = __constant_cpu_to_le16(30);
4473 nv->link_down_timeout = __constant_cpu_to_le16(30);
4474
4475 rval = 1;
4476 }
4477
4478 /* Reset Initialization control block */
4479 memset(icb, 0, ha->init_cb_size);
4480
4481 /* Copy 1st segment. */
4482 dptr1 = (uint8_t *)icb;
4483 dptr2 = (uint8_t *)&nv->version;
4484 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
4485 while (cnt--)
4486 *dptr1++ = *dptr2++;
4487
4488 icb->login_retry_count = nv->login_retry_count;
4489 icb->link_down_on_nos = nv->link_down_on_nos;
4490
4491 /* Copy 2nd segment. */
4492 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
4493 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
4494 cnt = (uint8_t *)&icb->reserved_3 -
4495 (uint8_t *)&icb->interrupt_delay_timer;
4496 while (cnt--)
4497 *dptr1++ = *dptr2++;
4498
4499 /*
4500 * Setup driver NVRAM options.
4501 */
4502 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
4503 "QLA2462");
4504
4505 /* Use alternate WWN? */
4506 if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
4507 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
4508 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
4509 }
4510
4511 /* Prepare nodename */
4512 if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
4513 /*
4514 * Firmware will apply the following mask if the nodename was
4515 * not provided.
4516 */
4517 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
4518 icb->node_name[0] &= 0xF0;
4519 }
4520
4521 /* Set host adapter parameters. */
4522 ha->flags.disable_risc_code_load = 0;
4523 ha->flags.enable_lip_reset = 0;
4524 ha->flags.enable_lip_full_login =
4525 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
4526 ha->flags.enable_target_reset =
4527 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
4528 ha->flags.enable_led_scheme = 0;
4529 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
4530
4531 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
4532 (BIT_6 | BIT_5 | BIT_4)) >> 4;
4533
4534 memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
4535 sizeof(ha->fw_seriallink_options24));
4536
4537 /* save HBA serial number */
4538 ha->serial0 = icb->port_name[5];
4539 ha->serial1 = icb->port_name[6];
4540 ha->serial2 = icb->port_name[7];
4541 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
4542 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
4543
4544 icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
4545
4546 ha->retry_count = le16_to_cpu(nv->login_retry_count);
4547
4548 /* Set minimum login_timeout to 4 seconds. */
4549 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
4550 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
4551 if (le16_to_cpu(nv->login_timeout) < 4)
4552 nv->login_timeout = __constant_cpu_to_le16(4);
4553 ha->login_timeout = le16_to_cpu(nv->login_timeout);
4554 icb->login_timeout = nv->login_timeout;
4555
4556 /* Set minimum RATOV to 100 tenths of a second. */
4557 ha->r_a_tov = 100;
4558
4559 ha->loop_reset_delay = nv->reset_delay;
4560
4561 /* Link Down Timeout = 0:
4562 *
4563 * When Port Down timer expires we will start returning
4564 * I/O's to OS with "DID_NO_CONNECT".
4565 *
4566 * Link Down Timeout != 0:
4567 *
4568 * The driver waits for the link to come up after link down
4569 * before returning I/Os to OS with "DID_NO_CONNECT".
4570 */
4571 if (le16_to_cpu(nv->link_down_timeout) == 0) {
4572 ha->loop_down_abort_time =
4573 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
4574 } else {
4575 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
4576 ha->loop_down_abort_time =
4577 (LOOP_DOWN_TIME - ha->link_down_timeout);
4578 }
4579
4580 /* Need enough time to try and get the port back. */
4581 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
4582 if (qlport_down_retry)
4583 ha->port_down_retry_count = qlport_down_retry;
4584
4585 /* Set login_retry_count */
4586 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
4587 if (ha->port_down_retry_count ==
4588 le16_to_cpu(nv->port_down_retry_count) &&
4589 ha->port_down_retry_count > 3)
4590 ha->login_retry_count = ha->port_down_retry_count;
4591 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
4592 ha->login_retry_count = ha->port_down_retry_count;
4593 if (ql2xloginretrycount)
4594 ha->login_retry_count = ql2xloginretrycount;
4595
4596 /* Enable ZIO. */
4597 if (!vha->flags.init_done) {
4598 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
4599 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
4600 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
4601 le16_to_cpu(icb->interrupt_delay_timer): 2;
4602 }
4603 icb->firmware_options_2 &= __constant_cpu_to_le32(
4604 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
4605 vha->flags.process_response_queue = 0;
4606 if (ha->zio_mode != QLA_ZIO_DISABLED) {
4607 ha->zio_mode = QLA_ZIO_MODE_6;
4608
4609 ql_log(ql_log_info, vha, 0x006f,
4610 "ZIO mode %d enabled; timer delay (%d us).\n",
4611 ha->zio_mode, ha->zio_timer * 100);
4612
4613 icb->firmware_options_2 |= cpu_to_le32(
4614 (uint32_t)ha->zio_mode);
4615 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
4616 vha->flags.process_response_queue = 1;
4617 }
4618
4619 if (rval) {
4620 ql_log(ql_log_warn, vha, 0x0070,
4621 "NVRAM configuration failed.\n");
4622 }
4623 return (rval);
4624 }
4625
4626 static int
4627 qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr,
4628 uint32_t faddr)
4629 {
4630 int rval = QLA_SUCCESS;
4631 int segments, fragment;
4632 uint32_t *dcode, dlen;
4633 uint32_t risc_addr;
4634 uint32_t risc_size;
4635 uint32_t i;
4636 struct qla_hw_data *ha = vha->hw;
4637 struct req_que *req = ha->req_q_map[0];
4638
4639 ql_dbg(ql_dbg_init, vha, 0x008b,
4640 "FW: Loading firmware from flash (%x).\n", faddr);
4641
4642 rval = QLA_SUCCESS;
4643
4644 segments = FA_RISC_CODE_SEGMENTS;
4645 dcode = (uint32_t *)req->ring;
4646 *srisc_addr = 0;
4647
4648 /* Validate firmware image by checking version. */
4649 qla24xx_read_flash_data(vha, dcode, faddr + 4, 4);
4650 for (i = 0; i < 4; i++)
4651 dcode[i] = be32_to_cpu(dcode[i]);
4652 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
4653 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
4654 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
4655 dcode[3] == 0)) {
4656 ql_log(ql_log_fatal, vha, 0x008c,
4657 "Unable to verify the integrity of flash firmware "
4658 "image.\n");
4659 ql_log(ql_log_fatal, vha, 0x008d,
4660 "Firmware data: %08x %08x %08x %08x.\n",
4661 dcode[0], dcode[1], dcode[2], dcode[3]);
4662
4663 return QLA_FUNCTION_FAILED;
4664 }
4665
4666 while (segments && rval == QLA_SUCCESS) {
4667 /* Read segment's load information. */
4668 qla24xx_read_flash_data(vha, dcode, faddr, 4);
4669
4670 risc_addr = be32_to_cpu(dcode[2]);
4671 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
4672 risc_size = be32_to_cpu(dcode[3]);
4673
4674 fragment = 0;
4675 while (risc_size > 0 && rval == QLA_SUCCESS) {
4676 dlen = (uint32_t)(ha->fw_transfer_size >> 2);
4677 if (dlen > risc_size)
4678 dlen = risc_size;
4679
4680 ql_dbg(ql_dbg_init, vha, 0x008e,
4681 "Loading risc segment@ risc addr %x "
4682 "number of dwords 0x%x offset 0x%x.\n",
4683 risc_addr, dlen, faddr);
4684
4685 qla24xx_read_flash_data(vha, dcode, faddr, dlen);
4686 for (i = 0; i < dlen; i++)
4687 dcode[i] = swab32(dcode[i]);
4688
4689 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
4690 dlen);
4691 if (rval) {
4692 ql_log(ql_log_fatal, vha, 0x008f,
4693 "Failed to load segment %d of firmware.\n",
4694 fragment);
4695 break;
4696 }
4697
4698 faddr += dlen;
4699 risc_addr += dlen;
4700 risc_size -= dlen;
4701 fragment++;
4702 }
4703
4704 /* Next segment. */
4705 segments--;
4706 }
4707
4708 return rval;
4709 }
4710
4711 #define QLA_FW_URL "ftp://ftp.qlogic.com/outgoing/linux/firmware/"
4712
4713 int
4714 qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
4715 {
4716 int rval;
4717 int i, fragment;
4718 uint16_t *wcode, *fwcode;
4719 uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
4720 struct fw_blob *blob;
4721 struct qla_hw_data *ha = vha->hw;
4722 struct req_que *req = ha->req_q_map[0];
4723
4724 /* Load firmware blob. */
4725 blob = qla2x00_request_firmware(vha);
4726 if (!blob) {
4727 ql_log(ql_log_info, vha, 0x0083,
4728 "Fimware image unavailable.\n");
4729 ql_log(ql_log_info, vha, 0x0084,
4730 "Firmware images can be retrieved from: "QLA_FW_URL ".\n");
4731 return QLA_FUNCTION_FAILED;
4732 }
4733
4734 rval = QLA_SUCCESS;
4735
4736 wcode = (uint16_t *)req->ring;
4737 *srisc_addr = 0;
4738 fwcode = (uint16_t *)blob->fw->data;
4739 fwclen = 0;
4740
4741 /* Validate firmware image by checking version. */
4742 if (blob->fw->size < 8 * sizeof(uint16_t)) {
4743 ql_log(ql_log_fatal, vha, 0x0085,
4744 "Unable to verify integrity of firmware image (%Zd).\n",
4745 blob->fw->size);
4746 goto fail_fw_integrity;
4747 }
4748 for (i = 0; i < 4; i++)
4749 wcode[i] = be16_to_cpu(fwcode[i + 4]);
4750 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
4751 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
4752 wcode[2] == 0 && wcode[3] == 0)) {
4753 ql_log(ql_log_fatal, vha, 0x0086,
4754 "Unable to verify integrity of firmware image.\n");
4755 ql_log(ql_log_fatal, vha, 0x0087,
4756 "Firmware data: %04x %04x %04x %04x.\n",
4757 wcode[0], wcode[1], wcode[2], wcode[3]);
4758 goto fail_fw_integrity;
4759 }
4760
4761 seg = blob->segs;
4762 while (*seg && rval == QLA_SUCCESS) {
4763 risc_addr = *seg;
4764 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
4765 risc_size = be16_to_cpu(fwcode[3]);
4766
4767 /* Validate firmware image size. */
4768 fwclen += risc_size * sizeof(uint16_t);
4769 if (blob->fw->size < fwclen) {
4770 ql_log(ql_log_fatal, vha, 0x0088,
4771 "Unable to verify integrity of firmware image "
4772 "(%Zd).\n", blob->fw->size);
4773 goto fail_fw_integrity;
4774 }
4775
4776 fragment = 0;
4777 while (risc_size > 0 && rval == QLA_SUCCESS) {
4778 wlen = (uint16_t)(ha->fw_transfer_size >> 1);
4779 if (wlen > risc_size)
4780 wlen = risc_size;
4781 ql_dbg(ql_dbg_init, vha, 0x0089,
4782 "Loading risc segment@ risc addr %x number of "
4783 "words 0x%x.\n", risc_addr, wlen);
4784
4785 for (i = 0; i < wlen; i++)
4786 wcode[i] = swab16(fwcode[i]);
4787
4788 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
4789 wlen);
4790 if (rval) {
4791 ql_log(ql_log_fatal, vha, 0x008a,
4792 "Failed to load segment %d of firmware.\n",
4793 fragment);
4794 break;
4795 }
4796
4797 fwcode += wlen;
4798 risc_addr += wlen;
4799 risc_size -= wlen;
4800 fragment++;
4801 }
4802
4803 /* Next segment. */
4804 seg++;
4805 }
4806 return rval;
4807
4808 fail_fw_integrity:
4809 return QLA_FUNCTION_FAILED;
4810 }
4811
4812 static int
4813 qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
4814 {
4815 int rval;
4816 int segments, fragment;
4817 uint32_t *dcode, dlen;
4818 uint32_t risc_addr;
4819 uint32_t risc_size;
4820 uint32_t i;
4821 struct fw_blob *blob;
4822 uint32_t *fwcode, fwclen;
4823 struct qla_hw_data *ha = vha->hw;
4824 struct req_que *req = ha->req_q_map[0];
4825
4826 /* Load firmware blob. */
4827 blob = qla2x00_request_firmware(vha);
4828 if (!blob) {
4829 ql_log(ql_log_warn, vha, 0x0090,
4830 "Fimware image unavailable.\n");
4831 ql_log(ql_log_warn, vha, 0x0091,
4832 "Firmware images can be retrieved from: "
4833 QLA_FW_URL ".\n");
4834
4835 return QLA_FUNCTION_FAILED;
4836 }
4837
4838 ql_dbg(ql_dbg_init, vha, 0x0092,
4839 "FW: Loading via request-firmware.\n");
4840
4841 rval = QLA_SUCCESS;
4842
4843 segments = FA_RISC_CODE_SEGMENTS;
4844 dcode = (uint32_t *)req->ring;
4845 *srisc_addr = 0;
4846 fwcode = (uint32_t *)blob->fw->data;
4847 fwclen = 0;
4848
4849 /* Validate firmware image by checking version. */
4850 if (blob->fw->size < 8 * sizeof(uint32_t)) {
4851 ql_log(ql_log_fatal, vha, 0x0093,
4852 "Unable to verify integrity of firmware image (%Zd).\n",
4853 blob->fw->size);
4854 goto fail_fw_integrity;
4855 }
4856 for (i = 0; i < 4; i++)
4857 dcode[i] = be32_to_cpu(fwcode[i + 4]);
4858 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
4859 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
4860 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
4861 dcode[3] == 0)) {
4862 ql_log(ql_log_fatal, vha, 0x0094,
4863 "Unable to verify integrity of firmware image (%Zd).\n",
4864 blob->fw->size);
4865 ql_log(ql_log_fatal, vha, 0x0095,
4866 "Firmware data: %08x %08x %08x %08x.\n",
4867 dcode[0], dcode[1], dcode[2], dcode[3]);
4868 goto fail_fw_integrity;
4869 }
4870
4871 while (segments && rval == QLA_SUCCESS) {
4872 risc_addr = be32_to_cpu(fwcode[2]);
4873 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
4874 risc_size = be32_to_cpu(fwcode[3]);
4875
4876 /* Validate firmware image size. */
4877 fwclen += risc_size * sizeof(uint32_t);
4878 if (blob->fw->size < fwclen) {
4879 ql_log(ql_log_fatal, vha, 0x0096,
4880 "Unable to verify integrity of firmware image "
4881 "(%Zd).\n", blob->fw->size);
4882
4883 goto fail_fw_integrity;
4884 }
4885
4886 fragment = 0;
4887 while (risc_size > 0 && rval == QLA_SUCCESS) {
4888 dlen = (uint32_t)(ha->fw_transfer_size >> 2);
4889 if (dlen > risc_size)
4890 dlen = risc_size;
4891
4892 ql_dbg(ql_dbg_init, vha, 0x0097,
4893 "Loading risc segment@ risc addr %x "
4894 "number of dwords 0x%x.\n", risc_addr, dlen);
4895
4896 for (i = 0; i < dlen; i++)
4897 dcode[i] = swab32(fwcode[i]);
4898
4899 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
4900 dlen);
4901 if (rval) {
4902 ql_log(ql_log_fatal, vha, 0x0098,
4903 "Failed to load segment %d of firmware.\n",
4904 fragment);
4905 break;
4906 }
4907
4908 fwcode += dlen;
4909 risc_addr += dlen;
4910 risc_size -= dlen;
4911 fragment++;
4912 }
4913
4914 /* Next segment. */
4915 segments--;
4916 }
4917 return rval;
4918
4919 fail_fw_integrity:
4920 return QLA_FUNCTION_FAILED;
4921 }
4922
4923 int
4924 qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
4925 {
4926 int rval;
4927
4928 if (ql2xfwloadbin == 1)
4929 return qla81xx_load_risc(vha, srisc_addr);
4930
4931 /*
4932 * FW Load priority:
4933 * 1) Firmware via request-firmware interface (.bin file).
4934 * 2) Firmware residing in flash.
4935 */
4936 rval = qla24xx_load_risc_blob(vha, srisc_addr);
4937 if (rval == QLA_SUCCESS)
4938 return rval;
4939
4940 return qla24xx_load_risc_flash(vha, srisc_addr,
4941 vha->hw->flt_region_fw);
4942 }
4943
4944 int
4945 qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
4946 {
4947 int rval;
4948 struct qla_hw_data *ha = vha->hw;
4949
4950 if (ql2xfwloadbin == 2)
4951 goto try_blob_fw;
4952
4953 /*
4954 * FW Load priority:
4955 * 1) Firmware residing in flash.
4956 * 2) Firmware via request-firmware interface (.bin file).
4957 * 3) Golden-Firmware residing in flash -- limited operation.
4958 */
4959 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw);
4960 if (rval == QLA_SUCCESS)
4961 return rval;
4962
4963 try_blob_fw:
4964 rval = qla24xx_load_risc_blob(vha, srisc_addr);
4965 if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw)
4966 return rval;
4967
4968 ql_log(ql_log_info, vha, 0x0099,
4969 "Attempting to fallback to golden firmware.\n");
4970 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw);
4971 if (rval != QLA_SUCCESS)
4972 return rval;
4973
4974 ql_log(ql_log_info, vha, 0x009a, "Update operational firmware.\n");
4975 ha->flags.running_gold_fw = 1;
4976
4977 return rval;
4978 }
4979
4980 void
4981 qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
4982 {
4983 int ret, retries;
4984 struct qla_hw_data *ha = vha->hw;
4985
4986 if (ha->flags.pci_channel_io_perm_failure)
4987 return;
4988 if (!IS_FWI2_CAPABLE(ha))
4989 return;
4990 if (!ha->fw_major_version)
4991 return;
4992
4993 ret = qla2x00_stop_firmware(vha);
4994 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
4995 ret != QLA_INVALID_COMMAND && retries ; retries--) {
4996 ha->isp_ops->reset_chip(vha);
4997 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
4998 continue;
4999 if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
5000 continue;
5001 ql_log(ql_log_info, vha, 0x8015,
5002 "Attempting retry of stop-firmware command.\n");
5003 ret = qla2x00_stop_firmware(vha);
5004 }
5005 }
5006
5007 int
5008 qla24xx_configure_vhba(scsi_qla_host_t *vha)
5009 {
5010 int rval = QLA_SUCCESS;
5011 uint16_t mb[MAILBOX_REGISTER_COUNT];
5012 struct qla_hw_data *ha = vha->hw;
5013 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
5014 struct req_que *req;
5015 struct rsp_que *rsp;
5016
5017 if (!vha->vp_idx)
5018 return -EINVAL;
5019
5020 rval = qla2x00_fw_ready(base_vha);
5021 if (ha->flags.cpu_affinity_enabled)
5022 req = ha->req_q_map[0];
5023 else
5024 req = vha->req;
5025 rsp = req->rsp;
5026
5027 if (rval == QLA_SUCCESS) {
5028 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
5029 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
5030 }
5031
5032 vha->flags.management_server_logged_in = 0;
5033
5034 /* Login to SNS first */
5035 ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, BIT_1);
5036 if (mb[0] != MBS_COMMAND_COMPLETE) {
5037 ql_dbg(ql_dbg_init, vha, 0x0103,
5038 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x "
5039 "mb[6]=%x mb[7]=%x.\n",
5040 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]);
5041 return (QLA_FUNCTION_FAILED);
5042 }
5043
5044 atomic_set(&vha->loop_down_timer, 0);
5045 atomic_set(&vha->loop_state, LOOP_UP);
5046 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5047 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
5048 rval = qla2x00_loop_resync(base_vha);
5049
5050 return rval;
5051 }
5052
5053 /* 84XX Support **************************************************************/
5054
5055 static LIST_HEAD(qla_cs84xx_list);
5056 static DEFINE_MUTEX(qla_cs84xx_mutex);
5057
5058 static struct qla_chip_state_84xx *
5059 qla84xx_get_chip(struct scsi_qla_host *vha)
5060 {
5061 struct qla_chip_state_84xx *cs84xx;
5062 struct qla_hw_data *ha = vha->hw;
5063
5064 mutex_lock(&qla_cs84xx_mutex);
5065
5066 /* Find any shared 84xx chip. */
5067 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
5068 if (cs84xx->bus == ha->pdev->bus) {
5069 kref_get(&cs84xx->kref);
5070 goto done;
5071 }
5072 }
5073
5074 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
5075 if (!cs84xx)
5076 goto done;
5077
5078 kref_init(&cs84xx->kref);
5079 spin_lock_init(&cs84xx->access_lock);
5080 mutex_init(&cs84xx->fw_update_mutex);
5081 cs84xx->bus = ha->pdev->bus;
5082
5083 list_add_tail(&cs84xx->list, &qla_cs84xx_list);
5084 done:
5085 mutex_unlock(&qla_cs84xx_mutex);
5086 return cs84xx;
5087 }
5088
5089 static void
5090 __qla84xx_chip_release(struct kref *kref)
5091 {
5092 struct qla_chip_state_84xx *cs84xx =
5093 container_of(kref, struct qla_chip_state_84xx, kref);
5094
5095 mutex_lock(&qla_cs84xx_mutex);
5096 list_del(&cs84xx->list);
5097 mutex_unlock(&qla_cs84xx_mutex);
5098 kfree(cs84xx);
5099 }
5100
5101 void
5102 qla84xx_put_chip(struct scsi_qla_host *vha)
5103 {
5104 struct qla_hw_data *ha = vha->hw;
5105 if (ha->cs84xx)
5106 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
5107 }
5108
5109 static int
5110 qla84xx_init_chip(scsi_qla_host_t *vha)
5111 {
5112 int rval;
5113 uint16_t status[2];
5114 struct qla_hw_data *ha = vha->hw;
5115
5116 mutex_lock(&ha->cs84xx->fw_update_mutex);
5117
5118 rval = qla84xx_verify_chip(vha, status);
5119
5120 mutex_unlock(&ha->cs84xx->fw_update_mutex);
5121
5122 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED:
5123 QLA_SUCCESS;
5124 }
5125
5126 /* 81XX Support **************************************************************/
5127
5128 int
5129 qla81xx_nvram_config(scsi_qla_host_t *vha)
5130 {
5131 int rval;
5132 struct init_cb_81xx *icb;
5133 struct nvram_81xx *nv;
5134 uint32_t *dptr;
5135 uint8_t *dptr1, *dptr2;
5136 uint32_t chksum;
5137 uint16_t cnt;
5138 struct qla_hw_data *ha = vha->hw;
5139
5140 rval = QLA_SUCCESS;
5141 icb = (struct init_cb_81xx *)ha->init_cb;
5142 nv = ha->nvram;
5143
5144 /* Determine NVRAM starting address. */
5145 ha->nvram_size = sizeof(struct nvram_81xx);
5146 ha->vpd_size = FA_NVRAM_VPD_SIZE;
5147
5148 /* Get VPD data into cache */
5149 ha->vpd = ha->nvram + VPD_OFFSET;
5150 ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2,
5151 ha->vpd_size);
5152
5153 /* Get NVRAM data into cache and calculate checksum. */
5154 ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2,
5155 ha->nvram_size);
5156 dptr = (uint32_t *)nv;
5157 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
5158 chksum += le32_to_cpu(*dptr++);
5159
5160 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111,
5161 "Contents of NVRAM:\n");
5162 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112,
5163 (uint8_t *)nv, ha->nvram_size);
5164
5165 /* Bad NVRAM data, set defaults parameters. */
5166 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
5167 || nv->id[3] != ' ' ||
5168 nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
5169 /* Reset NVRAM data. */
5170 ql_log(ql_log_info, vha, 0x0073,
5171 "Inconisistent NVRAM detected: checksum=0x%x id=%c "
5172 "version=0x%x.\n", chksum, nv->id[0],
5173 le16_to_cpu(nv->nvram_version));
5174 ql_log(ql_log_info, vha, 0x0074,
5175 "Falling back to functioning (yet invalid -- WWPN) "
5176 "defaults.\n");
5177
5178 /*
5179 * Set default initialization control block.
5180 */
5181 memset(nv, 0, ha->nvram_size);
5182 nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
5183 nv->version = __constant_cpu_to_le16(ICB_VERSION);
5184 nv->frame_payload_size = __constant_cpu_to_le16(2048);
5185 nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
5186 nv->exchange_count = __constant_cpu_to_le16(0);
5187 nv->port_name[0] = 0x21;
5188 nv->port_name[1] = 0x00 + ha->port_no;
5189 nv->port_name[2] = 0x00;
5190 nv->port_name[3] = 0xe0;
5191 nv->port_name[4] = 0x8b;
5192 nv->port_name[5] = 0x1c;
5193 nv->port_name[6] = 0x55;
5194 nv->port_name[7] = 0x86;
5195 nv->node_name[0] = 0x20;
5196 nv->node_name[1] = 0x00;
5197 nv->node_name[2] = 0x00;
5198 nv->node_name[3] = 0xe0;
5199 nv->node_name[4] = 0x8b;
5200 nv->node_name[5] = 0x1c;
5201 nv->node_name[6] = 0x55;
5202 nv->node_name[7] = 0x86;
5203 nv->login_retry_count = __constant_cpu_to_le16(8);
5204 nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
5205 nv->login_timeout = __constant_cpu_to_le16(0);
5206 nv->firmware_options_1 =
5207 __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
5208 nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
5209 nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
5210 nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
5211 nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
5212 nv->efi_parameters = __constant_cpu_to_le32(0);
5213 nv->reset_delay = 5;
5214 nv->max_luns_per_target = __constant_cpu_to_le16(128);
5215 nv->port_down_retry_count = __constant_cpu_to_le16(30);
5216 nv->link_down_timeout = __constant_cpu_to_le16(30);
5217 nv->enode_mac[0] = 0x00;
5218 nv->enode_mac[1] = 0x02;
5219 nv->enode_mac[2] = 0x03;
5220 nv->enode_mac[3] = 0x04;
5221 nv->enode_mac[4] = 0x05;
5222 nv->enode_mac[5] = 0x06 + ha->port_no;
5223
5224 rval = 1;
5225 }
5226
5227 /* Reset Initialization control block */
5228 memset(icb, 0, ha->init_cb_size);
5229
5230 /* Copy 1st segment. */
5231 dptr1 = (uint8_t *)icb;
5232 dptr2 = (uint8_t *)&nv->version;
5233 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
5234 while (cnt--)
5235 *dptr1++ = *dptr2++;
5236
5237 icb->login_retry_count = nv->login_retry_count;
5238
5239 /* Copy 2nd segment. */
5240 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
5241 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
5242 cnt = (uint8_t *)&icb->reserved_5 -
5243 (uint8_t *)&icb->interrupt_delay_timer;
5244 while (cnt--)
5245 *dptr1++ = *dptr2++;
5246
5247 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
5248 /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
5249 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
5250 icb->enode_mac[0] = 0x01;
5251 icb->enode_mac[1] = 0x02;
5252 icb->enode_mac[2] = 0x03;
5253 icb->enode_mac[3] = 0x04;
5254 icb->enode_mac[4] = 0x05;
5255 icb->enode_mac[5] = 0x06 + ha->port_no;
5256 }
5257
5258 /* Use extended-initialization control block. */
5259 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
5260
5261 /*
5262 * Setup driver NVRAM options.
5263 */
5264 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
5265 "QLE8XXX");
5266
5267 /* Use alternate WWN? */
5268 if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
5269 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
5270 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
5271 }
5272
5273 /* Prepare nodename */
5274 if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
5275 /*
5276 * Firmware will apply the following mask if the nodename was
5277 * not provided.
5278 */
5279 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
5280 icb->node_name[0] &= 0xF0;
5281 }
5282
5283 /* Set host adapter parameters. */
5284 ha->flags.disable_risc_code_load = 0;
5285 ha->flags.enable_lip_reset = 0;
5286 ha->flags.enable_lip_full_login =
5287 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
5288 ha->flags.enable_target_reset =
5289 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
5290 ha->flags.enable_led_scheme = 0;
5291 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
5292
5293 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
5294 (BIT_6 | BIT_5 | BIT_4)) >> 4;
5295
5296 /* save HBA serial number */
5297 ha->serial0 = icb->port_name[5];
5298 ha->serial1 = icb->port_name[6];
5299 ha->serial2 = icb->port_name[7];
5300 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
5301 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
5302
5303 icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
5304
5305 ha->retry_count = le16_to_cpu(nv->login_retry_count);
5306
5307 /* Set minimum login_timeout to 4 seconds. */
5308 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
5309 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
5310 if (le16_to_cpu(nv->login_timeout) < 4)
5311 nv->login_timeout = __constant_cpu_to_le16(4);
5312 ha->login_timeout = le16_to_cpu(nv->login_timeout);
5313 icb->login_timeout = nv->login_timeout;
5314
5315 /* Set minimum RATOV to 100 tenths of a second. */
5316 ha->r_a_tov = 100;
5317
5318 ha->loop_reset_delay = nv->reset_delay;
5319
5320 /* Link Down Timeout = 0:
5321 *
5322 * When Port Down timer expires we will start returning
5323 * I/O's to OS with "DID_NO_CONNECT".
5324 *
5325 * Link Down Timeout != 0:
5326 *
5327 * The driver waits for the link to come up after link down
5328 * before returning I/Os to OS with "DID_NO_CONNECT".
5329 */
5330 if (le16_to_cpu(nv->link_down_timeout) == 0) {
5331 ha->loop_down_abort_time =
5332 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
5333 } else {
5334 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
5335 ha->loop_down_abort_time =
5336 (LOOP_DOWN_TIME - ha->link_down_timeout);
5337 }
5338
5339 /* Need enough time to try and get the port back. */
5340 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
5341 if (qlport_down_retry)
5342 ha->port_down_retry_count = qlport_down_retry;
5343
5344 /* Set login_retry_count */
5345 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
5346 if (ha->port_down_retry_count ==
5347 le16_to_cpu(nv->port_down_retry_count) &&
5348 ha->port_down_retry_count > 3)
5349 ha->login_retry_count = ha->port_down_retry_count;
5350 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
5351 ha->login_retry_count = ha->port_down_retry_count;
5352 if (ql2xloginretrycount)
5353 ha->login_retry_count = ql2xloginretrycount;
5354
5355 /* Enable ZIO. */
5356 if (!vha->flags.init_done) {
5357 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
5358 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
5359 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
5360 le16_to_cpu(icb->interrupt_delay_timer): 2;
5361 }
5362 icb->firmware_options_2 &= __constant_cpu_to_le32(
5363 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
5364 vha->flags.process_response_queue = 0;
5365 if (ha->zio_mode != QLA_ZIO_DISABLED) {
5366 ha->zio_mode = QLA_ZIO_MODE_6;
5367
5368 ql_log(ql_log_info, vha, 0x0075,
5369 "ZIO mode %d enabled; timer delay (%d us).\n",
5370 ha->zio_mode,
5371 ha->zio_timer * 100);
5372
5373 icb->firmware_options_2 |= cpu_to_le32(
5374 (uint32_t)ha->zio_mode);
5375 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
5376 vha->flags.process_response_queue = 1;
5377 }
5378
5379 if (rval) {
5380 ql_log(ql_log_warn, vha, 0x0076,
5381 "NVRAM configuration failed.\n");
5382 }
5383 return (rval);
5384 }
5385
5386 int
5387 qla82xx_restart_isp(scsi_qla_host_t *vha)
5388 {
5389 int status, rval;
5390 uint32_t wait_time;
5391 struct qla_hw_data *ha = vha->hw;
5392 struct req_que *req = ha->req_q_map[0];
5393 struct rsp_que *rsp = ha->rsp_q_map[0];
5394 struct scsi_qla_host *vp;
5395 unsigned long flags;
5396
5397 status = qla2x00_init_rings(vha);
5398 if (!status) {
5399 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
5400 ha->flags.chip_reset_done = 1;
5401
5402 status = qla2x00_fw_ready(vha);
5403 if (!status) {
5404 ql_log(ql_log_info, vha, 0x803c,
5405 "Start configure loop, status =%d.\n", status);
5406
5407 /* Issue a marker after FW becomes ready. */
5408 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
5409
5410 vha->flags.online = 1;
5411 /* Wait at most MAX_TARGET RSCNs for a stable link. */
5412 wait_time = 256;
5413 do {
5414 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5415 qla2x00_configure_loop(vha);
5416 wait_time--;
5417 } while (!atomic_read(&vha->loop_down_timer) &&
5418 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) &&
5419 wait_time &&
5420 (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)));
5421 }
5422
5423 /* if no cable then assume it's good */
5424 if ((vha->device_flags & DFLG_NO_CABLE))
5425 status = 0;
5426
5427 ql_log(ql_log_info, vha, 0x8000,
5428 "Configure loop done, status = 0x%x.\n", status);
5429 }
5430
5431 if (!status) {
5432 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
5433
5434 if (!atomic_read(&vha->loop_down_timer)) {
5435 /*
5436 * Issue marker command only when we are going
5437 * to start the I/O .
5438 */
5439 vha->marker_needed = 1;
5440 }
5441
5442 vha->flags.online = 1;
5443
5444 ha->isp_ops->enable_intrs(ha);
5445
5446 ha->isp_abort_cnt = 0;
5447 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
5448
5449 /* Update the firmware version */
5450 status = qla82xx_check_md_needed(vha);
5451
5452 if (ha->fce) {
5453 ha->flags.fce_enabled = 1;
5454 memset(ha->fce, 0,
5455 fce_calc_size(ha->fce_bufs));
5456 rval = qla2x00_enable_fce_trace(vha,
5457 ha->fce_dma, ha->fce_bufs, ha->fce_mb,
5458 &ha->fce_bufs);
5459 if (rval) {
5460 ql_log(ql_log_warn, vha, 0x8001,
5461 "Unable to reinitialize FCE (%d).\n",
5462 rval);
5463 ha->flags.fce_enabled = 0;
5464 }
5465 }
5466
5467 if (ha->eft) {
5468 memset(ha->eft, 0, EFT_SIZE);
5469 rval = qla2x00_enable_eft_trace(vha,
5470 ha->eft_dma, EFT_NUM_BUFFERS);
5471 if (rval) {
5472 ql_log(ql_log_warn, vha, 0x8010,
5473 "Unable to reinitialize EFT (%d).\n",
5474 rval);
5475 }
5476 }
5477 }
5478
5479 if (!status) {
5480 ql_dbg(ql_dbg_taskm, vha, 0x8011,
5481 "qla82xx_restart_isp succeeded.\n");
5482
5483 spin_lock_irqsave(&ha->vport_slock, flags);
5484 list_for_each_entry(vp, &ha->vp_list, list) {
5485 if (vp->vp_idx) {
5486 atomic_inc(&vp->vref_count);
5487 spin_unlock_irqrestore(&ha->vport_slock, flags);
5488
5489 qla2x00_vp_abort_isp(vp);
5490
5491 spin_lock_irqsave(&ha->vport_slock, flags);
5492 atomic_dec(&vp->vref_count);
5493 }
5494 }
5495 spin_unlock_irqrestore(&ha->vport_slock, flags);
5496
5497 } else {
5498 ql_log(ql_log_warn, vha, 0x8016,
5499 "qla82xx_restart_isp **** FAILED ****.\n");
5500 }
5501
5502 return status;
5503 }
5504
5505 void
5506 qla81xx_update_fw_options(scsi_qla_host_t *vha)
5507 {
5508 struct qla_hw_data *ha = vha->hw;
5509
5510 if (!ql2xetsenable)
5511 return;
5512
5513 /* Enable ETS Burst. */
5514 memset(ha->fw_options, 0, sizeof(ha->fw_options));
5515 ha->fw_options[2] |= BIT_9;
5516 qla2x00_set_fw_options(vha, ha->fw_options);
5517 }
5518
5519 /*
5520 * qla24xx_get_fcp_prio
5521 * Gets the fcp cmd priority value for the logged in port.
5522 * Looks for a match of the port descriptors within
5523 * each of the fcp prio config entries. If a match is found,
5524 * the tag (priority) value is returned.
5525 *
5526 * Input:
5527 * vha = scsi host structure pointer.
5528 * fcport = port structure pointer.
5529 *
5530 * Return:
5531 * non-zero (if found)
5532 * -1 (if not found)
5533 *
5534 * Context:
5535 * Kernel context
5536 */
5537 static int
5538 qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
5539 {
5540 int i, entries;
5541 uint8_t pid_match, wwn_match;
5542 int priority;
5543 uint32_t pid1, pid2;
5544 uint64_t wwn1, wwn2;
5545 struct qla_fcp_prio_entry *pri_entry;
5546 struct qla_hw_data *ha = vha->hw;
5547
5548 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled)
5549 return -1;
5550
5551 priority = -1;
5552 entries = ha->fcp_prio_cfg->num_entries;
5553 pri_entry = &ha->fcp_prio_cfg->entry[0];
5554
5555 for (i = 0; i < entries; i++) {
5556 pid_match = wwn_match = 0;
5557
5558 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) {
5559 pri_entry++;
5560 continue;
5561 }
5562
5563 /* check source pid for a match */
5564 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) {
5565 pid1 = pri_entry->src_pid & INVALID_PORT_ID;
5566 pid2 = vha->d_id.b24 & INVALID_PORT_ID;
5567 if (pid1 == INVALID_PORT_ID)
5568 pid_match++;
5569 else if (pid1 == pid2)
5570 pid_match++;
5571 }
5572
5573 /* check destination pid for a match */
5574 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) {
5575 pid1 = pri_entry->dst_pid & INVALID_PORT_ID;
5576 pid2 = fcport->d_id.b24 & INVALID_PORT_ID;
5577 if (pid1 == INVALID_PORT_ID)
5578 pid_match++;
5579 else if (pid1 == pid2)
5580 pid_match++;
5581 }
5582
5583 /* check source WWN for a match */
5584 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) {
5585 wwn1 = wwn_to_u64(vha->port_name);
5586 wwn2 = wwn_to_u64(pri_entry->src_wwpn);
5587 if (wwn2 == (uint64_t)-1)
5588 wwn_match++;
5589 else if (wwn1 == wwn2)
5590 wwn_match++;
5591 }
5592
5593 /* check destination WWN for a match */
5594 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) {
5595 wwn1 = wwn_to_u64(fcport->port_name);
5596 wwn2 = wwn_to_u64(pri_entry->dst_wwpn);
5597 if (wwn2 == (uint64_t)-1)
5598 wwn_match++;
5599 else if (wwn1 == wwn2)
5600 wwn_match++;
5601 }
5602
5603 if (pid_match == 2 || wwn_match == 2) {
5604 /* Found a matching entry */
5605 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID)
5606 priority = pri_entry->tag;
5607 break;
5608 }
5609
5610 pri_entry++;
5611 }
5612
5613 return priority;
5614 }
5615
5616 /*
5617 * qla24xx_update_fcport_fcp_prio
5618 * Activates fcp priority for the logged in fc port
5619 *
5620 * Input:
5621 * vha = scsi host structure pointer.
5622 * fcp = port structure pointer.
5623 *
5624 * Return:
5625 * QLA_SUCCESS or QLA_FUNCTION_FAILED
5626 *
5627 * Context:
5628 * Kernel context.
5629 */
5630 int
5631 qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
5632 {
5633 int ret;
5634 int priority;
5635 uint16_t mb[5];
5636
5637 if (fcport->port_type != FCT_TARGET ||
5638 fcport->loop_id == FC_NO_LOOP_ID)
5639 return QLA_FUNCTION_FAILED;
5640
5641 priority = qla24xx_get_fcp_prio(vha, fcport);
5642 if (priority < 0)
5643 return QLA_FUNCTION_FAILED;
5644
5645 if (IS_QLA82XX(vha->hw)) {
5646 fcport->fcp_prio = priority & 0xf;
5647 return QLA_SUCCESS;
5648 }
5649
5650 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb);
5651 if (ret == QLA_SUCCESS) {
5652 if (fcport->fcp_prio != priority)
5653 ql_dbg(ql_dbg_user, vha, 0x709e,
5654 "Updated FCP_CMND priority - value=%d loop_id=%d "
5655 "port_id=%02x%02x%02x.\n", priority,
5656 fcport->loop_id, fcport->d_id.b.domain,
5657 fcport->d_id.b.area, fcport->d_id.b.al_pa);
5658 fcport->fcp_prio = priority & 0xf;
5659 } else
5660 ql_dbg(ql_dbg_user, vha, 0x704f,
5661 "Unable to update FCP_CMND priority - ret=0x%x for "
5662 "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id,
5663 fcport->d_id.b.domain, fcport->d_id.b.area,
5664 fcport->d_id.b.al_pa);
5665 return ret;
5666 }
5667
5668 /*
5669 * qla24xx_update_all_fcp_prio
5670 * Activates fcp priority for all the logged in ports
5671 *
5672 * Input:
5673 * ha = adapter block pointer.
5674 *
5675 * Return:
5676 * QLA_SUCCESS or QLA_FUNCTION_FAILED
5677 *
5678 * Context:
5679 * Kernel context.
5680 */
5681 int
5682 qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha)
5683 {
5684 int ret;
5685 fc_port_t *fcport;
5686
5687 ret = QLA_FUNCTION_FAILED;
5688 /* We need to set priority for all logged in ports */
5689 list_for_each_entry(fcport, &vha->vp_fcports, list)
5690 ret = qla24xx_update_fcport_fcp_prio(vha, fcport);
5691
5692 return ret;
5693 }
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