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7464a4731ef617c973d9fd04707f33ed83087c53
[deliverable/linux.git] / drivers / scsi / qla2xxx / qla_init.c
1 /*
2 * QLogic Fibre Channel HBA Driver
3 * Copyright (c) 2003-2012 QLogic Corporation
4 *
5 * See LICENSE.qla2xxx for copyright and licensing details.
6 */
7 #include "qla_def.h"
8 #include "qla_gbl.h"
9
10 #include <linux/delay.h>
11 #include <linux/slab.h>
12 #include <linux/vmalloc.h>
13
14 #include "qla_devtbl.h"
15
16 #ifdef CONFIG_SPARC
17 #include <asm/prom.h>
18 #endif
19
20 #include <target/target_core_base.h>
21 #include "qla_target.h"
22
23 /*
24 * QLogic ISP2x00 Hardware Support Function Prototypes.
25 */
26 static int qla2x00_isp_firmware(scsi_qla_host_t *);
27 static int qla2x00_setup_chip(scsi_qla_host_t *);
28 static int qla2x00_init_rings(scsi_qla_host_t *);
29 static int qla2x00_fw_ready(scsi_qla_host_t *);
30 static int qla2x00_configure_hba(scsi_qla_host_t *);
31 static int qla2x00_configure_loop(scsi_qla_host_t *);
32 static int qla2x00_configure_local_loop(scsi_qla_host_t *);
33 static int qla2x00_configure_fabric(scsi_qla_host_t *);
34 static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *);
35 static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *,
36 uint16_t *);
37
38 static int qla2x00_restart_isp(scsi_qla_host_t *);
39
40 static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
41 static int qla84xx_init_chip(scsi_qla_host_t *);
42 static int qla25xx_init_queues(struct qla_hw_data *);
43
44 /* SRB Extensions ---------------------------------------------------------- */
45
46 void
47 qla2x00_sp_timeout(unsigned long __data)
48 {
49 srb_t *sp = (srb_t *)__data;
50 struct srb_iocb *iocb;
51 fc_port_t *fcport = sp->fcport;
52 struct qla_hw_data *ha = fcport->vha->hw;
53 struct req_que *req;
54 unsigned long flags;
55
56 spin_lock_irqsave(&ha->hardware_lock, flags);
57 req = ha->req_q_map[0];
58 req->outstanding_cmds[sp->handle] = NULL;
59 iocb = &sp->u.iocb_cmd;
60 iocb->timeout(sp);
61 sp->free(fcport->vha, sp);
62 spin_unlock_irqrestore(&ha->hardware_lock, flags);
63 }
64
65 void
66 qla2x00_sp_free(void *data, void *ptr)
67 {
68 srb_t *sp = (srb_t *)ptr;
69 struct srb_iocb *iocb = &sp->u.iocb_cmd;
70 struct scsi_qla_host *vha = (scsi_qla_host_t *)data;
71
72 del_timer(&iocb->timer);
73 mempool_free(sp, vha->hw->srb_mempool);
74
75 QLA_VHA_MARK_NOT_BUSY(vha);
76 }
77
78 /* Asynchronous Login/Logout Routines -------------------------------------- */
79
80 unsigned long
81 qla2x00_get_async_timeout(struct scsi_qla_host *vha)
82 {
83 unsigned long tmo;
84 struct qla_hw_data *ha = vha->hw;
85
86 /* Firmware should use switch negotiated r_a_tov for timeout. */
87 tmo = ha->r_a_tov / 10 * 2;
88 if (!IS_FWI2_CAPABLE(ha)) {
89 /*
90 * Except for earlier ISPs where the timeout is seeded from the
91 * initialization control block.
92 */
93 tmo = ha->login_timeout;
94 }
95 return tmo;
96 }
97
98 static void
99 qla2x00_async_iocb_timeout(void *data)
100 {
101 srb_t *sp = (srb_t *)data;
102 fc_port_t *fcport = sp->fcport;
103
104 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071,
105 "Async-%s timeout - hdl=%x portid=%02x%02x%02x.\n",
106 sp->name, sp->handle, fcport->d_id.b.domain, fcport->d_id.b.area,
107 fcport->d_id.b.al_pa);
108
109 fcport->flags &= ~FCF_ASYNC_SENT;
110 if (sp->type == SRB_LOGIN_CMD) {
111 struct srb_iocb *lio = &sp->u.iocb_cmd;
112 qla2x00_post_async_logout_work(fcport->vha, fcport, NULL);
113 /* Retry as needed. */
114 lio->u.logio.data[0] = MBS_COMMAND_ERROR;
115 lio->u.logio.data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
116 QLA_LOGIO_LOGIN_RETRIED : 0;
117 qla2x00_post_async_login_done_work(fcport->vha, fcport,
118 lio->u.logio.data);
119 }
120 }
121
122 static void
123 qla2x00_async_login_sp_done(void *data, void *ptr, int res)
124 {
125 srb_t *sp = (srb_t *)ptr;
126 struct srb_iocb *lio = &sp->u.iocb_cmd;
127 struct scsi_qla_host *vha = (scsi_qla_host_t *)data;
128
129 if (!test_bit(UNLOADING, &vha->dpc_flags))
130 qla2x00_post_async_login_done_work(sp->fcport->vha, sp->fcport,
131 lio->u.logio.data);
132 sp->free(sp->fcport->vha, sp);
133 }
134
135 int
136 qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport,
137 uint16_t *data)
138 {
139 srb_t *sp;
140 struct srb_iocb *lio;
141 int rval;
142
143 rval = QLA_FUNCTION_FAILED;
144 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
145 if (!sp)
146 goto done;
147
148 sp->type = SRB_LOGIN_CMD;
149 sp->name = "login";
150 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
151
152 lio = &sp->u.iocb_cmd;
153 lio->timeout = qla2x00_async_iocb_timeout;
154 sp->done = qla2x00_async_login_sp_done;
155 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI;
156 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
157 lio->u.logio.flags |= SRB_LOGIN_RETRIED;
158 rval = qla2x00_start_sp(sp);
159 if (rval != QLA_SUCCESS)
160 goto done_free_sp;
161
162 ql_dbg(ql_dbg_disc, vha, 0x2072,
163 "Async-login - hdl=%x, loopid=%x portid=%02x%02x%02x "
164 "retries=%d.\n", sp->handle, fcport->loop_id,
165 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
166 fcport->login_retry);
167 return rval;
168
169 done_free_sp:
170 sp->free(fcport->vha, sp);
171 done:
172 return rval;
173 }
174
175 static void
176 qla2x00_async_logout_sp_done(void *data, void *ptr, int res)
177 {
178 srb_t *sp = (srb_t *)ptr;
179 struct srb_iocb *lio = &sp->u.iocb_cmd;
180 struct scsi_qla_host *vha = (scsi_qla_host_t *)data;
181
182 if (!test_bit(UNLOADING, &vha->dpc_flags))
183 qla2x00_post_async_logout_done_work(sp->fcport->vha, sp->fcport,
184 lio->u.logio.data);
185 sp->free(sp->fcport->vha, sp);
186 }
187
188 int
189 qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport)
190 {
191 srb_t *sp;
192 struct srb_iocb *lio;
193 int rval;
194
195 rval = QLA_FUNCTION_FAILED;
196 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
197 if (!sp)
198 goto done;
199
200 sp->type = SRB_LOGOUT_CMD;
201 sp->name = "logout";
202 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
203
204 lio = &sp->u.iocb_cmd;
205 lio->timeout = qla2x00_async_iocb_timeout;
206 sp->done = qla2x00_async_logout_sp_done;
207 rval = qla2x00_start_sp(sp);
208 if (rval != QLA_SUCCESS)
209 goto done_free_sp;
210
211 ql_dbg(ql_dbg_disc, vha, 0x2070,
212 "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
213 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
214 fcport->d_id.b.area, fcport->d_id.b.al_pa);
215 return rval;
216
217 done_free_sp:
218 sp->free(fcport->vha, sp);
219 done:
220 return rval;
221 }
222
223 static void
224 qla2x00_async_adisc_sp_done(void *data, void *ptr, int res)
225 {
226 srb_t *sp = (srb_t *)ptr;
227 struct srb_iocb *lio = &sp->u.iocb_cmd;
228 struct scsi_qla_host *vha = (scsi_qla_host_t *)data;
229
230 if (!test_bit(UNLOADING, &vha->dpc_flags))
231 qla2x00_post_async_adisc_done_work(sp->fcport->vha, sp->fcport,
232 lio->u.logio.data);
233 sp->free(sp->fcport->vha, sp);
234 }
235
236 int
237 qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport,
238 uint16_t *data)
239 {
240 srb_t *sp;
241 struct srb_iocb *lio;
242 int rval;
243
244 rval = QLA_FUNCTION_FAILED;
245 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
246 if (!sp)
247 goto done;
248
249 sp->type = SRB_ADISC_CMD;
250 sp->name = "adisc";
251 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
252
253 lio = &sp->u.iocb_cmd;
254 lio->timeout = qla2x00_async_iocb_timeout;
255 sp->done = qla2x00_async_adisc_sp_done;
256 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
257 lio->u.logio.flags |= SRB_LOGIN_RETRIED;
258 rval = qla2x00_start_sp(sp);
259 if (rval != QLA_SUCCESS)
260 goto done_free_sp;
261
262 ql_dbg(ql_dbg_disc, vha, 0x206f,
263 "Async-adisc - hdl=%x loopid=%x portid=%02x%02x%02x.\n",
264 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
265 fcport->d_id.b.area, fcport->d_id.b.al_pa);
266 return rval;
267
268 done_free_sp:
269 sp->free(fcport->vha, sp);
270 done:
271 return rval;
272 }
273
274 static void
275 qla2x00_async_tm_cmd_done(void *data, void *ptr, int res)
276 {
277 srb_t *sp = (srb_t *)ptr;
278 struct srb_iocb *iocb = &sp->u.iocb_cmd;
279 struct scsi_qla_host *vha = (scsi_qla_host_t *)data;
280 uint32_t flags;
281 uint16_t lun;
282 int rval;
283
284 if (!test_bit(UNLOADING, &vha->dpc_flags)) {
285 flags = iocb->u.tmf.flags;
286 lun = (uint16_t)iocb->u.tmf.lun;
287
288 /* Issue Marker IOCB */
289 rval = qla2x00_marker(vha, vha->hw->req_q_map[0],
290 vha->hw->rsp_q_map[0], sp->fcport->loop_id, lun,
291 flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID);
292
293 if ((rval != QLA_SUCCESS) || iocb->u.tmf.data) {
294 ql_dbg(ql_dbg_taskm, vha, 0x8030,
295 "TM IOCB failed (%x).\n", rval);
296 }
297 }
298 sp->free(sp->fcport->vha, sp);
299 }
300
301 int
302 qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t tm_flags, uint32_t lun,
303 uint32_t tag)
304 {
305 struct scsi_qla_host *vha = fcport->vha;
306 srb_t *sp;
307 struct srb_iocb *tcf;
308 int rval;
309
310 rval = QLA_FUNCTION_FAILED;
311 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
312 if (!sp)
313 goto done;
314
315 sp->type = SRB_TM_CMD;
316 sp->name = "tmf";
317 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
318
319 tcf = &sp->u.iocb_cmd;
320 tcf->u.tmf.flags = tm_flags;
321 tcf->u.tmf.lun = lun;
322 tcf->u.tmf.data = tag;
323 tcf->timeout = qla2x00_async_iocb_timeout;
324 sp->done = qla2x00_async_tm_cmd_done;
325
326 rval = qla2x00_start_sp(sp);
327 if (rval != QLA_SUCCESS)
328 goto done_free_sp;
329
330 ql_dbg(ql_dbg_taskm, vha, 0x802f,
331 "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
332 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
333 fcport->d_id.b.area, fcport->d_id.b.al_pa);
334 return rval;
335
336 done_free_sp:
337 sp->free(fcport->vha, sp);
338 done:
339 return rval;
340 }
341
342 void
343 qla2x00_async_login_done(struct scsi_qla_host *vha, fc_port_t *fcport,
344 uint16_t *data)
345 {
346 int rval;
347
348 switch (data[0]) {
349 case MBS_COMMAND_COMPLETE:
350 /*
351 * Driver must validate login state - If PRLI not complete,
352 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI
353 * requests.
354 */
355 rval = qla2x00_get_port_database(vha, fcport, 0);
356 if (rval == QLA_NOT_LOGGED_IN) {
357 fcport->flags &= ~FCF_ASYNC_SENT;
358 fcport->flags |= FCF_LOGIN_NEEDED;
359 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
360 break;
361 }
362
363 if (rval != QLA_SUCCESS) {
364 qla2x00_post_async_logout_work(vha, fcport, NULL);
365 qla2x00_post_async_login_work(vha, fcport, NULL);
366 break;
367 }
368 if (fcport->flags & FCF_FCP2_DEVICE) {
369 qla2x00_post_async_adisc_work(vha, fcport, data);
370 break;
371 }
372 qla2x00_update_fcport(vha, fcport);
373 break;
374 case MBS_COMMAND_ERROR:
375 fcport->flags &= ~FCF_ASYNC_SENT;
376 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
377 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
378 else
379 qla2x00_mark_device_lost(vha, fcport, 1, 0);
380 break;
381 case MBS_PORT_ID_USED:
382 fcport->loop_id = data[1];
383 qla2x00_post_async_logout_work(vha, fcport, NULL);
384 qla2x00_post_async_login_work(vha, fcport, NULL);
385 break;
386 case MBS_LOOP_ID_USED:
387 fcport->loop_id++;
388 rval = qla2x00_find_new_loop_id(vha, fcport);
389 if (rval != QLA_SUCCESS) {
390 fcport->flags &= ~FCF_ASYNC_SENT;
391 qla2x00_mark_device_lost(vha, fcport, 1, 0);
392 break;
393 }
394 qla2x00_post_async_login_work(vha, fcport, NULL);
395 break;
396 }
397 return;
398 }
399
400 void
401 qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport,
402 uint16_t *data)
403 {
404 qla2x00_mark_device_lost(vha, fcport, 1, 0);
405 return;
406 }
407
408 void
409 qla2x00_async_adisc_done(struct scsi_qla_host *vha, fc_port_t *fcport,
410 uint16_t *data)
411 {
412 if (data[0] == MBS_COMMAND_COMPLETE) {
413 qla2x00_update_fcport(vha, fcport);
414
415 return;
416 }
417
418 /* Retry login. */
419 fcport->flags &= ~FCF_ASYNC_SENT;
420 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
421 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
422 else
423 qla2x00_mark_device_lost(vha, fcport, 1, 0);
424
425 return;
426 }
427
428 /****************************************************************************/
429 /* QLogic ISP2x00 Hardware Support Functions. */
430 /****************************************************************************/
431
432 static int
433 qla83xx_nic_core_fw_load(scsi_qla_host_t *vha)
434 {
435 int rval = QLA_SUCCESS;
436 struct qla_hw_data *ha = vha->hw;
437 uint32_t idc_major_ver, idc_minor_ver;
438 uint16_t config[4];
439
440 qla83xx_idc_lock(vha, 0);
441
442 /* SV: TODO: Assign initialization timeout from
443 * flash-info / other param
444 */
445 ha->fcoe_dev_init_timeout = QLA83XX_IDC_INITIALIZATION_TIMEOUT;
446 ha->fcoe_reset_timeout = QLA83XX_IDC_RESET_ACK_TIMEOUT;
447
448 /* Set our fcoe function presence */
449 if (__qla83xx_set_drv_presence(vha) != QLA_SUCCESS) {
450 ql_dbg(ql_dbg_p3p, vha, 0xb077,
451 "Error while setting DRV-Presence.\n");
452 rval = QLA_FUNCTION_FAILED;
453 goto exit;
454 }
455
456 /* Decide the reset ownership */
457 qla83xx_reset_ownership(vha);
458
459 /*
460 * On first protocol driver load:
461 * Init-Owner: Set IDC-Major-Version and Clear IDC-Lock-Recovery
462 * register.
463 * Others: Check compatibility with current IDC Major version.
464 */
465 qla83xx_rd_reg(vha, QLA83XX_IDC_MAJOR_VERSION, &idc_major_ver);
466 if (ha->flags.nic_core_reset_owner) {
467 /* Set IDC Major version */
468 idc_major_ver = QLA83XX_SUPP_IDC_MAJOR_VERSION;
469 qla83xx_wr_reg(vha, QLA83XX_IDC_MAJOR_VERSION, idc_major_ver);
470
471 /* Clearing IDC-Lock-Recovery register */
472 qla83xx_wr_reg(vha, QLA83XX_IDC_LOCK_RECOVERY, 0);
473 } else if (idc_major_ver != QLA83XX_SUPP_IDC_MAJOR_VERSION) {
474 /*
475 * Clear further IDC participation if we are not compatible with
476 * the current IDC Major Version.
477 */
478 ql_log(ql_log_warn, vha, 0xb07d,
479 "Failing load, idc_major_ver=%d, expected_major_ver=%d.\n",
480 idc_major_ver, QLA83XX_SUPP_IDC_MAJOR_VERSION);
481 __qla83xx_clear_drv_presence(vha);
482 rval = QLA_FUNCTION_FAILED;
483 goto exit;
484 }
485 /* Each function sets its supported Minor version. */
486 qla83xx_rd_reg(vha, QLA83XX_IDC_MINOR_VERSION, &idc_minor_ver);
487 idc_minor_ver |= (QLA83XX_SUPP_IDC_MINOR_VERSION << (ha->portnum * 2));
488 qla83xx_wr_reg(vha, QLA83XX_IDC_MINOR_VERSION, idc_minor_ver);
489
490 if (ha->flags.nic_core_reset_owner) {
491 memset(config, 0, sizeof(config));
492 if (!qla81xx_get_port_config(vha, config))
493 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
494 QLA8XXX_DEV_READY);
495 }
496
497 rval = qla83xx_idc_state_handler(vha);
498
499 exit:
500 qla83xx_idc_unlock(vha, 0);
501
502 return rval;
503 }
504
505 /*
506 * qla2x00_initialize_adapter
507 * Initialize board.
508 *
509 * Input:
510 * ha = adapter block pointer.
511 *
512 * Returns:
513 * 0 = success
514 */
515 int
516 qla2x00_initialize_adapter(scsi_qla_host_t *vha)
517 {
518 int rval;
519 struct qla_hw_data *ha = vha->hw;
520 struct req_que *req = ha->req_q_map[0];
521
522 /* Clear adapter flags. */
523 vha->flags.online = 0;
524 ha->flags.chip_reset_done = 0;
525 vha->flags.reset_active = 0;
526 ha->flags.pci_channel_io_perm_failure = 0;
527 ha->flags.eeh_busy = 0;
528 ha->flags.thermal_supported = 1;
529 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
530 atomic_set(&vha->loop_state, LOOP_DOWN);
531 vha->device_flags = DFLG_NO_CABLE;
532 vha->dpc_flags = 0;
533 vha->flags.management_server_logged_in = 0;
534 vha->marker_needed = 0;
535 ha->isp_abort_cnt = 0;
536 ha->beacon_blink_led = 0;
537
538 set_bit(0, ha->req_qid_map);
539 set_bit(0, ha->rsp_qid_map);
540
541 ql_dbg(ql_dbg_init, vha, 0x0040,
542 "Configuring PCI space...\n");
543 rval = ha->isp_ops->pci_config(vha);
544 if (rval) {
545 ql_log(ql_log_warn, vha, 0x0044,
546 "Unable to configure PCI space.\n");
547 return (rval);
548 }
549
550 ha->isp_ops->reset_chip(vha);
551
552 rval = qla2xxx_get_flash_info(vha);
553 if (rval) {
554 ql_log(ql_log_fatal, vha, 0x004f,
555 "Unable to validate FLASH data.\n");
556 return (rval);
557 }
558
559 ha->isp_ops->get_flash_version(vha, req->ring);
560 ql_dbg(ql_dbg_init, vha, 0x0061,
561 "Configure NVRAM parameters...\n");
562
563 ha->isp_ops->nvram_config(vha);
564
565 if (ha->flags.disable_serdes) {
566 /* Mask HBA via NVRAM settings? */
567 ql_log(ql_log_info, vha, 0x0077,
568 "Masking HBA WWPN "
569 "%02x%02x%02x%02x%02x%02x%02x%02x (via NVRAM).\n",
570 vha->port_name[0], vha->port_name[1],
571 vha->port_name[2], vha->port_name[3],
572 vha->port_name[4], vha->port_name[5],
573 vha->port_name[6], vha->port_name[7]);
574 return QLA_FUNCTION_FAILED;
575 }
576
577 ql_dbg(ql_dbg_init, vha, 0x0078,
578 "Verifying loaded RISC code...\n");
579
580 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
581 rval = ha->isp_ops->chip_diag(vha);
582 if (rval)
583 return (rval);
584 rval = qla2x00_setup_chip(vha);
585 if (rval)
586 return (rval);
587 }
588
589 if (IS_QLA84XX(ha)) {
590 ha->cs84xx = qla84xx_get_chip(vha);
591 if (!ha->cs84xx) {
592 ql_log(ql_log_warn, vha, 0x00d0,
593 "Unable to configure ISP84XX.\n");
594 return QLA_FUNCTION_FAILED;
595 }
596 }
597
598 if (qla_ini_mode_enabled(vha))
599 rval = qla2x00_init_rings(vha);
600
601 ha->flags.chip_reset_done = 1;
602
603 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) {
604 /* Issue verify 84xx FW IOCB to complete 84xx initialization */
605 rval = qla84xx_init_chip(vha);
606 if (rval != QLA_SUCCESS) {
607 ql_log(ql_log_warn, vha, 0x00d4,
608 "Unable to initialize ISP84XX.\n");
609 qla84xx_put_chip(vha);
610 }
611 }
612
613 /* Load the NIC Core f/w if we are the first protocol driver. */
614 if (IS_QLA8031(ha)) {
615 rval = qla83xx_nic_core_fw_load(vha);
616 if (rval)
617 ql_log(ql_log_warn, vha, 0x0124,
618 "Error in initializing NIC Core f/w.\n");
619 }
620
621 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha))
622 qla24xx_read_fcp_prio_cfg(vha);
623
624 return (rval);
625 }
626
627 /**
628 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
629 * @ha: HA context
630 *
631 * Returns 0 on success.
632 */
633 int
634 qla2100_pci_config(scsi_qla_host_t *vha)
635 {
636 uint16_t w;
637 unsigned long flags;
638 struct qla_hw_data *ha = vha->hw;
639 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
640
641 pci_set_master(ha->pdev);
642 pci_try_set_mwi(ha->pdev);
643
644 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
645 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
646 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
647
648 pci_disable_rom(ha->pdev);
649
650 /* Get PCI bus information. */
651 spin_lock_irqsave(&ha->hardware_lock, flags);
652 ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
653 spin_unlock_irqrestore(&ha->hardware_lock, flags);
654
655 return QLA_SUCCESS;
656 }
657
658 /**
659 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
660 * @ha: HA context
661 *
662 * Returns 0 on success.
663 */
664 int
665 qla2300_pci_config(scsi_qla_host_t *vha)
666 {
667 uint16_t w;
668 unsigned long flags = 0;
669 uint32_t cnt;
670 struct qla_hw_data *ha = vha->hw;
671 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
672
673 pci_set_master(ha->pdev);
674 pci_try_set_mwi(ha->pdev);
675
676 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
677 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
678
679 if (IS_QLA2322(ha) || IS_QLA6322(ha))
680 w &= ~PCI_COMMAND_INTX_DISABLE;
681 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
682
683 /*
684 * If this is a 2300 card and not 2312, reset the
685 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
686 * the 2310 also reports itself as a 2300 so we need to get the
687 * fb revision level -- a 6 indicates it really is a 2300 and
688 * not a 2310.
689 */
690 if (IS_QLA2300(ha)) {
691 spin_lock_irqsave(&ha->hardware_lock, flags);
692
693 /* Pause RISC. */
694 WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
695 for (cnt = 0; cnt < 30000; cnt++) {
696 if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
697 break;
698
699 udelay(10);
700 }
701
702 /* Select FPM registers. */
703 WRT_REG_WORD(&reg->ctrl_status, 0x20);
704 RD_REG_WORD(&reg->ctrl_status);
705
706 /* Get the fb rev level */
707 ha->fb_rev = RD_FB_CMD_REG(ha, reg);
708
709 if (ha->fb_rev == FPM_2300)
710 pci_clear_mwi(ha->pdev);
711
712 /* Deselect FPM registers. */
713 WRT_REG_WORD(&reg->ctrl_status, 0x0);
714 RD_REG_WORD(&reg->ctrl_status);
715
716 /* Release RISC module. */
717 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
718 for (cnt = 0; cnt < 30000; cnt++) {
719 if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
720 break;
721
722 udelay(10);
723 }
724
725 spin_unlock_irqrestore(&ha->hardware_lock, flags);
726 }
727
728 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
729
730 pci_disable_rom(ha->pdev);
731
732 /* Get PCI bus information. */
733 spin_lock_irqsave(&ha->hardware_lock, flags);
734 ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
735 spin_unlock_irqrestore(&ha->hardware_lock, flags);
736
737 return QLA_SUCCESS;
738 }
739
740 /**
741 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
742 * @ha: HA context
743 *
744 * Returns 0 on success.
745 */
746 int
747 qla24xx_pci_config(scsi_qla_host_t *vha)
748 {
749 uint16_t w;
750 unsigned long flags = 0;
751 struct qla_hw_data *ha = vha->hw;
752 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
753
754 pci_set_master(ha->pdev);
755 pci_try_set_mwi(ha->pdev);
756
757 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
758 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
759 w &= ~PCI_COMMAND_INTX_DISABLE;
760 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
761
762 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
763
764 /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
765 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
766 pcix_set_mmrbc(ha->pdev, 2048);
767
768 /* PCIe -- adjust Maximum Read Request Size (2048). */
769 if (pci_is_pcie(ha->pdev))
770 pcie_set_readrq(ha->pdev, 4096);
771
772 pci_disable_rom(ha->pdev);
773
774 ha->chip_revision = ha->pdev->revision;
775
776 /* Get PCI bus information. */
777 spin_lock_irqsave(&ha->hardware_lock, flags);
778 ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
779 spin_unlock_irqrestore(&ha->hardware_lock, flags);
780
781 return QLA_SUCCESS;
782 }
783
784 /**
785 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
786 * @ha: HA context
787 *
788 * Returns 0 on success.
789 */
790 int
791 qla25xx_pci_config(scsi_qla_host_t *vha)
792 {
793 uint16_t w;
794 struct qla_hw_data *ha = vha->hw;
795
796 pci_set_master(ha->pdev);
797 pci_try_set_mwi(ha->pdev);
798
799 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
800 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
801 w &= ~PCI_COMMAND_INTX_DISABLE;
802 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
803
804 /* PCIe -- adjust Maximum Read Request Size (2048). */
805 if (pci_is_pcie(ha->pdev))
806 pcie_set_readrq(ha->pdev, 4096);
807
808 pci_disable_rom(ha->pdev);
809
810 ha->chip_revision = ha->pdev->revision;
811
812 return QLA_SUCCESS;
813 }
814
815 /**
816 * qla2x00_isp_firmware() - Choose firmware image.
817 * @ha: HA context
818 *
819 * Returns 0 on success.
820 */
821 static int
822 qla2x00_isp_firmware(scsi_qla_host_t *vha)
823 {
824 int rval;
825 uint16_t loop_id, topo, sw_cap;
826 uint8_t domain, area, al_pa;
827 struct qla_hw_data *ha = vha->hw;
828
829 /* Assume loading risc code */
830 rval = QLA_FUNCTION_FAILED;
831
832 if (ha->flags.disable_risc_code_load) {
833 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n");
834
835 /* Verify checksum of loaded RISC code. */
836 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
837 if (rval == QLA_SUCCESS) {
838 /* And, verify we are not in ROM code. */
839 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
840 &area, &domain, &topo, &sw_cap);
841 }
842 }
843
844 if (rval)
845 ql_dbg(ql_dbg_init, vha, 0x007a,
846 "**** Load RISC code ****.\n");
847
848 return (rval);
849 }
850
851 /**
852 * qla2x00_reset_chip() - Reset ISP chip.
853 * @ha: HA context
854 *
855 * Returns 0 on success.
856 */
857 void
858 qla2x00_reset_chip(scsi_qla_host_t *vha)
859 {
860 unsigned long flags = 0;
861 struct qla_hw_data *ha = vha->hw;
862 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
863 uint32_t cnt;
864 uint16_t cmd;
865
866 if (unlikely(pci_channel_offline(ha->pdev)))
867 return;
868
869 ha->isp_ops->disable_intrs(ha);
870
871 spin_lock_irqsave(&ha->hardware_lock, flags);
872
873 /* Turn off master enable */
874 cmd = 0;
875 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
876 cmd &= ~PCI_COMMAND_MASTER;
877 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
878
879 if (!IS_QLA2100(ha)) {
880 /* Pause RISC. */
881 WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
882 if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
883 for (cnt = 0; cnt < 30000; cnt++) {
884 if ((RD_REG_WORD(&reg->hccr) &
885 HCCR_RISC_PAUSE) != 0)
886 break;
887 udelay(100);
888 }
889 } else {
890 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
891 udelay(10);
892 }
893
894 /* Select FPM registers. */
895 WRT_REG_WORD(&reg->ctrl_status, 0x20);
896 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
897
898 /* FPM Soft Reset. */
899 WRT_REG_WORD(&reg->fpm_diag_config, 0x100);
900 RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
901
902 /* Toggle Fpm Reset. */
903 if (!IS_QLA2200(ha)) {
904 WRT_REG_WORD(&reg->fpm_diag_config, 0x0);
905 RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
906 }
907
908 /* Select frame buffer registers. */
909 WRT_REG_WORD(&reg->ctrl_status, 0x10);
910 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
911
912 /* Reset frame buffer FIFOs. */
913 if (IS_QLA2200(ha)) {
914 WRT_FB_CMD_REG(ha, reg, 0xa000);
915 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
916 } else {
917 WRT_FB_CMD_REG(ha, reg, 0x00fc);
918
919 /* Read back fb_cmd until zero or 3 seconds max */
920 for (cnt = 0; cnt < 3000; cnt++) {
921 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
922 break;
923 udelay(100);
924 }
925 }
926
927 /* Select RISC module registers. */
928 WRT_REG_WORD(&reg->ctrl_status, 0);
929 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
930
931 /* Reset RISC processor. */
932 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
933 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
934
935 /* Release RISC processor. */
936 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
937 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
938 }
939
940 WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
941 WRT_REG_WORD(&reg->hccr, HCCR_CLR_HOST_INT);
942
943 /* Reset ISP chip. */
944 WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
945
946 /* Wait for RISC to recover from reset. */
947 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
948 /*
949 * It is necessary to for a delay here since the card doesn't
950 * respond to PCI reads during a reset. On some architectures
951 * this will result in an MCA.
952 */
953 udelay(20);
954 for (cnt = 30000; cnt; cnt--) {
955 if ((RD_REG_WORD(&reg->ctrl_status) &
956 CSR_ISP_SOFT_RESET) == 0)
957 break;
958 udelay(100);
959 }
960 } else
961 udelay(10);
962
963 /* Reset RISC processor. */
964 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
965
966 WRT_REG_WORD(&reg->semaphore, 0);
967
968 /* Release RISC processor. */
969 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
970 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
971
972 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
973 for (cnt = 0; cnt < 30000; cnt++) {
974 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
975 break;
976
977 udelay(100);
978 }
979 } else
980 udelay(100);
981
982 /* Turn on master enable */
983 cmd |= PCI_COMMAND_MASTER;
984 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
985
986 /* Disable RISC pause on FPM parity error. */
987 if (!IS_QLA2100(ha)) {
988 WRT_REG_WORD(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
989 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
990 }
991
992 spin_unlock_irqrestore(&ha->hardware_lock, flags);
993 }
994
995 /**
996 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC.
997 *
998 * Returns 0 on success.
999 */
1000 static int
1001 qla81xx_reset_mpi(scsi_qla_host_t *vha)
1002 {
1003 uint16_t mb[4] = {0x1010, 0, 1, 0};
1004
1005 if (!IS_QLA81XX(vha->hw))
1006 return QLA_SUCCESS;
1007
1008 return qla81xx_write_mpi_register(vha, mb);
1009 }
1010
1011 /**
1012 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
1013 * @ha: HA context
1014 *
1015 * Returns 0 on success.
1016 */
1017 static inline void
1018 qla24xx_reset_risc(scsi_qla_host_t *vha)
1019 {
1020 unsigned long flags = 0;
1021 struct qla_hw_data *ha = vha->hw;
1022 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1023 uint32_t cnt, d2;
1024 uint16_t wd;
1025 static int abts_cnt; /* ISP abort retry counts */
1026
1027 spin_lock_irqsave(&ha->hardware_lock, flags);
1028
1029 /* Reset RISC. */
1030 WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
1031 for (cnt = 0; cnt < 30000; cnt++) {
1032 if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
1033 break;
1034
1035 udelay(10);
1036 }
1037
1038 WRT_REG_DWORD(&reg->ctrl_status,
1039 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
1040 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
1041
1042 udelay(100);
1043 /* Wait for firmware to complete NVRAM accesses. */
1044 d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
1045 for (cnt = 10000 ; cnt && d2; cnt--) {
1046 udelay(5);
1047 d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
1048 barrier();
1049 }
1050
1051 /* Wait for soft-reset to complete. */
1052 d2 = RD_REG_DWORD(&reg->ctrl_status);
1053 for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) {
1054 udelay(5);
1055 d2 = RD_REG_DWORD(&reg->ctrl_status);
1056 barrier();
1057 }
1058
1059 /* If required, do an MPI FW reset now */
1060 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) {
1061 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) {
1062 if (++abts_cnt < 5) {
1063 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1064 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags);
1065 } else {
1066 /*
1067 * We exhausted the ISP abort retries. We have to
1068 * set the board offline.
1069 */
1070 abts_cnt = 0;
1071 vha->flags.online = 0;
1072 }
1073 }
1074 }
1075
1076 WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
1077 RD_REG_DWORD(&reg->hccr);
1078
1079 WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
1080 RD_REG_DWORD(&reg->hccr);
1081
1082 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
1083 RD_REG_DWORD(&reg->hccr);
1084
1085 d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
1086 for (cnt = 6000000 ; cnt && d2; cnt--) {
1087 udelay(5);
1088 d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
1089 barrier();
1090 }
1091
1092 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1093
1094 if (IS_NOPOLLING_TYPE(ha))
1095 ha->isp_ops->enable_intrs(ha);
1096 }
1097
1098 static void
1099 qla25xx_read_risc_sema_reg(scsi_qla_host_t *vha, uint32_t *data)
1100 {
1101 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
1102
1103 WRT_REG_DWORD(&reg->iobase_addr, RISC_REGISTER_BASE_OFFSET);
1104 *data = RD_REG_DWORD(&reg->iobase_window + RISC_REGISTER_WINDOW_OFFET);
1105
1106 }
1107
1108 static void
1109 qla25xx_write_risc_sema_reg(scsi_qla_host_t *vha, uint32_t data)
1110 {
1111 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
1112
1113 WRT_REG_DWORD(&reg->iobase_addr, RISC_REGISTER_BASE_OFFSET);
1114 WRT_REG_DWORD(&reg->iobase_window + RISC_REGISTER_WINDOW_OFFET, data);
1115 }
1116
1117 static void
1118 qla25xx_manipulate_risc_semaphore(scsi_qla_host_t *vha)
1119 {
1120 struct qla_hw_data *ha = vha->hw;
1121 uint32_t wd32 = 0;
1122 uint delta_msec = 100;
1123 uint elapsed_msec = 0;
1124 uint timeout_msec;
1125 ulong n;
1126
1127 if (!IS_QLA25XX(ha) && !IS_QLA2031(ha))
1128 return;
1129
1130 attempt:
1131 timeout_msec = TIMEOUT_SEMAPHORE;
1132 n = timeout_msec / delta_msec;
1133 while (n--) {
1134 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_SET);
1135 qla25xx_read_risc_sema_reg(vha, &wd32);
1136 if (wd32 & RISC_SEMAPHORE)
1137 break;
1138 msleep(delta_msec);
1139 elapsed_msec += delta_msec;
1140 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED)
1141 goto force;
1142 }
1143
1144 if (!(wd32 & RISC_SEMAPHORE))
1145 goto force;
1146
1147 if (!(wd32 & RISC_SEMAPHORE_FORCE))
1148 goto acquired;
1149
1150 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_CLR);
1151 timeout_msec = TIMEOUT_SEMAPHORE_FORCE;
1152 n = timeout_msec / delta_msec;
1153 while (n--) {
1154 qla25xx_read_risc_sema_reg(vha, &wd32);
1155 if (!(wd32 & RISC_SEMAPHORE_FORCE))
1156 break;
1157 msleep(delta_msec);
1158 elapsed_msec += delta_msec;
1159 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED)
1160 goto force;
1161 }
1162
1163 if (wd32 & RISC_SEMAPHORE_FORCE)
1164 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_CLR);
1165
1166 goto attempt;
1167
1168 force:
1169 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_SET);
1170
1171 acquired:
1172 return;
1173 }
1174
1175 /**
1176 * qla24xx_reset_chip() - Reset ISP24xx chip.
1177 * @ha: HA context
1178 *
1179 * Returns 0 on success.
1180 */
1181 void
1182 qla24xx_reset_chip(scsi_qla_host_t *vha)
1183 {
1184 struct qla_hw_data *ha = vha->hw;
1185
1186 if (pci_channel_offline(ha->pdev) &&
1187 ha->flags.pci_channel_io_perm_failure) {
1188 return;
1189 }
1190
1191 ha->isp_ops->disable_intrs(ha);
1192
1193 qla25xx_manipulate_risc_semaphore(vha);
1194
1195 /* Perform RISC reset. */
1196 qla24xx_reset_risc(vha);
1197 }
1198
1199 /**
1200 * qla2x00_chip_diag() - Test chip for proper operation.
1201 * @ha: HA context
1202 *
1203 * Returns 0 on success.
1204 */
1205 int
1206 qla2x00_chip_diag(scsi_qla_host_t *vha)
1207 {
1208 int rval;
1209 struct qla_hw_data *ha = vha->hw;
1210 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1211 unsigned long flags = 0;
1212 uint16_t data;
1213 uint32_t cnt;
1214 uint16_t mb[5];
1215 struct req_que *req = ha->req_q_map[0];
1216
1217 /* Assume a failed state */
1218 rval = QLA_FUNCTION_FAILED;
1219
1220 ql_dbg(ql_dbg_init, vha, 0x007b,
1221 "Testing device at %lx.\n", (u_long)&reg->flash_address);
1222
1223 spin_lock_irqsave(&ha->hardware_lock, flags);
1224
1225 /* Reset ISP chip. */
1226 WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
1227
1228 /*
1229 * We need to have a delay here since the card will not respond while
1230 * in reset causing an MCA on some architectures.
1231 */
1232 udelay(20);
1233 data = qla2x00_debounce_register(&reg->ctrl_status);
1234 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
1235 udelay(5);
1236 data = RD_REG_WORD(&reg->ctrl_status);
1237 barrier();
1238 }
1239
1240 if (!cnt)
1241 goto chip_diag_failed;
1242
1243 ql_dbg(ql_dbg_init, vha, 0x007c,
1244 "Reset register cleared by chip reset.\n");
1245
1246 /* Reset RISC processor. */
1247 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
1248 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
1249
1250 /* Workaround for QLA2312 PCI parity error */
1251 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
1252 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
1253 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
1254 udelay(5);
1255 data = RD_MAILBOX_REG(ha, reg, 0);
1256 barrier();
1257 }
1258 } else
1259 udelay(10);
1260
1261 if (!cnt)
1262 goto chip_diag_failed;
1263
1264 /* Check product ID of chip */
1265 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product Id of chip.\n");
1266
1267 mb[1] = RD_MAILBOX_REG(ha, reg, 1);
1268 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
1269 mb[3] = RD_MAILBOX_REG(ha, reg, 3);
1270 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
1271 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
1272 mb[3] != PROD_ID_3) {
1273 ql_log(ql_log_warn, vha, 0x0062,
1274 "Wrong product ID = 0x%x,0x%x,0x%x.\n",
1275 mb[1], mb[2], mb[3]);
1276
1277 goto chip_diag_failed;
1278 }
1279 ha->product_id[0] = mb[1];
1280 ha->product_id[1] = mb[2];
1281 ha->product_id[2] = mb[3];
1282 ha->product_id[3] = mb[4];
1283
1284 /* Adjust fw RISC transfer size */
1285 if (req->length > 1024)
1286 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
1287 else
1288 ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
1289 req->length;
1290
1291 if (IS_QLA2200(ha) &&
1292 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
1293 /* Limit firmware transfer size with a 2200A */
1294 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n");
1295
1296 ha->device_type |= DT_ISP2200A;
1297 ha->fw_transfer_size = 128;
1298 }
1299
1300 /* Wrap Incoming Mailboxes Test. */
1301 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1302
1303 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n");
1304 rval = qla2x00_mbx_reg_test(vha);
1305 if (rval)
1306 ql_log(ql_log_warn, vha, 0x0080,
1307 "Failed mailbox send register test.\n");
1308 else
1309 /* Flag a successful rval */
1310 rval = QLA_SUCCESS;
1311 spin_lock_irqsave(&ha->hardware_lock, flags);
1312
1313 chip_diag_failed:
1314 if (rval)
1315 ql_log(ql_log_info, vha, 0x0081,
1316 "Chip diagnostics **** FAILED ****.\n");
1317
1318 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1319
1320 return (rval);
1321 }
1322
1323 /**
1324 * qla24xx_chip_diag() - Test ISP24xx for proper operation.
1325 * @ha: HA context
1326 *
1327 * Returns 0 on success.
1328 */
1329 int
1330 qla24xx_chip_diag(scsi_qla_host_t *vha)
1331 {
1332 int rval;
1333 struct qla_hw_data *ha = vha->hw;
1334 struct req_que *req = ha->req_q_map[0];
1335
1336 if (IS_QLA82XX(ha))
1337 return QLA_SUCCESS;
1338
1339 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
1340
1341 rval = qla2x00_mbx_reg_test(vha);
1342 if (rval) {
1343 ql_log(ql_log_warn, vha, 0x0082,
1344 "Failed mailbox send register test.\n");
1345 } else {
1346 /* Flag a successful rval */
1347 rval = QLA_SUCCESS;
1348 }
1349
1350 return rval;
1351 }
1352
1353 void
1354 qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
1355 {
1356 int rval;
1357 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
1358 eft_size, fce_size, mq_size;
1359 dma_addr_t tc_dma;
1360 void *tc;
1361 struct qla_hw_data *ha = vha->hw;
1362 struct req_que *req = ha->req_q_map[0];
1363 struct rsp_que *rsp = ha->rsp_q_map[0];
1364
1365 if (ha->fw_dump) {
1366 ql_dbg(ql_dbg_init, vha, 0x00bd,
1367 "Firmware dump already allocated.\n");
1368 return;
1369 }
1370
1371 ha->fw_dumped = 0;
1372 fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
1373 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
1374 fixed_size = sizeof(struct qla2100_fw_dump);
1375 } else if (IS_QLA23XX(ha)) {
1376 fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
1377 mem_size = (ha->fw_memory_size - 0x11000 + 1) *
1378 sizeof(uint16_t);
1379 } else if (IS_FWI2_CAPABLE(ha)) {
1380 if (IS_QLA83XX(ha))
1381 fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem);
1382 else if (IS_QLA81XX(ha))
1383 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
1384 else if (IS_QLA25XX(ha))
1385 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
1386 else
1387 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
1388 mem_size = (ha->fw_memory_size - 0x100000 + 1) *
1389 sizeof(uint32_t);
1390 if (ha->mqenable) {
1391 if (!IS_QLA83XX(ha))
1392 mq_size = sizeof(struct qla2xxx_mq_chain);
1393 /*
1394 * Allocate maximum buffer size for all queues.
1395 * Resizing must be done at end-of-dump processing.
1396 */
1397 mq_size += ha->max_req_queues *
1398 (req->length * sizeof(request_t));
1399 mq_size += ha->max_rsp_queues *
1400 (rsp->length * sizeof(response_t));
1401 }
1402 if (ha->tgt.atio_q_length)
1403 mq_size += ha->tgt.atio_q_length * sizeof(request_t);
1404 /* Allocate memory for Fibre Channel Event Buffer. */
1405 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha))
1406 goto try_eft;
1407
1408 tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
1409 GFP_KERNEL);
1410 if (!tc) {
1411 ql_log(ql_log_warn, vha, 0x00be,
1412 "Unable to allocate (%d KB) for FCE.\n",
1413 FCE_SIZE / 1024);
1414 goto try_eft;
1415 }
1416
1417 memset(tc, 0, FCE_SIZE);
1418 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
1419 ha->fce_mb, &ha->fce_bufs);
1420 if (rval) {
1421 ql_log(ql_log_warn, vha, 0x00bf,
1422 "Unable to initialize FCE (%d).\n", rval);
1423 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc,
1424 tc_dma);
1425 ha->flags.fce_enabled = 0;
1426 goto try_eft;
1427 }
1428 ql_dbg(ql_dbg_init, vha, 0x00c0,
1429 "Allocate (%d KB) for FCE...\n", FCE_SIZE / 1024);
1430
1431 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
1432 ha->flags.fce_enabled = 1;
1433 ha->fce_dma = tc_dma;
1434 ha->fce = tc;
1435 try_eft:
1436 /* Allocate memory for Extended Trace Buffer. */
1437 tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
1438 GFP_KERNEL);
1439 if (!tc) {
1440 ql_log(ql_log_warn, vha, 0x00c1,
1441 "Unable to allocate (%d KB) for EFT.\n",
1442 EFT_SIZE / 1024);
1443 goto cont_alloc;
1444 }
1445
1446 memset(tc, 0, EFT_SIZE);
1447 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
1448 if (rval) {
1449 ql_log(ql_log_warn, vha, 0x00c2,
1450 "Unable to initialize EFT (%d).\n", rval);
1451 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc,
1452 tc_dma);
1453 goto cont_alloc;
1454 }
1455 ql_dbg(ql_dbg_init, vha, 0x00c3,
1456 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024);
1457
1458 eft_size = EFT_SIZE;
1459 ha->eft_dma = tc_dma;
1460 ha->eft = tc;
1461 }
1462 cont_alloc:
1463 req_q_size = req->length * sizeof(request_t);
1464 rsp_q_size = rsp->length * sizeof(response_t);
1465
1466 dump_size = offsetof(struct qla2xxx_fw_dump, isp);
1467 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size;
1468 ha->chain_offset = dump_size;
1469 dump_size += mq_size + fce_size;
1470
1471 ha->fw_dump = vmalloc(dump_size);
1472 if (!ha->fw_dump) {
1473 ql_log(ql_log_warn, vha, 0x00c4,
1474 "Unable to allocate (%d KB) for firmware dump.\n",
1475 dump_size / 1024);
1476
1477 if (ha->fce) {
1478 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce,
1479 ha->fce_dma);
1480 ha->fce = NULL;
1481 ha->fce_dma = 0;
1482 }
1483
1484 if (ha->eft) {
1485 dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft,
1486 ha->eft_dma);
1487 ha->eft = NULL;
1488 ha->eft_dma = 0;
1489 }
1490 return;
1491 }
1492 ql_dbg(ql_dbg_init, vha, 0x00c5,
1493 "Allocated (%d KB) for firmware dump.\n", dump_size / 1024);
1494
1495 ha->fw_dump_len = dump_size;
1496 ha->fw_dump->signature[0] = 'Q';
1497 ha->fw_dump->signature[1] = 'L';
1498 ha->fw_dump->signature[2] = 'G';
1499 ha->fw_dump->signature[3] = 'C';
1500 ha->fw_dump->version = __constant_htonl(1);
1501
1502 ha->fw_dump->fixed_size = htonl(fixed_size);
1503 ha->fw_dump->mem_size = htonl(mem_size);
1504 ha->fw_dump->req_q_size = htonl(req_q_size);
1505 ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
1506
1507 ha->fw_dump->eft_size = htonl(eft_size);
1508 ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma));
1509 ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma));
1510
1511 ha->fw_dump->header_size =
1512 htonl(offsetof(struct qla2xxx_fw_dump, isp));
1513 }
1514
1515 static int
1516 qla81xx_mpi_sync(scsi_qla_host_t *vha)
1517 {
1518 #define MPS_MASK 0xe0
1519 int rval;
1520 uint16_t dc;
1521 uint32_t dw;
1522
1523 if (!IS_QLA81XX(vha->hw))
1524 return QLA_SUCCESS;
1525
1526 rval = qla2x00_write_ram_word(vha, 0x7c00, 1);
1527 if (rval != QLA_SUCCESS) {
1528 ql_log(ql_log_warn, vha, 0x0105,
1529 "Unable to acquire semaphore.\n");
1530 goto done;
1531 }
1532
1533 pci_read_config_word(vha->hw->pdev, 0x54, &dc);
1534 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw);
1535 if (rval != QLA_SUCCESS) {
1536 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n");
1537 goto done_release;
1538 }
1539
1540 dc &= MPS_MASK;
1541 if (dc == (dw & MPS_MASK))
1542 goto done_release;
1543
1544 dw &= ~MPS_MASK;
1545 dw |= dc;
1546 rval = qla2x00_write_ram_word(vha, 0x7a15, dw);
1547 if (rval != QLA_SUCCESS) {
1548 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n");
1549 }
1550
1551 done_release:
1552 rval = qla2x00_write_ram_word(vha, 0x7c00, 0);
1553 if (rval != QLA_SUCCESS) {
1554 ql_log(ql_log_warn, vha, 0x006d,
1555 "Unable to release semaphore.\n");
1556 }
1557
1558 done:
1559 return rval;
1560 }
1561
1562 /**
1563 * qla2x00_setup_chip() - Load and start RISC firmware.
1564 * @ha: HA context
1565 *
1566 * Returns 0 on success.
1567 */
1568 static int
1569 qla2x00_setup_chip(scsi_qla_host_t *vha)
1570 {
1571 int rval;
1572 uint32_t srisc_address = 0;
1573 struct qla_hw_data *ha = vha->hw;
1574 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1575 unsigned long flags;
1576 uint16_t fw_major_version;
1577
1578 if (IS_QLA82XX(ha)) {
1579 rval = ha->isp_ops->load_risc(vha, &srisc_address);
1580 if (rval == QLA_SUCCESS) {
1581 qla2x00_stop_firmware(vha);
1582 goto enable_82xx_npiv;
1583 } else
1584 goto failed;
1585 }
1586
1587 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
1588 /* Disable SRAM, Instruction RAM and GP RAM parity. */
1589 spin_lock_irqsave(&ha->hardware_lock, flags);
1590 WRT_REG_WORD(&reg->hccr, (HCCR_ENABLE_PARITY + 0x0));
1591 RD_REG_WORD(&reg->hccr);
1592 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1593 }
1594
1595 qla81xx_mpi_sync(vha);
1596
1597 /* Load firmware sequences */
1598 rval = ha->isp_ops->load_risc(vha, &srisc_address);
1599 if (rval == QLA_SUCCESS) {
1600 ql_dbg(ql_dbg_init, vha, 0x00c9,
1601 "Verifying Checksum of loaded RISC code.\n");
1602
1603 rval = qla2x00_verify_checksum(vha, srisc_address);
1604 if (rval == QLA_SUCCESS) {
1605 /* Start firmware execution. */
1606 ql_dbg(ql_dbg_init, vha, 0x00ca,
1607 "Starting firmware.\n");
1608
1609 rval = qla2x00_execute_fw(vha, srisc_address);
1610 /* Retrieve firmware information. */
1611 if (rval == QLA_SUCCESS) {
1612 enable_82xx_npiv:
1613 fw_major_version = ha->fw_major_version;
1614 if (IS_QLA82XX(ha))
1615 qla82xx_check_md_needed(vha);
1616 else
1617 rval = qla2x00_get_fw_version(vha);
1618 if (rval != QLA_SUCCESS)
1619 goto failed;
1620 ha->flags.npiv_supported = 0;
1621 if (IS_QLA2XXX_MIDTYPE(ha) &&
1622 (ha->fw_attributes & BIT_2)) {
1623 ha->flags.npiv_supported = 1;
1624 if ((!ha->max_npiv_vports) ||
1625 ((ha->max_npiv_vports + 1) %
1626 MIN_MULTI_ID_FABRIC))
1627 ha->max_npiv_vports =
1628 MIN_MULTI_ID_FABRIC - 1;
1629 }
1630 qla2x00_get_resource_cnts(vha, NULL,
1631 &ha->fw_xcb_count, NULL, NULL,
1632 &ha->max_npiv_vports, NULL);
1633
1634 if (!fw_major_version && ql2xallocfwdump
1635 && !IS_QLA82XX(ha))
1636 qla2x00_alloc_fw_dump(vha);
1637 }
1638 } else {
1639 ql_log(ql_log_fatal, vha, 0x00cd,
1640 "ISP Firmware failed checksum.\n");
1641 goto failed;
1642 }
1643 } else
1644 goto failed;
1645
1646 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
1647 /* Enable proper parity. */
1648 spin_lock_irqsave(&ha->hardware_lock, flags);
1649 if (IS_QLA2300(ha))
1650 /* SRAM parity */
1651 WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x1);
1652 else
1653 /* SRAM, Instruction RAM and GP RAM parity */
1654 WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x7);
1655 RD_REG_WORD(&reg->hccr);
1656 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1657 }
1658
1659 if (IS_QLA83XX(ha))
1660 goto skip_fac_check;
1661
1662 if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
1663 uint32_t size;
1664
1665 rval = qla81xx_fac_get_sector_size(vha, &size);
1666 if (rval == QLA_SUCCESS) {
1667 ha->flags.fac_supported = 1;
1668 ha->fdt_block_size = size << 2;
1669 } else {
1670 ql_log(ql_log_warn, vha, 0x00ce,
1671 "Unsupported FAC firmware (%d.%02d.%02d).\n",
1672 ha->fw_major_version, ha->fw_minor_version,
1673 ha->fw_subminor_version);
1674 skip_fac_check:
1675 if (IS_QLA83XX(ha)) {
1676 ha->flags.fac_supported = 0;
1677 rval = QLA_SUCCESS;
1678 }
1679 }
1680 }
1681 failed:
1682 if (rval) {
1683 ql_log(ql_log_fatal, vha, 0x00cf,
1684 "Setup chip ****FAILED****.\n");
1685 }
1686
1687 return (rval);
1688 }
1689
1690 /**
1691 * qla2x00_init_response_q_entries() - Initializes response queue entries.
1692 * @ha: HA context
1693 *
1694 * Beginning of request ring has initialization control block already built
1695 * by nvram config routine.
1696 *
1697 * Returns 0 on success.
1698 */
1699 void
1700 qla2x00_init_response_q_entries(struct rsp_que *rsp)
1701 {
1702 uint16_t cnt;
1703 response_t *pkt;
1704
1705 rsp->ring_ptr = rsp->ring;
1706 rsp->ring_index = 0;
1707 rsp->status_srb = NULL;
1708 pkt = rsp->ring_ptr;
1709 for (cnt = 0; cnt < rsp->length; cnt++) {
1710 pkt->signature = RESPONSE_PROCESSED;
1711 pkt++;
1712 }
1713 }
1714
1715 /**
1716 * qla2x00_update_fw_options() - Read and process firmware options.
1717 * @ha: HA context
1718 *
1719 * Returns 0 on success.
1720 */
1721 void
1722 qla2x00_update_fw_options(scsi_qla_host_t *vha)
1723 {
1724 uint16_t swing, emphasis, tx_sens, rx_sens;
1725 struct qla_hw_data *ha = vha->hw;
1726
1727 memset(ha->fw_options, 0, sizeof(ha->fw_options));
1728 qla2x00_get_fw_options(vha, ha->fw_options);
1729
1730 if (IS_QLA2100(ha) || IS_QLA2200(ha))
1731 return;
1732
1733 /* Serial Link options. */
1734 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115,
1735 "Serial link options.\n");
1736 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109,
1737 (uint8_t *)&ha->fw_seriallink_options,
1738 sizeof(ha->fw_seriallink_options));
1739
1740 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
1741 if (ha->fw_seriallink_options[3] & BIT_2) {
1742 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
1743
1744 /* 1G settings */
1745 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
1746 emphasis = (ha->fw_seriallink_options[2] &
1747 (BIT_4 | BIT_3)) >> 3;
1748 tx_sens = ha->fw_seriallink_options[0] &
1749 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
1750 rx_sens = (ha->fw_seriallink_options[0] &
1751 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
1752 ha->fw_options[10] = (emphasis << 14) | (swing << 8);
1753 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
1754 if (rx_sens == 0x0)
1755 rx_sens = 0x3;
1756 ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
1757 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
1758 ha->fw_options[10] |= BIT_5 |
1759 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
1760 (tx_sens & (BIT_1 | BIT_0));
1761
1762 /* 2G settings */
1763 swing = (ha->fw_seriallink_options[2] &
1764 (BIT_7 | BIT_6 | BIT_5)) >> 5;
1765 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
1766 tx_sens = ha->fw_seriallink_options[1] &
1767 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
1768 rx_sens = (ha->fw_seriallink_options[1] &
1769 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
1770 ha->fw_options[11] = (emphasis << 14) | (swing << 8);
1771 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
1772 if (rx_sens == 0x0)
1773 rx_sens = 0x3;
1774 ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
1775 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
1776 ha->fw_options[11] |= BIT_5 |
1777 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
1778 (tx_sens & (BIT_1 | BIT_0));
1779 }
1780
1781 /* FCP2 options. */
1782 /* Return command IOCBs without waiting for an ABTS to complete. */
1783 ha->fw_options[3] |= BIT_13;
1784
1785 /* LED scheme. */
1786 if (ha->flags.enable_led_scheme)
1787 ha->fw_options[2] |= BIT_12;
1788
1789 /* Detect ISP6312. */
1790 if (IS_QLA6312(ha))
1791 ha->fw_options[2] |= BIT_13;
1792
1793 /* Update firmware options. */
1794 qla2x00_set_fw_options(vha, ha->fw_options);
1795 }
1796
1797 void
1798 qla24xx_update_fw_options(scsi_qla_host_t *vha)
1799 {
1800 int rval;
1801 struct qla_hw_data *ha = vha->hw;
1802
1803 if (IS_QLA82XX(ha))
1804 return;
1805
1806 /* Update Serial Link options. */
1807 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
1808 return;
1809
1810 rval = qla2x00_set_serdes_params(vha,
1811 le16_to_cpu(ha->fw_seriallink_options24[1]),
1812 le16_to_cpu(ha->fw_seriallink_options24[2]),
1813 le16_to_cpu(ha->fw_seriallink_options24[3]));
1814 if (rval != QLA_SUCCESS) {
1815 ql_log(ql_log_warn, vha, 0x0104,
1816 "Unable to update Serial Link options (%x).\n", rval);
1817 }
1818 }
1819
1820 void
1821 qla2x00_config_rings(struct scsi_qla_host *vha)
1822 {
1823 struct qla_hw_data *ha = vha->hw;
1824 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1825 struct req_que *req = ha->req_q_map[0];
1826 struct rsp_que *rsp = ha->rsp_q_map[0];
1827
1828 /* Setup ring parameters in initialization control block. */
1829 ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0);
1830 ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0);
1831 ha->init_cb->request_q_length = cpu_to_le16(req->length);
1832 ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
1833 ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
1834 ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
1835 ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
1836 ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
1837
1838 WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
1839 WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
1840 WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
1841 WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
1842 RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
1843 }
1844
1845 void
1846 qla24xx_config_rings(struct scsi_qla_host *vha)
1847 {
1848 struct qla_hw_data *ha = vha->hw;
1849 device_reg_t __iomem *reg = ISP_QUE_REG(ha, 0);
1850 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
1851 struct qla_msix_entry *msix;
1852 struct init_cb_24xx *icb;
1853 uint16_t rid = 0;
1854 struct req_que *req = ha->req_q_map[0];
1855 struct rsp_que *rsp = ha->rsp_q_map[0];
1856
1857 /* Setup ring parameters in initialization control block. */
1858 icb = (struct init_cb_24xx *)ha->init_cb;
1859 icb->request_q_outpointer = __constant_cpu_to_le16(0);
1860 icb->response_q_inpointer = __constant_cpu_to_le16(0);
1861 icb->request_q_length = cpu_to_le16(req->length);
1862 icb->response_q_length = cpu_to_le16(rsp->length);
1863 icb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
1864 icb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
1865 icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
1866 icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
1867
1868 /* Setup ATIO queue dma pointers for target mode */
1869 icb->atio_q_inpointer = __constant_cpu_to_le16(0);
1870 icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length);
1871 icb->atio_q_address[0] = cpu_to_le32(LSD(ha->tgt.atio_dma));
1872 icb->atio_q_address[1] = cpu_to_le32(MSD(ha->tgt.atio_dma));
1873
1874 if (ha->mqenable || IS_QLA83XX(ha)) {
1875 icb->qos = __constant_cpu_to_le16(QLA_DEFAULT_QUE_QOS);
1876 icb->rid = __constant_cpu_to_le16(rid);
1877 if (ha->flags.msix_enabled) {
1878 msix = &ha->msix_entries[1];
1879 ql_dbg(ql_dbg_init, vha, 0x00fd,
1880 "Registering vector 0x%x for base que.\n",
1881 msix->entry);
1882 icb->msix = cpu_to_le16(msix->entry);
1883 }
1884 /* Use alternate PCI bus number */
1885 if (MSB(rid))
1886 icb->firmware_options_2 |=
1887 __constant_cpu_to_le32(BIT_19);
1888 /* Use alternate PCI devfn */
1889 if (LSB(rid))
1890 icb->firmware_options_2 |=
1891 __constant_cpu_to_le32(BIT_18);
1892
1893 /* Use Disable MSIX Handshake mode for capable adapters */
1894 if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) &&
1895 (ha->flags.msix_enabled)) {
1896 icb->firmware_options_2 &=
1897 __constant_cpu_to_le32(~BIT_22);
1898 ha->flags.disable_msix_handshake = 1;
1899 ql_dbg(ql_dbg_init, vha, 0x00fe,
1900 "MSIX Handshake Disable Mode turned on.\n");
1901 } else {
1902 icb->firmware_options_2 |=
1903 __constant_cpu_to_le32(BIT_22);
1904 }
1905 icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23);
1906
1907 WRT_REG_DWORD(&reg->isp25mq.req_q_in, 0);
1908 WRT_REG_DWORD(&reg->isp25mq.req_q_out, 0);
1909 WRT_REG_DWORD(&reg->isp25mq.rsp_q_in, 0);
1910 WRT_REG_DWORD(&reg->isp25mq.rsp_q_out, 0);
1911 } else {
1912 WRT_REG_DWORD(&reg->isp24.req_q_in, 0);
1913 WRT_REG_DWORD(&reg->isp24.req_q_out, 0);
1914 WRT_REG_DWORD(&reg->isp24.rsp_q_in, 0);
1915 WRT_REG_DWORD(&reg->isp24.rsp_q_out, 0);
1916 }
1917 qlt_24xx_config_rings(vha, reg);
1918
1919 /* PCI posting */
1920 RD_REG_DWORD(&ioreg->hccr);
1921 }
1922
1923 /**
1924 * qla2x00_init_rings() - Initializes firmware.
1925 * @ha: HA context
1926 *
1927 * Beginning of request ring has initialization control block already built
1928 * by nvram config routine.
1929 *
1930 * Returns 0 on success.
1931 */
1932 static int
1933 qla2x00_init_rings(scsi_qla_host_t *vha)
1934 {
1935 int rval;
1936 unsigned long flags = 0;
1937 int cnt, que;
1938 struct qla_hw_data *ha = vha->hw;
1939 struct req_que *req;
1940 struct rsp_que *rsp;
1941 struct mid_init_cb_24xx *mid_init_cb =
1942 (struct mid_init_cb_24xx *) ha->init_cb;
1943
1944 spin_lock_irqsave(&ha->hardware_lock, flags);
1945
1946 /* Clear outstanding commands array. */
1947 for (que = 0; que < ha->max_req_queues; que++) {
1948 req = ha->req_q_map[que];
1949 if (!req)
1950 continue;
1951 for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++)
1952 req->outstanding_cmds[cnt] = NULL;
1953
1954 req->current_outstanding_cmd = 1;
1955
1956 /* Initialize firmware. */
1957 req->ring_ptr = req->ring;
1958 req->ring_index = 0;
1959 req->cnt = req->length;
1960 }
1961
1962 for (que = 0; que < ha->max_rsp_queues; que++) {
1963 rsp = ha->rsp_q_map[que];
1964 if (!rsp)
1965 continue;
1966 /* Initialize response queue entries */
1967 qla2x00_init_response_q_entries(rsp);
1968 }
1969
1970 ha->tgt.atio_ring_ptr = ha->tgt.atio_ring;
1971 ha->tgt.atio_ring_index = 0;
1972 /* Initialize ATIO queue entries */
1973 qlt_init_atio_q_entries(vha);
1974
1975 ha->isp_ops->config_rings(vha);
1976
1977 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1978
1979 /* Update any ISP specific firmware options before initialization. */
1980 ha->isp_ops->update_fw_options(vha);
1981
1982 ql_dbg(ql_dbg_init, vha, 0x00d1, "Issue init firmware.\n");
1983
1984 if (ha->flags.npiv_supported) {
1985 if (ha->operating_mode == LOOP && !IS_CNA_CAPABLE(ha))
1986 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
1987 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
1988 }
1989
1990 if (IS_FWI2_CAPABLE(ha)) {
1991 mid_init_cb->options = __constant_cpu_to_le16(BIT_1);
1992 mid_init_cb->init_cb.execution_throttle =
1993 cpu_to_le16(ha->fw_xcb_count);
1994 }
1995
1996 rval = qla2x00_init_firmware(vha, ha->init_cb_size);
1997 if (rval) {
1998 ql_log(ql_log_fatal, vha, 0x00d2,
1999 "Init Firmware **** FAILED ****.\n");
2000 } else {
2001 ql_dbg(ql_dbg_init, vha, 0x00d3,
2002 "Init Firmware -- success.\n");
2003 }
2004
2005 return (rval);
2006 }
2007
2008 /**
2009 * qla2x00_fw_ready() - Waits for firmware ready.
2010 * @ha: HA context
2011 *
2012 * Returns 0 on success.
2013 */
2014 static int
2015 qla2x00_fw_ready(scsi_qla_host_t *vha)
2016 {
2017 int rval;
2018 unsigned long wtime, mtime, cs84xx_time;
2019 uint16_t min_wait; /* Minimum wait time if loop is down */
2020 uint16_t wait_time; /* Wait time if loop is coming ready */
2021 uint16_t state[5];
2022 struct qla_hw_data *ha = vha->hw;
2023
2024 rval = QLA_SUCCESS;
2025
2026 /* 20 seconds for loop down. */
2027 min_wait = 20;
2028
2029 /*
2030 * Firmware should take at most one RATOV to login, plus 5 seconds for
2031 * our own processing.
2032 */
2033 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
2034 wait_time = min_wait;
2035 }
2036
2037 /* Min wait time if loop down */
2038 mtime = jiffies + (min_wait * HZ);
2039
2040 /* wait time before firmware ready */
2041 wtime = jiffies + (wait_time * HZ);
2042
2043 /* Wait for ISP to finish LIP */
2044 if (!vha->flags.init_done)
2045 ql_log(ql_log_info, vha, 0x801e,
2046 "Waiting for LIP to complete.\n");
2047
2048 do {
2049 memset(state, -1, sizeof(state));
2050 rval = qla2x00_get_firmware_state(vha, state);
2051 if (rval == QLA_SUCCESS) {
2052 if (state[0] < FSTATE_LOSS_OF_SYNC) {
2053 vha->device_flags &= ~DFLG_NO_CABLE;
2054 }
2055 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
2056 ql_dbg(ql_dbg_taskm, vha, 0x801f,
2057 "fw_state=%x 84xx=%x.\n", state[0],
2058 state[2]);
2059 if ((state[2] & FSTATE_LOGGED_IN) &&
2060 (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
2061 ql_dbg(ql_dbg_taskm, vha, 0x8028,
2062 "Sending verify iocb.\n");
2063
2064 cs84xx_time = jiffies;
2065 rval = qla84xx_init_chip(vha);
2066 if (rval != QLA_SUCCESS) {
2067 ql_log(ql_log_warn,
2068 vha, 0x8007,
2069 "Init chip failed.\n");
2070 break;
2071 }
2072
2073 /* Add time taken to initialize. */
2074 cs84xx_time = jiffies - cs84xx_time;
2075 wtime += cs84xx_time;
2076 mtime += cs84xx_time;
2077 ql_dbg(ql_dbg_taskm, vha, 0x8008,
2078 "Increasing wait time by %ld. "
2079 "New time %ld.\n", cs84xx_time,
2080 wtime);
2081 }
2082 } else if (state[0] == FSTATE_READY) {
2083 ql_dbg(ql_dbg_taskm, vha, 0x8037,
2084 "F/W Ready - OK.\n");
2085
2086 qla2x00_get_retry_cnt(vha, &ha->retry_count,
2087 &ha->login_timeout, &ha->r_a_tov);
2088
2089 rval = QLA_SUCCESS;
2090 break;
2091 }
2092
2093 rval = QLA_FUNCTION_FAILED;
2094
2095 if (atomic_read(&vha->loop_down_timer) &&
2096 state[0] != FSTATE_READY) {
2097 /* Loop down. Timeout on min_wait for states
2098 * other than Wait for Login.
2099 */
2100 if (time_after_eq(jiffies, mtime)) {
2101 ql_log(ql_log_info, vha, 0x8038,
2102 "Cable is unplugged...\n");
2103
2104 vha->device_flags |= DFLG_NO_CABLE;
2105 break;
2106 }
2107 }
2108 } else {
2109 /* Mailbox cmd failed. Timeout on min_wait. */
2110 if (time_after_eq(jiffies, mtime) ||
2111 ha->flags.isp82xx_fw_hung)
2112 break;
2113 }
2114
2115 if (time_after_eq(jiffies, wtime))
2116 break;
2117
2118 /* Delay for a while */
2119 msleep(500);
2120 } while (1);
2121
2122 ql_dbg(ql_dbg_taskm, vha, 0x803a,
2123 "fw_state=%x (%x, %x, %x, %x) " "curr time=%lx.\n", state[0],
2124 state[1], state[2], state[3], state[4], jiffies);
2125
2126 if (rval && !(vha->device_flags & DFLG_NO_CABLE)) {
2127 ql_log(ql_log_warn, vha, 0x803b,
2128 "Firmware ready **** FAILED ****.\n");
2129 }
2130
2131 return (rval);
2132 }
2133
2134 /*
2135 * qla2x00_configure_hba
2136 * Setup adapter context.
2137 *
2138 * Input:
2139 * ha = adapter state pointer.
2140 *
2141 * Returns:
2142 * 0 = success
2143 *
2144 * Context:
2145 * Kernel context.
2146 */
2147 static int
2148 qla2x00_configure_hba(scsi_qla_host_t *vha)
2149 {
2150 int rval;
2151 uint16_t loop_id;
2152 uint16_t topo;
2153 uint16_t sw_cap;
2154 uint8_t al_pa;
2155 uint8_t area;
2156 uint8_t domain;
2157 char connect_type[22];
2158 struct qla_hw_data *ha = vha->hw;
2159 unsigned long flags;
2160
2161 /* Get host addresses. */
2162 rval = qla2x00_get_adapter_id(vha,
2163 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
2164 if (rval != QLA_SUCCESS) {
2165 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
2166 IS_CNA_CAPABLE(ha) ||
2167 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
2168 ql_dbg(ql_dbg_disc, vha, 0x2008,
2169 "Loop is in a transition state.\n");
2170 } else {
2171 ql_log(ql_log_warn, vha, 0x2009,
2172 "Unable to get host loop ID.\n");
2173 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2174 }
2175 return (rval);
2176 }
2177
2178 if (topo == 4) {
2179 ql_log(ql_log_info, vha, 0x200a,
2180 "Cannot get topology - retrying.\n");
2181 return (QLA_FUNCTION_FAILED);
2182 }
2183
2184 vha->loop_id = loop_id;
2185
2186 /* initialize */
2187 ha->min_external_loopid = SNS_FIRST_LOOP_ID;
2188 ha->operating_mode = LOOP;
2189 ha->switch_cap = 0;
2190
2191 switch (topo) {
2192 case 0:
2193 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n");
2194 ha->current_topology = ISP_CFG_NL;
2195 strcpy(connect_type, "(Loop)");
2196 break;
2197
2198 case 1:
2199 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n");
2200 ha->switch_cap = sw_cap;
2201 ha->current_topology = ISP_CFG_FL;
2202 strcpy(connect_type, "(FL_Port)");
2203 break;
2204
2205 case 2:
2206 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n");
2207 ha->operating_mode = P2P;
2208 ha->current_topology = ISP_CFG_N;
2209 strcpy(connect_type, "(N_Port-to-N_Port)");
2210 break;
2211
2212 case 3:
2213 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n");
2214 ha->switch_cap = sw_cap;
2215 ha->operating_mode = P2P;
2216 ha->current_topology = ISP_CFG_F;
2217 strcpy(connect_type, "(F_Port)");
2218 break;
2219
2220 default:
2221 ql_dbg(ql_dbg_disc, vha, 0x200f,
2222 "HBA in unknown topology %x, using NL.\n", topo);
2223 ha->current_topology = ISP_CFG_NL;
2224 strcpy(connect_type, "(Loop)");
2225 break;
2226 }
2227
2228 /* Save Host port and loop ID. */
2229 /* byte order - Big Endian */
2230 vha->d_id.b.domain = domain;
2231 vha->d_id.b.area = area;
2232 vha->d_id.b.al_pa = al_pa;
2233
2234 spin_lock_irqsave(&ha->vport_slock, flags);
2235 qlt_update_vp_map(vha, SET_AL_PA);
2236 spin_unlock_irqrestore(&ha->vport_slock, flags);
2237
2238 if (!vha->flags.init_done)
2239 ql_log(ql_log_info, vha, 0x2010,
2240 "Topology - %s, Host Loop address 0x%x.\n",
2241 connect_type, vha->loop_id);
2242
2243 if (rval) {
2244 ql_log(ql_log_warn, vha, 0x2011,
2245 "%s FAILED\n", __func__);
2246 } else {
2247 ql_dbg(ql_dbg_disc, vha, 0x2012,
2248 "%s success\n", __func__);
2249 }
2250
2251 return(rval);
2252 }
2253
2254 inline void
2255 qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
2256 char *def)
2257 {
2258 char *st, *en;
2259 uint16_t index;
2260 struct qla_hw_data *ha = vha->hw;
2261 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) &&
2262 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha);
2263
2264 if (memcmp(model, BINZERO, len) != 0) {
2265 strncpy(ha->model_number, model, len);
2266 st = en = ha->model_number;
2267 en += len - 1;
2268 while (en > st) {
2269 if (*en != 0x20 && *en != 0x00)
2270 break;
2271 *en-- = '\0';
2272 }
2273
2274 index = (ha->pdev->subsystem_device & 0xff);
2275 if (use_tbl &&
2276 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
2277 index < QLA_MODEL_NAMES)
2278 strncpy(ha->model_desc,
2279 qla2x00_model_name[index * 2 + 1],
2280 sizeof(ha->model_desc) - 1);
2281 } else {
2282 index = (ha->pdev->subsystem_device & 0xff);
2283 if (use_tbl &&
2284 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
2285 index < QLA_MODEL_NAMES) {
2286 strcpy(ha->model_number,
2287 qla2x00_model_name[index * 2]);
2288 strncpy(ha->model_desc,
2289 qla2x00_model_name[index * 2 + 1],
2290 sizeof(ha->model_desc) - 1);
2291 } else {
2292 strcpy(ha->model_number, def);
2293 }
2294 }
2295 if (IS_FWI2_CAPABLE(ha))
2296 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
2297 sizeof(ha->model_desc));
2298 }
2299
2300 /* On sparc systems, obtain port and node WWN from firmware
2301 * properties.
2302 */
2303 static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
2304 {
2305 #ifdef CONFIG_SPARC
2306 struct qla_hw_data *ha = vha->hw;
2307 struct pci_dev *pdev = ha->pdev;
2308 struct device_node *dp = pci_device_to_OF_node(pdev);
2309 const u8 *val;
2310 int len;
2311
2312 val = of_get_property(dp, "port-wwn", &len);
2313 if (val && len >= WWN_SIZE)
2314 memcpy(nv->port_name, val, WWN_SIZE);
2315
2316 val = of_get_property(dp, "node-wwn", &len);
2317 if (val && len >= WWN_SIZE)
2318 memcpy(nv->node_name, val, WWN_SIZE);
2319 #endif
2320 }
2321
2322 /*
2323 * NVRAM configuration for ISP 2xxx
2324 *
2325 * Input:
2326 * ha = adapter block pointer.
2327 *
2328 * Output:
2329 * initialization control block in response_ring
2330 * host adapters parameters in host adapter block
2331 *
2332 * Returns:
2333 * 0 = success.
2334 */
2335 int
2336 qla2x00_nvram_config(scsi_qla_host_t *vha)
2337 {
2338 int rval;
2339 uint8_t chksum = 0;
2340 uint16_t cnt;
2341 uint8_t *dptr1, *dptr2;
2342 struct qla_hw_data *ha = vha->hw;
2343 init_cb_t *icb = ha->init_cb;
2344 nvram_t *nv = ha->nvram;
2345 uint8_t *ptr = ha->nvram;
2346 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2347
2348 rval = QLA_SUCCESS;
2349
2350 /* Determine NVRAM starting address. */
2351 ha->nvram_size = sizeof(nvram_t);
2352 ha->nvram_base = 0;
2353 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
2354 if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)
2355 ha->nvram_base = 0x80;
2356
2357 /* Get NVRAM data and calculate checksum. */
2358 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
2359 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
2360 chksum += *ptr++;
2361
2362 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f,
2363 "Contents of NVRAM.\n");
2364 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110,
2365 (uint8_t *)nv, ha->nvram_size);
2366
2367 /* Bad NVRAM data, set defaults parameters. */
2368 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' ||
2369 nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) {
2370 /* Reset NVRAM data. */
2371 ql_log(ql_log_warn, vha, 0x0064,
2372 "Inconsistent NVRAM "
2373 "detected: checksum=0x%x id=%c version=0x%x.\n",
2374 chksum, nv->id[0], nv->nvram_version);
2375 ql_log(ql_log_warn, vha, 0x0065,
2376 "Falling back to "
2377 "functioning (yet invalid -- WWPN) defaults.\n");
2378
2379 /*
2380 * Set default initialization control block.
2381 */
2382 memset(nv, 0, ha->nvram_size);
2383 nv->parameter_block_version = ICB_VERSION;
2384
2385 if (IS_QLA23XX(ha)) {
2386 nv->firmware_options[0] = BIT_2 | BIT_1;
2387 nv->firmware_options[1] = BIT_7 | BIT_5;
2388 nv->add_firmware_options[0] = BIT_5;
2389 nv->add_firmware_options[1] = BIT_5 | BIT_4;
2390 nv->frame_payload_size = __constant_cpu_to_le16(2048);
2391 nv->special_options[1] = BIT_7;
2392 } else if (IS_QLA2200(ha)) {
2393 nv->firmware_options[0] = BIT_2 | BIT_1;
2394 nv->firmware_options[1] = BIT_7 | BIT_5;
2395 nv->add_firmware_options[0] = BIT_5;
2396 nv->add_firmware_options[1] = BIT_5 | BIT_4;
2397 nv->frame_payload_size = __constant_cpu_to_le16(1024);
2398 } else if (IS_QLA2100(ha)) {
2399 nv->firmware_options[0] = BIT_3 | BIT_1;
2400 nv->firmware_options[1] = BIT_5;
2401 nv->frame_payload_size = __constant_cpu_to_le16(1024);
2402 }
2403
2404 nv->max_iocb_allocation = __constant_cpu_to_le16(256);
2405 nv->execution_throttle = __constant_cpu_to_le16(16);
2406 nv->retry_count = 8;
2407 nv->retry_delay = 1;
2408
2409 nv->port_name[0] = 33;
2410 nv->port_name[3] = 224;
2411 nv->port_name[4] = 139;
2412
2413 qla2xxx_nvram_wwn_from_ofw(vha, nv);
2414
2415 nv->login_timeout = 4;
2416
2417 /*
2418 * Set default host adapter parameters
2419 */
2420 nv->host_p[1] = BIT_2;
2421 nv->reset_delay = 5;
2422 nv->port_down_retry_count = 8;
2423 nv->max_luns_per_target = __constant_cpu_to_le16(8);
2424 nv->link_down_timeout = 60;
2425
2426 rval = 1;
2427 }
2428
2429 #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
2430 /*
2431 * The SN2 does not provide BIOS emulation which means you can't change
2432 * potentially bogus BIOS settings. Force the use of default settings
2433 * for link rate and frame size. Hope that the rest of the settings
2434 * are valid.
2435 */
2436 if (ia64_platform_is("sn2")) {
2437 nv->frame_payload_size = __constant_cpu_to_le16(2048);
2438 if (IS_QLA23XX(ha))
2439 nv->special_options[1] = BIT_7;
2440 }
2441 #endif
2442
2443 /* Reset Initialization control block */
2444 memset(icb, 0, ha->init_cb_size);
2445
2446 /*
2447 * Setup driver NVRAM options.
2448 */
2449 nv->firmware_options[0] |= (BIT_6 | BIT_1);
2450 nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
2451 nv->firmware_options[1] |= (BIT_5 | BIT_0);
2452 nv->firmware_options[1] &= ~BIT_4;
2453
2454 if (IS_QLA23XX(ha)) {
2455 nv->firmware_options[0] |= BIT_2;
2456 nv->firmware_options[0] &= ~BIT_3;
2457 nv->special_options[0] &= ~BIT_6;
2458 nv->add_firmware_options[1] |= BIT_5 | BIT_4;
2459
2460 if (IS_QLA2300(ha)) {
2461 if (ha->fb_rev == FPM_2310) {
2462 strcpy(ha->model_number, "QLA2310");
2463 } else {
2464 strcpy(ha->model_number, "QLA2300");
2465 }
2466 } else {
2467 qla2x00_set_model_info(vha, nv->model_number,
2468 sizeof(nv->model_number), "QLA23xx");
2469 }
2470 } else if (IS_QLA2200(ha)) {
2471 nv->firmware_options[0] |= BIT_2;
2472 /*
2473 * 'Point-to-point preferred, else loop' is not a safe
2474 * connection mode setting.
2475 */
2476 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
2477 (BIT_5 | BIT_4)) {
2478 /* Force 'loop preferred, else point-to-point'. */
2479 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
2480 nv->add_firmware_options[0] |= BIT_5;
2481 }
2482 strcpy(ha->model_number, "QLA22xx");
2483 } else /*if (IS_QLA2100(ha))*/ {
2484 strcpy(ha->model_number, "QLA2100");
2485 }
2486
2487 /*
2488 * Copy over NVRAM RISC parameter block to initialization control block.
2489 */
2490 dptr1 = (uint8_t *)icb;
2491 dptr2 = (uint8_t *)&nv->parameter_block_version;
2492 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
2493 while (cnt--)
2494 *dptr1++ = *dptr2++;
2495
2496 /* Copy 2nd half. */
2497 dptr1 = (uint8_t *)icb->add_firmware_options;
2498 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
2499 while (cnt--)
2500 *dptr1++ = *dptr2++;
2501
2502 /* Use alternate WWN? */
2503 if (nv->host_p[1] & BIT_7) {
2504 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
2505 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
2506 }
2507
2508 /* Prepare nodename */
2509 if ((icb->firmware_options[1] & BIT_6) == 0) {
2510 /*
2511 * Firmware will apply the following mask if the nodename was
2512 * not provided.
2513 */
2514 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
2515 icb->node_name[0] &= 0xF0;
2516 }
2517
2518 /*
2519 * Set host adapter parameters.
2520 */
2521
2522 /*
2523 * BIT_7 in the host-parameters section allows for modification to
2524 * internal driver logging.
2525 */
2526 if (nv->host_p[0] & BIT_7)
2527 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK;
2528 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
2529 /* Always load RISC code on non ISP2[12]00 chips. */
2530 if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
2531 ha->flags.disable_risc_code_load = 0;
2532 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
2533 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
2534 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
2535 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
2536 ha->flags.disable_serdes = 0;
2537
2538 ha->operating_mode =
2539 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
2540
2541 memcpy(ha->fw_seriallink_options, nv->seriallink_options,
2542 sizeof(ha->fw_seriallink_options));
2543
2544 /* save HBA serial number */
2545 ha->serial0 = icb->port_name[5];
2546 ha->serial1 = icb->port_name[6];
2547 ha->serial2 = icb->port_name[7];
2548 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
2549 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
2550
2551 icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
2552
2553 ha->retry_count = nv->retry_count;
2554
2555 /* Set minimum login_timeout to 4 seconds. */
2556 if (nv->login_timeout != ql2xlogintimeout)
2557 nv->login_timeout = ql2xlogintimeout;
2558 if (nv->login_timeout < 4)
2559 nv->login_timeout = 4;
2560 ha->login_timeout = nv->login_timeout;
2561 icb->login_timeout = nv->login_timeout;
2562
2563 /* Set minimum RATOV to 100 tenths of a second. */
2564 ha->r_a_tov = 100;
2565
2566 ha->loop_reset_delay = nv->reset_delay;
2567
2568 /* Link Down Timeout = 0:
2569 *
2570 * When Port Down timer expires we will start returning
2571 * I/O's to OS with "DID_NO_CONNECT".
2572 *
2573 * Link Down Timeout != 0:
2574 *
2575 * The driver waits for the link to come up after link down
2576 * before returning I/Os to OS with "DID_NO_CONNECT".
2577 */
2578 if (nv->link_down_timeout == 0) {
2579 ha->loop_down_abort_time =
2580 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
2581 } else {
2582 ha->link_down_timeout = nv->link_down_timeout;
2583 ha->loop_down_abort_time =
2584 (LOOP_DOWN_TIME - ha->link_down_timeout);
2585 }
2586
2587 /*
2588 * Need enough time to try and get the port back.
2589 */
2590 ha->port_down_retry_count = nv->port_down_retry_count;
2591 if (qlport_down_retry)
2592 ha->port_down_retry_count = qlport_down_retry;
2593 /* Set login_retry_count */
2594 ha->login_retry_count = nv->retry_count;
2595 if (ha->port_down_retry_count == nv->port_down_retry_count &&
2596 ha->port_down_retry_count > 3)
2597 ha->login_retry_count = ha->port_down_retry_count;
2598 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
2599 ha->login_retry_count = ha->port_down_retry_count;
2600 if (ql2xloginretrycount)
2601 ha->login_retry_count = ql2xloginretrycount;
2602
2603 icb->lun_enables = __constant_cpu_to_le16(0);
2604 icb->command_resource_count = 0;
2605 icb->immediate_notify_resource_count = 0;
2606 icb->timeout = __constant_cpu_to_le16(0);
2607
2608 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
2609 /* Enable RIO */
2610 icb->firmware_options[0] &= ~BIT_3;
2611 icb->add_firmware_options[0] &=
2612 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
2613 icb->add_firmware_options[0] |= BIT_2;
2614 icb->response_accumulation_timer = 3;
2615 icb->interrupt_delay_timer = 5;
2616
2617 vha->flags.process_response_queue = 1;
2618 } else {
2619 /* Enable ZIO. */
2620 if (!vha->flags.init_done) {
2621 ha->zio_mode = icb->add_firmware_options[0] &
2622 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
2623 ha->zio_timer = icb->interrupt_delay_timer ?
2624 icb->interrupt_delay_timer: 2;
2625 }
2626 icb->add_firmware_options[0] &=
2627 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
2628 vha->flags.process_response_queue = 0;
2629 if (ha->zio_mode != QLA_ZIO_DISABLED) {
2630 ha->zio_mode = QLA_ZIO_MODE_6;
2631
2632 ql_log(ql_log_info, vha, 0x0068,
2633 "ZIO mode %d enabled; timer delay (%d us).\n",
2634 ha->zio_mode, ha->zio_timer * 100);
2635
2636 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
2637 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
2638 vha->flags.process_response_queue = 1;
2639 }
2640 }
2641
2642 if (rval) {
2643 ql_log(ql_log_warn, vha, 0x0069,
2644 "NVRAM configuration failed.\n");
2645 }
2646 return (rval);
2647 }
2648
2649 static void
2650 qla2x00_rport_del(void *data)
2651 {
2652 fc_port_t *fcport = data;
2653 struct fc_rport *rport;
2654 scsi_qla_host_t *vha = fcport->vha;
2655 unsigned long flags;
2656
2657 spin_lock_irqsave(fcport->vha->host->host_lock, flags);
2658 rport = fcport->drport ? fcport->drport: fcport->rport;
2659 fcport->drport = NULL;
2660 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
2661 if (rport) {
2662 fc_remote_port_delete(rport);
2663 /*
2664 * Release the target mode FC NEXUS in qla_target.c code
2665 * if target mod is enabled.
2666 */
2667 qlt_fc_port_deleted(vha, fcport);
2668 }
2669 }
2670
2671 /**
2672 * qla2x00_alloc_fcport() - Allocate a generic fcport.
2673 * @ha: HA context
2674 * @flags: allocation flags
2675 *
2676 * Returns a pointer to the allocated fcport, or NULL, if none available.
2677 */
2678 fc_port_t *
2679 qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
2680 {
2681 fc_port_t *fcport;
2682
2683 fcport = kzalloc(sizeof(fc_port_t), flags);
2684 if (!fcport)
2685 return NULL;
2686
2687 /* Setup fcport template structure. */
2688 fcport->vha = vha;
2689 fcport->port_type = FCT_UNKNOWN;
2690 fcport->loop_id = FC_NO_LOOP_ID;
2691 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED);
2692 fcport->supported_classes = FC_COS_UNSPECIFIED;
2693 fcport->scan_state = QLA_FCPORT_SCAN_NONE;
2694
2695 return fcport;
2696 }
2697
2698 /*
2699 * qla2x00_configure_loop
2700 * Updates Fibre Channel Device Database with what is actually on loop.
2701 *
2702 * Input:
2703 * ha = adapter block pointer.
2704 *
2705 * Returns:
2706 * 0 = success.
2707 * 1 = error.
2708 * 2 = database was full and device was not configured.
2709 */
2710 static int
2711 qla2x00_configure_loop(scsi_qla_host_t *vha)
2712 {
2713 int rval;
2714 unsigned long flags, save_flags;
2715 struct qla_hw_data *ha = vha->hw;
2716 rval = QLA_SUCCESS;
2717
2718 /* Get Initiator ID */
2719 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
2720 rval = qla2x00_configure_hba(vha);
2721 if (rval != QLA_SUCCESS) {
2722 ql_dbg(ql_dbg_disc, vha, 0x2013,
2723 "Unable to configure HBA.\n");
2724 return (rval);
2725 }
2726 }
2727
2728 save_flags = flags = vha->dpc_flags;
2729 ql_dbg(ql_dbg_disc, vha, 0x2014,
2730 "Configure loop -- dpc flags = 0x%lx.\n", flags);
2731
2732 /*
2733 * If we have both an RSCN and PORT UPDATE pending then handle them
2734 * both at the same time.
2735 */
2736 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2737 clear_bit(RSCN_UPDATE, &vha->dpc_flags);
2738
2739 qla2x00_get_data_rate(vha);
2740
2741 /* Determine what we need to do */
2742 if (ha->current_topology == ISP_CFG_FL &&
2743 (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
2744
2745 set_bit(RSCN_UPDATE, &flags);
2746
2747 } else if (ha->current_topology == ISP_CFG_F &&
2748 (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
2749
2750 set_bit(RSCN_UPDATE, &flags);
2751 clear_bit(LOCAL_LOOP_UPDATE, &flags);
2752
2753 } else if (ha->current_topology == ISP_CFG_N) {
2754 clear_bit(RSCN_UPDATE, &flags);
2755
2756 } else if (!vha->flags.online ||
2757 (test_bit(ABORT_ISP_ACTIVE, &flags))) {
2758
2759 set_bit(RSCN_UPDATE, &flags);
2760 set_bit(LOCAL_LOOP_UPDATE, &flags);
2761 }
2762
2763 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
2764 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
2765 ql_dbg(ql_dbg_disc, vha, 0x2015,
2766 "Loop resync needed, failing.\n");
2767 rval = QLA_FUNCTION_FAILED;
2768 } else
2769 rval = qla2x00_configure_local_loop(vha);
2770 }
2771
2772 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
2773 if (LOOP_TRANSITION(vha)) {
2774 ql_dbg(ql_dbg_disc, vha, 0x201e,
2775 "Needs RSCN update and loop transition.\n");
2776 rval = QLA_FUNCTION_FAILED;
2777 }
2778 else
2779 rval = qla2x00_configure_fabric(vha);
2780 }
2781
2782 if (rval == QLA_SUCCESS) {
2783 if (atomic_read(&vha->loop_down_timer) ||
2784 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
2785 rval = QLA_FUNCTION_FAILED;
2786 } else {
2787 atomic_set(&vha->loop_state, LOOP_READY);
2788 ql_dbg(ql_dbg_disc, vha, 0x2069,
2789 "LOOP READY.\n");
2790 }
2791 }
2792
2793 if (rval) {
2794 ql_dbg(ql_dbg_disc, vha, 0x206a,
2795 "%s *** FAILED ***.\n", __func__);
2796 } else {
2797 ql_dbg(ql_dbg_disc, vha, 0x206b,
2798 "%s: exiting normally.\n", __func__);
2799 }
2800
2801 /* Restore state if a resync event occurred during processing */
2802 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
2803 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
2804 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2805 if (test_bit(RSCN_UPDATE, &save_flags)) {
2806 set_bit(RSCN_UPDATE, &vha->dpc_flags);
2807 }
2808 }
2809
2810 return (rval);
2811 }
2812
2813
2814
2815 /*
2816 * qla2x00_configure_local_loop
2817 * Updates Fibre Channel Device Database with local loop devices.
2818 *
2819 * Input:
2820 * ha = adapter block pointer.
2821 *
2822 * Returns:
2823 * 0 = success.
2824 */
2825 static int
2826 qla2x00_configure_local_loop(scsi_qla_host_t *vha)
2827 {
2828 int rval, rval2;
2829 int found_devs;
2830 int found;
2831 fc_port_t *fcport, *new_fcport;
2832
2833 uint16_t index;
2834 uint16_t entries;
2835 char *id_iter;
2836 uint16_t loop_id;
2837 uint8_t domain, area, al_pa;
2838 struct qla_hw_data *ha = vha->hw;
2839
2840 found_devs = 0;
2841 new_fcport = NULL;
2842 entries = MAX_FIBRE_DEVICES_LOOP;
2843
2844 /* Get list of logged in devices. */
2845 memset(ha->gid_list, 0, qla2x00_gid_list_size(ha));
2846 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
2847 &entries);
2848 if (rval != QLA_SUCCESS)
2849 goto cleanup_allocation;
2850
2851 ql_dbg(ql_dbg_disc, vha, 0x2017,
2852 "Entries in ID list (%d).\n", entries);
2853 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075,
2854 (uint8_t *)ha->gid_list,
2855 entries * sizeof(struct gid_list_info));
2856
2857 /* Allocate temporary fcport for any new fcports discovered. */
2858 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
2859 if (new_fcport == NULL) {
2860 ql_log(ql_log_warn, vha, 0x2018,
2861 "Memory allocation failed for fcport.\n");
2862 rval = QLA_MEMORY_ALLOC_FAILED;
2863 goto cleanup_allocation;
2864 }
2865 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
2866
2867 /*
2868 * Mark local devices that were present with FCF_DEVICE_LOST for now.
2869 */
2870 list_for_each_entry(fcport, &vha->vp_fcports, list) {
2871 if (atomic_read(&fcport->state) == FCS_ONLINE &&
2872 fcport->port_type != FCT_BROADCAST &&
2873 (fcport->flags & FCF_FABRIC_DEVICE) == 0) {
2874
2875 ql_dbg(ql_dbg_disc, vha, 0x2019,
2876 "Marking port lost loop_id=0x%04x.\n",
2877 fcport->loop_id);
2878
2879 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
2880 }
2881 }
2882
2883 /* Add devices to port list. */
2884 id_iter = (char *)ha->gid_list;
2885 for (index = 0; index < entries; index++) {
2886 domain = ((struct gid_list_info *)id_iter)->domain;
2887 area = ((struct gid_list_info *)id_iter)->area;
2888 al_pa = ((struct gid_list_info *)id_iter)->al_pa;
2889 if (IS_QLA2100(ha) || IS_QLA2200(ha))
2890 loop_id = (uint16_t)
2891 ((struct gid_list_info *)id_iter)->loop_id_2100;
2892 else
2893 loop_id = le16_to_cpu(
2894 ((struct gid_list_info *)id_iter)->loop_id);
2895 id_iter += ha->gid_list_info_size;
2896
2897 /* Bypass reserved domain fields. */
2898 if ((domain & 0xf0) == 0xf0)
2899 continue;
2900
2901 /* Bypass if not same domain and area of adapter. */
2902 if (area && domain &&
2903 (area != vha->d_id.b.area || domain != vha->d_id.b.domain))
2904 continue;
2905
2906 /* Bypass invalid local loop ID. */
2907 if (loop_id > LAST_LOCAL_LOOP_ID)
2908 continue;
2909
2910 memset(new_fcport, 0, sizeof(fc_port_t));
2911
2912 /* Fill in member data. */
2913 new_fcport->d_id.b.domain = domain;
2914 new_fcport->d_id.b.area = area;
2915 new_fcport->d_id.b.al_pa = al_pa;
2916 new_fcport->loop_id = loop_id;
2917 rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
2918 if (rval2 != QLA_SUCCESS) {
2919 ql_dbg(ql_dbg_disc, vha, 0x201a,
2920 "Failed to retrieve fcport information "
2921 "-- get_port_database=%x, loop_id=0x%04x.\n",
2922 rval2, new_fcport->loop_id);
2923 ql_dbg(ql_dbg_disc, vha, 0x201b,
2924 "Scheduling resync.\n");
2925 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
2926 continue;
2927 }
2928
2929 /* Check for matching device in port list. */
2930 found = 0;
2931 fcport = NULL;
2932 list_for_each_entry(fcport, &vha->vp_fcports, list) {
2933 if (memcmp(new_fcport->port_name, fcport->port_name,
2934 WWN_SIZE))
2935 continue;
2936
2937 fcport->flags &= ~FCF_FABRIC_DEVICE;
2938 fcport->loop_id = new_fcport->loop_id;
2939 fcport->port_type = new_fcport->port_type;
2940 fcport->d_id.b24 = new_fcport->d_id.b24;
2941 memcpy(fcport->node_name, new_fcport->node_name,
2942 WWN_SIZE);
2943
2944 found++;
2945 break;
2946 }
2947
2948 if (!found) {
2949 /* New device, add to fcports list. */
2950 list_add_tail(&new_fcport->list, &vha->vp_fcports);
2951
2952 /* Allocate a new replacement fcport. */
2953 fcport = new_fcport;
2954 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
2955 if (new_fcport == NULL) {
2956 ql_log(ql_log_warn, vha, 0x201c,
2957 "Failed to allocate memory for fcport.\n");
2958 rval = QLA_MEMORY_ALLOC_FAILED;
2959 goto cleanup_allocation;
2960 }
2961 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
2962 }
2963
2964 /* Base iIDMA settings on HBA port speed. */
2965 fcport->fp_speed = ha->link_data_rate;
2966
2967 qla2x00_update_fcport(vha, fcport);
2968
2969 found_devs++;
2970 }
2971
2972 cleanup_allocation:
2973 kfree(new_fcport);
2974
2975 if (rval != QLA_SUCCESS) {
2976 ql_dbg(ql_dbg_disc, vha, 0x201d,
2977 "Configure local loop error exit: rval=%x.\n", rval);
2978 }
2979
2980 return (rval);
2981 }
2982
2983 static void
2984 qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
2985 {
2986 char *link_speed;
2987 int rval;
2988 uint16_t mb[4];
2989 struct qla_hw_data *ha = vha->hw;
2990
2991 if (!IS_IIDMA_CAPABLE(ha))
2992 return;
2993
2994 if (atomic_read(&fcport->state) != FCS_ONLINE)
2995 return;
2996
2997 if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
2998 fcport->fp_speed > ha->link_data_rate)
2999 return;
3000
3001 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
3002 mb);
3003 if (rval != QLA_SUCCESS) {
3004 ql_dbg(ql_dbg_disc, vha, 0x2004,
3005 "Unable to adjust iIDMA "
3006 "%02x%02x%02x%02x%02x%02x%02x%02x -- %04x %x %04x "
3007 "%04x.\n", fcport->port_name[0], fcport->port_name[1],
3008 fcport->port_name[2], fcport->port_name[3],
3009 fcport->port_name[4], fcport->port_name[5],
3010 fcport->port_name[6], fcport->port_name[7], rval,
3011 fcport->fp_speed, mb[0], mb[1]);
3012 } else {
3013 link_speed = qla2x00_get_link_speed_str(ha);
3014 ql_dbg(ql_dbg_disc, vha, 0x2005,
3015 "iIDMA adjusted to %s GB/s "
3016 "on %02x%02x%02x%02x%02x%02x%02x%02x.\n", link_speed,
3017 fcport->port_name[0], fcport->port_name[1],
3018 fcport->port_name[2], fcport->port_name[3],
3019 fcport->port_name[4], fcport->port_name[5],
3020 fcport->port_name[6], fcport->port_name[7]);
3021 }
3022 }
3023
3024 static void
3025 qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
3026 {
3027 struct fc_rport_identifiers rport_ids;
3028 struct fc_rport *rport;
3029 unsigned long flags;
3030
3031 qla2x00_rport_del(fcport);
3032
3033 rport_ids.node_name = wwn_to_u64(fcport->node_name);
3034 rport_ids.port_name = wwn_to_u64(fcport->port_name);
3035 rport_ids.port_id = fcport->d_id.b.domain << 16 |
3036 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
3037 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
3038 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
3039 if (!rport) {
3040 ql_log(ql_log_warn, vha, 0x2006,
3041 "Unable to allocate fc remote port.\n");
3042 return;
3043 }
3044 /*
3045 * Create target mode FC NEXUS in qla_target.c if target mode is
3046 * enabled..
3047 */
3048 qlt_fc_port_added(vha, fcport);
3049
3050 spin_lock_irqsave(fcport->vha->host->host_lock, flags);
3051 *((fc_port_t **)rport->dd_data) = fcport;
3052 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
3053
3054 rport->supported_classes = fcport->supported_classes;
3055
3056 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
3057 if (fcport->port_type == FCT_INITIATOR)
3058 rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR;
3059 if (fcport->port_type == FCT_TARGET)
3060 rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET;
3061 fc_remote_port_rolechg(rport, rport_ids.roles);
3062 }
3063
3064 /*
3065 * qla2x00_update_fcport
3066 * Updates device on list.
3067 *
3068 * Input:
3069 * ha = adapter block pointer.
3070 * fcport = port structure pointer.
3071 *
3072 * Return:
3073 * 0 - Success
3074 * BIT_0 - error
3075 *
3076 * Context:
3077 * Kernel context.
3078 */
3079 void
3080 qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
3081 {
3082 fcport->vha = vha;
3083 fcport->login_retry = 0;
3084 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
3085
3086 qla2x00_iidma_fcport(vha, fcport);
3087 qla24xx_update_fcport_fcp_prio(vha, fcport);
3088 qla2x00_reg_remote_port(vha, fcport);
3089 qla2x00_set_fcport_state(fcport, FCS_ONLINE);
3090 }
3091
3092 /*
3093 * qla2x00_configure_fabric
3094 * Setup SNS devices with loop ID's.
3095 *
3096 * Input:
3097 * ha = adapter block pointer.
3098 *
3099 * Returns:
3100 * 0 = success.
3101 * BIT_0 = error
3102 */
3103 static int
3104 qla2x00_configure_fabric(scsi_qla_host_t *vha)
3105 {
3106 int rval;
3107 fc_port_t *fcport;
3108 uint16_t next_loopid;
3109 uint16_t mb[MAILBOX_REGISTER_COUNT];
3110 uint16_t loop_id;
3111 LIST_HEAD(new_fcports);
3112 struct qla_hw_data *ha = vha->hw;
3113 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
3114
3115 /* If FL port exists, then SNS is present */
3116 if (IS_FWI2_CAPABLE(ha))
3117 loop_id = NPH_F_PORT;
3118 else
3119 loop_id = SNS_FL_PORT;
3120 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
3121 if (rval != QLA_SUCCESS) {
3122 ql_dbg(ql_dbg_disc, vha, 0x201f,
3123 "MBX_GET_PORT_NAME failed, No FL Port.\n");
3124
3125 vha->device_flags &= ~SWITCH_FOUND;
3126 return (QLA_SUCCESS);
3127 }
3128 vha->device_flags |= SWITCH_FOUND;
3129
3130 do {
3131 /* FDMI support. */
3132 if (ql2xfdmienable &&
3133 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
3134 qla2x00_fdmi_register(vha);
3135
3136 /* Ensure we are logged into the SNS. */
3137 if (IS_FWI2_CAPABLE(ha))
3138 loop_id = NPH_SNS;
3139 else
3140 loop_id = SIMPLE_NAME_SERVER;
3141 rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
3142 0xfc, mb, BIT_1|BIT_0);
3143 if (rval != QLA_SUCCESS) {
3144 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
3145 break;
3146 }
3147 if (mb[0] != MBS_COMMAND_COMPLETE) {
3148 ql_dbg(ql_dbg_disc, vha, 0x2042,
3149 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x "
3150 "mb[6]=%x mb[7]=%x.\n", loop_id, mb[0], mb[1],
3151 mb[2], mb[6], mb[7]);
3152 return (QLA_SUCCESS);
3153 }
3154
3155 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
3156 if (qla2x00_rft_id(vha)) {
3157 /* EMPTY */
3158 ql_dbg(ql_dbg_disc, vha, 0x2045,
3159 "Register FC-4 TYPE failed.\n");
3160 }
3161 if (qla2x00_rff_id(vha)) {
3162 /* EMPTY */
3163 ql_dbg(ql_dbg_disc, vha, 0x2049,
3164 "Register FC-4 Features failed.\n");
3165 }
3166 if (qla2x00_rnn_id(vha)) {
3167 /* EMPTY */
3168 ql_dbg(ql_dbg_disc, vha, 0x204f,
3169 "Register Node Name failed.\n");
3170 } else if (qla2x00_rsnn_nn(vha)) {
3171 /* EMPTY */
3172 ql_dbg(ql_dbg_disc, vha, 0x2053,
3173 "Register Symobilic Node Name failed.\n");
3174 }
3175 }
3176
3177 rval = qla2x00_find_all_fabric_devs(vha, &new_fcports);
3178 if (rval != QLA_SUCCESS)
3179 break;
3180
3181 /* Add new ports to existing port list */
3182 list_splice_tail_init(&new_fcports, &vha->vp_fcports);
3183
3184 /* Starting free loop ID. */
3185 next_loopid = ha->min_external_loopid;
3186
3187 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3188 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
3189 break;
3190
3191 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
3192 continue;
3193
3194 /* Logout lost/gone fabric devices (non-FCP2) */
3195 if (fcport->scan_state != QLA_FCPORT_SCAN_FOUND &&
3196 atomic_read(&fcport->state) == FCS_ONLINE) {
3197 qla2x00_mark_device_lost(vha, fcport,
3198 ql2xplogiabsentdevice, 0);
3199 if (fcport->loop_id != FC_NO_LOOP_ID &&
3200 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
3201 fcport->port_type != FCT_INITIATOR &&
3202 fcport->port_type != FCT_BROADCAST) {
3203 ha->isp_ops->fabric_logout(vha,
3204 fcport->loop_id,
3205 fcport->d_id.b.domain,
3206 fcport->d_id.b.area,
3207 fcport->d_id.b.al_pa);
3208 }
3209 continue;
3210 }
3211 fcport->scan_state = QLA_FCPORT_SCAN_NONE;
3212
3213 /* Login fabric devices that need a login */
3214 if ((fcport->flags & FCF_LOGIN_NEEDED) != 0 &&
3215 atomic_read(&vha->loop_down_timer) == 0) {
3216 if (fcport->loop_id == FC_NO_LOOP_ID) {
3217 fcport->loop_id = next_loopid;
3218 rval = qla2x00_find_new_loop_id(
3219 base_vha, fcport);
3220 if (rval != QLA_SUCCESS) {
3221 /* Ran out of IDs to use */
3222 continue;
3223 }
3224 }
3225 }
3226
3227 /* Login and update database */
3228 qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
3229 }
3230 } while (0);
3231
3232 if (rval) {
3233 ql_dbg(ql_dbg_disc, vha, 0x2068,
3234 "Configure fabric error exit rval=%d.\n", rval);
3235 }
3236
3237 return (rval);
3238 }
3239
3240 /*
3241 * qla2x00_find_all_fabric_devs
3242 *
3243 * Input:
3244 * ha = adapter block pointer.
3245 * dev = database device entry pointer.
3246 *
3247 * Returns:
3248 * 0 = success.
3249 *
3250 * Context:
3251 * Kernel context.
3252 */
3253 static int
3254 qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha,
3255 struct list_head *new_fcports)
3256 {
3257 int rval;
3258 uint16_t loop_id;
3259 fc_port_t *fcport, *new_fcport, *fcptemp;
3260 int found;
3261
3262 sw_info_t *swl;
3263 int swl_idx;
3264 int first_dev, last_dev;
3265 port_id_t wrap = {}, nxt_d_id;
3266 struct qla_hw_data *ha = vha->hw;
3267 struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev);
3268 struct scsi_qla_host *tvp;
3269
3270 rval = QLA_SUCCESS;
3271
3272 /* Try GID_PT to get device list, else GAN. */
3273 if (!ha->swl)
3274 ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t),
3275 GFP_KERNEL);
3276 swl = ha->swl;
3277 if (!swl) {
3278 /*EMPTY*/
3279 ql_dbg(ql_dbg_disc, vha, 0x2054,
3280 "GID_PT allocations failed, fallback on GA_NXT.\n");
3281 } else {
3282 memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t));
3283 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
3284 swl = NULL;
3285 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
3286 swl = NULL;
3287 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
3288 swl = NULL;
3289 } else if (ql2xiidmaenable &&
3290 qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) {
3291 qla2x00_gpsc(vha, swl);
3292 }
3293
3294 /* If other queries succeeded probe for FC-4 type */
3295 if (swl)
3296 qla2x00_gff_id(vha, swl);
3297 }
3298 swl_idx = 0;
3299
3300 /* Allocate temporary fcport for any new fcports discovered. */
3301 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
3302 if (new_fcport == NULL) {
3303 ql_log(ql_log_warn, vha, 0x205e,
3304 "Failed to allocate memory for fcport.\n");
3305 return (QLA_MEMORY_ALLOC_FAILED);
3306 }
3307 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
3308 /* Set start port ID scan at adapter ID. */
3309 first_dev = 1;
3310 last_dev = 0;
3311
3312 /* Starting free loop ID. */
3313 loop_id = ha->min_external_loopid;
3314 for (; loop_id <= ha->max_loop_id; loop_id++) {
3315 if (qla2x00_is_reserved_id(vha, loop_id))
3316 continue;
3317
3318 if (ha->current_topology == ISP_CFG_FL &&
3319 (atomic_read(&vha->loop_down_timer) ||
3320 LOOP_TRANSITION(vha))) {
3321 atomic_set(&vha->loop_down_timer, 0);
3322 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
3323 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
3324 break;
3325 }
3326
3327 if (swl != NULL) {
3328 if (last_dev) {
3329 wrap.b24 = new_fcport->d_id.b24;
3330 } else {
3331 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
3332 memcpy(new_fcport->node_name,
3333 swl[swl_idx].node_name, WWN_SIZE);
3334 memcpy(new_fcport->port_name,
3335 swl[swl_idx].port_name, WWN_SIZE);
3336 memcpy(new_fcport->fabric_port_name,
3337 swl[swl_idx].fabric_port_name, WWN_SIZE);
3338 new_fcport->fp_speed = swl[swl_idx].fp_speed;
3339 new_fcport->fc4_type = swl[swl_idx].fc4_type;
3340
3341 if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
3342 last_dev = 1;
3343 }
3344 swl_idx++;
3345 }
3346 } else {
3347 /* Send GA_NXT to the switch */
3348 rval = qla2x00_ga_nxt(vha, new_fcport);
3349 if (rval != QLA_SUCCESS) {
3350 ql_log(ql_log_warn, vha, 0x2064,
3351 "SNS scan failed -- assuming "
3352 "zero-entry result.\n");
3353 list_for_each_entry_safe(fcport, fcptemp,
3354 new_fcports, list) {
3355 list_del(&fcport->list);
3356 kfree(fcport);
3357 }
3358 rval = QLA_SUCCESS;
3359 break;
3360 }
3361 }
3362
3363 /* If wrap on switch device list, exit. */
3364 if (first_dev) {
3365 wrap.b24 = new_fcport->d_id.b24;
3366 first_dev = 0;
3367 } else if (new_fcport->d_id.b24 == wrap.b24) {
3368 ql_dbg(ql_dbg_disc, vha, 0x2065,
3369 "Device wrap (%02x%02x%02x).\n",
3370 new_fcport->d_id.b.domain,
3371 new_fcport->d_id.b.area,
3372 new_fcport->d_id.b.al_pa);
3373 break;
3374 }
3375
3376 /* Bypass if same physical adapter. */
3377 if (new_fcport->d_id.b24 == base_vha->d_id.b24)
3378 continue;
3379
3380 /* Bypass virtual ports of the same host. */
3381 found = 0;
3382 if (ha->num_vhosts) {
3383 unsigned long flags;
3384
3385 spin_lock_irqsave(&ha->vport_slock, flags);
3386 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
3387 if (new_fcport->d_id.b24 == vp->d_id.b24) {
3388 found = 1;
3389 break;
3390 }
3391 }
3392 spin_unlock_irqrestore(&ha->vport_slock, flags);
3393
3394 if (found)
3395 continue;
3396 }
3397
3398 /* Bypass if same domain and area of adapter. */
3399 if (((new_fcport->d_id.b24 & 0xffff00) ==
3400 (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
3401 ISP_CFG_FL)
3402 continue;
3403
3404 /* Bypass reserved domain fields. */
3405 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
3406 continue;
3407
3408 /* Bypass ports whose FCP-4 type is not FCP_SCSI */
3409 if (ql2xgffidenable &&
3410 (new_fcport->fc4_type != FC4_TYPE_FCP_SCSI &&
3411 new_fcport->fc4_type != FC4_TYPE_UNKNOWN))
3412 continue;
3413
3414 /* Locate matching device in database. */
3415 found = 0;
3416 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3417 if (memcmp(new_fcport->port_name, fcport->port_name,
3418 WWN_SIZE))
3419 continue;
3420
3421 fcport->scan_state = QLA_FCPORT_SCAN_FOUND;
3422
3423 found++;
3424
3425 /* Update port state. */
3426 memcpy(fcport->fabric_port_name,
3427 new_fcport->fabric_port_name, WWN_SIZE);
3428 fcport->fp_speed = new_fcport->fp_speed;
3429
3430 /*
3431 * If address the same and state FCS_ONLINE, nothing
3432 * changed.
3433 */
3434 if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
3435 atomic_read(&fcport->state) == FCS_ONLINE) {
3436 break;
3437 }
3438
3439 /*
3440 * If device was not a fabric device before.
3441 */
3442 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
3443 fcport->d_id.b24 = new_fcport->d_id.b24;
3444 qla2x00_clear_loop_id(fcport);
3445 fcport->flags |= (FCF_FABRIC_DEVICE |
3446 FCF_LOGIN_NEEDED);
3447 break;
3448 }
3449
3450 /*
3451 * Port ID changed or device was marked to be updated;
3452 * Log it out if still logged in and mark it for
3453 * relogin later.
3454 */
3455 fcport->d_id.b24 = new_fcport->d_id.b24;
3456 fcport->flags |= FCF_LOGIN_NEEDED;
3457 if (fcport->loop_id != FC_NO_LOOP_ID &&
3458 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
3459 (fcport->flags & FCF_ASYNC_SENT) == 0 &&
3460 fcport->port_type != FCT_INITIATOR &&
3461 fcport->port_type != FCT_BROADCAST) {
3462 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
3463 fcport->d_id.b.domain, fcport->d_id.b.area,
3464 fcport->d_id.b.al_pa);
3465 qla2x00_clear_loop_id(fcport);
3466 }
3467
3468 break;
3469 }
3470
3471 if (found)
3472 continue;
3473 /* If device was not in our fcports list, then add it. */
3474 list_add_tail(&new_fcport->list, new_fcports);
3475
3476 /* Allocate a new replacement fcport. */
3477 nxt_d_id.b24 = new_fcport->d_id.b24;
3478 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
3479 if (new_fcport == NULL) {
3480 ql_log(ql_log_warn, vha, 0x2066,
3481 "Memory allocation failed for fcport.\n");
3482 return (QLA_MEMORY_ALLOC_FAILED);
3483 }
3484 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
3485 new_fcport->d_id.b24 = nxt_d_id.b24;
3486 }
3487
3488 kfree(new_fcport);
3489
3490 return (rval);
3491 }
3492
3493 /*
3494 * qla2x00_find_new_loop_id
3495 * Scan through our port list and find a new usable loop ID.
3496 *
3497 * Input:
3498 * ha: adapter state pointer.
3499 * dev: port structure pointer.
3500 *
3501 * Returns:
3502 * qla2x00 local function return status code.
3503 *
3504 * Context:
3505 * Kernel context.
3506 */
3507 int
3508 qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
3509 {
3510 int rval;
3511 struct qla_hw_data *ha = vha->hw;
3512 unsigned long flags = 0;
3513
3514 rval = QLA_SUCCESS;
3515
3516 spin_lock_irqsave(&ha->vport_slock, flags);
3517
3518 dev->loop_id = find_first_zero_bit(ha->loop_id_map,
3519 LOOPID_MAP_SIZE);
3520 if (dev->loop_id >= LOOPID_MAP_SIZE ||
3521 qla2x00_is_reserved_id(vha, dev->loop_id)) {
3522 dev->loop_id = FC_NO_LOOP_ID;
3523 rval = QLA_FUNCTION_FAILED;
3524 } else
3525 set_bit(dev->loop_id, ha->loop_id_map);
3526
3527 spin_unlock_irqrestore(&ha->vport_slock, flags);
3528
3529 if (rval == QLA_SUCCESS)
3530 ql_dbg(ql_dbg_disc, dev->vha, 0x2086,
3531 "Assigning new loopid=%x, portid=%x.\n",
3532 dev->loop_id, dev->d_id.b24);
3533 else
3534 ql_log(ql_log_warn, dev->vha, 0x2087,
3535 "No loop_id's available, portid=%x.\n",
3536 dev->d_id.b24);
3537
3538 return (rval);
3539 }
3540
3541 /*
3542 * qla2x00_fabric_dev_login
3543 * Login fabric target device and update FC port database.
3544 *
3545 * Input:
3546 * ha: adapter state pointer.
3547 * fcport: port structure list pointer.
3548 * next_loopid: contains value of a new loop ID that can be used
3549 * by the next login attempt.
3550 *
3551 * Returns:
3552 * qla2x00 local function return status code.
3553 *
3554 * Context:
3555 * Kernel context.
3556 */
3557 static int
3558 qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport,
3559 uint16_t *next_loopid)
3560 {
3561 int rval;
3562 int retry;
3563 uint8_t opts;
3564 struct qla_hw_data *ha = vha->hw;
3565
3566 rval = QLA_SUCCESS;
3567 retry = 0;
3568
3569 if (IS_ALOGIO_CAPABLE(ha)) {
3570 if (fcport->flags & FCF_ASYNC_SENT)
3571 return rval;
3572 fcport->flags |= FCF_ASYNC_SENT;
3573 rval = qla2x00_post_async_login_work(vha, fcport, NULL);
3574 if (!rval)
3575 return rval;
3576 }
3577
3578 fcport->flags &= ~FCF_ASYNC_SENT;
3579 rval = qla2x00_fabric_login(vha, fcport, next_loopid);
3580 if (rval == QLA_SUCCESS) {
3581 /* Send an ADISC to FCP2 devices.*/
3582 opts = 0;
3583 if (fcport->flags & FCF_FCP2_DEVICE)
3584 opts |= BIT_1;
3585 rval = qla2x00_get_port_database(vha, fcport, opts);
3586 if (rval != QLA_SUCCESS) {
3587 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
3588 fcport->d_id.b.domain, fcport->d_id.b.area,
3589 fcport->d_id.b.al_pa);
3590 qla2x00_mark_device_lost(vha, fcport, 1, 0);
3591 } else {
3592 qla2x00_update_fcport(vha, fcport);
3593 }
3594 } else {
3595 /* Retry Login. */
3596 qla2x00_mark_device_lost(vha, fcport, 1, 0);
3597 }
3598
3599 return (rval);
3600 }
3601
3602 /*
3603 * qla2x00_fabric_login
3604 * Issue fabric login command.
3605 *
3606 * Input:
3607 * ha = adapter block pointer.
3608 * device = pointer to FC device type structure.
3609 *
3610 * Returns:
3611 * 0 - Login successfully
3612 * 1 - Login failed
3613 * 2 - Initiator device
3614 * 3 - Fatal error
3615 */
3616 int
3617 qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
3618 uint16_t *next_loopid)
3619 {
3620 int rval;
3621 int retry;
3622 uint16_t tmp_loopid;
3623 uint16_t mb[MAILBOX_REGISTER_COUNT];
3624 struct qla_hw_data *ha = vha->hw;
3625
3626 retry = 0;
3627 tmp_loopid = 0;
3628
3629 for (;;) {
3630 ql_dbg(ql_dbg_disc, vha, 0x2000,
3631 "Trying Fabric Login w/loop id 0x%04x for port "
3632 "%02x%02x%02x.\n",
3633 fcport->loop_id, fcport->d_id.b.domain,
3634 fcport->d_id.b.area, fcport->d_id.b.al_pa);
3635
3636 /* Login fcport on switch. */
3637 rval = ha->isp_ops->fabric_login(vha, fcport->loop_id,
3638 fcport->d_id.b.domain, fcport->d_id.b.area,
3639 fcport->d_id.b.al_pa, mb, BIT_0);
3640 if (rval != QLA_SUCCESS) {
3641 return rval;
3642 }
3643 if (mb[0] == MBS_PORT_ID_USED) {
3644 /*
3645 * Device has another loop ID. The firmware team
3646 * recommends the driver perform an implicit login with
3647 * the specified ID again. The ID we just used is save
3648 * here so we return with an ID that can be tried by
3649 * the next login.
3650 */
3651 retry++;
3652 tmp_loopid = fcport->loop_id;
3653 fcport->loop_id = mb[1];
3654
3655 ql_dbg(ql_dbg_disc, vha, 0x2001,
3656 "Fabric Login: port in use - next loop "
3657 "id=0x%04x, port id= %02x%02x%02x.\n",
3658 fcport->loop_id, fcport->d_id.b.domain,
3659 fcport->d_id.b.area, fcport->d_id.b.al_pa);
3660
3661 } else if (mb[0] == MBS_COMMAND_COMPLETE) {
3662 /*
3663 * Login succeeded.
3664 */
3665 if (retry) {
3666 /* A retry occurred before. */
3667 *next_loopid = tmp_loopid;
3668 } else {
3669 /*
3670 * No retry occurred before. Just increment the
3671 * ID value for next login.
3672 */
3673 *next_loopid = (fcport->loop_id + 1);
3674 }
3675
3676 if (mb[1] & BIT_0) {
3677 fcport->port_type = FCT_INITIATOR;
3678 } else {
3679 fcport->port_type = FCT_TARGET;
3680 if (mb[1] & BIT_1) {
3681 fcport->flags |= FCF_FCP2_DEVICE;
3682 }
3683 }
3684
3685 if (mb[10] & BIT_0)
3686 fcport->supported_classes |= FC_COS_CLASS2;
3687 if (mb[10] & BIT_1)
3688 fcport->supported_classes |= FC_COS_CLASS3;
3689
3690 if (IS_FWI2_CAPABLE(ha)) {
3691 if (mb[10] & BIT_7)
3692 fcport->flags |=
3693 FCF_CONF_COMP_SUPPORTED;
3694 }
3695
3696 rval = QLA_SUCCESS;
3697 break;
3698 } else if (mb[0] == MBS_LOOP_ID_USED) {
3699 /*
3700 * Loop ID already used, try next loop ID.
3701 */
3702 fcport->loop_id++;
3703 rval = qla2x00_find_new_loop_id(vha, fcport);
3704 if (rval != QLA_SUCCESS) {
3705 /* Ran out of loop IDs to use */
3706 break;
3707 }
3708 } else if (mb[0] == MBS_COMMAND_ERROR) {
3709 /*
3710 * Firmware possibly timed out during login. If NO
3711 * retries are left to do then the device is declared
3712 * dead.
3713 */
3714 *next_loopid = fcport->loop_id;
3715 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
3716 fcport->d_id.b.domain, fcport->d_id.b.area,
3717 fcport->d_id.b.al_pa);
3718 qla2x00_mark_device_lost(vha, fcport, 1, 0);
3719
3720 rval = 1;
3721 break;
3722 } else {
3723 /*
3724 * unrecoverable / not handled error
3725 */
3726 ql_dbg(ql_dbg_disc, vha, 0x2002,
3727 "Failed=%x port_id=%02x%02x%02x loop_id=%x "
3728 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain,
3729 fcport->d_id.b.area, fcport->d_id.b.al_pa,
3730 fcport->loop_id, jiffies);
3731
3732 *next_loopid = fcport->loop_id;
3733 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
3734 fcport->d_id.b.domain, fcport->d_id.b.area,
3735 fcport->d_id.b.al_pa);
3736 qla2x00_clear_loop_id(fcport);
3737 fcport->login_retry = 0;
3738
3739 rval = 3;
3740 break;
3741 }
3742 }
3743
3744 return (rval);
3745 }
3746
3747 /*
3748 * qla2x00_local_device_login
3749 * Issue local device login command.
3750 *
3751 * Input:
3752 * ha = adapter block pointer.
3753 * loop_id = loop id of device to login to.
3754 *
3755 * Returns (Where's the #define!!!!):
3756 * 0 - Login successfully
3757 * 1 - Login failed
3758 * 3 - Fatal error
3759 */
3760 int
3761 qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
3762 {
3763 int rval;
3764 uint16_t mb[MAILBOX_REGISTER_COUNT];
3765
3766 memset(mb, 0, sizeof(mb));
3767 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
3768 if (rval == QLA_SUCCESS) {
3769 /* Interrogate mailbox registers for any errors */
3770 if (mb[0] == MBS_COMMAND_ERROR)
3771 rval = 1;
3772 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
3773 /* device not in PCB table */
3774 rval = 3;
3775 }
3776
3777 return (rval);
3778 }
3779
3780 /*
3781 * qla2x00_loop_resync
3782 * Resync with fibre channel devices.
3783 *
3784 * Input:
3785 * ha = adapter block pointer.
3786 *
3787 * Returns:
3788 * 0 = success
3789 */
3790 int
3791 qla2x00_loop_resync(scsi_qla_host_t *vha)
3792 {
3793 int rval = QLA_SUCCESS;
3794 uint32_t wait_time;
3795 struct req_que *req;
3796 struct rsp_que *rsp;
3797
3798 if (vha->hw->flags.cpu_affinity_enabled)
3799 req = vha->hw->req_q_map[0];
3800 else
3801 req = vha->req;
3802 rsp = req->rsp;
3803
3804 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
3805 if (vha->flags.online) {
3806 if (!(rval = qla2x00_fw_ready(vha))) {
3807 /* Wait at most MAX_TARGET RSCNs for a stable link. */
3808 wait_time = 256;
3809 do {
3810 /* Issue a marker after FW becomes ready. */
3811 qla2x00_marker(vha, req, rsp, 0, 0,
3812 MK_SYNC_ALL);
3813 vha->marker_needed = 0;
3814
3815 /* Remap devices on Loop. */
3816 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
3817
3818 qla2x00_configure_loop(vha);
3819 wait_time--;
3820 } while (!atomic_read(&vha->loop_down_timer) &&
3821 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
3822 && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
3823 &vha->dpc_flags)));
3824 }
3825 }
3826
3827 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
3828 return (QLA_FUNCTION_FAILED);
3829
3830 if (rval)
3831 ql_dbg(ql_dbg_disc, vha, 0x206c,
3832 "%s *** FAILED ***.\n", __func__);
3833
3834 return (rval);
3835 }
3836
3837 /*
3838 * qla2x00_perform_loop_resync
3839 * Description: This function will set the appropriate flags and call
3840 * qla2x00_loop_resync. If successful loop will be resynced
3841 * Arguments : scsi_qla_host_t pointer
3842 * returm : Success or Failure
3843 */
3844
3845 int qla2x00_perform_loop_resync(scsi_qla_host_t *ha)
3846 {
3847 int32_t rval = 0;
3848
3849 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) {
3850 /*Configure the flags so that resync happens properly*/
3851 atomic_set(&ha->loop_down_timer, 0);
3852 if (!(ha->device_flags & DFLG_NO_CABLE)) {
3853 atomic_set(&ha->loop_state, LOOP_UP);
3854 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags);
3855 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags);
3856 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
3857
3858 rval = qla2x00_loop_resync(ha);
3859 } else
3860 atomic_set(&ha->loop_state, LOOP_DEAD);
3861
3862 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags);
3863 }
3864
3865 return rval;
3866 }
3867
3868 void
3869 qla2x00_update_fcports(scsi_qla_host_t *base_vha)
3870 {
3871 fc_port_t *fcport;
3872 struct scsi_qla_host *vha;
3873 struct qla_hw_data *ha = base_vha->hw;
3874 unsigned long flags;
3875
3876 spin_lock_irqsave(&ha->vport_slock, flags);
3877 /* Go with deferred removal of rport references. */
3878 list_for_each_entry(vha, &base_vha->hw->vp_list, list) {
3879 atomic_inc(&vha->vref_count);
3880 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3881 if (fcport->drport &&
3882 atomic_read(&fcport->state) != FCS_UNCONFIGURED) {
3883 spin_unlock_irqrestore(&ha->vport_slock, flags);
3884
3885 qla2x00_rport_del(fcport);
3886
3887 spin_lock_irqsave(&ha->vport_slock, flags);
3888 }
3889 }
3890 atomic_dec(&vha->vref_count);
3891 }
3892 spin_unlock_irqrestore(&ha->vport_slock, flags);
3893 }
3894
3895 /* Assumes idc_lock always held on entry */
3896 void
3897 qla83xx_reset_ownership(scsi_qla_host_t *vha)
3898 {
3899 struct qla_hw_data *ha = vha->hw;
3900 uint32_t drv_presence, drv_presence_mask;
3901 uint32_t dev_part_info1, dev_part_info2, class_type;
3902 uint32_t class_type_mask = 0x3;
3903 uint16_t fcoe_other_function = 0xffff, i;
3904
3905 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
3906
3907 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO1, &dev_part_info1);
3908 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO2, &dev_part_info2);
3909 for (i = 0; i < 8; i++) {
3910 class_type = ((dev_part_info1 >> (i * 4)) & class_type_mask);
3911 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) &&
3912 (i != ha->portnum)) {
3913 fcoe_other_function = i;
3914 break;
3915 }
3916 }
3917 if (fcoe_other_function == 0xffff) {
3918 for (i = 0; i < 8; i++) {
3919 class_type = ((dev_part_info2 >> (i * 4)) &
3920 class_type_mask);
3921 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) &&
3922 ((i + 8) != ha->portnum)) {
3923 fcoe_other_function = i + 8;
3924 break;
3925 }
3926 }
3927 }
3928 /*
3929 * Prepare drv-presence mask based on fcoe functions present.
3930 * However consider only valid physical fcoe function numbers (0-15).
3931 */
3932 drv_presence_mask = ~((1 << (ha->portnum)) |
3933 ((fcoe_other_function == 0xffff) ?
3934 0 : (1 << (fcoe_other_function))));
3935
3936 /* We are the reset owner iff:
3937 * - No other protocol drivers present.
3938 * - This is the lowest among fcoe functions. */
3939 if (!(drv_presence & drv_presence_mask) &&
3940 (ha->portnum < fcoe_other_function)) {
3941 ql_dbg(ql_dbg_p3p, vha, 0xb07f,
3942 "This host is Reset owner.\n");
3943 ha->flags.nic_core_reset_owner = 1;
3944 }
3945 }
3946
3947 static int
3948 __qla83xx_set_drv_ack(scsi_qla_host_t *vha)
3949 {
3950 int rval = QLA_SUCCESS;
3951 struct qla_hw_data *ha = vha->hw;
3952 uint32_t drv_ack;
3953
3954 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
3955 if (rval == QLA_SUCCESS) {
3956 drv_ack |= (1 << ha->portnum);
3957 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack);
3958 }
3959
3960 return rval;
3961 }
3962
3963 static int
3964 __qla83xx_clear_drv_ack(scsi_qla_host_t *vha)
3965 {
3966 int rval = QLA_SUCCESS;
3967 struct qla_hw_data *ha = vha->hw;
3968 uint32_t drv_ack;
3969
3970 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
3971 if (rval == QLA_SUCCESS) {
3972 drv_ack &= ~(1 << ha->portnum);
3973 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack);
3974 }
3975
3976 return rval;
3977 }
3978
3979 static const char *
3980 qla83xx_dev_state_to_string(uint32_t dev_state)
3981 {
3982 switch (dev_state) {
3983 case QLA8XXX_DEV_COLD:
3984 return "COLD/RE-INIT";
3985 case QLA8XXX_DEV_INITIALIZING:
3986 return "INITIALIZING";
3987 case QLA8XXX_DEV_READY:
3988 return "READY";
3989 case QLA8XXX_DEV_NEED_RESET:
3990 return "NEED RESET";
3991 case QLA8XXX_DEV_NEED_QUIESCENT:
3992 return "NEED QUIESCENT";
3993 case QLA8XXX_DEV_FAILED:
3994 return "FAILED";
3995 case QLA8XXX_DEV_QUIESCENT:
3996 return "QUIESCENT";
3997 default:
3998 return "Unknown";
3999 }
4000 }
4001
4002 /* Assumes idc-lock always held on entry */
4003 void
4004 qla83xx_idc_audit(scsi_qla_host_t *vha, int audit_type)
4005 {
4006 struct qla_hw_data *ha = vha->hw;
4007 uint32_t idc_audit_reg = 0, duration_secs = 0;
4008
4009 switch (audit_type) {
4010 case IDC_AUDIT_TIMESTAMP:
4011 ha->idc_audit_ts = (jiffies_to_msecs(jiffies) / 1000);
4012 idc_audit_reg = (ha->portnum) |
4013 (IDC_AUDIT_TIMESTAMP << 7) | (ha->idc_audit_ts << 8);
4014 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg);
4015 break;
4016
4017 case IDC_AUDIT_COMPLETION:
4018 duration_secs = ((jiffies_to_msecs(jiffies) -
4019 jiffies_to_msecs(ha->idc_audit_ts)) / 1000);
4020 idc_audit_reg = (ha->portnum) |
4021 (IDC_AUDIT_COMPLETION << 7) | (duration_secs << 8);
4022 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg);
4023 break;
4024
4025 default:
4026 ql_log(ql_log_warn, vha, 0xb078,
4027 "Invalid audit type specified.\n");
4028 break;
4029 }
4030 }
4031
4032 /* Assumes idc_lock always held on entry */
4033 static int
4034 qla83xx_initiating_reset(scsi_qla_host_t *vha)
4035 {
4036 struct qla_hw_data *ha = vha->hw;
4037 uint32_t idc_control, dev_state;
4038
4039 __qla83xx_get_idc_control(vha, &idc_control);
4040 if ((idc_control & QLA83XX_IDC_RESET_DISABLED)) {
4041 ql_log(ql_log_info, vha, 0xb080,
4042 "NIC Core reset has been disabled. idc-control=0x%x\n",
4043 idc_control);
4044 return QLA_FUNCTION_FAILED;
4045 }
4046
4047 /* Set NEED-RESET iff in READY state and we are the reset-owner */
4048 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4049 if (ha->flags.nic_core_reset_owner && dev_state == QLA8XXX_DEV_READY) {
4050 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
4051 QLA8XXX_DEV_NEED_RESET);
4052 ql_log(ql_log_info, vha, 0xb056, "HW State: NEED RESET.\n");
4053 qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP);
4054 } else {
4055 const char *state = qla83xx_dev_state_to_string(dev_state);
4056 ql_log(ql_log_info, vha, 0xb057, "HW State: %s.\n", state);
4057
4058 /* SV: XXX: Is timeout required here? */
4059 /* Wait for IDC state change READY -> NEED_RESET */
4060 while (dev_state == QLA8XXX_DEV_READY) {
4061 qla83xx_idc_unlock(vha, 0);
4062 msleep(200);
4063 qla83xx_idc_lock(vha, 0);
4064 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4065 }
4066 }
4067
4068 /* Send IDC ack by writing to drv-ack register */
4069 __qla83xx_set_drv_ack(vha);
4070
4071 return QLA_SUCCESS;
4072 }
4073
4074 int
4075 __qla83xx_set_idc_control(scsi_qla_host_t *vha, uint32_t idc_control)
4076 {
4077 return qla83xx_wr_reg(vha, QLA83XX_IDC_CONTROL, idc_control);
4078 }
4079
4080 int
4081 __qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control)
4082 {
4083 return qla83xx_rd_reg(vha, QLA83XX_IDC_CONTROL, idc_control);
4084 }
4085
4086 static int
4087 qla83xx_check_driver_presence(scsi_qla_host_t *vha)
4088 {
4089 uint32_t drv_presence = 0;
4090 struct qla_hw_data *ha = vha->hw;
4091
4092 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4093 if (drv_presence & (1 << ha->portnum))
4094 return QLA_SUCCESS;
4095 else
4096 return QLA_TEST_FAILED;
4097 }
4098
4099 int
4100 qla83xx_nic_core_reset(scsi_qla_host_t *vha)
4101 {
4102 int rval = QLA_SUCCESS;
4103 struct qla_hw_data *ha = vha->hw;
4104
4105 ql_dbg(ql_dbg_p3p, vha, 0xb058,
4106 "Entered %s().\n", __func__);
4107
4108 if (vha->device_flags & DFLG_DEV_FAILED) {
4109 ql_log(ql_log_warn, vha, 0xb059,
4110 "Device in unrecoverable FAILED state.\n");
4111 return QLA_FUNCTION_FAILED;
4112 }
4113
4114 qla83xx_idc_lock(vha, 0);
4115
4116 if (qla83xx_check_driver_presence(vha) != QLA_SUCCESS) {
4117 ql_log(ql_log_warn, vha, 0xb05a,
4118 "Function=0x%x has been removed from IDC participation.\n",
4119 ha->portnum);
4120 rval = QLA_FUNCTION_FAILED;
4121 goto exit;
4122 }
4123
4124 qla83xx_reset_ownership(vha);
4125
4126 rval = qla83xx_initiating_reset(vha);
4127
4128 /*
4129 * Perform reset if we are the reset-owner,
4130 * else wait till IDC state changes to READY/FAILED.
4131 */
4132 if (rval == QLA_SUCCESS) {
4133 rval = qla83xx_idc_state_handler(vha);
4134
4135 if (rval == QLA_SUCCESS)
4136 ha->flags.nic_core_hung = 0;
4137 __qla83xx_clear_drv_ack(vha);
4138 }
4139
4140 exit:
4141 qla83xx_idc_unlock(vha, 0);
4142
4143 ql_dbg(ql_dbg_p3p, vha, 0xb05b, "Exiting %s.\n", __func__);
4144
4145 return rval;
4146 }
4147
4148 int
4149 qla2xxx_mctp_dump(scsi_qla_host_t *vha)
4150 {
4151 struct qla_hw_data *ha = vha->hw;
4152 int rval = QLA_FUNCTION_FAILED;
4153
4154 if (!IS_MCTP_CAPABLE(ha)) {
4155 /* This message can be removed from the final version */
4156 ql_log(ql_log_info, vha, 0x506d,
4157 "This board is not MCTP capable\n");
4158 return rval;
4159 }
4160
4161 if (!ha->mctp_dump) {
4162 ha->mctp_dump = dma_alloc_coherent(&ha->pdev->dev,
4163 MCTP_DUMP_SIZE, &ha->mctp_dump_dma, GFP_KERNEL);
4164
4165 if (!ha->mctp_dump) {
4166 ql_log(ql_log_warn, vha, 0x506e,
4167 "Failed to allocate memory for mctp dump\n");
4168 return rval;
4169 }
4170 }
4171
4172 #define MCTP_DUMP_STR_ADDR 0x00000000
4173 rval = qla2x00_dump_mctp_data(vha, ha->mctp_dump_dma,
4174 MCTP_DUMP_STR_ADDR, MCTP_DUMP_SIZE/4);
4175 if (rval != QLA_SUCCESS) {
4176 ql_log(ql_log_warn, vha, 0x506f,
4177 "Failed to capture mctp dump\n");
4178 } else {
4179 ql_log(ql_log_info, vha, 0x5070,
4180 "Mctp dump capture for host (%ld/%p).\n",
4181 vha->host_no, ha->mctp_dump);
4182 ha->mctp_dumped = 1;
4183 }
4184
4185 if (!ha->flags.nic_core_reset_hdlr_active && !ha->portnum) {
4186 ha->flags.nic_core_reset_hdlr_active = 1;
4187 rval = qla83xx_restart_nic_firmware(vha);
4188 if (rval)
4189 /* NIC Core reset failed. */
4190 ql_log(ql_log_warn, vha, 0x5071,
4191 "Failed to restart nic firmware\n");
4192 else
4193 ql_dbg(ql_dbg_p3p, vha, 0xb084,
4194 "Restarted NIC firmware successfully.\n");
4195 ha->flags.nic_core_reset_hdlr_active = 0;
4196 }
4197
4198 return rval;
4199
4200 }
4201
4202 /*
4203 * qla2x00_quiesce_io
4204 * Description: This function will block the new I/Os
4205 * Its not aborting any I/Os as context
4206 * is not destroyed during quiescence
4207 * Arguments: scsi_qla_host_t
4208 * return : void
4209 */
4210 void
4211 qla2x00_quiesce_io(scsi_qla_host_t *vha)
4212 {
4213 struct qla_hw_data *ha = vha->hw;
4214 struct scsi_qla_host *vp;
4215
4216 ql_dbg(ql_dbg_dpc, vha, 0x401d,
4217 "Quiescing I/O - ha=%p.\n", ha);
4218
4219 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME);
4220 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
4221 atomic_set(&vha->loop_state, LOOP_DOWN);
4222 qla2x00_mark_all_devices_lost(vha, 0);
4223 list_for_each_entry(vp, &ha->vp_list, list)
4224 qla2x00_mark_all_devices_lost(vp, 0);
4225 } else {
4226 if (!atomic_read(&vha->loop_down_timer))
4227 atomic_set(&vha->loop_down_timer,
4228 LOOP_DOWN_TIME);
4229 }
4230 /* Wait for pending cmds to complete */
4231 qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST);
4232 }
4233
4234 void
4235 qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha)
4236 {
4237 struct qla_hw_data *ha = vha->hw;
4238 struct scsi_qla_host *vp;
4239 unsigned long flags;
4240 fc_port_t *fcport;
4241
4242 /* For ISP82XX, driver waits for completion of the commands.
4243 * online flag should be set.
4244 */
4245 if (!IS_QLA82XX(ha))
4246 vha->flags.online = 0;
4247 ha->flags.chip_reset_done = 0;
4248 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
4249 vha->qla_stats.total_isp_aborts++;
4250
4251 ql_log(ql_log_info, vha, 0x00af,
4252 "Performing ISP error recovery - ha=%p.\n", ha);
4253
4254 /* For ISP82XX, reset_chip is just disabling interrupts.
4255 * Driver waits for the completion of the commands.
4256 * the interrupts need to be enabled.
4257 */
4258 if (!IS_QLA82XX(ha))
4259 ha->isp_ops->reset_chip(vha);
4260
4261 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
4262 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
4263 atomic_set(&vha->loop_state, LOOP_DOWN);
4264 qla2x00_mark_all_devices_lost(vha, 0);
4265
4266 spin_lock_irqsave(&ha->vport_slock, flags);
4267 list_for_each_entry(vp, &ha->vp_list, list) {
4268 atomic_inc(&vp->vref_count);
4269 spin_unlock_irqrestore(&ha->vport_slock, flags);
4270
4271 qla2x00_mark_all_devices_lost(vp, 0);
4272
4273 spin_lock_irqsave(&ha->vport_slock, flags);
4274 atomic_dec(&vp->vref_count);
4275 }
4276 spin_unlock_irqrestore(&ha->vport_slock, flags);
4277 } else {
4278 if (!atomic_read(&vha->loop_down_timer))
4279 atomic_set(&vha->loop_down_timer,
4280 LOOP_DOWN_TIME);
4281 }
4282
4283 /* Clear all async request states across all VPs. */
4284 list_for_each_entry(fcport, &vha->vp_fcports, list)
4285 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
4286 spin_lock_irqsave(&ha->vport_slock, flags);
4287 list_for_each_entry(vp, &ha->vp_list, list) {
4288 atomic_inc(&vp->vref_count);
4289 spin_unlock_irqrestore(&ha->vport_slock, flags);
4290
4291 list_for_each_entry(fcport, &vp->vp_fcports, list)
4292 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
4293
4294 spin_lock_irqsave(&ha->vport_slock, flags);
4295 atomic_dec(&vp->vref_count);
4296 }
4297 spin_unlock_irqrestore(&ha->vport_slock, flags);
4298
4299 if (!ha->flags.eeh_busy) {
4300 /* Make sure for ISP 82XX IO DMA is complete */
4301 if (IS_QLA82XX(ha)) {
4302 qla82xx_chip_reset_cleanup(vha);
4303 ql_log(ql_log_info, vha, 0x00b4,
4304 "Done chip reset cleanup.\n");
4305
4306 /* Done waiting for pending commands.
4307 * Reset the online flag.
4308 */
4309 vha->flags.online = 0;
4310 }
4311
4312 /* Requeue all commands in outstanding command list. */
4313 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
4314 }
4315 }
4316
4317 /*
4318 * qla2x00_abort_isp
4319 * Resets ISP and aborts all outstanding commands.
4320 *
4321 * Input:
4322 * ha = adapter block pointer.
4323 *
4324 * Returns:
4325 * 0 = success
4326 */
4327 int
4328 qla2x00_abort_isp(scsi_qla_host_t *vha)
4329 {
4330 int rval;
4331 uint8_t status = 0;
4332 struct qla_hw_data *ha = vha->hw;
4333 struct scsi_qla_host *vp;
4334 struct req_que *req = ha->req_q_map[0];
4335 unsigned long flags;
4336
4337 if (vha->flags.online) {
4338 qla2x00_abort_isp_cleanup(vha);
4339
4340 if (IS_QLA8031(ha)) {
4341 ql_dbg(ql_dbg_p3p, vha, 0xb05c,
4342 "Clearing fcoe driver presence.\n");
4343 if (qla83xx_clear_drv_presence(vha) != QLA_SUCCESS)
4344 ql_dbg(ql_dbg_p3p, vha, 0xb073,
4345 "Error while clearing DRV-Presence.\n");
4346 }
4347
4348 if (unlikely(pci_channel_offline(ha->pdev) &&
4349 ha->flags.pci_channel_io_perm_failure)) {
4350 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
4351 status = 0;
4352 return status;
4353 }
4354
4355 ha->isp_ops->get_flash_version(vha, req->ring);
4356
4357 ha->isp_ops->nvram_config(vha);
4358
4359 if (!qla2x00_restart_isp(vha)) {
4360 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
4361
4362 if (!atomic_read(&vha->loop_down_timer)) {
4363 /*
4364 * Issue marker command only when we are going
4365 * to start the I/O .
4366 */
4367 vha->marker_needed = 1;
4368 }
4369
4370 vha->flags.online = 1;
4371
4372 ha->isp_ops->enable_intrs(ha);
4373
4374 ha->isp_abort_cnt = 0;
4375 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
4376
4377 if (IS_QLA81XX(ha) || IS_QLA8031(ha))
4378 qla2x00_get_fw_version(vha);
4379 if (ha->fce) {
4380 ha->flags.fce_enabled = 1;
4381 memset(ha->fce, 0,
4382 fce_calc_size(ha->fce_bufs));
4383 rval = qla2x00_enable_fce_trace(vha,
4384 ha->fce_dma, ha->fce_bufs, ha->fce_mb,
4385 &ha->fce_bufs);
4386 if (rval) {
4387 ql_log(ql_log_warn, vha, 0x8033,
4388 "Unable to reinitialize FCE "
4389 "(%d).\n", rval);
4390 ha->flags.fce_enabled = 0;
4391 }
4392 }
4393
4394 if (ha->eft) {
4395 memset(ha->eft, 0, EFT_SIZE);
4396 rval = qla2x00_enable_eft_trace(vha,
4397 ha->eft_dma, EFT_NUM_BUFFERS);
4398 if (rval) {
4399 ql_log(ql_log_warn, vha, 0x8034,
4400 "Unable to reinitialize EFT "
4401 "(%d).\n", rval);
4402 }
4403 }
4404 } else { /* failed the ISP abort */
4405 vha->flags.online = 1;
4406 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
4407 if (ha->isp_abort_cnt == 0) {
4408 ql_log(ql_log_fatal, vha, 0x8035,
4409 "ISP error recover failed - "
4410 "board disabled.\n");
4411 /*
4412 * The next call disables the board
4413 * completely.
4414 */
4415 ha->isp_ops->reset_adapter(vha);
4416 vha->flags.online = 0;
4417 clear_bit(ISP_ABORT_RETRY,
4418 &vha->dpc_flags);
4419 status = 0;
4420 } else { /* schedule another ISP abort */
4421 ha->isp_abort_cnt--;
4422 ql_dbg(ql_dbg_taskm, vha, 0x8020,
4423 "ISP abort - retry remaining %d.\n",
4424 ha->isp_abort_cnt);
4425 status = 1;
4426 }
4427 } else {
4428 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
4429 ql_dbg(ql_dbg_taskm, vha, 0x8021,
4430 "ISP error recovery - retrying (%d) "
4431 "more times.\n", ha->isp_abort_cnt);
4432 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
4433 status = 1;
4434 }
4435 }
4436
4437 }
4438
4439 if (!status) {
4440 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__);
4441
4442 spin_lock_irqsave(&ha->vport_slock, flags);
4443 list_for_each_entry(vp, &ha->vp_list, list) {
4444 if (vp->vp_idx) {
4445 atomic_inc(&vp->vref_count);
4446 spin_unlock_irqrestore(&ha->vport_slock, flags);
4447
4448 qla2x00_vp_abort_isp(vp);
4449
4450 spin_lock_irqsave(&ha->vport_slock, flags);
4451 atomic_dec(&vp->vref_count);
4452 }
4453 }
4454 spin_unlock_irqrestore(&ha->vport_slock, flags);
4455
4456 if (IS_QLA8031(ha)) {
4457 ql_dbg(ql_dbg_p3p, vha, 0xb05d,
4458 "Setting back fcoe driver presence.\n");
4459 if (qla83xx_set_drv_presence(vha) != QLA_SUCCESS)
4460 ql_dbg(ql_dbg_p3p, vha, 0xb074,
4461 "Error while setting DRV-Presence.\n");
4462 }
4463 } else {
4464 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n",
4465 __func__);
4466 }
4467
4468 return(status);
4469 }
4470
4471 /*
4472 * qla2x00_restart_isp
4473 * restarts the ISP after a reset
4474 *
4475 * Input:
4476 * ha = adapter block pointer.
4477 *
4478 * Returns:
4479 * 0 = success
4480 */
4481 static int
4482 qla2x00_restart_isp(scsi_qla_host_t *vha)
4483 {
4484 int status = 0;
4485 uint32_t wait_time;
4486 struct qla_hw_data *ha = vha->hw;
4487 struct req_que *req = ha->req_q_map[0];
4488 struct rsp_que *rsp = ha->rsp_q_map[0];
4489 unsigned long flags;
4490
4491 /* If firmware needs to be loaded */
4492 if (qla2x00_isp_firmware(vha)) {
4493 vha->flags.online = 0;
4494 status = ha->isp_ops->chip_diag(vha);
4495 if (!status)
4496 status = qla2x00_setup_chip(vha);
4497 }
4498
4499 if (!status && !(status = qla2x00_init_rings(vha))) {
4500 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
4501 ha->flags.chip_reset_done = 1;
4502 /* Initialize the queues in use */
4503 qla25xx_init_queues(ha);
4504
4505 status = qla2x00_fw_ready(vha);
4506 if (!status) {
4507 ql_dbg(ql_dbg_taskm, vha, 0x8031,
4508 "Start configure loop status = %d.\n", status);
4509
4510 /* Issue a marker after FW becomes ready. */
4511 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
4512
4513 vha->flags.online = 1;
4514
4515 /*
4516 * Process any ATIO queue entries that came in
4517 * while we weren't online.
4518 */
4519 spin_lock_irqsave(&ha->hardware_lock, flags);
4520 if (qla_tgt_mode_enabled(vha))
4521 qlt_24xx_process_atio_queue(vha);
4522 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4523
4524 /* Wait at most MAX_TARGET RSCNs for a stable link. */
4525 wait_time = 256;
4526 do {
4527 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
4528 qla2x00_configure_loop(vha);
4529 wait_time--;
4530 } while (!atomic_read(&vha->loop_down_timer) &&
4531 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
4532 && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
4533 &vha->dpc_flags)));
4534 }
4535
4536 /* if no cable then assume it's good */
4537 if ((vha->device_flags & DFLG_NO_CABLE))
4538 status = 0;
4539
4540 ql_dbg(ql_dbg_taskm, vha, 0x8032,
4541 "Configure loop done, status = 0x%x.\n", status);
4542 }
4543 return (status);
4544 }
4545
4546 static int
4547 qla25xx_init_queues(struct qla_hw_data *ha)
4548 {
4549 struct rsp_que *rsp = NULL;
4550 struct req_que *req = NULL;
4551 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
4552 int ret = -1;
4553 int i;
4554
4555 for (i = 1; i < ha->max_rsp_queues; i++) {
4556 rsp = ha->rsp_q_map[i];
4557 if (rsp) {
4558 rsp->options &= ~BIT_0;
4559 ret = qla25xx_init_rsp_que(base_vha, rsp);
4560 if (ret != QLA_SUCCESS)
4561 ql_dbg(ql_dbg_init, base_vha, 0x00ff,
4562 "%s Rsp que: %d init failed.\n",
4563 __func__, rsp->id);
4564 else
4565 ql_dbg(ql_dbg_init, base_vha, 0x0100,
4566 "%s Rsp que: %d inited.\n",
4567 __func__, rsp->id);
4568 }
4569 }
4570 for (i = 1; i < ha->max_req_queues; i++) {
4571 req = ha->req_q_map[i];
4572 if (req) {
4573 /* Clear outstanding commands array. */
4574 req->options &= ~BIT_0;
4575 ret = qla25xx_init_req_que(base_vha, req);
4576 if (ret != QLA_SUCCESS)
4577 ql_dbg(ql_dbg_init, base_vha, 0x0101,
4578 "%s Req que: %d init failed.\n",
4579 __func__, req->id);
4580 else
4581 ql_dbg(ql_dbg_init, base_vha, 0x0102,
4582 "%s Req que: %d inited.\n",
4583 __func__, req->id);
4584 }
4585 }
4586 return ret;
4587 }
4588
4589 /*
4590 * qla2x00_reset_adapter
4591 * Reset adapter.
4592 *
4593 * Input:
4594 * ha = adapter block pointer.
4595 */
4596 void
4597 qla2x00_reset_adapter(scsi_qla_host_t *vha)
4598 {
4599 unsigned long flags = 0;
4600 struct qla_hw_data *ha = vha->hw;
4601 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
4602
4603 vha->flags.online = 0;
4604 ha->isp_ops->disable_intrs(ha);
4605
4606 spin_lock_irqsave(&ha->hardware_lock, flags);
4607 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
4608 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
4609 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
4610 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
4611 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4612 }
4613
4614 void
4615 qla24xx_reset_adapter(scsi_qla_host_t *vha)
4616 {
4617 unsigned long flags = 0;
4618 struct qla_hw_data *ha = vha->hw;
4619 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
4620
4621 if (IS_QLA82XX(ha))
4622 return;
4623
4624 vha->flags.online = 0;
4625 ha->isp_ops->disable_intrs(ha);
4626
4627 spin_lock_irqsave(&ha->hardware_lock, flags);
4628 WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
4629 RD_REG_DWORD(&reg->hccr);
4630 WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
4631 RD_REG_DWORD(&reg->hccr);
4632 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4633
4634 if (IS_NOPOLLING_TYPE(ha))
4635 ha->isp_ops->enable_intrs(ha);
4636 }
4637
4638 /* On sparc systems, obtain port and node WWN from firmware
4639 * properties.
4640 */
4641 static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
4642 struct nvram_24xx *nv)
4643 {
4644 #ifdef CONFIG_SPARC
4645 struct qla_hw_data *ha = vha->hw;
4646 struct pci_dev *pdev = ha->pdev;
4647 struct device_node *dp = pci_device_to_OF_node(pdev);
4648 const u8 *val;
4649 int len;
4650
4651 val = of_get_property(dp, "port-wwn", &len);
4652 if (val && len >= WWN_SIZE)
4653 memcpy(nv->port_name, val, WWN_SIZE);
4654
4655 val = of_get_property(dp, "node-wwn", &len);
4656 if (val && len >= WWN_SIZE)
4657 memcpy(nv->node_name, val, WWN_SIZE);
4658 #endif
4659 }
4660
4661 int
4662 qla24xx_nvram_config(scsi_qla_host_t *vha)
4663 {
4664 int rval;
4665 struct init_cb_24xx *icb;
4666 struct nvram_24xx *nv;
4667 uint32_t *dptr;
4668 uint8_t *dptr1, *dptr2;
4669 uint32_t chksum;
4670 uint16_t cnt;
4671 struct qla_hw_data *ha = vha->hw;
4672
4673 rval = QLA_SUCCESS;
4674 icb = (struct init_cb_24xx *)ha->init_cb;
4675 nv = ha->nvram;
4676
4677 /* Determine NVRAM starting address. */
4678 if (ha->flags.port0) {
4679 ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
4680 ha->vpd_base = FA_NVRAM_VPD0_ADDR;
4681 } else {
4682 ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
4683 ha->vpd_base = FA_NVRAM_VPD1_ADDR;
4684 }
4685 ha->nvram_size = sizeof(struct nvram_24xx);
4686 ha->vpd_size = FA_NVRAM_VPD_SIZE;
4687 if (IS_QLA82XX(ha))
4688 ha->vpd_size = FA_VPD_SIZE_82XX;
4689
4690 /* Get VPD data into cache */
4691 ha->vpd = ha->nvram + VPD_OFFSET;
4692 ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd,
4693 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
4694
4695 /* Get NVRAM data into cache and calculate checksum. */
4696 dptr = (uint32_t *)nv;
4697 ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base,
4698 ha->nvram_size);
4699 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
4700 chksum += le32_to_cpu(*dptr++);
4701
4702 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a,
4703 "Contents of NVRAM\n");
4704 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d,
4705 (uint8_t *)nv, ha->nvram_size);
4706
4707 /* Bad NVRAM data, set defaults parameters. */
4708 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
4709 || nv->id[3] != ' ' ||
4710 nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
4711 /* Reset NVRAM data. */
4712 ql_log(ql_log_warn, vha, 0x006b,
4713 "Inconsistent NVRAM detected: checksum=0x%x id=%c "
4714 "version=0x%x.\n", chksum, nv->id[0], nv->nvram_version);
4715 ql_log(ql_log_warn, vha, 0x006c,
4716 "Falling back to functioning (yet invalid -- WWPN) "
4717 "defaults.\n");
4718
4719 /*
4720 * Set default initialization control block.
4721 */
4722 memset(nv, 0, ha->nvram_size);
4723 nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
4724 nv->version = __constant_cpu_to_le16(ICB_VERSION);
4725 nv->frame_payload_size = __constant_cpu_to_le16(2048);
4726 nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
4727 nv->exchange_count = __constant_cpu_to_le16(0);
4728 nv->hard_address = __constant_cpu_to_le16(124);
4729 nv->port_name[0] = 0x21;
4730 nv->port_name[1] = 0x00 + ha->port_no;
4731 nv->port_name[2] = 0x00;
4732 nv->port_name[3] = 0xe0;
4733 nv->port_name[4] = 0x8b;
4734 nv->port_name[5] = 0x1c;
4735 nv->port_name[6] = 0x55;
4736 nv->port_name[7] = 0x86;
4737 nv->node_name[0] = 0x20;
4738 nv->node_name[1] = 0x00;
4739 nv->node_name[2] = 0x00;
4740 nv->node_name[3] = 0xe0;
4741 nv->node_name[4] = 0x8b;
4742 nv->node_name[5] = 0x1c;
4743 nv->node_name[6] = 0x55;
4744 nv->node_name[7] = 0x86;
4745 qla24xx_nvram_wwn_from_ofw(vha, nv);
4746 nv->login_retry_count = __constant_cpu_to_le16(8);
4747 nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
4748 nv->login_timeout = __constant_cpu_to_le16(0);
4749 nv->firmware_options_1 =
4750 __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
4751 nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
4752 nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
4753 nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
4754 nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
4755 nv->efi_parameters = __constant_cpu_to_le32(0);
4756 nv->reset_delay = 5;
4757 nv->max_luns_per_target = __constant_cpu_to_le16(128);
4758 nv->port_down_retry_count = __constant_cpu_to_le16(30);
4759 nv->link_down_timeout = __constant_cpu_to_le16(30);
4760
4761 rval = 1;
4762 }
4763
4764 if (!qla_ini_mode_enabled(vha)) {
4765 /* Don't enable full login after initial LIP */
4766 nv->firmware_options_1 &= __constant_cpu_to_le32(~BIT_13);
4767 /* Don't enable LIP full login for initiator */
4768 nv->host_p &= __constant_cpu_to_le32(~BIT_10);
4769 }
4770
4771 qlt_24xx_config_nvram_stage1(vha, nv);
4772
4773 /* Reset Initialization control block */
4774 memset(icb, 0, ha->init_cb_size);
4775
4776 /* Copy 1st segment. */
4777 dptr1 = (uint8_t *)icb;
4778 dptr2 = (uint8_t *)&nv->version;
4779 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
4780 while (cnt--)
4781 *dptr1++ = *dptr2++;
4782
4783 icb->login_retry_count = nv->login_retry_count;
4784 icb->link_down_on_nos = nv->link_down_on_nos;
4785
4786 /* Copy 2nd segment. */
4787 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
4788 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
4789 cnt = (uint8_t *)&icb->reserved_3 -
4790 (uint8_t *)&icb->interrupt_delay_timer;
4791 while (cnt--)
4792 *dptr1++ = *dptr2++;
4793
4794 /*
4795 * Setup driver NVRAM options.
4796 */
4797 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
4798 "QLA2462");
4799
4800 qlt_24xx_config_nvram_stage2(vha, icb);
4801
4802 if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
4803 /* Use alternate WWN? */
4804 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
4805 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
4806 }
4807
4808 /* Prepare nodename */
4809 if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
4810 /*
4811 * Firmware will apply the following mask if the nodename was
4812 * not provided.
4813 */
4814 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
4815 icb->node_name[0] &= 0xF0;
4816 }
4817
4818 /* Set host adapter parameters. */
4819 ha->flags.disable_risc_code_load = 0;
4820 ha->flags.enable_lip_reset = 0;
4821 ha->flags.enable_lip_full_login =
4822 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
4823 ha->flags.enable_target_reset =
4824 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
4825 ha->flags.enable_led_scheme = 0;
4826 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
4827
4828 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
4829 (BIT_6 | BIT_5 | BIT_4)) >> 4;
4830
4831 memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
4832 sizeof(ha->fw_seriallink_options24));
4833
4834 /* save HBA serial number */
4835 ha->serial0 = icb->port_name[5];
4836 ha->serial1 = icb->port_name[6];
4837 ha->serial2 = icb->port_name[7];
4838 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
4839 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
4840
4841 icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
4842
4843 ha->retry_count = le16_to_cpu(nv->login_retry_count);
4844
4845 /* Set minimum login_timeout to 4 seconds. */
4846 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
4847 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
4848 if (le16_to_cpu(nv->login_timeout) < 4)
4849 nv->login_timeout = __constant_cpu_to_le16(4);
4850 ha->login_timeout = le16_to_cpu(nv->login_timeout);
4851 icb->login_timeout = nv->login_timeout;
4852
4853 /* Set minimum RATOV to 100 tenths of a second. */
4854 ha->r_a_tov = 100;
4855
4856 ha->loop_reset_delay = nv->reset_delay;
4857
4858 /* Link Down Timeout = 0:
4859 *
4860 * When Port Down timer expires we will start returning
4861 * I/O's to OS with "DID_NO_CONNECT".
4862 *
4863 * Link Down Timeout != 0:
4864 *
4865 * The driver waits for the link to come up after link down
4866 * before returning I/Os to OS with "DID_NO_CONNECT".
4867 */
4868 if (le16_to_cpu(nv->link_down_timeout) == 0) {
4869 ha->loop_down_abort_time =
4870 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
4871 } else {
4872 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
4873 ha->loop_down_abort_time =
4874 (LOOP_DOWN_TIME - ha->link_down_timeout);
4875 }
4876
4877 /* Need enough time to try and get the port back. */
4878 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
4879 if (qlport_down_retry)
4880 ha->port_down_retry_count = qlport_down_retry;
4881
4882 /* Set login_retry_count */
4883 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
4884 if (ha->port_down_retry_count ==
4885 le16_to_cpu(nv->port_down_retry_count) &&
4886 ha->port_down_retry_count > 3)
4887 ha->login_retry_count = ha->port_down_retry_count;
4888 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
4889 ha->login_retry_count = ha->port_down_retry_count;
4890 if (ql2xloginretrycount)
4891 ha->login_retry_count = ql2xloginretrycount;
4892
4893 /* Enable ZIO. */
4894 if (!vha->flags.init_done) {
4895 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
4896 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
4897 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
4898 le16_to_cpu(icb->interrupt_delay_timer): 2;
4899 }
4900 icb->firmware_options_2 &= __constant_cpu_to_le32(
4901 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
4902 vha->flags.process_response_queue = 0;
4903 if (ha->zio_mode != QLA_ZIO_DISABLED) {
4904 ha->zio_mode = QLA_ZIO_MODE_6;
4905
4906 ql_log(ql_log_info, vha, 0x006f,
4907 "ZIO mode %d enabled; timer delay (%d us).\n",
4908 ha->zio_mode, ha->zio_timer * 100);
4909
4910 icb->firmware_options_2 |= cpu_to_le32(
4911 (uint32_t)ha->zio_mode);
4912 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
4913 vha->flags.process_response_queue = 1;
4914 }
4915
4916 if (rval) {
4917 ql_log(ql_log_warn, vha, 0x0070,
4918 "NVRAM configuration failed.\n");
4919 }
4920 return (rval);
4921 }
4922
4923 static int
4924 qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr,
4925 uint32_t faddr)
4926 {
4927 int rval = QLA_SUCCESS;
4928 int segments, fragment;
4929 uint32_t *dcode, dlen;
4930 uint32_t risc_addr;
4931 uint32_t risc_size;
4932 uint32_t i;
4933 struct qla_hw_data *ha = vha->hw;
4934 struct req_que *req = ha->req_q_map[0];
4935
4936 ql_dbg(ql_dbg_init, vha, 0x008b,
4937 "FW: Loading firmware from flash (%x).\n", faddr);
4938
4939 rval = QLA_SUCCESS;
4940
4941 segments = FA_RISC_CODE_SEGMENTS;
4942 dcode = (uint32_t *)req->ring;
4943 *srisc_addr = 0;
4944
4945 /* Validate firmware image by checking version. */
4946 qla24xx_read_flash_data(vha, dcode, faddr + 4, 4);
4947 for (i = 0; i < 4; i++)
4948 dcode[i] = be32_to_cpu(dcode[i]);
4949 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
4950 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
4951 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
4952 dcode[3] == 0)) {
4953 ql_log(ql_log_fatal, vha, 0x008c,
4954 "Unable to verify the integrity of flash firmware "
4955 "image.\n");
4956 ql_log(ql_log_fatal, vha, 0x008d,
4957 "Firmware data: %08x %08x %08x %08x.\n",
4958 dcode[0], dcode[1], dcode[2], dcode[3]);
4959
4960 return QLA_FUNCTION_FAILED;
4961 }
4962
4963 while (segments && rval == QLA_SUCCESS) {
4964 /* Read segment's load information. */
4965 qla24xx_read_flash_data(vha, dcode, faddr, 4);
4966
4967 risc_addr = be32_to_cpu(dcode[2]);
4968 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
4969 risc_size = be32_to_cpu(dcode[3]);
4970
4971 fragment = 0;
4972 while (risc_size > 0 && rval == QLA_SUCCESS) {
4973 dlen = (uint32_t)(ha->fw_transfer_size >> 2);
4974 if (dlen > risc_size)
4975 dlen = risc_size;
4976
4977 ql_dbg(ql_dbg_init, vha, 0x008e,
4978 "Loading risc segment@ risc addr %x "
4979 "number of dwords 0x%x offset 0x%x.\n",
4980 risc_addr, dlen, faddr);
4981
4982 qla24xx_read_flash_data(vha, dcode, faddr, dlen);
4983 for (i = 0; i < dlen; i++)
4984 dcode[i] = swab32(dcode[i]);
4985
4986 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
4987 dlen);
4988 if (rval) {
4989 ql_log(ql_log_fatal, vha, 0x008f,
4990 "Failed to load segment %d of firmware.\n",
4991 fragment);
4992 break;
4993 }
4994
4995 faddr += dlen;
4996 risc_addr += dlen;
4997 risc_size -= dlen;
4998 fragment++;
4999 }
5000
5001 /* Next segment. */
5002 segments--;
5003 }
5004
5005 return rval;
5006 }
5007
5008 #define QLA_FW_URL "ftp://ftp.qlogic.com/outgoing/linux/firmware/"
5009
5010 int
5011 qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
5012 {
5013 int rval;
5014 int i, fragment;
5015 uint16_t *wcode, *fwcode;
5016 uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
5017 struct fw_blob *blob;
5018 struct qla_hw_data *ha = vha->hw;
5019 struct req_que *req = ha->req_q_map[0];
5020
5021 /* Load firmware blob. */
5022 blob = qla2x00_request_firmware(vha);
5023 if (!blob) {
5024 ql_log(ql_log_info, vha, 0x0083,
5025 "Fimware image unavailable.\n");
5026 ql_log(ql_log_info, vha, 0x0084,
5027 "Firmware images can be retrieved from: "QLA_FW_URL ".\n");
5028 return QLA_FUNCTION_FAILED;
5029 }
5030
5031 rval = QLA_SUCCESS;
5032
5033 wcode = (uint16_t *)req->ring;
5034 *srisc_addr = 0;
5035 fwcode = (uint16_t *)blob->fw->data;
5036 fwclen = 0;
5037
5038 /* Validate firmware image by checking version. */
5039 if (blob->fw->size < 8 * sizeof(uint16_t)) {
5040 ql_log(ql_log_fatal, vha, 0x0085,
5041 "Unable to verify integrity of firmware image (%Zd).\n",
5042 blob->fw->size);
5043 goto fail_fw_integrity;
5044 }
5045 for (i = 0; i < 4; i++)
5046 wcode[i] = be16_to_cpu(fwcode[i + 4]);
5047 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
5048 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
5049 wcode[2] == 0 && wcode[3] == 0)) {
5050 ql_log(ql_log_fatal, vha, 0x0086,
5051 "Unable to verify integrity of firmware image.\n");
5052 ql_log(ql_log_fatal, vha, 0x0087,
5053 "Firmware data: %04x %04x %04x %04x.\n",
5054 wcode[0], wcode[1], wcode[2], wcode[3]);
5055 goto fail_fw_integrity;
5056 }
5057
5058 seg = blob->segs;
5059 while (*seg && rval == QLA_SUCCESS) {
5060 risc_addr = *seg;
5061 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
5062 risc_size = be16_to_cpu(fwcode[3]);
5063
5064 /* Validate firmware image size. */
5065 fwclen += risc_size * sizeof(uint16_t);
5066 if (blob->fw->size < fwclen) {
5067 ql_log(ql_log_fatal, vha, 0x0088,
5068 "Unable to verify integrity of firmware image "
5069 "(%Zd).\n", blob->fw->size);
5070 goto fail_fw_integrity;
5071 }
5072
5073 fragment = 0;
5074 while (risc_size > 0 && rval == QLA_SUCCESS) {
5075 wlen = (uint16_t)(ha->fw_transfer_size >> 1);
5076 if (wlen > risc_size)
5077 wlen = risc_size;
5078 ql_dbg(ql_dbg_init, vha, 0x0089,
5079 "Loading risc segment@ risc addr %x number of "
5080 "words 0x%x.\n", risc_addr, wlen);
5081
5082 for (i = 0; i < wlen; i++)
5083 wcode[i] = swab16(fwcode[i]);
5084
5085 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
5086 wlen);
5087 if (rval) {
5088 ql_log(ql_log_fatal, vha, 0x008a,
5089 "Failed to load segment %d of firmware.\n",
5090 fragment);
5091 break;
5092 }
5093
5094 fwcode += wlen;
5095 risc_addr += wlen;
5096 risc_size -= wlen;
5097 fragment++;
5098 }
5099
5100 /* Next segment. */
5101 seg++;
5102 }
5103 return rval;
5104
5105 fail_fw_integrity:
5106 return QLA_FUNCTION_FAILED;
5107 }
5108
5109 static int
5110 qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
5111 {
5112 int rval;
5113 int segments, fragment;
5114 uint32_t *dcode, dlen;
5115 uint32_t risc_addr;
5116 uint32_t risc_size;
5117 uint32_t i;
5118 struct fw_blob *blob;
5119 uint32_t *fwcode, fwclen;
5120 struct qla_hw_data *ha = vha->hw;
5121 struct req_que *req = ha->req_q_map[0];
5122
5123 /* Load firmware blob. */
5124 blob = qla2x00_request_firmware(vha);
5125 if (!blob) {
5126 ql_log(ql_log_warn, vha, 0x0090,
5127 "Fimware image unavailable.\n");
5128 ql_log(ql_log_warn, vha, 0x0091,
5129 "Firmware images can be retrieved from: "
5130 QLA_FW_URL ".\n");
5131
5132 return QLA_FUNCTION_FAILED;
5133 }
5134
5135 ql_dbg(ql_dbg_init, vha, 0x0092,
5136 "FW: Loading via request-firmware.\n");
5137
5138 rval = QLA_SUCCESS;
5139
5140 segments = FA_RISC_CODE_SEGMENTS;
5141 dcode = (uint32_t *)req->ring;
5142 *srisc_addr = 0;
5143 fwcode = (uint32_t *)blob->fw->data;
5144 fwclen = 0;
5145
5146 /* Validate firmware image by checking version. */
5147 if (blob->fw->size < 8 * sizeof(uint32_t)) {
5148 ql_log(ql_log_fatal, vha, 0x0093,
5149 "Unable to verify integrity of firmware image (%Zd).\n",
5150 blob->fw->size);
5151 goto fail_fw_integrity;
5152 }
5153 for (i = 0; i < 4; i++)
5154 dcode[i] = be32_to_cpu(fwcode[i + 4]);
5155 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
5156 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
5157 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
5158 dcode[3] == 0)) {
5159 ql_log(ql_log_fatal, vha, 0x0094,
5160 "Unable to verify integrity of firmware image (%Zd).\n",
5161 blob->fw->size);
5162 ql_log(ql_log_fatal, vha, 0x0095,
5163 "Firmware data: %08x %08x %08x %08x.\n",
5164 dcode[0], dcode[1], dcode[2], dcode[3]);
5165 goto fail_fw_integrity;
5166 }
5167
5168 while (segments && rval == QLA_SUCCESS) {
5169 risc_addr = be32_to_cpu(fwcode[2]);
5170 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
5171 risc_size = be32_to_cpu(fwcode[3]);
5172
5173 /* Validate firmware image size. */
5174 fwclen += risc_size * sizeof(uint32_t);
5175 if (blob->fw->size < fwclen) {
5176 ql_log(ql_log_fatal, vha, 0x0096,
5177 "Unable to verify integrity of firmware image "
5178 "(%Zd).\n", blob->fw->size);
5179
5180 goto fail_fw_integrity;
5181 }
5182
5183 fragment = 0;
5184 while (risc_size > 0 && rval == QLA_SUCCESS) {
5185 dlen = (uint32_t)(ha->fw_transfer_size >> 2);
5186 if (dlen > risc_size)
5187 dlen = risc_size;
5188
5189 ql_dbg(ql_dbg_init, vha, 0x0097,
5190 "Loading risc segment@ risc addr %x "
5191 "number of dwords 0x%x.\n", risc_addr, dlen);
5192
5193 for (i = 0; i < dlen; i++)
5194 dcode[i] = swab32(fwcode[i]);
5195
5196 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
5197 dlen);
5198 if (rval) {
5199 ql_log(ql_log_fatal, vha, 0x0098,
5200 "Failed to load segment %d of firmware.\n",
5201 fragment);
5202 break;
5203 }
5204
5205 fwcode += dlen;
5206 risc_addr += dlen;
5207 risc_size -= dlen;
5208 fragment++;
5209 }
5210
5211 /* Next segment. */
5212 segments--;
5213 }
5214 return rval;
5215
5216 fail_fw_integrity:
5217 return QLA_FUNCTION_FAILED;
5218 }
5219
5220 int
5221 qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
5222 {
5223 int rval;
5224
5225 if (ql2xfwloadbin == 1)
5226 return qla81xx_load_risc(vha, srisc_addr);
5227
5228 /*
5229 * FW Load priority:
5230 * 1) Firmware via request-firmware interface (.bin file).
5231 * 2) Firmware residing in flash.
5232 */
5233 rval = qla24xx_load_risc_blob(vha, srisc_addr);
5234 if (rval == QLA_SUCCESS)
5235 return rval;
5236
5237 return qla24xx_load_risc_flash(vha, srisc_addr,
5238 vha->hw->flt_region_fw);
5239 }
5240
5241 int
5242 qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
5243 {
5244 int rval;
5245 struct qla_hw_data *ha = vha->hw;
5246
5247 if (ql2xfwloadbin == 2)
5248 goto try_blob_fw;
5249
5250 /*
5251 * FW Load priority:
5252 * 1) Firmware residing in flash.
5253 * 2) Firmware via request-firmware interface (.bin file).
5254 * 3) Golden-Firmware residing in flash -- limited operation.
5255 */
5256 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw);
5257 if (rval == QLA_SUCCESS)
5258 return rval;
5259
5260 try_blob_fw:
5261 rval = qla24xx_load_risc_blob(vha, srisc_addr);
5262 if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw)
5263 return rval;
5264
5265 ql_log(ql_log_info, vha, 0x0099,
5266 "Attempting to fallback to golden firmware.\n");
5267 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw);
5268 if (rval != QLA_SUCCESS)
5269 return rval;
5270
5271 ql_log(ql_log_info, vha, 0x009a, "Update operational firmware.\n");
5272 ha->flags.running_gold_fw = 1;
5273 return rval;
5274 }
5275
5276 void
5277 qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
5278 {
5279 int ret, retries;
5280 struct qla_hw_data *ha = vha->hw;
5281
5282 if (ha->flags.pci_channel_io_perm_failure)
5283 return;
5284 if (!IS_FWI2_CAPABLE(ha))
5285 return;
5286 if (!ha->fw_major_version)
5287 return;
5288
5289 ret = qla2x00_stop_firmware(vha);
5290 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
5291 ret != QLA_INVALID_COMMAND && retries ; retries--) {
5292 ha->isp_ops->reset_chip(vha);
5293 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
5294 continue;
5295 if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
5296 continue;
5297 ql_log(ql_log_info, vha, 0x8015,
5298 "Attempting retry of stop-firmware command.\n");
5299 ret = qla2x00_stop_firmware(vha);
5300 }
5301 }
5302
5303 int
5304 qla24xx_configure_vhba(scsi_qla_host_t *vha)
5305 {
5306 int rval = QLA_SUCCESS;
5307 int rval2;
5308 uint16_t mb[MAILBOX_REGISTER_COUNT];
5309 struct qla_hw_data *ha = vha->hw;
5310 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
5311 struct req_que *req;
5312 struct rsp_que *rsp;
5313
5314 if (!vha->vp_idx)
5315 return -EINVAL;
5316
5317 rval = qla2x00_fw_ready(base_vha);
5318 if (ha->flags.cpu_affinity_enabled)
5319 req = ha->req_q_map[0];
5320 else
5321 req = vha->req;
5322 rsp = req->rsp;
5323
5324 if (rval == QLA_SUCCESS) {
5325 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
5326 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
5327 }
5328
5329 vha->flags.management_server_logged_in = 0;
5330
5331 /* Login to SNS first */
5332 rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb,
5333 BIT_1);
5334 if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) {
5335 if (rval2 == QLA_MEMORY_ALLOC_FAILED)
5336 ql_dbg(ql_dbg_init, vha, 0x0120,
5337 "Failed SNS login: loop_id=%x, rval2=%d\n",
5338 NPH_SNS, rval2);
5339 else
5340 ql_dbg(ql_dbg_init, vha, 0x0103,
5341 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
5342 "mb[2]=%x mb[6]=%x mb[7]=%x.\n",
5343 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]);
5344 return (QLA_FUNCTION_FAILED);
5345 }
5346
5347 atomic_set(&vha->loop_down_timer, 0);
5348 atomic_set(&vha->loop_state, LOOP_UP);
5349 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5350 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
5351 rval = qla2x00_loop_resync(base_vha);
5352
5353 return rval;
5354 }
5355
5356 /* 84XX Support **************************************************************/
5357
5358 static LIST_HEAD(qla_cs84xx_list);
5359 static DEFINE_MUTEX(qla_cs84xx_mutex);
5360
5361 static struct qla_chip_state_84xx *
5362 qla84xx_get_chip(struct scsi_qla_host *vha)
5363 {
5364 struct qla_chip_state_84xx *cs84xx;
5365 struct qla_hw_data *ha = vha->hw;
5366
5367 mutex_lock(&qla_cs84xx_mutex);
5368
5369 /* Find any shared 84xx chip. */
5370 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
5371 if (cs84xx->bus == ha->pdev->bus) {
5372 kref_get(&cs84xx->kref);
5373 goto done;
5374 }
5375 }
5376
5377 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
5378 if (!cs84xx)
5379 goto done;
5380
5381 kref_init(&cs84xx->kref);
5382 spin_lock_init(&cs84xx->access_lock);
5383 mutex_init(&cs84xx->fw_update_mutex);
5384 cs84xx->bus = ha->pdev->bus;
5385
5386 list_add_tail(&cs84xx->list, &qla_cs84xx_list);
5387 done:
5388 mutex_unlock(&qla_cs84xx_mutex);
5389 return cs84xx;
5390 }
5391
5392 static void
5393 __qla84xx_chip_release(struct kref *kref)
5394 {
5395 struct qla_chip_state_84xx *cs84xx =
5396 container_of(kref, struct qla_chip_state_84xx, kref);
5397
5398 mutex_lock(&qla_cs84xx_mutex);
5399 list_del(&cs84xx->list);
5400 mutex_unlock(&qla_cs84xx_mutex);
5401 kfree(cs84xx);
5402 }
5403
5404 void
5405 qla84xx_put_chip(struct scsi_qla_host *vha)
5406 {
5407 struct qla_hw_data *ha = vha->hw;
5408 if (ha->cs84xx)
5409 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
5410 }
5411
5412 static int
5413 qla84xx_init_chip(scsi_qla_host_t *vha)
5414 {
5415 int rval;
5416 uint16_t status[2];
5417 struct qla_hw_data *ha = vha->hw;
5418
5419 mutex_lock(&ha->cs84xx->fw_update_mutex);
5420
5421 rval = qla84xx_verify_chip(vha, status);
5422
5423 mutex_unlock(&ha->cs84xx->fw_update_mutex);
5424
5425 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED:
5426 QLA_SUCCESS;
5427 }
5428
5429 /* 81XX Support **************************************************************/
5430
5431 int
5432 qla81xx_nvram_config(scsi_qla_host_t *vha)
5433 {
5434 int rval;
5435 struct init_cb_81xx *icb;
5436 struct nvram_81xx *nv;
5437 uint32_t *dptr;
5438 uint8_t *dptr1, *dptr2;
5439 uint32_t chksum;
5440 uint16_t cnt;
5441 struct qla_hw_data *ha = vha->hw;
5442
5443 rval = QLA_SUCCESS;
5444 icb = (struct init_cb_81xx *)ha->init_cb;
5445 nv = ha->nvram;
5446
5447 /* Determine NVRAM starting address. */
5448 ha->nvram_size = sizeof(struct nvram_81xx);
5449 ha->vpd_size = FA_NVRAM_VPD_SIZE;
5450
5451 /* Get VPD data into cache */
5452 ha->vpd = ha->nvram + VPD_OFFSET;
5453 ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2,
5454 ha->vpd_size);
5455
5456 /* Get NVRAM data into cache and calculate checksum. */
5457 ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2,
5458 ha->nvram_size);
5459 dptr = (uint32_t *)nv;
5460 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
5461 chksum += le32_to_cpu(*dptr++);
5462
5463 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111,
5464 "Contents of NVRAM:\n");
5465 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112,
5466 (uint8_t *)nv, ha->nvram_size);
5467
5468 /* Bad NVRAM data, set defaults parameters. */
5469 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
5470 || nv->id[3] != ' ' ||
5471 nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
5472 /* Reset NVRAM data. */
5473 ql_log(ql_log_info, vha, 0x0073,
5474 "Inconsistent NVRAM detected: checksum=0x%x id=%c "
5475 "version=0x%x.\n", chksum, nv->id[0],
5476 le16_to_cpu(nv->nvram_version));
5477 ql_log(ql_log_info, vha, 0x0074,
5478 "Falling back to functioning (yet invalid -- WWPN) "
5479 "defaults.\n");
5480
5481 /*
5482 * Set default initialization control block.
5483 */
5484 memset(nv, 0, ha->nvram_size);
5485 nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
5486 nv->version = __constant_cpu_to_le16(ICB_VERSION);
5487 nv->frame_payload_size = __constant_cpu_to_le16(2048);
5488 nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
5489 nv->exchange_count = __constant_cpu_to_le16(0);
5490 nv->port_name[0] = 0x21;
5491 nv->port_name[1] = 0x00 + ha->port_no;
5492 nv->port_name[2] = 0x00;
5493 nv->port_name[3] = 0xe0;
5494 nv->port_name[4] = 0x8b;
5495 nv->port_name[5] = 0x1c;
5496 nv->port_name[6] = 0x55;
5497 nv->port_name[7] = 0x86;
5498 nv->node_name[0] = 0x20;
5499 nv->node_name[1] = 0x00;
5500 nv->node_name[2] = 0x00;
5501 nv->node_name[3] = 0xe0;
5502 nv->node_name[4] = 0x8b;
5503 nv->node_name[5] = 0x1c;
5504 nv->node_name[6] = 0x55;
5505 nv->node_name[7] = 0x86;
5506 nv->login_retry_count = __constant_cpu_to_le16(8);
5507 nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
5508 nv->login_timeout = __constant_cpu_to_le16(0);
5509 nv->firmware_options_1 =
5510 __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
5511 nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
5512 nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
5513 nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
5514 nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
5515 nv->efi_parameters = __constant_cpu_to_le32(0);
5516 nv->reset_delay = 5;
5517 nv->max_luns_per_target = __constant_cpu_to_le16(128);
5518 nv->port_down_retry_count = __constant_cpu_to_le16(30);
5519 nv->link_down_timeout = __constant_cpu_to_le16(180);
5520 nv->enode_mac[0] = 0x00;
5521 nv->enode_mac[1] = 0xC0;
5522 nv->enode_mac[2] = 0xDD;
5523 nv->enode_mac[3] = 0x04;
5524 nv->enode_mac[4] = 0x05;
5525 nv->enode_mac[5] = 0x06 + ha->port_no;
5526
5527 rval = 1;
5528 }
5529
5530 if (IS_T10_PI_CAPABLE(ha))
5531 nv->frame_payload_size &= ~7;
5532
5533 /* Reset Initialization control block */
5534 memset(icb, 0, ha->init_cb_size);
5535
5536 /* Copy 1st segment. */
5537 dptr1 = (uint8_t *)icb;
5538 dptr2 = (uint8_t *)&nv->version;
5539 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
5540 while (cnt--)
5541 *dptr1++ = *dptr2++;
5542
5543 icb->login_retry_count = nv->login_retry_count;
5544
5545 /* Copy 2nd segment. */
5546 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
5547 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
5548 cnt = (uint8_t *)&icb->reserved_5 -
5549 (uint8_t *)&icb->interrupt_delay_timer;
5550 while (cnt--)
5551 *dptr1++ = *dptr2++;
5552
5553 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
5554 /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
5555 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
5556 icb->enode_mac[0] = 0x00;
5557 icb->enode_mac[1] = 0xC0;
5558 icb->enode_mac[2] = 0xDD;
5559 icb->enode_mac[3] = 0x04;
5560 icb->enode_mac[4] = 0x05;
5561 icb->enode_mac[5] = 0x06 + ha->port_no;
5562 }
5563
5564 /* Use extended-initialization control block. */
5565 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
5566
5567 /*
5568 * Setup driver NVRAM options.
5569 */
5570 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
5571 "QLE8XXX");
5572
5573 /* Use alternate WWN? */
5574 if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
5575 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
5576 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
5577 }
5578
5579 /* Prepare nodename */
5580 if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
5581 /*
5582 * Firmware will apply the following mask if the nodename was
5583 * not provided.
5584 */
5585 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
5586 icb->node_name[0] &= 0xF0;
5587 }
5588
5589 /* Set host adapter parameters. */
5590 ha->flags.disable_risc_code_load = 0;
5591 ha->flags.enable_lip_reset = 0;
5592 ha->flags.enable_lip_full_login =
5593 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
5594 ha->flags.enable_target_reset =
5595 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
5596 ha->flags.enable_led_scheme = 0;
5597 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
5598
5599 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
5600 (BIT_6 | BIT_5 | BIT_4)) >> 4;
5601
5602 /* save HBA serial number */
5603 ha->serial0 = icb->port_name[5];
5604 ha->serial1 = icb->port_name[6];
5605 ha->serial2 = icb->port_name[7];
5606 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
5607 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
5608
5609 icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
5610
5611 ha->retry_count = le16_to_cpu(nv->login_retry_count);
5612
5613 /* Set minimum login_timeout to 4 seconds. */
5614 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
5615 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
5616 if (le16_to_cpu(nv->login_timeout) < 4)
5617 nv->login_timeout = __constant_cpu_to_le16(4);
5618 ha->login_timeout = le16_to_cpu(nv->login_timeout);
5619 icb->login_timeout = nv->login_timeout;
5620
5621 /* Set minimum RATOV to 100 tenths of a second. */
5622 ha->r_a_tov = 100;
5623
5624 ha->loop_reset_delay = nv->reset_delay;
5625
5626 /* Link Down Timeout = 0:
5627 *
5628 * When Port Down timer expires we will start returning
5629 * I/O's to OS with "DID_NO_CONNECT".
5630 *
5631 * Link Down Timeout != 0:
5632 *
5633 * The driver waits for the link to come up after link down
5634 * before returning I/Os to OS with "DID_NO_CONNECT".
5635 */
5636 if (le16_to_cpu(nv->link_down_timeout) == 0) {
5637 ha->loop_down_abort_time =
5638 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
5639 } else {
5640 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
5641 ha->loop_down_abort_time =
5642 (LOOP_DOWN_TIME - ha->link_down_timeout);
5643 }
5644
5645 /* Need enough time to try and get the port back. */
5646 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
5647 if (qlport_down_retry)
5648 ha->port_down_retry_count = qlport_down_retry;
5649
5650 /* Set login_retry_count */
5651 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
5652 if (ha->port_down_retry_count ==
5653 le16_to_cpu(nv->port_down_retry_count) &&
5654 ha->port_down_retry_count > 3)
5655 ha->login_retry_count = ha->port_down_retry_count;
5656 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
5657 ha->login_retry_count = ha->port_down_retry_count;
5658 if (ql2xloginretrycount)
5659 ha->login_retry_count = ql2xloginretrycount;
5660
5661 /* if not running MSI-X we need handshaking on interrupts */
5662 if (!vha->hw->flags.msix_enabled && IS_QLA83XX(ha))
5663 icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_22);
5664
5665 /* Enable ZIO. */
5666 if (!vha->flags.init_done) {
5667 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
5668 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
5669 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
5670 le16_to_cpu(icb->interrupt_delay_timer): 2;
5671 }
5672 icb->firmware_options_2 &= __constant_cpu_to_le32(
5673 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
5674 vha->flags.process_response_queue = 0;
5675 if (ha->zio_mode != QLA_ZIO_DISABLED) {
5676 ha->zio_mode = QLA_ZIO_MODE_6;
5677
5678 ql_log(ql_log_info, vha, 0x0075,
5679 "ZIO mode %d enabled; timer delay (%d us).\n",
5680 ha->zio_mode,
5681 ha->zio_timer * 100);
5682
5683 icb->firmware_options_2 |= cpu_to_le32(
5684 (uint32_t)ha->zio_mode);
5685 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
5686 vha->flags.process_response_queue = 1;
5687 }
5688
5689 if (rval) {
5690 ql_log(ql_log_warn, vha, 0x0076,
5691 "NVRAM configuration failed.\n");
5692 }
5693 return (rval);
5694 }
5695
5696 int
5697 qla82xx_restart_isp(scsi_qla_host_t *vha)
5698 {
5699 int status, rval;
5700 uint32_t wait_time;
5701 struct qla_hw_data *ha = vha->hw;
5702 struct req_que *req = ha->req_q_map[0];
5703 struct rsp_que *rsp = ha->rsp_q_map[0];
5704 struct scsi_qla_host *vp;
5705 unsigned long flags;
5706
5707 status = qla2x00_init_rings(vha);
5708 if (!status) {
5709 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
5710 ha->flags.chip_reset_done = 1;
5711
5712 status = qla2x00_fw_ready(vha);
5713 if (!status) {
5714 ql_log(ql_log_info, vha, 0x803c,
5715 "Start configure loop, status =%d.\n", status);
5716
5717 /* Issue a marker after FW becomes ready. */
5718 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
5719
5720 vha->flags.online = 1;
5721 /* Wait at most MAX_TARGET RSCNs for a stable link. */
5722 wait_time = 256;
5723 do {
5724 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5725 qla2x00_configure_loop(vha);
5726 wait_time--;
5727 } while (!atomic_read(&vha->loop_down_timer) &&
5728 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) &&
5729 wait_time &&
5730 (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)));
5731 }
5732
5733 /* if no cable then assume it's good */
5734 if ((vha->device_flags & DFLG_NO_CABLE))
5735 status = 0;
5736
5737 ql_log(ql_log_info, vha, 0x8000,
5738 "Configure loop done, status = 0x%x.\n", status);
5739 }
5740
5741 if (!status) {
5742 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
5743
5744 if (!atomic_read(&vha->loop_down_timer)) {
5745 /*
5746 * Issue marker command only when we are going
5747 * to start the I/O .
5748 */
5749 vha->marker_needed = 1;
5750 }
5751
5752 vha->flags.online = 1;
5753
5754 ha->isp_ops->enable_intrs(ha);
5755
5756 ha->isp_abort_cnt = 0;
5757 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
5758
5759 /* Update the firmware version */
5760 status = qla82xx_check_md_needed(vha);
5761
5762 if (ha->fce) {
5763 ha->flags.fce_enabled = 1;
5764 memset(ha->fce, 0,
5765 fce_calc_size(ha->fce_bufs));
5766 rval = qla2x00_enable_fce_trace(vha,
5767 ha->fce_dma, ha->fce_bufs, ha->fce_mb,
5768 &ha->fce_bufs);
5769 if (rval) {
5770 ql_log(ql_log_warn, vha, 0x8001,
5771 "Unable to reinitialize FCE (%d).\n",
5772 rval);
5773 ha->flags.fce_enabled = 0;
5774 }
5775 }
5776
5777 if (ha->eft) {
5778 memset(ha->eft, 0, EFT_SIZE);
5779 rval = qla2x00_enable_eft_trace(vha,
5780 ha->eft_dma, EFT_NUM_BUFFERS);
5781 if (rval) {
5782 ql_log(ql_log_warn, vha, 0x8010,
5783 "Unable to reinitialize EFT (%d).\n",
5784 rval);
5785 }
5786 }
5787 }
5788
5789 if (!status) {
5790 ql_dbg(ql_dbg_taskm, vha, 0x8011,
5791 "qla82xx_restart_isp succeeded.\n");
5792
5793 spin_lock_irqsave(&ha->vport_slock, flags);
5794 list_for_each_entry(vp, &ha->vp_list, list) {
5795 if (vp->vp_idx) {
5796 atomic_inc(&vp->vref_count);
5797 spin_unlock_irqrestore(&ha->vport_slock, flags);
5798
5799 qla2x00_vp_abort_isp(vp);
5800
5801 spin_lock_irqsave(&ha->vport_slock, flags);
5802 atomic_dec(&vp->vref_count);
5803 }
5804 }
5805 spin_unlock_irqrestore(&ha->vport_slock, flags);
5806
5807 } else {
5808 ql_log(ql_log_warn, vha, 0x8016,
5809 "qla82xx_restart_isp **** FAILED ****.\n");
5810 }
5811
5812 return status;
5813 }
5814
5815 void
5816 qla81xx_update_fw_options(scsi_qla_host_t *vha)
5817 {
5818 struct qla_hw_data *ha = vha->hw;
5819
5820 if (!ql2xetsenable)
5821 return;
5822
5823 /* Enable ETS Burst. */
5824 memset(ha->fw_options, 0, sizeof(ha->fw_options));
5825 ha->fw_options[2] |= BIT_9;
5826 qla2x00_set_fw_options(vha, ha->fw_options);
5827 }
5828
5829 /*
5830 * qla24xx_get_fcp_prio
5831 * Gets the fcp cmd priority value for the logged in port.
5832 * Looks for a match of the port descriptors within
5833 * each of the fcp prio config entries. If a match is found,
5834 * the tag (priority) value is returned.
5835 *
5836 * Input:
5837 * vha = scsi host structure pointer.
5838 * fcport = port structure pointer.
5839 *
5840 * Return:
5841 * non-zero (if found)
5842 * -1 (if not found)
5843 *
5844 * Context:
5845 * Kernel context
5846 */
5847 static int
5848 qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
5849 {
5850 int i, entries;
5851 uint8_t pid_match, wwn_match;
5852 int priority;
5853 uint32_t pid1, pid2;
5854 uint64_t wwn1, wwn2;
5855 struct qla_fcp_prio_entry *pri_entry;
5856 struct qla_hw_data *ha = vha->hw;
5857
5858 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled)
5859 return -1;
5860
5861 priority = -1;
5862 entries = ha->fcp_prio_cfg->num_entries;
5863 pri_entry = &ha->fcp_prio_cfg->entry[0];
5864
5865 for (i = 0; i < entries; i++) {
5866 pid_match = wwn_match = 0;
5867
5868 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) {
5869 pri_entry++;
5870 continue;
5871 }
5872
5873 /* check source pid for a match */
5874 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) {
5875 pid1 = pri_entry->src_pid & INVALID_PORT_ID;
5876 pid2 = vha->d_id.b24 & INVALID_PORT_ID;
5877 if (pid1 == INVALID_PORT_ID)
5878 pid_match++;
5879 else if (pid1 == pid2)
5880 pid_match++;
5881 }
5882
5883 /* check destination pid for a match */
5884 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) {
5885 pid1 = pri_entry->dst_pid & INVALID_PORT_ID;
5886 pid2 = fcport->d_id.b24 & INVALID_PORT_ID;
5887 if (pid1 == INVALID_PORT_ID)
5888 pid_match++;
5889 else if (pid1 == pid2)
5890 pid_match++;
5891 }
5892
5893 /* check source WWN for a match */
5894 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) {
5895 wwn1 = wwn_to_u64(vha->port_name);
5896 wwn2 = wwn_to_u64(pri_entry->src_wwpn);
5897 if (wwn2 == (uint64_t)-1)
5898 wwn_match++;
5899 else if (wwn1 == wwn2)
5900 wwn_match++;
5901 }
5902
5903 /* check destination WWN for a match */
5904 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) {
5905 wwn1 = wwn_to_u64(fcport->port_name);
5906 wwn2 = wwn_to_u64(pri_entry->dst_wwpn);
5907 if (wwn2 == (uint64_t)-1)
5908 wwn_match++;
5909 else if (wwn1 == wwn2)
5910 wwn_match++;
5911 }
5912
5913 if (pid_match == 2 || wwn_match == 2) {
5914 /* Found a matching entry */
5915 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID)
5916 priority = pri_entry->tag;
5917 break;
5918 }
5919
5920 pri_entry++;
5921 }
5922
5923 return priority;
5924 }
5925
5926 /*
5927 * qla24xx_update_fcport_fcp_prio
5928 * Activates fcp priority for the logged in fc port
5929 *
5930 * Input:
5931 * vha = scsi host structure pointer.
5932 * fcp = port structure pointer.
5933 *
5934 * Return:
5935 * QLA_SUCCESS or QLA_FUNCTION_FAILED
5936 *
5937 * Context:
5938 * Kernel context.
5939 */
5940 int
5941 qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
5942 {
5943 int ret;
5944 int priority;
5945 uint16_t mb[5];
5946
5947 if (fcport->port_type != FCT_TARGET ||
5948 fcport->loop_id == FC_NO_LOOP_ID)
5949 return QLA_FUNCTION_FAILED;
5950
5951 priority = qla24xx_get_fcp_prio(vha, fcport);
5952 if (priority < 0)
5953 return QLA_FUNCTION_FAILED;
5954
5955 if (IS_QLA82XX(vha->hw)) {
5956 fcport->fcp_prio = priority & 0xf;
5957 return QLA_SUCCESS;
5958 }
5959
5960 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb);
5961 if (ret == QLA_SUCCESS) {
5962 if (fcport->fcp_prio != priority)
5963 ql_dbg(ql_dbg_user, vha, 0x709e,
5964 "Updated FCP_CMND priority - value=%d loop_id=%d "
5965 "port_id=%02x%02x%02x.\n", priority,
5966 fcport->loop_id, fcport->d_id.b.domain,
5967 fcport->d_id.b.area, fcport->d_id.b.al_pa);
5968 fcport->fcp_prio = priority & 0xf;
5969 } else
5970 ql_dbg(ql_dbg_user, vha, 0x704f,
5971 "Unable to update FCP_CMND priority - ret=0x%x for "
5972 "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id,
5973 fcport->d_id.b.domain, fcport->d_id.b.area,
5974 fcport->d_id.b.al_pa);
5975 return ret;
5976 }
5977
5978 /*
5979 * qla24xx_update_all_fcp_prio
5980 * Activates fcp priority for all the logged in ports
5981 *
5982 * Input:
5983 * ha = adapter block pointer.
5984 *
5985 * Return:
5986 * QLA_SUCCESS or QLA_FUNCTION_FAILED
5987 *
5988 * Context:
5989 * Kernel context.
5990 */
5991 int
5992 qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha)
5993 {
5994 int ret;
5995 fc_port_t *fcport;
5996
5997 ret = QLA_FUNCTION_FAILED;
5998 /* We need to set priority for all logged in ports */
5999 list_for_each_entry(fcport, &vha->vp_fcports, list)
6000 ret = qla24xx_update_fcport_fcp_prio(vha, fcport);
6001
6002 return ret;
6003 }
Linux kernel - Deliverables
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