2 * QLogic Fibre Channel HBA Driver
3 * Copyright (c) 2003-2012 QLogic Corporation
5 * See LICENSE.qla2xxx for copyright and licensing details.
9 #include <linux/moduleparam.h>
10 #include <linux/vmalloc.h>
11 #include <linux/delay.h>
12 #include <linux/kthread.h>
13 #include <linux/mutex.h>
14 #include <linux/kobject.h>
15 #include <linux/slab.h>
16 #include <scsi/scsi_tcq.h>
17 #include <scsi/scsicam.h>
18 #include <scsi/scsi_transport.h>
19 #include <scsi/scsi_transport_fc.h>
21 #include "qla_target.h"
26 char qla2x00_version_str
[40];
28 static int apidev_major
;
31 * SRB allocation cache
33 static struct kmem_cache
*srb_cachep
;
36 * CT6 CTX allocation cache
38 static struct kmem_cache
*ctx_cachep
;
40 * error level for logging
42 int ql_errlev
= ql_log_all
;
44 static int ql2xenableclass2
;
45 module_param(ql2xenableclass2
, int, S_IRUGO
|S_IRUSR
);
46 MODULE_PARM_DESC(ql2xenableclass2
,
47 "Specify if Class 2 operations are supported from the very "
48 "beginning. Default is 0 - class 2 not supported.");
50 int ql2xlogintimeout
= 20;
51 module_param(ql2xlogintimeout
, int, S_IRUGO
);
52 MODULE_PARM_DESC(ql2xlogintimeout
,
53 "Login timeout value in seconds.");
55 int qlport_down_retry
;
56 module_param(qlport_down_retry
, int, S_IRUGO
);
57 MODULE_PARM_DESC(qlport_down_retry
,
58 "Maximum number of command retries to a port that returns "
59 "a PORT-DOWN status.");
61 int ql2xplogiabsentdevice
;
62 module_param(ql2xplogiabsentdevice
, int, S_IRUGO
|S_IWUSR
);
63 MODULE_PARM_DESC(ql2xplogiabsentdevice
,
64 "Option to enable PLOGI to devices that are not present after "
65 "a Fabric scan. This is needed for several broken switches. "
66 "Default is 0 - no PLOGI. 1 - perfom PLOGI.");
68 int ql2xloginretrycount
= 0;
69 module_param(ql2xloginretrycount
, int, S_IRUGO
);
70 MODULE_PARM_DESC(ql2xloginretrycount
,
71 "Specify an alternate value for the NVRAM login retry count.");
73 int ql2xallocfwdump
= 1;
74 module_param(ql2xallocfwdump
, int, S_IRUGO
);
75 MODULE_PARM_DESC(ql2xallocfwdump
,
76 "Option to enable allocation of memory for a firmware dump "
77 "during HBA initialization. Memory allocation requirements "
78 "vary by ISP type. Default is 1 - allocate memory.");
80 int ql2xextended_error_logging
;
81 module_param(ql2xextended_error_logging
, int, S_IRUGO
|S_IWUSR
);
82 MODULE_PARM_DESC(ql2xextended_error_logging
,
83 "Option to enable extended error logging,\n"
84 "\t\tDefault is 0 - no logging. 0x40000000 - Module Init & Probe.\n"
85 "\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
86 "\t\t0x08000000 - IO tracing. 0x04000000 - DPC Thread.\n"
87 "\t\t0x02000000 - Async events. 0x01000000 - Timer routines.\n"
88 "\t\t0x00800000 - User space. 0x00400000 - Task Management.\n"
89 "\t\t0x00200000 - AER/EEH. 0x00100000 - Multi Q.\n"
90 "\t\t0x00080000 - P3P Specific. 0x00040000 - Virtual Port.\n"
91 "\t\t0x00020000 - Buffer Dump. 0x00010000 - Misc.\n"
92 "\t\t0x00008000 - Verbose. 0x00004000 - Target.\n"
93 "\t\t0x00002000 - Target Mgmt. 0x00001000 - Target TMF.\n"
94 "\t\t0x7fffffff - For enabling all logs, can be too many logs.\n"
95 "\t\t0x1e400000 - Preferred value for capturing essential "
96 "debug information (equivalent to old "
97 "ql2xextended_error_logging=1).\n"
98 "\t\tDo LOGICAL OR of the value to enable more than one level");
100 int ql2xshiftctondsd
= 6;
101 module_param(ql2xshiftctondsd
, int, S_IRUGO
);
102 MODULE_PARM_DESC(ql2xshiftctondsd
,
103 "Set to control shifting of command type processing "
104 "based on total number of SG elements.");
106 static void qla2x00_free_device(scsi_qla_host_t
*);
108 int ql2xfdmienable
=1;
109 module_param(ql2xfdmienable
, int, S_IRUGO
);
110 MODULE_PARM_DESC(ql2xfdmienable
,
111 "Enables FDMI registrations. "
112 "0 - no FDMI. Default is 1 - perform FDMI.");
114 int ql2xmaxqdepth
= MAX_Q_DEPTH
;
115 module_param(ql2xmaxqdepth
, int, S_IRUGO
|S_IWUSR
);
116 MODULE_PARM_DESC(ql2xmaxqdepth
,
117 "Maximum queue depth to set for each LUN. "
120 int ql2xenabledif
= 2;
121 module_param(ql2xenabledif
, int, S_IRUGO
);
122 MODULE_PARM_DESC(ql2xenabledif
,
123 " Enable T10-CRC-DIF "
124 " Default is 0 - No DIF Support. 1 - Enable it"
125 ", 2 - Enable DIF for all types, except Type 0.");
127 int ql2xenablehba_err_chk
= 2;
128 module_param(ql2xenablehba_err_chk
, int, S_IRUGO
|S_IWUSR
);
129 MODULE_PARM_DESC(ql2xenablehba_err_chk
,
130 " Enable T10-CRC-DIF Error isolation by HBA:\n"
132 " 0 -- Error isolation disabled\n"
133 " 1 -- Error isolation enabled only for DIX Type 0\n"
134 " 2 -- Error isolation enabled for all Types\n");
136 int ql2xiidmaenable
=1;
137 module_param(ql2xiidmaenable
, int, S_IRUGO
);
138 MODULE_PARM_DESC(ql2xiidmaenable
,
139 "Enables iIDMA settings "
140 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
142 int ql2xmaxqueues
= 1;
143 module_param(ql2xmaxqueues
, int, S_IRUGO
);
144 MODULE_PARM_DESC(ql2xmaxqueues
,
145 "Enables MQ settings "
146 "Default is 1 for single queue. Set it to number "
147 "of queues in MQ mode.");
149 int ql2xmultique_tag
;
150 module_param(ql2xmultique_tag
, int, S_IRUGO
);
151 MODULE_PARM_DESC(ql2xmultique_tag
,
152 "Enables CPU affinity settings for the driver "
153 "Default is 0 for no affinity of request and response IO. "
154 "Set it to 1 to turn on the cpu affinity.");
157 module_param(ql2xfwloadbin
, int, S_IRUGO
|S_IWUSR
);
158 MODULE_PARM_DESC(ql2xfwloadbin
,
159 "Option to specify location from which to load ISP firmware:.\n"
160 " 2 -- load firmware via the request_firmware() (hotplug).\n"
162 " 1 -- load firmware from flash.\n"
163 " 0 -- use default semantics.\n");
166 module_param(ql2xetsenable
, int, S_IRUGO
);
167 MODULE_PARM_DESC(ql2xetsenable
,
168 "Enables firmware ETS burst."
169 "Default is 0 - skip ETS enablement.");
172 module_param(ql2xdbwr
, int, S_IRUGO
|S_IWUSR
);
173 MODULE_PARM_DESC(ql2xdbwr
,
174 "Option to specify scheme for request queue posting.\n"
175 " 0 -- Regular doorbell.\n"
176 " 1 -- CAMRAM doorbell (faster).\n");
178 int ql2xtargetreset
= 1;
179 module_param(ql2xtargetreset
, int, S_IRUGO
);
180 MODULE_PARM_DESC(ql2xtargetreset
,
181 "Enable target reset."
182 "Default is 1 - use hw defaults.");
185 module_param(ql2xgffidenable
, int, S_IRUGO
);
186 MODULE_PARM_DESC(ql2xgffidenable
,
187 "Enables GFF_ID checks of port type. "
188 "Default is 0 - Do not use GFF_ID information.");
190 int ql2xasynctmfenable
;
191 module_param(ql2xasynctmfenable
, int, S_IRUGO
);
192 MODULE_PARM_DESC(ql2xasynctmfenable
,
193 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
194 "Default is 0 - Issue TM IOCBs via mailbox mechanism.");
196 int ql2xdontresethba
;
197 module_param(ql2xdontresethba
, int, S_IRUGO
|S_IWUSR
);
198 MODULE_PARM_DESC(ql2xdontresethba
,
199 "Option to specify reset behaviour.\n"
200 " 0 (Default) -- Reset on failure.\n"
201 " 1 -- Do not reset on failure.\n");
203 uint ql2xmaxlun
= MAX_LUNS
;
204 module_param(ql2xmaxlun
, uint
, S_IRUGO
);
205 MODULE_PARM_DESC(ql2xmaxlun
,
206 "Defines the maximum LU number to register with the SCSI "
207 "midlayer. Default is 65535.");
209 int ql2xmdcapmask
= 0x1F;
210 module_param(ql2xmdcapmask
, int, S_IRUGO
);
211 MODULE_PARM_DESC(ql2xmdcapmask
,
212 "Set the Minidump driver capture mask level. "
213 "Default is 0x1F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F.");
215 int ql2xmdenable
= 1;
216 module_param(ql2xmdenable
, int, S_IRUGO
);
217 MODULE_PARM_DESC(ql2xmdenable
,
218 "Enable/disable MiniDump. "
219 "0 - MiniDump disabled. "
220 "1 (Default) - MiniDump enabled.");
223 * SCSI host template entry points
225 static int qla2xxx_slave_configure(struct scsi_device
* device
);
226 static int qla2xxx_slave_alloc(struct scsi_device
*);
227 static int qla2xxx_scan_finished(struct Scsi_Host
*, unsigned long time
);
228 static void qla2xxx_scan_start(struct Scsi_Host
*);
229 static void qla2xxx_slave_destroy(struct scsi_device
*);
230 static int qla2xxx_queuecommand(struct Scsi_Host
*h
, struct scsi_cmnd
*cmd
);
231 static int qla2xxx_eh_abort(struct scsi_cmnd
*);
232 static int qla2xxx_eh_device_reset(struct scsi_cmnd
*);
233 static int qla2xxx_eh_target_reset(struct scsi_cmnd
*);
234 static int qla2xxx_eh_bus_reset(struct scsi_cmnd
*);
235 static int qla2xxx_eh_host_reset(struct scsi_cmnd
*);
237 static int qla2x00_change_queue_depth(struct scsi_device
*, int, int);
238 static int qla2x00_change_queue_type(struct scsi_device
*, int);
240 struct scsi_host_template qla2xxx_driver_template
= {
241 .module
= THIS_MODULE
,
242 .name
= QLA2XXX_DRIVER_NAME
,
243 .queuecommand
= qla2xxx_queuecommand
,
245 .eh_abort_handler
= qla2xxx_eh_abort
,
246 .eh_device_reset_handler
= qla2xxx_eh_device_reset
,
247 .eh_target_reset_handler
= qla2xxx_eh_target_reset
,
248 .eh_bus_reset_handler
= qla2xxx_eh_bus_reset
,
249 .eh_host_reset_handler
= qla2xxx_eh_host_reset
,
251 .slave_configure
= qla2xxx_slave_configure
,
253 .slave_alloc
= qla2xxx_slave_alloc
,
254 .slave_destroy
= qla2xxx_slave_destroy
,
255 .scan_finished
= qla2xxx_scan_finished
,
256 .scan_start
= qla2xxx_scan_start
,
257 .change_queue_depth
= qla2x00_change_queue_depth
,
258 .change_queue_type
= qla2x00_change_queue_type
,
261 .use_clustering
= ENABLE_CLUSTERING
,
262 .sg_tablesize
= SG_ALL
,
264 .max_sectors
= 0xFFFF,
265 .shost_attrs
= qla2x00_host_attrs
,
267 .supported_mode
= MODE_INITIATOR
,
270 static struct scsi_transport_template
*qla2xxx_transport_template
= NULL
;
271 struct scsi_transport_template
*qla2xxx_transport_vport_template
= NULL
;
273 /* TODO Convert to inlines
279 qla2x00_start_timer(scsi_qla_host_t
*vha
, void *func
, unsigned long interval
)
281 init_timer(&vha
->timer
);
282 vha
->timer
.expires
= jiffies
+ interval
* HZ
;
283 vha
->timer
.data
= (unsigned long)vha
;
284 vha
->timer
.function
= (void (*)(unsigned long))func
;
285 add_timer(&vha
->timer
);
286 vha
->timer_active
= 1;
290 qla2x00_restart_timer(scsi_qla_host_t
*vha
, unsigned long interval
)
292 /* Currently used for 82XX only. */
293 if (vha
->device_flags
& DFLG_DEV_FAILED
) {
294 ql_dbg(ql_dbg_timer
, vha
, 0x600d,
295 "Device in a failed state, returning.\n");
299 mod_timer(&vha
->timer
, jiffies
+ interval
* HZ
);
302 static __inline__
void
303 qla2x00_stop_timer(scsi_qla_host_t
*vha
)
305 del_timer_sync(&vha
->timer
);
306 vha
->timer_active
= 0;
309 static int qla2x00_do_dpc(void *data
);
311 static void qla2x00_rst_aen(scsi_qla_host_t
*);
313 static int qla2x00_mem_alloc(struct qla_hw_data
*, uint16_t, uint16_t,
314 struct req_que
**, struct rsp_que
**);
315 static void qla2x00_free_fw_dump(struct qla_hw_data
*);
316 static void qla2x00_mem_free(struct qla_hw_data
*);
318 /* -------------------------------------------------------------------------- */
319 static int qla2x00_alloc_queues(struct qla_hw_data
*ha
, struct req_que
*req
,
322 scsi_qla_host_t
*vha
= pci_get_drvdata(ha
->pdev
);
323 ha
->req_q_map
= kzalloc(sizeof(struct req_que
*) * ha
->max_req_queues
,
325 if (!ha
->req_q_map
) {
326 ql_log(ql_log_fatal
, vha
, 0x003b,
327 "Unable to allocate memory for request queue ptrs.\n");
331 ha
->rsp_q_map
= kzalloc(sizeof(struct rsp_que
*) * ha
->max_rsp_queues
,
333 if (!ha
->rsp_q_map
) {
334 ql_log(ql_log_fatal
, vha
, 0x003c,
335 "Unable to allocate memory for response queue ptrs.\n");
339 * Make sure we record at least the request and response queue zero in
340 * case we need to free them if part of the probe fails.
342 ha
->rsp_q_map
[0] = rsp
;
343 ha
->req_q_map
[0] = req
;
344 set_bit(0, ha
->rsp_qid_map
);
345 set_bit(0, ha
->req_qid_map
);
349 kfree(ha
->req_q_map
);
350 ha
->req_q_map
= NULL
;
355 static void qla2x00_free_req_que(struct qla_hw_data
*ha
, struct req_que
*req
)
357 if (req
&& req
->ring
)
358 dma_free_coherent(&ha
->pdev
->dev
,
359 (req
->length
+ 1) * sizeof(request_t
),
360 req
->ring
, req
->dma
);
363 kfree(req
->outstanding_cmds
);
369 static void qla2x00_free_rsp_que(struct qla_hw_data
*ha
, struct rsp_que
*rsp
)
371 if (rsp
&& rsp
->ring
)
372 dma_free_coherent(&ha
->pdev
->dev
,
373 (rsp
->length
+ 1) * sizeof(response_t
),
374 rsp
->ring
, rsp
->dma
);
380 static void qla2x00_free_queues(struct qla_hw_data
*ha
)
386 for (cnt
= 0; cnt
< ha
->max_req_queues
; cnt
++) {
387 req
= ha
->req_q_map
[cnt
];
388 qla2x00_free_req_que(ha
, req
);
390 kfree(ha
->req_q_map
);
391 ha
->req_q_map
= NULL
;
393 for (cnt
= 0; cnt
< ha
->max_rsp_queues
; cnt
++) {
394 rsp
= ha
->rsp_q_map
[cnt
];
395 qla2x00_free_rsp_que(ha
, rsp
);
397 kfree(ha
->rsp_q_map
);
398 ha
->rsp_q_map
= NULL
;
401 static int qla25xx_setup_mode(struct scsi_qla_host
*vha
)
403 uint16_t options
= 0;
405 struct qla_hw_data
*ha
= vha
->hw
;
407 if (!(ha
->fw_attributes
& BIT_6
)) {
408 ql_log(ql_log_warn
, vha
, 0x00d8,
409 "Firmware is not multi-queue capable.\n");
412 if (ql2xmultique_tag
) {
413 /* create a request queue for IO */
415 req
= qla25xx_create_req_que(ha
, options
, 0, 0, -1,
416 QLA_DEFAULT_QUE_QOS
);
418 ql_log(ql_log_warn
, vha
, 0x00e0,
419 "Failed to create request queue.\n");
422 ha
->wq
= alloc_workqueue("qla2xxx_wq", WQ_MEM_RECLAIM
, 1);
423 vha
->req
= ha
->req_q_map
[req
];
425 for (ques
= 1; ques
< ha
->max_rsp_queues
; ques
++) {
426 ret
= qla25xx_create_rsp_que(ha
, options
, 0, 0, req
);
428 ql_log(ql_log_warn
, vha
, 0x00e8,
429 "Failed to create response queue.\n");
433 ha
->flags
.cpu_affinity_enabled
= 1;
434 ql_dbg(ql_dbg_multiq
, vha
, 0xc007,
435 "CPU affinity mode enalbed, "
436 "no. of response queues:%d no. of request queues:%d.\n",
437 ha
->max_rsp_queues
, ha
->max_req_queues
);
438 ql_dbg(ql_dbg_init
, vha
, 0x00e9,
439 "CPU affinity mode enalbed, "
440 "no. of response queues:%d no. of request queues:%d.\n",
441 ha
->max_rsp_queues
, ha
->max_req_queues
);
445 qla25xx_delete_queues(vha
);
446 destroy_workqueue(ha
->wq
);
448 vha
->req
= ha
->req_q_map
[0];
451 kfree(ha
->req_q_map
);
452 kfree(ha
->rsp_q_map
);
453 ha
->max_req_queues
= ha
->max_rsp_queues
= 1;
458 qla2x00_pci_info_str(struct scsi_qla_host
*vha
, char *str
)
460 struct qla_hw_data
*ha
= vha
->hw
;
461 static char *pci_bus_modes
[] = {
462 "33", "66", "100", "133",
467 pci_bus
= (ha
->pci_attr
& (BIT_9
| BIT_10
)) >> 9;
470 strcat(str
, pci_bus_modes
[pci_bus
]);
472 pci_bus
= (ha
->pci_attr
& BIT_8
) >> 8;
474 strcat(str
, pci_bus_modes
[pci_bus
]);
476 strcat(str
, " MHz)");
482 qla24xx_pci_info_str(struct scsi_qla_host
*vha
, char *str
)
484 static char *pci_bus_modes
[] = { "33", "66", "100", "133", };
485 struct qla_hw_data
*ha
= vha
->hw
;
489 pcie_reg
= pci_pcie_cap(ha
->pdev
);
492 uint16_t pcie_lstat
, lspeed
, lwidth
;
494 pcie_reg
+= PCI_EXP_LNKCAP
;
495 pci_read_config_word(ha
->pdev
, pcie_reg
, &pcie_lstat
);
496 lspeed
= pcie_lstat
& (BIT_0
| BIT_1
| BIT_2
| BIT_3
);
497 lwidth
= (pcie_lstat
&
498 (BIT_4
| BIT_5
| BIT_6
| BIT_7
| BIT_8
| BIT_9
)) >> 4;
500 strcpy(str
, "PCIe (");
503 strcat(str
, "2.5GT/s ");
506 strcat(str
, "5.0GT/s ");
509 strcat(str
, "8.0GT/s ");
512 strcat(str
, "<unknown> ");
515 snprintf(lwstr
, sizeof(lwstr
), "x%d)", lwidth
);
522 pci_bus
= (ha
->pci_attr
& CSRX_PCIX_BUS_MODE_MASK
) >> 8;
523 if (pci_bus
== 0 || pci_bus
== 8) {
525 strcat(str
, pci_bus_modes
[pci_bus
>> 3]);
529 strcat(str
, "Mode 2");
531 strcat(str
, "Mode 1");
533 strcat(str
, pci_bus_modes
[pci_bus
& ~BIT_2
]);
535 strcat(str
, " MHz)");
541 qla2x00_fw_version_str(struct scsi_qla_host
*vha
, char *str
)
544 struct qla_hw_data
*ha
= vha
->hw
;
546 sprintf(str
, "%d.%02d.%02d ", ha
->fw_major_version
,
547 ha
->fw_minor_version
,
548 ha
->fw_subminor_version
);
550 if (ha
->fw_attributes
& BIT_9
) {
555 switch (ha
->fw_attributes
& 0xFF) {
569 sprintf(un_str
, "(%x)", ha
->fw_attributes
);
573 if (ha
->fw_attributes
& 0x100)
580 qla24xx_fw_version_str(struct scsi_qla_host
*vha
, char *str
)
582 struct qla_hw_data
*ha
= vha
->hw
;
584 sprintf(str
, "%d.%02d.%02d (%x)", ha
->fw_major_version
,
585 ha
->fw_minor_version
, ha
->fw_subminor_version
, ha
->fw_attributes
);
590 qla2x00_sp_free_dma(void *vha
, void *ptr
)
592 srb_t
*sp
= (srb_t
*)ptr
;
593 struct scsi_cmnd
*cmd
= GET_CMD_SP(sp
);
594 struct qla_hw_data
*ha
= sp
->fcport
->vha
->hw
;
595 void *ctx
= GET_CMD_CTX_SP(sp
);
597 if (sp
->flags
& SRB_DMA_VALID
) {
599 sp
->flags
&= ~SRB_DMA_VALID
;
602 if (sp
->flags
& SRB_CRC_PROT_DMA_VALID
) {
603 dma_unmap_sg(&ha
->pdev
->dev
, scsi_prot_sglist(cmd
),
604 scsi_prot_sg_count(cmd
), cmd
->sc_data_direction
);
605 sp
->flags
&= ~SRB_CRC_PROT_DMA_VALID
;
608 if (sp
->flags
& SRB_CRC_CTX_DSD_VALID
) {
609 /* List assured to be having elements */
610 qla2x00_clean_dsd_pool(ha
, sp
);
611 sp
->flags
&= ~SRB_CRC_CTX_DSD_VALID
;
614 if (sp
->flags
& SRB_CRC_CTX_DMA_VALID
) {
615 dma_pool_free(ha
->dl_dma_pool
, ctx
,
616 ((struct crc_context
*)ctx
)->crc_ctx_dma
);
617 sp
->flags
&= ~SRB_CRC_CTX_DMA_VALID
;
620 if (sp
->flags
& SRB_FCP_CMND_DMA_VALID
) {
621 struct ct6_dsd
*ctx1
= (struct ct6_dsd
*)ctx
;
623 dma_pool_free(ha
->fcp_cmnd_dma_pool
, ctx1
->fcp_cmnd
,
625 list_splice(&ctx1
->dsd_list
, &ha
->gbl_dsd_list
);
626 ha
->gbl_dsd_inuse
-= ctx1
->dsd_use_cnt
;
627 ha
->gbl_dsd_avail
+= ctx1
->dsd_use_cnt
;
628 mempool_free(ctx1
, ha
->ctx_mempool
);
633 mempool_free(sp
, ha
->srb_mempool
);
637 qla2x00_sp_compl(void *data
, void *ptr
, int res
)
639 struct qla_hw_data
*ha
= (struct qla_hw_data
*)data
;
640 srb_t
*sp
= (srb_t
*)ptr
;
641 struct scsi_cmnd
*cmd
= GET_CMD_SP(sp
);
645 if (atomic_read(&sp
->ref_count
) == 0) {
646 ql_dbg(ql_dbg_io
, sp
->fcport
->vha
, 0x3015,
647 "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
649 if (ql2xextended_error_logging
& ql_dbg_io
)
653 if (!atomic_dec_and_test(&sp
->ref_count
))
656 qla2x00_sp_free_dma(ha
, sp
);
661 qla2xxx_queuecommand(struct Scsi_Host
*host
, struct scsi_cmnd
*cmd
)
663 scsi_qla_host_t
*vha
= shost_priv(host
);
664 fc_port_t
*fcport
= (struct fc_port
*) cmd
->device
->hostdata
;
665 struct fc_rport
*rport
= starget_to_rport(scsi_target(cmd
->device
));
666 struct qla_hw_data
*ha
= vha
->hw
;
667 struct scsi_qla_host
*base_vha
= pci_get_drvdata(ha
->pdev
);
671 if (ha
->flags
.eeh_busy
) {
672 if (ha
->flags
.pci_channel_io_perm_failure
) {
673 ql_dbg(ql_dbg_aer
, vha
, 0x9010,
674 "PCI Channel IO permanent failure, exiting "
676 cmd
->result
= DID_NO_CONNECT
<< 16;
678 ql_dbg(ql_dbg_aer
, vha
, 0x9011,
679 "EEH_Busy, Requeuing the cmd=%p.\n", cmd
);
680 cmd
->result
= DID_REQUEUE
<< 16;
682 goto qc24_fail_command
;
685 rval
= fc_remote_port_chkready(rport
);
688 ql_dbg(ql_dbg_io
+ ql_dbg_verbose
, vha
, 0x3003,
689 "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
691 goto qc24_fail_command
;
694 if (!vha
->flags
.difdix_supported
&&
695 scsi_get_prot_op(cmd
) != SCSI_PROT_NORMAL
) {
696 ql_dbg(ql_dbg_io
, vha
, 0x3004,
697 "DIF Cap not reg, fail DIF capable cmd's:%p.\n",
699 cmd
->result
= DID_NO_CONNECT
<< 16;
700 goto qc24_fail_command
;
704 cmd
->result
= DID_NO_CONNECT
<< 16;
705 goto qc24_fail_command
;
708 if (atomic_read(&fcport
->state
) != FCS_ONLINE
) {
709 if (atomic_read(&fcport
->state
) == FCS_DEVICE_DEAD
||
710 atomic_read(&base_vha
->loop_state
) == LOOP_DEAD
) {
711 ql_dbg(ql_dbg_io
, vha
, 0x3005,
712 "Returning DNC, fcport_state=%d loop_state=%d.\n",
713 atomic_read(&fcport
->state
),
714 atomic_read(&base_vha
->loop_state
));
715 cmd
->result
= DID_NO_CONNECT
<< 16;
716 goto qc24_fail_command
;
718 goto qc24_target_busy
;
721 sp
= qla2x00_get_sp(base_vha
, fcport
, GFP_ATOMIC
);
723 set_bit(HOST_RAMP_DOWN_QUEUE_DEPTH
, &vha
->dpc_flags
);
727 sp
->u
.scmd
.cmd
= cmd
;
728 sp
->type
= SRB_SCSI_CMD
;
729 atomic_set(&sp
->ref_count
, 1);
730 CMD_SP(cmd
) = (void *)sp
;
731 sp
->free
= qla2x00_sp_free_dma
;
732 sp
->done
= qla2x00_sp_compl
;
734 rval
= ha
->isp_ops
->start_scsi(sp
);
735 if (rval
!= QLA_SUCCESS
) {
736 ql_dbg(ql_dbg_io
+ ql_dbg_verbose
, vha
, 0x3013,
737 "Start scsi failed rval=%d for cmd=%p.\n", rval
, cmd
);
738 set_bit(HOST_RAMP_DOWN_QUEUE_DEPTH
, &vha
->dpc_flags
);
739 goto qc24_host_busy_free_sp
;
744 qc24_host_busy_free_sp
:
745 qla2x00_sp_free_dma(ha
, sp
);
748 return SCSI_MLQUEUE_HOST_BUSY
;
751 return SCSI_MLQUEUE_TARGET_BUSY
;
760 * qla2x00_eh_wait_on_command
761 * Waits for the command to be returned by the Firmware for some
765 * cmd = Scsi Command to wait on.
772 qla2x00_eh_wait_on_command(struct scsi_cmnd
*cmd
)
774 #define ABORT_POLLING_PERIOD 1000
775 #define ABORT_WAIT_ITER ((10 * 1000) / (ABORT_POLLING_PERIOD))
776 unsigned long wait_iter
= ABORT_WAIT_ITER
;
777 scsi_qla_host_t
*vha
= shost_priv(cmd
->device
->host
);
778 struct qla_hw_data
*ha
= vha
->hw
;
779 int ret
= QLA_SUCCESS
;
781 if (unlikely(pci_channel_offline(ha
->pdev
)) || ha
->flags
.eeh_busy
) {
782 ql_dbg(ql_dbg_taskm
, vha
, 0x8005,
783 "Return:eh_wait.\n");
787 while (CMD_SP(cmd
) && wait_iter
--) {
788 msleep(ABORT_POLLING_PERIOD
);
791 ret
= QLA_FUNCTION_FAILED
;
797 * qla2x00_wait_for_hba_online
798 * Wait till the HBA is online after going through
799 * <= MAX_RETRIES_OF_ISP_ABORT or
800 * finally HBA is disabled ie marked offline
803 * ha - pointer to host adapter structure
806 * Does context switching-Release SPIN_LOCK
807 * (if any) before calling this routine.
810 * Success (Adapter is online) : 0
811 * Failed (Adapter is offline/disabled) : 1
814 qla2x00_wait_for_hba_online(scsi_qla_host_t
*vha
)
817 unsigned long wait_online
;
818 struct qla_hw_data
*ha
= vha
->hw
;
819 scsi_qla_host_t
*base_vha
= pci_get_drvdata(ha
->pdev
);
821 wait_online
= jiffies
+ (MAX_LOOP_TIMEOUT
* HZ
);
822 while (((test_bit(ISP_ABORT_NEEDED
, &base_vha
->dpc_flags
)) ||
823 test_bit(ABORT_ISP_ACTIVE
, &base_vha
->dpc_flags
) ||
824 test_bit(ISP_ABORT_RETRY
, &base_vha
->dpc_flags
) ||
825 ha
->dpc_active
) && time_before(jiffies
, wait_online
)) {
829 if (base_vha
->flags
.online
)
830 return_status
= QLA_SUCCESS
;
832 return_status
= QLA_FUNCTION_FAILED
;
834 return (return_status
);
838 * qla2x00_wait_for_reset_ready
839 * Wait till the HBA is online after going through
840 * <= MAX_RETRIES_OF_ISP_ABORT or
841 * finally HBA is disabled ie marked offline or flash
842 * operations are in progress.
845 * ha - pointer to host adapter structure
848 * Does context switching-Release SPIN_LOCK
849 * (if any) before calling this routine.
852 * Success (Adapter is online/no flash ops) : 0
853 * Failed (Adapter is offline/disabled/flash ops in progress) : 1
856 qla2x00_wait_for_reset_ready(scsi_qla_host_t
*vha
)
859 unsigned long wait_online
;
860 struct qla_hw_data
*ha
= vha
->hw
;
861 scsi_qla_host_t
*base_vha
= pci_get_drvdata(ha
->pdev
);
863 wait_online
= jiffies
+ (MAX_LOOP_TIMEOUT
* HZ
);
864 while (((test_bit(ISP_ABORT_NEEDED
, &base_vha
->dpc_flags
)) ||
865 test_bit(ABORT_ISP_ACTIVE
, &base_vha
->dpc_flags
) ||
866 test_bit(ISP_ABORT_RETRY
, &base_vha
->dpc_flags
) ||
867 ha
->optrom_state
!= QLA_SWAITING
||
868 ha
->dpc_active
) && time_before(jiffies
, wait_online
))
871 if (base_vha
->flags
.online
&& ha
->optrom_state
== QLA_SWAITING
)
872 return_status
= QLA_SUCCESS
;
874 return_status
= QLA_FUNCTION_FAILED
;
876 ql_dbg(ql_dbg_taskm
, vha
, 0x8019,
877 "%s return status=%d.\n", __func__
, return_status
);
879 return return_status
;
883 qla2x00_wait_for_chip_reset(scsi_qla_host_t
*vha
)
886 unsigned long wait_reset
;
887 struct qla_hw_data
*ha
= vha
->hw
;
888 scsi_qla_host_t
*base_vha
= pci_get_drvdata(ha
->pdev
);
890 wait_reset
= jiffies
+ (MAX_LOOP_TIMEOUT
* HZ
);
891 while (((test_bit(ISP_ABORT_NEEDED
, &base_vha
->dpc_flags
)) ||
892 test_bit(ABORT_ISP_ACTIVE
, &base_vha
->dpc_flags
) ||
893 test_bit(ISP_ABORT_RETRY
, &base_vha
->dpc_flags
) ||
894 ha
->dpc_active
) && time_before(jiffies
, wait_reset
)) {
898 if (!test_bit(ISP_ABORT_NEEDED
, &base_vha
->dpc_flags
) &&
899 ha
->flags
.chip_reset_done
)
902 if (ha
->flags
.chip_reset_done
)
903 return_status
= QLA_SUCCESS
;
905 return_status
= QLA_FUNCTION_FAILED
;
907 return return_status
;
911 sp_get(struct srb
*sp
)
913 atomic_inc(&sp
->ref_count
);
916 /**************************************************************************
920 * The abort function will abort the specified command.
923 * cmd = Linux SCSI command packet to be aborted.
926 * Either SUCCESS or FAILED.
929 * Only return FAILED if command not returned by firmware.
930 **************************************************************************/
932 qla2xxx_eh_abort(struct scsi_cmnd
*cmd
)
934 scsi_qla_host_t
*vha
= shost_priv(cmd
->device
->host
);
937 unsigned int id
, lun
;
940 struct qla_hw_data
*ha
= vha
->hw
;
945 ret
= fc_block_scsi_eh(cmd
);
950 id
= cmd
->device
->id
;
951 lun
= cmd
->device
->lun
;
953 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
954 sp
= (srb_t
*) CMD_SP(cmd
);
956 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
960 ql_dbg(ql_dbg_taskm
, vha
, 0x8002,
961 "Aborting from RISC nexus=%ld:%d:%d sp=%p cmd=%p\n",
962 vha
->host_no
, id
, lun
, sp
, cmd
);
964 /* Get a reference to the sp and drop the lock.*/
967 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
968 if (ha
->isp_ops
->abort_command(sp
)) {
970 ql_dbg(ql_dbg_taskm
, vha
, 0x8003,
971 "Abort command mbx failed cmd=%p.\n", cmd
);
973 ql_dbg(ql_dbg_taskm
, vha
, 0x8004,
974 "Abort command mbx success cmd=%p.\n", cmd
);
978 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
980 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
982 /* Did the command return during mailbox execution? */
983 if (ret
== FAILED
&& !CMD_SP(cmd
))
986 /* Wait for the command to be returned. */
988 if (qla2x00_eh_wait_on_command(cmd
) != QLA_SUCCESS
) {
989 ql_log(ql_log_warn
, vha
, 0x8006,
990 "Abort handler timed out cmd=%p.\n", cmd
);
995 ql_log(ql_log_info
, vha
, 0x801c,
996 "Abort command issued nexus=%ld:%d:%d -- %d %x.\n",
997 vha
->host_no
, id
, lun
, wait
, ret
);
1003 qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t
*vha
, unsigned int t
,
1004 unsigned int l
, enum nexus_wait_type type
)
1006 int cnt
, match
, status
;
1007 unsigned long flags
;
1008 struct qla_hw_data
*ha
= vha
->hw
;
1009 struct req_que
*req
;
1011 struct scsi_cmnd
*cmd
;
1013 status
= QLA_SUCCESS
;
1015 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
1017 for (cnt
= 1; status
== QLA_SUCCESS
&&
1018 cnt
< req
->num_outstanding_cmds
; cnt
++) {
1019 sp
= req
->outstanding_cmds
[cnt
];
1022 if (sp
->type
!= SRB_SCSI_CMD
)
1024 if (vha
->vp_idx
!= sp
->fcport
->vha
->vp_idx
)
1027 cmd
= GET_CMD_SP(sp
);
1033 match
= cmd
->device
->id
== t
;
1036 match
= (cmd
->device
->id
== t
&&
1037 cmd
->device
->lun
== l
);
1043 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
1044 status
= qla2x00_eh_wait_on_command(cmd
);
1045 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
1047 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
1052 static char *reset_errors
[] = {
1055 "Task management failed",
1056 "Waiting for command completions",
1060 __qla2xxx_eh_generic_reset(char *name
, enum nexus_wait_type type
,
1061 struct scsi_cmnd
*cmd
, int (*do_reset
)(struct fc_port
*, unsigned int, int))
1063 scsi_qla_host_t
*vha
= shost_priv(cmd
->device
->host
);
1064 fc_port_t
*fcport
= (struct fc_port
*) cmd
->device
->hostdata
;
1071 err
= fc_block_scsi_eh(cmd
);
1075 ql_log(ql_log_info
, vha
, 0x8009,
1076 "%s RESET ISSUED nexus=%ld:%d:%d cmd=%p.\n", name
, vha
->host_no
,
1077 cmd
->device
->id
, cmd
->device
->lun
, cmd
);
1080 if (qla2x00_wait_for_hba_online(vha
) != QLA_SUCCESS
) {
1081 ql_log(ql_log_warn
, vha
, 0x800a,
1082 "Wait for hba online failed for cmd=%p.\n", cmd
);
1083 goto eh_reset_failed
;
1086 if (do_reset(fcport
, cmd
->device
->lun
, cmd
->request
->cpu
+ 1)
1088 ql_log(ql_log_warn
, vha
, 0x800c,
1089 "do_reset failed for cmd=%p.\n", cmd
);
1090 goto eh_reset_failed
;
1093 if (qla2x00_eh_wait_for_pending_commands(vha
, cmd
->device
->id
,
1094 cmd
->device
->lun
, type
) != QLA_SUCCESS
) {
1095 ql_log(ql_log_warn
, vha
, 0x800d,
1096 "wait for pending cmds failed for cmd=%p.\n", cmd
);
1097 goto eh_reset_failed
;
1100 ql_log(ql_log_info
, vha
, 0x800e,
1101 "%s RESET SUCCEEDED nexus:%ld:%d:%d cmd=%p.\n", name
,
1102 vha
->host_no
, cmd
->device
->id
, cmd
->device
->lun
, cmd
);
1107 ql_log(ql_log_info
, vha
, 0x800f,
1108 "%s RESET FAILED: %s nexus=%ld:%d:%d cmd=%p.\n", name
,
1109 reset_errors
[err
], vha
->host_no
, cmd
->device
->id
, cmd
->device
->lun
,
1115 qla2xxx_eh_device_reset(struct scsi_cmnd
*cmd
)
1117 scsi_qla_host_t
*vha
= shost_priv(cmd
->device
->host
);
1118 struct qla_hw_data
*ha
= vha
->hw
;
1120 return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN
, cmd
,
1121 ha
->isp_ops
->lun_reset
);
1125 qla2xxx_eh_target_reset(struct scsi_cmnd
*cmd
)
1127 scsi_qla_host_t
*vha
= shost_priv(cmd
->device
->host
);
1128 struct qla_hw_data
*ha
= vha
->hw
;
1130 return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET
, cmd
,
1131 ha
->isp_ops
->target_reset
);
1134 /**************************************************************************
1135 * qla2xxx_eh_bus_reset
1138 * The bus reset function will reset the bus and abort any executing
1142 * cmd = Linux SCSI command packet of the command that cause the
1146 * SUCCESS/FAILURE (defined as macro in scsi.h).
1148 **************************************************************************/
1150 qla2xxx_eh_bus_reset(struct scsi_cmnd
*cmd
)
1152 scsi_qla_host_t
*vha
= shost_priv(cmd
->device
->host
);
1153 fc_port_t
*fcport
= (struct fc_port
*) cmd
->device
->hostdata
;
1155 unsigned int id
, lun
;
1157 id
= cmd
->device
->id
;
1158 lun
= cmd
->device
->lun
;
1164 ret
= fc_block_scsi_eh(cmd
);
1169 ql_log(ql_log_info
, vha
, 0x8012,
1170 "BUS RESET ISSUED nexus=%ld:%d:%d.\n", vha
->host_no
, id
, lun
);
1172 if (qla2x00_wait_for_hba_online(vha
) != QLA_SUCCESS
) {
1173 ql_log(ql_log_fatal
, vha
, 0x8013,
1174 "Wait for hba online failed board disabled.\n");
1175 goto eh_bus_reset_done
;
1178 if (qla2x00_loop_reset(vha
) == QLA_SUCCESS
)
1182 goto eh_bus_reset_done
;
1184 /* Flush outstanding commands. */
1185 if (qla2x00_eh_wait_for_pending_commands(vha
, 0, 0, WAIT_HOST
) !=
1187 ql_log(ql_log_warn
, vha
, 0x8014,
1188 "Wait for pending commands failed.\n");
1193 ql_log(ql_log_warn
, vha
, 0x802b,
1194 "BUS RESET %s nexus=%ld:%d:%d.\n",
1195 (ret
== FAILED
) ? "FAILED" : "SUCCEEDED", vha
->host_no
, id
, lun
);
1200 /**************************************************************************
1201 * qla2xxx_eh_host_reset
1204 * The reset function will reset the Adapter.
1207 * cmd = Linux SCSI command packet of the command that cause the
1211 * Either SUCCESS or FAILED.
1214 **************************************************************************/
1216 qla2xxx_eh_host_reset(struct scsi_cmnd
*cmd
)
1218 scsi_qla_host_t
*vha
= shost_priv(cmd
->device
->host
);
1219 struct qla_hw_data
*ha
= vha
->hw
;
1221 unsigned int id
, lun
;
1222 scsi_qla_host_t
*base_vha
= pci_get_drvdata(ha
->pdev
);
1224 id
= cmd
->device
->id
;
1225 lun
= cmd
->device
->lun
;
1227 ql_log(ql_log_info
, vha
, 0x8018,
1228 "ADAPTER RESET ISSUED nexus=%ld:%d:%d.\n", vha
->host_no
, id
, lun
);
1230 if (qla2x00_wait_for_reset_ready(vha
) != QLA_SUCCESS
)
1231 goto eh_host_reset_lock
;
1233 if (vha
!= base_vha
) {
1234 if (qla2x00_vp_abort_isp(vha
))
1235 goto eh_host_reset_lock
;
1237 if (IS_QLA82XX(vha
->hw
)) {
1238 if (!qla82xx_fcoe_ctx_reset(vha
)) {
1239 /* Ctx reset success */
1241 goto eh_host_reset_lock
;
1243 /* fall thru if ctx reset failed */
1246 flush_workqueue(ha
->wq
);
1248 set_bit(ABORT_ISP_ACTIVE
, &base_vha
->dpc_flags
);
1249 if (ha
->isp_ops
->abort_isp(base_vha
)) {
1250 clear_bit(ABORT_ISP_ACTIVE
, &base_vha
->dpc_flags
);
1251 /* failed. schedule dpc to try */
1252 set_bit(ISP_ABORT_NEEDED
, &base_vha
->dpc_flags
);
1254 if (qla2x00_wait_for_hba_online(vha
) != QLA_SUCCESS
) {
1255 ql_log(ql_log_warn
, vha
, 0x802a,
1256 "wait for hba online failed.\n");
1257 goto eh_host_reset_lock
;
1260 clear_bit(ABORT_ISP_ACTIVE
, &base_vha
->dpc_flags
);
1263 /* Waiting for command to be returned to OS.*/
1264 if (qla2x00_eh_wait_for_pending_commands(vha
, 0, 0, WAIT_HOST
) ==
1269 ql_log(ql_log_info
, vha
, 0x8017,
1270 "ADAPTER RESET %s nexus=%ld:%d:%d.\n",
1271 (ret
== FAILED
) ? "FAILED" : "SUCCEEDED", vha
->host_no
, id
, lun
);
1277 * qla2x00_loop_reset
1281 * ha = adapter block pointer.
1287 qla2x00_loop_reset(scsi_qla_host_t
*vha
)
1290 struct fc_port
*fcport
;
1291 struct qla_hw_data
*ha
= vha
->hw
;
1293 if (ql2xtargetreset
== 1 && ha
->flags
.enable_target_reset
) {
1294 list_for_each_entry(fcport
, &vha
->vp_fcports
, list
) {
1295 if (fcport
->port_type
!= FCT_TARGET
)
1298 ret
= ha
->isp_ops
->target_reset(fcport
, 0, 0);
1299 if (ret
!= QLA_SUCCESS
) {
1300 ql_dbg(ql_dbg_taskm
, vha
, 0x802c,
1301 "Bus Reset failed: Target Reset=%d "
1302 "d_id=%x.\n", ret
, fcport
->d_id
.b24
);
1307 if (ha
->flags
.enable_lip_full_login
&& !IS_CNA_CAPABLE(ha
)) {
1308 atomic_set(&vha
->loop_state
, LOOP_DOWN
);
1309 atomic_set(&vha
->loop_down_timer
, LOOP_DOWN_TIME
);
1310 qla2x00_mark_all_devices_lost(vha
, 0);
1311 ret
= qla2x00_full_login_lip(vha
);
1312 if (ret
!= QLA_SUCCESS
) {
1313 ql_dbg(ql_dbg_taskm
, vha
, 0x802d,
1314 "full_login_lip=%d.\n", ret
);
1318 if (ha
->flags
.enable_lip_reset
) {
1319 ret
= qla2x00_lip_reset(vha
);
1320 if (ret
!= QLA_SUCCESS
)
1321 ql_dbg(ql_dbg_taskm
, vha
, 0x802e,
1322 "lip_reset failed (%d).\n", ret
);
1325 /* Issue marker command only when we are going to start the I/O */
1326 vha
->marker_needed
= 1;
1332 qla2x00_abort_all_cmds(scsi_qla_host_t
*vha
, int res
)
1335 unsigned long flags
;
1337 struct qla_hw_data
*ha
= vha
->hw
;
1338 struct req_que
*req
;
1340 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
1341 for (que
= 0; que
< ha
->max_req_queues
; que
++) {
1342 req
= ha
->req_q_map
[que
];
1345 if (!req
->outstanding_cmds
)
1347 for (cnt
= 1; cnt
< req
->num_outstanding_cmds
; cnt
++) {
1348 sp
= req
->outstanding_cmds
[cnt
];
1350 req
->outstanding_cmds
[cnt
] = NULL
;
1351 sp
->done(vha
, sp
, res
);
1355 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
1359 qla2xxx_slave_alloc(struct scsi_device
*sdev
)
1361 struct fc_rport
*rport
= starget_to_rport(scsi_target(sdev
));
1363 if (!rport
|| fc_remote_port_chkready(rport
))
1366 sdev
->hostdata
= *(fc_port_t
**)rport
->dd_data
;
1372 qla2xxx_slave_configure(struct scsi_device
*sdev
)
1374 scsi_qla_host_t
*vha
= shost_priv(sdev
->host
);
1375 struct req_que
*req
= vha
->req
;
1377 if (IS_T10_PI_CAPABLE(vha
->hw
))
1378 blk_queue_update_dma_alignment(sdev
->request_queue
, 0x7);
1380 if (sdev
->tagged_supported
)
1381 scsi_activate_tcq(sdev
, req
->max_q_depth
);
1383 scsi_deactivate_tcq(sdev
, req
->max_q_depth
);
1388 qla2xxx_slave_destroy(struct scsi_device
*sdev
)
1390 sdev
->hostdata
= NULL
;
1393 static void qla2x00_handle_queue_full(struct scsi_device
*sdev
, int qdepth
)
1395 fc_port_t
*fcport
= (struct fc_port
*) sdev
->hostdata
;
1397 if (!scsi_track_queue_full(sdev
, qdepth
))
1400 ql_dbg(ql_dbg_io
, fcport
->vha
, 0x3029,
1401 "Queue depth adjusted-down to %d for nexus=%ld:%d:%d.\n",
1402 sdev
->queue_depth
, fcport
->vha
->host_no
, sdev
->id
, sdev
->lun
);
1405 static void qla2x00_adjust_sdev_qdepth_up(struct scsi_device
*sdev
, int qdepth
)
1407 fc_port_t
*fcport
= sdev
->hostdata
;
1408 struct scsi_qla_host
*vha
= fcport
->vha
;
1409 struct req_que
*req
= NULL
;
1415 if (req
->max_q_depth
<= sdev
->queue_depth
|| req
->max_q_depth
< qdepth
)
1418 if (sdev
->ordered_tags
)
1419 scsi_adjust_queue_depth(sdev
, MSG_ORDERED_TAG
, qdepth
);
1421 scsi_adjust_queue_depth(sdev
, MSG_SIMPLE_TAG
, qdepth
);
1423 ql_dbg(ql_dbg_io
, vha
, 0x302a,
1424 "Queue depth adjusted-up to %d for nexus=%ld:%d:%d.\n",
1425 sdev
->queue_depth
, fcport
->vha
->host_no
, sdev
->id
, sdev
->lun
);
1429 qla2x00_change_queue_depth(struct scsi_device
*sdev
, int qdepth
, int reason
)
1432 case SCSI_QDEPTH_DEFAULT
:
1433 scsi_adjust_queue_depth(sdev
, scsi_get_tag_type(sdev
), qdepth
);
1435 case SCSI_QDEPTH_QFULL
:
1436 qla2x00_handle_queue_full(sdev
, qdepth
);
1438 case SCSI_QDEPTH_RAMP_UP
:
1439 qla2x00_adjust_sdev_qdepth_up(sdev
, qdepth
);
1445 return sdev
->queue_depth
;
1449 qla2x00_change_queue_type(struct scsi_device
*sdev
, int tag_type
)
1451 if (sdev
->tagged_supported
) {
1452 scsi_set_tag_type(sdev
, tag_type
);
1454 scsi_activate_tcq(sdev
, sdev
->queue_depth
);
1456 scsi_deactivate_tcq(sdev
, sdev
->queue_depth
);
1464 qla2x00_host_ramp_down_queuedepth(scsi_qla_host_t
*vha
)
1466 scsi_qla_host_t
*vp
;
1467 struct Scsi_Host
*shost
;
1468 struct scsi_device
*sdev
;
1469 struct qla_hw_data
*ha
= vha
->hw
;
1470 unsigned long flags
;
1472 ha
->host_last_rampdown_time
= jiffies
;
1474 if (ha
->cfg_lun_q_depth
<= vha
->host
->cmd_per_lun
)
1477 if ((ha
->cfg_lun_q_depth
/ 2) < vha
->host
->cmd_per_lun
)
1478 ha
->cfg_lun_q_depth
= vha
->host
->cmd_per_lun
;
1480 ha
->cfg_lun_q_depth
= ha
->cfg_lun_q_depth
/ 2;
1483 * Geometrically ramp down the queue depth for all devices on this
1486 spin_lock_irqsave(&ha
->vport_slock
, flags
);
1487 list_for_each_entry(vp
, &ha
->vp_list
, list
) {
1489 shost_for_each_device(sdev
, shost
) {
1490 if (sdev
->queue_depth
> shost
->cmd_per_lun
) {
1491 if (sdev
->queue_depth
< ha
->cfg_lun_q_depth
)
1493 ql_log(ql_log_warn
, vp
, 0x3031,
1494 "%ld:%d:%d: Ramping down queue depth to %d",
1495 vp
->host_no
, sdev
->id
, sdev
->lun
,
1496 ha
->cfg_lun_q_depth
);
1497 qla2x00_change_queue_depth(sdev
,
1498 ha
->cfg_lun_q_depth
, SCSI_QDEPTH_DEFAULT
);
1502 spin_unlock_irqrestore(&ha
->vport_slock
, flags
);
1508 qla2x00_host_ramp_up_queuedepth(scsi_qla_host_t
*vha
)
1510 scsi_qla_host_t
*vp
;
1511 struct Scsi_Host
*shost
;
1512 struct scsi_device
*sdev
;
1513 struct qla_hw_data
*ha
= vha
->hw
;
1514 unsigned long flags
;
1516 ha
->host_last_rampup_time
= jiffies
;
1517 ha
->cfg_lun_q_depth
++;
1520 * Linearly ramp up the queue depth for all devices on this
1523 spin_lock_irqsave(&ha
->vport_slock
, flags
);
1524 list_for_each_entry(vp
, &ha
->vp_list
, list
) {
1526 shost_for_each_device(sdev
, shost
) {
1527 if (sdev
->queue_depth
> ha
->cfg_lun_q_depth
)
1529 qla2x00_change_queue_depth(sdev
, ha
->cfg_lun_q_depth
,
1530 SCSI_QDEPTH_RAMP_UP
);
1533 spin_unlock_irqrestore(&ha
->vport_slock
, flags
);
1539 * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1542 * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1543 * supported addressing method.
1546 qla2x00_config_dma_addressing(struct qla_hw_data
*ha
)
1548 /* Assume a 32bit DMA mask. */
1549 ha
->flags
.enable_64bit_addressing
= 0;
1551 if (!dma_set_mask(&ha
->pdev
->dev
, DMA_BIT_MASK(64))) {
1552 /* Any upper-dword bits set? */
1553 if (MSD(dma_get_required_mask(&ha
->pdev
->dev
)) &&
1554 !pci_set_consistent_dma_mask(ha
->pdev
, DMA_BIT_MASK(64))) {
1555 /* Ok, a 64bit DMA mask is applicable. */
1556 ha
->flags
.enable_64bit_addressing
= 1;
1557 ha
->isp_ops
->calc_req_entries
= qla2x00_calc_iocbs_64
;
1558 ha
->isp_ops
->build_iocbs
= qla2x00_build_scsi_iocbs_64
;
1563 dma_set_mask(&ha
->pdev
->dev
, DMA_BIT_MASK(32));
1564 pci_set_consistent_dma_mask(ha
->pdev
, DMA_BIT_MASK(32));
1568 qla2x00_enable_intrs(struct qla_hw_data
*ha
)
1570 unsigned long flags
= 0;
1571 struct device_reg_2xxx __iomem
*reg
= &ha
->iobase
->isp
;
1573 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
1574 ha
->interrupts_on
= 1;
1575 /* enable risc and host interrupts */
1576 WRT_REG_WORD(®
->ictrl
, ICR_EN_INT
| ICR_EN_RISC
);
1577 RD_REG_WORD(®
->ictrl
);
1578 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
1583 qla2x00_disable_intrs(struct qla_hw_data
*ha
)
1585 unsigned long flags
= 0;
1586 struct device_reg_2xxx __iomem
*reg
= &ha
->iobase
->isp
;
1588 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
1589 ha
->interrupts_on
= 0;
1590 /* disable risc and host interrupts */
1591 WRT_REG_WORD(®
->ictrl
, 0);
1592 RD_REG_WORD(®
->ictrl
);
1593 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
1597 qla24xx_enable_intrs(struct qla_hw_data
*ha
)
1599 unsigned long flags
= 0;
1600 struct device_reg_24xx __iomem
*reg
= &ha
->iobase
->isp24
;
1602 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
1603 ha
->interrupts_on
= 1;
1604 WRT_REG_DWORD(®
->ictrl
, ICRX_EN_RISC_INT
);
1605 RD_REG_DWORD(®
->ictrl
);
1606 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
1610 qla24xx_disable_intrs(struct qla_hw_data
*ha
)
1612 unsigned long flags
= 0;
1613 struct device_reg_24xx __iomem
*reg
= &ha
->iobase
->isp24
;
1615 if (IS_NOPOLLING_TYPE(ha
))
1617 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
1618 ha
->interrupts_on
= 0;
1619 WRT_REG_DWORD(®
->ictrl
, 0);
1620 RD_REG_DWORD(®
->ictrl
);
1621 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
1625 qla2x00_iospace_config(struct qla_hw_data
*ha
)
1627 resource_size_t pio
;
1631 if (pci_request_selected_regions(ha
->pdev
, ha
->bars
,
1632 QLA2XXX_DRIVER_NAME
)) {
1633 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0011,
1634 "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1635 pci_name(ha
->pdev
));
1636 goto iospace_error_exit
;
1638 if (!(ha
->bars
& 1))
1641 /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1642 pio
= pci_resource_start(ha
->pdev
, 0);
1643 if (pci_resource_flags(ha
->pdev
, 0) & IORESOURCE_IO
) {
1644 if (pci_resource_len(ha
->pdev
, 0) < MIN_IOBASE_LEN
) {
1645 ql_log_pci(ql_log_warn
, ha
->pdev
, 0x0012,
1646 "Invalid pci I/O region size (%s).\n",
1647 pci_name(ha
->pdev
));
1651 ql_log_pci(ql_log_warn
, ha
->pdev
, 0x0013,
1652 "Region #0 no a PIO resource (%s).\n",
1653 pci_name(ha
->pdev
));
1656 ha
->pio_address
= pio
;
1657 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x0014,
1658 "PIO address=%llu.\n",
1659 (unsigned long long)ha
->pio_address
);
1662 /* Use MMIO operations for all accesses. */
1663 if (!(pci_resource_flags(ha
->pdev
, 1) & IORESOURCE_MEM
)) {
1664 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0015,
1665 "Region #1 not an MMIO resource (%s), aborting.\n",
1666 pci_name(ha
->pdev
));
1667 goto iospace_error_exit
;
1669 if (pci_resource_len(ha
->pdev
, 1) < MIN_IOBASE_LEN
) {
1670 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0016,
1671 "Invalid PCI mem region size (%s), aborting.\n",
1672 pci_name(ha
->pdev
));
1673 goto iospace_error_exit
;
1676 ha
->iobase
= ioremap(pci_resource_start(ha
->pdev
, 1), MIN_IOBASE_LEN
);
1678 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0017,
1679 "Cannot remap MMIO (%s), aborting.\n",
1680 pci_name(ha
->pdev
));
1681 goto iospace_error_exit
;
1684 /* Determine queue resources */
1685 ha
->max_req_queues
= ha
->max_rsp_queues
= 1;
1686 if ((ql2xmaxqueues
<= 1 && !ql2xmultique_tag
) ||
1687 (ql2xmaxqueues
> 1 && ql2xmultique_tag
) ||
1688 (!IS_QLA25XX(ha
) && !IS_QLA81XX(ha
)))
1691 ha
->mqiobase
= ioremap(pci_resource_start(ha
->pdev
, 3),
1692 pci_resource_len(ha
->pdev
, 3));
1694 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x0018,
1695 "MQIO Base=%p.\n", ha
->mqiobase
);
1696 /* Read MSIX vector size of the board */
1697 pci_read_config_word(ha
->pdev
, QLA_PCI_MSIX_CONTROL
, &msix
);
1698 ha
->msix_count
= msix
;
1699 /* Max queues are bounded by available msix vectors */
1700 /* queue 0 uses two msix vectors */
1701 if (ql2xmultique_tag
) {
1702 cpus
= num_online_cpus();
1703 ha
->max_rsp_queues
= (ha
->msix_count
- 1 > cpus
) ?
1704 (cpus
+ 1) : (ha
->msix_count
- 1);
1705 ha
->max_req_queues
= 2;
1706 } else if (ql2xmaxqueues
> 1) {
1707 ha
->max_req_queues
= ql2xmaxqueues
> QLA_MQ_SIZE
?
1708 QLA_MQ_SIZE
: ql2xmaxqueues
;
1709 ql_dbg_pci(ql_dbg_multiq
, ha
->pdev
, 0xc008,
1710 "QoS mode set, max no of request queues:%d.\n",
1711 ha
->max_req_queues
);
1712 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x0019,
1713 "QoS mode set, max no of request queues:%d.\n",
1714 ha
->max_req_queues
);
1716 ql_log_pci(ql_log_info
, ha
->pdev
, 0x001a,
1717 "MSI-X vector count: %d.\n", msix
);
1719 ql_log_pci(ql_log_info
, ha
->pdev
, 0x001b,
1720 "BAR 3 not enabled.\n");
1723 ha
->msix_count
= ha
->max_rsp_queues
+ 1;
1724 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x001c,
1725 "MSIX Count:%d.\n", ha
->msix_count
);
1734 qla83xx_iospace_config(struct qla_hw_data
*ha
)
1739 if (pci_request_selected_regions(ha
->pdev
, ha
->bars
,
1740 QLA2XXX_DRIVER_NAME
)) {
1741 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0117,
1742 "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1743 pci_name(ha
->pdev
));
1745 goto iospace_error_exit
;
1748 /* Use MMIO operations for all accesses. */
1749 if (!(pci_resource_flags(ha
->pdev
, 0) & IORESOURCE_MEM
)) {
1750 ql_log_pci(ql_log_warn
, ha
->pdev
, 0x0118,
1751 "Invalid pci I/O region size (%s).\n",
1752 pci_name(ha
->pdev
));
1753 goto iospace_error_exit
;
1755 if (pci_resource_len(ha
->pdev
, 0) < MIN_IOBASE_LEN
) {
1756 ql_log_pci(ql_log_warn
, ha
->pdev
, 0x0119,
1757 "Invalid PCI mem region size (%s), aborting\n",
1758 pci_name(ha
->pdev
));
1759 goto iospace_error_exit
;
1762 ha
->iobase
= ioremap(pci_resource_start(ha
->pdev
, 0), MIN_IOBASE_LEN
);
1764 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x011a,
1765 "Cannot remap MMIO (%s), aborting.\n",
1766 pci_name(ha
->pdev
));
1767 goto iospace_error_exit
;
1770 /* 64bit PCI BAR - BAR2 will correspoond to region 4 */
1771 /* 83XX 26XX always use MQ type access for queues
1772 * - mbar 2, a.k.a region 4 */
1773 ha
->max_req_queues
= ha
->max_rsp_queues
= 1;
1774 ha
->mqiobase
= ioremap(pci_resource_start(ha
->pdev
, 4),
1775 pci_resource_len(ha
->pdev
, 4));
1777 if (!ha
->mqiobase
) {
1778 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x011d,
1779 "BAR2/region4 not enabled\n");
1783 ha
->msixbase
= ioremap(pci_resource_start(ha
->pdev
, 2),
1784 pci_resource_len(ha
->pdev
, 2));
1786 /* Read MSIX vector size of the board */
1787 pci_read_config_word(ha
->pdev
,
1788 QLA_83XX_PCI_MSIX_CONTROL
, &msix
);
1789 ha
->msix_count
= msix
;
1790 /* Max queues are bounded by available msix vectors */
1791 /* queue 0 uses two msix vectors */
1792 if (ql2xmultique_tag
) {
1793 cpus
= num_online_cpus();
1794 ha
->max_rsp_queues
= (ha
->msix_count
- 1 > cpus
) ?
1795 (cpus
+ 1) : (ha
->msix_count
- 1);
1796 ha
->max_req_queues
= 2;
1797 } else if (ql2xmaxqueues
> 1) {
1798 ha
->max_req_queues
= ql2xmaxqueues
> QLA_MQ_SIZE
?
1799 QLA_MQ_SIZE
: ql2xmaxqueues
;
1800 ql_dbg_pci(ql_dbg_multiq
, ha
->pdev
, 0xc00c,
1801 "QoS mode set, max no of request queues:%d.\n",
1802 ha
->max_req_queues
);
1803 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x011b,
1804 "QoS mode set, max no of request queues:%d.\n",
1805 ha
->max_req_queues
);
1807 ql_log_pci(ql_log_info
, ha
->pdev
, 0x011c,
1808 "MSI-X vector count: %d.\n", msix
);
1810 ql_log_pci(ql_log_info
, ha
->pdev
, 0x011e,
1811 "BAR 1 not enabled.\n");
1814 ha
->msix_count
= ha
->max_rsp_queues
+ 1;
1816 qlt_83xx_iospace_config(ha
);
1818 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x011f,
1819 "MSIX Count:%d.\n", ha
->msix_count
);
1826 static struct isp_operations qla2100_isp_ops
= {
1827 .pci_config
= qla2100_pci_config
,
1828 .reset_chip
= qla2x00_reset_chip
,
1829 .chip_diag
= qla2x00_chip_diag
,
1830 .config_rings
= qla2x00_config_rings
,
1831 .reset_adapter
= qla2x00_reset_adapter
,
1832 .nvram_config
= qla2x00_nvram_config
,
1833 .update_fw_options
= qla2x00_update_fw_options
,
1834 .load_risc
= qla2x00_load_risc
,
1835 .pci_info_str
= qla2x00_pci_info_str
,
1836 .fw_version_str
= qla2x00_fw_version_str
,
1837 .intr_handler
= qla2100_intr_handler
,
1838 .enable_intrs
= qla2x00_enable_intrs
,
1839 .disable_intrs
= qla2x00_disable_intrs
,
1840 .abort_command
= qla2x00_abort_command
,
1841 .target_reset
= qla2x00_abort_target
,
1842 .lun_reset
= qla2x00_lun_reset
,
1843 .fabric_login
= qla2x00_login_fabric
,
1844 .fabric_logout
= qla2x00_fabric_logout
,
1845 .calc_req_entries
= qla2x00_calc_iocbs_32
,
1846 .build_iocbs
= qla2x00_build_scsi_iocbs_32
,
1847 .prep_ms_iocb
= qla2x00_prep_ms_iocb
,
1848 .prep_ms_fdmi_iocb
= qla2x00_prep_ms_fdmi_iocb
,
1849 .read_nvram
= qla2x00_read_nvram_data
,
1850 .write_nvram
= qla2x00_write_nvram_data
,
1851 .fw_dump
= qla2100_fw_dump
,
1854 .beacon_blink
= NULL
,
1855 .read_optrom
= qla2x00_read_optrom_data
,
1856 .write_optrom
= qla2x00_write_optrom_data
,
1857 .get_flash_version
= qla2x00_get_flash_version
,
1858 .start_scsi
= qla2x00_start_scsi
,
1859 .abort_isp
= qla2x00_abort_isp
,
1860 .iospace_config
= qla2x00_iospace_config
,
1863 static struct isp_operations qla2300_isp_ops
= {
1864 .pci_config
= qla2300_pci_config
,
1865 .reset_chip
= qla2x00_reset_chip
,
1866 .chip_diag
= qla2x00_chip_diag
,
1867 .config_rings
= qla2x00_config_rings
,
1868 .reset_adapter
= qla2x00_reset_adapter
,
1869 .nvram_config
= qla2x00_nvram_config
,
1870 .update_fw_options
= qla2x00_update_fw_options
,
1871 .load_risc
= qla2x00_load_risc
,
1872 .pci_info_str
= qla2x00_pci_info_str
,
1873 .fw_version_str
= qla2x00_fw_version_str
,
1874 .intr_handler
= qla2300_intr_handler
,
1875 .enable_intrs
= qla2x00_enable_intrs
,
1876 .disable_intrs
= qla2x00_disable_intrs
,
1877 .abort_command
= qla2x00_abort_command
,
1878 .target_reset
= qla2x00_abort_target
,
1879 .lun_reset
= qla2x00_lun_reset
,
1880 .fabric_login
= qla2x00_login_fabric
,
1881 .fabric_logout
= qla2x00_fabric_logout
,
1882 .calc_req_entries
= qla2x00_calc_iocbs_32
,
1883 .build_iocbs
= qla2x00_build_scsi_iocbs_32
,
1884 .prep_ms_iocb
= qla2x00_prep_ms_iocb
,
1885 .prep_ms_fdmi_iocb
= qla2x00_prep_ms_fdmi_iocb
,
1886 .read_nvram
= qla2x00_read_nvram_data
,
1887 .write_nvram
= qla2x00_write_nvram_data
,
1888 .fw_dump
= qla2300_fw_dump
,
1889 .beacon_on
= qla2x00_beacon_on
,
1890 .beacon_off
= qla2x00_beacon_off
,
1891 .beacon_blink
= qla2x00_beacon_blink
,
1892 .read_optrom
= qla2x00_read_optrom_data
,
1893 .write_optrom
= qla2x00_write_optrom_data
,
1894 .get_flash_version
= qla2x00_get_flash_version
,
1895 .start_scsi
= qla2x00_start_scsi
,
1896 .abort_isp
= qla2x00_abort_isp
,
1897 .iospace_config
= qla2x00_iospace_config
,
1900 static struct isp_operations qla24xx_isp_ops
= {
1901 .pci_config
= qla24xx_pci_config
,
1902 .reset_chip
= qla24xx_reset_chip
,
1903 .chip_diag
= qla24xx_chip_diag
,
1904 .config_rings
= qla24xx_config_rings
,
1905 .reset_adapter
= qla24xx_reset_adapter
,
1906 .nvram_config
= qla24xx_nvram_config
,
1907 .update_fw_options
= qla24xx_update_fw_options
,
1908 .load_risc
= qla24xx_load_risc
,
1909 .pci_info_str
= qla24xx_pci_info_str
,
1910 .fw_version_str
= qla24xx_fw_version_str
,
1911 .intr_handler
= qla24xx_intr_handler
,
1912 .enable_intrs
= qla24xx_enable_intrs
,
1913 .disable_intrs
= qla24xx_disable_intrs
,
1914 .abort_command
= qla24xx_abort_command
,
1915 .target_reset
= qla24xx_abort_target
,
1916 .lun_reset
= qla24xx_lun_reset
,
1917 .fabric_login
= qla24xx_login_fabric
,
1918 .fabric_logout
= qla24xx_fabric_logout
,
1919 .calc_req_entries
= NULL
,
1920 .build_iocbs
= NULL
,
1921 .prep_ms_iocb
= qla24xx_prep_ms_iocb
,
1922 .prep_ms_fdmi_iocb
= qla24xx_prep_ms_fdmi_iocb
,
1923 .read_nvram
= qla24xx_read_nvram_data
,
1924 .write_nvram
= qla24xx_write_nvram_data
,
1925 .fw_dump
= qla24xx_fw_dump
,
1926 .beacon_on
= qla24xx_beacon_on
,
1927 .beacon_off
= qla24xx_beacon_off
,
1928 .beacon_blink
= qla24xx_beacon_blink
,
1929 .read_optrom
= qla24xx_read_optrom_data
,
1930 .write_optrom
= qla24xx_write_optrom_data
,
1931 .get_flash_version
= qla24xx_get_flash_version
,
1932 .start_scsi
= qla24xx_start_scsi
,
1933 .abort_isp
= qla2x00_abort_isp
,
1934 .iospace_config
= qla2x00_iospace_config
,
1937 static struct isp_operations qla25xx_isp_ops
= {
1938 .pci_config
= qla25xx_pci_config
,
1939 .reset_chip
= qla24xx_reset_chip
,
1940 .chip_diag
= qla24xx_chip_diag
,
1941 .config_rings
= qla24xx_config_rings
,
1942 .reset_adapter
= qla24xx_reset_adapter
,
1943 .nvram_config
= qla24xx_nvram_config
,
1944 .update_fw_options
= qla24xx_update_fw_options
,
1945 .load_risc
= qla24xx_load_risc
,
1946 .pci_info_str
= qla24xx_pci_info_str
,
1947 .fw_version_str
= qla24xx_fw_version_str
,
1948 .intr_handler
= qla24xx_intr_handler
,
1949 .enable_intrs
= qla24xx_enable_intrs
,
1950 .disable_intrs
= qla24xx_disable_intrs
,
1951 .abort_command
= qla24xx_abort_command
,
1952 .target_reset
= qla24xx_abort_target
,
1953 .lun_reset
= qla24xx_lun_reset
,
1954 .fabric_login
= qla24xx_login_fabric
,
1955 .fabric_logout
= qla24xx_fabric_logout
,
1956 .calc_req_entries
= NULL
,
1957 .build_iocbs
= NULL
,
1958 .prep_ms_iocb
= qla24xx_prep_ms_iocb
,
1959 .prep_ms_fdmi_iocb
= qla24xx_prep_ms_fdmi_iocb
,
1960 .read_nvram
= qla25xx_read_nvram_data
,
1961 .write_nvram
= qla25xx_write_nvram_data
,
1962 .fw_dump
= qla25xx_fw_dump
,
1963 .beacon_on
= qla24xx_beacon_on
,
1964 .beacon_off
= qla24xx_beacon_off
,
1965 .beacon_blink
= qla24xx_beacon_blink
,
1966 .read_optrom
= qla25xx_read_optrom_data
,
1967 .write_optrom
= qla24xx_write_optrom_data
,
1968 .get_flash_version
= qla24xx_get_flash_version
,
1969 .start_scsi
= qla24xx_dif_start_scsi
,
1970 .abort_isp
= qla2x00_abort_isp
,
1971 .iospace_config
= qla2x00_iospace_config
,
1974 static struct isp_operations qla81xx_isp_ops
= {
1975 .pci_config
= qla25xx_pci_config
,
1976 .reset_chip
= qla24xx_reset_chip
,
1977 .chip_diag
= qla24xx_chip_diag
,
1978 .config_rings
= qla24xx_config_rings
,
1979 .reset_adapter
= qla24xx_reset_adapter
,
1980 .nvram_config
= qla81xx_nvram_config
,
1981 .update_fw_options
= qla81xx_update_fw_options
,
1982 .load_risc
= qla81xx_load_risc
,
1983 .pci_info_str
= qla24xx_pci_info_str
,
1984 .fw_version_str
= qla24xx_fw_version_str
,
1985 .intr_handler
= qla24xx_intr_handler
,
1986 .enable_intrs
= qla24xx_enable_intrs
,
1987 .disable_intrs
= qla24xx_disable_intrs
,
1988 .abort_command
= qla24xx_abort_command
,
1989 .target_reset
= qla24xx_abort_target
,
1990 .lun_reset
= qla24xx_lun_reset
,
1991 .fabric_login
= qla24xx_login_fabric
,
1992 .fabric_logout
= qla24xx_fabric_logout
,
1993 .calc_req_entries
= NULL
,
1994 .build_iocbs
= NULL
,
1995 .prep_ms_iocb
= qla24xx_prep_ms_iocb
,
1996 .prep_ms_fdmi_iocb
= qla24xx_prep_ms_fdmi_iocb
,
1998 .write_nvram
= NULL
,
1999 .fw_dump
= qla81xx_fw_dump
,
2000 .beacon_on
= qla24xx_beacon_on
,
2001 .beacon_off
= qla24xx_beacon_off
,
2002 .beacon_blink
= qla83xx_beacon_blink
,
2003 .read_optrom
= qla25xx_read_optrom_data
,
2004 .write_optrom
= qla24xx_write_optrom_data
,
2005 .get_flash_version
= qla24xx_get_flash_version
,
2006 .start_scsi
= qla24xx_dif_start_scsi
,
2007 .abort_isp
= qla2x00_abort_isp
,
2008 .iospace_config
= qla2x00_iospace_config
,
2011 static struct isp_operations qla82xx_isp_ops
= {
2012 .pci_config
= qla82xx_pci_config
,
2013 .reset_chip
= qla82xx_reset_chip
,
2014 .chip_diag
= qla24xx_chip_diag
,
2015 .config_rings
= qla82xx_config_rings
,
2016 .reset_adapter
= qla24xx_reset_adapter
,
2017 .nvram_config
= qla81xx_nvram_config
,
2018 .update_fw_options
= qla24xx_update_fw_options
,
2019 .load_risc
= qla82xx_load_risc
,
2020 .pci_info_str
= qla24xx_pci_info_str
,
2021 .fw_version_str
= qla24xx_fw_version_str
,
2022 .intr_handler
= qla82xx_intr_handler
,
2023 .enable_intrs
= qla82xx_enable_intrs
,
2024 .disable_intrs
= qla82xx_disable_intrs
,
2025 .abort_command
= qla24xx_abort_command
,
2026 .target_reset
= qla24xx_abort_target
,
2027 .lun_reset
= qla24xx_lun_reset
,
2028 .fabric_login
= qla24xx_login_fabric
,
2029 .fabric_logout
= qla24xx_fabric_logout
,
2030 .calc_req_entries
= NULL
,
2031 .build_iocbs
= NULL
,
2032 .prep_ms_iocb
= qla24xx_prep_ms_iocb
,
2033 .prep_ms_fdmi_iocb
= qla24xx_prep_ms_fdmi_iocb
,
2034 .read_nvram
= qla24xx_read_nvram_data
,
2035 .write_nvram
= qla24xx_write_nvram_data
,
2036 .fw_dump
= qla24xx_fw_dump
,
2037 .beacon_on
= qla82xx_beacon_on
,
2038 .beacon_off
= qla82xx_beacon_off
,
2039 .beacon_blink
= NULL
,
2040 .read_optrom
= qla82xx_read_optrom_data
,
2041 .write_optrom
= qla82xx_write_optrom_data
,
2042 .get_flash_version
= qla24xx_get_flash_version
,
2043 .start_scsi
= qla82xx_start_scsi
,
2044 .abort_isp
= qla82xx_abort_isp
,
2045 .iospace_config
= qla82xx_iospace_config
,
2048 static struct isp_operations qla83xx_isp_ops
= {
2049 .pci_config
= qla25xx_pci_config
,
2050 .reset_chip
= qla24xx_reset_chip
,
2051 .chip_diag
= qla24xx_chip_diag
,
2052 .config_rings
= qla24xx_config_rings
,
2053 .reset_adapter
= qla24xx_reset_adapter
,
2054 .nvram_config
= qla81xx_nvram_config
,
2055 .update_fw_options
= qla81xx_update_fw_options
,
2056 .load_risc
= qla81xx_load_risc
,
2057 .pci_info_str
= qla24xx_pci_info_str
,
2058 .fw_version_str
= qla24xx_fw_version_str
,
2059 .intr_handler
= qla24xx_intr_handler
,
2060 .enable_intrs
= qla24xx_enable_intrs
,
2061 .disable_intrs
= qla24xx_disable_intrs
,
2062 .abort_command
= qla24xx_abort_command
,
2063 .target_reset
= qla24xx_abort_target
,
2064 .lun_reset
= qla24xx_lun_reset
,
2065 .fabric_login
= qla24xx_login_fabric
,
2066 .fabric_logout
= qla24xx_fabric_logout
,
2067 .calc_req_entries
= NULL
,
2068 .build_iocbs
= NULL
,
2069 .prep_ms_iocb
= qla24xx_prep_ms_iocb
,
2070 .prep_ms_fdmi_iocb
= qla24xx_prep_ms_fdmi_iocb
,
2072 .write_nvram
= NULL
,
2073 .fw_dump
= qla83xx_fw_dump
,
2074 .beacon_on
= qla24xx_beacon_on
,
2075 .beacon_off
= qla24xx_beacon_off
,
2076 .beacon_blink
= qla83xx_beacon_blink
,
2077 .read_optrom
= qla25xx_read_optrom_data
,
2078 .write_optrom
= qla24xx_write_optrom_data
,
2079 .get_flash_version
= qla24xx_get_flash_version
,
2080 .start_scsi
= qla24xx_dif_start_scsi
,
2081 .abort_isp
= qla2x00_abort_isp
,
2082 .iospace_config
= qla83xx_iospace_config
,
2086 qla2x00_set_isp_flags(struct qla_hw_data
*ha
)
2088 ha
->device_type
= DT_EXTENDED_IDS
;
2089 switch (ha
->pdev
->device
) {
2090 case PCI_DEVICE_ID_QLOGIC_ISP2100
:
2091 ha
->device_type
|= DT_ISP2100
;
2092 ha
->device_type
&= ~DT_EXTENDED_IDS
;
2093 ha
->fw_srisc_address
= RISC_START_ADDRESS_2100
;
2095 case PCI_DEVICE_ID_QLOGIC_ISP2200
:
2096 ha
->device_type
|= DT_ISP2200
;
2097 ha
->device_type
&= ~DT_EXTENDED_IDS
;
2098 ha
->fw_srisc_address
= RISC_START_ADDRESS_2100
;
2100 case PCI_DEVICE_ID_QLOGIC_ISP2300
:
2101 ha
->device_type
|= DT_ISP2300
;
2102 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2103 ha
->fw_srisc_address
= RISC_START_ADDRESS_2300
;
2105 case PCI_DEVICE_ID_QLOGIC_ISP2312
:
2106 ha
->device_type
|= DT_ISP2312
;
2107 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2108 ha
->fw_srisc_address
= RISC_START_ADDRESS_2300
;
2110 case PCI_DEVICE_ID_QLOGIC_ISP2322
:
2111 ha
->device_type
|= DT_ISP2322
;
2112 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2113 if (ha
->pdev
->subsystem_vendor
== 0x1028 &&
2114 ha
->pdev
->subsystem_device
== 0x0170)
2115 ha
->device_type
|= DT_OEM_001
;
2116 ha
->fw_srisc_address
= RISC_START_ADDRESS_2300
;
2118 case PCI_DEVICE_ID_QLOGIC_ISP6312
:
2119 ha
->device_type
|= DT_ISP6312
;
2120 ha
->fw_srisc_address
= RISC_START_ADDRESS_2300
;
2122 case PCI_DEVICE_ID_QLOGIC_ISP6322
:
2123 ha
->device_type
|= DT_ISP6322
;
2124 ha
->fw_srisc_address
= RISC_START_ADDRESS_2300
;
2126 case PCI_DEVICE_ID_QLOGIC_ISP2422
:
2127 ha
->device_type
|= DT_ISP2422
;
2128 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2129 ha
->device_type
|= DT_FWI2
;
2130 ha
->device_type
|= DT_IIDMA
;
2131 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2133 case PCI_DEVICE_ID_QLOGIC_ISP2432
:
2134 ha
->device_type
|= DT_ISP2432
;
2135 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2136 ha
->device_type
|= DT_FWI2
;
2137 ha
->device_type
|= DT_IIDMA
;
2138 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2140 case PCI_DEVICE_ID_QLOGIC_ISP8432
:
2141 ha
->device_type
|= DT_ISP8432
;
2142 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2143 ha
->device_type
|= DT_FWI2
;
2144 ha
->device_type
|= DT_IIDMA
;
2145 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2147 case PCI_DEVICE_ID_QLOGIC_ISP5422
:
2148 ha
->device_type
|= DT_ISP5422
;
2149 ha
->device_type
|= DT_FWI2
;
2150 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2152 case PCI_DEVICE_ID_QLOGIC_ISP5432
:
2153 ha
->device_type
|= DT_ISP5432
;
2154 ha
->device_type
|= DT_FWI2
;
2155 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2157 case PCI_DEVICE_ID_QLOGIC_ISP2532
:
2158 ha
->device_type
|= DT_ISP2532
;
2159 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2160 ha
->device_type
|= DT_FWI2
;
2161 ha
->device_type
|= DT_IIDMA
;
2162 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2164 case PCI_DEVICE_ID_QLOGIC_ISP8001
:
2165 ha
->device_type
|= DT_ISP8001
;
2166 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2167 ha
->device_type
|= DT_FWI2
;
2168 ha
->device_type
|= DT_IIDMA
;
2169 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2171 case PCI_DEVICE_ID_QLOGIC_ISP8021
:
2172 ha
->device_type
|= DT_ISP8021
;
2173 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2174 ha
->device_type
|= DT_FWI2
;
2175 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2176 /* Initialize 82XX ISP flags */
2177 qla82xx_init_flags(ha
);
2179 case PCI_DEVICE_ID_QLOGIC_ISP2031
:
2180 ha
->device_type
|= DT_ISP2031
;
2181 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2182 ha
->device_type
|= DT_FWI2
;
2183 ha
->device_type
|= DT_IIDMA
;
2184 ha
->device_type
|= DT_T10_PI
;
2185 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2187 case PCI_DEVICE_ID_QLOGIC_ISP8031
:
2188 ha
->device_type
|= DT_ISP8031
;
2189 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2190 ha
->device_type
|= DT_FWI2
;
2191 ha
->device_type
|= DT_IIDMA
;
2192 ha
->device_type
|= DT_T10_PI
;
2193 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2198 ha
->port_no
= !(ha
->portnum
& 1);
2200 /* Get adapter physical port no from interrupt pin register. */
2201 pci_read_config_byte(ha
->pdev
, PCI_INTERRUPT_PIN
, &ha
->port_no
);
2203 if (ha
->port_no
& 1)
2204 ha
->flags
.port0
= 1;
2206 ha
->flags
.port0
= 0;
2207 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x000b,
2208 "device_type=0x%x port=%d fw_srisc_address=0x%x.\n",
2209 ha
->device_type
, ha
->flags
.port0
, ha
->fw_srisc_address
);
2213 qla2xxx_scan_start(struct Scsi_Host
*shost
)
2215 scsi_qla_host_t
*vha
= shost_priv(shost
);
2217 if (vha
->hw
->flags
.running_gold_fw
)
2220 set_bit(LOOP_RESYNC_NEEDED
, &vha
->dpc_flags
);
2221 set_bit(LOCAL_LOOP_UPDATE
, &vha
->dpc_flags
);
2222 set_bit(RSCN_UPDATE
, &vha
->dpc_flags
);
2223 set_bit(NPIV_CONFIG_NEEDED
, &vha
->dpc_flags
);
2227 qla2xxx_scan_finished(struct Scsi_Host
*shost
, unsigned long time
)
2229 scsi_qla_host_t
*vha
= shost_priv(shost
);
2233 if (time
> vha
->hw
->loop_reset_delay
* HZ
)
2236 return atomic_read(&vha
->loop_state
) == LOOP_READY
;
2240 * PCI driver interface
2243 qla2x00_probe_one(struct pci_dev
*pdev
, const struct pci_device_id
*id
)
2246 struct Scsi_Host
*host
;
2247 scsi_qla_host_t
*base_vha
= NULL
;
2248 struct qla_hw_data
*ha
;
2250 char fw_str
[30], wq_name
[30];
2251 struct scsi_host_template
*sht
;
2252 int bars
, mem_only
= 0;
2253 uint16_t req_length
= 0, rsp_length
= 0;
2254 struct req_que
*req
= NULL
;
2255 struct rsp_que
*rsp
= NULL
;
2257 bars
= pci_select_bars(pdev
, IORESOURCE_MEM
| IORESOURCE_IO
);
2258 sht
= &qla2xxx_driver_template
;
2259 if (pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP2422
||
2260 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP2432
||
2261 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP8432
||
2262 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP5422
||
2263 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP5432
||
2264 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP2532
||
2265 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP8001
||
2266 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP8021
||
2267 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP2031
||
2268 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP8031
) {
2269 bars
= pci_select_bars(pdev
, IORESOURCE_MEM
);
2271 ql_dbg_pci(ql_dbg_init
, pdev
, 0x0007,
2272 "Mem only adapter.\n");
2274 ql_dbg_pci(ql_dbg_init
, pdev
, 0x0008,
2275 "Bars=%d.\n", bars
);
2278 if (pci_enable_device_mem(pdev
))
2281 if (pci_enable_device(pdev
))
2285 /* This may fail but that's ok */
2286 pci_enable_pcie_error_reporting(pdev
);
2288 ha
= kzalloc(sizeof(struct qla_hw_data
), GFP_KERNEL
);
2290 ql_log_pci(ql_log_fatal
, pdev
, 0x0009,
2291 "Unable to allocate memory for ha.\n");
2294 ql_dbg_pci(ql_dbg_init
, pdev
, 0x000a,
2295 "Memory allocated for ha=%p.\n", ha
);
2297 ha
->tgt
.enable_class_2
= ql2xenableclass2
;
2299 /* Clear our data area */
2301 ha
->mem_only
= mem_only
;
2302 spin_lock_init(&ha
->hardware_lock
);
2303 spin_lock_init(&ha
->vport_slock
);
2304 mutex_init(&ha
->selflogin_lock
);
2306 /* Set ISP-type information. */
2307 qla2x00_set_isp_flags(ha
);
2309 /* Set EEH reset type to fundamental if required by hba */
2310 if (IS_QLA24XX(ha
) || IS_QLA25XX(ha
) || IS_QLA81XX(ha
) ||
2312 pdev
->needs_freset
= 1;
2314 ha
->prev_topology
= 0;
2315 ha
->init_cb_size
= sizeof(init_cb_t
);
2316 ha
->link_data_rate
= PORT_SPEED_UNKNOWN
;
2317 ha
->optrom_size
= OPTROM_SIZE_2300
;
2318 ha
->cfg_lun_q_depth
= ql2xmaxqdepth
;
2320 /* Assign ISP specific operations. */
2321 if (IS_QLA2100(ha
)) {
2322 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_2100
;
2323 ha
->mbx_count
= MAILBOX_REGISTER_COUNT_2100
;
2324 req_length
= REQUEST_ENTRY_CNT_2100
;
2325 rsp_length
= RESPONSE_ENTRY_CNT_2100
;
2326 ha
->max_loop_id
= SNS_LAST_LOOP_ID_2100
;
2327 ha
->gid_list_info_size
= 4;
2328 ha
->flash_conf_off
= ~0;
2329 ha
->flash_data_off
= ~0;
2330 ha
->nvram_conf_off
= ~0;
2331 ha
->nvram_data_off
= ~0;
2332 ha
->isp_ops
= &qla2100_isp_ops
;
2333 } else if (IS_QLA2200(ha
)) {
2334 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_2100
;
2335 ha
->mbx_count
= MAILBOX_REGISTER_COUNT_2200
;
2336 req_length
= REQUEST_ENTRY_CNT_2200
;
2337 rsp_length
= RESPONSE_ENTRY_CNT_2100
;
2338 ha
->max_loop_id
= SNS_LAST_LOOP_ID_2100
;
2339 ha
->gid_list_info_size
= 4;
2340 ha
->flash_conf_off
= ~0;
2341 ha
->flash_data_off
= ~0;
2342 ha
->nvram_conf_off
= ~0;
2343 ha
->nvram_data_off
= ~0;
2344 ha
->isp_ops
= &qla2100_isp_ops
;
2345 } else if (IS_QLA23XX(ha
)) {
2346 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_2100
;
2347 ha
->mbx_count
= MAILBOX_REGISTER_COUNT
;
2348 req_length
= REQUEST_ENTRY_CNT_2200
;
2349 rsp_length
= RESPONSE_ENTRY_CNT_2300
;
2350 ha
->max_loop_id
= SNS_LAST_LOOP_ID_2300
;
2351 ha
->gid_list_info_size
= 6;
2352 if (IS_QLA2322(ha
) || IS_QLA6322(ha
))
2353 ha
->optrom_size
= OPTROM_SIZE_2322
;
2354 ha
->flash_conf_off
= ~0;
2355 ha
->flash_data_off
= ~0;
2356 ha
->nvram_conf_off
= ~0;
2357 ha
->nvram_data_off
= ~0;
2358 ha
->isp_ops
= &qla2300_isp_ops
;
2359 } else if (IS_QLA24XX_TYPE(ha
)) {
2360 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_2400
;
2361 ha
->mbx_count
= MAILBOX_REGISTER_COUNT
;
2362 req_length
= REQUEST_ENTRY_CNT_24XX
;
2363 rsp_length
= RESPONSE_ENTRY_CNT_2300
;
2364 ha
->tgt
.atio_q_length
= ATIO_ENTRY_CNT_24XX
;
2365 ha
->max_loop_id
= SNS_LAST_LOOP_ID_2300
;
2366 ha
->init_cb_size
= sizeof(struct mid_init_cb_24xx
);
2367 ha
->gid_list_info_size
= 8;
2368 ha
->optrom_size
= OPTROM_SIZE_24XX
;
2369 ha
->nvram_npiv_size
= QLA_MAX_VPORTS_QLA24XX
;
2370 ha
->isp_ops
= &qla24xx_isp_ops
;
2371 ha
->flash_conf_off
= FARX_ACCESS_FLASH_CONF
;
2372 ha
->flash_data_off
= FARX_ACCESS_FLASH_DATA
;
2373 ha
->nvram_conf_off
= FARX_ACCESS_NVRAM_CONF
;
2374 ha
->nvram_data_off
= FARX_ACCESS_NVRAM_DATA
;
2375 } else if (IS_QLA25XX(ha
)) {
2376 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_2400
;
2377 ha
->mbx_count
= MAILBOX_REGISTER_COUNT
;
2378 req_length
= REQUEST_ENTRY_CNT_24XX
;
2379 rsp_length
= RESPONSE_ENTRY_CNT_2300
;
2380 ha
->tgt
.atio_q_length
= ATIO_ENTRY_CNT_24XX
;
2381 ha
->max_loop_id
= SNS_LAST_LOOP_ID_2300
;
2382 ha
->init_cb_size
= sizeof(struct mid_init_cb_24xx
);
2383 ha
->gid_list_info_size
= 8;
2384 ha
->optrom_size
= OPTROM_SIZE_25XX
;
2385 ha
->nvram_npiv_size
= QLA_MAX_VPORTS_QLA25XX
;
2386 ha
->isp_ops
= &qla25xx_isp_ops
;
2387 ha
->flash_conf_off
= FARX_ACCESS_FLASH_CONF
;
2388 ha
->flash_data_off
= FARX_ACCESS_FLASH_DATA
;
2389 ha
->nvram_conf_off
= FARX_ACCESS_NVRAM_CONF
;
2390 ha
->nvram_data_off
= FARX_ACCESS_NVRAM_DATA
;
2391 } else if (IS_QLA81XX(ha
)) {
2392 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_2400
;
2393 ha
->mbx_count
= MAILBOX_REGISTER_COUNT
;
2394 req_length
= REQUEST_ENTRY_CNT_24XX
;
2395 rsp_length
= RESPONSE_ENTRY_CNT_2300
;
2396 ha
->tgt
.atio_q_length
= ATIO_ENTRY_CNT_24XX
;
2397 ha
->max_loop_id
= SNS_LAST_LOOP_ID_2300
;
2398 ha
->init_cb_size
= sizeof(struct mid_init_cb_81xx
);
2399 ha
->gid_list_info_size
= 8;
2400 ha
->optrom_size
= OPTROM_SIZE_81XX
;
2401 ha
->nvram_npiv_size
= QLA_MAX_VPORTS_QLA25XX
;
2402 ha
->isp_ops
= &qla81xx_isp_ops
;
2403 ha
->flash_conf_off
= FARX_ACCESS_FLASH_CONF_81XX
;
2404 ha
->flash_data_off
= FARX_ACCESS_FLASH_DATA_81XX
;
2405 ha
->nvram_conf_off
= ~0;
2406 ha
->nvram_data_off
= ~0;
2407 } else if (IS_QLA82XX(ha
)) {
2408 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_2400
;
2409 ha
->mbx_count
= MAILBOX_REGISTER_COUNT
;
2410 req_length
= REQUEST_ENTRY_CNT_82XX
;
2411 rsp_length
= RESPONSE_ENTRY_CNT_82XX
;
2412 ha
->max_loop_id
= SNS_LAST_LOOP_ID_2300
;
2413 ha
->init_cb_size
= sizeof(struct mid_init_cb_81xx
);
2414 ha
->gid_list_info_size
= 8;
2415 ha
->optrom_size
= OPTROM_SIZE_82XX
;
2416 ha
->nvram_npiv_size
= QLA_MAX_VPORTS_QLA25XX
;
2417 ha
->isp_ops
= &qla82xx_isp_ops
;
2418 ha
->flash_conf_off
= FARX_ACCESS_FLASH_CONF
;
2419 ha
->flash_data_off
= FARX_ACCESS_FLASH_DATA
;
2420 ha
->nvram_conf_off
= FARX_ACCESS_NVRAM_CONF
;
2421 ha
->nvram_data_off
= FARX_ACCESS_NVRAM_DATA
;
2422 } else if (IS_QLA83XX(ha
)) {
2423 ha
->portnum
= PCI_FUNC(ha
->pdev
->devfn
);
2424 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_2400
;
2425 ha
->mbx_count
= MAILBOX_REGISTER_COUNT
;
2426 req_length
= REQUEST_ENTRY_CNT_24XX
;
2427 rsp_length
= RESPONSE_ENTRY_CNT_2300
;
2428 ha
->tgt
.atio_q_length
= ATIO_ENTRY_CNT_24XX
;
2429 ha
->max_loop_id
= SNS_LAST_LOOP_ID_2300
;
2430 ha
->init_cb_size
= sizeof(struct mid_init_cb_81xx
);
2431 ha
->gid_list_info_size
= 8;
2432 ha
->optrom_size
= OPTROM_SIZE_83XX
;
2433 ha
->nvram_npiv_size
= QLA_MAX_VPORTS_QLA25XX
;
2434 ha
->isp_ops
= &qla83xx_isp_ops
;
2435 ha
->flash_conf_off
= FARX_ACCESS_FLASH_CONF_81XX
;
2436 ha
->flash_data_off
= FARX_ACCESS_FLASH_DATA_81XX
;
2437 ha
->nvram_conf_off
= ~0;
2438 ha
->nvram_data_off
= ~0;
2441 ql_dbg_pci(ql_dbg_init
, pdev
, 0x001e,
2442 "mbx_count=%d, req_length=%d, "
2443 "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
2444 "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, "
2445 "max_fibre_devices=%d.\n",
2446 ha
->mbx_count
, req_length
, rsp_length
, ha
->max_loop_id
,
2447 ha
->init_cb_size
, ha
->gid_list_info_size
, ha
->optrom_size
,
2448 ha
->nvram_npiv_size
, ha
->max_fibre_devices
);
2449 ql_dbg_pci(ql_dbg_init
, pdev
, 0x001f,
2450 "isp_ops=%p, flash_conf_off=%d, "
2451 "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
2452 ha
->isp_ops
, ha
->flash_conf_off
, ha
->flash_data_off
,
2453 ha
->nvram_conf_off
, ha
->nvram_data_off
);
2455 /* Configure PCI I/O space */
2456 ret
= ha
->isp_ops
->iospace_config(ha
);
2458 goto iospace_config_failed
;
2460 ql_log_pci(ql_log_info
, pdev
, 0x001d,
2461 "Found an ISP%04X irq %d iobase 0x%p.\n",
2462 pdev
->device
, pdev
->irq
, ha
->iobase
);
2463 mutex_init(&ha
->vport_lock
);
2464 init_completion(&ha
->mbx_cmd_comp
);
2465 complete(&ha
->mbx_cmd_comp
);
2466 init_completion(&ha
->mbx_intr_comp
);
2467 init_completion(&ha
->dcbx_comp
);
2469 set_bit(0, (unsigned long *) ha
->vp_idx_map
);
2471 qla2x00_config_dma_addressing(ha
);
2472 ql_dbg_pci(ql_dbg_init
, pdev
, 0x0020,
2473 "64 Bit addressing is %s.\n",
2474 ha
->flags
.enable_64bit_addressing
? "enable" :
2476 ret
= qla2x00_mem_alloc(ha
, req_length
, rsp_length
, &req
, &rsp
);
2478 ql_log_pci(ql_log_fatal
, pdev
, 0x0031,
2479 "Failed to allocate memory for adapter, aborting.\n");
2481 goto probe_hw_failed
;
2484 req
->max_q_depth
= MAX_Q_DEPTH
;
2485 if (ql2xmaxqdepth
!= 0 && ql2xmaxqdepth
<= 0xffffU
)
2486 req
->max_q_depth
= ql2xmaxqdepth
;
2489 base_vha
= qla2x00_create_host(sht
, ha
);
2492 qla2x00_mem_free(ha
);
2493 qla2x00_free_req_que(ha
, req
);
2494 qla2x00_free_rsp_que(ha
, rsp
);
2495 goto probe_hw_failed
;
2498 pci_set_drvdata(pdev
, base_vha
);
2500 host
= base_vha
->host
;
2501 base_vha
->req
= req
;
2502 host
->can_queue
= req
->length
+ 128;
2503 if (IS_QLA2XXX_MIDTYPE(ha
))
2504 base_vha
->mgmt_svr_loop_id
= 10 + base_vha
->vp_idx
;
2506 base_vha
->mgmt_svr_loop_id
= MANAGEMENT_SERVER
+
2509 /* Set the SG table size based on ISP type */
2510 if (!IS_FWI2_CAPABLE(ha
)) {
2512 host
->sg_tablesize
= 32;
2514 if (!IS_QLA82XX(ha
))
2515 host
->sg_tablesize
= QLA_SG_ALL
;
2517 ql_dbg(ql_dbg_init
, base_vha
, 0x0032,
2518 "can_queue=%d, req=%p, "
2519 "mgmt_svr_loop_id=%d, sg_tablesize=%d.\n",
2520 host
->can_queue
, base_vha
->req
,
2521 base_vha
->mgmt_svr_loop_id
, host
->sg_tablesize
);
2522 host
->max_id
= ha
->max_fibre_devices
;
2523 host
->cmd_per_lun
= 3;
2524 host
->unique_id
= host
->host_no
;
2525 if (IS_T10_PI_CAPABLE(ha
) && ql2xenabledif
)
2526 host
->max_cmd_len
= 32;
2528 host
->max_cmd_len
= MAX_CMDSZ
;
2529 host
->max_channel
= MAX_BUSES
- 1;
2530 host
->max_lun
= ql2xmaxlun
;
2531 host
->transportt
= qla2xxx_transport_template
;
2532 sht
->vendor_id
= (SCSI_NL_VID_TYPE_PCI
| PCI_VENDOR_ID_QLOGIC
);
2534 ql_dbg(ql_dbg_init
, base_vha
, 0x0033,
2535 "max_id=%d this_id=%d "
2536 "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d "
2537 "max_lun=%d transportt=%p, vendor_id=%llu.\n", host
->max_id
,
2538 host
->this_id
, host
->cmd_per_lun
, host
->unique_id
,
2539 host
->max_cmd_len
, host
->max_channel
, host
->max_lun
,
2540 host
->transportt
, sht
->vendor_id
);
2543 /* Alloc arrays of request and response ring ptrs */
2544 if (!qla2x00_alloc_queues(ha
, req
, rsp
)) {
2545 ql_log(ql_log_fatal
, base_vha
, 0x003d,
2546 "Failed to allocate memory for queue pointers..."
2548 goto probe_init_failed
;
2551 qlt_probe_one_stage1(base_vha
, ha
);
2553 /* Set up the irqs */
2554 ret
= qla2x00_request_irqs(ha
, rsp
);
2556 goto probe_init_failed
;
2558 pci_save_state(pdev
);
2560 /* Assign back pointers */
2564 /* FWI2-capable only. */
2565 req
->req_q_in
= &ha
->iobase
->isp24
.req_q_in
;
2566 req
->req_q_out
= &ha
->iobase
->isp24
.req_q_out
;
2567 rsp
->rsp_q_in
= &ha
->iobase
->isp24
.rsp_q_in
;
2568 rsp
->rsp_q_out
= &ha
->iobase
->isp24
.rsp_q_out
;
2569 if (ha
->mqenable
|| IS_QLA83XX(ha
)) {
2570 req
->req_q_in
= &ha
->mqiobase
->isp25mq
.req_q_in
;
2571 req
->req_q_out
= &ha
->mqiobase
->isp25mq
.req_q_out
;
2572 rsp
->rsp_q_in
= &ha
->mqiobase
->isp25mq
.rsp_q_in
;
2573 rsp
->rsp_q_out
= &ha
->mqiobase
->isp25mq
.rsp_q_out
;
2576 if (IS_QLA82XX(ha
)) {
2577 req
->req_q_out
= &ha
->iobase
->isp82
.req_q_out
[0];
2578 rsp
->rsp_q_in
= &ha
->iobase
->isp82
.rsp_q_in
[0];
2579 rsp
->rsp_q_out
= &ha
->iobase
->isp82
.rsp_q_out
[0];
2582 ql_dbg(ql_dbg_multiq
, base_vha
, 0xc009,
2583 "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
2584 ha
->rsp_q_map
, ha
->req_q_map
, rsp
->req
, req
->rsp
);
2585 ql_dbg(ql_dbg_multiq
, base_vha
, 0xc00a,
2586 "req->req_q_in=%p req->req_q_out=%p "
2587 "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
2588 req
->req_q_in
, req
->req_q_out
,
2589 rsp
->rsp_q_in
, rsp
->rsp_q_out
);
2590 ql_dbg(ql_dbg_init
, base_vha
, 0x003e,
2591 "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
2592 ha
->rsp_q_map
, ha
->req_q_map
, rsp
->req
, req
->rsp
);
2593 ql_dbg(ql_dbg_init
, base_vha
, 0x003f,
2594 "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
2595 req
->req_q_in
, req
->req_q_out
, rsp
->rsp_q_in
, rsp
->rsp_q_out
);
2597 if (qla2x00_initialize_adapter(base_vha
)) {
2598 ql_log(ql_log_fatal
, base_vha
, 0x00d6,
2599 "Failed to initialize adapter - Adapter flags %x.\n",
2600 base_vha
->device_flags
);
2602 if (IS_QLA82XX(ha
)) {
2603 qla82xx_idc_lock(ha
);
2604 qla82xx_wr_32(ha
, QLA82XX_CRB_DEV_STATE
,
2605 QLA8XXX_DEV_FAILED
);
2606 qla82xx_idc_unlock(ha
);
2607 ql_log(ql_log_fatal
, base_vha
, 0x00d7,
2608 "HW State: FAILED.\n");
2616 if (qla25xx_setup_mode(base_vha
)) {
2617 ql_log(ql_log_warn
, base_vha
, 0x00ec,
2618 "Failed to create queues, falling back to single queue mode.\n");
2623 if (ha
->flags
.running_gold_fw
)
2627 * Startup the kernel thread for this host adapter
2629 ha
->dpc_thread
= kthread_create(qla2x00_do_dpc
, ha
,
2630 "%s_dpc", base_vha
->host_str
);
2631 if (IS_ERR(ha
->dpc_thread
)) {
2632 ql_log(ql_log_fatal
, base_vha
, 0x00ed,
2633 "Failed to start DPC thread.\n");
2634 ret
= PTR_ERR(ha
->dpc_thread
);
2637 ql_dbg(ql_dbg_init
, base_vha
, 0x00ee,
2638 "DPC thread started successfully.\n");
2641 * If we're not coming up in initiator mode, we might sit for
2642 * a while without waking up the dpc thread, which leads to a
2643 * stuck process warning. So just kick the dpc once here and
2644 * let the kthread start (and go back to sleep in qla2x00_do_dpc).
2646 qla2xxx_wake_dpc(base_vha
);
2648 if (IS_QLA8031(ha
) || IS_MCTP_CAPABLE(ha
)) {
2649 sprintf(wq_name
, "qla2xxx_%lu_dpc_lp_wq", base_vha
->host_no
);
2650 ha
->dpc_lp_wq
= create_singlethread_workqueue(wq_name
);
2651 INIT_WORK(&ha
->idc_aen
, qla83xx_service_idc_aen
);
2653 sprintf(wq_name
, "qla2xxx_%lu_dpc_hp_wq", base_vha
->host_no
);
2654 ha
->dpc_hp_wq
= create_singlethread_workqueue(wq_name
);
2655 INIT_WORK(&ha
->nic_core_reset
, qla83xx_nic_core_reset_work
);
2656 INIT_WORK(&ha
->idc_state_handler
,
2657 qla83xx_idc_state_handler_work
);
2658 INIT_WORK(&ha
->nic_core_unrecoverable
,
2659 qla83xx_nic_core_unrecoverable_work
);
2663 list_add_tail(&base_vha
->list
, &ha
->vp_list
);
2664 base_vha
->host
->irq
= ha
->pdev
->irq
;
2666 /* Initialized the timer */
2667 qla2x00_start_timer(base_vha
, qla2x00_timer
, WATCH_INTERVAL
);
2668 ql_dbg(ql_dbg_init
, base_vha
, 0x00ef,
2669 "Started qla2x00_timer with "
2670 "interval=%d.\n", WATCH_INTERVAL
);
2671 ql_dbg(ql_dbg_init
, base_vha
, 0x00f0,
2672 "Detected hba at address=%p.\n",
2675 if (IS_T10_PI_CAPABLE(ha
) && ql2xenabledif
) {
2676 if (ha
->fw_attributes
& BIT_4
) {
2677 int prot
= 0, guard
;
2678 base_vha
->flags
.difdix_supported
= 1;
2679 ql_dbg(ql_dbg_init
, base_vha
, 0x00f1,
2680 "Registering for DIF/DIX type 1 and 3 protection.\n");
2681 if (ql2xenabledif
== 1)
2682 prot
= SHOST_DIX_TYPE0_PROTECTION
;
2683 scsi_host_set_prot(host
,
2684 prot
| SHOST_DIF_TYPE1_PROTECTION
2685 | SHOST_DIF_TYPE2_PROTECTION
2686 | SHOST_DIF_TYPE3_PROTECTION
2687 | SHOST_DIX_TYPE1_PROTECTION
2688 | SHOST_DIX_TYPE2_PROTECTION
2689 | SHOST_DIX_TYPE3_PROTECTION
);
2691 guard
= SHOST_DIX_GUARD_CRC
;
2693 if (IS_PI_IPGUARD_CAPABLE(ha
) &&
2694 (ql2xenabledif
> 1 || IS_PI_DIFB_DIX0_CAPABLE(ha
)))
2695 guard
|= SHOST_DIX_GUARD_IP
;
2697 scsi_host_set_guard(host
, guard
);
2699 base_vha
->flags
.difdix_supported
= 0;
2702 ha
->isp_ops
->enable_intrs(ha
);
2704 ret
= scsi_add_host(host
, &pdev
->dev
);
2708 base_vha
->flags
.init_done
= 1;
2709 base_vha
->flags
.online
= 1;
2711 ql_dbg(ql_dbg_init
, base_vha
, 0x00f2,
2712 "Init done and hba is online.\n");
2714 if (qla_ini_mode_enabled(base_vha
))
2715 scsi_scan_host(host
);
2717 ql_dbg(ql_dbg_init
, base_vha
, 0x0122,
2718 "skipping scsi_scan_host() for non-initiator port\n");
2720 qla2x00_alloc_sysfs_attr(base_vha
);
2722 qla2x00_init_host_attr(base_vha
);
2724 qla2x00_dfs_setup(base_vha
);
2726 ql_log(ql_log_info
, base_vha
, 0x00fb,
2727 "QLogic %s - %s.\n",
2728 ha
->model_number
, ha
->model_desc
? ha
->model_desc
: "");
2729 ql_log(ql_log_info
, base_vha
, 0x00fc,
2730 "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n",
2731 pdev
->device
, ha
->isp_ops
->pci_info_str(base_vha
, pci_info
),
2732 pci_name(pdev
), ha
->flags
.enable_64bit_addressing
? '+' : '-',
2734 ha
->isp_ops
->fw_version_str(base_vha
, fw_str
));
2736 qlt_add_target(ha
, base_vha
);
2741 qla2x00_free_req_que(ha
, req
);
2742 ha
->req_q_map
[0] = NULL
;
2743 clear_bit(0, ha
->req_qid_map
);
2744 qla2x00_free_rsp_que(ha
, rsp
);
2745 ha
->rsp_q_map
[0] = NULL
;
2746 clear_bit(0, ha
->rsp_qid_map
);
2747 ha
->max_req_queues
= ha
->max_rsp_queues
= 0;
2750 if (base_vha
->timer_active
)
2751 qla2x00_stop_timer(base_vha
);
2752 base_vha
->flags
.online
= 0;
2753 if (ha
->dpc_thread
) {
2754 struct task_struct
*t
= ha
->dpc_thread
;
2756 ha
->dpc_thread
= NULL
;
2760 qla2x00_free_device(base_vha
);
2762 scsi_host_put(base_vha
->host
);
2765 if (IS_QLA82XX(ha
)) {
2766 qla82xx_idc_lock(ha
);
2767 qla82xx_clear_drv_active(ha
);
2768 qla82xx_idc_unlock(ha
);
2770 iospace_config_failed
:
2771 if (IS_QLA82XX(ha
)) {
2772 if (!ha
->nx_pcibase
)
2773 iounmap((device_reg_t __iomem
*)ha
->nx_pcibase
);
2775 iounmap((device_reg_t __iomem
*)ha
->nxdb_wr_ptr
);
2778 iounmap(ha
->iobase
);
2780 pci_release_selected_regions(ha
->pdev
, ha
->bars
);
2785 pci_disable_device(pdev
);
2790 qla2x00_stop_dpc_thread(scsi_qla_host_t
*vha
)
2792 struct qla_hw_data
*ha
= vha
->hw
;
2793 struct task_struct
*t
= ha
->dpc_thread
;
2795 if (ha
->dpc_thread
== NULL
)
2798 * qla2xxx_wake_dpc checks for ->dpc_thread
2799 * so we need to zero it out.
2801 ha
->dpc_thread
= NULL
;
2806 qla2x00_shutdown(struct pci_dev
*pdev
)
2808 scsi_qla_host_t
*vha
;
2809 struct qla_hw_data
*ha
;
2811 if (!atomic_read(&pdev
->enable_cnt
))
2814 vha
= pci_get_drvdata(pdev
);
2817 /* Turn-off FCE trace */
2818 if (ha
->flags
.fce_enabled
) {
2819 qla2x00_disable_fce_trace(vha
, NULL
, NULL
);
2820 ha
->flags
.fce_enabled
= 0;
2823 /* Turn-off EFT trace */
2825 qla2x00_disable_eft_trace(vha
);
2827 /* Stop currently executing firmware. */
2828 qla2x00_try_to_stop_firmware(vha
);
2830 /* Turn adapter off line */
2831 vha
->flags
.online
= 0;
2833 /* turn-off interrupts on the card */
2834 if (ha
->interrupts_on
) {
2835 vha
->flags
.init_done
= 0;
2836 ha
->isp_ops
->disable_intrs(ha
);
2839 qla2x00_free_irqs(vha
);
2841 qla2x00_free_fw_dump(ha
);
2845 qla2x00_remove_one(struct pci_dev
*pdev
)
2847 scsi_qla_host_t
*base_vha
, *vha
;
2848 struct qla_hw_data
*ha
;
2849 unsigned long flags
;
2852 * If the PCI device is disabled that means that probe failed and any
2853 * resources should be have cleaned up on probe exit.
2855 if (!atomic_read(&pdev
->enable_cnt
))
2858 base_vha
= pci_get_drvdata(pdev
);
2861 ha
->flags
.host_shutting_down
= 1;
2863 set_bit(UNLOADING
, &base_vha
->dpc_flags
);
2864 mutex_lock(&ha
->vport_lock
);
2865 while (ha
->cur_vport_count
) {
2866 struct Scsi_Host
*scsi_host
;
2868 spin_lock_irqsave(&ha
->vport_slock
, flags
);
2870 BUG_ON(base_vha
->list
.next
== &ha
->vp_list
);
2871 /* This assumes first entry in ha->vp_list is always base vha */
2872 vha
= list_first_entry(&base_vha
->list
, scsi_qla_host_t
, list
);
2873 scsi_host
= scsi_host_get(vha
->host
);
2875 spin_unlock_irqrestore(&ha
->vport_slock
, flags
);
2876 mutex_unlock(&ha
->vport_lock
);
2878 fc_vport_terminate(vha
->fc_vport
);
2879 scsi_host_put(vha
->host
);
2881 mutex_lock(&ha
->vport_lock
);
2883 mutex_unlock(&ha
->vport_lock
);
2885 if (IS_QLA8031(ha
)) {
2886 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb07e,
2887 "Clearing fcoe driver presence.\n");
2888 if (qla83xx_clear_drv_presence(base_vha
) != QLA_SUCCESS
)
2889 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb079,
2890 "Error while clearing DRV-Presence.\n");
2893 qla2x00_abort_all_cmds(base_vha
, DID_NO_CONNECT
<< 16);
2895 qla2x00_dfs_remove(base_vha
);
2897 qla84xx_put_chip(base_vha
);
2900 if (base_vha
->timer_active
)
2901 qla2x00_stop_timer(base_vha
);
2903 base_vha
->flags
.online
= 0;
2905 /* Flush the work queue and remove it */
2907 flush_workqueue(ha
->wq
);
2908 destroy_workqueue(ha
->wq
);
2912 /* Cancel all work and destroy DPC workqueues */
2913 if (ha
->dpc_lp_wq
) {
2914 cancel_work_sync(&ha
->idc_aen
);
2915 destroy_workqueue(ha
->dpc_lp_wq
);
2916 ha
->dpc_lp_wq
= NULL
;
2919 if (ha
->dpc_hp_wq
) {
2920 cancel_work_sync(&ha
->nic_core_reset
);
2921 cancel_work_sync(&ha
->idc_state_handler
);
2922 cancel_work_sync(&ha
->nic_core_unrecoverable
);
2923 destroy_workqueue(ha
->dpc_hp_wq
);
2924 ha
->dpc_hp_wq
= NULL
;
2927 /* Kill the kernel thread for this host */
2928 if (ha
->dpc_thread
) {
2929 struct task_struct
*t
= ha
->dpc_thread
;
2932 * qla2xxx_wake_dpc checks for ->dpc_thread
2933 * so we need to zero it out.
2935 ha
->dpc_thread
= NULL
;
2938 qlt_remove_target(ha
, base_vha
);
2940 qla2x00_free_sysfs_attr(base_vha
);
2942 fc_remove_host(base_vha
->host
);
2944 scsi_remove_host(base_vha
->host
);
2946 qla2x00_free_device(base_vha
);
2948 scsi_host_put(base_vha
->host
);
2950 if (IS_QLA82XX(ha
)) {
2951 qla82xx_idc_lock(ha
);
2952 qla82xx_clear_drv_active(ha
);
2953 qla82xx_idc_unlock(ha
);
2955 iounmap((device_reg_t __iomem
*)ha
->nx_pcibase
);
2957 iounmap((device_reg_t __iomem
*)ha
->nxdb_wr_ptr
);
2960 iounmap(ha
->iobase
);
2963 iounmap(ha
->mqiobase
);
2965 if (IS_QLA83XX(ha
) && ha
->msixbase
)
2966 iounmap(ha
->msixbase
);
2969 pci_release_selected_regions(ha
->pdev
, ha
->bars
);
2973 pci_disable_pcie_error_reporting(pdev
);
2975 pci_disable_device(pdev
);
2976 pci_set_drvdata(pdev
, NULL
);
2980 qla2x00_free_device(scsi_qla_host_t
*vha
)
2982 struct qla_hw_data
*ha
= vha
->hw
;
2984 qla2x00_abort_all_cmds(vha
, DID_NO_CONNECT
<< 16);
2987 if (vha
->timer_active
)
2988 qla2x00_stop_timer(vha
);
2990 qla2x00_stop_dpc_thread(vha
);
2992 qla25xx_delete_queues(vha
);
2993 if (ha
->flags
.fce_enabled
)
2994 qla2x00_disable_fce_trace(vha
, NULL
, NULL
);
2997 qla2x00_disable_eft_trace(vha
);
2999 /* Stop currently executing firmware. */
3000 qla2x00_try_to_stop_firmware(vha
);
3002 vha
->flags
.online
= 0;
3004 /* turn-off interrupts on the card */
3005 if (ha
->interrupts_on
) {
3006 vha
->flags
.init_done
= 0;
3007 ha
->isp_ops
->disable_intrs(ha
);
3010 qla2x00_free_irqs(vha
);
3012 qla2x00_free_fcports(vha
);
3014 qla2x00_mem_free(ha
);
3016 qla82xx_md_free(vha
);
3018 qla2x00_free_queues(ha
);
3021 void qla2x00_free_fcports(struct scsi_qla_host
*vha
)
3023 fc_port_t
*fcport
, *tfcport
;
3025 list_for_each_entry_safe(fcport
, tfcport
, &vha
->vp_fcports
, list
) {
3026 list_del(&fcport
->list
);
3027 qla2x00_clear_loop_id(fcport
);
3034 qla2x00_schedule_rport_del(struct scsi_qla_host
*vha
, fc_port_t
*fcport
,
3037 struct fc_rport
*rport
;
3038 scsi_qla_host_t
*base_vha
;
3039 unsigned long flags
;
3044 rport
= fcport
->rport
;
3046 base_vha
= pci_get_drvdata(vha
->hw
->pdev
);
3047 spin_lock_irqsave(vha
->host
->host_lock
, flags
);
3048 fcport
->drport
= rport
;
3049 spin_unlock_irqrestore(vha
->host
->host_lock
, flags
);
3050 set_bit(FCPORT_UPDATE_NEEDED
, &base_vha
->dpc_flags
);
3051 qla2xxx_wake_dpc(base_vha
);
3053 fc_remote_port_delete(rport
);
3054 qlt_fc_port_deleted(vha
, fcport
);
3059 * qla2x00_mark_device_lost Updates fcport state when device goes offline.
3061 * Input: ha = adapter block pointer. fcport = port structure pointer.
3067 void qla2x00_mark_device_lost(scsi_qla_host_t
*vha
, fc_port_t
*fcport
,
3068 int do_login
, int defer
)
3070 if (atomic_read(&fcport
->state
) == FCS_ONLINE
&&
3071 vha
->vp_idx
== fcport
->vha
->vp_idx
) {
3072 qla2x00_set_fcport_state(fcport
, FCS_DEVICE_LOST
);
3073 qla2x00_schedule_rport_del(vha
, fcport
, defer
);
3076 * We may need to retry the login, so don't change the state of the
3077 * port but do the retries.
3079 if (atomic_read(&fcport
->state
) != FCS_DEVICE_DEAD
)
3080 qla2x00_set_fcport_state(fcport
, FCS_DEVICE_LOST
);
3085 if (fcport
->login_retry
== 0) {
3086 fcport
->login_retry
= vha
->hw
->login_retry_count
;
3087 set_bit(RELOGIN_NEEDED
, &vha
->dpc_flags
);
3089 ql_dbg(ql_dbg_disc
, vha
, 0x2067,
3091 "%02x%02x%02x%02x%02x%02x%02x%02x, "
3092 "id = 0x%04x retry cnt=%d.\n",
3093 fcport
->port_name
[0], fcport
->port_name
[1],
3094 fcport
->port_name
[2], fcport
->port_name
[3],
3095 fcport
->port_name
[4], fcport
->port_name
[5],
3096 fcport
->port_name
[6], fcport
->port_name
[7],
3097 fcport
->loop_id
, fcport
->login_retry
);
3102 * qla2x00_mark_all_devices_lost
3103 * Updates fcport state when device goes offline.
3106 * ha = adapter block pointer.
3107 * fcport = port structure pointer.
3115 qla2x00_mark_all_devices_lost(scsi_qla_host_t
*vha
, int defer
)
3119 list_for_each_entry(fcport
, &vha
->vp_fcports
, list
) {
3120 if (vha
->vp_idx
!= 0 && vha
->vp_idx
!= fcport
->vha
->vp_idx
)
3124 * No point in marking the device as lost, if the device is
3127 if (atomic_read(&fcport
->state
) == FCS_DEVICE_DEAD
)
3129 if (atomic_read(&fcport
->state
) == FCS_ONLINE
) {
3130 qla2x00_set_fcport_state(fcport
, FCS_DEVICE_LOST
);
3132 qla2x00_schedule_rport_del(vha
, fcport
, defer
);
3133 else if (vha
->vp_idx
== fcport
->vha
->vp_idx
)
3134 qla2x00_schedule_rport_del(vha
, fcport
, defer
);
3141 * Allocates adapter memory.
3148 qla2x00_mem_alloc(struct qla_hw_data
*ha
, uint16_t req_len
, uint16_t rsp_len
,
3149 struct req_que
**req
, struct rsp_que
**rsp
)
3153 ha
->init_cb
= dma_alloc_coherent(&ha
->pdev
->dev
, ha
->init_cb_size
,
3154 &ha
->init_cb_dma
, GFP_KERNEL
);
3158 if (qlt_mem_alloc(ha
) < 0)
3159 goto fail_free_init_cb
;
3161 ha
->gid_list
= dma_alloc_coherent(&ha
->pdev
->dev
,
3162 qla2x00_gid_list_size(ha
), &ha
->gid_list_dma
, GFP_KERNEL
);
3164 goto fail_free_tgt_mem
;
3166 ha
->srb_mempool
= mempool_create_slab_pool(SRB_MIN_REQ
, srb_cachep
);
3167 if (!ha
->srb_mempool
)
3168 goto fail_free_gid_list
;
3170 if (IS_QLA82XX(ha
)) {
3171 /* Allocate cache for CT6 Ctx. */
3173 ctx_cachep
= kmem_cache_create("qla2xxx_ctx",
3174 sizeof(struct ct6_dsd
), 0,
3175 SLAB_HWCACHE_ALIGN
, NULL
);
3177 goto fail_free_gid_list
;
3179 ha
->ctx_mempool
= mempool_create_slab_pool(SRB_MIN_REQ
,
3181 if (!ha
->ctx_mempool
)
3182 goto fail_free_srb_mempool
;
3183 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x0021,
3184 "ctx_cachep=%p ctx_mempool=%p.\n",
3185 ctx_cachep
, ha
->ctx_mempool
);
3188 /* Get memory for cached NVRAM */
3189 ha
->nvram
= kzalloc(MAX_NVRAM_SIZE
, GFP_KERNEL
);
3191 goto fail_free_ctx_mempool
;
3193 snprintf(name
, sizeof(name
), "%s_%d", QLA2XXX_DRIVER_NAME
,
3195 ha
->s_dma_pool
= dma_pool_create(name
, &ha
->pdev
->dev
,
3196 DMA_POOL_SIZE
, 8, 0);
3197 if (!ha
->s_dma_pool
)
3198 goto fail_free_nvram
;
3200 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x0022,
3201 "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n",
3202 ha
->init_cb
, ha
->gid_list
, ha
->srb_mempool
, ha
->s_dma_pool
);
3204 if (IS_QLA82XX(ha
) || ql2xenabledif
) {
3205 ha
->dl_dma_pool
= dma_pool_create(name
, &ha
->pdev
->dev
,
3206 DSD_LIST_DMA_POOL_SIZE
, 8, 0);
3207 if (!ha
->dl_dma_pool
) {
3208 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0023,
3209 "Failed to allocate memory for dl_dma_pool.\n");
3210 goto fail_s_dma_pool
;
3213 ha
->fcp_cmnd_dma_pool
= dma_pool_create(name
, &ha
->pdev
->dev
,
3214 FCP_CMND_DMA_POOL_SIZE
, 8, 0);
3215 if (!ha
->fcp_cmnd_dma_pool
) {
3216 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0024,
3217 "Failed to allocate memory for fcp_cmnd_dma_pool.\n");
3218 goto fail_dl_dma_pool
;
3220 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x0025,
3221 "dl_dma_pool=%p fcp_cmnd_dma_pool=%p.\n",
3222 ha
->dl_dma_pool
, ha
->fcp_cmnd_dma_pool
);
3225 /* Allocate memory for SNS commands */
3226 if (IS_QLA2100(ha
) || IS_QLA2200(ha
)) {
3227 /* Get consistent memory allocated for SNS commands */
3228 ha
->sns_cmd
= dma_alloc_coherent(&ha
->pdev
->dev
,
3229 sizeof(struct sns_cmd_pkt
), &ha
->sns_cmd_dma
, GFP_KERNEL
);
3232 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x0026,
3233 "sns_cmd: %p.\n", ha
->sns_cmd
);
3235 /* Get consistent memory allocated for MS IOCB */
3236 ha
->ms_iocb
= dma_pool_alloc(ha
->s_dma_pool
, GFP_KERNEL
,
3240 /* Get consistent memory allocated for CT SNS commands */
3241 ha
->ct_sns
= dma_alloc_coherent(&ha
->pdev
->dev
,
3242 sizeof(struct ct_sns_pkt
), &ha
->ct_sns_dma
, GFP_KERNEL
);
3244 goto fail_free_ms_iocb
;
3245 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x0027,
3246 "ms_iocb=%p ct_sns=%p.\n",
3247 ha
->ms_iocb
, ha
->ct_sns
);
3250 /* Allocate memory for request ring */
3251 *req
= kzalloc(sizeof(struct req_que
), GFP_KERNEL
);
3253 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0028,
3254 "Failed to allocate memory for req.\n");
3257 (*req
)->length
= req_len
;
3258 (*req
)->ring
= dma_alloc_coherent(&ha
->pdev
->dev
,
3259 ((*req
)->length
+ 1) * sizeof(request_t
),
3260 &(*req
)->dma
, GFP_KERNEL
);
3261 if (!(*req
)->ring
) {
3262 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0029,
3263 "Failed to allocate memory for req_ring.\n");
3266 /* Allocate memory for response ring */
3267 *rsp
= kzalloc(sizeof(struct rsp_que
), GFP_KERNEL
);
3269 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x002a,
3270 "Failed to allocate memory for rsp.\n");
3274 (*rsp
)->length
= rsp_len
;
3275 (*rsp
)->ring
= dma_alloc_coherent(&ha
->pdev
->dev
,
3276 ((*rsp
)->length
+ 1) * sizeof(response_t
),
3277 &(*rsp
)->dma
, GFP_KERNEL
);
3278 if (!(*rsp
)->ring
) {
3279 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x002b,
3280 "Failed to allocate memory for rsp_ring.\n");
3285 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x002c,
3286 "req=%p req->length=%d req->ring=%p rsp=%p "
3287 "rsp->length=%d rsp->ring=%p.\n",
3288 *req
, (*req
)->length
, (*req
)->ring
, *rsp
, (*rsp
)->length
,
3290 /* Allocate memory for NVRAM data for vports */
3291 if (ha
->nvram_npiv_size
) {
3292 ha
->npiv_info
= kzalloc(sizeof(struct qla_npiv_entry
) *
3293 ha
->nvram_npiv_size
, GFP_KERNEL
);
3294 if (!ha
->npiv_info
) {
3295 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x002d,
3296 "Failed to allocate memory for npiv_info.\n");
3297 goto fail_npiv_info
;
3300 ha
->npiv_info
= NULL
;
3302 /* Get consistent memory allocated for EX-INIT-CB. */
3303 if (IS_CNA_CAPABLE(ha
) || IS_QLA2031(ha
)) {
3304 ha
->ex_init_cb
= dma_pool_alloc(ha
->s_dma_pool
, GFP_KERNEL
,
3305 &ha
->ex_init_cb_dma
);
3306 if (!ha
->ex_init_cb
)
3307 goto fail_ex_init_cb
;
3308 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x002e,
3309 "ex_init_cb=%p.\n", ha
->ex_init_cb
);
3312 INIT_LIST_HEAD(&ha
->gbl_dsd_list
);
3314 /* Get consistent memory allocated for Async Port-Database. */
3315 if (!IS_FWI2_CAPABLE(ha
)) {
3316 ha
->async_pd
= dma_pool_alloc(ha
->s_dma_pool
, GFP_KERNEL
,
3320 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x002f,
3321 "async_pd=%p.\n", ha
->async_pd
);
3324 INIT_LIST_HEAD(&ha
->vp_list
);
3326 /* Allocate memory for our loop_id bitmap */
3327 ha
->loop_id_map
= kzalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE
) * sizeof(long),
3329 if (!ha
->loop_id_map
)
3332 qla2x00_set_reserved_loop_ids(ha
);
3333 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x0123,
3334 "loop_id_map=%p. \n", ha
->loop_id_map
);
3340 dma_pool_free(ha
->s_dma_pool
, ha
->ex_init_cb
, ha
->ex_init_cb_dma
);
3342 kfree(ha
->npiv_info
);
3344 dma_free_coherent(&ha
->pdev
->dev
, ((*rsp
)->length
+ 1) *
3345 sizeof(response_t
), (*rsp
)->ring
, (*rsp
)->dma
);
3346 (*rsp
)->ring
= NULL
;
3351 dma_free_coherent(&ha
->pdev
->dev
, ((*req
)->length
+ 1) *
3352 sizeof(request_t
), (*req
)->ring
, (*req
)->dma
);
3353 (*req
)->ring
= NULL
;
3358 dma_free_coherent(&ha
->pdev
->dev
, sizeof(struct ct_sns_pkt
),
3359 ha
->ct_sns
, ha
->ct_sns_dma
);
3363 dma_pool_free(ha
->s_dma_pool
, ha
->ms_iocb
, ha
->ms_iocb_dma
);
3365 ha
->ms_iocb_dma
= 0;
3367 if (IS_QLA82XX(ha
) || ql2xenabledif
) {
3368 dma_pool_destroy(ha
->fcp_cmnd_dma_pool
);
3369 ha
->fcp_cmnd_dma_pool
= NULL
;
3372 if (IS_QLA82XX(ha
) || ql2xenabledif
) {
3373 dma_pool_destroy(ha
->dl_dma_pool
);
3374 ha
->dl_dma_pool
= NULL
;
3377 dma_pool_destroy(ha
->s_dma_pool
);
3378 ha
->s_dma_pool
= NULL
;
3382 fail_free_ctx_mempool
:
3383 mempool_destroy(ha
->ctx_mempool
);
3384 ha
->ctx_mempool
= NULL
;
3385 fail_free_srb_mempool
:
3386 mempool_destroy(ha
->srb_mempool
);
3387 ha
->srb_mempool
= NULL
;
3389 dma_free_coherent(&ha
->pdev
->dev
, qla2x00_gid_list_size(ha
),
3392 ha
->gid_list
= NULL
;
3393 ha
->gid_list_dma
= 0;
3397 dma_free_coherent(&ha
->pdev
->dev
, ha
->init_cb_size
, ha
->init_cb
,
3400 ha
->init_cb_dma
= 0;
3402 ql_log(ql_log_fatal
, NULL
, 0x0030,
3403 "Memory allocation failure.\n");
3408 * qla2x00_free_fw_dump
3409 * Frees fw dump stuff.
3412 * ha = adapter block pointer.
3415 qla2x00_free_fw_dump(struct qla_hw_data
*ha
)
3418 dma_free_coherent(&ha
->pdev
->dev
, FCE_SIZE
, ha
->fce
,
3423 dma_free_coherent(&ha
->pdev
->dev
,
3424 ntohl(ha
->fw_dump
->eft_size
), ha
->eft
, ha
->eft_dma
);
3433 ha
->fw_dump_reading
= 0;
3438 * Frees all adapter allocated memory.
3441 * ha = adapter block pointer.
3444 qla2x00_mem_free(struct qla_hw_data
*ha
)
3446 qla2x00_free_fw_dump(ha
);
3449 dma_free_coherent(&ha
->pdev
->dev
, MCTP_DUMP_SIZE
, ha
->mctp_dump
,
3452 if (ha
->srb_mempool
)
3453 mempool_destroy(ha
->srb_mempool
);
3456 dma_free_coherent(&ha
->pdev
->dev
, DCBX_TLV_DATA_SIZE
,
3457 ha
->dcbx_tlv
, ha
->dcbx_tlv_dma
);
3460 dma_free_coherent(&ha
->pdev
->dev
, XGMAC_DATA_SIZE
,
3461 ha
->xgmac_data
, ha
->xgmac_data_dma
);
3464 dma_free_coherent(&ha
->pdev
->dev
, sizeof(struct sns_cmd_pkt
),
3465 ha
->sns_cmd
, ha
->sns_cmd_dma
);
3468 dma_free_coherent(&ha
->pdev
->dev
, sizeof(struct ct_sns_pkt
),
3469 ha
->ct_sns
, ha
->ct_sns_dma
);
3472 dma_pool_free(ha
->s_dma_pool
, ha
->sfp_data
, ha
->sfp_data_dma
);
3475 dma_pool_free(ha
->s_dma_pool
, ha
->ms_iocb
, ha
->ms_iocb_dma
);
3478 dma_pool_free(ha
->s_dma_pool
,
3479 ha
->ex_init_cb
, ha
->ex_init_cb_dma
);
3482 dma_pool_free(ha
->s_dma_pool
, ha
->async_pd
, ha
->async_pd_dma
);
3485 dma_pool_destroy(ha
->s_dma_pool
);
3488 dma_free_coherent(&ha
->pdev
->dev
, qla2x00_gid_list_size(ha
),
3489 ha
->gid_list
, ha
->gid_list_dma
);
3491 if (IS_QLA82XX(ha
)) {
3492 if (!list_empty(&ha
->gbl_dsd_list
)) {
3493 struct dsd_dma
*dsd_ptr
, *tdsd_ptr
;
3495 /* clean up allocated prev pool */
3496 list_for_each_entry_safe(dsd_ptr
,
3497 tdsd_ptr
, &ha
->gbl_dsd_list
, list
) {
3498 dma_pool_free(ha
->dl_dma_pool
,
3499 dsd_ptr
->dsd_addr
, dsd_ptr
->dsd_list_dma
);
3500 list_del(&dsd_ptr
->list
);
3506 if (ha
->dl_dma_pool
)
3507 dma_pool_destroy(ha
->dl_dma_pool
);
3509 if (ha
->fcp_cmnd_dma_pool
)
3510 dma_pool_destroy(ha
->fcp_cmnd_dma_pool
);
3512 if (ha
->ctx_mempool
)
3513 mempool_destroy(ha
->ctx_mempool
);
3518 dma_free_coherent(&ha
->pdev
->dev
, ha
->init_cb_size
,
3519 ha
->init_cb
, ha
->init_cb_dma
);
3520 vfree(ha
->optrom_buffer
);
3522 kfree(ha
->npiv_info
);
3524 kfree(ha
->loop_id_map
);
3526 ha
->srb_mempool
= NULL
;
3527 ha
->ctx_mempool
= NULL
;
3529 ha
->sns_cmd_dma
= 0;
3533 ha
->ms_iocb_dma
= 0;
3535 ha
->init_cb_dma
= 0;
3536 ha
->ex_init_cb
= NULL
;
3537 ha
->ex_init_cb_dma
= 0;
3538 ha
->async_pd
= NULL
;
3539 ha
->async_pd_dma
= 0;
3541 ha
->s_dma_pool
= NULL
;
3542 ha
->dl_dma_pool
= NULL
;
3543 ha
->fcp_cmnd_dma_pool
= NULL
;
3545 ha
->gid_list
= NULL
;
3546 ha
->gid_list_dma
= 0;
3548 ha
->tgt
.atio_ring
= NULL
;
3549 ha
->tgt
.atio_dma
= 0;
3550 ha
->tgt
.tgt_vp_map
= NULL
;
3553 struct scsi_qla_host
*qla2x00_create_host(struct scsi_host_template
*sht
,
3554 struct qla_hw_data
*ha
)
3556 struct Scsi_Host
*host
;
3557 struct scsi_qla_host
*vha
= NULL
;
3559 host
= scsi_host_alloc(sht
, sizeof(scsi_qla_host_t
));
3561 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0107,
3562 "Failed to allocate host from the scsi layer, aborting.\n");
3566 /* Clear our data area */
3567 vha
= shost_priv(host
);
3568 memset(vha
, 0, sizeof(scsi_qla_host_t
));
3571 vha
->host_no
= host
->host_no
;
3574 INIT_LIST_HEAD(&vha
->vp_fcports
);
3575 INIT_LIST_HEAD(&vha
->work_list
);
3576 INIT_LIST_HEAD(&vha
->list
);
3578 spin_lock_init(&vha
->work_lock
);
3580 sprintf(vha
->host_str
, "%s_%ld", QLA2XXX_DRIVER_NAME
, vha
->host_no
);
3581 ql_dbg(ql_dbg_init
, vha
, 0x0041,
3582 "Allocated the host=%p hw=%p vha=%p dev_name=%s",
3583 vha
->host
, vha
->hw
, vha
,
3584 dev_name(&(ha
->pdev
->dev
)));
3592 static struct qla_work_evt
*
3593 qla2x00_alloc_work(struct scsi_qla_host
*vha
, enum qla_work_type type
)
3595 struct qla_work_evt
*e
;
3598 QLA_VHA_MARK_BUSY(vha
, bail
);
3602 e
= kzalloc(sizeof(struct qla_work_evt
), GFP_ATOMIC
);
3604 QLA_VHA_MARK_NOT_BUSY(vha
);
3608 INIT_LIST_HEAD(&e
->list
);
3610 e
->flags
= QLA_EVT_FLAG_FREE
;
3615 qla2x00_post_work(struct scsi_qla_host
*vha
, struct qla_work_evt
*e
)
3617 unsigned long flags
;
3619 spin_lock_irqsave(&vha
->work_lock
, flags
);
3620 list_add_tail(&e
->list
, &vha
->work_list
);
3621 spin_unlock_irqrestore(&vha
->work_lock
, flags
);
3622 qla2xxx_wake_dpc(vha
);
3628 qla2x00_post_aen_work(struct scsi_qla_host
*vha
, enum fc_host_event_code code
,
3631 struct qla_work_evt
*e
;
3633 e
= qla2x00_alloc_work(vha
, QLA_EVT_AEN
);
3635 return QLA_FUNCTION_FAILED
;
3637 e
->u
.aen
.code
= code
;
3638 e
->u
.aen
.data
= data
;
3639 return qla2x00_post_work(vha
, e
);
3643 qla2x00_post_idc_ack_work(struct scsi_qla_host
*vha
, uint16_t *mb
)
3645 struct qla_work_evt
*e
;
3647 e
= qla2x00_alloc_work(vha
, QLA_EVT_IDC_ACK
);
3649 return QLA_FUNCTION_FAILED
;
3651 memcpy(e
->u
.idc_ack
.mb
, mb
, QLA_IDC_ACK_REGS
* sizeof(uint16_t));
3652 return qla2x00_post_work(vha
, e
);
3655 #define qla2x00_post_async_work(name, type) \
3656 int qla2x00_post_async_##name##_work( \
3657 struct scsi_qla_host *vha, \
3658 fc_port_t *fcport, uint16_t *data) \
3660 struct qla_work_evt *e; \
3662 e = qla2x00_alloc_work(vha, type); \
3664 return QLA_FUNCTION_FAILED; \
3666 e->u.logio.fcport = fcport; \
3668 e->u.logio.data[0] = data[0]; \
3669 e->u.logio.data[1] = data[1]; \
3671 return qla2x00_post_work(vha, e); \
3674 qla2x00_post_async_work(login
, QLA_EVT_ASYNC_LOGIN
);
3675 qla2x00_post_async_work(login_done
, QLA_EVT_ASYNC_LOGIN_DONE
);
3676 qla2x00_post_async_work(logout
, QLA_EVT_ASYNC_LOGOUT
);
3677 qla2x00_post_async_work(logout_done
, QLA_EVT_ASYNC_LOGOUT_DONE
);
3678 qla2x00_post_async_work(adisc
, QLA_EVT_ASYNC_ADISC
);
3679 qla2x00_post_async_work(adisc_done
, QLA_EVT_ASYNC_ADISC_DONE
);
3682 qla2x00_post_uevent_work(struct scsi_qla_host
*vha
, u32 code
)
3684 struct qla_work_evt
*e
;
3686 e
= qla2x00_alloc_work(vha
, QLA_EVT_UEVENT
);
3688 return QLA_FUNCTION_FAILED
;
3690 e
->u
.uevent
.code
= code
;
3691 return qla2x00_post_work(vha
, e
);
3695 qla2x00_uevent_emit(struct scsi_qla_host
*vha
, u32 code
)
3697 char event_string
[40];
3698 char *envp
[] = { event_string
, NULL
};
3701 case QLA_UEVENT_CODE_FW_DUMP
:
3702 snprintf(event_string
, sizeof(event_string
), "FW_DUMP=%ld",
3709 kobject_uevent_env(&vha
->hw
->pdev
->dev
.kobj
, KOBJ_CHANGE
, envp
);
3713 qla2x00_do_work(struct scsi_qla_host
*vha
)
3715 struct qla_work_evt
*e
, *tmp
;
3716 unsigned long flags
;
3719 spin_lock_irqsave(&vha
->work_lock
, flags
);
3720 list_splice_init(&vha
->work_list
, &work
);
3721 spin_unlock_irqrestore(&vha
->work_lock
, flags
);
3723 list_for_each_entry_safe(e
, tmp
, &work
, list
) {
3724 list_del_init(&e
->list
);
3728 fc_host_post_event(vha
->host
, fc_get_event_number(),
3729 e
->u
.aen
.code
, e
->u
.aen
.data
);
3731 case QLA_EVT_IDC_ACK
:
3732 qla81xx_idc_ack(vha
, e
->u
.idc_ack
.mb
);
3734 case QLA_EVT_ASYNC_LOGIN
:
3735 qla2x00_async_login(vha
, e
->u
.logio
.fcport
,
3738 case QLA_EVT_ASYNC_LOGIN_DONE
:
3739 qla2x00_async_login_done(vha
, e
->u
.logio
.fcport
,
3742 case QLA_EVT_ASYNC_LOGOUT
:
3743 qla2x00_async_logout(vha
, e
->u
.logio
.fcport
);
3745 case QLA_EVT_ASYNC_LOGOUT_DONE
:
3746 qla2x00_async_logout_done(vha
, e
->u
.logio
.fcport
,
3749 case QLA_EVT_ASYNC_ADISC
:
3750 qla2x00_async_adisc(vha
, e
->u
.logio
.fcport
,
3753 case QLA_EVT_ASYNC_ADISC_DONE
:
3754 qla2x00_async_adisc_done(vha
, e
->u
.logio
.fcport
,
3757 case QLA_EVT_UEVENT
:
3758 qla2x00_uevent_emit(vha
, e
->u
.uevent
.code
);
3761 if (e
->flags
& QLA_EVT_FLAG_FREE
)
3764 /* For each work completed decrement vha ref count */
3765 QLA_VHA_MARK_NOT_BUSY(vha
);
3769 /* Relogins all the fcports of a vport
3770 * Context: dpc thread
3772 void qla2x00_relogin(struct scsi_qla_host
*vha
)
3776 uint16_t next_loopid
= 0;
3777 struct qla_hw_data
*ha
= vha
->hw
;
3780 list_for_each_entry(fcport
, &vha
->vp_fcports
, list
) {
3782 * If the port is not ONLINE then try to login
3783 * to it if we haven't run out of retries.
3785 if (atomic_read(&fcport
->state
) != FCS_ONLINE
&&
3786 fcport
->login_retry
&& !(fcport
->flags
& FCF_ASYNC_SENT
)) {
3787 fcport
->login_retry
--;
3788 if (fcport
->flags
& FCF_FABRIC_DEVICE
) {
3789 if (fcport
->flags
& FCF_FCP2_DEVICE
)
3790 ha
->isp_ops
->fabric_logout(vha
,
3792 fcport
->d_id
.b
.domain
,
3793 fcport
->d_id
.b
.area
,
3794 fcport
->d_id
.b
.al_pa
);
3796 if (fcport
->loop_id
== FC_NO_LOOP_ID
) {
3797 fcport
->loop_id
= next_loopid
=
3798 ha
->min_external_loopid
;
3799 status
= qla2x00_find_new_loop_id(
3801 if (status
!= QLA_SUCCESS
) {
3802 /* Ran out of IDs to use */
3807 if (IS_ALOGIO_CAPABLE(ha
)) {
3808 fcport
->flags
|= FCF_ASYNC_SENT
;
3810 data
[1] = QLA_LOGIO_LOGIN_RETRIED
;
3811 status
= qla2x00_post_async_login_work(
3813 if (status
== QLA_SUCCESS
)
3815 /* Attempt a retry. */
3818 status
= qla2x00_fabric_login(vha
,
3819 fcport
, &next_loopid
);
3820 if (status
== QLA_SUCCESS
) {
3829 qla2x00_get_port_database(
3831 if (status2
!= QLA_SUCCESS
)
3836 status
= qla2x00_local_device_login(vha
,
3839 if (status
== QLA_SUCCESS
) {
3840 fcport
->old_loop_id
= fcport
->loop_id
;
3842 ql_dbg(ql_dbg_disc
, vha
, 0x2003,
3843 "Port login OK: logged in ID 0x%x.\n",
3846 qla2x00_update_fcport(vha
, fcport
);
3848 } else if (status
== 1) {
3849 set_bit(RELOGIN_NEEDED
, &vha
->dpc_flags
);
3850 /* retry the login again */
3851 ql_dbg(ql_dbg_disc
, vha
, 0x2007,
3852 "Retrying %d login again loop_id 0x%x.\n",
3853 fcport
->login_retry
, fcport
->loop_id
);
3855 fcport
->login_retry
= 0;
3858 if (fcport
->login_retry
== 0 && status
!= QLA_SUCCESS
)
3859 qla2x00_clear_loop_id(fcport
);
3861 if (test_bit(LOOP_RESYNC_NEEDED
, &vha
->dpc_flags
))
3866 /* Schedule work on any of the dpc-workqueues */
3868 qla83xx_schedule_work(scsi_qla_host_t
*base_vha
, int work_code
)
3870 struct qla_hw_data
*ha
= base_vha
->hw
;
3872 switch (work_code
) {
3873 case MBA_IDC_AEN
: /* 0x8200 */
3875 queue_work(ha
->dpc_lp_wq
, &ha
->idc_aen
);
3878 case QLA83XX_NIC_CORE_RESET
: /* 0x1 */
3879 if (!ha
->flags
.nic_core_reset_hdlr_active
) {
3881 queue_work(ha
->dpc_hp_wq
, &ha
->nic_core_reset
);
3883 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb05e,
3884 "NIC Core reset is already active. Skip "
3885 "scheduling it again.\n");
3887 case QLA83XX_IDC_STATE_HANDLER
: /* 0x2 */
3889 queue_work(ha
->dpc_hp_wq
, &ha
->idc_state_handler
);
3891 case QLA83XX_NIC_CORE_UNRECOVERABLE
: /* 0x3 */
3893 queue_work(ha
->dpc_hp_wq
, &ha
->nic_core_unrecoverable
);
3896 ql_log(ql_log_warn
, base_vha
, 0xb05f,
3897 "Unknow work-code=0x%x.\n", work_code
);
3903 /* Work: Perform NIC Core Unrecoverable state handling */
3905 qla83xx_nic_core_unrecoverable_work(struct work_struct
*work
)
3907 struct qla_hw_data
*ha
=
3908 container_of(work
, struct qla_hw_data
, nic_core_unrecoverable
);
3909 scsi_qla_host_t
*base_vha
= pci_get_drvdata(ha
->pdev
);
3910 uint32_t dev_state
= 0;
3912 qla83xx_idc_lock(base_vha
, 0);
3913 qla83xx_rd_reg(base_vha
, QLA83XX_IDC_DEV_STATE
, &dev_state
);
3914 qla83xx_reset_ownership(base_vha
);
3915 if (ha
->flags
.nic_core_reset_owner
) {
3916 ha
->flags
.nic_core_reset_owner
= 0;
3917 qla83xx_wr_reg(base_vha
, QLA83XX_IDC_DEV_STATE
,
3918 QLA8XXX_DEV_FAILED
);
3919 ql_log(ql_log_info
, base_vha
, 0xb060, "HW State: FAILED.\n");
3920 qla83xx_schedule_work(base_vha
, QLA83XX_IDC_STATE_HANDLER
);
3922 qla83xx_idc_unlock(base_vha
, 0);
3925 /* Work: Execute IDC state handler */
3927 qla83xx_idc_state_handler_work(struct work_struct
*work
)
3929 struct qla_hw_data
*ha
=
3930 container_of(work
, struct qla_hw_data
, idc_state_handler
);
3931 scsi_qla_host_t
*base_vha
= pci_get_drvdata(ha
->pdev
);
3932 uint32_t dev_state
= 0;
3934 qla83xx_idc_lock(base_vha
, 0);
3935 qla83xx_rd_reg(base_vha
, QLA83XX_IDC_DEV_STATE
, &dev_state
);
3936 if (dev_state
== QLA8XXX_DEV_FAILED
||
3937 dev_state
== QLA8XXX_DEV_NEED_QUIESCENT
)
3938 qla83xx_idc_state_handler(base_vha
);
3939 qla83xx_idc_unlock(base_vha
, 0);
3943 qla83xx_check_nic_core_fw_alive(scsi_qla_host_t
*base_vha
)
3945 int rval
= QLA_SUCCESS
;
3946 unsigned long heart_beat_wait
= jiffies
+ (1 * HZ
);
3947 uint32_t heart_beat_counter1
, heart_beat_counter2
;
3950 if (time_after(jiffies
, heart_beat_wait
)) {
3951 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb07c,
3952 "Nic Core f/w is not alive.\n");
3953 rval
= QLA_FUNCTION_FAILED
;
3957 qla83xx_idc_lock(base_vha
, 0);
3958 qla83xx_rd_reg(base_vha
, QLA83XX_FW_HEARTBEAT
,
3959 &heart_beat_counter1
);
3960 qla83xx_idc_unlock(base_vha
, 0);
3962 qla83xx_idc_lock(base_vha
, 0);
3963 qla83xx_rd_reg(base_vha
, QLA83XX_FW_HEARTBEAT
,
3964 &heart_beat_counter2
);
3965 qla83xx_idc_unlock(base_vha
, 0);
3966 } while (heart_beat_counter1
== heart_beat_counter2
);
3971 /* Work: Perform NIC Core Reset handling */
3973 qla83xx_nic_core_reset_work(struct work_struct
*work
)
3975 struct qla_hw_data
*ha
=
3976 container_of(work
, struct qla_hw_data
, nic_core_reset
);
3977 scsi_qla_host_t
*base_vha
= pci_get_drvdata(ha
->pdev
);
3978 uint32_t dev_state
= 0;
3980 if (IS_QLA2031(ha
)) {
3981 if (qla2xxx_mctp_dump(base_vha
) != QLA_SUCCESS
)
3982 ql_log(ql_log_warn
, base_vha
, 0xb081,
3983 "Failed to dump mctp\n");
3987 if (!ha
->flags
.nic_core_reset_hdlr_active
) {
3988 if (qla83xx_check_nic_core_fw_alive(base_vha
) == QLA_SUCCESS
) {
3989 qla83xx_idc_lock(base_vha
, 0);
3990 qla83xx_rd_reg(base_vha
, QLA83XX_IDC_DEV_STATE
,
3992 qla83xx_idc_unlock(base_vha
, 0);
3993 if (dev_state
!= QLA8XXX_DEV_NEED_RESET
) {
3994 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb07a,
3995 "Nic Core f/w is alive.\n");
4000 ha
->flags
.nic_core_reset_hdlr_active
= 1;
4001 if (qla83xx_nic_core_reset(base_vha
)) {
4002 /* NIC Core reset failed. */
4003 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb061,
4004 "NIC Core reset failed.\n");
4006 ha
->flags
.nic_core_reset_hdlr_active
= 0;
4010 /* Work: Handle 8200 IDC aens */
4012 qla83xx_service_idc_aen(struct work_struct
*work
)
4014 struct qla_hw_data
*ha
=
4015 container_of(work
, struct qla_hw_data
, idc_aen
);
4016 scsi_qla_host_t
*base_vha
= pci_get_drvdata(ha
->pdev
);
4017 uint32_t dev_state
, idc_control
;
4019 qla83xx_idc_lock(base_vha
, 0);
4020 qla83xx_rd_reg(base_vha
, QLA83XX_IDC_DEV_STATE
, &dev_state
);
4021 qla83xx_rd_reg(base_vha
, QLA83XX_IDC_CONTROL
, &idc_control
);
4022 qla83xx_idc_unlock(base_vha
, 0);
4023 if (dev_state
== QLA8XXX_DEV_NEED_RESET
) {
4024 if (idc_control
& QLA83XX_IDC_GRACEFUL_RESET
) {
4025 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb062,
4026 "Application requested NIC Core Reset.\n");
4027 qla83xx_schedule_work(base_vha
, QLA83XX_NIC_CORE_RESET
);
4028 } else if (qla83xx_check_nic_core_fw_alive(base_vha
) ==
4030 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb07b,
4031 "Other protocol driver requested NIC Core Reset.\n");
4032 qla83xx_schedule_work(base_vha
, QLA83XX_NIC_CORE_RESET
);
4034 } else if (dev_state
== QLA8XXX_DEV_FAILED
||
4035 dev_state
== QLA8XXX_DEV_NEED_QUIESCENT
) {
4036 qla83xx_schedule_work(base_vha
, QLA83XX_IDC_STATE_HANDLER
);
4041 qla83xx_wait_logic(void)
4046 if (!in_interrupt()) {
4048 * Wait about 200ms before retrying again.
4049 * This controls the number of retries for single
4055 for (i
= 0; i
< 20; i
++)
4056 cpu_relax(); /* This a nop instr on i386 */
4061 qla83xx_force_lock_recovery(scsi_qla_host_t
*base_vha
)
4065 uint32_t idc_lck_rcvry_stage_mask
= 0x3;
4066 uint32_t idc_lck_rcvry_owner_mask
= 0x3c;
4067 struct qla_hw_data
*ha
= base_vha
->hw
;
4069 rval
= qla83xx_rd_reg(base_vha
, QLA83XX_IDC_LOCK_RECOVERY
, &data
);
4073 if ((data
& idc_lck_rcvry_stage_mask
) > 0) {
4076 data
= (IDC_LOCK_RECOVERY_STAGE1
) | (ha
->portnum
<< 2);
4077 rval
= qla83xx_wr_reg(base_vha
, QLA83XX_IDC_LOCK_RECOVERY
,
4084 rval
= qla83xx_rd_reg(base_vha
, QLA83XX_IDC_LOCK_RECOVERY
,
4089 if (((data
& idc_lck_rcvry_owner_mask
) >> 2) == ha
->portnum
) {
4090 data
&= (IDC_LOCK_RECOVERY_STAGE2
|
4091 ~(idc_lck_rcvry_stage_mask
));
4092 rval
= qla83xx_wr_reg(base_vha
,
4093 QLA83XX_IDC_LOCK_RECOVERY
, data
);
4097 /* Forcefully perform IDC UnLock */
4098 rval
= qla83xx_rd_reg(base_vha
, QLA83XX_DRIVER_UNLOCK
,
4102 /* Clear lock-id by setting 0xff */
4103 rval
= qla83xx_wr_reg(base_vha
, QLA83XX_DRIVER_LOCKID
,
4107 /* Clear lock-recovery by setting 0x0 */
4108 rval
= qla83xx_wr_reg(base_vha
,
4109 QLA83XX_IDC_LOCK_RECOVERY
, 0x0);
4120 qla83xx_idc_lock_recovery(scsi_qla_host_t
*base_vha
)
4122 int rval
= QLA_SUCCESS
;
4123 uint32_t o_drv_lockid
, n_drv_lockid
;
4124 unsigned long lock_recovery_timeout
;
4126 lock_recovery_timeout
= jiffies
+ QLA83XX_MAX_LOCK_RECOVERY_WAIT
;
4128 rval
= qla83xx_rd_reg(base_vha
, QLA83XX_DRIVER_LOCKID
, &o_drv_lockid
);
4132 /* MAX wait time before forcing IDC Lock recovery = 2 secs */
4133 if (time_after_eq(jiffies
, lock_recovery_timeout
)) {
4134 if (qla83xx_force_lock_recovery(base_vha
) == QLA_SUCCESS
)
4137 return QLA_FUNCTION_FAILED
;
4140 rval
= qla83xx_rd_reg(base_vha
, QLA83XX_DRIVER_LOCKID
, &n_drv_lockid
);
4144 if (o_drv_lockid
== n_drv_lockid
) {
4145 qla83xx_wait_logic();
4155 qla83xx_idc_lock(scsi_qla_host_t
*base_vha
, uint16_t requester_id
)
4157 uint16_t options
= (requester_id
<< 15) | BIT_6
;
4159 struct qla_hw_data
*ha
= base_vha
->hw
;
4161 /* IDC-lock implementation using driver-lock/lock-id remote registers */
4163 if (qla83xx_rd_reg(base_vha
, QLA83XX_DRIVER_LOCK
, &data
)
4166 /* Setting lock-id to our function-number */
4167 qla83xx_wr_reg(base_vha
, QLA83XX_DRIVER_LOCKID
,
4170 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb063,
4171 "Failed to acquire IDC lock. retrying...\n");
4173 /* Retry/Perform IDC-Lock recovery */
4174 if (qla83xx_idc_lock_recovery(base_vha
)
4176 qla83xx_wait_logic();
4179 ql_log(ql_log_warn
, base_vha
, 0xb075,
4180 "IDC Lock recovery FAILED.\n");
4187 /* XXX: IDC-lock implementation using access-control mbx */
4189 if (qla83xx_access_control(base_vha
, options
, 0, 0, NULL
)) {
4190 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb072,
4191 "Failed to acquire IDC lock. retrying...\n");
4192 /* Retry/Perform IDC-Lock recovery */
4193 if (qla83xx_idc_lock_recovery(base_vha
) == QLA_SUCCESS
) {
4194 qla83xx_wait_logic();
4197 ql_log(ql_log_warn
, base_vha
, 0xb076,
4198 "IDC Lock recovery FAILED.\n");
4205 qla83xx_idc_unlock(scsi_qla_host_t
*base_vha
, uint16_t requester_id
)
4207 uint16_t options
= (requester_id
<< 15) | BIT_7
, retry
;
4209 struct qla_hw_data
*ha
= base_vha
->hw
;
4211 /* IDC-unlock implementation using driver-unlock/lock-id
4216 if (qla83xx_rd_reg(base_vha
, QLA83XX_DRIVER_LOCKID
, &data
)
4218 if (data
== ha
->portnum
) {
4219 qla83xx_rd_reg(base_vha
, QLA83XX_DRIVER_UNLOCK
, &data
);
4220 /* Clearing lock-id by setting 0xff */
4221 qla83xx_wr_reg(base_vha
, QLA83XX_DRIVER_LOCKID
, 0xff);
4222 } else if (retry
< 10) {
4223 /* SV: XXX: IDC unlock retrying needed here? */
4225 /* Retry for IDC-unlock */
4226 qla83xx_wait_logic();
4228 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb064,
4229 "Failed to release IDC lock, retyring=%d\n", retry
);
4232 } else if (retry
< 10) {
4233 /* Retry for IDC-unlock */
4234 qla83xx_wait_logic();
4236 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb065,
4237 "Failed to read drv-lockid, retyring=%d\n", retry
);
4243 /* XXX: IDC-unlock implementation using access-control mbx */
4246 if (qla83xx_access_control(base_vha
, options
, 0, 0, NULL
)) {
4248 /* Retry for IDC-unlock */
4249 qla83xx_wait_logic();
4251 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb066,
4252 "Failed to release IDC lock, retyring=%d\n", retry
);
4261 __qla83xx_set_drv_presence(scsi_qla_host_t
*vha
)
4263 int rval
= QLA_SUCCESS
;
4264 struct qla_hw_data
*ha
= vha
->hw
;
4265 uint32_t drv_presence
;
4267 rval
= qla83xx_rd_reg(vha
, QLA83XX_IDC_DRV_PRESENCE
, &drv_presence
);
4268 if (rval
== QLA_SUCCESS
) {
4269 drv_presence
|= (1 << ha
->portnum
);
4270 rval
= qla83xx_wr_reg(vha
, QLA83XX_IDC_DRV_PRESENCE
,
4278 qla83xx_set_drv_presence(scsi_qla_host_t
*vha
)
4280 int rval
= QLA_SUCCESS
;
4282 qla83xx_idc_lock(vha
, 0);
4283 rval
= __qla83xx_set_drv_presence(vha
);
4284 qla83xx_idc_unlock(vha
, 0);
4290 __qla83xx_clear_drv_presence(scsi_qla_host_t
*vha
)
4292 int rval
= QLA_SUCCESS
;
4293 struct qla_hw_data
*ha
= vha
->hw
;
4294 uint32_t drv_presence
;
4296 rval
= qla83xx_rd_reg(vha
, QLA83XX_IDC_DRV_PRESENCE
, &drv_presence
);
4297 if (rval
== QLA_SUCCESS
) {
4298 drv_presence
&= ~(1 << ha
->portnum
);
4299 rval
= qla83xx_wr_reg(vha
, QLA83XX_IDC_DRV_PRESENCE
,
4307 qla83xx_clear_drv_presence(scsi_qla_host_t
*vha
)
4309 int rval
= QLA_SUCCESS
;
4311 qla83xx_idc_lock(vha
, 0);
4312 rval
= __qla83xx_clear_drv_presence(vha
);
4313 qla83xx_idc_unlock(vha
, 0);
4319 qla83xx_need_reset_handler(scsi_qla_host_t
*vha
)
4321 struct qla_hw_data
*ha
= vha
->hw
;
4322 uint32_t drv_ack
, drv_presence
;
4323 unsigned long ack_timeout
;
4325 /* Wait for IDC ACK from all functions (DRV-ACK == DRV-PRESENCE) */
4326 ack_timeout
= jiffies
+ (ha
->fcoe_reset_timeout
* HZ
);
4328 qla83xx_rd_reg(vha
, QLA83XX_IDC_DRIVER_ACK
, &drv_ack
);
4329 qla83xx_rd_reg(vha
, QLA83XX_IDC_DRV_PRESENCE
, &drv_presence
);
4330 if ((drv_ack
& drv_presence
) == drv_presence
)
4333 if (time_after_eq(jiffies
, ack_timeout
)) {
4334 ql_log(ql_log_warn
, vha
, 0xb067,
4335 "RESET ACK TIMEOUT! drv_presence=0x%x "
4336 "drv_ack=0x%x\n", drv_presence
, drv_ack
);
4338 * The function(s) which did not ack in time are forced
4339 * to withdraw any further participation in the IDC
4342 if (drv_ack
!= drv_presence
)
4343 qla83xx_wr_reg(vha
, QLA83XX_IDC_DRV_PRESENCE
,
4348 qla83xx_idc_unlock(vha
, 0);
4350 qla83xx_idc_lock(vha
, 0);
4353 qla83xx_wr_reg(vha
, QLA83XX_IDC_DEV_STATE
, QLA8XXX_DEV_COLD
);
4354 ql_log(ql_log_info
, vha
, 0xb068, "HW State: COLD/RE-INIT.\n");
4358 qla83xx_device_bootstrap(scsi_qla_host_t
*vha
)
4360 int rval
= QLA_SUCCESS
;
4361 uint32_t idc_control
;
4363 qla83xx_wr_reg(vha
, QLA83XX_IDC_DEV_STATE
, QLA8XXX_DEV_INITIALIZING
);
4364 ql_log(ql_log_info
, vha
, 0xb069, "HW State: INITIALIZING.\n");
4366 /* Clearing IDC-Control Graceful-Reset Bit before resetting f/w */
4367 __qla83xx_get_idc_control(vha
, &idc_control
);
4368 idc_control
&= ~QLA83XX_IDC_GRACEFUL_RESET
;
4369 __qla83xx_set_idc_control(vha
, 0);
4371 qla83xx_idc_unlock(vha
, 0);
4372 rval
= qla83xx_restart_nic_firmware(vha
);
4373 qla83xx_idc_lock(vha
, 0);
4375 if (rval
!= QLA_SUCCESS
) {
4376 ql_log(ql_log_fatal
, vha
, 0xb06a,
4377 "Failed to restart NIC f/w.\n");
4378 qla83xx_wr_reg(vha
, QLA83XX_IDC_DEV_STATE
, QLA8XXX_DEV_FAILED
);
4379 ql_log(ql_log_info
, vha
, 0xb06b, "HW State: FAILED.\n");
4381 ql_dbg(ql_dbg_p3p
, vha
, 0xb06c,
4382 "Success in restarting nic f/w.\n");
4383 qla83xx_wr_reg(vha
, QLA83XX_IDC_DEV_STATE
, QLA8XXX_DEV_READY
);
4384 ql_log(ql_log_info
, vha
, 0xb06d, "HW State: READY.\n");
4390 /* Assumes idc_lock always held on entry */
4392 qla83xx_idc_state_handler(scsi_qla_host_t
*base_vha
)
4394 struct qla_hw_data
*ha
= base_vha
->hw
;
4395 int rval
= QLA_SUCCESS
;
4396 unsigned long dev_init_timeout
;
4399 /* Wait for MAX-INIT-TIMEOUT for the device to go ready */
4400 dev_init_timeout
= jiffies
+ (ha
->fcoe_dev_init_timeout
* HZ
);
4404 if (time_after_eq(jiffies
, dev_init_timeout
)) {
4405 ql_log(ql_log_warn
, base_vha
, 0xb06e,
4406 "Initialization TIMEOUT!\n");
4407 /* Init timeout. Disable further NIC Core
4410 qla83xx_wr_reg(base_vha
, QLA83XX_IDC_DEV_STATE
,
4411 QLA8XXX_DEV_FAILED
);
4412 ql_log(ql_log_info
, base_vha
, 0xb06f,
4413 "HW State: FAILED.\n");
4416 qla83xx_rd_reg(base_vha
, QLA83XX_IDC_DEV_STATE
, &dev_state
);
4417 switch (dev_state
) {
4418 case QLA8XXX_DEV_READY
:
4419 if (ha
->flags
.nic_core_reset_owner
)
4420 qla83xx_idc_audit(base_vha
,
4421 IDC_AUDIT_COMPLETION
);
4422 ha
->flags
.nic_core_reset_owner
= 0;
4423 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb070,
4424 "Reset_owner reset by 0x%x.\n",
4427 case QLA8XXX_DEV_COLD
:
4428 if (ha
->flags
.nic_core_reset_owner
)
4429 rval
= qla83xx_device_bootstrap(base_vha
);
4431 /* Wait for AEN to change device-state */
4432 qla83xx_idc_unlock(base_vha
, 0);
4434 qla83xx_idc_lock(base_vha
, 0);
4437 case QLA8XXX_DEV_INITIALIZING
:
4438 /* Wait for AEN to change device-state */
4439 qla83xx_idc_unlock(base_vha
, 0);
4441 qla83xx_idc_lock(base_vha
, 0);
4443 case QLA8XXX_DEV_NEED_RESET
:
4444 if (!ql2xdontresethba
&& ha
->flags
.nic_core_reset_owner
)
4445 qla83xx_need_reset_handler(base_vha
);
4447 /* Wait for AEN to change device-state */
4448 qla83xx_idc_unlock(base_vha
, 0);
4450 qla83xx_idc_lock(base_vha
, 0);
4452 /* reset timeout value after need reset handler */
4453 dev_init_timeout
= jiffies
+
4454 (ha
->fcoe_dev_init_timeout
* HZ
);
4456 case QLA8XXX_DEV_NEED_QUIESCENT
:
4457 /* XXX: DEBUG for now */
4458 qla83xx_idc_unlock(base_vha
, 0);
4460 qla83xx_idc_lock(base_vha
, 0);
4462 case QLA8XXX_DEV_QUIESCENT
:
4463 /* XXX: DEBUG for now */
4464 if (ha
->flags
.quiesce_owner
)
4467 qla83xx_idc_unlock(base_vha
, 0);
4469 qla83xx_idc_lock(base_vha
, 0);
4470 dev_init_timeout
= jiffies
+
4471 (ha
->fcoe_dev_init_timeout
* HZ
);
4473 case QLA8XXX_DEV_FAILED
:
4474 if (ha
->flags
.nic_core_reset_owner
)
4475 qla83xx_idc_audit(base_vha
,
4476 IDC_AUDIT_COMPLETION
);
4477 ha
->flags
.nic_core_reset_owner
= 0;
4478 __qla83xx_clear_drv_presence(base_vha
);
4479 qla83xx_idc_unlock(base_vha
, 0);
4480 qla8xxx_dev_failed_handler(base_vha
);
4481 rval
= QLA_FUNCTION_FAILED
;
4482 qla83xx_idc_lock(base_vha
, 0);
4484 case QLA8XXX_BAD_VALUE
:
4485 qla83xx_idc_unlock(base_vha
, 0);
4487 qla83xx_idc_lock(base_vha
, 0);
4490 ql_log(ql_log_warn
, base_vha
, 0xb071,
4491 "Unknow Device State: %x.\n", dev_state
);
4492 qla83xx_idc_unlock(base_vha
, 0);
4493 qla8xxx_dev_failed_handler(base_vha
);
4494 rval
= QLA_FUNCTION_FAILED
;
4495 qla83xx_idc_lock(base_vha
, 0);
4504 /**************************************************************************
4506 * This kernel thread is a task that is schedule by the interrupt handler
4507 * to perform the background processing for interrupts.
4510 * This task always run in the context of a kernel thread. It
4511 * is kick-off by the driver's detect code and starts up
4512 * up one per adapter. It immediately goes to sleep and waits for
4513 * some fibre event. When either the interrupt handler or
4514 * the timer routine detects a event it will one of the task
4515 * bits then wake us up.
4516 **************************************************************************/
4518 qla2x00_do_dpc(void *data
)
4521 scsi_qla_host_t
*base_vha
;
4522 struct qla_hw_data
*ha
;
4524 ha
= (struct qla_hw_data
*)data
;
4525 base_vha
= pci_get_drvdata(ha
->pdev
);
4527 set_user_nice(current
, -20);
4529 set_current_state(TASK_INTERRUPTIBLE
);
4530 while (!kthread_should_stop()) {
4531 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4000,
4532 "DPC handler sleeping.\n");
4535 __set_current_state(TASK_RUNNING
);
4537 if (!base_vha
->flags
.init_done
|| ha
->flags
.mbox_busy
)
4540 if (ha
->flags
.eeh_busy
) {
4541 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4003,
4542 "eeh_busy=%d.\n", ha
->flags
.eeh_busy
);
4548 ql_dbg(ql_dbg_dpc
+ ql_dbg_verbose
, base_vha
, 0x4001,
4549 "DPC handler waking up, dpc_flags=0x%lx.\n",
4550 base_vha
->dpc_flags
);
4552 qla2x00_do_work(base_vha
);
4554 if (IS_QLA82XX(ha
)) {
4555 if (test_and_clear_bit(ISP_UNRECOVERABLE
,
4556 &base_vha
->dpc_flags
)) {
4557 qla82xx_idc_lock(ha
);
4558 qla82xx_wr_32(ha
, QLA82XX_CRB_DEV_STATE
,
4559 QLA8XXX_DEV_FAILED
);
4560 qla82xx_idc_unlock(ha
);
4561 ql_log(ql_log_info
, base_vha
, 0x4004,
4562 "HW State: FAILED.\n");
4563 qla82xx_device_state_handler(base_vha
);
4567 if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED
,
4568 &base_vha
->dpc_flags
)) {
4570 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4005,
4571 "FCoE context reset scheduled.\n");
4572 if (!(test_and_set_bit(ABORT_ISP_ACTIVE
,
4573 &base_vha
->dpc_flags
))) {
4574 if (qla82xx_fcoe_ctx_reset(base_vha
)) {
4575 /* FCoE-ctx reset failed.
4576 * Escalate to chip-reset
4578 set_bit(ISP_ABORT_NEEDED
,
4579 &base_vha
->dpc_flags
);
4581 clear_bit(ABORT_ISP_ACTIVE
,
4582 &base_vha
->dpc_flags
);
4585 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4006,
4586 "FCoE context reset end.\n");
4590 if (test_and_clear_bit(ISP_ABORT_NEEDED
,
4591 &base_vha
->dpc_flags
)) {
4593 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4007,
4594 "ISP abort scheduled.\n");
4595 if (!(test_and_set_bit(ABORT_ISP_ACTIVE
,
4596 &base_vha
->dpc_flags
))) {
4598 if (ha
->isp_ops
->abort_isp(base_vha
)) {
4599 /* failed. retry later */
4600 set_bit(ISP_ABORT_NEEDED
,
4601 &base_vha
->dpc_flags
);
4603 clear_bit(ABORT_ISP_ACTIVE
,
4604 &base_vha
->dpc_flags
);
4607 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4008,
4608 "ISP abort end.\n");
4611 if (test_and_clear_bit(FCPORT_UPDATE_NEEDED
,
4612 &base_vha
->dpc_flags
)) {
4613 qla2x00_update_fcports(base_vha
);
4616 if (test_bit(SCR_PENDING
, &base_vha
->dpc_flags
)) {
4618 ret
= qla2x00_send_change_request(base_vha
, 0x3, 0);
4619 if (ret
!= QLA_SUCCESS
)
4620 ql_log(ql_log_warn
, base_vha
, 0x121,
4621 "Failed to enable receiving of RSCN "
4622 "requests: 0x%x.\n", ret
);
4623 clear_bit(SCR_PENDING
, &base_vha
->dpc_flags
);
4626 if (test_bit(ISP_QUIESCE_NEEDED
, &base_vha
->dpc_flags
)) {
4627 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4009,
4628 "Quiescence mode scheduled.\n");
4629 if (IS_QLA82XX(ha
)) {
4630 qla82xx_device_state_handler(base_vha
);
4631 clear_bit(ISP_QUIESCE_NEEDED
,
4632 &base_vha
->dpc_flags
);
4633 if (!ha
->flags
.quiesce_owner
) {
4634 qla2x00_perform_loop_resync(base_vha
);
4636 qla82xx_idc_lock(ha
);
4637 qla82xx_clear_qsnt_ready(base_vha
);
4638 qla82xx_idc_unlock(ha
);
4641 clear_bit(ISP_QUIESCE_NEEDED
,
4642 &base_vha
->dpc_flags
);
4643 qla2x00_quiesce_io(base_vha
);
4645 ql_dbg(ql_dbg_dpc
, base_vha
, 0x400a,
4646 "Quiescence mode end.\n");
4649 if (test_and_clear_bit(RESET_MARKER_NEEDED
,
4650 &base_vha
->dpc_flags
) &&
4651 (!(test_and_set_bit(RESET_ACTIVE
, &base_vha
->dpc_flags
)))) {
4653 ql_dbg(ql_dbg_dpc
, base_vha
, 0x400b,
4654 "Reset marker scheduled.\n");
4655 qla2x00_rst_aen(base_vha
);
4656 clear_bit(RESET_ACTIVE
, &base_vha
->dpc_flags
);
4657 ql_dbg(ql_dbg_dpc
, base_vha
, 0x400c,
4658 "Reset marker end.\n");
4661 /* Retry each device up to login retry count */
4662 if ((test_and_clear_bit(RELOGIN_NEEDED
,
4663 &base_vha
->dpc_flags
)) &&
4664 !test_bit(LOOP_RESYNC_NEEDED
, &base_vha
->dpc_flags
) &&
4665 atomic_read(&base_vha
->loop_state
) != LOOP_DOWN
) {
4667 ql_dbg(ql_dbg_dpc
, base_vha
, 0x400d,
4668 "Relogin scheduled.\n");
4669 qla2x00_relogin(base_vha
);
4670 ql_dbg(ql_dbg_dpc
, base_vha
, 0x400e,
4674 if (test_and_clear_bit(LOOP_RESYNC_NEEDED
,
4675 &base_vha
->dpc_flags
)) {
4677 ql_dbg(ql_dbg_dpc
, base_vha
, 0x400f,
4678 "Loop resync scheduled.\n");
4680 if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE
,
4681 &base_vha
->dpc_flags
))) {
4683 rval
= qla2x00_loop_resync(base_vha
);
4685 clear_bit(LOOP_RESYNC_ACTIVE
,
4686 &base_vha
->dpc_flags
);
4689 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4010,
4690 "Loop resync end.\n");
4693 if (test_bit(NPIV_CONFIG_NEEDED
, &base_vha
->dpc_flags
) &&
4694 atomic_read(&base_vha
->loop_state
) == LOOP_READY
) {
4695 clear_bit(NPIV_CONFIG_NEEDED
, &base_vha
->dpc_flags
);
4696 qla2xxx_flash_npiv_conf(base_vha
);
4699 if (test_and_clear_bit(HOST_RAMP_DOWN_QUEUE_DEPTH
,
4700 &base_vha
->dpc_flags
)) {
4701 /* Prevents simultaneous ramp up and down */
4702 clear_bit(HOST_RAMP_UP_QUEUE_DEPTH
,
4703 &base_vha
->dpc_flags
);
4704 qla2x00_host_ramp_down_queuedepth(base_vha
);
4707 if (test_and_clear_bit(HOST_RAMP_UP_QUEUE_DEPTH
,
4708 &base_vha
->dpc_flags
))
4709 qla2x00_host_ramp_up_queuedepth(base_vha
);
4711 if (!ha
->interrupts_on
)
4712 ha
->isp_ops
->enable_intrs(ha
);
4714 if (test_and_clear_bit(BEACON_BLINK_NEEDED
,
4715 &base_vha
->dpc_flags
))
4716 ha
->isp_ops
->beacon_blink(base_vha
);
4718 qla2x00_do_dpc_all_vps(base_vha
);
4722 set_current_state(TASK_INTERRUPTIBLE
);
4723 } /* End of while(1) */
4724 __set_current_state(TASK_RUNNING
);
4726 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4011,
4727 "DPC handler exiting.\n");
4730 * Make sure that nobody tries to wake us up again.
4734 /* Cleanup any residual CTX SRBs. */
4735 qla2x00_abort_all_cmds(base_vha
, DID_NO_CONNECT
<< 16);
4741 qla2xxx_wake_dpc(struct scsi_qla_host
*vha
)
4743 struct qla_hw_data
*ha
= vha
->hw
;
4744 struct task_struct
*t
= ha
->dpc_thread
;
4746 if (!test_bit(UNLOADING
, &vha
->dpc_flags
) && t
)
4752 * Processes asynchronous reset.
4755 * ha = adapter block pointer.
4758 qla2x00_rst_aen(scsi_qla_host_t
*vha
)
4760 if (vha
->flags
.online
&& !vha
->flags
.reset_active
&&
4761 !atomic_read(&vha
->loop_down_timer
) &&
4762 !(test_bit(ABORT_ISP_ACTIVE
, &vha
->dpc_flags
))) {
4764 clear_bit(RESET_MARKER_NEEDED
, &vha
->dpc_flags
);
4767 * Issue marker command only when we are going to start
4770 vha
->marker_needed
= 1;
4771 } while (!atomic_read(&vha
->loop_down_timer
) &&
4772 (test_bit(RESET_MARKER_NEEDED
, &vha
->dpc_flags
)));
4776 /**************************************************************************
4782 * Context: Interrupt
4783 ***************************************************************************/
4785 qla2x00_timer(scsi_qla_host_t
*vha
)
4787 unsigned long cpu_flags
= 0;
4792 struct qla_hw_data
*ha
= vha
->hw
;
4793 struct req_que
*req
;
4795 if (ha
->flags
.eeh_busy
) {
4796 ql_dbg(ql_dbg_timer
, vha
, 0x6000,
4797 "EEH = %d, restarting timer.\n",
4798 ha
->flags
.eeh_busy
);
4799 qla2x00_restart_timer(vha
, WATCH_INTERVAL
);
4803 /* Hardware read to raise pending EEH errors during mailbox waits. */
4804 if (!pci_channel_offline(ha
->pdev
))
4805 pci_read_config_word(ha
->pdev
, PCI_VENDOR_ID
, &w
);
4807 /* Make sure qla82xx_watchdog is run only for physical port */
4808 if (!vha
->vp_idx
&& IS_QLA82XX(ha
)) {
4809 if (test_bit(ISP_QUIESCE_NEEDED
, &vha
->dpc_flags
))
4811 qla82xx_watchdog(vha
);
4814 /* Loop down handler. */
4815 if (atomic_read(&vha
->loop_down_timer
) > 0 &&
4816 !(test_bit(ABORT_ISP_ACTIVE
, &vha
->dpc_flags
)) &&
4817 !(test_bit(FCOE_CTX_RESET_NEEDED
, &vha
->dpc_flags
))
4818 && vha
->flags
.online
) {
4820 if (atomic_read(&vha
->loop_down_timer
) ==
4821 vha
->loop_down_abort_time
) {
4823 ql_log(ql_log_info
, vha
, 0x6008,
4824 "Loop down - aborting the queues before time expires.\n");
4826 if (!IS_QLA2100(ha
) && vha
->link_down_timeout
)
4827 atomic_set(&vha
->loop_state
, LOOP_DEAD
);
4830 * Schedule an ISP abort to return any FCP2-device
4833 /* NPIV - scan physical port only */
4835 spin_lock_irqsave(&ha
->hardware_lock
,
4837 req
= ha
->req_q_map
[0];
4839 index
< req
->num_outstanding_cmds
;
4843 sp
= req
->outstanding_cmds
[index
];
4846 if (sp
->type
!= SRB_SCSI_CMD
)
4849 if (!(sfcp
->flags
& FCF_FCP2_DEVICE
))
4853 set_bit(FCOE_CTX_RESET_NEEDED
,
4856 set_bit(ISP_ABORT_NEEDED
,
4860 spin_unlock_irqrestore(&ha
->hardware_lock
,
4866 /* if the loop has been down for 4 minutes, reinit adapter */
4867 if (atomic_dec_and_test(&vha
->loop_down_timer
) != 0) {
4868 if (!(vha
->device_flags
& DFLG_NO_CABLE
)) {
4869 ql_log(ql_log_warn
, vha
, 0x6009,
4870 "Loop down - aborting ISP.\n");
4873 set_bit(FCOE_CTX_RESET_NEEDED
,
4876 set_bit(ISP_ABORT_NEEDED
,
4880 ql_dbg(ql_dbg_timer
, vha
, 0x600a,
4881 "Loop down - seconds remaining %d.\n",
4882 atomic_read(&vha
->loop_down_timer
));
4885 /* Check if beacon LED needs to be blinked for physical host only */
4886 if (!vha
->vp_idx
&& (ha
->beacon_blink_led
== 1)) {
4887 /* There is no beacon_blink function for ISP82xx */
4888 if (!IS_QLA82XX(ha
)) {
4889 set_bit(BEACON_BLINK_NEEDED
, &vha
->dpc_flags
);
4894 /* Process any deferred work. */
4895 if (!list_empty(&vha
->work_list
))
4898 /* Schedule the DPC routine if needed */
4899 if ((test_bit(ISP_ABORT_NEEDED
, &vha
->dpc_flags
) ||
4900 test_bit(LOOP_RESYNC_NEEDED
, &vha
->dpc_flags
) ||
4901 test_bit(FCPORT_UPDATE_NEEDED
, &vha
->dpc_flags
) ||
4903 test_bit(RESET_MARKER_NEEDED
, &vha
->dpc_flags
) ||
4904 test_bit(BEACON_BLINK_NEEDED
, &vha
->dpc_flags
) ||
4905 test_bit(ISP_UNRECOVERABLE
, &vha
->dpc_flags
) ||
4906 test_bit(FCOE_CTX_RESET_NEEDED
, &vha
->dpc_flags
) ||
4907 test_bit(VP_DPC_NEEDED
, &vha
->dpc_flags
) ||
4908 test_bit(RELOGIN_NEEDED
, &vha
->dpc_flags
) ||
4909 test_bit(HOST_RAMP_DOWN_QUEUE_DEPTH
, &vha
->dpc_flags
) ||
4910 test_bit(HOST_RAMP_UP_QUEUE_DEPTH
, &vha
->dpc_flags
))) {
4911 ql_dbg(ql_dbg_timer
, vha
, 0x600b,
4912 "isp_abort_needed=%d loop_resync_needed=%d "
4913 "fcport_update_needed=%d start_dpc=%d "
4914 "reset_marker_needed=%d",
4915 test_bit(ISP_ABORT_NEEDED
, &vha
->dpc_flags
),
4916 test_bit(LOOP_RESYNC_NEEDED
, &vha
->dpc_flags
),
4917 test_bit(FCPORT_UPDATE_NEEDED
, &vha
->dpc_flags
),
4919 test_bit(RESET_MARKER_NEEDED
, &vha
->dpc_flags
));
4920 ql_dbg(ql_dbg_timer
, vha
, 0x600c,
4921 "beacon_blink_needed=%d isp_unrecoverable=%d "
4922 "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d "
4923 "relogin_needed=%d, host_ramp_down_needed=%d "
4924 "host_ramp_up_needed=%d.\n",
4925 test_bit(BEACON_BLINK_NEEDED
, &vha
->dpc_flags
),
4926 test_bit(ISP_UNRECOVERABLE
, &vha
->dpc_flags
),
4927 test_bit(FCOE_CTX_RESET_NEEDED
, &vha
->dpc_flags
),
4928 test_bit(VP_DPC_NEEDED
, &vha
->dpc_flags
),
4929 test_bit(RELOGIN_NEEDED
, &vha
->dpc_flags
),
4930 test_bit(HOST_RAMP_UP_QUEUE_DEPTH
, &vha
->dpc_flags
),
4931 test_bit(HOST_RAMP_DOWN_QUEUE_DEPTH
, &vha
->dpc_flags
));
4932 qla2xxx_wake_dpc(vha
);
4935 qla2x00_restart_timer(vha
, WATCH_INTERVAL
);
4938 /* Firmware interface routines. */
4941 #define FW_ISP21XX 0
4942 #define FW_ISP22XX 1
4943 #define FW_ISP2300 2
4944 #define FW_ISP2322 3
4945 #define FW_ISP24XX 4
4946 #define FW_ISP25XX 5
4947 #define FW_ISP81XX 6
4948 #define FW_ISP82XX 7
4949 #define FW_ISP2031 8
4950 #define FW_ISP8031 9
4952 #define FW_FILE_ISP21XX "ql2100_fw.bin"
4953 #define FW_FILE_ISP22XX "ql2200_fw.bin"
4954 #define FW_FILE_ISP2300 "ql2300_fw.bin"
4955 #define FW_FILE_ISP2322 "ql2322_fw.bin"
4956 #define FW_FILE_ISP24XX "ql2400_fw.bin"
4957 #define FW_FILE_ISP25XX "ql2500_fw.bin"
4958 #define FW_FILE_ISP81XX "ql8100_fw.bin"
4959 #define FW_FILE_ISP82XX "ql8200_fw.bin"
4960 #define FW_FILE_ISP2031 "ql2600_fw.bin"
4961 #define FW_FILE_ISP8031 "ql8300_fw.bin"
4963 static DEFINE_MUTEX(qla_fw_lock
);
4965 static struct fw_blob qla_fw_blobs
[FW_BLOBS
] = {
4966 { .name
= FW_FILE_ISP21XX
, .segs
= { 0x1000, 0 }, },
4967 { .name
= FW_FILE_ISP22XX
, .segs
= { 0x1000, 0 }, },
4968 { .name
= FW_FILE_ISP2300
, .segs
= { 0x800, 0 }, },
4969 { .name
= FW_FILE_ISP2322
, .segs
= { 0x800, 0x1c000, 0x1e000, 0 }, },
4970 { .name
= FW_FILE_ISP24XX
, },
4971 { .name
= FW_FILE_ISP25XX
, },
4972 { .name
= FW_FILE_ISP81XX
, },
4973 { .name
= FW_FILE_ISP82XX
, },
4974 { .name
= FW_FILE_ISP2031
, },
4975 { .name
= FW_FILE_ISP8031
, },
4979 qla2x00_request_firmware(scsi_qla_host_t
*vha
)
4981 struct qla_hw_data
*ha
= vha
->hw
;
4982 struct fw_blob
*blob
;
4984 if (IS_QLA2100(ha
)) {
4985 blob
= &qla_fw_blobs
[FW_ISP21XX
];
4986 } else if (IS_QLA2200(ha
)) {
4987 blob
= &qla_fw_blobs
[FW_ISP22XX
];
4988 } else if (IS_QLA2300(ha
) || IS_QLA2312(ha
) || IS_QLA6312(ha
)) {
4989 blob
= &qla_fw_blobs
[FW_ISP2300
];
4990 } else if (IS_QLA2322(ha
) || IS_QLA6322(ha
)) {
4991 blob
= &qla_fw_blobs
[FW_ISP2322
];
4992 } else if (IS_QLA24XX_TYPE(ha
)) {
4993 blob
= &qla_fw_blobs
[FW_ISP24XX
];
4994 } else if (IS_QLA25XX(ha
)) {
4995 blob
= &qla_fw_blobs
[FW_ISP25XX
];
4996 } else if (IS_QLA81XX(ha
)) {
4997 blob
= &qla_fw_blobs
[FW_ISP81XX
];
4998 } else if (IS_QLA82XX(ha
)) {
4999 blob
= &qla_fw_blobs
[FW_ISP82XX
];
5000 } else if (IS_QLA2031(ha
)) {
5001 blob
= &qla_fw_blobs
[FW_ISP2031
];
5002 } else if (IS_QLA8031(ha
)) {
5003 blob
= &qla_fw_blobs
[FW_ISP8031
];
5008 mutex_lock(&qla_fw_lock
);
5012 if (request_firmware(&blob
->fw
, blob
->name
, &ha
->pdev
->dev
)) {
5013 ql_log(ql_log_warn
, vha
, 0x0063,
5014 "Failed to load firmware image (%s).\n", blob
->name
);
5021 mutex_unlock(&qla_fw_lock
);
5026 qla2x00_release_firmware(void)
5030 mutex_lock(&qla_fw_lock
);
5031 for (idx
= 0; idx
< FW_BLOBS
; idx
++)
5032 release_firmware(qla_fw_blobs
[idx
].fw
);
5033 mutex_unlock(&qla_fw_lock
);
5036 static pci_ers_result_t
5037 qla2xxx_pci_error_detected(struct pci_dev
*pdev
, pci_channel_state_t state
)
5039 scsi_qla_host_t
*vha
= pci_get_drvdata(pdev
);
5040 struct qla_hw_data
*ha
= vha
->hw
;
5042 ql_dbg(ql_dbg_aer
, vha
, 0x9000,
5043 "PCI error detected, state %x.\n", state
);
5046 case pci_channel_io_normal
:
5047 ha
->flags
.eeh_busy
= 0;
5048 return PCI_ERS_RESULT_CAN_RECOVER
;
5049 case pci_channel_io_frozen
:
5050 ha
->flags
.eeh_busy
= 1;
5051 /* For ISP82XX complete any pending mailbox cmd */
5052 if (IS_QLA82XX(ha
)) {
5053 ha
->flags
.isp82xx_fw_hung
= 1;
5054 ql_dbg(ql_dbg_aer
, vha
, 0x9001, "Pci channel io frozen\n");
5055 qla82xx_clear_pending_mbx(vha
);
5057 qla2x00_free_irqs(vha
);
5058 pci_disable_device(pdev
);
5059 /* Return back all IOs */
5060 qla2x00_abort_all_cmds(vha
, DID_RESET
<< 16);
5061 return PCI_ERS_RESULT_NEED_RESET
;
5062 case pci_channel_io_perm_failure
:
5063 ha
->flags
.pci_channel_io_perm_failure
= 1;
5064 qla2x00_abort_all_cmds(vha
, DID_NO_CONNECT
<< 16);
5065 return PCI_ERS_RESULT_DISCONNECT
;
5067 return PCI_ERS_RESULT_NEED_RESET
;
5070 static pci_ers_result_t
5071 qla2xxx_pci_mmio_enabled(struct pci_dev
*pdev
)
5073 int risc_paused
= 0;
5075 unsigned long flags
;
5076 scsi_qla_host_t
*base_vha
= pci_get_drvdata(pdev
);
5077 struct qla_hw_data
*ha
= base_vha
->hw
;
5078 struct device_reg_2xxx __iomem
*reg
= &ha
->iobase
->isp
;
5079 struct device_reg_24xx __iomem
*reg24
= &ha
->iobase
->isp24
;
5082 return PCI_ERS_RESULT_RECOVERED
;
5084 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
5085 if (IS_QLA2100(ha
) || IS_QLA2200(ha
)){
5086 stat
= RD_REG_DWORD(®
->hccr
);
5087 if (stat
& HCCR_RISC_PAUSE
)
5089 } else if (IS_QLA23XX(ha
)) {
5090 stat
= RD_REG_DWORD(®
->u
.isp2300
.host_status
);
5091 if (stat
& HSR_RISC_PAUSED
)
5093 } else if (IS_FWI2_CAPABLE(ha
)) {
5094 stat
= RD_REG_DWORD(®24
->host_status
);
5095 if (stat
& HSRX_RISC_PAUSED
)
5098 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
5101 ql_log(ql_log_info
, base_vha
, 0x9003,
5102 "RISC paused -- mmio_enabled, Dumping firmware.\n");
5103 ha
->isp_ops
->fw_dump(base_vha
, 0);
5105 return PCI_ERS_RESULT_NEED_RESET
;
5107 return PCI_ERS_RESULT_RECOVERED
;
5111 qla82xx_error_recovery(scsi_qla_host_t
*base_vha
)
5113 uint32_t rval
= QLA_FUNCTION_FAILED
;
5114 uint32_t drv_active
= 0;
5115 struct qla_hw_data
*ha
= base_vha
->hw
;
5117 struct pci_dev
*other_pdev
= NULL
;
5119 ql_dbg(ql_dbg_aer
, base_vha
, 0x9006,
5120 "Entered %s.\n", __func__
);
5122 set_bit(ABORT_ISP_ACTIVE
, &base_vha
->dpc_flags
);
5124 if (base_vha
->flags
.online
) {
5125 /* Abort all outstanding commands,
5126 * so as to be requeued later */
5127 qla2x00_abort_isp_cleanup(base_vha
);
5131 fn
= PCI_FUNC(ha
->pdev
->devfn
);
5134 ql_dbg(ql_dbg_aer
, base_vha
, 0x9007,
5135 "Finding pci device at function = 0x%x.\n", fn
);
5137 pci_get_domain_bus_and_slot(pci_domain_nr(ha
->pdev
->bus
),
5138 ha
->pdev
->bus
->number
, PCI_DEVFN(PCI_SLOT(ha
->pdev
->devfn
),
5143 if (atomic_read(&other_pdev
->enable_cnt
)) {
5144 ql_dbg(ql_dbg_aer
, base_vha
, 0x9008,
5145 "Found PCI func available and enable at 0x%x.\n",
5147 pci_dev_put(other_pdev
);
5150 pci_dev_put(other_pdev
);
5155 ql_dbg(ql_dbg_aer
, base_vha
, 0x9009,
5156 "This devfn is reset owner = 0x%x.\n",
5158 qla82xx_idc_lock(ha
);
5160 qla82xx_wr_32(ha
, QLA82XX_CRB_DEV_STATE
,
5161 QLA8XXX_DEV_INITIALIZING
);
5163 qla82xx_wr_32(ha
, QLA82XX_CRB_DRV_IDC_VERSION
,
5164 QLA82XX_IDC_VERSION
);
5166 drv_active
= qla82xx_rd_32(ha
, QLA82XX_CRB_DRV_ACTIVE
);
5167 ql_dbg(ql_dbg_aer
, base_vha
, 0x900a,
5168 "drv_active = 0x%x.\n", drv_active
);
5170 qla82xx_idc_unlock(ha
);
5171 /* Reset if device is not already reset
5172 * drv_active would be 0 if a reset has already been done
5175 rval
= qla82xx_start_firmware(base_vha
);
5178 qla82xx_idc_lock(ha
);
5180 if (rval
!= QLA_SUCCESS
) {
5181 ql_log(ql_log_info
, base_vha
, 0x900b,
5182 "HW State: FAILED.\n");
5183 qla82xx_clear_drv_active(ha
);
5184 qla82xx_wr_32(ha
, QLA82XX_CRB_DEV_STATE
,
5185 QLA8XXX_DEV_FAILED
);
5187 ql_log(ql_log_info
, base_vha
, 0x900c,
5188 "HW State: READY.\n");
5189 qla82xx_wr_32(ha
, QLA82XX_CRB_DEV_STATE
,
5191 qla82xx_idc_unlock(ha
);
5192 ha
->flags
.isp82xx_fw_hung
= 0;
5193 rval
= qla82xx_restart_isp(base_vha
);
5194 qla82xx_idc_lock(ha
);
5195 /* Clear driver state register */
5196 qla82xx_wr_32(ha
, QLA82XX_CRB_DRV_STATE
, 0);
5197 qla82xx_set_drv_active(base_vha
);
5199 qla82xx_idc_unlock(ha
);
5201 ql_dbg(ql_dbg_aer
, base_vha
, 0x900d,
5202 "This devfn is not reset owner = 0x%x.\n",
5204 if ((qla82xx_rd_32(ha
, QLA82XX_CRB_DEV_STATE
) ==
5205 QLA8XXX_DEV_READY
)) {
5206 ha
->flags
.isp82xx_fw_hung
= 0;
5207 rval
= qla82xx_restart_isp(base_vha
);
5208 qla82xx_idc_lock(ha
);
5209 qla82xx_set_drv_active(base_vha
);
5210 qla82xx_idc_unlock(ha
);
5213 clear_bit(ABORT_ISP_ACTIVE
, &base_vha
->dpc_flags
);
5218 static pci_ers_result_t
5219 qla2xxx_pci_slot_reset(struct pci_dev
*pdev
)
5221 pci_ers_result_t ret
= PCI_ERS_RESULT_DISCONNECT
;
5222 scsi_qla_host_t
*base_vha
= pci_get_drvdata(pdev
);
5223 struct qla_hw_data
*ha
= base_vha
->hw
;
5224 struct rsp_que
*rsp
;
5225 int rc
, retries
= 10;
5227 ql_dbg(ql_dbg_aer
, base_vha
, 0x9004,
5230 /* Workaround: qla2xxx driver which access hardware earlier
5231 * needs error state to be pci_channel_io_online.
5232 * Otherwise mailbox command timesout.
5234 pdev
->error_state
= pci_channel_io_normal
;
5236 pci_restore_state(pdev
);
5238 /* pci_restore_state() clears the saved_state flag of the device
5239 * save restored state which resets saved_state flag
5241 pci_save_state(pdev
);
5244 rc
= pci_enable_device_mem(pdev
);
5246 rc
= pci_enable_device(pdev
);
5249 ql_log(ql_log_warn
, base_vha
, 0x9005,
5250 "Can't re-enable PCI device after reset.\n");
5251 goto exit_slot_reset
;
5254 rsp
= ha
->rsp_q_map
[0];
5255 if (qla2x00_request_irqs(ha
, rsp
))
5256 goto exit_slot_reset
;
5258 if (ha
->isp_ops
->pci_config(base_vha
))
5259 goto exit_slot_reset
;
5261 if (IS_QLA82XX(ha
)) {
5262 if (qla82xx_error_recovery(base_vha
) == QLA_SUCCESS
) {
5263 ret
= PCI_ERS_RESULT_RECOVERED
;
5264 goto exit_slot_reset
;
5266 goto exit_slot_reset
;
5269 while (ha
->flags
.mbox_busy
&& retries
--)
5272 set_bit(ABORT_ISP_ACTIVE
, &base_vha
->dpc_flags
);
5273 if (ha
->isp_ops
->abort_isp(base_vha
) == QLA_SUCCESS
)
5274 ret
= PCI_ERS_RESULT_RECOVERED
;
5275 clear_bit(ABORT_ISP_ACTIVE
, &base_vha
->dpc_flags
);
5279 ql_dbg(ql_dbg_aer
, base_vha
, 0x900e,
5280 "slot_reset return %x.\n", ret
);
5286 qla2xxx_pci_resume(struct pci_dev
*pdev
)
5288 scsi_qla_host_t
*base_vha
= pci_get_drvdata(pdev
);
5289 struct qla_hw_data
*ha
= base_vha
->hw
;
5292 ql_dbg(ql_dbg_aer
, base_vha
, 0x900f,
5295 ret
= qla2x00_wait_for_hba_online(base_vha
);
5296 if (ret
!= QLA_SUCCESS
) {
5297 ql_log(ql_log_fatal
, base_vha
, 0x9002,
5298 "The device failed to resume I/O from slot/link_reset.\n");
5301 pci_cleanup_aer_uncorrect_error_status(pdev
);
5303 ha
->flags
.eeh_busy
= 0;
5306 static const struct pci_error_handlers qla2xxx_err_handler
= {
5307 .error_detected
= qla2xxx_pci_error_detected
,
5308 .mmio_enabled
= qla2xxx_pci_mmio_enabled
,
5309 .slot_reset
= qla2xxx_pci_slot_reset
,
5310 .resume
= qla2xxx_pci_resume
,
5313 static struct pci_device_id qla2xxx_pci_tbl
[] = {
5314 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2100
) },
5315 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2200
) },
5316 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2300
) },
5317 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2312
) },
5318 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2322
) },
5319 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP6312
) },
5320 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP6322
) },
5321 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2422
) },
5322 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2432
) },
5323 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP8432
) },
5324 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP5422
) },
5325 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP5432
) },
5326 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2532
) },
5327 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2031
) },
5328 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP8001
) },
5329 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP8021
) },
5330 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP8031
) },
5333 MODULE_DEVICE_TABLE(pci
, qla2xxx_pci_tbl
);
5335 static struct pci_driver qla2xxx_pci_driver
= {
5336 .name
= QLA2XXX_DRIVER_NAME
,
5338 .owner
= THIS_MODULE
,
5340 .id_table
= qla2xxx_pci_tbl
,
5341 .probe
= qla2x00_probe_one
,
5342 .remove
= qla2x00_remove_one
,
5343 .shutdown
= qla2x00_shutdown
,
5344 .err_handler
= &qla2xxx_err_handler
,
5347 static struct file_operations apidev_fops
= {
5348 .owner
= THIS_MODULE
,
5349 .llseek
= noop_llseek
,
5353 * qla2x00_module_init - Module initialization.
5356 qla2x00_module_init(void)
5360 /* Allocate cache for SRBs. */
5361 srb_cachep
= kmem_cache_create("qla2xxx_srbs", sizeof(srb_t
), 0,
5362 SLAB_HWCACHE_ALIGN
, NULL
);
5363 if (srb_cachep
== NULL
) {
5364 ql_log(ql_log_fatal
, NULL
, 0x0001,
5365 "Unable to allocate SRB cache...Failing load!.\n");
5369 /* Initialize target kmem_cache and mem_pools */
5372 kmem_cache_destroy(srb_cachep
);
5374 } else if (ret
> 0) {
5376 * If initiator mode is explictly disabled by qlt_init(),
5377 * prevent scsi_transport_fc.c:fc_scsi_scan_rport() from
5378 * performing scsi_scan_target() during LOOP UP event.
5380 qla2xxx_transport_functions
.disable_target_scan
= 1;
5381 qla2xxx_transport_vport_functions
.disable_target_scan
= 1;
5384 /* Derive version string. */
5385 strcpy(qla2x00_version_str
, QLA2XXX_VERSION
);
5386 if (ql2xextended_error_logging
)
5387 strcat(qla2x00_version_str
, "-debug");
5389 qla2xxx_transport_template
=
5390 fc_attach_transport(&qla2xxx_transport_functions
);
5391 if (!qla2xxx_transport_template
) {
5392 kmem_cache_destroy(srb_cachep
);
5393 ql_log(ql_log_fatal
, NULL
, 0x0002,
5394 "fc_attach_transport failed...Failing load!.\n");
5399 apidev_major
= register_chrdev(0, QLA2XXX_APIDEV
, &apidev_fops
);
5400 if (apidev_major
< 0) {
5401 ql_log(ql_log_fatal
, NULL
, 0x0003,
5402 "Unable to register char device %s.\n", QLA2XXX_APIDEV
);
5405 qla2xxx_transport_vport_template
=
5406 fc_attach_transport(&qla2xxx_transport_vport_functions
);
5407 if (!qla2xxx_transport_vport_template
) {
5408 kmem_cache_destroy(srb_cachep
);
5410 fc_release_transport(qla2xxx_transport_template
);
5411 ql_log(ql_log_fatal
, NULL
, 0x0004,
5412 "fc_attach_transport vport failed...Failing load!.\n");
5415 ql_log(ql_log_info
, NULL
, 0x0005,
5416 "QLogic Fibre Channel HBA Driver: %s.\n",
5417 qla2x00_version_str
);
5418 ret
= pci_register_driver(&qla2xxx_pci_driver
);
5420 kmem_cache_destroy(srb_cachep
);
5422 fc_release_transport(qla2xxx_transport_template
);
5423 fc_release_transport(qla2xxx_transport_vport_template
);
5424 ql_log(ql_log_fatal
, NULL
, 0x0006,
5425 "pci_register_driver failed...ret=%d Failing load!.\n",
5432 * qla2x00_module_exit - Module cleanup.
5435 qla2x00_module_exit(void)
5437 unregister_chrdev(apidev_major
, QLA2XXX_APIDEV
);
5438 pci_unregister_driver(&qla2xxx_pci_driver
);
5439 qla2x00_release_firmware();
5440 kmem_cache_destroy(srb_cachep
);
5443 kmem_cache_destroy(ctx_cachep
);
5444 fc_release_transport(qla2xxx_transport_template
);
5445 fc_release_transport(qla2xxx_transport_vport_template
);
5448 module_init(qla2x00_module_init
);
5449 module_exit(qla2x00_module_exit
);
5451 MODULE_AUTHOR("QLogic Corporation");
5452 MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
5453 MODULE_LICENSE("GPL");
5454 MODULE_VERSION(QLA2XXX_VERSION
);
5455 MODULE_FIRMWARE(FW_FILE_ISP21XX
);
5456 MODULE_FIRMWARE(FW_FILE_ISP22XX
);
5457 MODULE_FIRMWARE(FW_FILE_ISP2300
);
5458 MODULE_FIRMWARE(FW_FILE_ISP2322
);
5459 MODULE_FIRMWARE(FW_FILE_ISP24XX
);
5460 MODULE_FIRMWARE(FW_FILE_ISP25XX
);