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[deliverable/linux.git] / drivers / scsi / sata_nv.c
1 /*
2 * sata_nv.c - NVIDIA nForce SATA
3 *
4 * Copyright 2004 NVIDIA Corp. All rights reserved.
5 * Copyright 2004 Andrew Chew
6 *
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2, or (at your option)
11 * any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; see the file COPYING. If not, write to
20 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
21 *
22 *
23 * libata documentation is available via 'make {ps|pdf}docs',
24 * as Documentation/DocBook/libata.*
25 *
26 * No hardware documentation available outside of NVIDIA.
27 * This driver programs the NVIDIA SATA controller in a similar
28 * fashion as with other PCI IDE BMDMA controllers, with a few
29 * NV-specific details such as register offsets, SATA phy location,
30 * hotplug info, etc.
31 *
32 * 0.10
33 * - Fixed spurious interrupts issue seen with the Maxtor 6H500F0 500GB
34 * drive. Also made the check_hotplug() callbacks return whether there
35 * was a hotplug interrupt or not. This was not the source of the
36 * spurious interrupts, but is the right thing to do anyway.
37 *
38 * 0.09
39 * - Fixed bug introduced by 0.08's MCP51 and MCP55 support.
40 *
41 * 0.08
42 * - Added support for MCP51 and MCP55.
43 *
44 * 0.07
45 * - Added support for RAID class code.
46 *
47 * 0.06
48 * - Added generic SATA support by using a pci_device_id that filters on
49 * the IDE storage class code.
50 *
51 * 0.03
52 * - Fixed a bug where the hotplug handlers for non-CK804/MCP04 were using
53 * mmio_base, which is only set for the CK804/MCP04 case.
54 *
55 * 0.02
56 * - Added support for CK804 SATA controller.
57 *
58 * 0.01
59 * - Initial revision.
60 */
61
62 #include <linux/config.h>
63 #include <linux/kernel.h>
64 #include <linux/module.h>
65 #include <linux/pci.h>
66 #include <linux/init.h>
67 #include <linux/blkdev.h>
68 #include <linux/delay.h>
69 #include <linux/interrupt.h>
70 #include <linux/device.h>
71 #include <scsi/scsi_host.h>
72 #include <linux/libata.h>
73
74 #define DRV_NAME "sata_nv"
75 #define DRV_VERSION "0.8"
76
77 #define NV_PORTS 2
78 #define NV_PIO_MASK 0x1f
79 #define NV_MWDMA_MASK 0x07
80 #define NV_UDMA_MASK 0x7f
81 #define NV_PORT0_SCR_REG_OFFSET 0x00
82 #define NV_PORT1_SCR_REG_OFFSET 0x40
83
84 #define NV_INT_STATUS 0x10
85 #define NV_INT_STATUS_CK804 0x440
86 #define NV_INT_STATUS_PDEV_INT 0x01
87 #define NV_INT_STATUS_PDEV_PM 0x02
88 #define NV_INT_STATUS_PDEV_ADDED 0x04
89 #define NV_INT_STATUS_PDEV_REMOVED 0x08
90 #define NV_INT_STATUS_SDEV_INT 0x10
91 #define NV_INT_STATUS_SDEV_PM 0x20
92 #define NV_INT_STATUS_SDEV_ADDED 0x40
93 #define NV_INT_STATUS_SDEV_REMOVED 0x80
94 #define NV_INT_STATUS_PDEV_HOTPLUG (NV_INT_STATUS_PDEV_ADDED | \
95 NV_INT_STATUS_PDEV_REMOVED)
96 #define NV_INT_STATUS_SDEV_HOTPLUG (NV_INT_STATUS_SDEV_ADDED | \
97 NV_INT_STATUS_SDEV_REMOVED)
98 #define NV_INT_STATUS_HOTPLUG (NV_INT_STATUS_PDEV_HOTPLUG | \
99 NV_INT_STATUS_SDEV_HOTPLUG)
100
101 #define NV_INT_ENABLE 0x11
102 #define NV_INT_ENABLE_CK804 0x441
103 #define NV_INT_ENABLE_PDEV_MASK 0x01
104 #define NV_INT_ENABLE_PDEV_PM 0x02
105 #define NV_INT_ENABLE_PDEV_ADDED 0x04
106 #define NV_INT_ENABLE_PDEV_REMOVED 0x08
107 #define NV_INT_ENABLE_SDEV_MASK 0x10
108 #define NV_INT_ENABLE_SDEV_PM 0x20
109 #define NV_INT_ENABLE_SDEV_ADDED 0x40
110 #define NV_INT_ENABLE_SDEV_REMOVED 0x80
111 #define NV_INT_ENABLE_PDEV_HOTPLUG (NV_INT_ENABLE_PDEV_ADDED | \
112 NV_INT_ENABLE_PDEV_REMOVED)
113 #define NV_INT_ENABLE_SDEV_HOTPLUG (NV_INT_ENABLE_SDEV_ADDED | \
114 NV_INT_ENABLE_SDEV_REMOVED)
115 #define NV_INT_ENABLE_HOTPLUG (NV_INT_ENABLE_PDEV_HOTPLUG | \
116 NV_INT_ENABLE_SDEV_HOTPLUG)
117
118 #define NV_INT_CONFIG 0x12
119 #define NV_INT_CONFIG_METHD 0x01 // 0 = INT, 1 = SMI
120
121 // For PCI config register 20
122 #define NV_MCP_SATA_CFG_20 0x50
123 #define NV_MCP_SATA_CFG_20_SATA_SPACE_EN 0x04
124
125 static int nv_init_one (struct pci_dev *pdev, const struct pci_device_id *ent);
126 static irqreturn_t nv_interrupt (int irq, void *dev_instance,
127 struct pt_regs *regs);
128 static u32 nv_scr_read (struct ata_port *ap, unsigned int sc_reg);
129 static void nv_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val);
130 static void nv_host_stop (struct ata_host_set *host_set);
131 static void nv_enable_hotplug(struct ata_probe_ent *probe_ent);
132 static void nv_disable_hotplug(struct ata_host_set *host_set);
133 static int nv_check_hotplug(struct ata_host_set *host_set);
134 static void nv_enable_hotplug_ck804(struct ata_probe_ent *probe_ent);
135 static void nv_disable_hotplug_ck804(struct ata_host_set *host_set);
136 static int nv_check_hotplug_ck804(struct ata_host_set *host_set);
137
138 enum nv_host_type
139 {
140 GENERIC,
141 NFORCE2,
142 NFORCE3,
143 CK804
144 };
145
146 static const struct pci_device_id nv_pci_tbl[] = {
147 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_SATA,
148 PCI_ANY_ID, PCI_ANY_ID, 0, 0, NFORCE2 },
149 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA,
150 PCI_ANY_ID, PCI_ANY_ID, 0, 0, NFORCE3 },
151 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA2,
152 PCI_ANY_ID, PCI_ANY_ID, 0, 0, NFORCE3 },
153 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_SATA,
154 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CK804 },
155 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_SATA2,
156 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CK804 },
157 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SATA,
158 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CK804 },
159 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SATA2,
160 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CK804 },
161 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SATA,
162 PCI_ANY_ID, PCI_ANY_ID, 0, 0, GENERIC },
163 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SATA2,
164 PCI_ANY_ID, PCI_ANY_ID, 0, 0, GENERIC },
165 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SATA,
166 PCI_ANY_ID, PCI_ANY_ID, 0, 0, GENERIC },
167 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SATA2,
168 PCI_ANY_ID, PCI_ANY_ID, 0, 0, GENERIC },
169 { PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID,
170 PCI_ANY_ID, PCI_ANY_ID,
171 PCI_CLASS_STORAGE_IDE<<8, 0xffff00, GENERIC },
172 { PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID,
173 PCI_ANY_ID, PCI_ANY_ID,
174 PCI_CLASS_STORAGE_RAID<<8, 0xffff00, GENERIC },
175 { 0, } /* terminate list */
176 };
177
178 #define NV_HOST_FLAGS_SCR_MMIO 0x00000001
179
180 struct nv_host_desc
181 {
182 enum nv_host_type host_type;
183 void (*enable_hotplug)(struct ata_probe_ent *probe_ent);
184 void (*disable_hotplug)(struct ata_host_set *host_set);
185 int (*check_hotplug)(struct ata_host_set *host_set);
186
187 };
188 static struct nv_host_desc nv_device_tbl[] = {
189 {
190 .host_type = GENERIC,
191 .enable_hotplug = NULL,
192 .disable_hotplug= NULL,
193 .check_hotplug = NULL,
194 },
195 {
196 .host_type = NFORCE2,
197 .enable_hotplug = nv_enable_hotplug,
198 .disable_hotplug= nv_disable_hotplug,
199 .check_hotplug = nv_check_hotplug,
200 },
201 {
202 .host_type = NFORCE3,
203 .enable_hotplug = nv_enable_hotplug,
204 .disable_hotplug= nv_disable_hotplug,
205 .check_hotplug = nv_check_hotplug,
206 },
207 { .host_type = CK804,
208 .enable_hotplug = nv_enable_hotplug_ck804,
209 .disable_hotplug= nv_disable_hotplug_ck804,
210 .check_hotplug = nv_check_hotplug_ck804,
211 },
212 };
213
214 struct nv_host
215 {
216 struct nv_host_desc *host_desc;
217 unsigned long host_flags;
218 };
219
220 static struct pci_driver nv_pci_driver = {
221 .name = DRV_NAME,
222 .id_table = nv_pci_tbl,
223 .probe = nv_init_one,
224 .remove = ata_pci_remove_one,
225 };
226
227 static struct scsi_host_template nv_sht = {
228 .module = THIS_MODULE,
229 .name = DRV_NAME,
230 .ioctl = ata_scsi_ioctl,
231 .queuecommand = ata_scsi_queuecmd,
232 .eh_timed_out = ata_scsi_timed_out,
233 .eh_strategy_handler = ata_scsi_error,
234 .can_queue = ATA_DEF_QUEUE,
235 .this_id = ATA_SHT_THIS_ID,
236 .sg_tablesize = LIBATA_MAX_PRD,
237 .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
238 .emulated = ATA_SHT_EMULATED,
239 .use_clustering = ATA_SHT_USE_CLUSTERING,
240 .proc_name = DRV_NAME,
241 .dma_boundary = ATA_DMA_BOUNDARY,
242 .slave_configure = ata_scsi_slave_config,
243 .bios_param = ata_std_bios_param,
244 };
245
246 static const struct ata_port_operations nv_ops = {
247 .port_disable = ata_port_disable,
248 .tf_load = ata_tf_load,
249 .tf_read = ata_tf_read,
250 .exec_command = ata_exec_command,
251 .check_status = ata_check_status,
252 .dev_select = ata_std_dev_select,
253 .phy_reset = sata_phy_reset,
254 .bmdma_setup = ata_bmdma_setup,
255 .bmdma_start = ata_bmdma_start,
256 .bmdma_stop = ata_bmdma_stop,
257 .bmdma_status = ata_bmdma_status,
258 .qc_prep = ata_qc_prep,
259 .qc_issue = ata_qc_issue_prot,
260 .eng_timeout = ata_eng_timeout,
261 .irq_handler = nv_interrupt,
262 .irq_clear = ata_bmdma_irq_clear,
263 .scr_read = nv_scr_read,
264 .scr_write = nv_scr_write,
265 .port_start = ata_port_start,
266 .port_stop = ata_port_stop,
267 .host_stop = nv_host_stop,
268 };
269
270 /* FIXME: The hardware provides the necessary SATA PHY controls
271 * to support ATA_FLAG_SATA_RESET. However, it is currently
272 * necessary to disable that flag, to solve misdetection problems.
273 * See http://bugme.osdl.org/show_bug.cgi?id=3352 for more info.
274 *
275 * This problem really needs to be investigated further. But in the
276 * meantime, we avoid ATA_FLAG_SATA_RESET to get people working.
277 */
278 static struct ata_port_info nv_port_info = {
279 .sht = &nv_sht,
280 .host_flags = ATA_FLAG_SATA |
281 /* ATA_FLAG_SATA_RESET | */
282 ATA_FLAG_SRST |
283 ATA_FLAG_NO_LEGACY,
284 .pio_mask = NV_PIO_MASK,
285 .mwdma_mask = NV_MWDMA_MASK,
286 .udma_mask = NV_UDMA_MASK,
287 .port_ops = &nv_ops,
288 };
289
290 MODULE_AUTHOR("NVIDIA");
291 MODULE_DESCRIPTION("low-level driver for NVIDIA nForce SATA controller");
292 MODULE_LICENSE("GPL");
293 MODULE_DEVICE_TABLE(pci, nv_pci_tbl);
294 MODULE_VERSION(DRV_VERSION);
295
296 static irqreturn_t nv_interrupt (int irq, void *dev_instance,
297 struct pt_regs *regs)
298 {
299 struct ata_host_set *host_set = dev_instance;
300 struct nv_host *host = host_set->private_data;
301 unsigned int i;
302 unsigned int handled = 0;
303 unsigned long flags;
304
305 spin_lock_irqsave(&host_set->lock, flags);
306
307 for (i = 0; i < host_set->n_ports; i++) {
308 struct ata_port *ap;
309
310 ap = host_set->ports[i];
311 if (ap &&
312 !(ap->flags & ATA_FLAG_PORT_DISABLED)) {
313 struct ata_queued_cmd *qc;
314
315 qc = ata_qc_from_tag(ap, ap->active_tag);
316 if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)))
317 handled += ata_host_intr(ap, qc);
318 else
319 // No request pending? Clear interrupt status
320 // anyway, in case there's one pending.
321 ap->ops->check_status(ap);
322 }
323
324 }
325
326 if (host->host_desc->check_hotplug)
327 handled += host->host_desc->check_hotplug(host_set);
328
329 spin_unlock_irqrestore(&host_set->lock, flags);
330
331 return IRQ_RETVAL(handled);
332 }
333
334 static u32 nv_scr_read (struct ata_port *ap, unsigned int sc_reg)
335 {
336 struct ata_host_set *host_set = ap->host_set;
337 struct nv_host *host = host_set->private_data;
338
339 if (sc_reg > SCR_CONTROL)
340 return 0xffffffffU;
341
342 if (host->host_flags & NV_HOST_FLAGS_SCR_MMIO)
343 return readl((void __iomem *)ap->ioaddr.scr_addr + (sc_reg * 4));
344 else
345 return inl(ap->ioaddr.scr_addr + (sc_reg * 4));
346 }
347
348 static void nv_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val)
349 {
350 struct ata_host_set *host_set = ap->host_set;
351 struct nv_host *host = host_set->private_data;
352
353 if (sc_reg > SCR_CONTROL)
354 return;
355
356 if (host->host_flags & NV_HOST_FLAGS_SCR_MMIO)
357 writel(val, (void __iomem *)ap->ioaddr.scr_addr + (sc_reg * 4));
358 else
359 outl(val, ap->ioaddr.scr_addr + (sc_reg * 4));
360 }
361
362 static void nv_host_stop (struct ata_host_set *host_set)
363 {
364 struct nv_host *host = host_set->private_data;
365 struct pci_dev *pdev = to_pci_dev(host_set->dev);
366
367 // Disable hotplug event interrupts.
368 if (host->host_desc->disable_hotplug)
369 host->host_desc->disable_hotplug(host_set);
370
371 kfree(host);
372
373 if (host_set->mmio_base)
374 pci_iounmap(pdev, host_set->mmio_base);
375 }
376
377 static int nv_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
378 {
379 static int printed_version = 0;
380 struct nv_host *host;
381 struct ata_port_info *ppi;
382 struct ata_probe_ent *probe_ent;
383 int pci_dev_busy = 0;
384 int rc;
385 u32 bar;
386
387 // Make sure this is a SATA controller by counting the number of bars
388 // (NVIDIA SATA controllers will always have six bars). Otherwise,
389 // it's an IDE controller and we ignore it.
390 for (bar=0; bar<6; bar++)
391 if (pci_resource_start(pdev, bar) == 0)
392 return -ENODEV;
393
394 if (!printed_version++)
395 dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n");
396
397 rc = pci_enable_device(pdev);
398 if (rc)
399 goto err_out;
400
401 rc = pci_request_regions(pdev, DRV_NAME);
402 if (rc) {
403 pci_dev_busy = 1;
404 goto err_out_disable;
405 }
406
407 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
408 if (rc)
409 goto err_out_regions;
410 rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
411 if (rc)
412 goto err_out_regions;
413
414 rc = -ENOMEM;
415
416 ppi = &nv_port_info;
417 probe_ent = ata_pci_init_native_mode(pdev, &ppi, ATA_PORT_PRIMARY | ATA_PORT_SECONDARY);
418 if (!probe_ent)
419 goto err_out_regions;
420
421 host = kmalloc(sizeof(struct nv_host), GFP_KERNEL);
422 if (!host)
423 goto err_out_free_ent;
424
425 memset(host, 0, sizeof(struct nv_host));
426 host->host_desc = &nv_device_tbl[ent->driver_data];
427
428 probe_ent->private_data = host;
429
430 if (pci_resource_flags(pdev, 5) & IORESOURCE_MEM)
431 host->host_flags |= NV_HOST_FLAGS_SCR_MMIO;
432
433 if (host->host_flags & NV_HOST_FLAGS_SCR_MMIO) {
434 unsigned long base;
435
436 probe_ent->mmio_base = pci_iomap(pdev, 5, 0);
437 if (probe_ent->mmio_base == NULL) {
438 rc = -EIO;
439 goto err_out_free_host;
440 }
441
442 base = (unsigned long)probe_ent->mmio_base;
443
444 probe_ent->port[0].scr_addr =
445 base + NV_PORT0_SCR_REG_OFFSET;
446 probe_ent->port[1].scr_addr =
447 base + NV_PORT1_SCR_REG_OFFSET;
448 } else {
449
450 probe_ent->port[0].scr_addr =
451 pci_resource_start(pdev, 5) | NV_PORT0_SCR_REG_OFFSET;
452 probe_ent->port[1].scr_addr =
453 pci_resource_start(pdev, 5) | NV_PORT1_SCR_REG_OFFSET;
454 }
455
456 pci_set_master(pdev);
457
458 rc = ata_device_add(probe_ent);
459 if (rc != NV_PORTS)
460 goto err_out_iounmap;
461
462 // Enable hotplug event interrupts.
463 if (host->host_desc->enable_hotplug)
464 host->host_desc->enable_hotplug(probe_ent);
465
466 kfree(probe_ent);
467
468 return 0;
469
470 err_out_iounmap:
471 if (host->host_flags & NV_HOST_FLAGS_SCR_MMIO)
472 pci_iounmap(pdev, probe_ent->mmio_base);
473 err_out_free_host:
474 kfree(host);
475 err_out_free_ent:
476 kfree(probe_ent);
477 err_out_regions:
478 pci_release_regions(pdev);
479 err_out_disable:
480 if (!pci_dev_busy)
481 pci_disable_device(pdev);
482 err_out:
483 return rc;
484 }
485
486 static void nv_enable_hotplug(struct ata_probe_ent *probe_ent)
487 {
488 u8 intr_mask;
489
490 outb(NV_INT_STATUS_HOTPLUG,
491 probe_ent->port[0].scr_addr + NV_INT_STATUS);
492
493 intr_mask = inb(probe_ent->port[0].scr_addr + NV_INT_ENABLE);
494 intr_mask |= NV_INT_ENABLE_HOTPLUG;
495
496 outb(intr_mask, probe_ent->port[0].scr_addr + NV_INT_ENABLE);
497 }
498
499 static void nv_disable_hotplug(struct ata_host_set *host_set)
500 {
501 u8 intr_mask;
502
503 intr_mask = inb(host_set->ports[0]->ioaddr.scr_addr + NV_INT_ENABLE);
504
505 intr_mask &= ~(NV_INT_ENABLE_HOTPLUG);
506
507 outb(intr_mask, host_set->ports[0]->ioaddr.scr_addr + NV_INT_ENABLE);
508 }
509
510 static int nv_check_hotplug(struct ata_host_set *host_set)
511 {
512 u8 intr_status;
513
514 intr_status = inb(host_set->ports[0]->ioaddr.scr_addr + NV_INT_STATUS);
515
516 // Clear interrupt status.
517 outb(0xff, host_set->ports[0]->ioaddr.scr_addr + NV_INT_STATUS);
518
519 if (intr_status & NV_INT_STATUS_HOTPLUG) {
520 if (intr_status & NV_INT_STATUS_PDEV_ADDED)
521 printk(KERN_WARNING "nv_sata: "
522 "Primary device added\n");
523
524 if (intr_status & NV_INT_STATUS_PDEV_REMOVED)
525 printk(KERN_WARNING "nv_sata: "
526 "Primary device removed\n");
527
528 if (intr_status & NV_INT_STATUS_SDEV_ADDED)
529 printk(KERN_WARNING "nv_sata: "
530 "Secondary device added\n");
531
532 if (intr_status & NV_INT_STATUS_SDEV_REMOVED)
533 printk(KERN_WARNING "nv_sata: "
534 "Secondary device removed\n");
535
536 return 1;
537 }
538
539 return 0;
540 }
541
542 static void nv_enable_hotplug_ck804(struct ata_probe_ent *probe_ent)
543 {
544 struct pci_dev *pdev = to_pci_dev(probe_ent->dev);
545 u8 intr_mask;
546 u8 regval;
547
548 pci_read_config_byte(pdev, NV_MCP_SATA_CFG_20, &regval);
549 regval |= NV_MCP_SATA_CFG_20_SATA_SPACE_EN;
550 pci_write_config_byte(pdev, NV_MCP_SATA_CFG_20, regval);
551
552 writeb(NV_INT_STATUS_HOTPLUG, probe_ent->mmio_base + NV_INT_STATUS_CK804);
553
554 intr_mask = readb(probe_ent->mmio_base + NV_INT_ENABLE_CK804);
555 intr_mask |= NV_INT_ENABLE_HOTPLUG;
556
557 writeb(intr_mask, probe_ent->mmio_base + NV_INT_ENABLE_CK804);
558 }
559
560 static void nv_disable_hotplug_ck804(struct ata_host_set *host_set)
561 {
562 struct pci_dev *pdev = to_pci_dev(host_set->dev);
563 u8 intr_mask;
564 u8 regval;
565
566 intr_mask = readb(host_set->mmio_base + NV_INT_ENABLE_CK804);
567
568 intr_mask &= ~(NV_INT_ENABLE_HOTPLUG);
569
570 writeb(intr_mask, host_set->mmio_base + NV_INT_ENABLE_CK804);
571
572 pci_read_config_byte(pdev, NV_MCP_SATA_CFG_20, &regval);
573 regval &= ~NV_MCP_SATA_CFG_20_SATA_SPACE_EN;
574 pci_write_config_byte(pdev, NV_MCP_SATA_CFG_20, regval);
575 }
576
577 static int nv_check_hotplug_ck804(struct ata_host_set *host_set)
578 {
579 u8 intr_status;
580
581 intr_status = readb(host_set->mmio_base + NV_INT_STATUS_CK804);
582
583 // Clear interrupt status.
584 writeb(0xff, host_set->mmio_base + NV_INT_STATUS_CK804);
585
586 if (intr_status & NV_INT_STATUS_HOTPLUG) {
587 if (intr_status & NV_INT_STATUS_PDEV_ADDED)
588 printk(KERN_WARNING "nv_sata: "
589 "Primary device added\n");
590
591 if (intr_status & NV_INT_STATUS_PDEV_REMOVED)
592 printk(KERN_WARNING "nv_sata: "
593 "Primary device removed\n");
594
595 if (intr_status & NV_INT_STATUS_SDEV_ADDED)
596 printk(KERN_WARNING "nv_sata: "
597 "Secondary device added\n");
598
599 if (intr_status & NV_INT_STATUS_SDEV_REMOVED)
600 printk(KERN_WARNING "nv_sata: "
601 "Secondary device removed\n");
602
603 return 1;
604 }
605
606 return 0;
607 }
608
609 static int __init nv_init(void)
610 {
611 return pci_module_init(&nv_pci_driver);
612 }
613
614 static void __exit nv_exit(void)
615 {
616 pci_unregister_driver(&nv_pci_driver);
617 }
618
619 module_init(nv_init);
620 module_exit(nv_exit);
Linux kernel - Deliverables
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