2 * linux/drivers/char/8250.c
4 * Driver for 8250/16550-type serial ports
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
8 * Copyright (C) 2001 Russell King.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * $Id: 8250.c,v 1.90 2002/07/28 10:03:27 rmk Exp $
17 * A note about mapbase / membase
19 * mapbase is the physical address of the IO port.
20 * membase is an 'ioremapped' cookie.
23 #if defined(CONFIG_SERIAL_8250_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
27 #include <linux/module.h>
28 #include <linux/moduleparam.h>
29 #include <linux/ioport.h>
30 #include <linux/init.h>
31 #include <linux/console.h>
32 #include <linux/sysrq.h>
33 #include <linux/delay.h>
34 #include <linux/platform_device.h>
35 #include <linux/tty.h>
36 #include <linux/tty_flip.h>
37 #include <linux/serial_reg.h>
38 #include <linux/serial_core.h>
39 #include <linux/serial.h>
40 #include <linux/serial_8250.h>
41 #include <linux/nmi.h>
42 #include <linux/mutex.h>
51 * share_irqs - whether we pass IRQF_SHARED to request_irq(). This option
52 * is unsafe when used on edge-triggered interrupts.
54 static unsigned int share_irqs
= SERIAL8250_SHARE_IRQS
;
56 static unsigned int nr_uarts
= CONFIG_SERIAL_8250_RUNTIME_UARTS
;
62 #define DEBUG_AUTOCONF(fmt...) printk(fmt)
64 #define DEBUG_AUTOCONF(fmt...) do { } while (0)
68 #define DEBUG_INTR(fmt...) printk(fmt)
70 #define DEBUG_INTR(fmt...) do { } while (0)
73 #define PASS_LIMIT 256
76 * We default to IRQ0 for the "no irq" hack. Some
77 * machine types want others as well - they're free
78 * to redefine this in their header file.
80 #define is_real_interrupt(irq) ((irq) != 0)
82 #ifdef CONFIG_SERIAL_8250_DETECT_IRQ
83 #define CONFIG_SERIAL_DETECT_IRQ 1
85 #ifdef CONFIG_SERIAL_8250_MANY_PORTS
86 #define CONFIG_SERIAL_MANY_PORTS 1
90 * HUB6 is always on. This will be removed once the header
91 * files have been cleaned.
95 #include <asm/serial.h>
98 * SERIAL_PORT_DFNS tells us about built-in ports that have no
99 * standard enumeration mechanism. Platforms that can find all
100 * serial ports via mechanisms like ACPI or PCI need not supply it.
102 #ifndef SERIAL_PORT_DFNS
103 #define SERIAL_PORT_DFNS
106 static const struct old_serial_port old_serial_port
[] = {
107 SERIAL_PORT_DFNS
/* defined in asm/serial.h */
110 #define UART_NR CONFIG_SERIAL_8250_NR_UARTS
112 #ifdef CONFIG_SERIAL_8250_RSA
114 #define PORT_RSA_MAX 4
115 static unsigned long probe_rsa
[PORT_RSA_MAX
];
116 static unsigned int probe_rsa_count
;
117 #endif /* CONFIG_SERIAL_8250_RSA */
119 struct uart_8250_port
{
120 struct uart_port port
;
121 struct timer_list timer
; /* "no irq" timer */
122 struct list_head list
; /* ports on this IRQ */
123 unsigned short capabilities
; /* port capabilities */
124 unsigned short bugs
; /* port bugs */
125 unsigned int tx_loadsz
; /* transmit fifo load size */
130 unsigned char mcr_mask
; /* mask of user bits */
131 unsigned char mcr_force
; /* mask of forced bits */
132 unsigned char lsr_break_flag
;
135 * We provide a per-port pm hook.
137 void (*pm
)(struct uart_port
*port
,
138 unsigned int state
, unsigned int old
);
143 struct list_head
*head
;
146 static struct irq_info irq_lists
[NR_IRQS
];
149 * Here we define the default xmit fifo size used for each type of UART.
151 static const struct serial8250_config uart_config
[] = {
176 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_10
,
177 .flags
= UART_CAP_FIFO
,
188 .flags
= UART_CAP_FIFO
| UART_CAP_EFR
| UART_CAP_SLEEP
,
194 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_01
|
196 .flags
= UART_CAP_FIFO
| UART_CAP_EFR
| UART_CAP_SLEEP
,
202 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_10
|
204 .flags
= UART_CAP_FIFO
| UART_CAP_SLEEP
| UART_CAP_AFE
,
212 .name
= "16C950/954",
215 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_10
,
216 .flags
= UART_CAP_FIFO
,
222 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_01
|
224 .flags
= UART_CAP_FIFO
| UART_CAP_EFR
| UART_CAP_SLEEP
,
230 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_10
,
231 .flags
= UART_CAP_FIFO
| UART_CAP_EFR
| UART_CAP_SLEEP
,
237 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_11
,
238 .flags
= UART_CAP_FIFO
,
244 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_10
,
245 .flags
= UART_CAP_FIFO
| UART_NATSEMI
,
251 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_10
,
252 .flags
= UART_CAP_FIFO
| UART_CAP_UUE
,
256 #ifdef CONFIG_SERIAL_8250_AU1X00
258 /* Au1x00 UART hardware has a weird register layout */
259 static const u8 au_io_in_map
[] = {
269 static const u8 au_io_out_map
[] = {
277 /* sane hardware needs no mapping */
278 static inline int map_8250_in_reg(struct uart_8250_port
*up
, int offset
)
280 if (up
->port
.iotype
!= UPIO_AU
)
282 return au_io_in_map
[offset
];
285 static inline int map_8250_out_reg(struct uart_8250_port
*up
, int offset
)
287 if (up
->port
.iotype
!= UPIO_AU
)
289 return au_io_out_map
[offset
];
294 /* sane hardware needs no mapping */
295 #define map_8250_in_reg(up, offset) (offset)
296 #define map_8250_out_reg(up, offset) (offset)
300 static unsigned int serial_in(struct uart_8250_port
*up
, int offset
)
302 offset
= map_8250_in_reg(up
, offset
) << up
->port
.regshift
;
304 switch (up
->port
.iotype
) {
306 outb(up
->port
.hub6
- 1 + offset
, up
->port
.iobase
);
307 return inb(up
->port
.iobase
+ 1);
310 return readb(up
->port
.membase
+ offset
);
313 return readl(up
->port
.membase
+ offset
);
315 #ifdef CONFIG_SERIAL_8250_AU1X00
317 return __raw_readl(up
->port
.membase
+ offset
);
321 return inb(up
->port
.iobase
+ offset
);
326 serial_out(struct uart_8250_port
*up
, int offset
, int value
)
328 offset
= map_8250_out_reg(up
, offset
) << up
->port
.regshift
;
330 switch (up
->port
.iotype
) {
332 outb(up
->port
.hub6
- 1 + offset
, up
->port
.iobase
);
333 outb(value
, up
->port
.iobase
+ 1);
337 writeb(value
, up
->port
.membase
+ offset
);
341 writel(value
, up
->port
.membase
+ offset
);
344 #ifdef CONFIG_SERIAL_8250_AU1X00
346 __raw_writel(value
, up
->port
.membase
+ offset
);
351 outb(value
, up
->port
.iobase
+ offset
);
356 * We used to support using pause I/O for certain machines. We
357 * haven't supported this for a while, but just in case it's badly
358 * needed for certain old 386 machines, I've left these #define's
361 #define serial_inp(up, offset) serial_in(up, offset)
362 #define serial_outp(up, offset, value) serial_out(up, offset, value)
364 /* Uart divisor latch read */
365 static inline int _serial_dl_read(struct uart_8250_port
*up
)
367 return serial_inp(up
, UART_DLL
) | serial_inp(up
, UART_DLM
) << 8;
370 /* Uart divisor latch write */
371 static inline void _serial_dl_write(struct uart_8250_port
*up
, int value
)
373 serial_outp(up
, UART_DLL
, value
& 0xff);
374 serial_outp(up
, UART_DLM
, value
>> 8 & 0xff);
377 #ifdef CONFIG_SERIAL_8250_AU1X00
378 /* Au1x00 haven't got a standard divisor latch */
379 static int serial_dl_read(struct uart_8250_port
*up
)
381 if (up
->port
.iotype
== UPIO_AU
)
382 return __raw_readl(up
->port
.membase
+ 0x28);
384 return _serial_dl_read(up
);
387 static void serial_dl_write(struct uart_8250_port
*up
, int value
)
389 if (up
->port
.iotype
== UPIO_AU
)
390 __raw_writel(value
, up
->port
.membase
+ 0x28);
392 _serial_dl_write(up
, value
);
395 #define serial_dl_read(up) _serial_dl_read(up)
396 #define serial_dl_write(up, value) _serial_dl_write(up, value)
402 static void serial_icr_write(struct uart_8250_port
*up
, int offset
, int value
)
404 serial_out(up
, UART_SCR
, offset
);
405 serial_out(up
, UART_ICR
, value
);
408 static unsigned int serial_icr_read(struct uart_8250_port
*up
, int offset
)
412 serial_icr_write(up
, UART_ACR
, up
->acr
| UART_ACR_ICRRD
);
413 serial_out(up
, UART_SCR
, offset
);
414 value
= serial_in(up
, UART_ICR
);
415 serial_icr_write(up
, UART_ACR
, up
->acr
);
423 static inline void serial8250_clear_fifos(struct uart_8250_port
*p
)
425 if (p
->capabilities
& UART_CAP_FIFO
) {
426 serial_outp(p
, UART_FCR
, UART_FCR_ENABLE_FIFO
);
427 serial_outp(p
, UART_FCR
, UART_FCR_ENABLE_FIFO
|
428 UART_FCR_CLEAR_RCVR
| UART_FCR_CLEAR_XMIT
);
429 serial_outp(p
, UART_FCR
, 0);
434 * IER sleep support. UARTs which have EFRs need the "extended
435 * capability" bit enabled. Note that on XR16C850s, we need to
436 * reset LCR to write to IER.
438 static inline void serial8250_set_sleep(struct uart_8250_port
*p
, int sleep
)
440 if (p
->capabilities
& UART_CAP_SLEEP
) {
441 if (p
->capabilities
& UART_CAP_EFR
) {
442 serial_outp(p
, UART_LCR
, 0xBF);
443 serial_outp(p
, UART_EFR
, UART_EFR_ECB
);
444 serial_outp(p
, UART_LCR
, 0);
446 serial_outp(p
, UART_IER
, sleep
? UART_IERX_SLEEP
: 0);
447 if (p
->capabilities
& UART_CAP_EFR
) {
448 serial_outp(p
, UART_LCR
, 0xBF);
449 serial_outp(p
, UART_EFR
, 0);
450 serial_outp(p
, UART_LCR
, 0);
455 #ifdef CONFIG_SERIAL_8250_RSA
457 * Attempts to turn on the RSA FIFO. Returns zero on failure.
458 * We set the port uart clock rate if we succeed.
460 static int __enable_rsa(struct uart_8250_port
*up
)
465 mode
= serial_inp(up
, UART_RSA_MSR
);
466 result
= mode
& UART_RSA_MSR_FIFO
;
469 serial_outp(up
, UART_RSA_MSR
, mode
| UART_RSA_MSR_FIFO
);
470 mode
= serial_inp(up
, UART_RSA_MSR
);
471 result
= mode
& UART_RSA_MSR_FIFO
;
475 up
->port
.uartclk
= SERIAL_RSA_BAUD_BASE
* 16;
480 static void enable_rsa(struct uart_8250_port
*up
)
482 if (up
->port
.type
== PORT_RSA
) {
483 if (up
->port
.uartclk
!= SERIAL_RSA_BAUD_BASE
* 16) {
484 spin_lock_irq(&up
->port
.lock
);
486 spin_unlock_irq(&up
->port
.lock
);
488 if (up
->port
.uartclk
== SERIAL_RSA_BAUD_BASE
* 16)
489 serial_outp(up
, UART_RSA_FRR
, 0);
494 * Attempts to turn off the RSA FIFO. Returns zero on failure.
495 * It is unknown why interrupts were disabled in here. However,
496 * the caller is expected to preserve this behaviour by grabbing
497 * the spinlock before calling this function.
499 static void disable_rsa(struct uart_8250_port
*up
)
504 if (up
->port
.type
== PORT_RSA
&&
505 up
->port
.uartclk
== SERIAL_RSA_BAUD_BASE
* 16) {
506 spin_lock_irq(&up
->port
.lock
);
508 mode
= serial_inp(up
, UART_RSA_MSR
);
509 result
= !(mode
& UART_RSA_MSR_FIFO
);
512 serial_outp(up
, UART_RSA_MSR
, mode
& ~UART_RSA_MSR_FIFO
);
513 mode
= serial_inp(up
, UART_RSA_MSR
);
514 result
= !(mode
& UART_RSA_MSR_FIFO
);
518 up
->port
.uartclk
= SERIAL_RSA_BAUD_BASE_LO
* 16;
519 spin_unlock_irq(&up
->port
.lock
);
522 #endif /* CONFIG_SERIAL_8250_RSA */
525 * This is a quickie test to see how big the FIFO is.
526 * It doesn't work at all the time, more's the pity.
528 static int size_fifo(struct uart_8250_port
*up
)
530 unsigned char old_fcr
, old_mcr
, old_lcr
;
531 unsigned short old_dl
;
534 old_lcr
= serial_inp(up
, UART_LCR
);
535 serial_outp(up
, UART_LCR
, 0);
536 old_fcr
= serial_inp(up
, UART_FCR
);
537 old_mcr
= serial_inp(up
, UART_MCR
);
538 serial_outp(up
, UART_FCR
, UART_FCR_ENABLE_FIFO
|
539 UART_FCR_CLEAR_RCVR
| UART_FCR_CLEAR_XMIT
);
540 serial_outp(up
, UART_MCR
, UART_MCR_LOOP
);
541 serial_outp(up
, UART_LCR
, UART_LCR_DLAB
);
542 old_dl
= serial_dl_read(up
);
543 serial_dl_write(up
, 0x0001);
544 serial_outp(up
, UART_LCR
, 0x03);
545 for (count
= 0; count
< 256; count
++)
546 serial_outp(up
, UART_TX
, count
);
547 mdelay(20);/* FIXME - schedule_timeout */
548 for (count
= 0; (serial_inp(up
, UART_LSR
) & UART_LSR_DR
) &&
549 (count
< 256); count
++)
550 serial_inp(up
, UART_RX
);
551 serial_outp(up
, UART_FCR
, old_fcr
);
552 serial_outp(up
, UART_MCR
, old_mcr
);
553 serial_outp(up
, UART_LCR
, UART_LCR_DLAB
);
554 serial_dl_write(up
, old_dl
);
555 serial_outp(up
, UART_LCR
, old_lcr
);
561 * Read UART ID using the divisor method - set DLL and DLM to zero
562 * and the revision will be in DLL and device type in DLM. We
563 * preserve the device state across this.
565 static unsigned int autoconfig_read_divisor_id(struct uart_8250_port
*p
)
567 unsigned char old_dll
, old_dlm
, old_lcr
;
570 old_lcr
= serial_inp(p
, UART_LCR
);
571 serial_outp(p
, UART_LCR
, UART_LCR_DLAB
);
573 old_dll
= serial_inp(p
, UART_DLL
);
574 old_dlm
= serial_inp(p
, UART_DLM
);
576 serial_outp(p
, UART_DLL
, 0);
577 serial_outp(p
, UART_DLM
, 0);
579 id
= serial_inp(p
, UART_DLL
) | serial_inp(p
, UART_DLM
) << 8;
581 serial_outp(p
, UART_DLL
, old_dll
);
582 serial_outp(p
, UART_DLM
, old_dlm
);
583 serial_outp(p
, UART_LCR
, old_lcr
);
589 * This is a helper routine to autodetect StarTech/Exar/Oxsemi UART's.
590 * When this function is called we know it is at least a StarTech
591 * 16650 V2, but it might be one of several StarTech UARTs, or one of
592 * its clones. (We treat the broken original StarTech 16650 V1 as a
593 * 16550, and why not? Startech doesn't seem to even acknowledge its
596 * What evil have men's minds wrought...
598 static void autoconfig_has_efr(struct uart_8250_port
*up
)
600 unsigned int id1
, id2
, id3
, rev
;
603 * Everything with an EFR has SLEEP
605 up
->capabilities
|= UART_CAP_EFR
| UART_CAP_SLEEP
;
608 * First we check to see if it's an Oxford Semiconductor UART.
610 * If we have to do this here because some non-National
611 * Semiconductor clone chips lock up if you try writing to the
612 * LSR register (which serial_icr_read does)
616 * Check for Oxford Semiconductor 16C950.
618 * EFR [4] must be set else this test fails.
620 * This shouldn't be necessary, but Mike Hudson (Exoray@isys.ca)
621 * claims that it's needed for 952 dual UART's (which are not
622 * recommended for new designs).
625 serial_out(up
, UART_LCR
, 0xBF);
626 serial_out(up
, UART_EFR
, UART_EFR_ECB
);
627 serial_out(up
, UART_LCR
, 0x00);
628 id1
= serial_icr_read(up
, UART_ID1
);
629 id2
= serial_icr_read(up
, UART_ID2
);
630 id3
= serial_icr_read(up
, UART_ID3
);
631 rev
= serial_icr_read(up
, UART_REV
);
633 DEBUG_AUTOCONF("950id=%02x:%02x:%02x:%02x ", id1
, id2
, id3
, rev
);
635 if (id1
== 0x16 && id2
== 0xC9 &&
636 (id3
== 0x50 || id3
== 0x52 || id3
== 0x54)) {
637 up
->port
.type
= PORT_16C950
;
640 * Enable work around for the Oxford Semiconductor 952 rev B
641 * chip which causes it to seriously miscalculate baud rates
644 if (id3
== 0x52 && rev
== 0x01)
645 up
->bugs
|= UART_BUG_QUOT
;
650 * We check for a XR16C850 by setting DLL and DLM to 0, and then
651 * reading back DLL and DLM. The chip type depends on the DLM
653 * 0x10 - XR16C850 and the DLL contains the chip revision.
657 id1
= autoconfig_read_divisor_id(up
);
658 DEBUG_AUTOCONF("850id=%04x ", id1
);
661 if (id2
== 0x10 || id2
== 0x12 || id2
== 0x14) {
662 up
->port
.type
= PORT_16850
;
667 * It wasn't an XR16C850.
669 * We distinguish between the '654 and the '650 by counting
670 * how many bytes are in the FIFO. I'm using this for now,
671 * since that's the technique that was sent to me in the
672 * serial driver update, but I'm not convinced this works.
673 * I've had problems doing this in the past. -TYT
675 if (size_fifo(up
) == 64)
676 up
->port
.type
= PORT_16654
;
678 up
->port
.type
= PORT_16650V2
;
682 * We detected a chip without a FIFO. Only two fall into
683 * this category - the original 8250 and the 16450. The
684 * 16450 has a scratch register (accessible with LCR=0)
686 static void autoconfig_8250(struct uart_8250_port
*up
)
688 unsigned char scratch
, status1
, status2
;
690 up
->port
.type
= PORT_8250
;
692 scratch
= serial_in(up
, UART_SCR
);
693 serial_outp(up
, UART_SCR
, 0xa5);
694 status1
= serial_in(up
, UART_SCR
);
695 serial_outp(up
, UART_SCR
, 0x5a);
696 status2
= serial_in(up
, UART_SCR
);
697 serial_outp(up
, UART_SCR
, scratch
);
699 if (status1
== 0xa5 && status2
== 0x5a)
700 up
->port
.type
= PORT_16450
;
703 static int broken_efr(struct uart_8250_port
*up
)
706 * Exar ST16C2550 "A2" devices incorrectly detect as
707 * having an EFR, and report an ID of 0x0201. See
708 * http://www.exar.com/info.php?pdf=dan180_oct2004.pdf
710 if (autoconfig_read_divisor_id(up
) == 0x0201 && size_fifo(up
) == 16)
717 * We know that the chip has FIFOs. Does it have an EFR? The
718 * EFR is located in the same register position as the IIR and
719 * we know the top two bits of the IIR are currently set. The
720 * EFR should contain zero. Try to read the EFR.
722 static void autoconfig_16550a(struct uart_8250_port
*up
)
724 unsigned char status1
, status2
;
725 unsigned int iersave
;
727 up
->port
.type
= PORT_16550A
;
728 up
->capabilities
|= UART_CAP_FIFO
;
731 * Check for presence of the EFR when DLAB is set.
732 * Only ST16C650V1 UARTs pass this test.
734 serial_outp(up
, UART_LCR
, UART_LCR_DLAB
);
735 if (serial_in(up
, UART_EFR
) == 0) {
736 serial_outp(up
, UART_EFR
, 0xA8);
737 if (serial_in(up
, UART_EFR
) != 0) {
738 DEBUG_AUTOCONF("EFRv1 ");
739 up
->port
.type
= PORT_16650
;
740 up
->capabilities
|= UART_CAP_EFR
| UART_CAP_SLEEP
;
742 DEBUG_AUTOCONF("Motorola 8xxx DUART ");
744 serial_outp(up
, UART_EFR
, 0);
749 * Maybe it requires 0xbf to be written to the LCR.
750 * (other ST16C650V2 UARTs, TI16C752A, etc)
752 serial_outp(up
, UART_LCR
, 0xBF);
753 if (serial_in(up
, UART_EFR
) == 0 && !broken_efr(up
)) {
754 DEBUG_AUTOCONF("EFRv2 ");
755 autoconfig_has_efr(up
);
760 * Check for a National Semiconductor SuperIO chip.
761 * Attempt to switch to bank 2, read the value of the LOOP bit
762 * from EXCR1. Switch back to bank 0, change it in MCR. Then
763 * switch back to bank 2, read it from EXCR1 again and check
764 * it's changed. If so, set baud_base in EXCR2 to 921600. -- dwmw2
766 serial_outp(up
, UART_LCR
, 0);
767 status1
= serial_in(up
, UART_MCR
);
768 serial_outp(up
, UART_LCR
, 0xE0);
769 status2
= serial_in(up
, 0x02); /* EXCR1 */
771 if (!((status2
^ status1
) & UART_MCR_LOOP
)) {
772 serial_outp(up
, UART_LCR
, 0);
773 serial_outp(up
, UART_MCR
, status1
^ UART_MCR_LOOP
);
774 serial_outp(up
, UART_LCR
, 0xE0);
775 status2
= serial_in(up
, 0x02); /* EXCR1 */
776 serial_outp(up
, UART_LCR
, 0);
777 serial_outp(up
, UART_MCR
, status1
);
779 if ((status2
^ status1
) & UART_MCR_LOOP
) {
782 serial_outp(up
, UART_LCR
, 0xE0);
784 quot
= serial_dl_read(up
);
787 status1
= serial_in(up
, 0x04); /* EXCR1 */
788 status1
&= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
789 status1
|= 0x10; /* 1.625 divisor for baud_base --> 921600 */
790 serial_outp(up
, 0x04, status1
);
792 serial_dl_write(up
, quot
);
794 serial_outp(up
, UART_LCR
, 0);
796 up
->port
.uartclk
= 921600*16;
797 up
->port
.type
= PORT_NS16550A
;
798 up
->capabilities
|= UART_NATSEMI
;
804 * No EFR. Try to detect a TI16750, which only sets bit 5 of
805 * the IIR when 64 byte FIFO mode is enabled when DLAB is set.
806 * Try setting it with and without DLAB set. Cheap clones
807 * set bit 5 without DLAB set.
809 serial_outp(up
, UART_LCR
, 0);
810 serial_outp(up
, UART_FCR
, UART_FCR_ENABLE_FIFO
| UART_FCR7_64BYTE
);
811 status1
= serial_in(up
, UART_IIR
) >> 5;
812 serial_outp(up
, UART_FCR
, UART_FCR_ENABLE_FIFO
);
813 serial_outp(up
, UART_LCR
, UART_LCR_DLAB
);
814 serial_outp(up
, UART_FCR
, UART_FCR_ENABLE_FIFO
| UART_FCR7_64BYTE
);
815 status2
= serial_in(up
, UART_IIR
) >> 5;
816 serial_outp(up
, UART_FCR
, UART_FCR_ENABLE_FIFO
);
817 serial_outp(up
, UART_LCR
, 0);
819 DEBUG_AUTOCONF("iir1=%d iir2=%d ", status1
, status2
);
821 if (status1
== 6 && status2
== 7) {
822 up
->port
.type
= PORT_16750
;
823 up
->capabilities
|= UART_CAP_AFE
| UART_CAP_SLEEP
;
828 * Try writing and reading the UART_IER_UUE bit (b6).
829 * If it works, this is probably one of the Xscale platform's
831 * We're going to explicitly set the UUE bit to 0 before
832 * trying to write and read a 1 just to make sure it's not
833 * already a 1 and maybe locked there before we even start start.
835 iersave
= serial_in(up
, UART_IER
);
836 serial_outp(up
, UART_IER
, iersave
& ~UART_IER_UUE
);
837 if (!(serial_in(up
, UART_IER
) & UART_IER_UUE
)) {
839 * OK it's in a known zero state, try writing and reading
840 * without disturbing the current state of the other bits.
842 serial_outp(up
, UART_IER
, iersave
| UART_IER_UUE
);
843 if (serial_in(up
, UART_IER
) & UART_IER_UUE
) {
846 * We'll leave the UART_IER_UUE bit set to 1 (enabled).
848 DEBUG_AUTOCONF("Xscale ");
849 up
->port
.type
= PORT_XSCALE
;
850 up
->capabilities
|= UART_CAP_UUE
;
855 * If we got here we couldn't force the IER_UUE bit to 0.
856 * Log it and continue.
858 DEBUG_AUTOCONF("Couldn't force IER_UUE to 0 ");
860 serial_outp(up
, UART_IER
, iersave
);
864 * This routine is called by rs_init() to initialize a specific serial
865 * port. It determines what type of UART chip this serial port is
866 * using: 8250, 16450, 16550, 16550A. The important question is
867 * whether or not this UART is a 16550A or not, since this will
868 * determine whether or not we can use its FIFO features or not.
870 static void autoconfig(struct uart_8250_port
*up
, unsigned int probeflags
)
872 unsigned char status1
, scratch
, scratch2
, scratch3
;
873 unsigned char save_lcr
, save_mcr
;
876 if (!up
->port
.iobase
&& !up
->port
.mapbase
&& !up
->port
.membase
)
879 DEBUG_AUTOCONF("ttyS%d: autoconf (0x%04x, 0x%p): ",
880 up
->port
.line
, up
->port
.iobase
, up
->port
.membase
);
883 * We really do need global IRQs disabled here - we're going to
884 * be frobbing the chips IRQ enable register to see if it exists.
886 spin_lock_irqsave(&up
->port
.lock
, flags
);
887 // save_flags(flags); cli();
889 up
->capabilities
= 0;
892 if (!(up
->port
.flags
& UPF_BUGGY_UART
)) {
894 * Do a simple existence test first; if we fail this,
895 * there's no point trying anything else.
897 * 0x80 is used as a nonsense port to prevent against
898 * false positives due to ISA bus float. The
899 * assumption is that 0x80 is a non-existent port;
900 * which should be safe since include/asm/io.h also
901 * makes this assumption.
903 * Note: this is safe as long as MCR bit 4 is clear
904 * and the device is in "PC" mode.
906 scratch
= serial_inp(up
, UART_IER
);
907 serial_outp(up
, UART_IER
, 0);
911 scratch2
= serial_inp(up
, UART_IER
);
912 serial_outp(up
, UART_IER
, 0x0F);
916 scratch3
= serial_inp(up
, UART_IER
);
917 serial_outp(up
, UART_IER
, scratch
);
918 if (scratch2
!= 0 || scratch3
!= 0x0F) {
920 * We failed; there's nothing here
922 DEBUG_AUTOCONF("IER test failed (%02x, %02x) ",
928 save_mcr
= serial_in(up
, UART_MCR
);
929 save_lcr
= serial_in(up
, UART_LCR
);
932 * Check to see if a UART is really there. Certain broken
933 * internal modems based on the Rockwell chipset fail this
934 * test, because they apparently don't implement the loopback
935 * test mode. So this test is skipped on the COM 1 through
936 * COM 4 ports. This *should* be safe, since no board
937 * manufacturer would be stupid enough to design a board
938 * that conflicts with COM 1-4 --- we hope!
940 if (!(up
->port
.flags
& UPF_SKIP_TEST
)) {
941 serial_outp(up
, UART_MCR
, UART_MCR_LOOP
| 0x0A);
942 status1
= serial_inp(up
, UART_MSR
) & 0xF0;
943 serial_outp(up
, UART_MCR
, save_mcr
);
944 if (status1
!= 0x90) {
945 DEBUG_AUTOCONF("LOOP test failed (%02x) ",
952 * We're pretty sure there's a port here. Lets find out what
953 * type of port it is. The IIR top two bits allows us to find
954 * out if it's 8250 or 16450, 16550, 16550A or later. This
955 * determines what we test for next.
957 * We also initialise the EFR (if any) to zero for later. The
958 * EFR occupies the same register location as the FCR and IIR.
960 serial_outp(up
, UART_LCR
, 0xBF);
961 serial_outp(up
, UART_EFR
, 0);
962 serial_outp(up
, UART_LCR
, 0);
964 serial_outp(up
, UART_FCR
, UART_FCR_ENABLE_FIFO
);
965 scratch
= serial_in(up
, UART_IIR
) >> 6;
967 DEBUG_AUTOCONF("iir=%d ", scratch
);
974 up
->port
.type
= PORT_UNKNOWN
;
977 up
->port
.type
= PORT_16550
;
980 autoconfig_16550a(up
);
984 #ifdef CONFIG_SERIAL_8250_RSA
986 * Only probe for RSA ports if we got the region.
988 if (up
->port
.type
== PORT_16550A
&& probeflags
& PROBE_RSA
) {
991 for (i
= 0 ; i
< probe_rsa_count
; ++i
) {
992 if (probe_rsa
[i
] == up
->port
.iobase
&&
994 up
->port
.type
= PORT_RSA
;
1001 #ifdef CONFIG_SERIAL_8250_AU1X00
1002 /* if access method is AU, it is a 16550 with a quirk */
1003 if (up
->port
.type
== PORT_16550A
&& up
->port
.iotype
== UPIO_AU
)
1004 up
->bugs
|= UART_BUG_NOMSR
;
1007 serial_outp(up
, UART_LCR
, save_lcr
);
1009 if (up
->capabilities
!= uart_config
[up
->port
.type
].flags
) {
1011 "ttyS%d: detected caps %08x should be %08x\n",
1012 up
->port
.line
, up
->capabilities
,
1013 uart_config
[up
->port
.type
].flags
);
1016 up
->port
.fifosize
= uart_config
[up
->port
.type
].fifo_size
;
1017 up
->capabilities
= uart_config
[up
->port
.type
].flags
;
1018 up
->tx_loadsz
= uart_config
[up
->port
.type
].tx_loadsz
;
1020 if (up
->port
.type
== PORT_UNKNOWN
)
1026 #ifdef CONFIG_SERIAL_8250_RSA
1027 if (up
->port
.type
== PORT_RSA
)
1028 serial_outp(up
, UART_RSA_FRR
, 0);
1030 serial_outp(up
, UART_MCR
, save_mcr
);
1031 serial8250_clear_fifos(up
);
1032 (void)serial_in(up
, UART_RX
);
1033 if (up
->capabilities
& UART_CAP_UUE
)
1034 serial_outp(up
, UART_IER
, UART_IER_UUE
);
1036 serial_outp(up
, UART_IER
, 0);
1039 spin_unlock_irqrestore(&up
->port
.lock
, flags
);
1040 // restore_flags(flags);
1041 DEBUG_AUTOCONF("type=%s\n", uart_config
[up
->port
.type
].name
);
1044 static void autoconfig_irq(struct uart_8250_port
*up
)
1046 unsigned char save_mcr
, save_ier
;
1047 unsigned char save_ICP
= 0;
1048 unsigned int ICP
= 0;
1052 if (up
->port
.flags
& UPF_FOURPORT
) {
1053 ICP
= (up
->port
.iobase
& 0xfe0) | 0x1f;
1054 save_ICP
= inb_p(ICP
);
1059 /* forget possible initially masked and pending IRQ */
1060 probe_irq_off(probe_irq_on());
1061 save_mcr
= serial_inp(up
, UART_MCR
);
1062 save_ier
= serial_inp(up
, UART_IER
);
1063 serial_outp(up
, UART_MCR
, UART_MCR_OUT1
| UART_MCR_OUT2
);
1065 irqs
= probe_irq_on();
1066 serial_outp(up
, UART_MCR
, 0);
1068 if (up
->port
.flags
& UPF_FOURPORT
) {
1069 serial_outp(up
, UART_MCR
,
1070 UART_MCR_DTR
| UART_MCR_RTS
);
1072 serial_outp(up
, UART_MCR
,
1073 UART_MCR_DTR
| UART_MCR_RTS
| UART_MCR_OUT2
);
1075 serial_outp(up
, UART_IER
, 0x0f); /* enable all intrs */
1076 (void)serial_inp(up
, UART_LSR
);
1077 (void)serial_inp(up
, UART_RX
);
1078 (void)serial_inp(up
, UART_IIR
);
1079 (void)serial_inp(up
, UART_MSR
);
1080 serial_outp(up
, UART_TX
, 0xFF);
1082 irq
= probe_irq_off(irqs
);
1084 serial_outp(up
, UART_MCR
, save_mcr
);
1085 serial_outp(up
, UART_IER
, save_ier
);
1087 if (up
->port
.flags
& UPF_FOURPORT
)
1088 outb_p(save_ICP
, ICP
);
1090 up
->port
.irq
= (irq
> 0) ? irq
: 0;
1093 static inline void __stop_tx(struct uart_8250_port
*p
)
1095 if (p
->ier
& UART_IER_THRI
) {
1096 p
->ier
&= ~UART_IER_THRI
;
1097 serial_out(p
, UART_IER
, p
->ier
);
1101 static void serial8250_stop_tx(struct uart_port
*port
)
1103 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1108 * We really want to stop the transmitter from sending.
1110 if (up
->port
.type
== PORT_16C950
) {
1111 up
->acr
|= UART_ACR_TXDIS
;
1112 serial_icr_write(up
, UART_ACR
, up
->acr
);
1116 static void transmit_chars(struct uart_8250_port
*up
);
1118 static void serial8250_start_tx(struct uart_port
*port
)
1120 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1122 if (!(up
->ier
& UART_IER_THRI
)) {
1123 up
->ier
|= UART_IER_THRI
;
1124 serial_out(up
, UART_IER
, up
->ier
);
1126 if (up
->bugs
& UART_BUG_TXEN
) {
1127 unsigned char lsr
, iir
;
1128 lsr
= serial_in(up
, UART_LSR
);
1129 iir
= serial_in(up
, UART_IIR
);
1130 if (lsr
& UART_LSR_TEMT
&& iir
& UART_IIR_NO_INT
)
1136 * Re-enable the transmitter if we disabled it.
1138 if (up
->port
.type
== PORT_16C950
&& up
->acr
& UART_ACR_TXDIS
) {
1139 up
->acr
&= ~UART_ACR_TXDIS
;
1140 serial_icr_write(up
, UART_ACR
, up
->acr
);
1144 static void serial8250_stop_rx(struct uart_port
*port
)
1146 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1148 up
->ier
&= ~UART_IER_RLSI
;
1149 up
->port
.read_status_mask
&= ~UART_LSR_DR
;
1150 serial_out(up
, UART_IER
, up
->ier
);
1153 static void serial8250_enable_ms(struct uart_port
*port
)
1155 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1157 /* no MSR capabilities */
1158 if (up
->bugs
& UART_BUG_NOMSR
)
1161 up
->ier
|= UART_IER_MSI
;
1162 serial_out(up
, UART_IER
, up
->ier
);
1166 receive_chars(struct uart_8250_port
*up
, int *status
, struct pt_regs
*regs
)
1168 struct tty_struct
*tty
= up
->port
.info
->tty
;
1169 unsigned char ch
, lsr
= *status
;
1170 int max_count
= 256;
1174 ch
= serial_inp(up
, UART_RX
);
1176 up
->port
.icount
.rx
++;
1178 #ifdef CONFIG_SERIAL_8250_CONSOLE
1180 * Recover the break flag from console xmit
1182 if (up
->port
.line
== up
->port
.cons
->index
) {
1183 lsr
|= up
->lsr_break_flag
;
1184 up
->lsr_break_flag
= 0;
1188 if (unlikely(lsr
& (UART_LSR_BI
| UART_LSR_PE
|
1189 UART_LSR_FE
| UART_LSR_OE
))) {
1191 * For statistics only
1193 if (lsr
& UART_LSR_BI
) {
1194 lsr
&= ~(UART_LSR_FE
| UART_LSR_PE
);
1195 up
->port
.icount
.brk
++;
1197 * We do the SysRQ and SAK checking
1198 * here because otherwise the break
1199 * may get masked by ignore_status_mask
1200 * or read_status_mask.
1202 if (uart_handle_break(&up
->port
))
1204 } else if (lsr
& UART_LSR_PE
)
1205 up
->port
.icount
.parity
++;
1206 else if (lsr
& UART_LSR_FE
)
1207 up
->port
.icount
.frame
++;
1208 if (lsr
& UART_LSR_OE
)
1209 up
->port
.icount
.overrun
++;
1212 * Mask off conditions which should be ignored.
1214 lsr
&= up
->port
.read_status_mask
;
1216 if (lsr
& UART_LSR_BI
) {
1217 DEBUG_INTR("handling break....");
1219 } else if (lsr
& UART_LSR_PE
)
1221 else if (lsr
& UART_LSR_FE
)
1224 if (uart_handle_sysrq_char(&up
->port
, ch
, regs
))
1227 uart_insert_char(&up
->port
, lsr
, UART_LSR_OE
, ch
, flag
);
1230 lsr
= serial_inp(up
, UART_LSR
);
1231 } while ((lsr
& UART_LSR_DR
) && (max_count
-- > 0));
1232 spin_unlock(&up
->port
.lock
);
1233 tty_flip_buffer_push(tty
);
1234 spin_lock(&up
->port
.lock
);
1238 static void transmit_chars(struct uart_8250_port
*up
)
1240 struct circ_buf
*xmit
= &up
->port
.info
->xmit
;
1243 if (up
->port
.x_char
) {
1244 serial_outp(up
, UART_TX
, up
->port
.x_char
);
1245 up
->port
.icount
.tx
++;
1246 up
->port
.x_char
= 0;
1249 if (uart_tx_stopped(&up
->port
)) {
1250 serial8250_stop_tx(&up
->port
);
1253 if (uart_circ_empty(xmit
)) {
1258 count
= up
->tx_loadsz
;
1260 serial_out(up
, UART_TX
, xmit
->buf
[xmit
->tail
]);
1261 xmit
->tail
= (xmit
->tail
+ 1) & (UART_XMIT_SIZE
- 1);
1262 up
->port
.icount
.tx
++;
1263 if (uart_circ_empty(xmit
))
1265 } while (--count
> 0);
1267 if (uart_circ_chars_pending(xmit
) < WAKEUP_CHARS
)
1268 uart_write_wakeup(&up
->port
);
1270 DEBUG_INTR("THRE...");
1272 if (uart_circ_empty(xmit
))
1276 static unsigned int check_modem_status(struct uart_8250_port
*up
)
1278 unsigned int status
= serial_in(up
, UART_MSR
);
1280 if (status
& UART_MSR_ANY_DELTA
&& up
->ier
& UART_IER_MSI
) {
1281 if (status
& UART_MSR_TERI
)
1282 up
->port
.icount
.rng
++;
1283 if (status
& UART_MSR_DDSR
)
1284 up
->port
.icount
.dsr
++;
1285 if (status
& UART_MSR_DDCD
)
1286 uart_handle_dcd_change(&up
->port
, status
& UART_MSR_DCD
);
1287 if (status
& UART_MSR_DCTS
)
1288 uart_handle_cts_change(&up
->port
, status
& UART_MSR_CTS
);
1290 wake_up_interruptible(&up
->port
.info
->delta_msr_wait
);
1297 * This handles the interrupt from one port.
1300 serial8250_handle_port(struct uart_8250_port
*up
, struct pt_regs
*regs
)
1302 unsigned int status
;
1304 spin_lock(&up
->port
.lock
);
1306 status
= serial_inp(up
, UART_LSR
);
1308 DEBUG_INTR("status = %x...", status
);
1310 if (status
& UART_LSR_DR
)
1311 receive_chars(up
, &status
, regs
);
1312 check_modem_status(up
);
1313 if (status
& UART_LSR_THRE
)
1316 spin_unlock(&up
->port
.lock
);
1320 * This is the serial driver's interrupt routine.
1322 * Arjan thinks the old way was overly complex, so it got simplified.
1323 * Alan disagrees, saying that need the complexity to handle the weird
1324 * nature of ISA shared interrupts. (This is a special exception.)
1326 * In order to handle ISA shared interrupts properly, we need to check
1327 * that all ports have been serviced, and therefore the ISA interrupt
1328 * line has been de-asserted.
1330 * This means we need to loop through all ports. checking that they
1331 * don't have an interrupt pending.
1333 static irqreturn_t
serial8250_interrupt(int irq
, void *dev_id
, struct pt_regs
*regs
)
1335 struct irq_info
*i
= dev_id
;
1336 struct list_head
*l
, *end
= NULL
;
1337 int pass_counter
= 0, handled
= 0;
1339 DEBUG_INTR("serial8250_interrupt(%d)...", irq
);
1341 spin_lock(&i
->lock
);
1345 struct uart_8250_port
*up
;
1348 up
= list_entry(l
, struct uart_8250_port
, list
);
1350 iir
= serial_in(up
, UART_IIR
);
1351 if (!(iir
& UART_IIR_NO_INT
)) {
1352 serial8250_handle_port(up
, regs
);
1357 } else if (end
== NULL
)
1362 if (l
== i
->head
&& pass_counter
++ > PASS_LIMIT
) {
1363 /* If we hit this, we're dead. */
1364 printk(KERN_ERR
"serial8250: too much work for "
1370 spin_unlock(&i
->lock
);
1372 DEBUG_INTR("end.\n");
1374 return IRQ_RETVAL(handled
);
1378 * To support ISA shared interrupts, we need to have one interrupt
1379 * handler that ensures that the IRQ line has been deasserted
1380 * before returning. Failing to do this will result in the IRQ
1381 * line being stuck active, and, since ISA irqs are edge triggered,
1382 * no more IRQs will be seen.
1384 static void serial_do_unlink(struct irq_info
*i
, struct uart_8250_port
*up
)
1386 spin_lock_irq(&i
->lock
);
1388 if (!list_empty(i
->head
)) {
1389 if (i
->head
== &up
->list
)
1390 i
->head
= i
->head
->next
;
1391 list_del(&up
->list
);
1393 BUG_ON(i
->head
!= &up
->list
);
1397 spin_unlock_irq(&i
->lock
);
1400 static int serial_link_irq_chain(struct uart_8250_port
*up
)
1402 struct irq_info
*i
= irq_lists
+ up
->port
.irq
;
1403 int ret
, irq_flags
= up
->port
.flags
& UPF_SHARE_IRQ
? IRQF_SHARED
: 0;
1405 spin_lock_irq(&i
->lock
);
1408 list_add(&up
->list
, i
->head
);
1409 spin_unlock_irq(&i
->lock
);
1413 INIT_LIST_HEAD(&up
->list
);
1414 i
->head
= &up
->list
;
1415 spin_unlock_irq(&i
->lock
);
1417 ret
= request_irq(up
->port
.irq
, serial8250_interrupt
,
1418 irq_flags
, "serial", i
);
1420 serial_do_unlink(i
, up
);
1426 static void serial_unlink_irq_chain(struct uart_8250_port
*up
)
1428 struct irq_info
*i
= irq_lists
+ up
->port
.irq
;
1430 BUG_ON(i
->head
== NULL
);
1432 if (list_empty(i
->head
))
1433 free_irq(up
->port
.irq
, i
);
1435 serial_do_unlink(i
, up
);
1439 * This function is used to handle ports that do not have an
1440 * interrupt. This doesn't work very well for 16450's, but gives
1441 * barely passable results for a 16550A. (Although at the expense
1442 * of much CPU overhead).
1444 static void serial8250_timeout(unsigned long data
)
1446 struct uart_8250_port
*up
= (struct uart_8250_port
*)data
;
1447 unsigned int timeout
;
1450 iir
= serial_in(up
, UART_IIR
);
1451 if (!(iir
& UART_IIR_NO_INT
))
1452 serial8250_handle_port(up
, NULL
);
1454 timeout
= up
->port
.timeout
;
1455 timeout
= timeout
> 6 ? (timeout
/ 2 - 2) : 1;
1456 mod_timer(&up
->timer
, jiffies
+ timeout
);
1459 static unsigned int serial8250_tx_empty(struct uart_port
*port
)
1461 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1462 unsigned long flags
;
1465 spin_lock_irqsave(&up
->port
.lock
, flags
);
1466 ret
= serial_in(up
, UART_LSR
) & UART_LSR_TEMT
? TIOCSER_TEMT
: 0;
1467 spin_unlock_irqrestore(&up
->port
.lock
, flags
);
1472 static unsigned int serial8250_get_mctrl(struct uart_port
*port
)
1474 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1475 unsigned int status
;
1478 status
= check_modem_status(up
);
1481 if (status
& UART_MSR_DCD
)
1483 if (status
& UART_MSR_RI
)
1485 if (status
& UART_MSR_DSR
)
1487 if (status
& UART_MSR_CTS
)
1492 static void serial8250_set_mctrl(struct uart_port
*port
, unsigned int mctrl
)
1494 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1495 unsigned char mcr
= 0;
1497 if (mctrl
& TIOCM_RTS
)
1498 mcr
|= UART_MCR_RTS
;
1499 if (mctrl
& TIOCM_DTR
)
1500 mcr
|= UART_MCR_DTR
;
1501 if (mctrl
& TIOCM_OUT1
)
1502 mcr
|= UART_MCR_OUT1
;
1503 if (mctrl
& TIOCM_OUT2
)
1504 mcr
|= UART_MCR_OUT2
;
1505 if (mctrl
& TIOCM_LOOP
)
1506 mcr
|= UART_MCR_LOOP
;
1508 mcr
= (mcr
& up
->mcr_mask
) | up
->mcr_force
| up
->mcr
;
1510 serial_out(up
, UART_MCR
, mcr
);
1513 static void serial8250_break_ctl(struct uart_port
*port
, int break_state
)
1515 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1516 unsigned long flags
;
1518 spin_lock_irqsave(&up
->port
.lock
, flags
);
1519 if (break_state
== -1)
1520 up
->lcr
|= UART_LCR_SBC
;
1522 up
->lcr
&= ~UART_LCR_SBC
;
1523 serial_out(up
, UART_LCR
, up
->lcr
);
1524 spin_unlock_irqrestore(&up
->port
.lock
, flags
);
1527 static int serial8250_startup(struct uart_port
*port
)
1529 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1530 unsigned long flags
;
1531 unsigned char lsr
, iir
;
1534 up
->capabilities
= uart_config
[up
->port
.type
].flags
;
1537 if (up
->port
.type
== PORT_16C950
) {
1538 /* Wake up and initialize UART */
1540 serial_outp(up
, UART_LCR
, 0xBF);
1541 serial_outp(up
, UART_EFR
, UART_EFR_ECB
);
1542 serial_outp(up
, UART_IER
, 0);
1543 serial_outp(up
, UART_LCR
, 0);
1544 serial_icr_write(up
, UART_CSR
, 0); /* Reset the UART */
1545 serial_outp(up
, UART_LCR
, 0xBF);
1546 serial_outp(up
, UART_EFR
, UART_EFR_ECB
);
1547 serial_outp(up
, UART_LCR
, 0);
1550 #ifdef CONFIG_SERIAL_8250_RSA
1552 * If this is an RSA port, see if we can kick it up to the
1553 * higher speed clock.
1559 * Clear the FIFO buffers and disable them.
1560 * (they will be reenabled in set_termios())
1562 serial8250_clear_fifos(up
);
1565 * Clear the interrupt registers.
1567 (void) serial_inp(up
, UART_LSR
);
1568 (void) serial_inp(up
, UART_RX
);
1569 (void) serial_inp(up
, UART_IIR
);
1570 (void) serial_inp(up
, UART_MSR
);
1573 * At this point, there's no way the LSR could still be 0xff;
1574 * if it is, then bail out, because there's likely no UART
1577 if (!(up
->port
.flags
& UPF_BUGGY_UART
) &&
1578 (serial_inp(up
, UART_LSR
) == 0xff)) {
1579 printk("ttyS%d: LSR safety check engaged!\n", up
->port
.line
);
1584 * For a XR16C850, we need to set the trigger levels
1586 if (up
->port
.type
== PORT_16850
) {
1589 serial_outp(up
, UART_LCR
, 0xbf);
1591 fctr
= serial_inp(up
, UART_FCTR
) & ~(UART_FCTR_RX
|UART_FCTR_TX
);
1592 serial_outp(up
, UART_FCTR
, fctr
| UART_FCTR_TRGD
| UART_FCTR_RX
);
1593 serial_outp(up
, UART_TRG
, UART_TRG_96
);
1594 serial_outp(up
, UART_FCTR
, fctr
| UART_FCTR_TRGD
| UART_FCTR_TX
);
1595 serial_outp(up
, UART_TRG
, UART_TRG_96
);
1597 serial_outp(up
, UART_LCR
, 0);
1601 * If the "interrupt" for this port doesn't correspond with any
1602 * hardware interrupt, we use a timer-based system. The original
1603 * driver used to do this with IRQ0.
1605 if (!is_real_interrupt(up
->port
.irq
)) {
1606 unsigned int timeout
= up
->port
.timeout
;
1608 timeout
= timeout
> 6 ? (timeout
/ 2 - 2) : 1;
1610 up
->timer
.data
= (unsigned long)up
;
1611 mod_timer(&up
->timer
, jiffies
+ timeout
);
1613 retval
= serial_link_irq_chain(up
);
1619 * Now, initialize the UART
1621 serial_outp(up
, UART_LCR
, UART_LCR_WLEN8
);
1623 spin_lock_irqsave(&up
->port
.lock
, flags
);
1624 if (up
->port
.flags
& UPF_FOURPORT
) {
1625 if (!is_real_interrupt(up
->port
.irq
))
1626 up
->port
.mctrl
|= TIOCM_OUT1
;
1629 * Most PC uarts need OUT2 raised to enable interrupts.
1631 if (is_real_interrupt(up
->port
.irq
))
1632 up
->port
.mctrl
|= TIOCM_OUT2
;
1634 serial8250_set_mctrl(&up
->port
, up
->port
.mctrl
);
1637 * Do a quick test to see if we receive an
1638 * interrupt when we enable the TX irq.
1640 serial_outp(up
, UART_IER
, UART_IER_THRI
);
1641 lsr
= serial_in(up
, UART_LSR
);
1642 iir
= serial_in(up
, UART_IIR
);
1643 serial_outp(up
, UART_IER
, 0);
1645 if (lsr
& UART_LSR_TEMT
&& iir
& UART_IIR_NO_INT
) {
1646 if (!(up
->bugs
& UART_BUG_TXEN
)) {
1647 up
->bugs
|= UART_BUG_TXEN
;
1648 pr_debug("ttyS%d - enabling bad tx status workarounds\n",
1652 up
->bugs
&= ~UART_BUG_TXEN
;
1655 spin_unlock_irqrestore(&up
->port
.lock
, flags
);
1658 * Finally, enable interrupts. Note: Modem status interrupts
1659 * are set via set_termios(), which will be occurring imminently
1660 * anyway, so we don't enable them here.
1662 up
->ier
= UART_IER_RLSI
| UART_IER_RDI
;
1663 serial_outp(up
, UART_IER
, up
->ier
);
1665 if (up
->port
.flags
& UPF_FOURPORT
) {
1668 * Enable interrupts on the AST Fourport board
1670 icp
= (up
->port
.iobase
& 0xfe0) | 0x01f;
1676 * And clear the interrupt registers again for luck.
1678 (void) serial_inp(up
, UART_LSR
);
1679 (void) serial_inp(up
, UART_RX
);
1680 (void) serial_inp(up
, UART_IIR
);
1681 (void) serial_inp(up
, UART_MSR
);
1686 static void serial8250_shutdown(struct uart_port
*port
)
1688 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1689 unsigned long flags
;
1692 * Disable interrupts from this port
1695 serial_outp(up
, UART_IER
, 0);
1697 spin_lock_irqsave(&up
->port
.lock
, flags
);
1698 if (up
->port
.flags
& UPF_FOURPORT
) {
1699 /* reset interrupts on the AST Fourport board */
1700 inb((up
->port
.iobase
& 0xfe0) | 0x1f);
1701 up
->port
.mctrl
|= TIOCM_OUT1
;
1703 up
->port
.mctrl
&= ~TIOCM_OUT2
;
1705 serial8250_set_mctrl(&up
->port
, up
->port
.mctrl
);
1706 spin_unlock_irqrestore(&up
->port
.lock
, flags
);
1709 * Disable break condition and FIFOs
1711 serial_out(up
, UART_LCR
, serial_inp(up
, UART_LCR
) & ~UART_LCR_SBC
);
1712 serial8250_clear_fifos(up
);
1714 #ifdef CONFIG_SERIAL_8250_RSA
1716 * Reset the RSA board back to 115kbps compat mode.
1722 * Read data port to reset things, and then unlink from
1725 (void) serial_in(up
, UART_RX
);
1727 if (!is_real_interrupt(up
->port
.irq
))
1728 del_timer_sync(&up
->timer
);
1730 serial_unlink_irq_chain(up
);
1733 static unsigned int serial8250_get_divisor(struct uart_port
*port
, unsigned int baud
)
1738 * Handle magic divisors for baud rates above baud_base on
1739 * SMSC SuperIO chips.
1741 if ((port
->flags
& UPF_MAGIC_MULTIPLIER
) &&
1742 baud
== (port
->uartclk
/4))
1744 else if ((port
->flags
& UPF_MAGIC_MULTIPLIER
) &&
1745 baud
== (port
->uartclk
/8))
1748 quot
= uart_get_divisor(port
, baud
);
1754 serial8250_set_termios(struct uart_port
*port
, struct termios
*termios
,
1755 struct termios
*old
)
1757 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1758 unsigned char cval
, fcr
= 0;
1759 unsigned long flags
;
1760 unsigned int baud
, quot
;
1762 switch (termios
->c_cflag
& CSIZE
) {
1764 cval
= UART_LCR_WLEN5
;
1767 cval
= UART_LCR_WLEN6
;
1770 cval
= UART_LCR_WLEN7
;
1774 cval
= UART_LCR_WLEN8
;
1778 if (termios
->c_cflag
& CSTOPB
)
1779 cval
|= UART_LCR_STOP
;
1780 if (termios
->c_cflag
& PARENB
)
1781 cval
|= UART_LCR_PARITY
;
1782 if (!(termios
->c_cflag
& PARODD
))
1783 cval
|= UART_LCR_EPAR
;
1785 if (termios
->c_cflag
& CMSPAR
)
1786 cval
|= UART_LCR_SPAR
;
1790 * Ask the core to calculate the divisor for us.
1792 baud
= uart_get_baud_rate(port
, termios
, old
, 0, port
->uartclk
/16);
1793 quot
= serial8250_get_divisor(port
, baud
);
1796 * Oxford Semi 952 rev B workaround
1798 if (up
->bugs
& UART_BUG_QUOT
&& (quot
& 0xff) == 0)
1801 if (up
->capabilities
& UART_CAP_FIFO
&& up
->port
.fifosize
> 1) {
1803 fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_TRIGGER_1
;
1805 fcr
= uart_config
[up
->port
.type
].fcr
;
1809 * MCR-based auto flow control. When AFE is enabled, RTS will be
1810 * deasserted when the receive FIFO contains more characters than
1811 * the trigger, or the MCR RTS bit is cleared. In the case where
1812 * the remote UART is not using CTS auto flow control, we must
1813 * have sufficient FIFO entries for the latency of the remote
1814 * UART to respond. IOW, at least 32 bytes of FIFO.
1816 if (up
->capabilities
& UART_CAP_AFE
&& up
->port
.fifosize
>= 32) {
1817 up
->mcr
&= ~UART_MCR_AFE
;
1818 if (termios
->c_cflag
& CRTSCTS
)
1819 up
->mcr
|= UART_MCR_AFE
;
1823 * Ok, we're now changing the port state. Do it with
1824 * interrupts disabled.
1826 spin_lock_irqsave(&up
->port
.lock
, flags
);
1829 * Update the per-port timeout.
1831 uart_update_timeout(port
, termios
->c_cflag
, baud
);
1833 up
->port
.read_status_mask
= UART_LSR_OE
| UART_LSR_THRE
| UART_LSR_DR
;
1834 if (termios
->c_iflag
& INPCK
)
1835 up
->port
.read_status_mask
|= UART_LSR_FE
| UART_LSR_PE
;
1836 if (termios
->c_iflag
& (BRKINT
| PARMRK
))
1837 up
->port
.read_status_mask
|= UART_LSR_BI
;
1840 * Characteres to ignore
1842 up
->port
.ignore_status_mask
= 0;
1843 if (termios
->c_iflag
& IGNPAR
)
1844 up
->port
.ignore_status_mask
|= UART_LSR_PE
| UART_LSR_FE
;
1845 if (termios
->c_iflag
& IGNBRK
) {
1846 up
->port
.ignore_status_mask
|= UART_LSR_BI
;
1848 * If we're ignoring parity and break indicators,
1849 * ignore overruns too (for real raw support).
1851 if (termios
->c_iflag
& IGNPAR
)
1852 up
->port
.ignore_status_mask
|= UART_LSR_OE
;
1856 * ignore all characters if CREAD is not set
1858 if ((termios
->c_cflag
& CREAD
) == 0)
1859 up
->port
.ignore_status_mask
|= UART_LSR_DR
;
1862 * CTS flow control flag and modem status interrupts
1864 up
->ier
&= ~UART_IER_MSI
;
1865 if (!(up
->bugs
& UART_BUG_NOMSR
) &&
1866 UART_ENABLE_MS(&up
->port
, termios
->c_cflag
))
1867 up
->ier
|= UART_IER_MSI
;
1868 if (up
->capabilities
& UART_CAP_UUE
)
1869 up
->ier
|= UART_IER_UUE
| UART_IER_RTOIE
;
1871 serial_out(up
, UART_IER
, up
->ier
);
1873 if (up
->capabilities
& UART_CAP_EFR
) {
1874 unsigned char efr
= 0;
1876 * TI16C752/Startech hardware flow control. FIXME:
1877 * - TI16C752 requires control thresholds to be set.
1878 * - UART_MCR_RTS is ineffective if auto-RTS mode is enabled.
1880 if (termios
->c_cflag
& CRTSCTS
)
1881 efr
|= UART_EFR_CTS
;
1883 serial_outp(up
, UART_LCR
, 0xBF);
1884 serial_outp(up
, UART_EFR
, efr
);
1887 if (up
->capabilities
& UART_NATSEMI
) {
1888 /* Switch to bank 2 not bank 1, to avoid resetting EXCR2 */
1889 serial_outp(up
, UART_LCR
, 0xe0);
1891 serial_outp(up
, UART_LCR
, cval
| UART_LCR_DLAB
);/* set DLAB */
1894 serial_dl_write(up
, quot
);
1897 * LCR DLAB must be set to enable 64-byte FIFO mode. If the FCR
1898 * is written without DLAB set, this mode will be disabled.
1900 if (up
->port
.type
== PORT_16750
)
1901 serial_outp(up
, UART_FCR
, fcr
);
1903 serial_outp(up
, UART_LCR
, cval
); /* reset DLAB */
1904 up
->lcr
= cval
; /* Save LCR */
1905 if (up
->port
.type
!= PORT_16750
) {
1906 if (fcr
& UART_FCR_ENABLE_FIFO
) {
1907 /* emulated UARTs (Lucent Venus 167x) need two steps */
1908 serial_outp(up
, UART_FCR
, UART_FCR_ENABLE_FIFO
);
1910 serial_outp(up
, UART_FCR
, fcr
); /* set fcr */
1912 serial8250_set_mctrl(&up
->port
, up
->port
.mctrl
);
1913 spin_unlock_irqrestore(&up
->port
.lock
, flags
);
1917 serial8250_pm(struct uart_port
*port
, unsigned int state
,
1918 unsigned int oldstate
)
1920 struct uart_8250_port
*p
= (struct uart_8250_port
*)port
;
1922 serial8250_set_sleep(p
, state
!= 0);
1925 p
->pm(port
, state
, oldstate
);
1929 * Resource handling.
1931 static int serial8250_request_std_resource(struct uart_8250_port
*up
)
1933 unsigned int size
= 8 << up
->port
.regshift
;
1936 switch (up
->port
.iotype
) {
1941 if (!up
->port
.mapbase
)
1944 if (!request_mem_region(up
->port
.mapbase
, size
, "serial")) {
1949 if (up
->port
.flags
& UPF_IOREMAP
) {
1950 up
->port
.membase
= ioremap(up
->port
.mapbase
, size
);
1951 if (!up
->port
.membase
) {
1952 release_mem_region(up
->port
.mapbase
, size
);
1960 if (!request_region(up
->port
.iobase
, size
, "serial"))
1967 static void serial8250_release_std_resource(struct uart_8250_port
*up
)
1969 unsigned int size
= 8 << up
->port
.regshift
;
1971 switch (up
->port
.iotype
) {
1976 if (!up
->port
.mapbase
)
1979 if (up
->port
.flags
& UPF_IOREMAP
) {
1980 iounmap(up
->port
.membase
);
1981 up
->port
.membase
= NULL
;
1984 release_mem_region(up
->port
.mapbase
, size
);
1989 release_region(up
->port
.iobase
, size
);
1994 static int serial8250_request_rsa_resource(struct uart_8250_port
*up
)
1996 unsigned long start
= UART_RSA_BASE
<< up
->port
.regshift
;
1997 unsigned int size
= 8 << up
->port
.regshift
;
2000 switch (up
->port
.iotype
) {
2007 start
+= up
->port
.iobase
;
2008 if (!request_region(start
, size
, "serial-rsa"))
2016 static void serial8250_release_rsa_resource(struct uart_8250_port
*up
)
2018 unsigned long offset
= UART_RSA_BASE
<< up
->port
.regshift
;
2019 unsigned int size
= 8 << up
->port
.regshift
;
2021 switch (up
->port
.iotype
) {
2027 release_region(up
->port
.iobase
+ offset
, size
);
2032 static void serial8250_release_port(struct uart_port
*port
)
2034 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
2036 serial8250_release_std_resource(up
);
2037 if (up
->port
.type
== PORT_RSA
)
2038 serial8250_release_rsa_resource(up
);
2041 static int serial8250_request_port(struct uart_port
*port
)
2043 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
2046 ret
= serial8250_request_std_resource(up
);
2047 if (ret
== 0 && up
->port
.type
== PORT_RSA
) {
2048 ret
= serial8250_request_rsa_resource(up
);
2050 serial8250_release_std_resource(up
);
2056 static void serial8250_config_port(struct uart_port
*port
, int flags
)
2058 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
2059 int probeflags
= PROBE_ANY
;
2063 * Find the region that we can probe for. This in turn
2064 * tells us whether we can probe for the type of port.
2066 ret
= serial8250_request_std_resource(up
);
2070 ret
= serial8250_request_rsa_resource(up
);
2072 probeflags
&= ~PROBE_RSA
;
2074 if (flags
& UART_CONFIG_TYPE
)
2075 autoconfig(up
, probeflags
);
2076 if (up
->port
.type
!= PORT_UNKNOWN
&& flags
& UART_CONFIG_IRQ
)
2079 if (up
->port
.type
!= PORT_RSA
&& probeflags
& PROBE_RSA
)
2080 serial8250_release_rsa_resource(up
);
2081 if (up
->port
.type
== PORT_UNKNOWN
)
2082 serial8250_release_std_resource(up
);
2086 serial8250_verify_port(struct uart_port
*port
, struct serial_struct
*ser
)
2088 if (ser
->irq
>= NR_IRQS
|| ser
->irq
< 0 ||
2089 ser
->baud_base
< 9600 || ser
->type
< PORT_UNKNOWN
||
2090 ser
->type
>= ARRAY_SIZE(uart_config
) || ser
->type
== PORT_CIRRUS
||
2091 ser
->type
== PORT_STARTECH
)
2097 serial8250_type(struct uart_port
*port
)
2099 int type
= port
->type
;
2101 if (type
>= ARRAY_SIZE(uart_config
))
2103 return uart_config
[type
].name
;
2106 static struct uart_ops serial8250_pops
= {
2107 .tx_empty
= serial8250_tx_empty
,
2108 .set_mctrl
= serial8250_set_mctrl
,
2109 .get_mctrl
= serial8250_get_mctrl
,
2110 .stop_tx
= serial8250_stop_tx
,
2111 .start_tx
= serial8250_start_tx
,
2112 .stop_rx
= serial8250_stop_rx
,
2113 .enable_ms
= serial8250_enable_ms
,
2114 .break_ctl
= serial8250_break_ctl
,
2115 .startup
= serial8250_startup
,
2116 .shutdown
= serial8250_shutdown
,
2117 .set_termios
= serial8250_set_termios
,
2118 .pm
= serial8250_pm
,
2119 .type
= serial8250_type
,
2120 .release_port
= serial8250_release_port
,
2121 .request_port
= serial8250_request_port
,
2122 .config_port
= serial8250_config_port
,
2123 .verify_port
= serial8250_verify_port
,
2126 static struct uart_8250_port serial8250_ports
[UART_NR
];
2128 static void __init
serial8250_isa_init_ports(void)
2130 struct uart_8250_port
*up
;
2131 static int first
= 1;
2138 for (i
= 0; i
< nr_uarts
; i
++) {
2139 struct uart_8250_port
*up
= &serial8250_ports
[i
];
2142 spin_lock_init(&up
->port
.lock
);
2144 init_timer(&up
->timer
);
2145 up
->timer
.function
= serial8250_timeout
;
2148 * ALPHA_KLUDGE_MCR needs to be killed.
2150 up
->mcr_mask
= ~ALPHA_KLUDGE_MCR
;
2151 up
->mcr_force
= ALPHA_KLUDGE_MCR
;
2153 up
->port
.ops
= &serial8250_pops
;
2156 for (i
= 0, up
= serial8250_ports
;
2157 i
< ARRAY_SIZE(old_serial_port
) && i
< nr_uarts
;
2159 up
->port
.iobase
= old_serial_port
[i
].port
;
2160 up
->port
.irq
= irq_canonicalize(old_serial_port
[i
].irq
);
2161 up
->port
.uartclk
= old_serial_port
[i
].baud_base
* 16;
2162 up
->port
.flags
= old_serial_port
[i
].flags
;
2163 up
->port
.hub6
= old_serial_port
[i
].hub6
;
2164 up
->port
.membase
= old_serial_port
[i
].iomem_base
;
2165 up
->port
.iotype
= old_serial_port
[i
].io_type
;
2166 up
->port
.regshift
= old_serial_port
[i
].iomem_reg_shift
;
2168 up
->port
.flags
|= UPF_SHARE_IRQ
;
2173 serial8250_register_ports(struct uart_driver
*drv
, struct device
*dev
)
2177 serial8250_isa_init_ports();
2179 for (i
= 0; i
< nr_uarts
; i
++) {
2180 struct uart_8250_port
*up
= &serial8250_ports
[i
];
2183 uart_add_one_port(drv
, &up
->port
);
2187 #ifdef CONFIG_SERIAL_8250_CONSOLE
2189 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
2192 * Wait for transmitter & holding register to empty
2194 static inline void wait_for_xmitr(struct uart_8250_port
*up
, int bits
)
2196 unsigned int status
, tmout
= 10000;
2198 /* Wait up to 10ms for the character(s) to be sent. */
2200 status
= serial_in(up
, UART_LSR
);
2202 if (status
& UART_LSR_BI
)
2203 up
->lsr_break_flag
= UART_LSR_BI
;
2208 } while ((status
& bits
) != bits
);
2210 /* Wait up to 1s for flow control if necessary */
2211 if (up
->port
.flags
& UPF_CONS_FLOW
) {
2214 ((serial_in(up
, UART_MSR
) & UART_MSR_CTS
) == 0))
2219 static void serial8250_console_putchar(struct uart_port
*port
, int ch
)
2221 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
2223 wait_for_xmitr(up
, UART_LSR_THRE
);
2224 serial_out(up
, UART_TX
, ch
);
2228 * Print a string to the serial port trying not to disturb
2229 * any possible real use of the port...
2231 * The console_lock must be held when we get here.
2234 serial8250_console_write(struct console
*co
, const char *s
, unsigned int count
)
2236 struct uart_8250_port
*up
= &serial8250_ports
[co
->index
];
2237 unsigned long flags
;
2241 touch_nmi_watchdog();
2243 if (oops_in_progress
) {
2244 locked
= spin_trylock_irqsave(&up
->port
.lock
, flags
);
2246 spin_lock_irqsave(&up
->port
.lock
, flags
);
2249 * First save the IER then disable the interrupts
2251 ier
= serial_in(up
, UART_IER
);
2253 if (up
->capabilities
& UART_CAP_UUE
)
2254 serial_out(up
, UART_IER
, UART_IER_UUE
);
2256 serial_out(up
, UART_IER
, 0);
2258 uart_console_write(&up
->port
, s
, count
, serial8250_console_putchar
);
2261 * Finally, wait for transmitter to become empty
2262 * and restore the IER
2264 wait_for_xmitr(up
, BOTH_EMPTY
);
2265 serial_out(up
, UART_IER
, ier
);
2268 spin_unlock_irqrestore(&up
->port
.lock
, flags
);
2271 static int serial8250_console_setup(struct console
*co
, char *options
)
2273 struct uart_port
*port
;
2280 * Check whether an invalid uart number has been specified, and
2281 * if so, search for the first available port that does have
2284 if (co
->index
>= nr_uarts
)
2286 port
= &serial8250_ports
[co
->index
].port
;
2287 if (!port
->iobase
&& !port
->membase
)
2291 uart_parse_options(options
, &baud
, &parity
, &bits
, &flow
);
2293 return uart_set_options(port
, co
, baud
, parity
, bits
, flow
);
2296 static struct uart_driver serial8250_reg
;
2297 static struct console serial8250_console
= {
2299 .write
= serial8250_console_write
,
2300 .device
= uart_console_device
,
2301 .setup
= serial8250_console_setup
,
2302 .flags
= CON_PRINTBUFFER
,
2304 .data
= &serial8250_reg
,
2307 static int __init
serial8250_console_init(void)
2309 serial8250_isa_init_ports();
2310 register_console(&serial8250_console
);
2313 console_initcall(serial8250_console_init
);
2315 static int __init
find_port(struct uart_port
*p
)
2318 struct uart_port
*port
;
2320 for (line
= 0; line
< nr_uarts
; line
++) {
2321 port
= &serial8250_ports
[line
].port
;
2322 if (uart_match_port(p
, port
))
2328 int __init
serial8250_start_console(struct uart_port
*port
, char *options
)
2332 line
= find_port(port
);
2336 add_preferred_console("ttyS", line
, options
);
2337 printk("Adding console on ttyS%d at %s 0x%lx (options '%s')\n",
2338 line
, port
->iotype
== UPIO_MEM
? "MMIO" : "I/O port",
2339 port
->iotype
== UPIO_MEM
? (unsigned long) port
->mapbase
:
2340 (unsigned long) port
->iobase
, options
);
2341 if (!(serial8250_console
.flags
& CON_ENABLED
)) {
2342 serial8250_console
.flags
&= ~CON_PRINTBUFFER
;
2343 register_console(&serial8250_console
);
2348 #define SERIAL8250_CONSOLE &serial8250_console
2350 #define SERIAL8250_CONSOLE NULL
2353 static struct uart_driver serial8250_reg
= {
2354 .owner
= THIS_MODULE
,
2355 .driver_name
= "serial",
2360 .cons
= SERIAL8250_CONSOLE
,
2364 * early_serial_setup - early registration for 8250 ports
2366 * Setup an 8250 port structure prior to console initialisation. Use
2367 * after console initialisation will cause undefined behaviour.
2369 int __init
early_serial_setup(struct uart_port
*port
)
2371 if (port
->line
>= ARRAY_SIZE(serial8250_ports
))
2374 serial8250_isa_init_ports();
2375 serial8250_ports
[port
->line
].port
= *port
;
2376 serial8250_ports
[port
->line
].port
.ops
= &serial8250_pops
;
2381 * serial8250_suspend_port - suspend one serial port
2382 * @line: serial line number
2383 * @level: the level of port suspension, as per uart_suspend_port
2385 * Suspend one serial port.
2387 void serial8250_suspend_port(int line
)
2389 uart_suspend_port(&serial8250_reg
, &serial8250_ports
[line
].port
);
2393 * serial8250_resume_port - resume one serial port
2394 * @line: serial line number
2395 * @level: the level of port resumption, as per uart_resume_port
2397 * Resume one serial port.
2399 void serial8250_resume_port(int line
)
2401 uart_resume_port(&serial8250_reg
, &serial8250_ports
[line
].port
);
2405 * Register a set of serial devices attached to a platform device. The
2406 * list is terminated with a zero flags entry, which means we expect
2407 * all entries to have at least UPF_BOOT_AUTOCONF set.
2409 static int __devinit
serial8250_probe(struct platform_device
*dev
)
2411 struct plat_serial8250_port
*p
= dev
->dev
.platform_data
;
2412 struct uart_port port
;
2415 memset(&port
, 0, sizeof(struct uart_port
));
2417 for (i
= 0; p
&& p
->flags
!= 0; p
++, i
++) {
2418 port
.iobase
= p
->iobase
;
2419 port
.membase
= p
->membase
;
2421 port
.uartclk
= p
->uartclk
;
2422 port
.regshift
= p
->regshift
;
2423 port
.iotype
= p
->iotype
;
2424 port
.flags
= p
->flags
;
2425 port
.mapbase
= p
->mapbase
;
2426 port
.hub6
= p
->hub6
;
2427 port
.dev
= &dev
->dev
;
2429 port
.flags
|= UPF_SHARE_IRQ
;
2430 ret
= serial8250_register_port(&port
);
2432 dev_err(&dev
->dev
, "unable to register port at index %d "
2433 "(IO%lx MEM%lx IRQ%d): %d\n", i
,
2434 p
->iobase
, p
->mapbase
, p
->irq
, ret
);
2441 * Remove serial ports registered against a platform device.
2443 static int __devexit
serial8250_remove(struct platform_device
*dev
)
2447 for (i
= 0; i
< nr_uarts
; i
++) {
2448 struct uart_8250_port
*up
= &serial8250_ports
[i
];
2450 if (up
->port
.dev
== &dev
->dev
)
2451 serial8250_unregister_port(i
);
2456 static int serial8250_suspend(struct platform_device
*dev
, pm_message_t state
)
2460 for (i
= 0; i
< UART_NR
; i
++) {
2461 struct uart_8250_port
*up
= &serial8250_ports
[i
];
2463 if (up
->port
.type
!= PORT_UNKNOWN
&& up
->port
.dev
== &dev
->dev
)
2464 uart_suspend_port(&serial8250_reg
, &up
->port
);
2470 static int serial8250_resume(struct platform_device
*dev
)
2474 for (i
= 0; i
< UART_NR
; i
++) {
2475 struct uart_8250_port
*up
= &serial8250_ports
[i
];
2477 if (up
->port
.type
!= PORT_UNKNOWN
&& up
->port
.dev
== &dev
->dev
)
2478 uart_resume_port(&serial8250_reg
, &up
->port
);
2484 static struct platform_driver serial8250_isa_driver
= {
2485 .probe
= serial8250_probe
,
2486 .remove
= __devexit_p(serial8250_remove
),
2487 .suspend
= serial8250_suspend
,
2488 .resume
= serial8250_resume
,
2490 .name
= "serial8250",
2491 .owner
= THIS_MODULE
,
2496 * This "device" covers _all_ ISA 8250-compatible serial devices listed
2497 * in the table in include/asm/serial.h
2499 static struct platform_device
*serial8250_isa_devs
;
2502 * serial8250_register_port and serial8250_unregister_port allows for
2503 * 16x50 serial ports to be configured at run-time, to support PCMCIA
2504 * modems and PCI multiport cards.
2506 static DEFINE_MUTEX(serial_mutex
);
2508 static struct uart_8250_port
*serial8250_find_match_or_unused(struct uart_port
*port
)
2513 * First, find a port entry which matches.
2515 for (i
= 0; i
< nr_uarts
; i
++)
2516 if (uart_match_port(&serial8250_ports
[i
].port
, port
))
2517 return &serial8250_ports
[i
];
2520 * We didn't find a matching entry, so look for the first
2521 * free entry. We look for one which hasn't been previously
2522 * used (indicated by zero iobase).
2524 for (i
= 0; i
< nr_uarts
; i
++)
2525 if (serial8250_ports
[i
].port
.type
== PORT_UNKNOWN
&&
2526 serial8250_ports
[i
].port
.iobase
== 0)
2527 return &serial8250_ports
[i
];
2530 * That also failed. Last resort is to find any entry which
2531 * doesn't have a real port associated with it.
2533 for (i
= 0; i
< nr_uarts
; i
++)
2534 if (serial8250_ports
[i
].port
.type
== PORT_UNKNOWN
)
2535 return &serial8250_ports
[i
];
2541 * serial8250_register_port - register a serial port
2542 * @port: serial port template
2544 * Configure the serial port specified by the request. If the
2545 * port exists and is in use, it is hung up and unregistered
2548 * The port is then probed and if necessary the IRQ is autodetected
2549 * If this fails an error is returned.
2551 * On success the port is ready to use and the line number is returned.
2553 int serial8250_register_port(struct uart_port
*port
)
2555 struct uart_8250_port
*uart
;
2558 if (port
->uartclk
== 0)
2561 mutex_lock(&serial_mutex
);
2563 uart
= serial8250_find_match_or_unused(port
);
2565 uart_remove_one_port(&serial8250_reg
, &uart
->port
);
2567 uart
->port
.iobase
= port
->iobase
;
2568 uart
->port
.membase
= port
->membase
;
2569 uart
->port
.irq
= port
->irq
;
2570 uart
->port
.uartclk
= port
->uartclk
;
2571 uart
->port
.fifosize
= port
->fifosize
;
2572 uart
->port
.regshift
= port
->regshift
;
2573 uart
->port
.iotype
= port
->iotype
;
2574 uart
->port
.flags
= port
->flags
| UPF_BOOT_AUTOCONF
;
2575 uart
->port
.mapbase
= port
->mapbase
;
2577 uart
->port
.dev
= port
->dev
;
2579 ret
= uart_add_one_port(&serial8250_reg
, &uart
->port
);
2581 ret
= uart
->port
.line
;
2583 mutex_unlock(&serial_mutex
);
2587 EXPORT_SYMBOL(serial8250_register_port
);
2590 * serial8250_unregister_port - remove a 16x50 serial port at runtime
2591 * @line: serial line number
2593 * Remove one serial port. This may not be called from interrupt
2594 * context. We hand the port back to the our control.
2596 void serial8250_unregister_port(int line
)
2598 struct uart_8250_port
*uart
= &serial8250_ports
[line
];
2600 mutex_lock(&serial_mutex
);
2601 uart_remove_one_port(&serial8250_reg
, &uart
->port
);
2602 if (serial8250_isa_devs
) {
2603 uart
->port
.flags
&= ~UPF_BOOT_AUTOCONF
;
2604 uart
->port
.type
= PORT_UNKNOWN
;
2605 uart
->port
.dev
= &serial8250_isa_devs
->dev
;
2606 uart_add_one_port(&serial8250_reg
, &uart
->port
);
2608 uart
->port
.dev
= NULL
;
2610 mutex_unlock(&serial_mutex
);
2612 EXPORT_SYMBOL(serial8250_unregister_port
);
2614 static int __init
serial8250_init(void)
2618 if (nr_uarts
> UART_NR
)
2621 printk(KERN_INFO
"Serial: 8250/16550 driver $Revision: 1.90 $ "
2622 "%d ports, IRQ sharing %sabled\n", nr_uarts
,
2623 share_irqs
? "en" : "dis");
2625 for (i
= 0; i
< NR_IRQS
; i
++)
2626 spin_lock_init(&irq_lists
[i
].lock
);
2628 ret
= uart_register_driver(&serial8250_reg
);
2632 serial8250_isa_devs
= platform_device_alloc("serial8250",
2633 PLAT8250_DEV_LEGACY
);
2634 if (!serial8250_isa_devs
) {
2636 goto unreg_uart_drv
;
2639 ret
= platform_device_add(serial8250_isa_devs
);
2643 serial8250_register_ports(&serial8250_reg
, &serial8250_isa_devs
->dev
);
2645 ret
= platform_driver_register(&serial8250_isa_driver
);
2649 platform_device_del(serial8250_isa_devs
);
2651 platform_device_put(serial8250_isa_devs
);
2653 uart_unregister_driver(&serial8250_reg
);
2658 static void __exit
serial8250_exit(void)
2660 struct platform_device
*isa_dev
= serial8250_isa_devs
;
2663 * This tells serial8250_unregister_port() not to re-register
2664 * the ports (thereby making serial8250_isa_driver permanently
2667 serial8250_isa_devs
= NULL
;
2669 platform_driver_unregister(&serial8250_isa_driver
);
2670 platform_device_unregister(isa_dev
);
2672 uart_unregister_driver(&serial8250_reg
);
2675 module_init(serial8250_init
);
2676 module_exit(serial8250_exit
);
2678 EXPORT_SYMBOL(serial8250_suspend_port
);
2679 EXPORT_SYMBOL(serial8250_resume_port
);
2681 MODULE_LICENSE("GPL");
2682 MODULE_DESCRIPTION("Generic 8250/16x50 serial driver $Revision: 1.90 $");
2684 module_param(share_irqs
, uint
, 0644);
2685 MODULE_PARM_DESC(share_irqs
, "Share IRQs with other non-8250/16x50 devices"
2688 module_param(nr_uarts
, uint
, 0644);
2689 MODULE_PARM_DESC(nr_uarts
, "Maximum number of UARTs supported. (1-" __MODULE_STRING(CONFIG_SERIAL_8250_NR_UARTS
) ")");
2691 #ifdef CONFIG_SERIAL_8250_RSA
2692 module_param_array(probe_rsa
, ulong
, &probe_rsa_count
, 0444);
2693 MODULE_PARM_DESC(probe_rsa
, "Probe I/O ports for RSA");
2695 MODULE_ALIAS_CHARDEV_MAJOR(TTY_MAJOR
);