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dz: test after postfix decrement fails in dz_console_putchar()
[deliverable/linux.git] / drivers / serial / atmel_serial.c
1 /*
2 * linux/drivers/char/atmel_serial.c
3 *
4 * Driver for Atmel AT91 / AT32 Serial ports
5 * Copyright (C) 2003 Rick Bronson
6 *
7 * Based on drivers/char/serial_sa1100.c, by Deep Blue Solutions Ltd.
8 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
9 *
10 * DMA support added by Chip Coldwell.
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 *
26 */
27 #include <linux/module.h>
28 #include <linux/tty.h>
29 #include <linux/ioport.h>
30 #include <linux/slab.h>
31 #include <linux/init.h>
32 #include <linux/serial.h>
33 #include <linux/clk.h>
34 #include <linux/console.h>
35 #include <linux/sysrq.h>
36 #include <linux/tty_flip.h>
37 #include <linux/platform_device.h>
38 #include <linux/dma-mapping.h>
39 #include <linux/atmel_pdc.h>
40 #include <linux/atmel_serial.h>
41
42 #include <asm/io.h>
43
44 #include <asm/mach/serial_at91.h>
45 #include <asm/arch/board.h>
46
47 #ifdef CONFIG_ARM
48 #include <asm/arch/cpu.h>
49 #include <asm/arch/gpio.h>
50 #endif
51
52 #define PDC_BUFFER_SIZE 512
53 /* Revisit: We should calculate this based on the actual port settings */
54 #define PDC_RX_TIMEOUT (3 * 10) /* 3 bytes */
55
56 #if defined(CONFIG_SERIAL_ATMEL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
57 #define SUPPORT_SYSRQ
58 #endif
59
60 #include <linux/serial_core.h>
61
62 #ifdef CONFIG_SERIAL_ATMEL_TTYAT
63
64 /* Use device name ttyAT, major 204 and minor 154-169. This is necessary if we
65 * should coexist with the 8250 driver, such as if we have an external 16C550
66 * UART. */
67 #define SERIAL_ATMEL_MAJOR 204
68 #define MINOR_START 154
69 #define ATMEL_DEVICENAME "ttyAT"
70
71 #else
72
73 /* Use device name ttyS, major 4, minor 64-68. This is the usual serial port
74 * name, but it is legally reserved for the 8250 driver. */
75 #define SERIAL_ATMEL_MAJOR TTY_MAJOR
76 #define MINOR_START 64
77 #define ATMEL_DEVICENAME "ttyS"
78
79 #endif
80
81 #define ATMEL_ISR_PASS_LIMIT 256
82
83 /* UART registers. CR is write-only, hence no GET macro */
84 #define UART_PUT_CR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_CR)
85 #define UART_GET_MR(port) __raw_readl((port)->membase + ATMEL_US_MR)
86 #define UART_PUT_MR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_MR)
87 #define UART_PUT_IER(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IER)
88 #define UART_PUT_IDR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IDR)
89 #define UART_GET_IMR(port) __raw_readl((port)->membase + ATMEL_US_IMR)
90 #define UART_GET_CSR(port) __raw_readl((port)->membase + ATMEL_US_CSR)
91 #define UART_GET_CHAR(port) __raw_readl((port)->membase + ATMEL_US_RHR)
92 #define UART_PUT_CHAR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_THR)
93 #define UART_GET_BRGR(port) __raw_readl((port)->membase + ATMEL_US_BRGR)
94 #define UART_PUT_BRGR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_BRGR)
95 #define UART_PUT_RTOR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_RTOR)
96
97 /* PDC registers */
98 #define UART_PUT_PTCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_PTCR)
99 #define UART_GET_TCR(port) __raw_readl((port)->membase + ATMEL_PDC_TCR)
100 #define UART_GET_PTSR(port) __raw_readl((port)->membase + ATMEL_PDC_PTSR)
101
102 #define UART_PUT_RPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RPR)
103 #define UART_GET_RPR(port) __raw_readl((port)->membase + ATMEL_PDC_RPR)
104 #define UART_PUT_RCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RCR)
105 #define UART_PUT_RNPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNPR)
106 #define UART_PUT_RNCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNCR)
107
108 #define UART_PUT_TPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TPR)
109 #define UART_PUT_TCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TCR)
110 #define UART_GET_TCR(port) __raw_readl((port)->membase + ATMEL_PDC_TCR)
111
112 static int (*atmel_open_hook)(struct uart_port *);
113 static void (*atmel_close_hook)(struct uart_port *);
114
115 struct atmel_dma_buffer {
116 unsigned char *buf;
117 dma_addr_t dma_addr;
118 unsigned int dma_size;
119 unsigned int ofs;
120 };
121
122 struct atmel_uart_char {
123 u16 status;
124 u16 ch;
125 };
126
127 #define ATMEL_SERIAL_RINGSIZE 1024
128
129 /*
130 * We wrap our port structure around the generic uart_port.
131 */
132 struct atmel_uart_port {
133 struct uart_port uart; /* uart */
134 struct clk *clk; /* uart clock */
135 unsigned short suspended; /* is port suspended? */
136 int break_active; /* break being received */
137
138 short use_dma_rx; /* enable PDC receiver */
139 short pdc_rx_idx; /* current PDC RX buffer */
140 struct atmel_dma_buffer pdc_rx[2]; /* PDC receier */
141
142 short use_dma_tx; /* enable PDC transmitter */
143 struct atmel_dma_buffer pdc_tx; /* PDC transmitter */
144
145 struct tasklet_struct tasklet;
146 unsigned int irq_status;
147 unsigned int irq_status_prev;
148
149 struct circ_buf rx_ring;
150 };
151
152 static struct atmel_uart_port atmel_ports[ATMEL_MAX_UART];
153
154 #ifdef SUPPORT_SYSRQ
155 static struct console atmel_console;
156 #endif
157
158 static inline struct atmel_uart_port *
159 to_atmel_uart_port(struct uart_port *uart)
160 {
161 return container_of(uart, struct atmel_uart_port, uart);
162 }
163
164 #ifdef CONFIG_SERIAL_ATMEL_PDC
165 static bool atmel_use_dma_rx(struct uart_port *port)
166 {
167 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
168
169 return atmel_port->use_dma_rx;
170 }
171
172 static bool atmel_use_dma_tx(struct uart_port *port)
173 {
174 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
175
176 return atmel_port->use_dma_tx;
177 }
178 #else
179 static bool atmel_use_dma_rx(struct uart_port *port)
180 {
181 return false;
182 }
183
184 static bool atmel_use_dma_tx(struct uart_port *port)
185 {
186 return false;
187 }
188 #endif
189
190 /*
191 * Return TIOCSER_TEMT when transmitter FIFO and Shift register is empty.
192 */
193 static u_int atmel_tx_empty(struct uart_port *port)
194 {
195 return (UART_GET_CSR(port) & ATMEL_US_TXEMPTY) ? TIOCSER_TEMT : 0;
196 }
197
198 /*
199 * Set state of the modem control output lines
200 */
201 static void atmel_set_mctrl(struct uart_port *port, u_int mctrl)
202 {
203 unsigned int control = 0;
204 unsigned int mode;
205
206 #ifdef CONFIG_ARCH_AT91RM9200
207 if (cpu_is_at91rm9200()) {
208 /*
209 * AT91RM9200 Errata #39: RTS0 is not internally connected
210 * to PA21. We need to drive the pin manually.
211 */
212 if (port->mapbase == AT91RM9200_BASE_US0) {
213 if (mctrl & TIOCM_RTS)
214 at91_set_gpio_value(AT91_PIN_PA21, 0);
215 else
216 at91_set_gpio_value(AT91_PIN_PA21, 1);
217 }
218 }
219 #endif
220
221 if (mctrl & TIOCM_RTS)
222 control |= ATMEL_US_RTSEN;
223 else
224 control |= ATMEL_US_RTSDIS;
225
226 if (mctrl & TIOCM_DTR)
227 control |= ATMEL_US_DTREN;
228 else
229 control |= ATMEL_US_DTRDIS;
230
231 UART_PUT_CR(port, control);
232
233 /* Local loopback mode? */
234 mode = UART_GET_MR(port) & ~ATMEL_US_CHMODE;
235 if (mctrl & TIOCM_LOOP)
236 mode |= ATMEL_US_CHMODE_LOC_LOOP;
237 else
238 mode |= ATMEL_US_CHMODE_NORMAL;
239 UART_PUT_MR(port, mode);
240 }
241
242 /*
243 * Get state of the modem control input lines
244 */
245 static u_int atmel_get_mctrl(struct uart_port *port)
246 {
247 unsigned int status, ret = 0;
248
249 status = UART_GET_CSR(port);
250
251 /*
252 * The control signals are active low.
253 */
254 if (!(status & ATMEL_US_DCD))
255 ret |= TIOCM_CD;
256 if (!(status & ATMEL_US_CTS))
257 ret |= TIOCM_CTS;
258 if (!(status & ATMEL_US_DSR))
259 ret |= TIOCM_DSR;
260 if (!(status & ATMEL_US_RI))
261 ret |= TIOCM_RI;
262
263 return ret;
264 }
265
266 /*
267 * Stop transmitting.
268 */
269 static void atmel_stop_tx(struct uart_port *port)
270 {
271 if (atmel_use_dma_tx(port)) {
272 /* disable PDC transmit */
273 UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
274 UART_PUT_IDR(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
275 } else
276 UART_PUT_IDR(port, ATMEL_US_TXRDY);
277 }
278
279 /*
280 * Start transmitting.
281 */
282 static void atmel_start_tx(struct uart_port *port)
283 {
284 if (atmel_use_dma_tx(port)) {
285 if (UART_GET_PTSR(port) & ATMEL_PDC_TXTEN)
286 /* The transmitter is already running. Yes, we
287 really need this.*/
288 return;
289
290 UART_PUT_IER(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
291 /* re-enable PDC transmit */
292 UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
293 } else
294 UART_PUT_IER(port, ATMEL_US_TXRDY);
295 }
296
297 /*
298 * Stop receiving - port is in process of being closed.
299 */
300 static void atmel_stop_rx(struct uart_port *port)
301 {
302 if (atmel_use_dma_rx(port)) {
303 /* disable PDC receive */
304 UART_PUT_PTCR(port, ATMEL_PDC_RXTDIS);
305 UART_PUT_IDR(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
306 } else
307 UART_PUT_IDR(port, ATMEL_US_RXRDY);
308 }
309
310 /*
311 * Enable modem status interrupts
312 */
313 static void atmel_enable_ms(struct uart_port *port)
314 {
315 UART_PUT_IER(port, ATMEL_US_RIIC | ATMEL_US_DSRIC
316 | ATMEL_US_DCDIC | ATMEL_US_CTSIC);
317 }
318
319 /*
320 * Control the transmission of a break signal
321 */
322 static void atmel_break_ctl(struct uart_port *port, int break_state)
323 {
324 if (break_state != 0)
325 UART_PUT_CR(port, ATMEL_US_STTBRK); /* start break */
326 else
327 UART_PUT_CR(port, ATMEL_US_STPBRK); /* stop break */
328 }
329
330 /*
331 * Stores the incoming character in the ring buffer
332 */
333 static void
334 atmel_buffer_rx_char(struct uart_port *port, unsigned int status,
335 unsigned int ch)
336 {
337 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
338 struct circ_buf *ring = &atmel_port->rx_ring;
339 struct atmel_uart_char *c;
340
341 if (!CIRC_SPACE(ring->head, ring->tail, ATMEL_SERIAL_RINGSIZE))
342 /* Buffer overflow, ignore char */
343 return;
344
345 c = &((struct atmel_uart_char *)ring->buf)[ring->head];
346 c->status = status;
347 c->ch = ch;
348
349 /* Make sure the character is stored before we update head. */
350 smp_wmb();
351
352 ring->head = (ring->head + 1) & (ATMEL_SERIAL_RINGSIZE - 1);
353 }
354
355 /*
356 * Deal with parity, framing and overrun errors.
357 */
358 static void atmel_pdc_rxerr(struct uart_port *port, unsigned int status)
359 {
360 /* clear error */
361 UART_PUT_CR(port, ATMEL_US_RSTSTA);
362
363 if (status & ATMEL_US_RXBRK) {
364 /* ignore side-effect */
365 status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);
366 port->icount.brk++;
367 }
368 if (status & ATMEL_US_PARE)
369 port->icount.parity++;
370 if (status & ATMEL_US_FRAME)
371 port->icount.frame++;
372 if (status & ATMEL_US_OVRE)
373 port->icount.overrun++;
374 }
375
376 /*
377 * Characters received (called from interrupt handler)
378 */
379 static void atmel_rx_chars(struct uart_port *port)
380 {
381 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
382 unsigned int status, ch;
383
384 status = UART_GET_CSR(port);
385 while (status & ATMEL_US_RXRDY) {
386 ch = UART_GET_CHAR(port);
387
388 /*
389 * note that the error handling code is
390 * out of the main execution path
391 */
392 if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
393 | ATMEL_US_OVRE | ATMEL_US_RXBRK)
394 || atmel_port->break_active)) {
395
396 /* clear error */
397 UART_PUT_CR(port, ATMEL_US_RSTSTA);
398
399 if (status & ATMEL_US_RXBRK
400 && !atmel_port->break_active) {
401 atmel_port->break_active = 1;
402 UART_PUT_IER(port, ATMEL_US_RXBRK);
403 } else {
404 /*
405 * This is either the end-of-break
406 * condition or we've received at
407 * least one character without RXBRK
408 * being set. In both cases, the next
409 * RXBRK will indicate start-of-break.
410 */
411 UART_PUT_IDR(port, ATMEL_US_RXBRK);
412 status &= ~ATMEL_US_RXBRK;
413 atmel_port->break_active = 0;
414 }
415 }
416
417 atmel_buffer_rx_char(port, status, ch);
418 status = UART_GET_CSR(port);
419 }
420
421 tasklet_schedule(&atmel_port->tasklet);
422 }
423
424 /*
425 * Transmit characters (called from tasklet with TXRDY interrupt
426 * disabled)
427 */
428 static void atmel_tx_chars(struct uart_port *port)
429 {
430 struct circ_buf *xmit = &port->info->xmit;
431
432 if (port->x_char && UART_GET_CSR(port) & ATMEL_US_TXRDY) {
433 UART_PUT_CHAR(port, port->x_char);
434 port->icount.tx++;
435 port->x_char = 0;
436 }
437 if (uart_circ_empty(xmit) || uart_tx_stopped(port))
438 return;
439
440 while (UART_GET_CSR(port) & ATMEL_US_TXRDY) {
441 UART_PUT_CHAR(port, xmit->buf[xmit->tail]);
442 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
443 port->icount.tx++;
444 if (uart_circ_empty(xmit))
445 break;
446 }
447
448 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
449 uart_write_wakeup(port);
450
451 if (!uart_circ_empty(xmit))
452 UART_PUT_IER(port, ATMEL_US_TXRDY);
453 }
454
455 /*
456 * receive interrupt handler.
457 */
458 static void
459 atmel_handle_receive(struct uart_port *port, unsigned int pending)
460 {
461 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
462
463 if (atmel_use_dma_rx(port)) {
464 /*
465 * PDC receive. Just schedule the tasklet and let it
466 * figure out the details.
467 *
468 * TODO: We're not handling error flags correctly at
469 * the moment.
470 */
471 if (pending & (ATMEL_US_ENDRX | ATMEL_US_TIMEOUT)) {
472 UART_PUT_IDR(port, (ATMEL_US_ENDRX
473 | ATMEL_US_TIMEOUT));
474 tasklet_schedule(&atmel_port->tasklet);
475 }
476
477 if (pending & (ATMEL_US_RXBRK | ATMEL_US_OVRE |
478 ATMEL_US_FRAME | ATMEL_US_PARE))
479 atmel_pdc_rxerr(port, pending);
480 }
481
482 /* Interrupt receive */
483 if (pending & ATMEL_US_RXRDY)
484 atmel_rx_chars(port);
485 else if (pending & ATMEL_US_RXBRK) {
486 /*
487 * End of break detected. If it came along with a
488 * character, atmel_rx_chars will handle it.
489 */
490 UART_PUT_CR(port, ATMEL_US_RSTSTA);
491 UART_PUT_IDR(port, ATMEL_US_RXBRK);
492 atmel_port->break_active = 0;
493 }
494 }
495
496 /*
497 * transmit interrupt handler. (Transmit is IRQF_NODELAY safe)
498 */
499 static void
500 atmel_handle_transmit(struct uart_port *port, unsigned int pending)
501 {
502 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
503
504 if (atmel_use_dma_tx(port)) {
505 /* PDC transmit */
506 if (pending & (ATMEL_US_ENDTX | ATMEL_US_TXBUFE)) {
507 UART_PUT_IDR(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
508 tasklet_schedule(&atmel_port->tasklet);
509 }
510 } else {
511 /* Interrupt transmit */
512 if (pending & ATMEL_US_TXRDY) {
513 UART_PUT_IDR(port, ATMEL_US_TXRDY);
514 tasklet_schedule(&atmel_port->tasklet);
515 }
516 }
517 }
518
519 /*
520 * status flags interrupt handler.
521 */
522 static void
523 atmel_handle_status(struct uart_port *port, unsigned int pending,
524 unsigned int status)
525 {
526 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
527
528 if (pending & (ATMEL_US_RIIC | ATMEL_US_DSRIC | ATMEL_US_DCDIC
529 | ATMEL_US_CTSIC)) {
530 atmel_port->irq_status = status;
531 tasklet_schedule(&atmel_port->tasklet);
532 }
533 }
534
535 /*
536 * Interrupt handler
537 */
538 static irqreturn_t atmel_interrupt(int irq, void *dev_id)
539 {
540 struct uart_port *port = dev_id;
541 unsigned int status, pending, pass_counter = 0;
542
543 do {
544 status = UART_GET_CSR(port);
545 pending = status & UART_GET_IMR(port);
546 if (!pending)
547 break;
548
549 atmel_handle_receive(port, pending);
550 atmel_handle_status(port, pending, status);
551 atmel_handle_transmit(port, pending);
552 } while (pass_counter++ < ATMEL_ISR_PASS_LIMIT);
553
554 return pass_counter ? IRQ_HANDLED : IRQ_NONE;
555 }
556
557 /*
558 * Called from tasklet with ENDTX and TXBUFE interrupts disabled.
559 */
560 static void atmel_tx_dma(struct uart_port *port)
561 {
562 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
563 struct circ_buf *xmit = &port->info->xmit;
564 struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
565 int count;
566
567 /* nothing left to transmit? */
568 if (UART_GET_TCR(port))
569 return;
570
571 xmit->tail += pdc->ofs;
572 xmit->tail &= UART_XMIT_SIZE - 1;
573
574 port->icount.tx += pdc->ofs;
575 pdc->ofs = 0;
576
577 /* more to transmit - setup next transfer */
578
579 /* disable PDC transmit */
580 UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
581
582 if (!uart_circ_empty(xmit)) {
583 dma_sync_single_for_device(port->dev,
584 pdc->dma_addr,
585 pdc->dma_size,
586 DMA_TO_DEVICE);
587
588 count = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE);
589 pdc->ofs = count;
590
591 UART_PUT_TPR(port, pdc->dma_addr + xmit->tail);
592 UART_PUT_TCR(port, count);
593 /* re-enable PDC transmit and interrupts */
594 UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
595 UART_PUT_IER(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
596 }
597
598 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
599 uart_write_wakeup(port);
600 }
601
602 static void atmel_rx_from_ring(struct uart_port *port)
603 {
604 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
605 struct circ_buf *ring = &atmel_port->rx_ring;
606 unsigned int flg;
607 unsigned int status;
608
609 while (ring->head != ring->tail) {
610 struct atmel_uart_char c;
611
612 /* Make sure c is loaded after head. */
613 smp_rmb();
614
615 c = ((struct atmel_uart_char *)ring->buf)[ring->tail];
616
617 ring->tail = (ring->tail + 1) & (ATMEL_SERIAL_RINGSIZE - 1);
618
619 port->icount.rx++;
620 status = c.status;
621 flg = TTY_NORMAL;
622
623 /*
624 * note that the error handling code is
625 * out of the main execution path
626 */
627 if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
628 | ATMEL_US_OVRE | ATMEL_US_RXBRK))) {
629 if (status & ATMEL_US_RXBRK) {
630 /* ignore side-effect */
631 status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);
632
633 port->icount.brk++;
634 if (uart_handle_break(port))
635 continue;
636 }
637 if (status & ATMEL_US_PARE)
638 port->icount.parity++;
639 if (status & ATMEL_US_FRAME)
640 port->icount.frame++;
641 if (status & ATMEL_US_OVRE)
642 port->icount.overrun++;
643
644 status &= port->read_status_mask;
645
646 if (status & ATMEL_US_RXBRK)
647 flg = TTY_BREAK;
648 else if (status & ATMEL_US_PARE)
649 flg = TTY_PARITY;
650 else if (status & ATMEL_US_FRAME)
651 flg = TTY_FRAME;
652 }
653
654
655 if (uart_handle_sysrq_char(port, c.ch))
656 continue;
657
658 uart_insert_char(port, status, ATMEL_US_OVRE, c.ch, flg);
659 }
660
661 /*
662 * Drop the lock here since it might end up calling
663 * uart_start(), which takes the lock.
664 */
665 spin_unlock(&port->lock);
666 tty_flip_buffer_push(port->info->tty);
667 spin_lock(&port->lock);
668 }
669
670 static void atmel_rx_from_dma(struct uart_port *port)
671 {
672 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
673 struct tty_struct *tty = port->info->tty;
674 struct atmel_dma_buffer *pdc;
675 int rx_idx = atmel_port->pdc_rx_idx;
676 unsigned int head;
677 unsigned int tail;
678 unsigned int count;
679
680 do {
681 /* Reset the UART timeout early so that we don't miss one */
682 UART_PUT_CR(port, ATMEL_US_STTTO);
683
684 pdc = &atmel_port->pdc_rx[rx_idx];
685 head = UART_GET_RPR(port) - pdc->dma_addr;
686 tail = pdc->ofs;
687
688 /* If the PDC has switched buffers, RPR won't contain
689 * any address within the current buffer. Since head
690 * is unsigned, we just need a one-way comparison to
691 * find out.
692 *
693 * In this case, we just need to consume the entire
694 * buffer and resubmit it for DMA. This will clear the
695 * ENDRX bit as well, so that we can safely re-enable
696 * all interrupts below.
697 */
698 head = min(head, pdc->dma_size);
699
700 if (likely(head != tail)) {
701 dma_sync_single_for_cpu(port->dev, pdc->dma_addr,
702 pdc->dma_size, DMA_FROM_DEVICE);
703
704 /*
705 * head will only wrap around when we recycle
706 * the DMA buffer, and when that happens, we
707 * explicitly set tail to 0. So head will
708 * always be greater than tail.
709 */
710 count = head - tail;
711
712 tty_insert_flip_string(tty, pdc->buf + pdc->ofs, count);
713
714 dma_sync_single_for_device(port->dev, pdc->dma_addr,
715 pdc->dma_size, DMA_FROM_DEVICE);
716
717 port->icount.rx += count;
718 pdc->ofs = head;
719 }
720
721 /*
722 * If the current buffer is full, we need to check if
723 * the next one contains any additional data.
724 */
725 if (head >= pdc->dma_size) {
726 pdc->ofs = 0;
727 UART_PUT_RNPR(port, pdc->dma_addr);
728 UART_PUT_RNCR(port, pdc->dma_size);
729
730 rx_idx = !rx_idx;
731 atmel_port->pdc_rx_idx = rx_idx;
732 }
733 } while (head >= pdc->dma_size);
734
735 /*
736 * Drop the lock here since it might end up calling
737 * uart_start(), which takes the lock.
738 */
739 spin_unlock(&port->lock);
740 tty_flip_buffer_push(tty);
741 spin_lock(&port->lock);
742
743 UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
744 }
745
746 /*
747 * tasklet handling tty stuff outside the interrupt handler.
748 */
749 static void atmel_tasklet_func(unsigned long data)
750 {
751 struct uart_port *port = (struct uart_port *)data;
752 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
753 unsigned int status;
754 unsigned int status_change;
755
756 /* The interrupt handler does not take the lock */
757 spin_lock(&port->lock);
758
759 if (atmel_use_dma_tx(port))
760 atmel_tx_dma(port);
761 else
762 atmel_tx_chars(port);
763
764 status = atmel_port->irq_status;
765 status_change = status ^ atmel_port->irq_status_prev;
766
767 if (status_change & (ATMEL_US_RI | ATMEL_US_DSR
768 | ATMEL_US_DCD | ATMEL_US_CTS)) {
769 /* TODO: All reads to CSR will clear these interrupts! */
770 if (status_change & ATMEL_US_RI)
771 port->icount.rng++;
772 if (status_change & ATMEL_US_DSR)
773 port->icount.dsr++;
774 if (status_change & ATMEL_US_DCD)
775 uart_handle_dcd_change(port, !(status & ATMEL_US_DCD));
776 if (status_change & ATMEL_US_CTS)
777 uart_handle_cts_change(port, !(status & ATMEL_US_CTS));
778
779 wake_up_interruptible(&port->info->delta_msr_wait);
780
781 atmel_port->irq_status_prev = status;
782 }
783
784 if (atmel_use_dma_rx(port))
785 atmel_rx_from_dma(port);
786 else
787 atmel_rx_from_ring(port);
788
789 spin_unlock(&port->lock);
790 }
791
792 /*
793 * Perform initialization and enable port for reception
794 */
795 static int atmel_startup(struct uart_port *port)
796 {
797 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
798 struct tty_struct *tty = port->info->tty;
799 int retval;
800
801 /*
802 * Ensure that no interrupts are enabled otherwise when
803 * request_irq() is called we could get stuck trying to
804 * handle an unexpected interrupt
805 */
806 UART_PUT_IDR(port, -1);
807
808 /*
809 * Allocate the IRQ
810 */
811 retval = request_irq(port->irq, atmel_interrupt, IRQF_SHARED,
812 tty ? tty->name : "atmel_serial", port);
813 if (retval) {
814 printk("atmel_serial: atmel_startup - Can't get irq\n");
815 return retval;
816 }
817
818 /*
819 * Initialize DMA (if necessary)
820 */
821 if (atmel_use_dma_rx(port)) {
822 int i;
823
824 for (i = 0; i < 2; i++) {
825 struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
826
827 pdc->buf = kmalloc(PDC_BUFFER_SIZE, GFP_KERNEL);
828 if (pdc->buf == NULL) {
829 if (i != 0) {
830 dma_unmap_single(port->dev,
831 atmel_port->pdc_rx[0].dma_addr,
832 PDC_BUFFER_SIZE,
833 DMA_FROM_DEVICE);
834 kfree(atmel_port->pdc_rx[0].buf);
835 }
836 free_irq(port->irq, port);
837 return -ENOMEM;
838 }
839 pdc->dma_addr = dma_map_single(port->dev,
840 pdc->buf,
841 PDC_BUFFER_SIZE,
842 DMA_FROM_DEVICE);
843 pdc->dma_size = PDC_BUFFER_SIZE;
844 pdc->ofs = 0;
845 }
846
847 atmel_port->pdc_rx_idx = 0;
848
849 UART_PUT_RPR(port, atmel_port->pdc_rx[0].dma_addr);
850 UART_PUT_RCR(port, PDC_BUFFER_SIZE);
851
852 UART_PUT_RNPR(port, atmel_port->pdc_rx[1].dma_addr);
853 UART_PUT_RNCR(port, PDC_BUFFER_SIZE);
854 }
855 if (atmel_use_dma_tx(port)) {
856 struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
857 struct circ_buf *xmit = &port->info->xmit;
858
859 pdc->buf = xmit->buf;
860 pdc->dma_addr = dma_map_single(port->dev,
861 pdc->buf,
862 UART_XMIT_SIZE,
863 DMA_TO_DEVICE);
864 pdc->dma_size = UART_XMIT_SIZE;
865 pdc->ofs = 0;
866 }
867
868 /*
869 * If there is a specific "open" function (to register
870 * control line interrupts)
871 */
872 if (atmel_open_hook) {
873 retval = atmel_open_hook(port);
874 if (retval) {
875 free_irq(port->irq, port);
876 return retval;
877 }
878 }
879
880 /*
881 * Finally, enable the serial port
882 */
883 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
884 /* enable xmit & rcvr */
885 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
886
887 if (atmel_use_dma_rx(port)) {
888 /* set UART timeout */
889 UART_PUT_RTOR(port, PDC_RX_TIMEOUT);
890 UART_PUT_CR(port, ATMEL_US_STTTO);
891
892 UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
893 /* enable PDC controller */
894 UART_PUT_PTCR(port, ATMEL_PDC_RXTEN);
895 } else {
896 /* enable receive only */
897 UART_PUT_IER(port, ATMEL_US_RXRDY);
898 }
899
900 return 0;
901 }
902
903 /*
904 * Disable the port
905 */
906 static void atmel_shutdown(struct uart_port *port)
907 {
908 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
909 /*
910 * Ensure everything is stopped.
911 */
912 atmel_stop_rx(port);
913 atmel_stop_tx(port);
914
915 /*
916 * Shut-down the DMA.
917 */
918 if (atmel_use_dma_rx(port)) {
919 int i;
920
921 for (i = 0; i < 2; i++) {
922 struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
923
924 dma_unmap_single(port->dev,
925 pdc->dma_addr,
926 pdc->dma_size,
927 DMA_FROM_DEVICE);
928 kfree(pdc->buf);
929 }
930 }
931 if (atmel_use_dma_tx(port)) {
932 struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
933
934 dma_unmap_single(port->dev,
935 pdc->dma_addr,
936 pdc->dma_size,
937 DMA_TO_DEVICE);
938 }
939
940 /*
941 * Disable all interrupts, port and break condition.
942 */
943 UART_PUT_CR(port, ATMEL_US_RSTSTA);
944 UART_PUT_IDR(port, -1);
945
946 /*
947 * Free the interrupt
948 */
949 free_irq(port->irq, port);
950
951 /*
952 * If there is a specific "close" function (to unregister
953 * control line interrupts)
954 */
955 if (atmel_close_hook)
956 atmel_close_hook(port);
957 }
958
959 /*
960 * Power / Clock management.
961 */
962 static void atmel_serial_pm(struct uart_port *port, unsigned int state,
963 unsigned int oldstate)
964 {
965 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
966
967 switch (state) {
968 case 0:
969 /*
970 * Enable the peripheral clock for this serial port.
971 * This is called on uart_open() or a resume event.
972 */
973 clk_enable(atmel_port->clk);
974 break;
975 case 3:
976 /*
977 * Disable the peripheral clock for this serial port.
978 * This is called on uart_close() or a suspend event.
979 */
980 clk_disable(atmel_port->clk);
981 break;
982 default:
983 printk(KERN_ERR "atmel_serial: unknown pm %d\n", state);
984 }
985 }
986
987 /*
988 * Change the port parameters
989 */
990 static void atmel_set_termios(struct uart_port *port, struct ktermios *termios,
991 struct ktermios *old)
992 {
993 unsigned long flags;
994 unsigned int mode, imr, quot, baud;
995
996 /* Get current mode register */
997 mode = UART_GET_MR(port) & ~(ATMEL_US_USCLKS | ATMEL_US_CHRL
998 | ATMEL_US_NBSTOP | ATMEL_US_PAR);
999
1000 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
1001 quot = uart_get_divisor(port, baud);
1002
1003 if (quot > 65535) { /* BRGR is 16-bit, so switch to slower clock */
1004 quot /= 8;
1005 mode |= ATMEL_US_USCLKS_MCK_DIV8;
1006 }
1007
1008 /* byte size */
1009 switch (termios->c_cflag & CSIZE) {
1010 case CS5:
1011 mode |= ATMEL_US_CHRL_5;
1012 break;
1013 case CS6:
1014 mode |= ATMEL_US_CHRL_6;
1015 break;
1016 case CS7:
1017 mode |= ATMEL_US_CHRL_7;
1018 break;
1019 default:
1020 mode |= ATMEL_US_CHRL_8;
1021 break;
1022 }
1023
1024 /* stop bits */
1025 if (termios->c_cflag & CSTOPB)
1026 mode |= ATMEL_US_NBSTOP_2;
1027
1028 /* parity */
1029 if (termios->c_cflag & PARENB) {
1030 /* Mark or Space parity */
1031 if (termios->c_cflag & CMSPAR) {
1032 if (termios->c_cflag & PARODD)
1033 mode |= ATMEL_US_PAR_MARK;
1034 else
1035 mode |= ATMEL_US_PAR_SPACE;
1036 } else if (termios->c_cflag & PARODD)
1037 mode |= ATMEL_US_PAR_ODD;
1038 else
1039 mode |= ATMEL_US_PAR_EVEN;
1040 } else
1041 mode |= ATMEL_US_PAR_NONE;
1042
1043 spin_lock_irqsave(&port->lock, flags);
1044
1045 port->read_status_mask = ATMEL_US_OVRE;
1046 if (termios->c_iflag & INPCK)
1047 port->read_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE);
1048 if (termios->c_iflag & (BRKINT | PARMRK))
1049 port->read_status_mask |= ATMEL_US_RXBRK;
1050
1051 if (atmel_use_dma_rx(port))
1052 /* need to enable error interrupts */
1053 UART_PUT_IER(port, port->read_status_mask);
1054
1055 /*
1056 * Characters to ignore
1057 */
1058 port->ignore_status_mask = 0;
1059 if (termios->c_iflag & IGNPAR)
1060 port->ignore_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE);
1061 if (termios->c_iflag & IGNBRK) {
1062 port->ignore_status_mask |= ATMEL_US_RXBRK;
1063 /*
1064 * If we're ignoring parity and break indicators,
1065 * ignore overruns too (for real raw support).
1066 */
1067 if (termios->c_iflag & IGNPAR)
1068 port->ignore_status_mask |= ATMEL_US_OVRE;
1069 }
1070 /* TODO: Ignore all characters if CREAD is set.*/
1071
1072 /* update the per-port timeout */
1073 uart_update_timeout(port, termios->c_cflag, baud);
1074
1075 /* save/disable interrupts and drain transmitter */
1076 imr = UART_GET_IMR(port);
1077 UART_PUT_IDR(port, -1);
1078 while (!(UART_GET_CSR(port) & ATMEL_US_TXEMPTY))
1079 cpu_relax();
1080
1081 /* disable receiver and transmitter */
1082 UART_PUT_CR(port, ATMEL_US_TXDIS | ATMEL_US_RXDIS);
1083
1084 /* set the parity, stop bits and data size */
1085 UART_PUT_MR(port, mode);
1086
1087 /* set the baud rate */
1088 UART_PUT_BRGR(port, quot);
1089 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
1090 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
1091
1092 /* restore interrupts */
1093 UART_PUT_IER(port, imr);
1094
1095 /* CTS flow-control and modem-status interrupts */
1096 if (UART_ENABLE_MS(port, termios->c_cflag))
1097 port->ops->enable_ms(port);
1098
1099 spin_unlock_irqrestore(&port->lock, flags);
1100 }
1101
1102 /*
1103 * Return string describing the specified port
1104 */
1105 static const char *atmel_type(struct uart_port *port)
1106 {
1107 return (port->type == PORT_ATMEL) ? "ATMEL_SERIAL" : NULL;
1108 }
1109
1110 /*
1111 * Release the memory region(s) being used by 'port'.
1112 */
1113 static void atmel_release_port(struct uart_port *port)
1114 {
1115 struct platform_device *pdev = to_platform_device(port->dev);
1116 int size = pdev->resource[0].end - pdev->resource[0].start + 1;
1117
1118 release_mem_region(port->mapbase, size);
1119
1120 if (port->flags & UPF_IOREMAP) {
1121 iounmap(port->membase);
1122 port->membase = NULL;
1123 }
1124 }
1125
1126 /*
1127 * Request the memory region(s) being used by 'port'.
1128 */
1129 static int atmel_request_port(struct uart_port *port)
1130 {
1131 struct platform_device *pdev = to_platform_device(port->dev);
1132 int size = pdev->resource[0].end - pdev->resource[0].start + 1;
1133
1134 if (!request_mem_region(port->mapbase, size, "atmel_serial"))
1135 return -EBUSY;
1136
1137 if (port->flags & UPF_IOREMAP) {
1138 port->membase = ioremap(port->mapbase, size);
1139 if (port->membase == NULL) {
1140 release_mem_region(port->mapbase, size);
1141 return -ENOMEM;
1142 }
1143 }
1144
1145 return 0;
1146 }
1147
1148 /*
1149 * Configure/autoconfigure the port.
1150 */
1151 static void atmel_config_port(struct uart_port *port, int flags)
1152 {
1153 if (flags & UART_CONFIG_TYPE) {
1154 port->type = PORT_ATMEL;
1155 atmel_request_port(port);
1156 }
1157 }
1158
1159 /*
1160 * Verify the new serial_struct (for TIOCSSERIAL).
1161 */
1162 static int atmel_verify_port(struct uart_port *port, struct serial_struct *ser)
1163 {
1164 int ret = 0;
1165 if (ser->type != PORT_UNKNOWN && ser->type != PORT_ATMEL)
1166 ret = -EINVAL;
1167 if (port->irq != ser->irq)
1168 ret = -EINVAL;
1169 if (ser->io_type != SERIAL_IO_MEM)
1170 ret = -EINVAL;
1171 if (port->uartclk / 16 != ser->baud_base)
1172 ret = -EINVAL;
1173 if ((void *)port->mapbase != ser->iomem_base)
1174 ret = -EINVAL;
1175 if (port->iobase != ser->port)
1176 ret = -EINVAL;
1177 if (ser->hub6 != 0)
1178 ret = -EINVAL;
1179 return ret;
1180 }
1181
1182 static struct uart_ops atmel_pops = {
1183 .tx_empty = atmel_tx_empty,
1184 .set_mctrl = atmel_set_mctrl,
1185 .get_mctrl = atmel_get_mctrl,
1186 .stop_tx = atmel_stop_tx,
1187 .start_tx = atmel_start_tx,
1188 .stop_rx = atmel_stop_rx,
1189 .enable_ms = atmel_enable_ms,
1190 .break_ctl = atmel_break_ctl,
1191 .startup = atmel_startup,
1192 .shutdown = atmel_shutdown,
1193 .set_termios = atmel_set_termios,
1194 .type = atmel_type,
1195 .release_port = atmel_release_port,
1196 .request_port = atmel_request_port,
1197 .config_port = atmel_config_port,
1198 .verify_port = atmel_verify_port,
1199 .pm = atmel_serial_pm,
1200 };
1201
1202 /*
1203 * Configure the port from the platform device resource info.
1204 */
1205 static void __devinit atmel_init_port(struct atmel_uart_port *atmel_port,
1206 struct platform_device *pdev)
1207 {
1208 struct uart_port *port = &atmel_port->uart;
1209 struct atmel_uart_data *data = pdev->dev.platform_data;
1210
1211 port->iotype = UPIO_MEM;
1212 port->flags = UPF_BOOT_AUTOCONF;
1213 port->ops = &atmel_pops;
1214 port->fifosize = 1;
1215 port->line = pdev->id;
1216 port->dev = &pdev->dev;
1217
1218 port->mapbase = pdev->resource[0].start;
1219 port->irq = pdev->resource[1].start;
1220
1221 tasklet_init(&atmel_port->tasklet, atmel_tasklet_func,
1222 (unsigned long)port);
1223
1224 memset(&atmel_port->rx_ring, 0, sizeof(atmel_port->rx_ring));
1225
1226 if (data->regs)
1227 /* Already mapped by setup code */
1228 port->membase = data->regs;
1229 else {
1230 port->flags |= UPF_IOREMAP;
1231 port->membase = NULL;
1232 }
1233
1234 /* for console, the clock could already be configured */
1235 if (!atmel_port->clk) {
1236 atmel_port->clk = clk_get(&pdev->dev, "usart");
1237 clk_enable(atmel_port->clk);
1238 port->uartclk = clk_get_rate(atmel_port->clk);
1239 }
1240
1241 atmel_port->use_dma_rx = data->use_dma_rx;
1242 atmel_port->use_dma_tx = data->use_dma_tx;
1243 if (atmel_use_dma_tx(port))
1244 port->fifosize = PDC_BUFFER_SIZE;
1245 }
1246
1247 /*
1248 * Register board-specific modem-control line handlers.
1249 */
1250 void __init atmel_register_uart_fns(struct atmel_port_fns *fns)
1251 {
1252 if (fns->enable_ms)
1253 atmel_pops.enable_ms = fns->enable_ms;
1254 if (fns->get_mctrl)
1255 atmel_pops.get_mctrl = fns->get_mctrl;
1256 if (fns->set_mctrl)
1257 atmel_pops.set_mctrl = fns->set_mctrl;
1258 atmel_open_hook = fns->open;
1259 atmel_close_hook = fns->close;
1260 atmel_pops.pm = fns->pm;
1261 atmel_pops.set_wake = fns->set_wake;
1262 }
1263
1264 #ifdef CONFIG_SERIAL_ATMEL_CONSOLE
1265 static void atmel_console_putchar(struct uart_port *port, int ch)
1266 {
1267 while (!(UART_GET_CSR(port) & ATMEL_US_TXRDY))
1268 cpu_relax();
1269 UART_PUT_CHAR(port, ch);
1270 }
1271
1272 /*
1273 * Interrupts are disabled on entering
1274 */
1275 static void atmel_console_write(struct console *co, const char *s, u_int count)
1276 {
1277 struct uart_port *port = &atmel_ports[co->index].uart;
1278 unsigned int status, imr;
1279 unsigned int pdc_tx;
1280
1281 /*
1282 * First, save IMR and then disable interrupts
1283 */
1284 imr = UART_GET_IMR(port);
1285 UART_PUT_IDR(port, ATMEL_US_RXRDY | ATMEL_US_TXRDY);
1286
1287 /* Store PDC transmit status and disable it */
1288 pdc_tx = UART_GET_PTSR(port) & ATMEL_PDC_TXTEN;
1289 UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
1290
1291 uart_console_write(port, s, count, atmel_console_putchar);
1292
1293 /*
1294 * Finally, wait for transmitter to become empty
1295 * and restore IMR
1296 */
1297 do {
1298 status = UART_GET_CSR(port);
1299 } while (!(status & ATMEL_US_TXRDY));
1300
1301 /* Restore PDC transmit status */
1302 if (pdc_tx)
1303 UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
1304
1305 /* set interrupts back the way they were */
1306 UART_PUT_IER(port, imr);
1307 }
1308
1309 /*
1310 * If the port was already initialised (eg, by a boot loader),
1311 * try to determine the current setup.
1312 */
1313 static void __init atmel_console_get_options(struct uart_port *port, int *baud,
1314 int *parity, int *bits)
1315 {
1316 unsigned int mr, quot;
1317
1318 /*
1319 * If the baud rate generator isn't running, the port wasn't
1320 * initialized by the boot loader.
1321 */
1322 quot = UART_GET_BRGR(port);
1323 if (!quot)
1324 return;
1325
1326 mr = UART_GET_MR(port) & ATMEL_US_CHRL;
1327 if (mr == ATMEL_US_CHRL_8)
1328 *bits = 8;
1329 else
1330 *bits = 7;
1331
1332 mr = UART_GET_MR(port) & ATMEL_US_PAR;
1333 if (mr == ATMEL_US_PAR_EVEN)
1334 *parity = 'e';
1335 else if (mr == ATMEL_US_PAR_ODD)
1336 *parity = 'o';
1337
1338 /*
1339 * The serial core only rounds down when matching this to a
1340 * supported baud rate. Make sure we don't end up slightly
1341 * lower than one of those, as it would make us fall through
1342 * to a much lower baud rate than we really want.
1343 */
1344 *baud = port->uartclk / (16 * (quot - 1));
1345 }
1346
1347 static int __init atmel_console_setup(struct console *co, char *options)
1348 {
1349 struct uart_port *port = &atmel_ports[co->index].uart;
1350 int baud = 115200;
1351 int bits = 8;
1352 int parity = 'n';
1353 int flow = 'n';
1354
1355 if (port->membase == NULL) {
1356 /* Port not initialized yet - delay setup */
1357 return -ENODEV;
1358 }
1359
1360 UART_PUT_IDR(port, -1);
1361 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
1362 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
1363
1364 if (options)
1365 uart_parse_options(options, &baud, &parity, &bits, &flow);
1366 else
1367 atmel_console_get_options(port, &baud, &parity, &bits);
1368
1369 return uart_set_options(port, co, baud, parity, bits, flow);
1370 }
1371
1372 static struct uart_driver atmel_uart;
1373
1374 static struct console atmel_console = {
1375 .name = ATMEL_DEVICENAME,
1376 .write = atmel_console_write,
1377 .device = uart_console_device,
1378 .setup = atmel_console_setup,
1379 .flags = CON_PRINTBUFFER,
1380 .index = -1,
1381 .data = &atmel_uart,
1382 };
1383
1384 #define ATMEL_CONSOLE_DEVICE &atmel_console
1385
1386 /*
1387 * Early console initialization (before VM subsystem initialized).
1388 */
1389 static int __init atmel_console_init(void)
1390 {
1391 if (atmel_default_console_device) {
1392 add_preferred_console(ATMEL_DEVICENAME,
1393 atmel_default_console_device->id, NULL);
1394 atmel_init_port(&atmel_ports[atmel_default_console_device->id],
1395 atmel_default_console_device);
1396 register_console(&atmel_console);
1397 }
1398
1399 return 0;
1400 }
1401
1402 console_initcall(atmel_console_init);
1403
1404 /*
1405 * Late console initialization.
1406 */
1407 static int __init atmel_late_console_init(void)
1408 {
1409 if (atmel_default_console_device
1410 && !(atmel_console.flags & CON_ENABLED))
1411 register_console(&atmel_console);
1412
1413 return 0;
1414 }
1415
1416 core_initcall(atmel_late_console_init);
1417
1418 static inline bool atmel_is_console_port(struct uart_port *port)
1419 {
1420 return port->cons && port->cons->index == port->line;
1421 }
1422
1423 #else
1424 #define ATMEL_CONSOLE_DEVICE NULL
1425
1426 static inline bool atmel_is_console_port(struct uart_port *port)
1427 {
1428 return false;
1429 }
1430 #endif
1431
1432 static struct uart_driver atmel_uart = {
1433 .owner = THIS_MODULE,
1434 .driver_name = "atmel_serial",
1435 .dev_name = ATMEL_DEVICENAME,
1436 .major = SERIAL_ATMEL_MAJOR,
1437 .minor = MINOR_START,
1438 .nr = ATMEL_MAX_UART,
1439 .cons = ATMEL_CONSOLE_DEVICE,
1440 };
1441
1442 #ifdef CONFIG_PM
1443 static int atmel_serial_suspend(struct platform_device *pdev,
1444 pm_message_t state)
1445 {
1446 struct uart_port *port = platform_get_drvdata(pdev);
1447 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1448
1449 if (device_may_wakeup(&pdev->dev)
1450 && !at91_suspend_entering_slow_clock())
1451 enable_irq_wake(port->irq);
1452 else {
1453 uart_suspend_port(&atmel_uart, port);
1454 atmel_port->suspended = 1;
1455 }
1456
1457 return 0;
1458 }
1459
1460 static int atmel_serial_resume(struct platform_device *pdev)
1461 {
1462 struct uart_port *port = platform_get_drvdata(pdev);
1463 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1464
1465 if (atmel_port->suspended) {
1466 uart_resume_port(&atmel_uart, port);
1467 atmel_port->suspended = 0;
1468 } else
1469 disable_irq_wake(port->irq);
1470
1471 return 0;
1472 }
1473 #else
1474 #define atmel_serial_suspend NULL
1475 #define atmel_serial_resume NULL
1476 #endif
1477
1478 static int __devinit atmel_serial_probe(struct platform_device *pdev)
1479 {
1480 struct atmel_uart_port *port;
1481 void *data;
1482 int ret;
1483
1484 BUILD_BUG_ON(!is_power_of_2(ATMEL_SERIAL_RINGSIZE));
1485
1486 port = &atmel_ports[pdev->id];
1487 atmel_init_port(port, pdev);
1488
1489 if (!atmel_use_dma_rx(&port->uart)) {
1490 ret = -ENOMEM;
1491 data = kmalloc(sizeof(struct atmel_uart_char)
1492 * ATMEL_SERIAL_RINGSIZE, GFP_KERNEL);
1493 if (!data)
1494 goto err_alloc_ring;
1495 port->rx_ring.buf = data;
1496 }
1497
1498 ret = uart_add_one_port(&atmel_uart, &port->uart);
1499 if (ret)
1500 goto err_add_port;
1501
1502 device_init_wakeup(&pdev->dev, 1);
1503 platform_set_drvdata(pdev, port);
1504
1505 return 0;
1506
1507 err_add_port:
1508 kfree(port->rx_ring.buf);
1509 port->rx_ring.buf = NULL;
1510 err_alloc_ring:
1511 if (!atmel_is_console_port(&port->uart)) {
1512 clk_disable(port->clk);
1513 clk_put(port->clk);
1514 port->clk = NULL;
1515 }
1516
1517 return ret;
1518 }
1519
1520 static int __devexit atmel_serial_remove(struct platform_device *pdev)
1521 {
1522 struct uart_port *port = platform_get_drvdata(pdev);
1523 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1524 int ret = 0;
1525
1526 device_init_wakeup(&pdev->dev, 0);
1527 platform_set_drvdata(pdev, NULL);
1528
1529 ret = uart_remove_one_port(&atmel_uart, port);
1530
1531 tasklet_kill(&atmel_port->tasklet);
1532 kfree(atmel_port->rx_ring.buf);
1533
1534 /* "port" is allocated statically, so we shouldn't free it */
1535
1536 clk_disable(atmel_port->clk);
1537 clk_put(atmel_port->clk);
1538
1539 return ret;
1540 }
1541
1542 static struct platform_driver atmel_serial_driver = {
1543 .probe = atmel_serial_probe,
1544 .remove = __devexit_p(atmel_serial_remove),
1545 .suspend = atmel_serial_suspend,
1546 .resume = atmel_serial_resume,
1547 .driver = {
1548 .name = "atmel_usart",
1549 .owner = THIS_MODULE,
1550 },
1551 };
1552
1553 static int __init atmel_serial_init(void)
1554 {
1555 int ret;
1556
1557 ret = uart_register_driver(&atmel_uart);
1558 if (ret)
1559 return ret;
1560
1561 ret = platform_driver_register(&atmel_serial_driver);
1562 if (ret)
1563 uart_unregister_driver(&atmel_uart);
1564
1565 return ret;
1566 }
1567
1568 static void __exit atmel_serial_exit(void)
1569 {
1570 platform_driver_unregister(&atmel_serial_driver);
1571 uart_unregister_driver(&atmel_uart);
1572 }
1573
1574 module_init(atmel_serial_init);
1575 module_exit(atmel_serial_exit);
1576
1577 MODULE_AUTHOR("Rick Bronson");
1578 MODULE_DESCRIPTION("Atmel AT91 / AT32 serial port driver");
1579 MODULE_LICENSE("GPL");
1580 MODULE_ALIAS("platform:atmel_usart");
Linux kernel - Deliverables
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