drivers/serial/mpc52xx_uart.c

   1 /*
   2  * drivers/serial/mpc52xx_uart.c
   3  *
   4  * Driver for the PSC of the Freescale MPC52xx PSCs configured as UARTs.
   5  *
   6  * FIXME According to the usermanual the status bits in the status register
   7  * are only updated when the peripherals access the FIFO and not when the
   8  * CPU access them. So since we use this bits to know when we stop writing
   9  * and reading, they may not be updated in-time and a race condition may
  10  * exists. But I haven't be able to prove this and I don't care. But if
  11  * any problem arises, it might worth checking. The TX/RX FIFO Stats
  12  * registers should be used in addition.
  13  * Update: Actually, they seem updated ... At least the bits we use.
  14  *
  15  *
  16  * Maintainer : Sylvain Munaut <tnt@246tNt.com>
  17  *
  18  * Some of the code has been inspired/copied from the 2.4 code written
  19  * by Dale Farnsworth <dfarnsworth@mvista.com>.
  20  *
  21  * Copyright (C) 2004-2005 Sylvain Munaut <tnt@246tNt.com>
  22  * Copyright (C) 2003 MontaVista, Software, Inc.
  23  *
  24  * This file is licensed under the terms of the GNU General Public License
  25  * version 2. This program is licensed "as is" without any warranty of any
  26  * kind, whether express or implied.
  27  */
  28
  29 /* Platform device Usage :
  30  *
  31  * Since PSCs can have multiple function, the correct driver for each one
  32  * is selected by calling mpc52xx_match_psc_function(...). The function
  33  * handled by this driver is "uart".
  34  *
  35  * The driver init all necessary registers to place the PSC in uart mode without
  36  * DCD. However, the pin multiplexing aren't changed and should be set either
  37  * by the bootloader or in the platform init code.
  38  *
  39  * The idx field must be equal to the PSC index ( e.g. 0 for PSC1, 1 for PSC2,
  40  * and so on). So the PSC1 is mapped to /dev/ttyPSC0, PSC2 to /dev/ttyPSC1 and
  41  * so on. But be warned, it's an ABSOLUTE REQUIREMENT ! This is needed mainly
  42  * fpr the console code : without this 1:1 mapping, at early boot time, when we
  43  * are parsing the kernel args console=ttyPSC?, we wouldn't know wich PSC it
  44  * will be mapped to.
  45  */
  46
  47 #include <linux/config.h>
  48 #include <linux/platform_device.h>
  49 #include <linux/module.h>
  50 #include <linux/tty.h>
  51 #include <linux/serial.h>
  52 #include <linux/sysrq.h>
  53 #include <linux/console.h>
  54
  55 #include <asm/delay.h>
  56 #include <asm/io.h>
  57
  58 #include <asm/mpc52xx.h>
  59 #include <asm/mpc52xx_psc.h>
  60
  61 #if defined(CONFIG_SERIAL_MPC52xx_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  62 #define SUPPORT_SYSRQ
  63 #endif
  64
  65 #include <linux/serial_core.h>
  66
  67
  68 /* We've been assigned a range on the "Low-density serial ports" major */
  69 #define SERIAL_PSC_MAJOR        204
  70 #define SERIAL_PSC_MINOR        148
  71
  72
  73 #define ISR_PASS_LIMIT 256      /* Max number of iteration in the interrupt */
  74
  75
  76 static struct uart_port mpc52xx_uart_ports[MPC52xx_PSC_MAXNUM];
  77         /* Rem: - We use the read_status_mask as a shadow of
  78          *        psc->mpc52xx_psc_imr
  79          *      - It's important that is array is all zero on start as we
  80          *        use it to know if it's initialized or not ! If it's not sure
  81          *        it's cleared, then a memset(...,0,...) should be added to
  82          *        the console_init
  83          */
  84
  85 #define PSC(port) ((struct mpc52xx_psc __iomem *)((port)->membase))
  86
  87
  88 /* Forward declaration of the interruption handling routine */
  89 static irqreturn_t mpc52xx_uart_int(int irq,void *dev_id,struct pt_regs *regs);
  90
  91
  92 /* Simple macro to test if a port is console or not. This one is taken
  93  * for serial_core.c and maybe should be moved to serial_core.h ? */
  94 #ifdef CONFIG_SERIAL_CORE_CONSOLE
  95 #define uart_console(port)      ((port)->cons && (port)->cons->index == (port)->line)
  96 #else
  97 #define uart_console(port)      (0)
  98 #endif
  99
 100
 101 /* ======================================================================== */
 102 /* UART operations                                                          */
 103 /* ======================================================================== */
 104
 105 static unsigned int
 106 mpc52xx_uart_tx_empty(struct uart_port *port)
 107 {
 108         int status = in_be16(&PSC(port)->mpc52xx_psc_status);
 109         return (status & MPC52xx_PSC_SR_TXEMP) ? TIOCSER_TEMT : 0;
 110 }
 111
 112 static void
 113 mpc52xx_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
 114 {
 115         /* Not implemented */
 116 }
 117
 118 static unsigned int
 119 mpc52xx_uart_get_mctrl(struct uart_port *port)
 120 {
 121         /* Not implemented */
 122         return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
 123 }
 124
 125 static void
 126 mpc52xx_uart_stop_tx(struct uart_port *port)
 127 {
 128         /* port->lock taken by caller */
 129         port->read_status_mask &= ~MPC52xx_PSC_IMR_TXRDY;
 130         out_be16(&PSC(port)->mpc52xx_psc_imr,port->read_status_mask);
 131 }
 132
 133 static void
 134 mpc52xx_uart_start_tx(struct uart_port *port)
 135 {
 136         /* port->lock taken by caller */
 137         port->read_status_mask |= MPC52xx_PSC_IMR_TXRDY;
 138         out_be16(&PSC(port)->mpc52xx_psc_imr,port->read_status_mask);
 139 }
 140
 141 static void
 142 mpc52xx_uart_send_xchar(struct uart_port *port, char ch)
 143 {
 144         unsigned long flags;
 145         spin_lock_irqsave(&port->lock, flags);
 146
 147         port->x_char = ch;
 148         if (ch) {
 149                 /* Make sure tx interrupts are on */
 150                 /* Truly necessary ??? They should be anyway */
 151                 port->read_status_mask |= MPC52xx_PSC_IMR_TXRDY;
 152                 out_be16(&PSC(port)->mpc52xx_psc_imr,port->read_status_mask);
 153         }
 154
 155         spin_unlock_irqrestore(&port->lock, flags);
 156 }
 157
 158 static void
 159 mpc52xx_uart_stop_rx(struct uart_port *port)
 160 {
 161         /* port->lock taken by caller */
 162         port->read_status_mask &= ~MPC52xx_PSC_IMR_RXRDY;
 163         out_be16(&PSC(port)->mpc52xx_psc_imr,port->read_status_mask);
 164 }
 165
 166 static void
 167 mpc52xx_uart_enable_ms(struct uart_port *port)
 168 {
 169         /* Not implemented */
 170 }
 171
 172 static void
 173 mpc52xx_uart_break_ctl(struct uart_port *port, int ctl)
 174 {
 175         unsigned long flags;
 176         spin_lock_irqsave(&port->lock, flags);
 177
 178         if ( ctl == -1 )
 179                 out_8(&PSC(port)->command,MPC52xx_PSC_START_BRK);
 180         else
 181                 out_8(&PSC(port)->command,MPC52xx_PSC_STOP_BRK);
 182
 183         spin_unlock_irqrestore(&port->lock, flags);
 184 }
 185
 186 static int
 187 mpc52xx_uart_startup(struct uart_port *port)
 188 {
 189         struct mpc52xx_psc __iomem *psc = PSC(port);
 190         int ret;
 191
 192         /* Request IRQ */
 193         ret = request_irq(port->irq, mpc52xx_uart_int,
 194                 SA_INTERRUPT | SA_SAMPLE_RANDOM, "mpc52xx_psc_uart", port);
 195         if (ret)
 196                 return ret;
 197
 198         /* Reset/activate the port, clear and enable interrupts */
 199         out_8(&psc->command,MPC52xx_PSC_RST_RX);
 200         out_8(&psc->command,MPC52xx_PSC_RST_TX);
 201
 202         out_be32(&psc->sicr,0); /* UART mode DCD ignored */
 203
 204         out_be16(&psc->mpc52xx_psc_clock_select, 0xdd00); /* /16 prescaler on */
 205
 206         out_8(&psc->rfcntl, 0x00);
 207         out_be16(&psc->rfalarm, 0x1ff);
 208         out_8(&psc->tfcntl, 0x07);
 209         out_be16(&psc->tfalarm, 0x80);
 210
 211         port->read_status_mask |= MPC52xx_PSC_IMR_RXRDY | MPC52xx_PSC_IMR_TXRDY;
 212         out_be16(&psc->mpc52xx_psc_imr,port->read_status_mask);
 213
 214         out_8(&psc->command,MPC52xx_PSC_TX_ENABLE);
 215         out_8(&psc->command,MPC52xx_PSC_RX_ENABLE);
 216
 217         return 0;
 218 }
 219
 220 static void
 221 mpc52xx_uart_shutdown(struct uart_port *port)
 222 {
 223         struct mpc52xx_psc __iomem *psc = PSC(port);
 224
 225         /* Shut down the port, interrupt and all */
 226         out_8(&psc->command,MPC52xx_PSC_RST_RX);
 227         out_8(&psc->command,MPC52xx_PSC_RST_TX);
 228
 229         port->read_status_mask = 0;
 230         out_be16(&psc->mpc52xx_psc_imr,port->read_status_mask);
 231
 232         /* Release interrupt */
 233         free_irq(port->irq, port);
 234 }
 235
 236 static void
 237 mpc52xx_uart_set_termios(struct uart_port *port, struct termios *new,
 238                          struct termios *old)
 239 {
 240         struct mpc52xx_psc __iomem *psc = PSC(port);
 241         unsigned long flags;
 242         unsigned char mr1, mr2;
 243         unsigned short ctr;
 244         unsigned int j, baud, quot;
 245
 246         /* Prepare what we're gonna write */
 247         mr1 = 0;
 248
 249         switch (new->c_cflag & CSIZE) {
 250                 case CS5:       mr1 |= MPC52xx_PSC_MODE_5_BITS;
 251                                 break;
 252                 case CS6:       mr1 |= MPC52xx_PSC_MODE_6_BITS;
 253                                 break;
 254                 case CS7:       mr1 |= MPC52xx_PSC_MODE_7_BITS;
 255                                 break;
 256                 case CS8:
 257                 default:        mr1 |= MPC52xx_PSC_MODE_8_BITS;
 258         }
 259
 260         if (new->c_cflag & PARENB) {
 261                 mr1 |= (new->c_cflag & PARODD) ?
 262                         MPC52xx_PSC_MODE_PARODD : MPC52xx_PSC_MODE_PAREVEN;
 263         } else
 264                 mr1 |= MPC52xx_PSC_MODE_PARNONE;
 265
 266
 267         mr2 = 0;
 268
 269         if (new->c_cflag & CSTOPB)
 270                 mr2 |= MPC52xx_PSC_MODE_TWO_STOP;
 271         else
 272                 mr2 |= ((new->c_cflag & CSIZE) == CS5) ?
 273                         MPC52xx_PSC_MODE_ONE_STOP_5_BITS :
 274                         MPC52xx_PSC_MODE_ONE_STOP;
 275
 276
 277         baud = uart_get_baud_rate(port, new, old, 0, port->uartclk/16);
 278         quot = uart_get_divisor(port, baud);
 279         ctr = quot & 0xffff;
 280
 281         /* Get the lock */
 282         spin_lock_irqsave(&port->lock, flags);
 283
 284         /* Update the per-port timeout */
 285         uart_update_timeout(port, new->c_cflag, baud);
 286
 287         /* Do our best to flush TX & RX, so we don't loose anything */
 288         /* But we don't wait indefinitly ! */
 289         j = 5000000;    /* Maximum wait */
 290         /* FIXME Can't receive chars since set_termios might be called at early
 291          * boot for the console, all stuff is not yet ready to receive at that
 292          * time and that just makes the kernel oops */
 293         /* while (j-- && mpc52xx_uart_int_rx_chars(port)); */
 294         while (!(in_be16(&psc->mpc52xx_psc_status) & MPC52xx_PSC_SR_TXEMP) &&
 295                --j)
 296                 udelay(1);
 297
 298         if (!j)
 299                 printk( KERN_ERR "mpc52xx_uart.c: "
 300                         "Unable to flush RX & TX fifos in-time in set_termios."
 301                         "Some chars may have been lost.\n" );
 302
 303         /* Reset the TX & RX */
 304         out_8(&psc->command,MPC52xx_PSC_RST_RX);
 305         out_8(&psc->command,MPC52xx_PSC_RST_TX);
 306
 307         /* Send new mode settings */
 308         out_8(&psc->command,MPC52xx_PSC_SEL_MODE_REG_1);
 309         out_8(&psc->mode,mr1);
 310         out_8(&psc->mode,mr2);
 311         out_8(&psc->ctur,ctr >> 8);
 312         out_8(&psc->ctlr,ctr & 0xff);
 313
 314         /* Reenable TX & RX */
 315         out_8(&psc->command,MPC52xx_PSC_TX_ENABLE);
 316         out_8(&psc->command,MPC52xx_PSC_RX_ENABLE);
 317
 318         /* We're all set, release the lock */
 319         spin_unlock_irqrestore(&port->lock, flags);
 320 }
 321
 322 static const char *
 323 mpc52xx_uart_type(struct uart_port *port)
 324 {
 325         return port->type == PORT_MPC52xx ? "MPC52xx PSC" : NULL;
 326 }
 327
 328 static void
 329 mpc52xx_uart_release_port(struct uart_port *port)
 330 {
 331         if (port->flags & UPF_IOREMAP) { /* remapped by us ? */
 332                 iounmap(port->membase);
 333                 port->membase = NULL;
 334         }
 335
 336         release_mem_region(port->mapbase, MPC52xx_PSC_SIZE);
 337 }
 338
 339 static int
 340 mpc52xx_uart_request_port(struct uart_port *port)
 341 {
 342         if (port->flags & UPF_IOREMAP) /* Need to remap ? */
 343                 port->membase = ioremap(port->mapbase, MPC52xx_PSC_SIZE);
 344
 345         if (!port->membase)
 346                 return -EINVAL;
 347
 348         return request_mem_region(port->mapbase, MPC52xx_PSC_SIZE,
 349                         "mpc52xx_psc_uart") != NULL ? 0 : -EBUSY;
 350 }
 351
 352 static void
 353 mpc52xx_uart_config_port(struct uart_port *port, int flags)
 354 {
 355         if ( (flags & UART_CONFIG_TYPE) &&
 356              (mpc52xx_uart_request_port(port) == 0) )
 357                 port->type = PORT_MPC52xx;
 358 }
 359
 360 static int
 361 mpc52xx_uart_verify_port(struct uart_port *port, struct serial_struct *ser)
 362 {
 363         if ( ser->type != PORT_UNKNOWN && ser->type != PORT_MPC52xx )
 364                 return -EINVAL;
 365
 366         if ( (ser->irq != port->irq) ||
 367              (ser->io_type != SERIAL_IO_MEM) ||
 368              (ser->baud_base != port->uartclk)  ||
 369              (ser->iomem_base != (void*)port->mapbase) ||
 370              (ser->hub6 != 0 ) )
 371                 return -EINVAL;
 372
 373         return 0;
 374 }
 375
 376
 377 static struct uart_ops mpc52xx_uart_ops = {
 378         .tx_empty       = mpc52xx_uart_tx_empty,
 379         .set_mctrl      = mpc52xx_uart_set_mctrl,
 380         .get_mctrl      = mpc52xx_uart_get_mctrl,
 381         .stop_tx        = mpc52xx_uart_stop_tx,
 382         .start_tx       = mpc52xx_uart_start_tx,
 383         .send_xchar     = mpc52xx_uart_send_xchar,
 384         .stop_rx        = mpc52xx_uart_stop_rx,
 385         .enable_ms      = mpc52xx_uart_enable_ms,
 386         .break_ctl      = mpc52xx_uart_break_ctl,
 387         .startup        = mpc52xx_uart_startup,
 388         .shutdown       = mpc52xx_uart_shutdown,
 389         .set_termios    = mpc52xx_uart_set_termios,
 390 /*      .pm             = mpc52xx_uart_pm,              Not supported yet */
 391 /*      .set_wake       = mpc52xx_uart_set_wake,        Not supported yet */
 392         .type           = mpc52xx_uart_type,
 393         .release_port   = mpc52xx_uart_release_port,
 394         .request_port   = mpc52xx_uart_request_port,
 395         .config_port    = mpc52xx_uart_config_port,
 396         .verify_port    = mpc52xx_uart_verify_port
 397 };
 398
 399
 400 /* ======================================================================== */
 401 /* Interrupt handling                                                       */
 402 /* ======================================================================== */
 403
 404 static inline int
 405 mpc52xx_uart_int_rx_chars(struct uart_port *port, struct pt_regs *regs)
 406 {
 407         struct tty_struct *tty = port->info->tty;
 408         unsigned char ch;
 409         unsigned short status;
 410
 411         /* While we can read, do so ! */
 412         while ( (status = in_be16(&PSC(port)->mpc52xx_psc_status)) &
 413                 MPC52xx_PSC_SR_RXRDY) {
 414
 415                 /* If we are full, just stop reading */
 416                 if (tty->flip.count >= TTY_FLIPBUF_SIZE)
 417                         break;
 418
 419                 /* Get the char */
 420                 ch = in_8(&PSC(port)->mpc52xx_psc_buffer_8);
 421
 422                 /* Handle sysreq char */
 423 #ifdef SUPPORT_SYSRQ
 424                 if (uart_handle_sysrq_char(port, ch, regs)) {
 425                         port->sysrq = 0;
 426                         continue;
 427                 }
 428 #endif
 429
 430                 /* Store it */
 431                 *tty->flip.char_buf_ptr = ch;
 432                 *tty->flip.flag_buf_ptr = 0;
 433                 port->icount.rx++;
 434
 435                 if ( status & (MPC52xx_PSC_SR_PE |
 436                                MPC52xx_PSC_SR_FE |
 437                                MPC52xx_PSC_SR_RB |
 438                                MPC52xx_PSC_SR_OE) ) {
 439
 440                         if (status & MPC52xx_PSC_SR_RB) {
 441                                 *tty->flip.flag_buf_ptr = TTY_BREAK;
 442                                 uart_handle_break(port);
 443                         } else if (status & MPC52xx_PSC_SR_PE)
 444                                 *tty->flip.flag_buf_ptr = TTY_PARITY;
 445                         else if (status & MPC52xx_PSC_SR_FE)
 446                                 *tty->flip.flag_buf_ptr = TTY_FRAME;
 447                         if (status & MPC52xx_PSC_SR_OE) {
 448                                 /*
 449                                  * Overrun is special, since it's
 450                                  * reported immediately, and doesn't
 451                                  * affect the current character
 452                                  */
 453                                 if (tty->flip.count < (TTY_FLIPBUF_SIZE-1)) {
 454                                         tty->flip.flag_buf_ptr++;
 455                                         tty->flip.char_buf_ptr++;
 456                                         tty->flip.count++;
 457                                 }
 458                                 *tty->flip.flag_buf_ptr = TTY_OVERRUN;
 459                         }
 460
 461                         /* Clear error condition */
 462                         out_8(&PSC(port)->command,MPC52xx_PSC_RST_ERR_STAT);
 463
 464                 }
 465
 466                 tty->flip.char_buf_ptr++;
 467                 tty->flip.flag_buf_ptr++;
 468                 tty->flip.count++;
 469
 470         }
 471
 472         tty_flip_buffer_push(tty);
 473
 474         return in_be16(&PSC(port)->mpc52xx_psc_status) & MPC52xx_PSC_SR_RXRDY;
 475 }
 476
 477 static inline int
 478 mpc52xx_uart_int_tx_chars(struct uart_port *port)
 479 {
 480         struct circ_buf *xmit = &port->info->xmit;
 481
 482         /* Process out of band chars */
 483         if (port->x_char) {
 484                 out_8(&PSC(port)->mpc52xx_psc_buffer_8, port->x_char);
 485                 port->icount.tx++;
 486                 port->x_char = 0;
 487                 return 1;
 488         }
 489
 490         /* Nothing to do ? */
 491         if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
 492                 mpc52xx_uart_stop_tx(port);
 493                 return 0;
 494         }
 495
 496         /* Send chars */
 497         while (in_be16(&PSC(port)->mpc52xx_psc_status) & MPC52xx_PSC_SR_TXRDY) {
 498                 out_8(&PSC(port)->mpc52xx_psc_buffer_8, xmit->buf[xmit->tail]);
 499                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 500                 port->icount.tx++;
 501                 if (uart_circ_empty(xmit))
 502                         break;
 503         }
 504
 505         /* Wake up */
 506         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 507                 uart_write_wakeup(port);
 508
 509         /* Maybe we're done after all */
 510         if (uart_circ_empty(xmit)) {
 511                 mpc52xx_uart_stop_tx(port);
 512                 return 0;
 513         }
 514
 515         return 1;
 516 }
 517
 518 static irqreturn_t
 519 mpc52xx_uart_int(int irq, void *dev_id, struct pt_regs *regs)
 520 {
 521         struct uart_port *port = (struct uart_port *) dev_id;
 522         unsigned long pass = ISR_PASS_LIMIT;
 523         unsigned int keepgoing;
 524         unsigned short status;
 525
 526         if ( irq != port->irq ) {
 527                 printk( KERN_WARNING
 528                         "mpc52xx_uart_int : " \
 529                         "Received wrong int %d. Waiting for %d\n",
 530                        irq, port->irq);
 531                 return IRQ_NONE;
 532         }
 533
 534         spin_lock(&port->lock);
 535
 536         /* While we have stuff to do, we continue */
 537         do {
 538                 /* If we don't find anything to do, we stop */
 539                 keepgoing = 0;
 540
 541                 /* Read status */
 542                 status = in_be16(&PSC(port)->mpc52xx_psc_isr);
 543                 status &= port->read_status_mask;
 544
 545                 /* Do we need to receive chars ? */
 546                 /* For this RX interrupts must be on and some chars waiting */
 547                 if ( status & MPC52xx_PSC_IMR_RXRDY )
 548                         keepgoing |= mpc52xx_uart_int_rx_chars(port, regs);
 549
 550                 /* Do we need to send chars ? */
 551                 /* For this, TX must be ready and TX interrupt enabled */
 552                 if ( status & MPC52xx_PSC_IMR_TXRDY )
 553                         keepgoing |= mpc52xx_uart_int_tx_chars(port);
 554
 555                 /* Limit number of iteration */
 556                 if ( !(--pass) )
 557                         keepgoing = 0;
 558
 559         } while (keepgoing);
 560
 561         spin_unlock(&port->lock);
 562
 563         return IRQ_HANDLED;
 564 }
 565
 566
 567 /* ======================================================================== */
 568 /* Console ( if applicable )                                                */
 569 /* ======================================================================== */
 570
 571 #ifdef CONFIG_SERIAL_MPC52xx_CONSOLE
 572
 573 static void __init
 574 mpc52xx_console_get_options(struct uart_port *port,
 575                             int *baud, int *parity, int *bits, int *flow)
 576 {
 577         struct mpc52xx_psc __iomem *psc = PSC(port);
 578         unsigned char mr1;
 579
 580         /* Read the mode registers */
 581         out_8(&psc->command,MPC52xx_PSC_SEL_MODE_REG_1);
 582         mr1 = in_8(&psc->mode);
 583
 584         /* CT{U,L}R are write-only ! */
 585         *baud = __res.bi_baudrate ?
 586                 __res.bi_baudrate : CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
 587
 588         /* Parse them */
 589         switch (mr1 & MPC52xx_PSC_MODE_BITS_MASK) {
 590                 case MPC52xx_PSC_MODE_5_BITS:   *bits = 5; break;
 591                 case MPC52xx_PSC_MODE_6_BITS:   *bits = 6; break;
 592                 case MPC52xx_PSC_MODE_7_BITS:   *bits = 7; break;
 593                 case MPC52xx_PSC_MODE_8_BITS:
 594                 default:                        *bits = 8;
 595         }
 596
 597         if (mr1 & MPC52xx_PSC_MODE_PARNONE)
 598                 *parity = 'n';
 599         else
 600                 *parity = mr1 & MPC52xx_PSC_MODE_PARODD ? 'o' : 'e';
 601 }
 602
 603 static void
 604 mpc52xx_console_write(struct console *co, const char *s, unsigned int count)
 605 {
 606         struct uart_port *port = &mpc52xx_uart_ports[co->index];
 607         struct mpc52xx_psc __iomem *psc = PSC(port);
 608         unsigned int i, j;
 609
 610         /* Disable interrupts */
 611         out_be16(&psc->mpc52xx_psc_imr, 0);
 612
 613         /* Wait the TX buffer to be empty */
 614         j = 5000000;    /* Maximum wait */
 615         while (!(in_be16(&psc->mpc52xx_psc_status) & MPC52xx_PSC_SR_TXEMP) &&
 616                --j)
 617                 udelay(1);
 618
 619         /* Write all the chars */
 620         for ( i=0 ; i<count ; i++ ) {
 621
 622                 /* Send the char */
 623                 out_8(&psc->mpc52xx_psc_buffer_8, *s);
 624
 625                 /* Line return handling */
 626                 if ( *s++ == '\n' )
 627                         out_8(&psc->mpc52xx_psc_buffer_8, '\r');
 628
 629                 /* Wait the TX buffer to be empty */
 630                 j = 20000;      /* Maximum wait */
 631                 while (!(in_be16(&psc->mpc52xx_psc_status) &
 632                          MPC52xx_PSC_SR_TXEMP) && --j)
 633                         udelay(1);
 634         }
 635
 636         /* Restore interrupt state */
 637         out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
 638 }
 639
 640 static int __init
 641 mpc52xx_console_setup(struct console *co, char *options)
 642 {
 643         struct uart_port *port = &mpc52xx_uart_ports[co->index];
 644
 645         int baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
 646         int bits = 8;
 647         int parity = 'n';
 648         int flow = 'n';
 649
 650         if (co->index < 0 || co->index >= MPC52xx_PSC_MAXNUM)
 651                 return -EINVAL;
 652
 653         /* Basic port init. Needed since we use some uart_??? func before
 654          * real init for early access */
 655         spin_lock_init(&port->lock);
 656         port->uartclk   = __res.bi_ipbfreq / 2; /* Look at CTLR doc */
 657         port->ops       = &mpc52xx_uart_ops;
 658         port->mapbase   = MPC52xx_PA(MPC52xx_PSCx_OFFSET(co->index+1));
 659
 660         /* We ioremap ourself */
 661         port->membase = ioremap(port->mapbase, MPC52xx_PSC_SIZE);
 662         if (port->membase == NULL)
 663                 return -EINVAL;
 664
 665         /* Setup the port parameters accoding to options */
 666         if (options)
 667                 uart_parse_options(options, &baud, &parity, &bits, &flow);
 668         else
 669                 mpc52xx_console_get_options(port, &baud, &parity, &bits, &flow);
 670
 671         return uart_set_options(port, co, baud, parity, bits, flow);
 672 }
 673
 674
 675 static struct uart_driver mpc52xx_uart_driver;
 676
 677 static struct console mpc52xx_console = {
 678         .name   = "ttyPSC",
 679         .write  = mpc52xx_console_write,
 680         .device = uart_console_device,
 681         .setup  = mpc52xx_console_setup,
 682         .flags  = CON_PRINTBUFFER,
 683         .index  = -1,   /* Specified on the cmdline (e.g. console=ttyPSC0 ) */
 684         .data   = &mpc52xx_uart_driver,
 685 };
 686
 687
 688 static int __init
 689 mpc52xx_console_init(void)
 690 {
 691         register_console(&mpc52xx_console);
 692         return 0;
 693 }
 694
 695 console_initcall(mpc52xx_console_init);
 696
 697 #define MPC52xx_PSC_CONSOLE &mpc52xx_console
 698 #else
 699 #define MPC52xx_PSC_CONSOLE NULL
 700 #endif
 701
 702
 703 /* ======================================================================== */
 704 /* UART Driver                                                              */
 705 /* ======================================================================== */
 706
 707 static struct uart_driver mpc52xx_uart_driver = {
 708         .owner          = THIS_MODULE,
 709         .driver_name    = "mpc52xx_psc_uart",
 710         .dev_name       = "ttyPSC",
 711         .devfs_name     = "ttyPSC",
 712         .major          = SERIAL_PSC_MAJOR,
 713         .minor          = SERIAL_PSC_MINOR,
 714         .nr             = MPC52xx_PSC_MAXNUM,
 715         .cons           = MPC52xx_PSC_CONSOLE,
 716 };
 717
 718
 719 /* ======================================================================== */
 720 /* Platform Driver                                                          */
 721 /* ======================================================================== */
 722
 723 static int __devinit
 724 mpc52xx_uart_probe(struct platform_device *dev)
 725 {
 726         struct resource *res = dev->resource;
 727
 728         struct uart_port *port = NULL;
 729         int i, idx, ret;
 730
 731         /* Check validity & presence */
 732         idx = dev->id;
 733         if (idx < 0 || idx >= MPC52xx_PSC_MAXNUM)
 734                 return -EINVAL;
 735
 736         if (!mpc52xx_match_psc_function(idx,"uart"))
 737                 return -ENODEV;
 738
 739         /* Init the port structure */
 740         port = &mpc52xx_uart_ports[idx];
 741
 742         memset(port, 0x00, sizeof(struct uart_port));
 743
 744         spin_lock_init(&port->lock);
 745         port->uartclk   = __res.bi_ipbfreq / 2; /* Look at CTLR doc */
 746         port->fifosize  = 255; /* Should be 512 ! But it can't be */
 747                                /* stored in a unsigned char       */
 748         port->iotype    = UPIO_MEM;
 749         port->flags     = UPF_BOOT_AUTOCONF |
 750                           ( uart_console(port) ? 0 : UPF_IOREMAP );
 751         port->line      = idx;
 752         port->ops       = &mpc52xx_uart_ops;
 753
 754         /* Search for IRQ and mapbase */
 755         for (i=0 ; i<dev->num_resources ; i++, res++) {
 756                 if (res->flags & IORESOURCE_MEM)
 757                         port->mapbase = res->start;
 758                 else if (res->flags & IORESOURCE_IRQ)
 759                         port->irq = res->start;
 760         }
 761         if (!port->irq || !port->mapbase)
 762                 return -EINVAL;
 763
 764         /* Add the port to the uart sub-system */
 765         ret = uart_add_one_port(&mpc52xx_uart_driver, port);
 766         if (!ret)
 767                 platform_set_drvdata(dev, (void*)port);
 768
 769         return ret;
 770 }
 771
 772 static int
 773 mpc52xx_uart_remove(struct platform_device *dev)
 774 {
 775         struct uart_port *port = (struct uart_port *) platform_get_drvdata(dev);
 776
 777         platform_set_drvdata(dev, NULL);
 778
 779         if (port)
 780                 uart_remove_one_port(&mpc52xx_uart_driver, port);
 781
 782         return 0;
 783 }
 784
 785 #ifdef CONFIG_PM
 786 static int
 787 mpc52xx_uart_suspend(struct platform_device *dev, pm_message_t state)
 788 {
 789         struct uart_port *port = (struct uart_port *) platform_get_drvdata(dev);
 790
 791         if (sport)
 792                 uart_suspend_port(&mpc52xx_uart_driver, port);
 793
 794         return 0;
 795 }
 796
 797 static int
 798 mpc52xx_uart_resume(struct platform_device *dev)
 799 {
 800         struct uart_port *port = (struct uart_port *) platform_get_drvdata(dev);
 801
 802         if (port)
 803                 uart_resume_port(&mpc52xx_uart_driver, port);
 804
 805         return 0;
 806 }
 807 #endif
 808
 809 static struct platform_driver mpc52xx_uart_platform_driver = {
 810         .probe          = mpc52xx_uart_probe,
 811         .remove         = mpc52xx_uart_remove,
 812 #ifdef CONFIG_PM
 813         .suspend        = mpc52xx_uart_suspend,
 814         .resume         = mpc52xx_uart_resume,
 815 #endif
 816         .driver         = {
 817                 .name   = "mpc52xx-psc",
 818         },
 819 };
 820
 821
 822 /* ======================================================================== */
 823 /* Module                                                                   */
 824 /* ======================================================================== */
 825
 826 static int __init
 827 mpc52xx_uart_init(void)
 828 {
 829         int ret;
 830
 831         printk(KERN_INFO "Serial: MPC52xx PSC driver\n");
 832
 833         ret = uart_register_driver(&mpc52xx_uart_driver);
 834         if (ret == 0) {
 835                 ret = platform_driver_register(&mpc52xx_uart_platform_driver);
 836                 if (ret)
 837                         uart_unregister_driver(&mpc52xx_uart_driver);
 838         }
 839
 840         return ret;
 841 }
 842
 843 static void __exit
 844 mpc52xx_uart_exit(void)
 845 {
 846         platform_driver_unregister(&mpc52xx_uart_platform_driver);
 847         uart_unregister_driver(&mpc52xx_uart_driver);
 848 }
 849
 850
 851 module_init(mpc52xx_uart_init);
 852 module_exit(mpc52xx_uart_exit);
 853
 854 MODULE_AUTHOR("Sylvain Munaut <tnt@246tNt.com>");
 855 MODULE_DESCRIPTION("Freescale MPC52xx PSC UART");
 856 MODULE_LICENSE("GPL");