powerpc/mpc5200: Make PSC UART driver update serial errors counters
[deliverable/linux.git] / drivers / serial / mpc52xx_uart.c
1 /*
2 * Driver for the PSC of the Freescale MPC52xx PSCs configured as UARTs.
3 *
4 * FIXME According to the usermanual the status bits in the status register
5 * are only updated when the peripherals access the FIFO and not when the
6 * CPU access them. So since we use this bits to know when we stop writing
7 * and reading, they may not be updated in-time and a race condition may
8 * exists. But I haven't be able to prove this and I don't care. But if
9 * any problem arises, it might worth checking. The TX/RX FIFO Stats
10 * registers should be used in addition.
11 * Update: Actually, they seem updated ... At least the bits we use.
12 *
13 *
14 * Maintainer : Sylvain Munaut <tnt@246tNt.com>
15 *
16 * Some of the code has been inspired/copied from the 2.4 code written
17 * by Dale Farnsworth <dfarnsworth@mvista.com>.
18 *
19 * Copyright (C) 2008 Freescale Semiconductor Inc.
20 * John Rigby <jrigby@gmail.com>
21 * Added support for MPC5121
22 * Copyright (C) 2006 Secret Lab Technologies Ltd.
23 * Grant Likely <grant.likely@secretlab.ca>
24 * Copyright (C) 2004-2006 Sylvain Munaut <tnt@246tNt.com>
25 * Copyright (C) 2003 MontaVista, Software, Inc.
26 *
27 * This file is licensed under the terms of the GNU General Public License
28 * version 2. This program is licensed "as is" without any warranty of any
29 * kind, whether express or implied.
30 */
31
32 /* Platform device Usage :
33 *
34 * Since PSCs can have multiple function, the correct driver for each one
35 * is selected by calling mpc52xx_match_psc_function(...). The function
36 * handled by this driver is "uart".
37 *
38 * The driver init all necessary registers to place the PSC in uart mode without
39 * DCD. However, the pin multiplexing aren't changed and should be set either
40 * by the bootloader or in the platform init code.
41 *
42 * The idx field must be equal to the PSC index (e.g. 0 for PSC1, 1 for PSC2,
43 * and so on). So the PSC1 is mapped to /dev/ttyPSC0, PSC2 to /dev/ttyPSC1 and
44 * so on. But be warned, it's an ABSOLUTE REQUIREMENT ! This is needed mainly
45 * fpr the console code : without this 1:1 mapping, at early boot time, when we
46 * are parsing the kernel args console=ttyPSC?, we wouldn't know which PSC it
47 * will be mapped to.
48 */
49
50 /* OF Platform device Usage :
51 *
52 * This driver is only used for PSCs configured in uart mode. The device
53 * tree will have a node for each PSC in uart mode w/ device_type = "serial"
54 * and "mpc52xx-psc-uart" in the compatible string
55 *
56 * By default, PSC devices are enumerated in the order they are found. However
57 * a particular PSC number can be forces by adding 'device_no = <port#>'
58 * to the device node.
59 *
60 * The driver init all necessary registers to place the PSC in uart mode without
61 * DCD. However, the pin multiplexing aren't changed and should be set either
62 * by the bootloader or in the platform init code.
63 */
64
65 #undef DEBUG
66
67 #include <linux/device.h>
68 #include <linux/module.h>
69 #include <linux/tty.h>
70 #include <linux/serial.h>
71 #include <linux/sysrq.h>
72 #include <linux/console.h>
73 #include <linux/delay.h>
74 #include <linux/io.h>
75 #include <linux/of.h>
76 #include <linux/of_platform.h>
77
78 #include <asm/mpc52xx.h>
79 #include <asm/mpc512x.h>
80 #include <asm/mpc52xx_psc.h>
81
82 #if defined(CONFIG_SERIAL_MPC52xx_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
83 #define SUPPORT_SYSRQ
84 #endif
85
86 #include <linux/serial_core.h>
87
88
89 /* We've been assigned a range on the "Low-density serial ports" major */
90 #define SERIAL_PSC_MAJOR 204
91 #define SERIAL_PSC_MINOR 148
92
93
94 #define ISR_PASS_LIMIT 256 /* Max number of iteration in the interrupt */
95
96
97 static struct uart_port mpc52xx_uart_ports[MPC52xx_PSC_MAXNUM];
98 /* Rem: - We use the read_status_mask as a shadow of
99 * psc->mpc52xx_psc_imr
100 * - It's important that is array is all zero on start as we
101 * use it to know if it's initialized or not ! If it's not sure
102 * it's cleared, then a memset(...,0,...) should be added to
103 * the console_init
104 */
105
106 /* lookup table for matching device nodes to index numbers */
107 static struct device_node *mpc52xx_uart_nodes[MPC52xx_PSC_MAXNUM];
108
109 static void mpc52xx_uart_of_enumerate(void);
110
111
112 #define PSC(port) ((struct mpc52xx_psc __iomem *)((port)->membase))
113
114
115 /* Forward declaration of the interruption handling routine */
116 static irqreturn_t mpc52xx_uart_int(int irq, void *dev_id);
117
118
119 /* Simple macro to test if a port is console or not. This one is taken
120 * for serial_core.c and maybe should be moved to serial_core.h ? */
121 #ifdef CONFIG_SERIAL_CORE_CONSOLE
122 #define uart_console(port) \
123 ((port)->cons && (port)->cons->index == (port)->line)
124 #else
125 #define uart_console(port) (0)
126 #endif
127
128 /* ======================================================================== */
129 /* PSC fifo operations for isolating differences between 52xx and 512x */
130 /* ======================================================================== */
131
132 struct psc_ops {
133 void (*fifo_init)(struct uart_port *port);
134 int (*raw_rx_rdy)(struct uart_port *port);
135 int (*raw_tx_rdy)(struct uart_port *port);
136 int (*rx_rdy)(struct uart_port *port);
137 int (*tx_rdy)(struct uart_port *port);
138 int (*tx_empty)(struct uart_port *port);
139 void (*stop_rx)(struct uart_port *port);
140 void (*start_tx)(struct uart_port *port);
141 void (*stop_tx)(struct uart_port *port);
142 void (*rx_clr_irq)(struct uart_port *port);
143 void (*tx_clr_irq)(struct uart_port *port);
144 void (*write_char)(struct uart_port *port, unsigned char c);
145 unsigned char (*read_char)(struct uart_port *port);
146 void (*cw_disable_ints)(struct uart_port *port);
147 void (*cw_restore_ints)(struct uart_port *port);
148 unsigned long (*getuartclk)(void *p);
149 };
150
151 #ifdef CONFIG_PPC_MPC52xx
152 #define FIFO_52xx(port) ((struct mpc52xx_psc_fifo __iomem *)(PSC(port)+1))
153 static void mpc52xx_psc_fifo_init(struct uart_port *port)
154 {
155 struct mpc52xx_psc __iomem *psc = PSC(port);
156 struct mpc52xx_psc_fifo __iomem *fifo = FIFO_52xx(port);
157
158 /* /32 prescaler */
159 out_be16(&psc->mpc52xx_psc_clock_select, 0xdd00);
160
161 out_8(&fifo->rfcntl, 0x00);
162 out_be16(&fifo->rfalarm, 0x1ff);
163 out_8(&fifo->tfcntl, 0x07);
164 out_be16(&fifo->tfalarm, 0x80);
165
166 port->read_status_mask |= MPC52xx_PSC_IMR_RXRDY | MPC52xx_PSC_IMR_TXRDY;
167 out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
168 }
169
170 static int mpc52xx_psc_raw_rx_rdy(struct uart_port *port)
171 {
172 return in_be16(&PSC(port)->mpc52xx_psc_status)
173 & MPC52xx_PSC_SR_RXRDY;
174 }
175
176 static int mpc52xx_psc_raw_tx_rdy(struct uart_port *port)
177 {
178 return in_be16(&PSC(port)->mpc52xx_psc_status)
179 & MPC52xx_PSC_SR_TXRDY;
180 }
181
182
183 static int mpc52xx_psc_rx_rdy(struct uart_port *port)
184 {
185 return in_be16(&PSC(port)->mpc52xx_psc_isr)
186 & port->read_status_mask
187 & MPC52xx_PSC_IMR_RXRDY;
188 }
189
190 static int mpc52xx_psc_tx_rdy(struct uart_port *port)
191 {
192 return in_be16(&PSC(port)->mpc52xx_psc_isr)
193 & port->read_status_mask
194 & MPC52xx_PSC_IMR_TXRDY;
195 }
196
197 static int mpc52xx_psc_tx_empty(struct uart_port *port)
198 {
199 return in_be16(&PSC(port)->mpc52xx_psc_status)
200 & MPC52xx_PSC_SR_TXEMP;
201 }
202
203 static void mpc52xx_psc_start_tx(struct uart_port *port)
204 {
205 port->read_status_mask |= MPC52xx_PSC_IMR_TXRDY;
206 out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
207 }
208
209 static void mpc52xx_psc_stop_tx(struct uart_port *port)
210 {
211 port->read_status_mask &= ~MPC52xx_PSC_IMR_TXRDY;
212 out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
213 }
214
215 static void mpc52xx_psc_stop_rx(struct uart_port *port)
216 {
217 port->read_status_mask &= ~MPC52xx_PSC_IMR_RXRDY;
218 out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
219 }
220
221 static void mpc52xx_psc_rx_clr_irq(struct uart_port *port)
222 {
223 }
224
225 static void mpc52xx_psc_tx_clr_irq(struct uart_port *port)
226 {
227 }
228
229 static void mpc52xx_psc_write_char(struct uart_port *port, unsigned char c)
230 {
231 out_8(&PSC(port)->mpc52xx_psc_buffer_8, c);
232 }
233
234 static unsigned char mpc52xx_psc_read_char(struct uart_port *port)
235 {
236 return in_8(&PSC(port)->mpc52xx_psc_buffer_8);
237 }
238
239 static void mpc52xx_psc_cw_disable_ints(struct uart_port *port)
240 {
241 out_be16(&PSC(port)->mpc52xx_psc_imr, 0);
242 }
243
244 static void mpc52xx_psc_cw_restore_ints(struct uart_port *port)
245 {
246 out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
247 }
248
249 /* Search for bus-frequency property in this node or a parent */
250 static unsigned long mpc52xx_getuartclk(void *p)
251 {
252 /*
253 * 5200 UARTs have a / 32 prescaler
254 * but the generic serial code assumes 16
255 * so return ipb freq / 2
256 */
257 return mpc52xx_find_ipb_freq(p) / 2;
258 }
259
260 static struct psc_ops mpc52xx_psc_ops = {
261 .fifo_init = mpc52xx_psc_fifo_init,
262 .raw_rx_rdy = mpc52xx_psc_raw_rx_rdy,
263 .raw_tx_rdy = mpc52xx_psc_raw_tx_rdy,
264 .rx_rdy = mpc52xx_psc_rx_rdy,
265 .tx_rdy = mpc52xx_psc_tx_rdy,
266 .tx_empty = mpc52xx_psc_tx_empty,
267 .stop_rx = mpc52xx_psc_stop_rx,
268 .start_tx = mpc52xx_psc_start_tx,
269 .stop_tx = mpc52xx_psc_stop_tx,
270 .rx_clr_irq = mpc52xx_psc_rx_clr_irq,
271 .tx_clr_irq = mpc52xx_psc_tx_clr_irq,
272 .write_char = mpc52xx_psc_write_char,
273 .read_char = mpc52xx_psc_read_char,
274 .cw_disable_ints = mpc52xx_psc_cw_disable_ints,
275 .cw_restore_ints = mpc52xx_psc_cw_restore_ints,
276 .getuartclk = mpc52xx_getuartclk,
277 };
278
279 #endif /* CONFIG_MPC52xx */
280
281 #ifdef CONFIG_PPC_MPC512x
282 #define FIFO_512x(port) ((struct mpc512x_psc_fifo __iomem *)(PSC(port)+1))
283 static void mpc512x_psc_fifo_init(struct uart_port *port)
284 {
285 out_be32(&FIFO_512x(port)->txcmd, MPC512x_PSC_FIFO_RESET_SLICE);
286 out_be32(&FIFO_512x(port)->txcmd, MPC512x_PSC_FIFO_ENABLE_SLICE);
287 out_be32(&FIFO_512x(port)->txalarm, 1);
288 out_be32(&FIFO_512x(port)->tximr, 0);
289
290 out_be32(&FIFO_512x(port)->rxcmd, MPC512x_PSC_FIFO_RESET_SLICE);
291 out_be32(&FIFO_512x(port)->rxcmd, MPC512x_PSC_FIFO_ENABLE_SLICE);
292 out_be32(&FIFO_512x(port)->rxalarm, 1);
293 out_be32(&FIFO_512x(port)->rximr, 0);
294
295 out_be32(&FIFO_512x(port)->tximr, MPC512x_PSC_FIFO_ALARM);
296 out_be32(&FIFO_512x(port)->rximr, MPC512x_PSC_FIFO_ALARM);
297 }
298
299 static int mpc512x_psc_raw_rx_rdy(struct uart_port *port)
300 {
301 return !(in_be32(&FIFO_512x(port)->rxsr) & MPC512x_PSC_FIFO_EMPTY);
302 }
303
304 static int mpc512x_psc_raw_tx_rdy(struct uart_port *port)
305 {
306 return !(in_be32(&FIFO_512x(port)->txsr) & MPC512x_PSC_FIFO_FULL);
307 }
308
309 static int mpc512x_psc_rx_rdy(struct uart_port *port)
310 {
311 return in_be32(&FIFO_512x(port)->rxsr)
312 & in_be32(&FIFO_512x(port)->rximr)
313 & MPC512x_PSC_FIFO_ALARM;
314 }
315
316 static int mpc512x_psc_tx_rdy(struct uart_port *port)
317 {
318 return in_be32(&FIFO_512x(port)->txsr)
319 & in_be32(&FIFO_512x(port)->tximr)
320 & MPC512x_PSC_FIFO_ALARM;
321 }
322
323 static int mpc512x_psc_tx_empty(struct uart_port *port)
324 {
325 return in_be32(&FIFO_512x(port)->txsr)
326 & MPC512x_PSC_FIFO_EMPTY;
327 }
328
329 static void mpc512x_psc_stop_rx(struct uart_port *port)
330 {
331 unsigned long rx_fifo_imr;
332
333 rx_fifo_imr = in_be32(&FIFO_512x(port)->rximr);
334 rx_fifo_imr &= ~MPC512x_PSC_FIFO_ALARM;
335 out_be32(&FIFO_512x(port)->rximr, rx_fifo_imr);
336 }
337
338 static void mpc512x_psc_start_tx(struct uart_port *port)
339 {
340 unsigned long tx_fifo_imr;
341
342 tx_fifo_imr = in_be32(&FIFO_512x(port)->tximr);
343 tx_fifo_imr |= MPC512x_PSC_FIFO_ALARM;
344 out_be32(&FIFO_512x(port)->tximr, tx_fifo_imr);
345 }
346
347 static void mpc512x_psc_stop_tx(struct uart_port *port)
348 {
349 unsigned long tx_fifo_imr;
350
351 tx_fifo_imr = in_be32(&FIFO_512x(port)->tximr);
352 tx_fifo_imr &= ~MPC512x_PSC_FIFO_ALARM;
353 out_be32(&FIFO_512x(port)->tximr, tx_fifo_imr);
354 }
355
356 static void mpc512x_psc_rx_clr_irq(struct uart_port *port)
357 {
358 out_be32(&FIFO_512x(port)->rxisr, in_be32(&FIFO_512x(port)->rxisr));
359 }
360
361 static void mpc512x_psc_tx_clr_irq(struct uart_port *port)
362 {
363 out_be32(&FIFO_512x(port)->txisr, in_be32(&FIFO_512x(port)->txisr));
364 }
365
366 static void mpc512x_psc_write_char(struct uart_port *port, unsigned char c)
367 {
368 out_8(&FIFO_512x(port)->txdata_8, c);
369 }
370
371 static unsigned char mpc512x_psc_read_char(struct uart_port *port)
372 {
373 return in_8(&FIFO_512x(port)->rxdata_8);
374 }
375
376 static void mpc512x_psc_cw_disable_ints(struct uart_port *port)
377 {
378 port->read_status_mask =
379 in_be32(&FIFO_512x(port)->tximr) << 16 |
380 in_be32(&FIFO_512x(port)->rximr);
381 out_be32(&FIFO_512x(port)->tximr, 0);
382 out_be32(&FIFO_512x(port)->rximr, 0);
383 }
384
385 static void mpc512x_psc_cw_restore_ints(struct uart_port *port)
386 {
387 out_be32(&FIFO_512x(port)->tximr,
388 (port->read_status_mask >> 16) & 0x7f);
389 out_be32(&FIFO_512x(port)->rximr, port->read_status_mask & 0x7f);
390 }
391
392 static unsigned long mpc512x_getuartclk(void *p)
393 {
394 return mpc512x_find_ips_freq(p);
395 }
396
397 static struct psc_ops mpc512x_psc_ops = {
398 .fifo_init = mpc512x_psc_fifo_init,
399 .raw_rx_rdy = mpc512x_psc_raw_rx_rdy,
400 .raw_tx_rdy = mpc512x_psc_raw_tx_rdy,
401 .rx_rdy = mpc512x_psc_rx_rdy,
402 .tx_rdy = mpc512x_psc_tx_rdy,
403 .tx_empty = mpc512x_psc_tx_empty,
404 .stop_rx = mpc512x_psc_stop_rx,
405 .start_tx = mpc512x_psc_start_tx,
406 .stop_tx = mpc512x_psc_stop_tx,
407 .rx_clr_irq = mpc512x_psc_rx_clr_irq,
408 .tx_clr_irq = mpc512x_psc_tx_clr_irq,
409 .write_char = mpc512x_psc_write_char,
410 .read_char = mpc512x_psc_read_char,
411 .cw_disable_ints = mpc512x_psc_cw_disable_ints,
412 .cw_restore_ints = mpc512x_psc_cw_restore_ints,
413 .getuartclk = mpc512x_getuartclk,
414 };
415 #endif
416
417 static struct psc_ops *psc_ops;
418
419 /* ======================================================================== */
420 /* UART operations */
421 /* ======================================================================== */
422
423 static unsigned int
424 mpc52xx_uart_tx_empty(struct uart_port *port)
425 {
426 return psc_ops->tx_empty(port) ? TIOCSER_TEMT : 0;
427 }
428
429 static void
430 mpc52xx_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
431 {
432 /* Not implemented */
433 }
434
435 static unsigned int
436 mpc52xx_uart_get_mctrl(struct uart_port *port)
437 {
438 /* Not implemented */
439 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
440 }
441
442 static void
443 mpc52xx_uart_stop_tx(struct uart_port *port)
444 {
445 /* port->lock taken by caller */
446 psc_ops->stop_tx(port);
447 }
448
449 static void
450 mpc52xx_uart_start_tx(struct uart_port *port)
451 {
452 /* port->lock taken by caller */
453 psc_ops->start_tx(port);
454 }
455
456 static void
457 mpc52xx_uart_send_xchar(struct uart_port *port, char ch)
458 {
459 unsigned long flags;
460 spin_lock_irqsave(&port->lock, flags);
461
462 port->x_char = ch;
463 if (ch) {
464 /* Make sure tx interrupts are on */
465 /* Truly necessary ??? They should be anyway */
466 psc_ops->start_tx(port);
467 }
468
469 spin_unlock_irqrestore(&port->lock, flags);
470 }
471
472 static void
473 mpc52xx_uart_stop_rx(struct uart_port *port)
474 {
475 /* port->lock taken by caller */
476 psc_ops->stop_rx(port);
477 }
478
479 static void
480 mpc52xx_uart_enable_ms(struct uart_port *port)
481 {
482 /* Not implemented */
483 }
484
485 static void
486 mpc52xx_uart_break_ctl(struct uart_port *port, int ctl)
487 {
488 unsigned long flags;
489 spin_lock_irqsave(&port->lock, flags);
490
491 if (ctl == -1)
492 out_8(&PSC(port)->command, MPC52xx_PSC_START_BRK);
493 else
494 out_8(&PSC(port)->command, MPC52xx_PSC_STOP_BRK);
495
496 spin_unlock_irqrestore(&port->lock, flags);
497 }
498
499 static int
500 mpc52xx_uart_startup(struct uart_port *port)
501 {
502 struct mpc52xx_psc __iomem *psc = PSC(port);
503 int ret;
504
505 /* Request IRQ */
506 ret = request_irq(port->irq, mpc52xx_uart_int,
507 IRQF_DISABLED | IRQF_SAMPLE_RANDOM | IRQF_SHARED,
508 "mpc52xx_psc_uart", port);
509 if (ret)
510 return ret;
511
512 /* Reset/activate the port, clear and enable interrupts */
513 out_8(&psc->command, MPC52xx_PSC_RST_RX);
514 out_8(&psc->command, MPC52xx_PSC_RST_TX);
515
516 out_be32(&psc->sicr, 0); /* UART mode DCD ignored */
517
518 psc_ops->fifo_init(port);
519
520 out_8(&psc->command, MPC52xx_PSC_TX_ENABLE);
521 out_8(&psc->command, MPC52xx_PSC_RX_ENABLE);
522
523 return 0;
524 }
525
526 static void
527 mpc52xx_uart_shutdown(struct uart_port *port)
528 {
529 struct mpc52xx_psc __iomem *psc = PSC(port);
530
531 /* Shut down the port. Leave TX active if on a console port */
532 out_8(&psc->command, MPC52xx_PSC_RST_RX);
533 if (!uart_console(port))
534 out_8(&psc->command, MPC52xx_PSC_RST_TX);
535
536 port->read_status_mask = 0;
537 out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
538
539 /* Release interrupt */
540 free_irq(port->irq, port);
541 }
542
543 static void
544 mpc52xx_uart_set_termios(struct uart_port *port, struct ktermios *new,
545 struct ktermios *old)
546 {
547 struct mpc52xx_psc __iomem *psc = PSC(port);
548 unsigned long flags;
549 unsigned char mr1, mr2;
550 unsigned short ctr;
551 unsigned int j, baud, quot;
552
553 /* Prepare what we're gonna write */
554 mr1 = 0;
555
556 switch (new->c_cflag & CSIZE) {
557 case CS5: mr1 |= MPC52xx_PSC_MODE_5_BITS;
558 break;
559 case CS6: mr1 |= MPC52xx_PSC_MODE_6_BITS;
560 break;
561 case CS7: mr1 |= MPC52xx_PSC_MODE_7_BITS;
562 break;
563 case CS8:
564 default: mr1 |= MPC52xx_PSC_MODE_8_BITS;
565 }
566
567 if (new->c_cflag & PARENB) {
568 mr1 |= (new->c_cflag & PARODD) ?
569 MPC52xx_PSC_MODE_PARODD : MPC52xx_PSC_MODE_PAREVEN;
570 } else
571 mr1 |= MPC52xx_PSC_MODE_PARNONE;
572
573
574 mr2 = 0;
575
576 if (new->c_cflag & CSTOPB)
577 mr2 |= MPC52xx_PSC_MODE_TWO_STOP;
578 else
579 mr2 |= ((new->c_cflag & CSIZE) == CS5) ?
580 MPC52xx_PSC_MODE_ONE_STOP_5_BITS :
581 MPC52xx_PSC_MODE_ONE_STOP;
582
583
584 baud = uart_get_baud_rate(port, new, old, 0, port->uartclk/16);
585 quot = uart_get_divisor(port, baud);
586 ctr = quot & 0xffff;
587
588 /* Get the lock */
589 spin_lock_irqsave(&port->lock, flags);
590
591 /* Update the per-port timeout */
592 uart_update_timeout(port, new->c_cflag, baud);
593
594 /* Do our best to flush TX & RX, so we don't lose anything */
595 /* But we don't wait indefinitely ! */
596 j = 5000000; /* Maximum wait */
597 /* FIXME Can't receive chars since set_termios might be called at early
598 * boot for the console, all stuff is not yet ready to receive at that
599 * time and that just makes the kernel oops */
600 /* while (j-- && mpc52xx_uart_int_rx_chars(port)); */
601 while (!mpc52xx_uart_tx_empty(port) && --j)
602 udelay(1);
603
604 if (!j)
605 printk(KERN_ERR "mpc52xx_uart.c: "
606 "Unable to flush RX & TX fifos in-time in set_termios."
607 "Some chars may have been lost.\n");
608
609 /* Reset the TX & RX */
610 out_8(&psc->command, MPC52xx_PSC_RST_RX);
611 out_8(&psc->command, MPC52xx_PSC_RST_TX);
612
613 /* Send new mode settings */
614 out_8(&psc->command, MPC52xx_PSC_SEL_MODE_REG_1);
615 out_8(&psc->mode, mr1);
616 out_8(&psc->mode, mr2);
617 out_8(&psc->ctur, ctr >> 8);
618 out_8(&psc->ctlr, ctr & 0xff);
619
620 /* Reenable TX & RX */
621 out_8(&psc->command, MPC52xx_PSC_TX_ENABLE);
622 out_8(&psc->command, MPC52xx_PSC_RX_ENABLE);
623
624 /* We're all set, release the lock */
625 spin_unlock_irqrestore(&port->lock, flags);
626 }
627
628 static const char *
629 mpc52xx_uart_type(struct uart_port *port)
630 {
631 return port->type == PORT_MPC52xx ? "MPC52xx PSC" : NULL;
632 }
633
634 static void
635 mpc52xx_uart_release_port(struct uart_port *port)
636 {
637 /* remapped by us ? */
638 if (port->flags & UPF_IOREMAP) {
639 iounmap(port->membase);
640 port->membase = NULL;
641 }
642
643 release_mem_region(port->mapbase, sizeof(struct mpc52xx_psc));
644 }
645
646 static int
647 mpc52xx_uart_request_port(struct uart_port *port)
648 {
649 int err;
650
651 if (port->flags & UPF_IOREMAP) /* Need to remap ? */
652 port->membase = ioremap(port->mapbase,
653 sizeof(struct mpc52xx_psc));
654
655 if (!port->membase)
656 return -EINVAL;
657
658 err = request_mem_region(port->mapbase, sizeof(struct mpc52xx_psc),
659 "mpc52xx_psc_uart") != NULL ? 0 : -EBUSY;
660
661 if (err && (port->flags & UPF_IOREMAP)) {
662 iounmap(port->membase);
663 port->membase = NULL;
664 }
665
666 return err;
667 }
668
669 static void
670 mpc52xx_uart_config_port(struct uart_port *port, int flags)
671 {
672 if ((flags & UART_CONFIG_TYPE)
673 && (mpc52xx_uart_request_port(port) == 0))
674 port->type = PORT_MPC52xx;
675 }
676
677 static int
678 mpc52xx_uart_verify_port(struct uart_port *port, struct serial_struct *ser)
679 {
680 if (ser->type != PORT_UNKNOWN && ser->type != PORT_MPC52xx)
681 return -EINVAL;
682
683 if ((ser->irq != port->irq) ||
684 (ser->io_type != SERIAL_IO_MEM) ||
685 (ser->baud_base != port->uartclk) ||
686 (ser->iomem_base != (void *)port->mapbase) ||
687 (ser->hub6 != 0))
688 return -EINVAL;
689
690 return 0;
691 }
692
693
694 static struct uart_ops mpc52xx_uart_ops = {
695 .tx_empty = mpc52xx_uart_tx_empty,
696 .set_mctrl = mpc52xx_uart_set_mctrl,
697 .get_mctrl = mpc52xx_uart_get_mctrl,
698 .stop_tx = mpc52xx_uart_stop_tx,
699 .start_tx = mpc52xx_uart_start_tx,
700 .send_xchar = mpc52xx_uart_send_xchar,
701 .stop_rx = mpc52xx_uart_stop_rx,
702 .enable_ms = mpc52xx_uart_enable_ms,
703 .break_ctl = mpc52xx_uart_break_ctl,
704 .startup = mpc52xx_uart_startup,
705 .shutdown = mpc52xx_uart_shutdown,
706 .set_termios = mpc52xx_uart_set_termios,
707 /* .pm = mpc52xx_uart_pm, Not supported yet */
708 /* .set_wake = mpc52xx_uart_set_wake, Not supported yet */
709 .type = mpc52xx_uart_type,
710 .release_port = mpc52xx_uart_release_port,
711 .request_port = mpc52xx_uart_request_port,
712 .config_port = mpc52xx_uart_config_port,
713 .verify_port = mpc52xx_uart_verify_port
714 };
715
716
717 /* ======================================================================== */
718 /* Interrupt handling */
719 /* ======================================================================== */
720
721 static inline int
722 mpc52xx_uart_int_rx_chars(struct uart_port *port)
723 {
724 struct tty_struct *tty = port->info->port.tty;
725 unsigned char ch, flag;
726 unsigned short status;
727
728 /* While we can read, do so ! */
729 while (psc_ops->raw_rx_rdy(port)) {
730 /* Get the char */
731 ch = psc_ops->read_char(port);
732
733 /* Handle sysreq char */
734 #ifdef SUPPORT_SYSRQ
735 if (uart_handle_sysrq_char(port, ch)) {
736 port->sysrq = 0;
737 continue;
738 }
739 #endif
740
741 /* Store it */
742
743 flag = TTY_NORMAL;
744 port->icount.rx++;
745
746 status = in_be16(&PSC(port)->mpc52xx_psc_status);
747
748 if (status & (MPC52xx_PSC_SR_PE |
749 MPC52xx_PSC_SR_FE |
750 MPC52xx_PSC_SR_RB)) {
751
752 if (status & MPC52xx_PSC_SR_RB) {
753 flag = TTY_BREAK;
754 uart_handle_break(port);
755 port->icount.brk++;
756 } else if (status & MPC52xx_PSC_SR_PE) {
757 flag = TTY_PARITY;
758 port->icount.parity++;
759 }
760 else if (status & MPC52xx_PSC_SR_FE) {
761 flag = TTY_FRAME;
762 port->icount.frame++;
763 }
764
765 /* Clear error condition */
766 out_8(&PSC(port)->command, MPC52xx_PSC_RST_ERR_STAT);
767
768 }
769 tty_insert_flip_char(tty, ch, flag);
770 if (status & MPC52xx_PSC_SR_OE) {
771 /*
772 * Overrun is special, since it's
773 * reported immediately, and doesn't
774 * affect the current character
775 */
776 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
777 port->icount.overrun++;
778 }
779 }
780
781 spin_unlock(&port->lock);
782 tty_flip_buffer_push(tty);
783 spin_lock(&port->lock);
784
785 return psc_ops->raw_rx_rdy(port);
786 }
787
788 static inline int
789 mpc52xx_uart_int_tx_chars(struct uart_port *port)
790 {
791 struct circ_buf *xmit = &port->info->xmit;
792
793 /* Process out of band chars */
794 if (port->x_char) {
795 psc_ops->write_char(port, port->x_char);
796 port->icount.tx++;
797 port->x_char = 0;
798 return 1;
799 }
800
801 /* Nothing to do ? */
802 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
803 mpc52xx_uart_stop_tx(port);
804 return 0;
805 }
806
807 /* Send chars */
808 while (psc_ops->raw_tx_rdy(port)) {
809 psc_ops->write_char(port, xmit->buf[xmit->tail]);
810 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
811 port->icount.tx++;
812 if (uart_circ_empty(xmit))
813 break;
814 }
815
816 /* Wake up */
817 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
818 uart_write_wakeup(port);
819
820 /* Maybe we're done after all */
821 if (uart_circ_empty(xmit)) {
822 mpc52xx_uart_stop_tx(port);
823 return 0;
824 }
825
826 return 1;
827 }
828
829 static irqreturn_t
830 mpc52xx_uart_int(int irq, void *dev_id)
831 {
832 struct uart_port *port = dev_id;
833 unsigned long pass = ISR_PASS_LIMIT;
834 unsigned int keepgoing;
835
836 spin_lock(&port->lock);
837
838 /* While we have stuff to do, we continue */
839 do {
840 /* If we don't find anything to do, we stop */
841 keepgoing = 0;
842
843 psc_ops->rx_clr_irq(port);
844 if (psc_ops->rx_rdy(port))
845 keepgoing |= mpc52xx_uart_int_rx_chars(port);
846
847 psc_ops->tx_clr_irq(port);
848 if (psc_ops->tx_rdy(port))
849 keepgoing |= mpc52xx_uart_int_tx_chars(port);
850
851 /* Limit number of iteration */
852 if (!(--pass))
853 keepgoing = 0;
854
855 } while (keepgoing);
856
857 spin_unlock(&port->lock);
858
859 return IRQ_HANDLED;
860 }
861
862
863 /* ======================================================================== */
864 /* Console ( if applicable ) */
865 /* ======================================================================== */
866
867 #ifdef CONFIG_SERIAL_MPC52xx_CONSOLE
868
869 static void __init
870 mpc52xx_console_get_options(struct uart_port *port,
871 int *baud, int *parity, int *bits, int *flow)
872 {
873 struct mpc52xx_psc __iomem *psc = PSC(port);
874 unsigned char mr1;
875
876 pr_debug("mpc52xx_console_get_options(port=%p)\n", port);
877
878 /* Read the mode registers */
879 out_8(&psc->command, MPC52xx_PSC_SEL_MODE_REG_1);
880 mr1 = in_8(&psc->mode);
881
882 /* CT{U,L}R are write-only ! */
883 *baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
884
885 /* Parse them */
886 switch (mr1 & MPC52xx_PSC_MODE_BITS_MASK) {
887 case MPC52xx_PSC_MODE_5_BITS:
888 *bits = 5;
889 break;
890 case MPC52xx_PSC_MODE_6_BITS:
891 *bits = 6;
892 break;
893 case MPC52xx_PSC_MODE_7_BITS:
894 *bits = 7;
895 break;
896 case MPC52xx_PSC_MODE_8_BITS:
897 default:
898 *bits = 8;
899 }
900
901 if (mr1 & MPC52xx_PSC_MODE_PARNONE)
902 *parity = 'n';
903 else
904 *parity = mr1 & MPC52xx_PSC_MODE_PARODD ? 'o' : 'e';
905 }
906
907 static void
908 mpc52xx_console_write(struct console *co, const char *s, unsigned int count)
909 {
910 struct uart_port *port = &mpc52xx_uart_ports[co->index];
911 unsigned int i, j;
912
913 /* Disable interrupts */
914 psc_ops->cw_disable_ints(port);
915
916 /* Wait the TX buffer to be empty */
917 j = 5000000; /* Maximum wait */
918 while (!mpc52xx_uart_tx_empty(port) && --j)
919 udelay(1);
920
921 /* Write all the chars */
922 for (i = 0; i < count; i++, s++) {
923 /* Line return handling */
924 if (*s == '\n')
925 psc_ops->write_char(port, '\r');
926
927 /* Send the char */
928 psc_ops->write_char(port, *s);
929
930 /* Wait the TX buffer to be empty */
931 j = 20000; /* Maximum wait */
932 while (!mpc52xx_uart_tx_empty(port) && --j)
933 udelay(1);
934 }
935
936 /* Restore interrupt state */
937 psc_ops->cw_restore_ints(port);
938 }
939
940
941 static int __init
942 mpc52xx_console_setup(struct console *co, char *options)
943 {
944 struct uart_port *port = &mpc52xx_uart_ports[co->index];
945 struct device_node *np = mpc52xx_uart_nodes[co->index];
946 unsigned int uartclk;
947 struct resource res;
948 int ret;
949
950 int baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
951 int bits = 8;
952 int parity = 'n';
953 int flow = 'n';
954
955 pr_debug("mpc52xx_console_setup co=%p, co->index=%i, options=%s\n",
956 co, co->index, options);
957
958 if ((co->index < 0) || (co->index > MPC52xx_PSC_MAXNUM)) {
959 pr_debug("PSC%x out of range\n", co->index);
960 return -EINVAL;
961 }
962
963 if (!np) {
964 pr_debug("PSC%x not found in device tree\n", co->index);
965 return -EINVAL;
966 }
967
968 pr_debug("Console on ttyPSC%x is %s\n",
969 co->index, mpc52xx_uart_nodes[co->index]->full_name);
970
971 /* Fetch register locations */
972 ret = of_address_to_resource(np, 0, &res);
973 if (ret) {
974 pr_debug("Could not get resources for PSC%x\n", co->index);
975 return ret;
976 }
977
978 uartclk = psc_ops->getuartclk(np);
979 if (uartclk == 0) {
980 pr_debug("Could not find uart clock frequency!\n");
981 return -EINVAL;
982 }
983
984 /* Basic port init. Needed since we use some uart_??? func before
985 * real init for early access */
986 spin_lock_init(&port->lock);
987 port->uartclk = uartclk;
988 port->ops = &mpc52xx_uart_ops;
989 port->mapbase = res.start;
990 port->membase = ioremap(res.start, sizeof(struct mpc52xx_psc));
991 port->irq = irq_of_parse_and_map(np, 0);
992
993 if (port->membase == NULL)
994 return -EINVAL;
995
996 pr_debug("mpc52xx-psc uart at %p, mapped to %p, irq=%x, freq=%i\n",
997 (void *)port->mapbase, port->membase,
998 port->irq, port->uartclk);
999
1000 /* Setup the port parameters accoding to options */
1001 if (options)
1002 uart_parse_options(options, &baud, &parity, &bits, &flow);
1003 else
1004 mpc52xx_console_get_options(port, &baud, &parity, &bits, &flow);
1005
1006 pr_debug("Setting console parameters: %i %i%c1 flow=%c\n",
1007 baud, bits, parity, flow);
1008
1009 return uart_set_options(port, co, baud, parity, bits, flow);
1010 }
1011
1012
1013 static struct uart_driver mpc52xx_uart_driver;
1014
1015 static struct console mpc52xx_console = {
1016 .name = "ttyPSC",
1017 .write = mpc52xx_console_write,
1018 .device = uart_console_device,
1019 .setup = mpc52xx_console_setup,
1020 .flags = CON_PRINTBUFFER,
1021 .index = -1, /* Specified on the cmdline (e.g. console=ttyPSC0) */
1022 .data = &mpc52xx_uart_driver,
1023 };
1024
1025
1026 static int __init
1027 mpc52xx_console_init(void)
1028 {
1029 mpc52xx_uart_of_enumerate();
1030 register_console(&mpc52xx_console);
1031 return 0;
1032 }
1033
1034 console_initcall(mpc52xx_console_init);
1035
1036 #define MPC52xx_PSC_CONSOLE &mpc52xx_console
1037 #else
1038 #define MPC52xx_PSC_CONSOLE NULL
1039 #endif
1040
1041
1042 /* ======================================================================== */
1043 /* UART Driver */
1044 /* ======================================================================== */
1045
1046 static struct uart_driver mpc52xx_uart_driver = {
1047 .driver_name = "mpc52xx_psc_uart",
1048 .dev_name = "ttyPSC",
1049 .major = SERIAL_PSC_MAJOR,
1050 .minor = SERIAL_PSC_MINOR,
1051 .nr = MPC52xx_PSC_MAXNUM,
1052 .cons = MPC52xx_PSC_CONSOLE,
1053 };
1054
1055 /* ======================================================================== */
1056 /* OF Platform Driver */
1057 /* ======================================================================== */
1058
1059 static struct of_device_id mpc52xx_uart_of_match[] = {
1060 #ifdef CONFIG_PPC_MPC52xx
1061 { .compatible = "fsl,mpc5200-psc-uart", .data = &mpc52xx_psc_ops, },
1062 /* binding used by old lite5200 device trees: */
1063 { .compatible = "mpc5200-psc-uart", .data = &mpc52xx_psc_ops, },
1064 /* binding used by efika: */
1065 { .compatible = "mpc5200-serial", .data = &mpc52xx_psc_ops, },
1066 #endif
1067 #ifdef CONFIG_PPC_MPC512x
1068 { .compatible = "fsl,mpc5121-psc-uart", .data = &mpc512x_psc_ops, },
1069 #endif
1070 {},
1071 };
1072
1073 static int __devinit
1074 mpc52xx_uart_of_probe(struct of_device *op, const struct of_device_id *match)
1075 {
1076 int idx = -1;
1077 unsigned int uartclk;
1078 struct uart_port *port = NULL;
1079 struct resource res;
1080 int ret;
1081
1082 dev_dbg(&op->dev, "mpc52xx_uart_probe(op=%p, match=%p)\n", op, match);
1083
1084 /* Check validity & presence */
1085 for (idx = 0; idx < MPC52xx_PSC_MAXNUM; idx++)
1086 if (mpc52xx_uart_nodes[idx] == op->node)
1087 break;
1088 if (idx >= MPC52xx_PSC_MAXNUM)
1089 return -EINVAL;
1090 pr_debug("Found %s assigned to ttyPSC%x\n",
1091 mpc52xx_uart_nodes[idx]->full_name, idx);
1092
1093 uartclk = psc_ops->getuartclk(op->node);
1094 if (uartclk == 0) {
1095 dev_dbg(&op->dev, "Could not find uart clock frequency!\n");
1096 return -EINVAL;
1097 }
1098
1099 /* Init the port structure */
1100 port = &mpc52xx_uart_ports[idx];
1101
1102 spin_lock_init(&port->lock);
1103 port->uartclk = uartclk;
1104 port->fifosize = 512;
1105 port->iotype = UPIO_MEM;
1106 port->flags = UPF_BOOT_AUTOCONF |
1107 (uart_console(port) ? 0 : UPF_IOREMAP);
1108 port->line = idx;
1109 port->ops = &mpc52xx_uart_ops;
1110 port->dev = &op->dev;
1111
1112 /* Search for IRQ and mapbase */
1113 ret = of_address_to_resource(op->node, 0, &res);
1114 if (ret)
1115 return ret;
1116
1117 port->mapbase = res.start;
1118 port->irq = irq_of_parse_and_map(op->node, 0);
1119
1120 dev_dbg(&op->dev, "mpc52xx-psc uart at %p, irq=%x, freq=%i\n",
1121 (void *)port->mapbase, port->irq, port->uartclk);
1122
1123 if ((port->irq == NO_IRQ) || !port->mapbase) {
1124 printk(KERN_ERR "Could not allocate resources for PSC\n");
1125 return -EINVAL;
1126 }
1127
1128 /* Add the port to the uart sub-system */
1129 ret = uart_add_one_port(&mpc52xx_uart_driver, port);
1130 if (!ret)
1131 dev_set_drvdata(&op->dev, (void *)port);
1132
1133 return ret;
1134 }
1135
1136 static int
1137 mpc52xx_uart_of_remove(struct of_device *op)
1138 {
1139 struct uart_port *port = dev_get_drvdata(&op->dev);
1140 dev_set_drvdata(&op->dev, NULL);
1141
1142 if (port) {
1143 uart_remove_one_port(&mpc52xx_uart_driver, port);
1144 irq_dispose_mapping(port->irq);
1145 }
1146
1147 return 0;
1148 }
1149
1150 #ifdef CONFIG_PM
1151 static int
1152 mpc52xx_uart_of_suspend(struct of_device *op, pm_message_t state)
1153 {
1154 struct uart_port *port = (struct uart_port *) dev_get_drvdata(&op->dev);
1155
1156 if (port)
1157 uart_suspend_port(&mpc52xx_uart_driver, port);
1158
1159 return 0;
1160 }
1161
1162 static int
1163 mpc52xx_uart_of_resume(struct of_device *op)
1164 {
1165 struct uart_port *port = (struct uart_port *) dev_get_drvdata(&op->dev);
1166
1167 if (port)
1168 uart_resume_port(&mpc52xx_uart_driver, port);
1169
1170 return 0;
1171 }
1172 #endif
1173
1174 static void
1175 mpc52xx_uart_of_assign(struct device_node *np, int idx)
1176 {
1177 int free_idx = -1;
1178 int i;
1179
1180 /* Find the first free node */
1181 for (i = 0; i < MPC52xx_PSC_MAXNUM; i++) {
1182 if (mpc52xx_uart_nodes[i] == NULL) {
1183 free_idx = i;
1184 break;
1185 }
1186 }
1187
1188 if ((idx < 0) || (idx >= MPC52xx_PSC_MAXNUM))
1189 idx = free_idx;
1190
1191 if (idx < 0)
1192 return; /* No free slot; abort */
1193
1194 of_node_get(np);
1195 /* If the slot is already occupied, then swap slots */
1196 if (mpc52xx_uart_nodes[idx] && (free_idx != -1))
1197 mpc52xx_uart_nodes[free_idx] = mpc52xx_uart_nodes[idx];
1198 mpc52xx_uart_nodes[idx] = np;
1199 }
1200
1201 static void
1202 mpc52xx_uart_of_enumerate(void)
1203 {
1204 static int enum_done;
1205 struct device_node *np;
1206 const unsigned int *devno;
1207 const struct of_device_id *match;
1208 int i;
1209
1210 if (enum_done)
1211 return;
1212
1213 for_each_node_by_type(np, "serial") {
1214 match = of_match_node(mpc52xx_uart_of_match, np);
1215 if (!match)
1216 continue;
1217
1218 psc_ops = match->data;
1219
1220 /* Is a particular device number requested? */
1221 devno = of_get_property(np, "port-number", NULL);
1222 mpc52xx_uart_of_assign(np, devno ? *devno : -1);
1223 }
1224
1225 enum_done = 1;
1226
1227 for (i = 0; i < MPC52xx_PSC_MAXNUM; i++) {
1228 if (mpc52xx_uart_nodes[i])
1229 pr_debug("%s assigned to ttyPSC%x\n",
1230 mpc52xx_uart_nodes[i]->full_name, i);
1231 }
1232 }
1233
1234 MODULE_DEVICE_TABLE(of, mpc52xx_uart_of_match);
1235
1236 static struct of_platform_driver mpc52xx_uart_of_driver = {
1237 .match_table = mpc52xx_uart_of_match,
1238 .probe = mpc52xx_uart_of_probe,
1239 .remove = mpc52xx_uart_of_remove,
1240 #ifdef CONFIG_PM
1241 .suspend = mpc52xx_uart_of_suspend,
1242 .resume = mpc52xx_uart_of_resume,
1243 #endif
1244 .driver = {
1245 .name = "mpc52xx-psc-uart",
1246 },
1247 };
1248
1249
1250 /* ======================================================================== */
1251 /* Module */
1252 /* ======================================================================== */
1253
1254 static int __init
1255 mpc52xx_uart_init(void)
1256 {
1257 int ret;
1258
1259 printk(KERN_INFO "Serial: MPC52xx PSC UART driver\n");
1260
1261 ret = uart_register_driver(&mpc52xx_uart_driver);
1262 if (ret) {
1263 printk(KERN_ERR "%s: uart_register_driver failed (%i)\n",
1264 __FILE__, ret);
1265 return ret;
1266 }
1267
1268 mpc52xx_uart_of_enumerate();
1269
1270 ret = of_register_platform_driver(&mpc52xx_uart_of_driver);
1271 if (ret) {
1272 printk(KERN_ERR "%s: of_register_platform_driver failed (%i)\n",
1273 __FILE__, ret);
1274 uart_unregister_driver(&mpc52xx_uart_driver);
1275 return ret;
1276 }
1277
1278 return 0;
1279 }
1280
1281 static void __exit
1282 mpc52xx_uart_exit(void)
1283 {
1284 of_unregister_platform_driver(&mpc52xx_uart_of_driver);
1285 uart_unregister_driver(&mpc52xx_uart_driver);
1286 }
1287
1288
1289 module_init(mpc52xx_uart_init);
1290 module_exit(mpc52xx_uart_exit);
1291
1292 MODULE_AUTHOR("Sylvain Munaut <tnt@246tNt.com>");
1293 MODULE_DESCRIPTION("Freescale MPC52xx PSC UART");
1294 MODULE_LICENSE("GPL");
This page took 0.099921 seconds and 6 git commands to generate.