drivers/serial/uartlite.c

   1 /*
   2  * uartlite.c: Serial driver for Xilinx uartlite serial controller
   3  *
   4  * Copyright (C) 2006 Peter Korsgaard <jacmet@sunsite.dk>
   5  * Copyright (C) 2007 Secret Lab Technologies Ltd.
   6  *
   7  * This file is licensed under the terms of the GNU General Public License
   8  * version 2.  This program is licensed "as is" without any warranty of any
   9  * kind, whether express or implied.
  10  */
  11
  12 #include <linux/platform_device.h>
  13 #include <linux/module.h>
  14 #include <linux/console.h>
  15 #include <linux/serial.h>
  16 #include <linux/serial_core.h>
  17 #include <linux/tty.h>
  18 #include <linux/delay.h>
  19 #include <linux/interrupt.h>
  20 #include <linux/init.h>
  21 #include <asm/io.h>
  22 #if defined(CONFIG_OF)
  23 #include <linux/of.h>
  24 #include <linux/of_device.h>
  25 #include <linux/of_platform.h>
  26
  27 /* Match table for of_platform binding */
  28 static struct of_device_id ulite_of_match[] __devinitdata = {
  29         { .compatible = "xlnx,opb-uartlite-1.00.b", },
  30         { .compatible = "xlnx,xps-uartlite-1.00.a", },
  31         {}
  32 };
  33 MODULE_DEVICE_TABLE(of, ulite_of_match);
  34
  35 #endif
  36
  37 #define ULITE_NAME              "ttyUL"
  38 #define ULITE_MAJOR             204
  39 #define ULITE_MINOR             187
  40 #define ULITE_NR_UARTS          4
  41
  42 /* ---------------------------------------------------------------------
  43  * Register definitions
  44  *
  45  * For register details see datasheet:
  46  * http://www.xilinx.com/bvdocs/ipcenter/data_sheet/opb_uartlite.pdf
  47  */
  48
  49 #define ULITE_RX                0x00
  50 #define ULITE_TX                0x04
  51 #define ULITE_STATUS            0x08
  52 #define ULITE_CONTROL           0x0c
  53
  54 #define ULITE_REGION            16
  55
  56 #define ULITE_STATUS_RXVALID    0x01
  57 #define ULITE_STATUS_RXFULL     0x02
  58 #define ULITE_STATUS_TXEMPTY    0x04
  59 #define ULITE_STATUS_TXFULL     0x08
  60 #define ULITE_STATUS_IE         0x10
  61 #define ULITE_STATUS_OVERRUN    0x20
  62 #define ULITE_STATUS_FRAME      0x40
  63 #define ULITE_STATUS_PARITY     0x80
  64
  65 #define ULITE_CONTROL_RST_TX    0x01
  66 #define ULITE_CONTROL_RST_RX    0x02
  67 #define ULITE_CONTROL_IE        0x10
  68
  69
  70 static struct uart_port ulite_ports[ULITE_NR_UARTS];
  71
  72 /* ---------------------------------------------------------------------
  73  * Core UART driver operations
  74  */
  75
  76 static int ulite_receive(struct uart_port *port, int stat)
  77 {
  78         struct tty_struct *tty = port->info->port.tty;
  79         unsigned char ch = 0;
  80         char flag = TTY_NORMAL;
  81
  82         if ((stat & (ULITE_STATUS_RXVALID | ULITE_STATUS_OVERRUN
  83                      | ULITE_STATUS_FRAME)) == 0)
  84                 return 0;
  85
  86         /* stats */
  87         if (stat & ULITE_STATUS_RXVALID) {
  88                 port->icount.rx++;
  89                 ch = readb(port->membase + ULITE_RX);
  90
  91                 if (stat & ULITE_STATUS_PARITY)
  92                         port->icount.parity++;
  93         }
  94
  95         if (stat & ULITE_STATUS_OVERRUN)
  96                 port->icount.overrun++;
  97
  98         if (stat & ULITE_STATUS_FRAME)
  99                 port->icount.frame++;
 100
 101
 102         /* drop byte with parity error if IGNPAR specificed */
 103         if (stat & port->ignore_status_mask & ULITE_STATUS_PARITY)
 104                 stat &= ~ULITE_STATUS_RXVALID;
 105
 106         stat &= port->read_status_mask;
 107
 108         if (stat & ULITE_STATUS_PARITY)
 109                 flag = TTY_PARITY;
 110
 111
 112         stat &= ~port->ignore_status_mask;
 113
 114         if (stat & ULITE_STATUS_RXVALID)
 115                 tty_insert_flip_char(tty, ch, flag);
 116
 117         if (stat & ULITE_STATUS_FRAME)
 118                 tty_insert_flip_char(tty, 0, TTY_FRAME);
 119
 120         if (stat & ULITE_STATUS_OVERRUN)
 121                 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
 122
 123         return 1;
 124 }
 125
 126 static int ulite_transmit(struct uart_port *port, int stat)
 127 {
 128         struct circ_buf *xmit  = &port->info->xmit;
 129
 130         if (stat & ULITE_STATUS_TXFULL)
 131                 return 0;
 132
 133         if (port->x_char) {
 134                 writeb(port->x_char, port->membase + ULITE_TX);
 135                 port->x_char = 0;
 136                 port->icount.tx++;
 137                 return 1;
 138         }
 139
 140         if (uart_circ_empty(xmit) || uart_tx_stopped(port))
 141                 return 0;
 142
 143         writeb(xmit->buf[xmit->tail], port->membase + ULITE_TX);
 144         xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE-1);
 145         port->icount.tx++;
 146
 147         /* wake up */
 148         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 149                 uart_write_wakeup(port);
 150
 151         return 1;
 152 }
 153
 154 static irqreturn_t ulite_isr(int irq, void *dev_id)
 155 {
 156         struct uart_port *port = dev_id;
 157         int busy;
 158
 159         do {
 160                 int stat = readb(port->membase + ULITE_STATUS);
 161                 busy  = ulite_receive(port, stat);
 162                 busy |= ulite_transmit(port, stat);
 163         } while (busy);
 164
 165         tty_flip_buffer_push(port->info->port.tty);
 166
 167         return IRQ_HANDLED;
 168 }
 169
 170 static unsigned int ulite_tx_empty(struct uart_port *port)
 171 {
 172         unsigned long flags;
 173         unsigned int ret;
 174
 175         spin_lock_irqsave(&port->lock, flags);
 176         ret = readb(port->membase + ULITE_STATUS);
 177         spin_unlock_irqrestore(&port->lock, flags);
 178
 179         return ret & ULITE_STATUS_TXEMPTY ? TIOCSER_TEMT : 0;
 180 }
 181
 182 static unsigned int ulite_get_mctrl(struct uart_port *port)
 183 {
 184         return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
 185 }
 186
 187 static void ulite_set_mctrl(struct uart_port *port, unsigned int mctrl)
 188 {
 189         /* N/A */
 190 }
 191
 192 static void ulite_stop_tx(struct uart_port *port)
 193 {
 194         /* N/A */
 195 }
 196
 197 static void ulite_start_tx(struct uart_port *port)
 198 {
 199         ulite_transmit(port, readb(port->membase + ULITE_STATUS));
 200 }
 201
 202 static void ulite_stop_rx(struct uart_port *port)
 203 {
 204         /* don't forward any more data (like !CREAD) */
 205         port->ignore_status_mask = ULITE_STATUS_RXVALID | ULITE_STATUS_PARITY
 206                 | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
 207 }
 208
 209 static void ulite_enable_ms(struct uart_port *port)
 210 {
 211         /* N/A */
 212 }
 213
 214 static void ulite_break_ctl(struct uart_port *port, int ctl)
 215 {
 216         /* N/A */
 217 }
 218
 219 static int ulite_startup(struct uart_port *port)
 220 {
 221         int ret;
 222
 223         ret = request_irq(port->irq, ulite_isr,
 224                           IRQF_DISABLED | IRQF_SAMPLE_RANDOM, "uartlite", port);
 225         if (ret)
 226                 return ret;
 227
 228         writeb(ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX,
 229                port->membase + ULITE_CONTROL);
 230         writeb(ULITE_CONTROL_IE, port->membase + ULITE_CONTROL);
 231
 232         return 0;
 233 }
 234
 235 static void ulite_shutdown(struct uart_port *port)
 236 {
 237         writeb(0, port->membase + ULITE_CONTROL);
 238         readb(port->membase + ULITE_CONTROL); /* dummy */
 239         free_irq(port->irq, port);
 240 }
 241
 242 static void ulite_set_termios(struct uart_port *port, struct ktermios *termios,
 243                               struct ktermios *old)
 244 {
 245         unsigned long flags;
 246         unsigned int baud;
 247
 248         spin_lock_irqsave(&port->lock, flags);
 249
 250         port->read_status_mask = ULITE_STATUS_RXVALID | ULITE_STATUS_OVERRUN
 251                 | ULITE_STATUS_TXFULL;
 252
 253         if (termios->c_iflag & INPCK)
 254                 port->read_status_mask |=
 255                         ULITE_STATUS_PARITY | ULITE_STATUS_FRAME;
 256
 257         port->ignore_status_mask = 0;
 258         if (termios->c_iflag & IGNPAR)
 259                 port->ignore_status_mask |= ULITE_STATUS_PARITY
 260                         | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
 261
 262         /* ignore all characters if CREAD is not set */
 263         if ((termios->c_cflag & CREAD) == 0)
 264                 port->ignore_status_mask |=
 265                         ULITE_STATUS_RXVALID | ULITE_STATUS_PARITY
 266                         | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
 267
 268         /* update timeout */
 269         baud = uart_get_baud_rate(port, termios, old, 0, 460800);
 270         uart_update_timeout(port, termios->c_cflag, baud);
 271
 272         spin_unlock_irqrestore(&port->lock, flags);
 273 }
 274
 275 static const char *ulite_type(struct uart_port *port)
 276 {
 277         return port->type == PORT_UARTLITE ? "uartlite" : NULL;
 278 }
 279
 280 static void ulite_release_port(struct uart_port *port)
 281 {
 282         release_mem_region(port->mapbase, ULITE_REGION);
 283         iounmap(port->membase);
 284         port->membase = NULL;
 285 }
 286
 287 static int ulite_request_port(struct uart_port *port)
 288 {
 289         pr_debug("ulite console: port=%p; port->mapbase=%x\n",
 290                  port, port->mapbase);
 291
 292         if (!request_mem_region(port->mapbase, ULITE_REGION, "uartlite")) {
 293                 dev_err(port->dev, "Memory region busy\n");
 294                 return -EBUSY;
 295         }
 296
 297         port->membase = ioremap(port->mapbase, ULITE_REGION);
 298         if (!port->membase) {
 299                 dev_err(port->dev, "Unable to map registers\n");
 300                 release_mem_region(port->mapbase, ULITE_REGION);
 301                 return -EBUSY;
 302         }
 303
 304         return 0;
 305 }
 306
 307 static void ulite_config_port(struct uart_port *port, int flags)
 308 {
 309         if (!ulite_request_port(port))
 310                 port->type = PORT_UARTLITE;
 311 }
 312
 313 static int ulite_verify_port(struct uart_port *port, struct serial_struct *ser)
 314 {
 315         /* we don't want the core code to modify any port params */
 316         return -EINVAL;
 317 }
 318
 319 static struct uart_ops ulite_ops = {
 320         .tx_empty       = ulite_tx_empty,
 321         .set_mctrl      = ulite_set_mctrl,
 322         .get_mctrl      = ulite_get_mctrl,
 323         .stop_tx        = ulite_stop_tx,
 324         .start_tx       = ulite_start_tx,
 325         .stop_rx        = ulite_stop_rx,
 326         .enable_ms      = ulite_enable_ms,
 327         .break_ctl      = ulite_break_ctl,
 328         .startup        = ulite_startup,
 329         .shutdown       = ulite_shutdown,
 330         .set_termios    = ulite_set_termios,
 331         .type           = ulite_type,
 332         .release_port   = ulite_release_port,
 333         .request_port   = ulite_request_port,
 334         .config_port    = ulite_config_port,
 335         .verify_port    = ulite_verify_port
 336 };
 337
 338 /* ---------------------------------------------------------------------
 339  * Console driver operations
 340  */
 341
 342 #ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
 343 static void ulite_console_wait_tx(struct uart_port *port)
 344 {
 345         int i;
 346         u8 val;
 347
 348         /* Spin waiting for TX fifo to have space available */
 349         for (i = 0; i < 100000; i++) {
 350                 val = readb(port->membase + ULITE_STATUS);
 351                 if ((val & ULITE_STATUS_TXFULL) == 0)
 352                         break;
 353                 cpu_relax();
 354         }
 355 }
 356
 357 static void ulite_console_putchar(struct uart_port *port, int ch)
 358 {
 359         ulite_console_wait_tx(port);
 360         writeb(ch, port->membase + ULITE_TX);
 361 }
 362
 363 static void ulite_console_write(struct console *co, const char *s,
 364                                 unsigned int count)
 365 {
 366         struct uart_port *port = &ulite_ports[co->index];
 367         unsigned long flags;
 368         unsigned int ier;
 369         int locked = 1;
 370
 371         if (oops_in_progress) {
 372                 locked = spin_trylock_irqsave(&port->lock, flags);
 373         } else
 374                 spin_lock_irqsave(&port->lock, flags);
 375
 376         /* save and disable interrupt */
 377         ier = readb(port->membase + ULITE_STATUS) & ULITE_STATUS_IE;
 378         writeb(0, port->membase + ULITE_CONTROL);
 379
 380         uart_console_write(port, s, count, ulite_console_putchar);
 381
 382         ulite_console_wait_tx(port);
 383
 384         /* restore interrupt state */
 385         if (ier)
 386                 writeb(ULITE_CONTROL_IE, port->membase + ULITE_CONTROL);
 387
 388         if (locked)
 389                 spin_unlock_irqrestore(&port->lock, flags);
 390 }
 391
 392 static int __init ulite_console_setup(struct console *co, char *options)
 393 {
 394         struct uart_port *port;
 395         int baud = 9600;
 396         int bits = 8;
 397         int parity = 'n';
 398         int flow = 'n';
 399
 400         if (co->index < 0 || co->index >= ULITE_NR_UARTS)
 401                 return -EINVAL;
 402
 403         port = &ulite_ports[co->index];
 404
 405         /* Has the device been initialized yet? */
 406         if (!port->mapbase) {
 407                 pr_debug("console on ttyUL%i not present\n", co->index);
 408                 return -ENODEV;
 409         }
 410
 411         /* not initialized yet? */
 412         if (!port->membase) {
 413                 if (ulite_request_port(port))
 414                         return -ENODEV;
 415         }
 416
 417         if (options)
 418                 uart_parse_options(options, &baud, &parity, &bits, &flow);
 419
 420         return uart_set_options(port, co, baud, parity, bits, flow);
 421 }
 422
 423 static struct uart_driver ulite_uart_driver;
 424
 425 static struct console ulite_console = {
 426         .name   = ULITE_NAME,
 427         .write  = ulite_console_write,
 428         .device = uart_console_device,
 429         .setup  = ulite_console_setup,
 430         .flags  = CON_PRINTBUFFER,
 431         .index  = -1, /* Specified on the cmdline (e.g. console=ttyUL0 ) */
 432         .data   = &ulite_uart_driver,
 433 };
 434
 435 static int __init ulite_console_init(void)
 436 {
 437         register_console(&ulite_console);
 438         return 0;
 439 }
 440
 441 console_initcall(ulite_console_init);
 442
 443 #endif /* CONFIG_SERIAL_UARTLITE_CONSOLE */
 444
 445 static struct uart_driver ulite_uart_driver = {
 446         .owner          = THIS_MODULE,
 447         .driver_name    = "uartlite",
 448         .dev_name       = ULITE_NAME,
 449         .major          = ULITE_MAJOR,
 450         .minor          = ULITE_MINOR,
 451         .nr             = ULITE_NR_UARTS,
 452 #ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
 453         .cons           = &ulite_console,
 454 #endif
 455 };
 456
 457 /* ---------------------------------------------------------------------
 458  * Port assignment functions (mapping devices to uart_port structures)
 459  */
 460
 461 /** ulite_assign: register a uartlite device with the driver
 462  *
 463  * @dev: pointer to device structure
 464  * @id: requested id number.  Pass -1 for automatic port assignment
 465  * @base: base address of uartlite registers
 466  * @irq: irq number for uartlite
 467  *
 468  * Returns: 0 on success, <0 otherwise
 469  */
 470 static int __devinit ulite_assign(struct device *dev, int id, u32 base, int irq)
 471 {
 472         struct uart_port *port;
 473         int rc;
 474
 475         /* if id = -1; then scan for a free id and use that */
 476         if (id < 0) {
 477                 for (id = 0; id < ULITE_NR_UARTS; id++)
 478                         if (ulite_ports[id].mapbase == 0)
 479                                 break;
 480         }
 481         if (id < 0 || id >= ULITE_NR_UARTS) {
 482                 dev_err(dev, "%s%i too large\n", ULITE_NAME, id);
 483                 return -EINVAL;
 484         }
 485
 486         if ((ulite_ports[id].mapbase) && (ulite_ports[id].mapbase != base)) {
 487                 dev_err(dev, "cannot assign to %s%i; it is already in use\n",
 488                         ULITE_NAME, id);
 489                 return -EBUSY;
 490         }
 491
 492         port = &ulite_ports[id];
 493
 494         spin_lock_init(&port->lock);
 495         port->fifosize = 16;
 496         port->regshift = 2;
 497         port->iotype = UPIO_MEM;
 498         port->iobase = 1; /* mark port in use */
 499         port->mapbase = base;
 500         port->membase = NULL;
 501         port->ops = &ulite_ops;
 502         port->irq = irq;
 503         port->flags = UPF_BOOT_AUTOCONF;
 504         port->dev = dev;
 505         port->type = PORT_UNKNOWN;
 506         port->line = id;
 507
 508         dev_set_drvdata(dev, port);
 509
 510         /* Register the port */
 511         rc = uart_add_one_port(&ulite_uart_driver, port);
 512         if (rc) {
 513                 dev_err(dev, "uart_add_one_port() failed; err=%i\n", rc);
 514                 port->mapbase = 0;
 515                 dev_set_drvdata(dev, NULL);
 516                 return rc;
 517         }
 518
 519         return 0;
 520 }
 521
 522 /** ulite_release: register a uartlite device with the driver
 523  *
 524  * @dev: pointer to device structure
 525  */
 526 static int __devexit ulite_release(struct device *dev)
 527 {
 528         struct uart_port *port = dev_get_drvdata(dev);
 529         int rc = 0;
 530
 531         if (port) {
 532                 rc = uart_remove_one_port(&ulite_uart_driver, port);
 533                 dev_set_drvdata(dev, NULL);
 534                 port->mapbase = 0;
 535         }
 536
 537         return rc;
 538 }
 539
 540 /* ---------------------------------------------------------------------
 541  * Platform bus binding
 542  */
 543
 544 static int __devinit ulite_probe(struct platform_device *pdev)
 545 {
 546         struct resource *res, *res2;
 547
 548         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 549         if (!res)
 550                 return -ENODEV;
 551
 552         res2 = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
 553         if (!res2)
 554                 return -ENODEV;
 555
 556         return ulite_assign(&pdev->dev, pdev->id, res->start, res2->start);
 557 }
 558
 559 static int __devexit ulite_remove(struct platform_device *pdev)
 560 {
 561         return ulite_release(&pdev->dev);
 562 }
 563
 564 /* work with hotplug and coldplug */
 565 MODULE_ALIAS("platform:uartlite");
 566
 567 static struct platform_driver ulite_platform_driver = {
 568         .probe  = ulite_probe,
 569         .remove = __devexit_p(ulite_remove),
 570         .driver = {
 571                    .owner = THIS_MODULE,
 572                    .name  = "uartlite",
 573                    },
 574 };
 575
 576 /* ---------------------------------------------------------------------
 577  * OF bus bindings
 578  */
 579 #if defined(CONFIG_OF)
 580 static int __devinit
 581 ulite_of_probe(struct of_device *op, const struct of_device_id *match)
 582 {
 583         struct resource res;
 584         const unsigned int *id;
 585         int irq, rc;
 586
 587         dev_dbg(&op->dev, "%s(%p, %p)\n", __func__, op, match);
 588
 589         rc = of_address_to_resource(op->node, 0, &res);
 590         if (rc) {
 591                 dev_err(&op->dev, "invalid address\n");
 592                 return rc;
 593         }
 594
 595         irq = irq_of_parse_and_map(op->node, 0);
 596
 597         id = of_get_property(op->node, "port-number", NULL);
 598
 599         return ulite_assign(&op->dev, id ? *id : -1, res.start+3, irq);
 600 }
 601
 602 static int __devexit ulite_of_remove(struct of_device *op)
 603 {
 604         return ulite_release(&op->dev);
 605 }
 606
 607 static struct of_platform_driver ulite_of_driver = {
 608         .owner = THIS_MODULE,
 609         .name = "uartlite",
 610         .match_table = ulite_of_match,
 611         .probe = ulite_of_probe,
 612         .remove = __devexit_p(ulite_of_remove),
 613         .driver = {
 614                 .name = "uartlite",
 615         },
 616 };
 617
 618 /* Registration helpers to keep the number of #ifdefs to a minimum */
 619 static inline int __init ulite_of_register(void)
 620 {
 621         pr_debug("uartlite: calling of_register_platform_driver()\n");
 622         return of_register_platform_driver(&ulite_of_driver);
 623 }
 624
 625 static inline void __exit ulite_of_unregister(void)
 626 {
 627         of_unregister_platform_driver(&ulite_of_driver);
 628 }
 629 #else /* CONFIG_OF */
 630 /* CONFIG_OF not enabled; do nothing helpers */
 631 static inline int __init ulite_of_register(void) { return 0; }
 632 static inline void __exit ulite_of_unregister(void) { }
 633 #endif /* CONFIG_OF */
 634
 635 /* ---------------------------------------------------------------------
 636  * Module setup/teardown
 637  */
 638
 639 int __init ulite_init(void)
 640 {
 641         int ret;
 642
 643         pr_debug("uartlite: calling uart_register_driver()\n");
 644         ret = uart_register_driver(&ulite_uart_driver);
 645         if (ret)
 646                 goto err_uart;
 647
 648         ret = ulite_of_register();
 649         if (ret)
 650                 goto err_of;
 651
 652         pr_debug("uartlite: calling platform_driver_register()\n");
 653         ret = platform_driver_register(&ulite_platform_driver);
 654         if (ret)
 655                 goto err_plat;
 656
 657         return 0;
 658
 659 err_plat:
 660         ulite_of_unregister();
 661 err_of:
 662         uart_unregister_driver(&ulite_uart_driver);
 663 err_uart:
 664         printk(KERN_ERR "registering uartlite driver failed: err=%i", ret);
 665         return ret;
 666 }
 667
 668 void __exit ulite_exit(void)
 669 {
 670         platform_driver_unregister(&ulite_platform_driver);
 671         ulite_of_unregister();
 672         uart_unregister_driver(&ulite_uart_driver);
 673 }
 674
 675 module_init(ulite_init);
 676 module_exit(ulite_exit);
 677
 678 MODULE_AUTHOR("Peter Korsgaard <jacmet@sunsite.dk>");
 679 MODULE_DESCRIPTION("Xilinx uartlite serial driver");
 680 MODULE_LICENSE("GPL");