drivers/sh/pfc/core.c

   1 /*
   2  * SuperH Pin Function Controller support.
   3  *
   4  * Copyright (C) 2008 Magnus Damm
   5  * Copyright (C) 2009 - 2012 Paul Mundt
   6  *
   7  * This file is subject to the terms and conditions of the GNU General Public
   8  * License.  See the file "COPYING" in the main directory of this archive
   9  * for more details.
  10  */
  11
  12 #define DRV_NAME "sh-pfc"
  13 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  14
  15 #include <linux/errno.h>
  16 #include <linux/kernel.h>
  17 #include <linux/sh_pfc.h>
  18 #include <linux/module.h>
  19 #include <linux/err.h>
  20 #include <linux/io.h>
  21 #include <linux/bitops.h>
  22 #include <linux/slab.h>
  23 #include <linux/ioport.h>
  24 #include <linux/pinctrl/machine.h>
  25 #include <linux/platform_device.h>
  26
  27 #include "core.h"
  28
  29 static int pfc_ioremap(struct sh_pfc *pfc)
  30 {
  31         struct resource *res;
  32         int k;
  33
  34         if (!pfc->pdata->num_resources)
  35                 return 0;
  36
  37         pfc->window = devm_kzalloc(pfc->dev, pfc->pdata->num_resources *
  38                                    sizeof(*pfc->window), GFP_NOWAIT);
  39         if (!pfc->window)
  40                 return -ENOMEM;
  41
  42         for (k = 0; k < pfc->pdata->num_resources; k++) {
  43                 res = pfc->pdata->resource + k;
  44                 WARN_ON(resource_type(res) != IORESOURCE_MEM);
  45                 pfc->window[k].phys = res->start;
  46                 pfc->window[k].size = resource_size(res);
  47                 pfc->window[k].virt = devm_ioremap_nocache(pfc->dev, res->start,
  48                                                            resource_size(res));
  49                 if (!pfc->window[k].virt)
  50                         return -ENOMEM;
  51         }
  52
  53         return 0;
  54 }
  55
  56 static void __iomem *pfc_phys_to_virt(struct sh_pfc *pfc,
  57                                       unsigned long address)
  58 {
  59         struct pfc_window *window;
  60         int k;
  61
  62         /* scan through physical windows and convert address */
  63         for (k = 0; k < pfc->pdata->num_resources; k++) {
  64                 window = pfc->window + k;
  65
  66                 if (address < window->phys)
  67                         continue;
  68
  69                 if (address >= (window->phys + window->size))
  70                         continue;
  71
  72                 return window->virt + (address - window->phys);
  73         }
  74
  75         /* no windows defined, register must be 1:1 mapped virt:phys */
  76         return (void __iomem *)address;
  77 }
  78
  79 static int enum_in_range(pinmux_enum_t enum_id, struct pinmux_range *r)
  80 {
  81         if (enum_id < r->begin)
  82                 return 0;
  83
  84         if (enum_id > r->end)
  85                 return 0;
  86
  87         return 1;
  88 }
  89
  90 static unsigned long gpio_read_raw_reg(void __iomem *mapped_reg,
  91                                        unsigned long reg_width)
  92 {
  93         switch (reg_width) {
  94         case 8:
  95                 return ioread8(mapped_reg);
  96         case 16:
  97                 return ioread16(mapped_reg);
  98         case 32:
  99                 return ioread32(mapped_reg);
 100         }
 101
 102         BUG();
 103         return 0;
 104 }
 105
 106 static void gpio_write_raw_reg(void __iomem *mapped_reg,
 107                                unsigned long reg_width,
 108                                unsigned long data)
 109 {
 110         switch (reg_width) {
 111         case 8:
 112                 iowrite8(data, mapped_reg);
 113                 return;
 114         case 16:
 115                 iowrite16(data, mapped_reg);
 116                 return;
 117         case 32:
 118                 iowrite32(data, mapped_reg);
 119                 return;
 120         }
 121
 122         BUG();
 123 }
 124
 125 int sh_pfc_read_bit(struct pinmux_data_reg *dr, unsigned long in_pos)
 126 {
 127         unsigned long pos;
 128
 129         pos = dr->reg_width - (in_pos + 1);
 130
 131         pr_debug("read_bit: addr = %lx, pos = %ld, "
 132                  "r_width = %ld\n", dr->reg, pos, dr->reg_width);
 133
 134         return (gpio_read_raw_reg(dr->mapped_reg, dr->reg_width) >> pos) & 1;
 135 }
 136
 137 void sh_pfc_write_bit(struct pinmux_data_reg *dr, unsigned long in_pos,
 138                       unsigned long value)
 139 {
 140         unsigned long pos;
 141
 142         pos = dr->reg_width - (in_pos + 1);
 143
 144         pr_debug("write_bit addr = %lx, value = %d, pos = %ld, "
 145                  "r_width = %ld\n",
 146                  dr->reg, !!value, pos, dr->reg_width);
 147
 148         if (value)
 149                 set_bit(pos, &dr->reg_shadow);
 150         else
 151                 clear_bit(pos, &dr->reg_shadow);
 152
 153         gpio_write_raw_reg(dr->mapped_reg, dr->reg_width, dr->reg_shadow);
 154 }
 155
 156 static void config_reg_helper(struct sh_pfc *pfc,
 157                               struct pinmux_cfg_reg *crp,
 158                               unsigned long in_pos,
 159                               void __iomem **mapped_regp,
 160                               unsigned long *maskp,
 161                               unsigned long *posp)
 162 {
 163         int k;
 164
 165         *mapped_regp = pfc_phys_to_virt(pfc, crp->reg);
 166
 167         if (crp->field_width) {
 168                 *maskp = (1 << crp->field_width) - 1;
 169                 *posp = crp->reg_width - ((in_pos + 1) * crp->field_width);
 170         } else {
 171                 *maskp = (1 << crp->var_field_width[in_pos]) - 1;
 172                 *posp = crp->reg_width;
 173                 for (k = 0; k <= in_pos; k++)
 174                         *posp -= crp->var_field_width[k];
 175         }
 176 }
 177
 178 static int read_config_reg(struct sh_pfc *pfc,
 179                            struct pinmux_cfg_reg *crp,
 180                            unsigned long field)
 181 {
 182         void __iomem *mapped_reg;
 183         unsigned long mask, pos;
 184
 185         config_reg_helper(pfc, crp, field, &mapped_reg, &mask, &pos);
 186
 187         pr_debug("read_reg: addr = %lx, field = %ld, "
 188                  "r_width = %ld, f_width = %ld\n",
 189                  crp->reg, field, crp->reg_width, crp->field_width);
 190
 191         return (gpio_read_raw_reg(mapped_reg, crp->reg_width) >> pos) & mask;
 192 }
 193
 194 static void write_config_reg(struct sh_pfc *pfc,
 195                              struct pinmux_cfg_reg *crp,
 196                              unsigned long field, unsigned long value)
 197 {
 198         void __iomem *mapped_reg;
 199         unsigned long mask, pos, data;
 200
 201         config_reg_helper(pfc, crp, field, &mapped_reg, &mask, &pos);
 202
 203         pr_debug("write_reg addr = %lx, value = %ld, field = %ld, "
 204                  "r_width = %ld, f_width = %ld\n",
 205                  crp->reg, value, field, crp->reg_width, crp->field_width);
 206
 207         mask = ~(mask << pos);
 208         value = value << pos;
 209
 210         data = gpio_read_raw_reg(mapped_reg, crp->reg_width);
 211         data &= mask;
 212         data |= value;
 213
 214         if (pfc->pdata->unlock_reg)
 215                 gpio_write_raw_reg(pfc_phys_to_virt(pfc, pfc->pdata->unlock_reg),
 216                                    32, ~data);
 217
 218         gpio_write_raw_reg(mapped_reg, crp->reg_width, data);
 219 }
 220
 221 static int setup_data_reg(struct sh_pfc *pfc, unsigned gpio)
 222 {
 223         struct pinmux_gpio *gpiop = &pfc->pdata->gpios[gpio];
 224         struct pinmux_data_reg *data_reg;
 225         int k, n;
 226
 227         if (!enum_in_range(gpiop->enum_id, &pfc->pdata->data))
 228                 return -1;
 229
 230         k = 0;
 231         while (1) {
 232                 data_reg = pfc->pdata->data_regs + k;
 233
 234                 if (!data_reg->reg_width)
 235                         break;
 236
 237                 data_reg->mapped_reg = pfc_phys_to_virt(pfc, data_reg->reg);
 238
 239                 for (n = 0; n < data_reg->reg_width; n++) {
 240                         if (data_reg->enum_ids[n] == gpiop->enum_id) {
 241                                 gpiop->flags &= ~PINMUX_FLAG_DREG;
 242                                 gpiop->flags |= (k << PINMUX_FLAG_DREG_SHIFT);
 243                                 gpiop->flags &= ~PINMUX_FLAG_DBIT;
 244                                 gpiop->flags |= (n << PINMUX_FLAG_DBIT_SHIFT);
 245                                 return 0;
 246                         }
 247                 }
 248                 k++;
 249         }
 250
 251         BUG();
 252
 253         return -1;
 254 }
 255
 256 static void setup_data_regs(struct sh_pfc *pfc)
 257 {
 258         struct pinmux_data_reg *drp;
 259         int k;
 260
 261         for (k = pfc->pdata->first_gpio; k <= pfc->pdata->last_gpio; k++)
 262                 setup_data_reg(pfc, k);
 263
 264         k = 0;
 265         while (1) {
 266                 drp = pfc->pdata->data_regs + k;
 267
 268                 if (!drp->reg_width)
 269                         break;
 270
 271                 drp->reg_shadow = gpio_read_raw_reg(drp->mapped_reg,
 272                                                     drp->reg_width);
 273                 k++;
 274         }
 275 }
 276
 277 int sh_pfc_get_data_reg(struct sh_pfc *pfc, unsigned gpio,
 278                         struct pinmux_data_reg **drp, int *bitp)
 279 {
 280         struct pinmux_gpio *gpiop = &pfc->pdata->gpios[gpio];
 281         int k, n;
 282
 283         if (!enum_in_range(gpiop->enum_id, &pfc->pdata->data))
 284                 return -1;
 285
 286         k = (gpiop->flags & PINMUX_FLAG_DREG) >> PINMUX_FLAG_DREG_SHIFT;
 287         n = (gpiop->flags & PINMUX_FLAG_DBIT) >> PINMUX_FLAG_DBIT_SHIFT;
 288         *drp = pfc->pdata->data_regs + k;
 289         *bitp = n;
 290         return 0;
 291 }
 292
 293 static int get_config_reg(struct sh_pfc *pfc, pinmux_enum_t enum_id,
 294                           struct pinmux_cfg_reg **crp,
 295                           int *fieldp, int *valuep,
 296                           unsigned long **cntp)
 297 {
 298         struct pinmux_cfg_reg *config_reg;
 299         unsigned long r_width, f_width, curr_width, ncomb;
 300         int k, m, n, pos, bit_pos;
 301
 302         k = 0;
 303         while (1) {
 304                 config_reg = pfc->pdata->cfg_regs + k;
 305
 306                 r_width = config_reg->reg_width;
 307                 f_width = config_reg->field_width;
 308
 309                 if (!r_width)
 310                         break;
 311
 312                 pos = 0;
 313                 m = 0;
 314                 for (bit_pos = 0; bit_pos < r_width; bit_pos += curr_width) {
 315                         if (f_width)
 316                                 curr_width = f_width;
 317                         else
 318                                 curr_width = config_reg->var_field_width[m];
 319
 320                         ncomb = 1 << curr_width;
 321                         for (n = 0; n < ncomb; n++) {
 322                                 if (config_reg->enum_ids[pos + n] == enum_id) {
 323                                         *crp = config_reg;
 324                                         *fieldp = m;
 325                                         *valuep = n;
 326                                         *cntp = &config_reg->cnt[m];
 327                                         return 0;
 328                                 }
 329                         }
 330                         pos += ncomb;
 331                         m++;
 332                 }
 333                 k++;
 334         }
 335
 336         return -1;
 337 }
 338
 339 int sh_pfc_gpio_to_enum(struct sh_pfc *pfc, unsigned gpio, int pos,
 340                         pinmux_enum_t *enum_idp)
 341 {
 342         pinmux_enum_t enum_id = pfc->pdata->gpios[gpio].enum_id;
 343         pinmux_enum_t *data = pfc->pdata->gpio_data;
 344         int k;
 345
 346         if (!enum_in_range(enum_id, &pfc->pdata->data)) {
 347                 if (!enum_in_range(enum_id, &pfc->pdata->mark)) {
 348                         pr_err("non data/mark enum_id for gpio %d\n", gpio);
 349                         return -1;
 350                 }
 351         }
 352
 353         if (pos) {
 354                 *enum_idp = data[pos + 1];
 355                 return pos + 1;
 356         }
 357
 358         for (k = 0; k < pfc->pdata->gpio_data_size; k++) {
 359                 if (data[k] == enum_id) {
 360                         *enum_idp = data[k + 1];
 361                         return k + 1;
 362                 }
 363         }
 364
 365         pr_err("cannot locate data/mark enum_id for gpio %d\n", gpio);
 366         return -1;
 367 }
 368
 369 int sh_pfc_config_gpio(struct sh_pfc *pfc, unsigned gpio, int pinmux_type,
 370                        int cfg_mode)
 371 {
 372         struct pinmux_cfg_reg *cr = NULL;
 373         pinmux_enum_t enum_id;
 374         struct pinmux_range *range;
 375         int in_range, pos, field, value;
 376         unsigned long *cntp;
 377
 378         switch (pinmux_type) {
 379
 380         case PINMUX_TYPE_FUNCTION:
 381                 range = NULL;
 382                 break;
 383
 384         case PINMUX_TYPE_OUTPUT:
 385                 range = &pfc->pdata->output;
 386                 break;
 387
 388         case PINMUX_TYPE_INPUT:
 389                 range = &pfc->pdata->input;
 390                 break;
 391
 392         case PINMUX_TYPE_INPUT_PULLUP:
 393                 range = &pfc->pdata->input_pu;
 394                 break;
 395
 396         case PINMUX_TYPE_INPUT_PULLDOWN:
 397                 range = &pfc->pdata->input_pd;
 398                 break;
 399
 400         default:
 401                 goto out_err;
 402         }
 403
 404         pos = 0;
 405         enum_id = 0;
 406         field = 0;
 407         value = 0;
 408         while (1) {
 409                 pos = sh_pfc_gpio_to_enum(pfc, gpio, pos, &enum_id);
 410                 if (pos <= 0)
 411                         goto out_err;
 412
 413                 if (!enum_id)
 414                         break;
 415
 416                 /* first check if this is a function enum */
 417                 in_range = enum_in_range(enum_id, &pfc->pdata->function);
 418                 if (!in_range) {
 419                         /* not a function enum */
 420                         if (range) {
 421                                 /*
 422                                  * other range exists, so this pin is
 423                                  * a regular GPIO pin that now is being
 424                                  * bound to a specific direction.
 425                                  *
 426                                  * for this case we only allow function enums
 427                                  * and the enums that match the other range.
 428                                  */
 429                                 in_range = enum_in_range(enum_id, range);
 430
 431                                 /*
 432                                  * special case pass through for fixed
 433                                  * input-only or output-only pins without
 434                                  * function enum register association.
 435                                  */
 436                                 if (in_range && enum_id == range->force)
 437                                         continue;
 438                         } else {
 439                                 /*
 440                                  * no other range exists, so this pin
 441                                  * must then be of the function type.
 442                                  *
 443                                  * allow function type pins to select
 444                                  * any combination of function/in/out
 445                                  * in their MARK lists.
 446                                  */
 447                                 in_range = 1;
 448                         }
 449                 }
 450
 451                 if (!in_range)
 452                         continue;
 453
 454                 if (get_config_reg(pfc, enum_id, &cr,
 455                                    &field, &value, &cntp) != 0)
 456                         goto out_err;
 457
 458                 switch (cfg_mode) {
 459                 case GPIO_CFG_DRYRUN:
 460                         if (!*cntp ||
 461                             (read_config_reg(pfc, cr, field) != value))
 462                                 continue;
 463                         break;
 464
 465                 case GPIO_CFG_REQ:
 466                         write_config_reg(pfc, cr, field, value);
 467                         *cntp = *cntp + 1;
 468                         break;
 469
 470                 case GPIO_CFG_FREE:
 471                         *cntp = *cntp - 1;
 472                         break;
 473                 }
 474         }
 475
 476         return 0;
 477  out_err:
 478         return -1;
 479 }
 480
 481 static int sh_pfc_probe(struct platform_device *pdev)
 482 {
 483         struct sh_pfc_platform_data *pdata = pdev->dev.platform_data;
 484         struct sh_pfc *pfc;
 485         int ret;
 486
 487         /*
 488          * Ensure that the type encoding fits
 489          */
 490         BUILD_BUG_ON(PINMUX_FLAG_TYPE > ((1 << PINMUX_FLAG_DBIT_SHIFT) - 1));
 491
 492         if (pdata == NULL)
 493                 return -ENODEV;
 494
 495         pfc = devm_kzalloc(&pdev->dev, sizeof(pfc), GFP_KERNEL);
 496         if (pfc == NULL)
 497                 return -ENOMEM;
 498
 499         pfc->pdata = pdata;
 500         pfc->dev = &pdev->dev;
 501
 502         ret = pfc_ioremap(pfc);
 503         if (unlikely(ret < 0))
 504                 return ret;
 505
 506         spin_lock_init(&pfc->lock);
 507
 508         pinctrl_provide_dummies();
 509         setup_data_regs(pfc);
 510
 511         /*
 512          * Initialize pinctrl bindings first
 513          */
 514         ret = sh_pfc_register_pinctrl(pfc);
 515         if (unlikely(ret != 0))
 516                 return ret;
 517
 518 #ifdef CONFIG_GPIO_SH_PFC
 519         /*
 520          * Then the GPIO chip
 521          */
 522         ret = sh_pfc_register_gpiochip(pfc);
 523         if (unlikely(ret != 0)) {
 524                 /*
 525                  * If the GPIO chip fails to come up we still leave the
 526                  * PFC state as it is, given that there are already
 527                  * extant users of it that have succeeded by this point.
 528                  */
 529                 pr_notice("failed to init GPIO chip, ignoring...\n");
 530         }
 531 #endif
 532
 533         platform_set_drvdata(pdev, pfc);
 534
 535         pr_info("%s support registered\n", pdata->name);
 536
 537         return 0;
 538 }
 539
 540 static int sh_pfc_remove(struct platform_device *pdev)
 541 {
 542         struct sh_pfc *pfc = platform_get_drvdata(pdev);
 543
 544 #ifdef CONFIG_GPIO_SH_PFC
 545         sh_pfc_unregister_gpiochip(pfc);
 546 #endif
 547         sh_pfc_unregister_pinctrl(pfc);
 548
 549         platform_set_drvdata(pdev, NULL);
 550
 551         return 0;
 552 }
 553
 554 static const struct platform_device_id sh_pfc_id_table[] = {
 555         { "sh-pfc", 0 },
 556         { },
 557 };
 558 MODULE_DEVICE_TABLE(platform, sh_pfc_id_table);
 559
 560 static struct platform_driver sh_pfc_driver = {
 561         .probe          = sh_pfc_probe,
 562         .remove         = sh_pfc_remove,
 563         .id_table       = sh_pfc_id_table,
 564         .driver         = {
 565                 .name   = DRV_NAME,
 566                 .owner  = THIS_MODULE,
 567         },
 568 };
 569
 570 static struct platform_device sh_pfc_device = {
 571         .name           = DRV_NAME,
 572         .id             = -1,
 573 };
 574
 575 int __init register_sh_pfc(struct sh_pfc_platform_data *pdata)
 576 {
 577         int rc;
 578
 579         sh_pfc_device.dev.platform_data = pdata;
 580
 581         rc = platform_driver_register(&sh_pfc_driver);
 582         if (likely(!rc)) {
 583                 rc = platform_device_register(&sh_pfc_device);
 584                 if (unlikely(rc))
 585                         platform_driver_unregister(&sh_pfc_driver);
 586         }
 587
 588         return rc;
 589 }
 590
 591 static void __exit sh_pfc_exit(void)
 592 {
 593         platform_driver_unregister(&sh_pfc_driver);
 594 }
 595 module_exit(sh_pfc_exit);
 596
 597 MODULE_AUTHOR("Magnus Damm, Paul Mundt, Laurent Pinchart");
 598 MODULE_DESCRIPTION("Pin Control and GPIO driver for SuperH pin function controller");
 599 MODULE_LICENSE("GPL v2");