drivers/spi/Kconfig

   1 #
   2 # SPI driver configuration
   3 #
   4 # NOTE:  the reason this doesn't show SPI slave support is mostly that
   5 # nobody's needed a slave side API yet.  The master-role API is not
   6 # fully appropriate there, so it'd need some thought to do well.
   7 #
   8 menuconfig SPI
   9         bool "SPI support"
  10         depends on HAS_IOMEM
  11         help
  12           The "Serial Peripheral Interface" is a low level synchronous
  13           protocol.  Chips that support SPI can have data transfer rates
  14           up to several tens of Mbit/sec.  Chips are addressed with a
  15           controller and a chipselect.  Most SPI slaves don't support
  16           dynamic device discovery; some are even write-only or read-only.
  17
  18           SPI is widely used by microcontrollers to talk with sensors,
  19           eeprom and flash memory, codecs and various other controller
  20           chips, analog to digital (and d-to-a) converters, and more.
  21           MMC and SD cards can be accessed using SPI protocol; and for
  22           DataFlash cards used in MMC sockets, SPI must always be used.
  23
  24           SPI is one of a family of similar protocols using a four wire
  25           interface (select, clock, data in, data out) including Microwire
  26           (half duplex), SSP, SSI, and PSP.  This driver framework should
  27           work with most such devices and controllers.
  28
  29 if SPI
  30
  31 config SPI_DEBUG
  32         boolean "Debug support for SPI drivers"
  33         depends on DEBUG_KERNEL
  34         help
  35           Say "yes" to enable debug messaging (like dev_dbg and pr_debug),
  36           sysfs, and debugfs support in SPI controller and protocol drivers.
  37
  38 #
  39 # MASTER side ... talking to discrete SPI slave chips including microcontrollers
  40 #
  41
  42 config SPI_MASTER
  43 #       boolean "SPI Master Support"
  44         boolean
  45         default SPI
  46         help
  47           If your system has an master-capable SPI controller (which
  48           provides the clock and chipselect), you can enable that
  49           controller and the protocol drivers for the SPI slave chips
  50           that are connected.
  51
  52 comment "SPI Master Controller Drivers"
  53         depends on SPI_MASTER
  54
  55 config SPI_ATMEL
  56         tristate "Atmel SPI Controller"
  57         depends on (ARCH_AT91 || AVR32) && SPI_MASTER
  58         help
  59           This selects a driver for the Atmel SPI Controller, present on
  60           many AT32 (AVR32) and AT91 (ARM) chips.
  61
  62 config SPI_BFIN
  63         tristate "SPI controller driver for ADI Blackfin5xx"
  64         depends on SPI_MASTER && BLACKFIN
  65         help
  66           This is the SPI controller master driver for Blackfin 5xx processor.
  67
  68 config SPI_AU1550
  69         tristate "Au1550/Au12x0 SPI Controller"
  70         depends on SPI_MASTER && (SOC_AU1550 || SOC_AU1200) && EXPERIMENTAL
  71         select SPI_BITBANG
  72         help
  73           If you say yes to this option, support will be included for the
  74           Au1550 SPI controller (may also work with Au1200,Au1210,Au1250).
  75
  76           This driver can also be built as a module.  If so, the module
  77           will be called au1550_spi.
  78
  79 config SPI_BITBANG
  80         tristate "Bitbanging SPI master"
  81         depends on SPI_MASTER && EXPERIMENTAL
  82         help
  83           With a few GPIO pins, your system can bitbang the SPI protocol.
  84           Select this to get SPI support through I/O pins (GPIO, parallel
  85           port, etc).  Or, some systems' SPI master controller drivers use
  86           this code to manage the per-word or per-transfer accesses to the
  87           hardware shift registers.
  88
  89           This is library code, and is automatically selected by drivers that
  90           need it.  You only need to select this explicitly to support driver
  91           modules that aren't part of this kernel tree.
  92
  93 config SPI_BUTTERFLY
  94         tristate "Parallel port adapter for AVR Butterfly (DEVELOPMENT)"
  95         depends on SPI_MASTER && PARPORT && EXPERIMENTAL
  96         select SPI_BITBANG
  97         help
  98           This uses a custom parallel port cable to connect to an AVR
  99           Butterfly <http://www.atmel.com/products/avr/butterfly>, an
 100           inexpensive battery powered microcontroller evaluation board.
 101           This same cable can be used to flash new firmware.
 102
 103 config SPI_IMX
 104         tristate "Freescale iMX SPI controller"
 105         depends on SPI_MASTER && ARCH_IMX && EXPERIMENTAL
 106         help
 107           This enables using the Freescale iMX SPI controller in master
 108           mode.
 109
 110 config SPI_LM70_LLP
 111         tristate "Parallel port adapter for LM70 eval board (DEVELOPMENT)"
 112         depends on SPI_MASTER && PARPORT && EXPERIMENTAL
 113         select SPI_BITBANG
 114         help
 115           This driver supports the NS LM70 LLP Evaluation Board,
 116           which interfaces to an LM70 temperature sensor using
 117           a parallel port.
 118
 119 config SPI_MPC52xx_PSC
 120         tristate "Freescale MPC52xx PSC SPI controller"
 121         depends on SPI_MASTER && PPC_MPC52xx && EXPERIMENTAL
 122         help
 123           This enables using the Freescale MPC52xx Programmable Serial
 124           Controller in master SPI mode.
 125
 126 config SPI_MPC83xx
 127         tristate "Freescale MPC83xx/QUICC Engine SPI controller"
 128         depends on SPI_MASTER && (PPC_83xx || QUICC_ENGINE) && EXPERIMENTAL
 129         select SPI_BITBANG
 130         help
 131           This enables using the Freescale MPC83xx and QUICC Engine SPI
 132           controllers in master mode.
 133
 134           Note, this driver uniquely supports the SPI controller on the MPC83xx
 135           family of PowerPC processors, plus processors with QUICC Engine
 136           technology. This driver uses a simple set of shift registers for data
 137           (opposed to the CPM based descriptor model).
 138
 139 config SPI_OMAP_UWIRE
 140         tristate "OMAP1 MicroWire"
 141         depends on SPI_MASTER && ARCH_OMAP1
 142         select SPI_BITBANG
 143         help
 144           This hooks up to the MicroWire controller on OMAP1 chips.
 145
 146 config SPI_OMAP24XX
 147         tristate "McSPI driver for OMAP24xx/OMAP34xx"
 148         depends on SPI_MASTER && (ARCH_OMAP24XX || ARCH_OMAP34XX)
 149         help
 150           SPI master controller for OMAP24xx/OMAP34xx Multichannel SPI
 151           (McSPI) modules.
 152
 153 config SPI_PXA2XX
 154         tristate "PXA2xx SSP SPI master"
 155         depends on SPI_MASTER && ARCH_PXA && EXPERIMENTAL
 156         select PXA_SSP
 157         help
 158           This enables using a PXA2xx SSP port as a SPI master controller.
 159           The driver can be configured to use any SSP port and additional
 160           documentation can be found a Documentation/spi/pxa2xx.
 161
 162 config SPI_S3C24XX
 163         tristate "Samsung S3C24XX series SPI"
 164         depends on SPI_MASTER && ARCH_S3C2410 && EXPERIMENTAL
 165         select SPI_BITBANG
 166         help
 167           SPI driver for Samsung S3C24XX series ARM SoCs
 168
 169 config SPI_S3C24XX_GPIO
 170         tristate "Samsung S3C24XX series SPI by GPIO"
 171         depends on SPI_MASTER && ARCH_S3C2410 && EXPERIMENTAL
 172         select SPI_BITBANG
 173         help
 174           SPI driver for Samsung S3C24XX series ARM SoCs using
 175           GPIO lines to provide the SPI bus. This can be used where
 176           the inbuilt hardware cannot provide the transfer mode, or
 177           where the board is using non hardware connected pins.
 178
 179 config SPI_SH_SCI
 180         tristate "SuperH SCI SPI controller"
 181         depends on SPI_MASTER && SUPERH
 182         select SPI_BITBANG
 183         help
 184           SPI driver for SuperH SCI blocks.
 185
 186 config SPI_TXX9
 187         tristate "Toshiba TXx9 SPI controller"
 188         depends on SPI_MASTER && GENERIC_GPIO && CPU_TX49XX
 189         help
 190           SPI driver for Toshiba TXx9 MIPS SoCs
 191
 192 config SPI_XILINX
 193         tristate "Xilinx SPI controller"
 194         depends on SPI_MASTER && XILINX_VIRTEX && EXPERIMENTAL
 195         select SPI_BITBANG
 196         help
 197           This exposes the SPI controller IP from the Xilinx EDK.
 198
 199           See the "OPB Serial Peripheral Interface (SPI) (v1.00e)"
 200           Product Specification document (DS464) for hardware details.
 201
 202 #
 203 # Add new SPI master controllers in alphabetical order above this line
 204 #
 205
 206 #
 207 # There are lots of SPI device types, with sensors and memory
 208 # being probably the most widely used ones.
 209 #
 210 comment "SPI Protocol Masters"
 211         depends on SPI_MASTER
 212
 213 config SPI_AT25
 214         tristate "SPI EEPROMs from most vendors"
 215         depends on SPI_MASTER && SYSFS
 216         help
 217           Enable this driver to get read/write support to most SPI EEPROMs,
 218           after you configure the board init code to know about each eeprom
 219           on your target board.
 220
 221           This driver can also be built as a module.  If so, the module
 222           will be called at25.
 223
 224 config SPI_SPIDEV
 225         tristate "User mode SPI device driver support"
 226         depends on SPI_MASTER && EXPERIMENTAL
 227         help
 228           This supports user mode SPI protocol drivers.
 229
 230           Note that this application programming interface is EXPERIMENTAL
 231           and hence SUBJECT TO CHANGE WITHOUT NOTICE while it stabilizes.
 232
 233 config SPI_TLE62X0
 234         tristate "Infineon TLE62X0 (for power switching)"
 235         depends on SPI_MASTER && SYSFS
 236         help
 237           SPI driver for Infineon TLE62X0 series line driver chips,
 238           such as the TLE6220, TLE6230 and TLE6240.  This provides a
 239           sysfs interface, with each line presented as a kind of GPIO
 240           exposing both switch control and diagnostic feedback.
 241
 242 #
 243 # Add new SPI protocol masters in alphabetical order above this line
 244 #
 245
 246 # (slave support would go here)
 247
 248 endif # SPI