drivers/spi/mpc52xx_spi.c

   1 /*
   2  * MPC52xx SPI bus driver.
   3  *
   4  * Copyright (C) 2008 Secret Lab Technologies Ltd.
   5  *
   6  * This file is released under the GPLv2
   7  *
   8  * This is the driver for the MPC5200's dedicated SPI controller.
   9  *
  10  * Note: this driver does not support the MPC5200 PSC in SPI mode.  For
  11  * that driver see drivers/spi/mpc52xx_psc_spi.c
  12  */
  13
  14 #include <linux/module.h>
  15 #include <linux/init.h>
  16 #include <linux/errno.h>
  17 #include <linux/of_platform.h>
  18 #include <linux/interrupt.h>
  19 #include <linux/delay.h>
  20 #include <linux/spi/spi.h>
  21 #include <linux/spi/mpc52xx_spi.h>
  22 #include <linux/of_spi.h>
  23 #include <linux/io.h>
  24 #include <asm/time.h>
  25 #include <asm/mpc52xx.h>
  26
  27 MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>");
  28 MODULE_DESCRIPTION("MPC52xx SPI (non-PSC) Driver");
  29 MODULE_LICENSE("GPL");
  30
  31 /* Register offsets */
  32 #define SPI_CTRL1       0x00
  33 #define SPI_CTRL1_SPIE          (1 << 7)
  34 #define SPI_CTRL1_SPE           (1 << 6)
  35 #define SPI_CTRL1_MSTR          (1 << 4)
  36 #define SPI_CTRL1_CPOL          (1 << 3)
  37 #define SPI_CTRL1_CPHA          (1 << 2)
  38 #define SPI_CTRL1_SSOE          (1 << 1)
  39 #define SPI_CTRL1_LSBFE         (1 << 0)
  40
  41 #define SPI_CTRL2       0x01
  42 #define SPI_BRR         0x04
  43
  44 #define SPI_STATUS      0x05
  45 #define SPI_STATUS_SPIF         (1 << 7)
  46 #define SPI_STATUS_WCOL         (1 << 6)
  47 #define SPI_STATUS_MODF         (1 << 4)
  48
  49 #define SPI_DATA        0x09
  50 #define SPI_PORTDATA    0x0d
  51 #define SPI_DATADIR     0x10
  52
  53 /* FSM state return values */
  54 #define FSM_STOP        0       /* Nothing more for the state machine to */
  55                                 /* do.  If something interesting happens */
  56                                 /* then and IRQ will be received */
  57 #define FSM_POLL        1       /* need to poll for completion, an IRQ is */
  58                                 /* not expected */
  59 #define FSM_CONTINUE    2       /* Keep iterating the state machine */
  60
  61 /* Driver internal data */
  62 struct mpc52xx_spi {
  63         struct spi_master *master;
  64         u32 sysclk;
  65         void __iomem *regs;
  66         int irq0;       /* MODF irq */
  67         int irq1;       /* SPIF irq */
  68         int ipb_freq;
  69
  70         /* Statistics */
  71         int msg_count;
  72         int wcol_count;
  73         int wcol_ticks;
  74         u32 wcol_tx_timestamp;
  75         int modf_count;
  76         int byte_count;
  77
  78         struct list_head queue;         /* queue of pending messages */
  79         spinlock_t lock;
  80         struct work_struct work;
  81
  82
  83         /* Details of current transfer (length, and buffer pointers) */
  84         struct spi_message *message;    /* current message */
  85         struct spi_transfer *transfer;  /* current transfer */
  86         int (*state)(int irq, struct mpc52xx_spi *ms, u8 status, u8 data);
  87         int len;
  88         int timestamp;
  89         u8 *rx_buf;
  90         const u8 *tx_buf;
  91         int cs_change;
  92 };
  93
  94 /*
  95  * CS control function
  96  */
  97 static void mpc52xx_spi_chipsel(struct mpc52xx_spi *ms, int value)
  98 {
  99         out_8(ms->regs + SPI_PORTDATA, value ? 0 : 0x08);
 100 }
 101
 102 /*
 103  * Start a new transfer.  This is called both by the idle state
 104  * for the first transfer in a message, and by the wait state when the
 105  * previous transfer in a message is complete.
 106  */
 107 static void mpc52xx_spi_start_transfer(struct mpc52xx_spi *ms)
 108 {
 109         ms->rx_buf = ms->transfer->rx_buf;
 110         ms->tx_buf = ms->transfer->tx_buf;
 111         ms->len = ms->transfer->len;
 112
 113         /* Activate the chip select */
 114         if (ms->cs_change)
 115                 mpc52xx_spi_chipsel(ms, 1);
 116         ms->cs_change = ms->transfer->cs_change;
 117
 118         /* Write out the first byte */
 119         ms->wcol_tx_timestamp = get_tbl();
 120         if (ms->tx_buf)
 121                 out_8(ms->regs + SPI_DATA, *ms->tx_buf++);
 122         else
 123                 out_8(ms->regs + SPI_DATA, 0);
 124 }
 125
 126 /* Forward declaration of state handlers */
 127 static int mpc52xx_spi_fsmstate_transfer(int irq, struct mpc52xx_spi *ms,
 128                                          u8 status, u8 data);
 129 static int mpc52xx_spi_fsmstate_wait(int irq, struct mpc52xx_spi *ms,
 130                                      u8 status, u8 data);
 131
 132 /*
 133  * IDLE state
 134  *
 135  * No transfers are in progress; if another transfer is pending then retrieve
 136  * it and kick it off.  Otherwise, stop processing the state machine
 137  */
 138 static int
 139 mpc52xx_spi_fsmstate_idle(int irq, struct mpc52xx_spi *ms, u8 status, u8 data)
 140 {
 141         struct spi_device *spi;
 142         int spr, sppr;
 143         u8 ctrl1;
 144
 145         if (status && (irq != NO_IRQ))
 146                 dev_err(&ms->master->dev, "spurious irq, status=0x%.2x\n",
 147                         status);
 148
 149         /* Check if there is another transfer waiting. */
 150         if (list_empty(&ms->queue))
 151                 return FSM_STOP;
 152
 153         /* get the head of the queue */
 154         ms->message = list_first_entry(&ms->queue, struct spi_message, queue);
 155         list_del_init(&ms->message->queue);
 156
 157         /* Setup the controller parameters */
 158         ctrl1 = SPI_CTRL1_SPIE | SPI_CTRL1_SPE | SPI_CTRL1_MSTR;
 159         spi = ms->message->spi;
 160         if (spi->mode & SPI_CPHA)
 161                 ctrl1 |= SPI_CTRL1_CPHA;
 162         if (spi->mode & SPI_CPOL)
 163                 ctrl1 |= SPI_CTRL1_CPOL;
 164         if (spi->mode & SPI_LSB_FIRST)
 165                 ctrl1 |= SPI_CTRL1_LSBFE;
 166         out_8(ms->regs + SPI_CTRL1, ctrl1);
 167
 168         /* Setup the controller speed */
 169         /* minimum divider is '2'.  Also, add '1' to force rounding the
 170          * divider up. */
 171         sppr = ((ms->ipb_freq / ms->message->spi->max_speed_hz) + 1) >> 1;
 172         spr = 0;
 173         if (sppr < 1)
 174                 sppr = 1;
 175         while (((sppr - 1) & ~0x7) != 0) {
 176                 sppr = (sppr + 1) >> 1; /* add '1' to force rounding up */
 177                 spr++;
 178         }
 179         sppr--;         /* sppr quantity in register is offset by 1 */
 180         if (spr > 7) {
 181                 /* Don't overrun limits of SPI baudrate register */
 182                 spr = 7;
 183                 sppr = 7;
 184         }
 185         out_8(ms->regs + SPI_BRR, sppr << 4 | spr); /* Set speed */
 186
 187         ms->cs_change = 1;
 188         ms->transfer = container_of(ms->message->transfers.next,
 189                                     struct spi_transfer, transfer_list);
 190
 191         mpc52xx_spi_start_transfer(ms);
 192         ms->state = mpc52xx_spi_fsmstate_transfer;
 193
 194         return FSM_CONTINUE;
 195 }
 196
 197 /*
 198  * TRANSFER state
 199  *
 200  * In the middle of a transfer.  If the SPI core has completed processing
 201  * a byte, then read out the received data and write out the next byte
 202  * (unless this transfer is finished; in which case go on to the wait
 203  * state)
 204  */
 205 static int mpc52xx_spi_fsmstate_transfer(int irq, struct mpc52xx_spi *ms,
 206                                          u8 status, u8 data)
 207 {
 208         if (!status)
 209                 return ms->irq0 ? FSM_STOP : FSM_POLL;
 210
 211         if (status & SPI_STATUS_WCOL) {
 212                 /* The SPI controller is stoopid.  At slower speeds, it may
 213                  * raise the SPIF flag before the state machine is actually
 214                  * finished, which causes a collision (internal to the state
 215                  * machine only).  The manual recommends inserting a delay
 216                  * between receiving the interrupt and sending the next byte,
 217                  * but it can also be worked around simply by retrying the
 218                  * transfer which is what we do here. */
 219                 ms->wcol_count++;
 220                 ms->wcol_ticks += get_tbl() - ms->wcol_tx_timestamp;
 221                 ms->wcol_tx_timestamp = get_tbl();
 222                 data = 0;
 223                 if (ms->tx_buf)
 224                         data = *(ms->tx_buf-1);
 225                 out_8(ms->regs + SPI_DATA, data); /* try again */
 226                 return FSM_CONTINUE;
 227         } else if (status & SPI_STATUS_MODF) {
 228                 ms->modf_count++;
 229                 dev_err(&ms->master->dev, "mode fault\n");
 230                 mpc52xx_spi_chipsel(ms, 0);
 231                 ms->message->status = -EIO;
 232                 ms->message->complete(ms->message->context);
 233                 ms->state = mpc52xx_spi_fsmstate_idle;
 234                 return FSM_CONTINUE;
 235         }
 236
 237         /* Read data out of the spi device */
 238         ms->byte_count++;
 239         if (ms->rx_buf)
 240                 *ms->rx_buf++ = data;
 241
 242         /* Is the transfer complete? */
 243         ms->len--;
 244         if (ms->len == 0) {
 245                 ms->timestamp = get_tbl();
 246                 ms->timestamp += ms->transfer->delay_usecs * tb_ticks_per_usec;
 247                 ms->state = mpc52xx_spi_fsmstate_wait;
 248                 return FSM_CONTINUE;
 249         }
 250
 251         /* Write out the next byte */
 252         ms->wcol_tx_timestamp = get_tbl();
 253         if (ms->tx_buf)
 254                 out_8(ms->regs + SPI_DATA, *ms->tx_buf++);
 255         else
 256                 out_8(ms->regs + SPI_DATA, 0);
 257
 258         return FSM_CONTINUE;
 259 }
 260
 261 /*
 262  * WAIT state
 263  *
 264  * A transfer has completed; need to wait for the delay period to complete
 265  * before starting the next transfer
 266  */
 267 static int
 268 mpc52xx_spi_fsmstate_wait(int irq, struct mpc52xx_spi *ms, u8 status, u8 data)
 269 {
 270         if (status && irq)
 271                 dev_err(&ms->master->dev, "spurious irq, status=0x%.2x\n",
 272                         status);
 273
 274         if (((int)get_tbl()) - ms->timestamp < 0)
 275                 return FSM_POLL;
 276
 277         ms->message->actual_length += ms->transfer->len;
 278
 279         /* Check if there is another transfer in this message.  If there
 280          * aren't then deactivate CS, notify sender, and drop back to idle
 281          * to start the next message. */
 282         if (ms->transfer->transfer_list.next == &ms->message->transfers) {
 283                 ms->msg_count++;
 284                 mpc52xx_spi_chipsel(ms, 0);
 285                 ms->message->status = 0;
 286                 ms->message->complete(ms->message->context);
 287                 ms->state = mpc52xx_spi_fsmstate_idle;
 288                 return FSM_CONTINUE;
 289         }
 290
 291         /* There is another transfer; kick it off */
 292
 293         if (ms->cs_change)
 294                 mpc52xx_spi_chipsel(ms, 0);
 295
 296         ms->transfer = container_of(ms->transfer->transfer_list.next,
 297                                     struct spi_transfer, transfer_list);
 298         mpc52xx_spi_start_transfer(ms);
 299         ms->state = mpc52xx_spi_fsmstate_transfer;
 300         return FSM_CONTINUE;
 301 }
 302
 303 /**
 304  * mpc52xx_spi_fsm_process - Finite State Machine iteration function
 305  * @irq: irq number that triggered the FSM or 0 for polling
 306  * @ms: pointer to mpc52xx_spi driver data
 307  */
 308 static void mpc52xx_spi_fsm_process(int irq, struct mpc52xx_spi *ms)
 309 {
 310         int rc = FSM_CONTINUE;
 311         u8 status, data;
 312
 313         while (rc == FSM_CONTINUE) {
 314                 /* Interrupt cleared by read of STATUS followed by
 315                  * read of DATA registers */
 316                 status = in_8(ms->regs + SPI_STATUS);
 317                 data = in_8(ms->regs + SPI_DATA);
 318                 rc = ms->state(irq, ms, status, data);
 319         }
 320
 321         if (rc == FSM_POLL)
 322                 schedule_work(&ms->work);
 323 }
 324
 325 /**
 326  * mpc52xx_spi_irq - IRQ handler
 327  */
 328 static irqreturn_t mpc52xx_spi_irq(int irq, void *_ms)
 329 {
 330         struct mpc52xx_spi *ms = _ms;
 331         spin_lock(&ms->lock);
 332         mpc52xx_spi_fsm_process(irq, ms);
 333         spin_unlock(&ms->lock);
 334         return IRQ_HANDLED;
 335 }
 336
 337 /**
 338  * mpc52xx_spi_wq - Workqueue function for polling the state machine
 339  */
 340 static void mpc52xx_spi_wq(struct work_struct *work)
 341 {
 342         struct mpc52xx_spi *ms = container_of(work, struct mpc52xx_spi, work);
 343         unsigned long flags;
 344
 345         spin_lock_irqsave(&ms->lock, flags);
 346         mpc52xx_spi_fsm_process(0, ms);
 347         spin_unlock_irqrestore(&ms->lock, flags);
 348 }
 349
 350 /*
 351  * spi_master ops
 352  */
 353
 354 static int mpc52xx_spi_setup(struct spi_device *spi)
 355 {
 356         if (spi->bits_per_word % 8)
 357                 return -EINVAL;
 358
 359         if (spi->mode & ~(SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST))
 360                 return -EINVAL;
 361
 362         if (spi->chip_select >= spi->master->num_chipselect)
 363                 return -EINVAL;
 364
 365         return 0;
 366 }
 367
 368 static int mpc52xx_spi_transfer(struct spi_device *spi, struct spi_message *m)
 369 {
 370         struct mpc52xx_spi *ms = spi_master_get_devdata(spi->master);
 371         unsigned long flags;
 372
 373         m->actual_length = 0;
 374         m->status = -EINPROGRESS;
 375
 376         spin_lock_irqsave(&ms->lock, flags);
 377         list_add_tail(&m->queue, &ms->queue);
 378         spin_unlock_irqrestore(&ms->lock, flags);
 379         schedule_work(&ms->work);
 380
 381         return 0;
 382 }
 383
 384 /*
 385  * OF Platform Bus Binding
 386  */
 387 static int __devinit mpc52xx_spi_probe(struct of_device *op,
 388                                        const struct of_device_id *match)
 389 {
 390         struct spi_master *master;
 391         struct mpc52xx_spi *ms;
 392         void __iomem *regs;
 393         int rc;
 394
 395         /* MMIO registers */
 396         dev_dbg(&op->dev, "probing mpc5200 SPI device\n");
 397         regs = of_iomap(op->node, 0);
 398         if (!regs)
 399                 return -ENODEV;
 400
 401         /* initialize the device */
 402         out_8(regs+SPI_CTRL1, SPI_CTRL1_SPIE | SPI_CTRL1_SPE | SPI_CTRL1_MSTR);
 403         out_8(regs + SPI_CTRL2, 0x0);
 404         out_8(regs + SPI_DATADIR, 0xe); /* Set output pins */
 405         out_8(regs + SPI_PORTDATA, 0x8);        /* Deassert /SS signal */
 406
 407         /* Clear the status register and re-read it to check for a MODF
 408          * failure.  This driver cannot currently handle multiple masters
 409          * on the SPI bus.  This fault will also occur if the SPI signals
 410          * are not connected to any pins (port_config setting) */
 411         in_8(regs + SPI_STATUS);
 412         in_8(regs + SPI_DATA);
 413         if (in_8(regs + SPI_STATUS) & SPI_STATUS_MODF) {
 414                 dev_err(&op->dev, "mode fault; is port_config correct?\n");
 415                 rc = -EIO;
 416                 goto err_init;
 417         }
 418
 419         dev_dbg(&op->dev, "allocating spi_master struct\n");
 420         master = spi_alloc_master(&op->dev, sizeof *ms);
 421         if (!master) {
 422                 rc = -ENOMEM;
 423                 goto err_alloc;
 424         }
 425         master->bus_num = -1;
 426         master->num_chipselect = 1;
 427         master->setup = mpc52xx_spi_setup;
 428         master->transfer = mpc52xx_spi_transfer;
 429         dev_set_drvdata(&op->dev, master);
 430
 431         ms = spi_master_get_devdata(master);
 432         ms->master = master;
 433         ms->regs = regs;
 434         ms->irq0 = irq_of_parse_and_map(op->node, 0);
 435         ms->irq1 = irq_of_parse_and_map(op->node, 1);
 436         ms->state = mpc52xx_spi_fsmstate_idle;
 437         ms->ipb_freq = mpc5xxx_get_bus_frequency(op->node);
 438         spin_lock_init(&ms->lock);
 439         INIT_LIST_HEAD(&ms->queue);
 440         INIT_WORK(&ms->work, mpc52xx_spi_wq);
 441
 442         /* Decide if interrupts can be used */
 443         if (ms->irq0 && ms->irq1) {
 444                 rc = request_irq(ms->irq0, mpc52xx_spi_irq, IRQF_SAMPLE_RANDOM,
 445                                   "mpc5200-spi-modf", ms);
 446                 rc |= request_irq(ms->irq1, mpc52xx_spi_irq, IRQF_SAMPLE_RANDOM,
 447                                   "mpc5200-spi-spiF", ms);
 448                 if (rc) {
 449                         free_irq(ms->irq0, ms);
 450                         free_irq(ms->irq1, ms);
 451                         ms->irq0 = ms->irq1 = 0;
 452                 }
 453         } else {
 454                 /* operate in polled mode */
 455                 ms->irq0 = ms->irq1 = 0;
 456         }
 457
 458         if (!ms->irq0)
 459                 dev_info(&op->dev, "using polled mode\n");
 460
 461         dev_dbg(&op->dev, "registering spi_master struct\n");
 462         rc = spi_register_master(master);
 463         if (rc)
 464                 goto err_register;
 465
 466         of_register_spi_devices(master, op->node);
 467         dev_info(&ms->master->dev, "registered MPC5200 SPI bus\n");
 468
 469         return rc;
 470
 471  err_register:
 472         dev_err(&ms->master->dev, "initialization failed\n");
 473         spi_master_put(master);
 474  err_alloc:
 475  err_init:
 476         iounmap(regs);
 477         return rc;
 478 }
 479
 480 static int __devexit mpc52xx_spi_remove(struct of_device *op)
 481 {
 482         struct spi_master *master = dev_get_drvdata(&op->dev);
 483         struct mpc52xx_spi *ms = spi_master_get_devdata(master);
 484
 485         free_irq(ms->irq0, ms);
 486         free_irq(ms->irq1, ms);
 487
 488         spi_unregister_master(master);
 489         spi_master_put(master);
 490         iounmap(ms->regs);
 491
 492         return 0;
 493 }
 494
 495 static struct of_device_id mpc52xx_spi_match[] __devinitdata = {
 496         { .compatible = "fsl,mpc5200-spi", },
 497         {}
 498 };
 499 MODULE_DEVICE_TABLE(of, mpc52xx_spi_match);
 500
 501 static struct of_platform_driver mpc52xx_spi_of_driver = {
 502         .owner = THIS_MODULE,
 503         .name = "mpc52xx-spi",
 504         .match_table = mpc52xx_spi_match,
 505         .probe = mpc52xx_spi_probe,
 506         .remove = __exit_p(mpc52xx_spi_remove),
 507 };
 508
 509 static int __init mpc52xx_spi_init(void)
 510 {
 511         return of_register_platform_driver(&mpc52xx_spi_of_driver);
 512 }
 513 module_init(mpc52xx_spi_init);
 514
 515 static void __exit mpc52xx_spi_exit(void)
 516 {
 517         of_unregister_platform_driver(&mpc52xx_spi_of_driver);
 518 }
 519 module_exit(mpc52xx_spi_exit);
 520