2 * Broadcom BCM63xx SPI controller support
4 * Copyright (C) 2009-2011 Florian Fainelli <florian@openwrt.org>
5 * Copyright (C) 2010 Tanguy Bouzeloc <tanguy.bouzeloc@efixo.com>
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version 2
10 * of the License, or (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the
19 * Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
22 #include <linux/kernel.h>
23 #include <linux/init.h>
24 #include <linux/clk.h>
26 #include <linux/module.h>
27 #include <linux/platform_device.h>
28 #include <linux/delay.h>
29 #include <linux/interrupt.h>
30 #include <linux/spi/spi.h>
31 #include <linux/completion.h>
32 #include <linux/err.h>
34 #include <bcm63xx_dev_spi.h>
36 #define PFX KBUILD_MODNAME
37 #define DRV_VER "0.1.2"
42 struct completion done
;
52 const unsigned char *tx_ptr
;
53 unsigned char *rx_ptr
;
57 const u8 __iomem
*rx_io
;
62 struct platform_device
*pdev
;
65 static inline u8
bcm_spi_readb(struct bcm63xx_spi
*bs
,
68 return bcm_readb(bs
->regs
+ bcm63xx_spireg(offset
));
71 static inline u16
bcm_spi_readw(struct bcm63xx_spi
*bs
,
74 return bcm_readw(bs
->regs
+ bcm63xx_spireg(offset
));
77 static inline void bcm_spi_writeb(struct bcm63xx_spi
*bs
,
78 u8 value
, unsigned int offset
)
80 bcm_writeb(value
, bs
->regs
+ bcm63xx_spireg(offset
));
83 static inline void bcm_spi_writew(struct bcm63xx_spi
*bs
,
84 u16 value
, unsigned int offset
)
86 bcm_writew(value
, bs
->regs
+ bcm63xx_spireg(offset
));
89 static const unsigned bcm63xx_spi_freq_table
[SPI_CLK_MASK
][2] = {
90 { 20000000, SPI_CLK_20MHZ
},
91 { 12500000, SPI_CLK_12_50MHZ
},
92 { 6250000, SPI_CLK_6_250MHZ
},
93 { 3125000, SPI_CLK_3_125MHZ
},
94 { 1563000, SPI_CLK_1_563MHZ
},
95 { 781000, SPI_CLK_0_781MHZ
},
96 { 391000, SPI_CLK_0_391MHZ
}
99 static int bcm63xx_spi_setup_transfer(struct spi_device
*spi
,
100 struct spi_transfer
*t
)
102 struct bcm63xx_spi
*bs
= spi_master_get_devdata(spi
->master
);
108 bits_per_word
= (t
) ? t
->bits_per_word
: spi
->bits_per_word
;
109 hz
= (t
) ? t
->speed_hz
: spi
->max_speed_hz
;
110 if (bits_per_word
!= 8) {
111 dev_err(&spi
->dev
, "%s, unsupported bits_per_word=%d\n",
112 __func__
, bits_per_word
);
116 if (spi
->chip_select
> spi
->master
->num_chipselect
) {
117 dev_err(&spi
->dev
, "%s, unsupported slave %d\n",
118 __func__
, spi
->chip_select
);
122 /* Find the closest clock configuration */
123 for (i
= 0; i
< SPI_CLK_MASK
; i
++) {
124 if (hz
<= bcm63xx_spi_freq_table
[i
][0]) {
125 clk_cfg
= bcm63xx_spi_freq_table
[i
][1];
130 /* No matching configuration found, default to lowest */
131 if (i
== SPI_CLK_MASK
)
132 clk_cfg
= SPI_CLK_0_391MHZ
;
134 /* clear existing clock configuration bits of the register */
135 reg
= bcm_spi_readb(bs
, SPI_CLK_CFG
);
136 reg
&= ~SPI_CLK_MASK
;
139 bcm_spi_writeb(bs
, reg
, SPI_CLK_CFG
);
140 dev_dbg(&spi
->dev
, "Setting clock register to %02x (hz %d)\n",
146 /* the spi->mode bits understood by this driver: */
147 #define MODEBITS (SPI_CPOL | SPI_CPHA)
149 static int bcm63xx_spi_setup(struct spi_device
*spi
)
151 struct bcm63xx_spi
*bs
;
154 bs
= spi_master_get_devdata(spi
->master
);
159 if (!spi
->bits_per_word
)
160 spi
->bits_per_word
= 8;
162 if (spi
->mode
& ~MODEBITS
) {
163 dev_err(&spi
->dev
, "%s, unsupported mode bits %x\n",
164 __func__
, spi
->mode
& ~MODEBITS
);
168 ret
= bcm63xx_spi_setup_transfer(spi
, NULL
);
170 dev_err(&spi
->dev
, "setup: unsupported mode bits %x\n",
171 spi
->mode
& ~MODEBITS
);
175 dev_dbg(&spi
->dev
, "%s, mode %d, %u bits/w, %u nsec/bit\n",
176 __func__
, spi
->mode
& MODEBITS
, spi
->bits_per_word
, 0);
181 /* Fill the TX FIFO with as many bytes as possible */
182 static void bcm63xx_spi_fill_tx_fifo(struct bcm63xx_spi
*bs
)
186 /* Fill the Tx FIFO with as many bytes as possible */
187 size
= bs
->remaining_bytes
< bs
->fifo_size
? bs
->remaining_bytes
:
189 memcpy_toio(bs
->tx_io
, bs
->tx_ptr
, size
);
190 bs
->remaining_bytes
-= size
;
193 static int bcm63xx_txrx_bufs(struct spi_device
*spi
, struct spi_transfer
*t
)
195 struct bcm63xx_spi
*bs
= spi_master_get_devdata(spi
->master
);
199 dev_dbg(&spi
->dev
, "txrx: tx %p, rx %p, len %d\n",
200 t
->tx_buf
, t
->rx_buf
, t
->len
);
202 /* Transmitter is inhibited */
203 bs
->tx_ptr
= t
->tx_buf
;
204 bs
->rx_ptr
= t
->rx_buf
;
205 init_completion(&bs
->done
);
208 bs
->remaining_bytes
= t
->len
;
209 bcm63xx_spi_fill_tx_fifo(bs
);
212 /* Enable the command done interrupt which
213 * we use to determine completion of a command */
214 bcm_spi_writeb(bs
, SPI_INTR_CMD_DONE
, SPI_INT_MASK
);
216 /* Fill in the Message control register */
217 msg_ctl
= (t
->len
<< SPI_BYTE_CNT_SHIFT
);
219 if (t
->rx_buf
&& t
->tx_buf
)
220 msg_ctl
|= (SPI_FD_RW
<< SPI_MSG_TYPE_SHIFT
);
222 msg_ctl
|= (SPI_HD_R
<< SPI_MSG_TYPE_SHIFT
);
224 msg_ctl
|= (SPI_HD_W
<< SPI_MSG_TYPE_SHIFT
);
226 bcm_spi_writew(bs
, msg_ctl
, SPI_MSG_CTL
);
228 /* Issue the transfer */
229 cmd
= SPI_CMD_START_IMMEDIATE
;
230 cmd
|= (0 << SPI_CMD_PREPEND_BYTE_CNT_SHIFT
);
231 cmd
|= (spi
->chip_select
<< SPI_CMD_DEVICE_ID_SHIFT
);
232 bcm_spi_writew(bs
, cmd
, SPI_CMD
);
233 wait_for_completion(&bs
->done
);
235 /* Disable the CMD_DONE interrupt */
236 bcm_spi_writeb(bs
, 0, SPI_INT_MASK
);
238 return t
->len
- bs
->remaining_bytes
;
241 static int bcm63xx_transfer(struct spi_device
*spi
, struct spi_message
*m
)
243 struct bcm63xx_spi
*bs
= spi_master_get_devdata(spi
->master
);
244 struct spi_transfer
*t
;
247 if (unlikely(list_empty(&m
->transfers
)))
253 list_for_each_entry(t
, &m
->transfers
, transfer_list
) {
254 ret
+= bcm63xx_txrx_bufs(spi
, t
);
257 m
->complete(m
->context
);
262 /* This driver supports single master mode only. Hence
263 * CMD_DONE is the only interrupt we care about
265 static irqreturn_t
bcm63xx_spi_interrupt(int irq
, void *dev_id
)
267 struct spi_master
*master
= (struct spi_master
*)dev_id
;
268 struct bcm63xx_spi
*bs
= spi_master_get_devdata(master
);
272 /* Read interupts and clear them immediately */
273 intr
= bcm_spi_readb(bs
, SPI_INT_STATUS
);
274 bcm_spi_writeb(bs
, SPI_INTR_CLEAR_ALL
, SPI_INT_STATUS
);
275 bcm_spi_writeb(bs
, 0, SPI_INT_MASK
);
277 /* A tansfer completed */
278 if (intr
& SPI_INTR_CMD_DONE
) {
281 rx_tail
= bcm_spi_readb(bs
, SPI_RX_TAIL
);
283 /* Read out all the data */
285 memcpy_fromio(bs
->rx_ptr
, bs
->rx_io
, rx_tail
);
287 /* See if there is more data to send */
288 if (bs
->remaining_bytes
> 0) {
289 bcm63xx_spi_fill_tx_fifo(bs
);
291 /* Start the transfer */
292 bcm_spi_writew(bs
, SPI_HD_W
<< SPI_MSG_TYPE_SHIFT
,
294 cmd
= bcm_spi_readw(bs
, SPI_CMD
);
295 cmd
|= SPI_CMD_START_IMMEDIATE
;
296 cmd
|= (0 << SPI_CMD_PREPEND_BYTE_CNT_SHIFT
);
297 bcm_spi_writeb(bs
, SPI_INTR_CMD_DONE
, SPI_INT_MASK
);
298 bcm_spi_writew(bs
, cmd
, SPI_CMD
);
308 static int __devinit
bcm63xx_spi_probe(struct platform_device
*pdev
)
311 struct device
*dev
= &pdev
->dev
;
312 struct bcm63xx_spi_pdata
*pdata
= pdev
->dev
.platform_data
;
314 struct spi_master
*master
;
316 struct bcm63xx_spi
*bs
;
319 r
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
321 dev_err(dev
, "no iomem\n");
326 irq
= platform_get_irq(pdev
, 0);
328 dev_err(dev
, "no irq\n");
333 clk
= clk_get(dev
, "spi");
335 dev_err(dev
, "no clock for device\n");
340 master
= spi_alloc_master(dev
, sizeof(*bs
));
342 dev_err(dev
, "out of memory\n");
347 bs
= spi_master_get_devdata(master
);
348 init_completion(&bs
->done
);
350 platform_set_drvdata(pdev
, master
);
353 if (!devm_request_mem_region(&pdev
->dev
, r
->start
,
354 resource_size(r
), PFX
)) {
355 dev_err(dev
, "iomem request failed\n");
360 bs
->regs
= devm_ioremap_nocache(&pdev
->dev
, r
->start
,
363 dev_err(dev
, "unable to ioremap regs\n");
370 bs
->fifo_size
= pdata
->fifo_size
;
372 ret
= devm_request_irq(&pdev
->dev
, irq
, bcm63xx_spi_interrupt
, 0,
375 dev_err(dev
, "unable to request irq\n");
379 master
->bus_num
= pdata
->bus_num
;
380 master
->num_chipselect
= pdata
->num_chipselect
;
381 master
->setup
= bcm63xx_spi_setup
;
382 master
->transfer
= bcm63xx_transfer
;
383 bs
->speed_hz
= pdata
->speed_hz
;
385 bs
->tx_io
= (u8
*)(bs
->regs
+ bcm63xx_spireg(SPI_MSG_DATA
));
386 bs
->rx_io
= (const u8
*)(bs
->regs
+ bcm63xx_spireg(SPI_RX_DATA
));
387 spin_lock_init(&bs
->lock
);
389 /* Initialize hardware */
391 bcm_spi_writeb(bs
, SPI_INTR_CLEAR_ALL
, SPI_INT_STATUS
);
393 /* register and we are done */
394 ret
= spi_register_master(master
);
396 dev_err(dev
, "spi register failed\n");
397 goto out_clk_disable
;
400 dev_info(dev
, "at 0x%08x (irq %d, FIFOs size %d) v%s\n",
401 r
->start
, irq
, bs
->fifo_size
, DRV_VER
);
408 platform_set_drvdata(pdev
, NULL
);
409 spi_master_put(master
);
416 static int __devexit
bcm63xx_spi_remove(struct platform_device
*pdev
)
418 struct spi_master
*master
= platform_get_drvdata(pdev
);
419 struct bcm63xx_spi
*bs
= spi_master_get_devdata(master
);
421 /* reset spi block */
422 bcm_spi_writeb(bs
, 0, SPI_INT_MASK
);
423 spin_lock(&bs
->lock
);
427 clk_disable(bs
->clk
);
430 spin_unlock(&bs
->lock
);
431 platform_set_drvdata(pdev
, 0);
432 spi_unregister_master(master
);
438 static int bcm63xx_spi_suspend(struct device
*dev
)
440 struct spi_master
*master
=
441 platform_get_drvdata(to_platform_device(dev
));
442 struct bcm63xx_spi
*bs
= spi_master_get_devdata(master
);
444 clk_disable(bs
->clk
);
449 static int bcm63xx_spi_resume(struct device
*dev
)
451 struct spi_master
*master
=
452 platform_get_drvdata(to_platform_device(dev
));
453 struct bcm63xx_spi
*bs
= spi_master_get_devdata(master
);
460 static const struct dev_pm_ops bcm63xx_spi_pm_ops
= {
461 .suspend
= bcm63xx_spi_suspend
,
462 .resume
= bcm63xx_spi_resume
,
465 #define BCM63XX_SPI_PM_OPS (&bcm63xx_spi_pm_ops)
467 #define BCM63XX_SPI_PM_OPS NULL
470 static struct platform_driver bcm63xx_spi_driver
= {
472 .name
= "bcm63xx-spi",
473 .owner
= THIS_MODULE
,
474 .pm
= BCM63XX_SPI_PM_OPS
,
476 .probe
= bcm63xx_spi_probe
,
477 .remove
= __devexit_p(bcm63xx_spi_remove
),
480 module_platform_driver(bcm63xx_spi_driver
);
482 MODULE_ALIAS("platform:bcm63xx_spi");
483 MODULE_AUTHOR("Florian Fainelli <florian@openwrt.org>");
484 MODULE_AUTHOR("Tanguy Bouzeloc <tanguy.bouzeloc@efixo.com>");
485 MODULE_DESCRIPTION("Broadcom BCM63xx SPI Controller driver");
486 MODULE_LICENSE("GPL");