Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
[deliverable/linux.git] / drivers / spi / spi-bitbang.c
1 /*
2 * polling/bitbanging SPI master controller driver utilities
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14
15 #include <linux/spinlock.h>
16 #include <linux/workqueue.h>
17 #include <linux/interrupt.h>
18 #include <linux/module.h>
19 #include <linux/delay.h>
20 #include <linux/errno.h>
21 #include <linux/platform_device.h>
22 #include <linux/slab.h>
23
24 #include <linux/spi/spi.h>
25 #include <linux/spi/spi_bitbang.h>
26
27
28 /*----------------------------------------------------------------------*/
29
30 /*
31 * FIRST PART (OPTIONAL): word-at-a-time spi_transfer support.
32 * Use this for GPIO or shift-register level hardware APIs.
33 *
34 * spi_bitbang_cs is in spi_device->controller_state, which is unavailable
35 * to glue code. These bitbang setup() and cleanup() routines are always
36 * used, though maybe they're called from controller-aware code.
37 *
38 * chipselect() and friends may use spi_device->controller_data and
39 * controller registers as appropriate.
40 *
41 *
42 * NOTE: SPI controller pins can often be used as GPIO pins instead,
43 * which means you could use a bitbang driver either to get hardware
44 * working quickly, or testing for differences that aren't speed related.
45 */
46
47 struct spi_bitbang_cs {
48 unsigned nsecs; /* (clock cycle time)/2 */
49 u32 (*txrx_word)(struct spi_device *spi, unsigned nsecs,
50 u32 word, u8 bits);
51 unsigned (*txrx_bufs)(struct spi_device *,
52 u32 (*txrx_word)(
53 struct spi_device *spi,
54 unsigned nsecs,
55 u32 word, u8 bits),
56 unsigned, struct spi_transfer *);
57 };
58
59 static unsigned bitbang_txrx_8(
60 struct spi_device *spi,
61 u32 (*txrx_word)(struct spi_device *spi,
62 unsigned nsecs,
63 u32 word, u8 bits),
64 unsigned ns,
65 struct spi_transfer *t
66 ) {
67 unsigned bits = t->bits_per_word;
68 unsigned count = t->len;
69 const u8 *tx = t->tx_buf;
70 u8 *rx = t->rx_buf;
71
72 while (likely(count > 0)) {
73 u8 word = 0;
74
75 if (tx)
76 word = *tx++;
77 word = txrx_word(spi, ns, word, bits);
78 if (rx)
79 *rx++ = word;
80 count -= 1;
81 }
82 return t->len - count;
83 }
84
85 static unsigned bitbang_txrx_16(
86 struct spi_device *spi,
87 u32 (*txrx_word)(struct spi_device *spi,
88 unsigned nsecs,
89 u32 word, u8 bits),
90 unsigned ns,
91 struct spi_transfer *t
92 ) {
93 unsigned bits = t->bits_per_word;
94 unsigned count = t->len;
95 const u16 *tx = t->tx_buf;
96 u16 *rx = t->rx_buf;
97
98 while (likely(count > 1)) {
99 u16 word = 0;
100
101 if (tx)
102 word = *tx++;
103 word = txrx_word(spi, ns, word, bits);
104 if (rx)
105 *rx++ = word;
106 count -= 2;
107 }
108 return t->len - count;
109 }
110
111 static unsigned bitbang_txrx_32(
112 struct spi_device *spi,
113 u32 (*txrx_word)(struct spi_device *spi,
114 unsigned nsecs,
115 u32 word, u8 bits),
116 unsigned ns,
117 struct spi_transfer *t
118 ) {
119 unsigned bits = t->bits_per_word;
120 unsigned count = t->len;
121 const u32 *tx = t->tx_buf;
122 u32 *rx = t->rx_buf;
123
124 while (likely(count > 3)) {
125 u32 word = 0;
126
127 if (tx)
128 word = *tx++;
129 word = txrx_word(spi, ns, word, bits);
130 if (rx)
131 *rx++ = word;
132 count -= 4;
133 }
134 return t->len - count;
135 }
136
137 int spi_bitbang_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
138 {
139 struct spi_bitbang_cs *cs = spi->controller_state;
140 u8 bits_per_word;
141 u32 hz;
142
143 if (t) {
144 bits_per_word = t->bits_per_word;
145 hz = t->speed_hz;
146 } else {
147 bits_per_word = 0;
148 hz = 0;
149 }
150
151 /* spi_transfer level calls that work per-word */
152 if (!bits_per_word)
153 bits_per_word = spi->bits_per_word;
154 if (bits_per_word <= 8)
155 cs->txrx_bufs = bitbang_txrx_8;
156 else if (bits_per_word <= 16)
157 cs->txrx_bufs = bitbang_txrx_16;
158 else if (bits_per_word <= 32)
159 cs->txrx_bufs = bitbang_txrx_32;
160 else
161 return -EINVAL;
162
163 /* nsecs = (clock period)/2 */
164 if (!hz)
165 hz = spi->max_speed_hz;
166 if (hz) {
167 cs->nsecs = (1000000000/2) / hz;
168 if (cs->nsecs > (MAX_UDELAY_MS * 1000 * 1000))
169 return -EINVAL;
170 }
171
172 return 0;
173 }
174 EXPORT_SYMBOL_GPL(spi_bitbang_setup_transfer);
175
176 /**
177 * spi_bitbang_setup - default setup for per-word I/O loops
178 */
179 int spi_bitbang_setup(struct spi_device *spi)
180 {
181 struct spi_bitbang_cs *cs = spi->controller_state;
182 struct spi_bitbang *bitbang;
183 int retval;
184 unsigned long flags;
185
186 bitbang = spi_master_get_devdata(spi->master);
187
188 if (!cs) {
189 cs = kzalloc(sizeof(*cs), GFP_KERNEL);
190 if (!cs)
191 return -ENOMEM;
192 spi->controller_state = cs;
193 }
194
195 /* per-word shift register access, in hardware or bitbanging */
196 cs->txrx_word = bitbang->txrx_word[spi->mode & (SPI_CPOL|SPI_CPHA)];
197 if (!cs->txrx_word)
198 return -EINVAL;
199
200 retval = bitbang->setup_transfer(spi, NULL);
201 if (retval < 0)
202 return retval;
203
204 dev_dbg(&spi->dev, "%s, %u nsec/bit\n", __func__, 2 * cs->nsecs);
205
206 /* NOTE we _need_ to call chipselect() early, ideally with adapter
207 * setup, unless the hardware defaults cooperate to avoid confusion
208 * between normal (active low) and inverted chipselects.
209 */
210
211 /* deselect chip (low or high) */
212 spin_lock_irqsave(&bitbang->lock, flags);
213 if (!bitbang->busy) {
214 bitbang->chipselect(spi, BITBANG_CS_INACTIVE);
215 ndelay(cs->nsecs);
216 }
217 spin_unlock_irqrestore(&bitbang->lock, flags);
218
219 return 0;
220 }
221 EXPORT_SYMBOL_GPL(spi_bitbang_setup);
222
223 /**
224 * spi_bitbang_cleanup - default cleanup for per-word I/O loops
225 */
226 void spi_bitbang_cleanup(struct spi_device *spi)
227 {
228 kfree(spi->controller_state);
229 }
230 EXPORT_SYMBOL_GPL(spi_bitbang_cleanup);
231
232 static int spi_bitbang_bufs(struct spi_device *spi, struct spi_transfer *t)
233 {
234 struct spi_bitbang_cs *cs = spi->controller_state;
235 unsigned nsecs = cs->nsecs;
236
237 return cs->txrx_bufs(spi, cs->txrx_word, nsecs, t);
238 }
239
240 /*----------------------------------------------------------------------*/
241
242 /*
243 * SECOND PART ... simple transfer queue runner.
244 *
245 * This costs a task context per controller, running the queue by
246 * performing each transfer in sequence. Smarter hardware can queue
247 * several DMA transfers at once, and process several controller queues
248 * in parallel; this driver doesn't match such hardware very well.
249 *
250 * Drivers can provide word-at-a-time i/o primitives, or provide
251 * transfer-at-a-time ones to leverage dma or fifo hardware.
252 */
253
254 static int spi_bitbang_prepare_hardware(struct spi_master *spi)
255 {
256 struct spi_bitbang *bitbang;
257 unsigned long flags;
258
259 bitbang = spi_master_get_devdata(spi);
260
261 spin_lock_irqsave(&bitbang->lock, flags);
262 bitbang->busy = 1;
263 spin_unlock_irqrestore(&bitbang->lock, flags);
264
265 return 0;
266 }
267
268 static int spi_bitbang_transfer_one(struct spi_master *master,
269 struct spi_message *m)
270 {
271 struct spi_bitbang *bitbang;
272 unsigned nsecs;
273 struct spi_transfer *t = NULL;
274 unsigned cs_change;
275 int status;
276 int do_setup = -1;
277 struct spi_device *spi = m->spi;
278
279 bitbang = spi_master_get_devdata(master);
280
281 /* FIXME this is made-up ... the correct value is known to
282 * word-at-a-time bitbang code, and presumably chipselect()
283 * should enforce these requirements too?
284 */
285 nsecs = 100;
286
287 cs_change = 1;
288 status = 0;
289
290 list_for_each_entry(t, &m->transfers, transfer_list) {
291
292 /* override speed or wordsize? */
293 if (t->speed_hz || t->bits_per_word)
294 do_setup = 1;
295
296 /* init (-1) or override (1) transfer params */
297 if (do_setup != 0) {
298 status = bitbang->setup_transfer(spi, t);
299 if (status < 0)
300 break;
301 if (do_setup == -1)
302 do_setup = 0;
303 }
304
305 /* set up default clock polarity, and activate chip;
306 * this implicitly updates clock and spi modes as
307 * previously recorded for this device via setup().
308 * (and also deselects any other chip that might be
309 * selected ...)
310 */
311 if (cs_change) {
312 bitbang->chipselect(spi, BITBANG_CS_ACTIVE);
313 ndelay(nsecs);
314 }
315 cs_change = t->cs_change;
316 if (!t->tx_buf && !t->rx_buf && t->len) {
317 status = -EINVAL;
318 break;
319 }
320
321 /* transfer data. the lower level code handles any
322 * new dma mappings it needs. our caller always gave
323 * us dma-safe buffers.
324 */
325 if (t->len) {
326 /* REVISIT dma API still needs a designated
327 * DMA_ADDR_INVALID; ~0 might be better.
328 */
329 if (!m->is_dma_mapped)
330 t->rx_dma = t->tx_dma = 0;
331 status = bitbang->txrx_bufs(spi, t);
332 }
333 if (status > 0)
334 m->actual_length += status;
335 if (status != t->len) {
336 /* always report some kind of error */
337 if (status >= 0)
338 status = -EREMOTEIO;
339 break;
340 }
341 status = 0;
342
343 /* protocol tweaks before next transfer */
344 if (t->delay_usecs)
345 udelay(t->delay_usecs);
346
347 if (cs_change &&
348 !list_is_last(&t->transfer_list, &m->transfers)) {
349 /* sometimes a short mid-message deselect of the chip
350 * may be needed to terminate a mode or command
351 */
352 ndelay(nsecs);
353 bitbang->chipselect(spi, BITBANG_CS_INACTIVE);
354 ndelay(nsecs);
355 }
356 }
357
358 m->status = status;
359
360 /* normally deactivate chipselect ... unless no error and
361 * cs_change has hinted that the next message will probably
362 * be for this chip too.
363 */
364 if (!(status == 0 && cs_change)) {
365 ndelay(nsecs);
366 bitbang->chipselect(spi, BITBANG_CS_INACTIVE);
367 ndelay(nsecs);
368 }
369
370 spi_finalize_current_message(master);
371
372 return status;
373 }
374
375 static int spi_bitbang_unprepare_hardware(struct spi_master *spi)
376 {
377 struct spi_bitbang *bitbang;
378 unsigned long flags;
379
380 bitbang = spi_master_get_devdata(spi);
381
382 spin_lock_irqsave(&bitbang->lock, flags);
383 bitbang->busy = 0;
384 spin_unlock_irqrestore(&bitbang->lock, flags);
385
386 return 0;
387 }
388
389 /*----------------------------------------------------------------------*/
390
391 /**
392 * spi_bitbang_start - start up a polled/bitbanging SPI master driver
393 * @bitbang: driver handle
394 *
395 * Caller should have zero-initialized all parts of the structure, and then
396 * provided callbacks for chip selection and I/O loops. If the master has
397 * a transfer method, its final step should call spi_bitbang_transfer; or,
398 * that's the default if the transfer routine is not initialized. It should
399 * also set up the bus number and number of chipselects.
400 *
401 * For i/o loops, provide callbacks either per-word (for bitbanging, or for
402 * hardware that basically exposes a shift register) or per-spi_transfer
403 * (which takes better advantage of hardware like fifos or DMA engines).
404 *
405 * Drivers using per-word I/O loops should use (or call) spi_bitbang_setup,
406 * spi_bitbang_cleanup and spi_bitbang_setup_transfer to handle those spi
407 * master methods. Those methods are the defaults if the bitbang->txrx_bufs
408 * routine isn't initialized.
409 *
410 * This routine registers the spi_master, which will process requests in a
411 * dedicated task, keeping IRQs unblocked most of the time. To stop
412 * processing those requests, call spi_bitbang_stop().
413 *
414 * On success, this routine will take a reference to master. The caller is
415 * responsible for calling spi_bitbang_stop() to decrement the reference and
416 * spi_master_put() as counterpart of spi_alloc_master() to prevent a memory
417 * leak.
418 */
419 int spi_bitbang_start(struct spi_bitbang *bitbang)
420 {
421 struct spi_master *master = bitbang->master;
422 int ret;
423
424 if (!master || !bitbang->chipselect)
425 return -EINVAL;
426
427 spin_lock_init(&bitbang->lock);
428
429 if (!master->mode_bits)
430 master->mode_bits = SPI_CPOL | SPI_CPHA | bitbang->flags;
431
432 if (master->transfer || master->transfer_one_message)
433 return -EINVAL;
434
435 master->prepare_transfer_hardware = spi_bitbang_prepare_hardware;
436 master->unprepare_transfer_hardware = spi_bitbang_unprepare_hardware;
437 master->transfer_one_message = spi_bitbang_transfer_one;
438
439 if (!bitbang->txrx_bufs) {
440 bitbang->use_dma = 0;
441 bitbang->txrx_bufs = spi_bitbang_bufs;
442 if (!master->setup) {
443 if (!bitbang->setup_transfer)
444 bitbang->setup_transfer =
445 spi_bitbang_setup_transfer;
446 master->setup = spi_bitbang_setup;
447 master->cleanup = spi_bitbang_cleanup;
448 }
449 }
450
451 /* driver may get busy before register() returns, especially
452 * if someone registered boardinfo for devices
453 */
454 ret = spi_register_master(spi_master_get(master));
455 if (ret)
456 spi_master_put(master);
457
458 return 0;
459 }
460 EXPORT_SYMBOL_GPL(spi_bitbang_start);
461
462 /**
463 * spi_bitbang_stop - stops the task providing spi communication
464 */
465 void spi_bitbang_stop(struct spi_bitbang *bitbang)
466 {
467 spi_unregister_master(bitbang->master);
468 }
469 EXPORT_SYMBOL_GPL(spi_bitbang_stop);
470
471 MODULE_LICENSE("GPL");
472
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