drivers/spi/spi-mpc512x-psc.c

   1 /*
   2  * MPC512x PSC in SPI mode driver.
   3  *
   4  * Copyright (C) 2007,2008 Freescale Semiconductor Inc.
   5  * Original port from 52xx driver:
   6  *      Hongjun Chen <hong-jun.chen@freescale.com>
   7  *
   8  * Fork of mpc52xx_psc_spi.c:
   9  *      Copyright (C) 2006 TOPTICA Photonics AG., Dragos Carp
  10  *
  11  * This program is free software; you can redistribute  it and/or modify it
  12  * under  the terms of  the GNU General  Public License as published by the
  13  * Free Software Foundation;  either version 2 of the  License, or (at your
  14  * option) any later version.
  15  */
  16
  17 #include <linux/module.h>
  18 #include <linux/kernel.h>
  19 #include <linux/init.h>
  20 #include <linux/errno.h>
  21 #include <linux/interrupt.h>
  22 #include <linux/of_address.h>
  23 #include <linux/of_platform.h>
  24 #include <linux/workqueue.h>
  25 #include <linux/completion.h>
  26 #include <linux/io.h>
  27 #include <linux/delay.h>
  28 #include <linux/clk.h>
  29 #include <linux/spi/spi.h>
  30 #include <linux/fsl_devices.h>
  31 #include <linux/gpio.h>
  32 #include <asm/mpc52xx_psc.h>
  33
  34 struct mpc512x_psc_spi {
  35         void (*cs_control)(struct spi_device *spi, bool on);
  36         u32 sysclk;
  37
  38         /* driver internal data */
  39         struct mpc52xx_psc __iomem *psc;
  40         struct mpc512x_psc_fifo __iomem *fifo;
  41         unsigned int irq;
  42         u8 bits_per_word;
  43         u8 busy;
  44         u32 mclk;
  45         u8 eofbyte;
  46
  47         struct workqueue_struct *workqueue;
  48         struct work_struct work;
  49
  50         struct list_head queue;
  51         spinlock_t lock;        /* Message queue lock */
  52
  53         struct completion done;
  54 };
  55
  56 /* controller state */
  57 struct mpc512x_psc_spi_cs {
  58         int bits_per_word;
  59         int speed_hz;
  60 };
  61
  62 /* set clock freq, clock ramp, bits per work
  63  * if t is NULL then reset the values to the default values
  64  */
  65 static int mpc512x_psc_spi_transfer_setup(struct spi_device *spi,
  66                                           struct spi_transfer *t)
  67 {
  68         struct mpc512x_psc_spi_cs *cs = spi->controller_state;
  69
  70         cs->speed_hz = (t && t->speed_hz)
  71             ? t->speed_hz : spi->max_speed_hz;
  72         cs->bits_per_word = (t && t->bits_per_word)
  73             ? t->bits_per_word : spi->bits_per_word;
  74         cs->bits_per_word = ((cs->bits_per_word + 7) / 8) * 8;
  75         return 0;
  76 }
  77
  78 static void mpc512x_psc_spi_activate_cs(struct spi_device *spi)
  79 {
  80         struct mpc512x_psc_spi_cs *cs = spi->controller_state;
  81         struct mpc512x_psc_spi *mps = spi_master_get_devdata(spi->master);
  82         struct mpc52xx_psc __iomem *psc = mps->psc;
  83         u32 sicr;
  84         u32 ccr;
  85         u16 bclkdiv;
  86
  87         sicr = in_be32(&psc->sicr);
  88
  89         /* Set clock phase and polarity */
  90         if (spi->mode & SPI_CPHA)
  91                 sicr |= 0x00001000;
  92         else
  93                 sicr &= ~0x00001000;
  94
  95         if (spi->mode & SPI_CPOL)
  96                 sicr |= 0x00002000;
  97         else
  98                 sicr &= ~0x00002000;
  99
 100         if (spi->mode & SPI_LSB_FIRST)
 101                 sicr |= 0x10000000;
 102         else
 103                 sicr &= ~0x10000000;
 104         out_be32(&psc->sicr, sicr);
 105
 106         ccr = in_be32(&psc->ccr);
 107         ccr &= 0xFF000000;
 108         if (cs->speed_hz)
 109                 bclkdiv = (mps->mclk / cs->speed_hz) - 1;
 110         else
 111                 bclkdiv = (mps->mclk / 1000000) - 1;    /* default 1MHz */
 112
 113         ccr |= (((bclkdiv & 0xff) << 16) | (((bclkdiv >> 8) & 0xff) << 8));
 114         out_be32(&psc->ccr, ccr);
 115         mps->bits_per_word = cs->bits_per_word;
 116
 117         if (mps->cs_control && gpio_is_valid(spi->cs_gpio))
 118                 mps->cs_control(spi, (spi->mode & SPI_CS_HIGH) ? 1 : 0);
 119 }
 120
 121 static void mpc512x_psc_spi_deactivate_cs(struct spi_device *spi)
 122 {
 123         struct mpc512x_psc_spi *mps = spi_master_get_devdata(spi->master);
 124
 125         if (mps->cs_control && gpio_is_valid(spi->cs_gpio))
 126                 mps->cs_control(spi, (spi->mode & SPI_CS_HIGH) ? 0 : 1);
 127
 128 }
 129
 130 /* extract and scale size field in txsz or rxsz */
 131 #define MPC512x_PSC_FIFO_SZ(sz) ((sz & 0x7ff) << 2);
 132
 133 #define EOFBYTE 1
 134
 135 static int mpc512x_psc_spi_transfer_rxtx(struct spi_device *spi,
 136                                          struct spi_transfer *t)
 137 {
 138         struct mpc512x_psc_spi *mps = spi_master_get_devdata(spi->master);
 139         struct mpc52xx_psc __iomem *psc = mps->psc;
 140         struct mpc512x_psc_fifo __iomem *fifo = mps->fifo;
 141         size_t len = t->len;
 142         u8 *tx_buf = (u8 *)t->tx_buf;
 143         u8 *rx_buf = (u8 *)t->rx_buf;
 144
 145         if (!tx_buf && !rx_buf && t->len)
 146                 return -EINVAL;
 147
 148         /* Zero MR2 */
 149         in_8(&psc->mode);
 150         out_8(&psc->mode, 0x0);
 151
 152         while (len) {
 153                 int count;
 154                 int i;
 155                 u8 data;
 156                 size_t fifosz;
 157                 int rxcount;
 158
 159                 /*
 160                  * The number of bytes that can be sent at a time
 161                  * depends on the fifo size.
 162                  */
 163                 fifosz = MPC512x_PSC_FIFO_SZ(in_be32(&fifo->txsz));
 164                 count = min(fifosz, len);
 165
 166                 for (i = count; i > 0; i--) {
 167                         data = tx_buf ? *tx_buf++ : 0;
 168                         if (len == EOFBYTE && t->cs_change)
 169                                 setbits32(&fifo->txcmd, MPC512x_PSC_FIFO_EOF);
 170                         out_8(&fifo->txdata_8, data);
 171                         len--;
 172                 }
 173
 174                 INIT_COMPLETION(mps->done);
 175
 176                 /* interrupt on tx fifo empty */
 177                 out_be32(&fifo->txisr, MPC512x_PSC_FIFO_EMPTY);
 178                 out_be32(&fifo->tximr, MPC512x_PSC_FIFO_EMPTY);
 179
 180                 /* enable transmiter/receiver */
 181                 out_8(&psc->command,
 182                       MPC52xx_PSC_TX_ENABLE | MPC52xx_PSC_RX_ENABLE);
 183
 184                 wait_for_completion(&mps->done);
 185
 186                 mdelay(1);
 187
 188                 /* rx fifo should have count bytes in it */
 189                 rxcount = in_be32(&fifo->rxcnt);
 190                 if (rxcount != count)
 191                         mdelay(1);
 192
 193                 rxcount = in_be32(&fifo->rxcnt);
 194                 if (rxcount != count) {
 195                         dev_warn(&spi->dev, "expected %d bytes in rx fifo "
 196                                  "but got %d\n", count, rxcount);
 197                 }
 198
 199                 rxcount = min(rxcount, count);
 200                 for (i = rxcount; i > 0; i--) {
 201                         data = in_8(&fifo->rxdata_8);
 202                         if (rx_buf)
 203                                 *rx_buf++ = data;
 204                 }
 205                 while (in_be32(&fifo->rxcnt)) {
 206                         in_8(&fifo->rxdata_8);
 207                 }
 208
 209                 out_8(&psc->command,
 210                       MPC52xx_PSC_TX_DISABLE | MPC52xx_PSC_RX_DISABLE);
 211         }
 212         /* disable transmiter/receiver and fifo interrupt */
 213         out_8(&psc->command, MPC52xx_PSC_TX_DISABLE | MPC52xx_PSC_RX_DISABLE);
 214         out_be32(&fifo->tximr, 0);
 215         return 0;
 216 }
 217
 218 static void mpc512x_psc_spi_work(struct work_struct *work)
 219 {
 220         struct mpc512x_psc_spi *mps = container_of(work,
 221                                                    struct mpc512x_psc_spi,
 222                                                    work);
 223
 224         spin_lock_irq(&mps->lock);
 225         mps->busy = 1;
 226         while (!list_empty(&mps->queue)) {
 227                 struct spi_message *m;
 228                 struct spi_device *spi;
 229                 struct spi_transfer *t = NULL;
 230                 unsigned cs_change;
 231                 int status;
 232
 233                 m = container_of(mps->queue.next, struct spi_message, queue);
 234                 list_del_init(&m->queue);
 235                 spin_unlock_irq(&mps->lock);
 236
 237                 spi = m->spi;
 238                 cs_change = 1;
 239                 status = 0;
 240                 list_for_each_entry(t, &m->transfers, transfer_list) {
 241                         if (t->bits_per_word || t->speed_hz) {
 242                                 status = mpc512x_psc_spi_transfer_setup(spi, t);
 243                                 if (status < 0)
 244                                         break;
 245                         }
 246
 247                         if (cs_change)
 248                                 mpc512x_psc_spi_activate_cs(spi);
 249                         cs_change = t->cs_change;
 250
 251                         status = mpc512x_psc_spi_transfer_rxtx(spi, t);
 252                         if (status)
 253                                 break;
 254                         m->actual_length += t->len;
 255
 256                         if (t->delay_usecs)
 257                                 udelay(t->delay_usecs);
 258
 259                         if (cs_change)
 260                                 mpc512x_psc_spi_deactivate_cs(spi);
 261                 }
 262
 263                 m->status = status;
 264                 m->complete(m->context);
 265
 266                 if (status || !cs_change)
 267                         mpc512x_psc_spi_deactivate_cs(spi);
 268
 269                 mpc512x_psc_spi_transfer_setup(spi, NULL);
 270
 271                 spin_lock_irq(&mps->lock);
 272         }
 273         mps->busy = 0;
 274         spin_unlock_irq(&mps->lock);
 275 }
 276
 277 static int mpc512x_psc_spi_setup(struct spi_device *spi)
 278 {
 279         struct mpc512x_psc_spi *mps = spi_master_get_devdata(spi->master);
 280         struct mpc512x_psc_spi_cs *cs = spi->controller_state;
 281         unsigned long flags;
 282         int ret;
 283
 284         if (spi->bits_per_word % 8)
 285                 return -EINVAL;
 286
 287         if (!cs) {
 288                 cs = kzalloc(sizeof *cs, GFP_KERNEL);
 289                 if (!cs)
 290                         return -ENOMEM;
 291
 292                 if (gpio_is_valid(spi->cs_gpio)) {
 293                         ret = gpio_request(spi->cs_gpio, dev_name(&spi->dev));
 294                         if (ret) {
 295                                 dev_err(&spi->dev, "can't get CS gpio: %d\n",
 296                                         ret);
 297                                 kfree(cs);
 298                                 return ret;
 299                         }
 300                         gpio_direction_output(spi->cs_gpio,
 301                                         spi->mode & SPI_CS_HIGH ? 0 : 1);
 302                 }
 303
 304                 spi->controller_state = cs;
 305         }
 306
 307         cs->bits_per_word = spi->bits_per_word;
 308         cs->speed_hz = spi->max_speed_hz;
 309
 310         spin_lock_irqsave(&mps->lock, flags);
 311         if (!mps->busy)
 312                 mpc512x_psc_spi_deactivate_cs(spi);
 313         spin_unlock_irqrestore(&mps->lock, flags);
 314
 315         return 0;
 316 }
 317
 318 static int mpc512x_psc_spi_transfer(struct spi_device *spi,
 319                                     struct spi_message *m)
 320 {
 321         struct mpc512x_psc_spi *mps = spi_master_get_devdata(spi->master);
 322         unsigned long flags;
 323
 324         m->actual_length = 0;
 325         m->status = -EINPROGRESS;
 326
 327         spin_lock_irqsave(&mps->lock, flags);
 328         list_add_tail(&m->queue, &mps->queue);
 329         queue_work(mps->workqueue, &mps->work);
 330         spin_unlock_irqrestore(&mps->lock, flags);
 331
 332         return 0;
 333 }
 334
 335 static void mpc512x_psc_spi_cleanup(struct spi_device *spi)
 336 {
 337         if (gpio_is_valid(spi->cs_gpio))
 338                 gpio_free(spi->cs_gpio);
 339         kfree(spi->controller_state);
 340 }
 341
 342 static int mpc512x_psc_spi_port_config(struct spi_master *master,
 343                                        struct mpc512x_psc_spi *mps)
 344 {
 345         struct mpc52xx_psc __iomem *psc = mps->psc;
 346         struct mpc512x_psc_fifo __iomem *fifo = mps->fifo;
 347         struct clk *spiclk;
 348         int ret = 0;
 349         char name[32];
 350         u32 sicr;
 351         u32 ccr;
 352         u16 bclkdiv;
 353
 354         sprintf(name, "psc%d_mclk", master->bus_num);
 355         spiclk = clk_get(&master->dev, name);
 356         clk_enable(spiclk);
 357         mps->mclk = clk_get_rate(spiclk);
 358         clk_put(spiclk);
 359
 360         /* Reset the PSC into a known state */
 361         out_8(&psc->command, MPC52xx_PSC_RST_RX);
 362         out_8(&psc->command, MPC52xx_PSC_RST_TX);
 363         out_8(&psc->command, MPC52xx_PSC_TX_DISABLE | MPC52xx_PSC_RX_DISABLE);
 364
 365         /* Disable psc interrupts all useful interrupts are in fifo */
 366         out_be16(&psc->isr_imr.imr, 0);
 367
 368         /* Disable fifo interrupts, will be enabled later */
 369         out_be32(&fifo->tximr, 0);
 370         out_be32(&fifo->rximr, 0);
 371
 372         /* Setup fifo slice address and size */
 373         /*out_be32(&fifo->txsz, 0x0fe00004);*/
 374         /*out_be32(&fifo->rxsz, 0x0ff00004);*/
 375
 376         sicr =  0x01000000 |    /* SIM = 0001 -- 8 bit */
 377                 0x00800000 |    /* GenClk = 1 -- internal clk */
 378                 0x00008000 |    /* SPI = 1 */
 379                 0x00004000 |    /* MSTR = 1   -- SPI master */
 380                 0x00000800;     /* UseEOF = 1 -- SS low until EOF */
 381
 382         out_be32(&psc->sicr, sicr);
 383
 384         ccr = in_be32(&psc->ccr);
 385         ccr &= 0xFF000000;
 386         bclkdiv = (mps->mclk / 1000000) - 1;    /* default 1MHz */
 387         ccr |= (((bclkdiv & 0xff) << 16) | (((bclkdiv >> 8) & 0xff) << 8));
 388         out_be32(&psc->ccr, ccr);
 389
 390         /* Set 2ms DTL delay */
 391         out_8(&psc->ctur, 0x00);
 392         out_8(&psc->ctlr, 0x82);
 393
 394         /* we don't use the alarms */
 395         out_be32(&fifo->rxalarm, 0xfff);
 396         out_be32(&fifo->txalarm, 0);
 397
 398         /* Enable FIFO slices for Rx/Tx */
 399         out_be32(&fifo->rxcmd,
 400                  MPC512x_PSC_FIFO_ENABLE_SLICE | MPC512x_PSC_FIFO_ENABLE_DMA);
 401         out_be32(&fifo->txcmd,
 402                  MPC512x_PSC_FIFO_ENABLE_SLICE | MPC512x_PSC_FIFO_ENABLE_DMA);
 403
 404         mps->bits_per_word = 8;
 405
 406         return ret;
 407 }
 408
 409 static irqreturn_t mpc512x_psc_spi_isr(int irq, void *dev_id)
 410 {
 411         struct mpc512x_psc_spi *mps = (struct mpc512x_psc_spi *)dev_id;
 412         struct mpc512x_psc_fifo __iomem *fifo = mps->fifo;
 413
 414         /* clear interrupt and wake up the work queue */
 415         if (in_be32(&fifo->txisr) &
 416             in_be32(&fifo->tximr) & MPC512x_PSC_FIFO_EMPTY) {
 417                 out_be32(&fifo->txisr, MPC512x_PSC_FIFO_EMPTY);
 418                 out_be32(&fifo->tximr, 0);
 419                 complete(&mps->done);
 420                 return IRQ_HANDLED;
 421         }
 422         return IRQ_NONE;
 423 }
 424
 425 static void mpc512x_spi_cs_control(struct spi_device *spi, bool onoff)
 426 {
 427         gpio_set_value(spi->cs_gpio, onoff);
 428 }
 429
 430 /* bus_num is used only for the case dev->platform_data == NULL */
 431 static int mpc512x_psc_spi_do_probe(struct device *dev, u32 regaddr,
 432                                               u32 size, unsigned int irq,
 433                                               s16 bus_num)
 434 {
 435         struct fsl_spi_platform_data *pdata = dev->platform_data;
 436         struct mpc512x_psc_spi *mps;
 437         struct spi_master *master;
 438         int ret;
 439         void *tempp;
 440
 441         master = spi_alloc_master(dev, sizeof *mps);
 442         if (master == NULL)
 443                 return -ENOMEM;
 444
 445         dev_set_drvdata(dev, master);
 446         mps = spi_master_get_devdata(master);
 447         mps->irq = irq;
 448
 449         if (pdata == NULL) {
 450                 mps->cs_control = mpc512x_spi_cs_control;
 451                 mps->sysclk = 0;
 452                 master->bus_num = bus_num;
 453         } else {
 454                 mps->cs_control = pdata->cs_control;
 455                 mps->sysclk = pdata->sysclk;
 456                 master->bus_num = pdata->bus_num;
 457                 master->num_chipselect = pdata->max_chipselect;
 458         }
 459
 460         master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LSB_FIRST;
 461         master->setup = mpc512x_psc_spi_setup;
 462         master->transfer = mpc512x_psc_spi_transfer;
 463         master->cleanup = mpc512x_psc_spi_cleanup;
 464         master->dev.of_node = dev->of_node;
 465
 466         tempp = ioremap(regaddr, size);
 467         if (!tempp) {
 468                 dev_err(dev, "could not ioremap I/O port range\n");
 469                 ret = -EFAULT;
 470                 goto free_master;
 471         }
 472         mps->psc = tempp;
 473         mps->fifo =
 474                 (struct mpc512x_psc_fifo *)(tempp + sizeof(struct mpc52xx_psc));
 475
 476         ret = request_irq(mps->irq, mpc512x_psc_spi_isr, IRQF_SHARED,
 477                           "mpc512x-psc-spi", mps);
 478         if (ret)
 479                 goto free_master;
 480
 481         ret = mpc512x_psc_spi_port_config(master, mps);
 482         if (ret < 0)
 483                 goto free_irq;
 484
 485         spin_lock_init(&mps->lock);
 486         init_completion(&mps->done);
 487         INIT_WORK(&mps->work, mpc512x_psc_spi_work);
 488         INIT_LIST_HEAD(&mps->queue);
 489
 490         mps->workqueue =
 491                 create_singlethread_workqueue(dev_name(master->dev.parent));
 492         if (mps->workqueue == NULL) {
 493                 ret = -EBUSY;
 494                 goto free_irq;
 495         }
 496
 497         ret = spi_register_master(master);
 498         if (ret < 0)
 499                 goto unreg_master;
 500
 501         return ret;
 502
 503 unreg_master:
 504         destroy_workqueue(mps->workqueue);
 505 free_irq:
 506         free_irq(mps->irq, mps);
 507 free_master:
 508         if (mps->psc)
 509                 iounmap(mps->psc);
 510         spi_master_put(master);
 511
 512         return ret;
 513 }
 514
 515 static int mpc512x_psc_spi_do_remove(struct device *dev)
 516 {
 517         struct spi_master *master = spi_master_get(dev_get_drvdata(dev));
 518         struct mpc512x_psc_spi *mps = spi_master_get_devdata(master);
 519
 520         flush_workqueue(mps->workqueue);
 521         destroy_workqueue(mps->workqueue);
 522         spi_unregister_master(master);
 523         free_irq(mps->irq, mps);
 524         if (mps->psc)
 525                 iounmap(mps->psc);
 526         spi_master_put(master);
 527
 528         return 0;
 529 }
 530
 531 static int mpc512x_psc_spi_of_probe(struct platform_device *op)
 532 {
 533         const u32 *regaddr_p;
 534         u64 regaddr64, size64;
 535         s16 id = -1;
 536
 537         regaddr_p = of_get_address(op->dev.of_node, 0, &size64, NULL);
 538         if (!regaddr_p) {
 539                 dev_err(&op->dev, "Invalid PSC address\n");
 540                 return -EINVAL;
 541         }
 542         regaddr64 = of_translate_address(op->dev.of_node, regaddr_p);
 543
 544         /* get PSC id (0..11, used by port_config) */
 545         id = of_alias_get_id(op->dev.of_node, "spi");
 546         if (id < 0) {
 547                 dev_err(&op->dev, "no alias id for %s\n",
 548                         op->dev.of_node->full_name);
 549                 return id;
 550         }
 551
 552         return mpc512x_psc_spi_do_probe(&op->dev, (u32) regaddr64, (u32) size64,
 553                                 irq_of_parse_and_map(op->dev.of_node, 0), id);
 554 }
 555
 556 static int mpc512x_psc_spi_of_remove(struct platform_device *op)
 557 {
 558         return mpc512x_psc_spi_do_remove(&op->dev);
 559 }
 560
 561 static struct of_device_id mpc512x_psc_spi_of_match[] = {
 562         { .compatible = "fsl,mpc5121-psc-spi", },
 563         {},
 564 };
 565
 566 MODULE_DEVICE_TABLE(of, mpc512x_psc_spi_of_match);
 567
 568 static struct platform_driver mpc512x_psc_spi_of_driver = {
 569         .probe = mpc512x_psc_spi_of_probe,
 570         .remove = mpc512x_psc_spi_of_remove,
 571         .driver = {
 572                 .name = "mpc512x-psc-spi",
 573                 .owner = THIS_MODULE,
 574                 .of_match_table = mpc512x_psc_spi_of_match,
 575         },
 576 };
 577 module_platform_driver(mpc512x_psc_spi_of_driver);
 578
 579 MODULE_AUTHOR("John Rigby");
 580 MODULE_DESCRIPTION("MPC512x PSC SPI Driver");
 581 MODULE_LICENSE("GPL");