drivers/staging/comedi/drivers/addi-data/hwdrv_apci2032.h

   1 /**
   2 @verbatim
   3
   4 Copyright (C) 2004,2005  ADDI-DATA GmbH for the source code of this module.
   5
   6         ADDI-DATA GmbH
   7         Dieselstrasse 3
   8         D-77833 Ottersweier
   9         Tel: +19(0)7223/9493-0
  10         Fax: +49(0)7223/9493-92
  11         http://www.addi-data-com
  12         info@addi-data.com
  13
  14 This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version.
  15
  16 This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
  17
  18 You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  19
  20 You shoud also find the complete GPL in the COPYING file accompanying this source code.
  21
  22 @endverbatim
  23 */
  24 /*********      Definitions for APCI-2032 card  *****/
  25
  26 // Card Specific information
  27 #define APCI2032_BOARD_VENDOR_ID                 0x15B8
  28 #define APCI2032_ADDRESS_RANGE                   63
  29
  30 //DIGITAL INPUT-OUTPUT DEFINE
  31
  32 #define APCI2032_DIGITAL_OP                     0
  33 #define APCI2032_DIGITAL_OP_RW                  0
  34 #define APCI2032_DIGITAL_OP_INTERRUPT           4
  35 #define APCI2032_DIGITAL_OP_IRQ                 12
  36
  37 //Digital Output Interrupt Status
  38 #define APCI2032_DIGITAL_OP_INTERRUPT_STATUS    8
  39
  40 //Digital Output Interrupt Enable Disable.
  41 #define APCI2032_DIGITAL_OP_VCC_INTERRUPT_ENABLE   0x1
  42 #define APCI2032_DIGITAL_OP_VCC_INTERRUPT_DISABLE  0xFFFFFFFE
  43 #define APCI2032_DIGITAL_OP_CC_INTERRUPT_ENABLE    0x2
  44 #define APCI2032_DIGITAL_OP_CC_INTERRUPT_DISABLE   0xFFFFFFFD
  45
  46 //ADDIDATA Enable Disable
  47
  48 #define ADDIDATA_ENABLE                            1
  49 #define ADDIDATA_DISABLE                           0
  50
  51 // TIMER COUNTER WATCHDOG DEFINES
  52
  53 #define ADDIDATA_WATCHDOG                          2
  54 #define APCI2032_DIGITAL_OP_WATCHDOG               16
  55 #define APCI2032_TCW_RELOAD_VALUE                  4
  56 #define APCI2032_TCW_TIMEBASE                      8
  57 #define APCI2032_TCW_PROG                          12
  58 #define APCI2032_TCW_TRIG_STATUS                   16
  59 #define APCI2032_TCW_IRQ                           20
  60
  61 // Hardware Layer  functions for Apci2032
  62
  63 //DO
  64 int i_APCI2032_ConfigDigitalOutput(comedi_device * dev, comedi_subdevice * s,
  65         comedi_insn * insn, lsampl_t * data);
  66 INT i_APCI2032_WriteDigitalOutput(comedi_device * dev, comedi_subdevice * s,
  67         comedi_insn * insn, lsampl_t * data);
  68 INT i_APCI2032_ReadDigitalOutput(comedi_device * dev, comedi_subdevice * s,
  69         comedi_insn * insn, lsampl_t * data);
  70 int i_APCI2032_ReadInterruptStatus(comedi_device * dev, comedi_subdevice * s,
  71         comedi_insn * insn, lsampl_t * data);
  72
  73 // TIMER
  74 // timer value is passed as u seconds
  75 INT i_APCI2032_ConfigWatchdog(comedi_device * dev, comedi_subdevice * s,
  76         comedi_insn * insn, lsampl_t * data);
  77 int i_APCI2032_StartStopWriteWatchdog(comedi_device * dev, comedi_subdevice * s,
  78         comedi_insn * insn, lsampl_t * data);
  79 int i_APCI2032_ReadWatchdog(comedi_device * dev, comedi_subdevice * s,
  80         comedi_insn * insn, lsampl_t * data);
  81
  82 // Interrupt functions.....
  83
  84 void v_APCI2032_Interrupt(int irq, void *d);
  85
  86 //Reset functions
  87 int i_APCI2032_Reset(comedi_device * dev);