3 * Copyright (C) 2004,2005 ADDI-DATA GmbH for the source code of this module.
4 * Project manager: Eric Stolz
9 * Tel: +19(0)7223/9493-0
10 * Fax: +49(0)7223/9493-92
11 * http://www.addi-data.com
14 * This program is free software; you can redistribute it and/or modify it
15 * under the terms of the GNU General Public License as published by the
16 * Free Software Foundation; either version 2 of the License, or (at your
17 * option) any later version.
19 * This program is distributed in the hope that it will be useful, but WITHOUT
20 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
21 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
26 * Driver: addi_apci_1032
27 * Description: ADDI-DATA APCI-1032 Digital Input Board
28 * Author: ADDI-DATA GmbH <info@addi-data.com>,
29 * H Hartley Sweeten <hsweeten@visionengravers.com>
31 * Devices: [ADDI-DATA] APCI-1032 (addi_apci_1032)
33 * Configuration options:
34 * None; devices are configured automatically.
36 * This driver models the APCI-1032 as a 32-channel, digital input subdevice
37 * plus an additional digital input subdevice to handle change-of-state (COS)
38 * interrupts (if an interrupt handler can be set up successfully).
40 * The COS subdevice supports comedi asynchronous read commands.
42 * Change-Of-State (COS) interrupt configuration:
44 * Channels 0 to 15 are interruptible. These channels can be configured
45 * to generate interrupts based on AND/OR logic for the desired channels.
48 * - reacts to rising or falling edges
49 * - interrupt is generated when any enabled channel meets the desired
53 * - reacts to changes in level of the selected inputs
54 * - interrupt is generated when all enabled channels meet the desired
56 * - after an interrupt, a change in level must occur on the selected
57 * inputs to release the IRQ logic
59 * The COS subdevice must be configured before setting up a comedi
60 * asynchronous command:
62 * data[0] : INSN_CONFIG_DIGITAL_TRIG
63 * data[1] : trigger number (= 0)
64 * data[2] : configuration operation:
65 * - COMEDI_DIGITAL_TRIG_DISABLE = no interrupts
66 * - COMEDI_DIGITAL_TRIG_ENABLE_EDGES = OR (edge) interrupts
67 * - COMEDI_DIGITAL_TRIG_ENABLE_LEVELS = AND (level) interrupts
68 * data[3] : left-shift for data[4] and data[5]
69 * data[4] : rising-edge/high level channels
70 * data[5] : falling-edge/low level channels
73 #include <linux/module.h>
74 #include <linux/interrupt.h>
76 #include "../comedi_pci.h"
77 #include "amcc_s5933.h"
82 #define APCI1032_DI_REG 0x00
83 #define APCI1032_MODE1_REG 0x04
84 #define APCI1032_MODE2_REG 0x08
85 #define APCI1032_STATUS_REG 0x0c
86 #define APCI1032_CTRL_REG 0x10
87 #define APCI1032_CTRL_INT_MODE(x) (((x) & 0x1) << 1)
88 #define APCI1032_CTRL_INT_OR APCI1032_CTRL_INT_MODE(0)
89 #define APCI1032_CTRL_INT_AND APCI1032_CTRL_INT_MODE(1)
90 #define APCI1032_CTRL_INT_ENA BIT(2)
92 struct apci1032_private
{
93 unsigned long amcc_iobase
; /* base of AMCC I/O registers */
94 unsigned int mode1
; /* rising-edge/high level channels */
95 unsigned int mode2
; /* falling-edge/low level channels */
96 unsigned int ctrl
; /* interrupt mode OR (edge) . AND (level) */
99 static int apci1032_reset(struct comedi_device
*dev
)
101 /* disable the interrupts */
102 outl(0x0, dev
->iobase
+ APCI1032_CTRL_REG
);
103 /* Reset the interrupt status register */
104 inl(dev
->iobase
+ APCI1032_STATUS_REG
);
105 /* Disable the and/or interrupt */
106 outl(0x0, dev
->iobase
+ APCI1032_MODE1_REG
);
107 outl(0x0, dev
->iobase
+ APCI1032_MODE2_REG
);
112 static int apci1032_cos_insn_config(struct comedi_device
*dev
,
113 struct comedi_subdevice
*s
,
114 struct comedi_insn
*insn
,
117 struct apci1032_private
*devpriv
= dev
->private;
118 unsigned int shift
, oldmask
;
121 case INSN_CONFIG_DIGITAL_TRIG
:
125 oldmask
= (1U << shift
) - 1;
127 case COMEDI_DIGITAL_TRIG_DISABLE
:
133 case COMEDI_DIGITAL_TRIG_ENABLE_EDGES
:
134 if (devpriv
->ctrl
!= (APCI1032_CTRL_INT_ENA
|
135 APCI1032_CTRL_INT_OR
)) {
136 /* switching to 'OR' mode */
137 devpriv
->ctrl
= APCI1032_CTRL_INT_ENA
|
138 APCI1032_CTRL_INT_OR
;
139 /* wipe old channels */
143 /* preserve unspecified channels */
144 devpriv
->mode1
&= oldmask
;
145 devpriv
->mode2
&= oldmask
;
147 /* configure specified channels */
148 devpriv
->mode1
|= data
[4] << shift
;
149 devpriv
->mode2
|= data
[5] << shift
;
151 case COMEDI_DIGITAL_TRIG_ENABLE_LEVELS
:
152 if (devpriv
->ctrl
!= (APCI1032_CTRL_INT_ENA
|
153 APCI1032_CTRL_INT_AND
)) {
154 /* switching to 'AND' mode */
155 devpriv
->ctrl
= APCI1032_CTRL_INT_ENA
|
156 APCI1032_CTRL_INT_AND
;
157 /* wipe old channels */
161 /* preserve unspecified channels */
162 devpriv
->mode1
&= oldmask
;
163 devpriv
->mode2
&= oldmask
;
165 /* configure specified channels */
166 devpriv
->mode1
|= data
[4] << shift
;
167 devpriv
->mode2
|= data
[5] << shift
;
180 static int apci1032_cos_insn_bits(struct comedi_device
*dev
,
181 struct comedi_subdevice
*s
,
182 struct comedi_insn
*insn
,
190 static int apci1032_cos_cmdtest(struct comedi_device
*dev
,
191 struct comedi_subdevice
*s
,
192 struct comedi_cmd
*cmd
)
196 /* Step 1 : check if triggers are trivially valid */
198 err
|= comedi_check_trigger_src(&cmd
->start_src
, TRIG_NOW
);
199 err
|= comedi_check_trigger_src(&cmd
->scan_begin_src
, TRIG_EXT
);
200 err
|= comedi_check_trigger_src(&cmd
->convert_src
, TRIG_FOLLOW
);
201 err
|= comedi_check_trigger_src(&cmd
->scan_end_src
, TRIG_COUNT
);
202 err
|= comedi_check_trigger_src(&cmd
->stop_src
, TRIG_NONE
);
207 /* Step 2a : make sure trigger sources are unique */
208 /* Step 2b : and mutually compatible */
210 /* Step 3: check if arguments are trivially valid */
212 err
|= comedi_check_trigger_arg_is(&cmd
->start_arg
, 0);
213 err
|= comedi_check_trigger_arg_is(&cmd
->scan_begin_arg
, 0);
214 err
|= comedi_check_trigger_arg_is(&cmd
->convert_arg
, 0);
215 err
|= comedi_check_trigger_arg_is(&cmd
->scan_end_arg
,
217 err
|= comedi_check_trigger_arg_is(&cmd
->stop_arg
, 0);
222 /* Step 4: fix up any arguments */
224 /* Step 5: check channel list if it exists */
230 * Change-Of-State (COS) 'do_cmd' operation
232 * Enable the COS interrupt as configured by apci1032_cos_insn_config().
234 static int apci1032_cos_cmd(struct comedi_device
*dev
,
235 struct comedi_subdevice
*s
)
237 struct apci1032_private
*devpriv
= dev
->private;
239 if (!devpriv
->ctrl
) {
240 dev_warn(dev
->class_dev
,
241 "Interrupts disabled due to mode configuration!\n");
245 outl(devpriv
->mode1
, dev
->iobase
+ APCI1032_MODE1_REG
);
246 outl(devpriv
->mode2
, dev
->iobase
+ APCI1032_MODE2_REG
);
247 outl(devpriv
->ctrl
, dev
->iobase
+ APCI1032_CTRL_REG
);
252 static int apci1032_cos_cancel(struct comedi_device
*dev
,
253 struct comedi_subdevice
*s
)
255 return apci1032_reset(dev
);
258 static irqreturn_t
apci1032_interrupt(int irq
, void *d
)
260 struct comedi_device
*dev
= d
;
261 struct apci1032_private
*devpriv
= dev
->private;
262 struct comedi_subdevice
*s
= dev
->read_subdev
;
265 /* check interrupt is from this device */
266 if ((inl(devpriv
->amcc_iobase
+ AMCC_OP_REG_INTCSR
) &
267 INTCSR_INTR_ASSERTED
) == 0)
270 /* check interrupt is enabled */
271 ctrl
= inl(dev
->iobase
+ APCI1032_CTRL_REG
);
272 if ((ctrl
& APCI1032_CTRL_INT_ENA
) == 0)
275 /* disable the interrupt */
276 outl(ctrl
& ~APCI1032_CTRL_INT_ENA
, dev
->iobase
+ APCI1032_CTRL_REG
);
278 s
->state
= inl(dev
->iobase
+ APCI1032_STATUS_REG
) & 0xffff;
279 comedi_buf_write_samples(s
, &s
->state
, 1);
280 comedi_handle_events(dev
, s
);
282 /* enable the interrupt */
283 outl(ctrl
, dev
->iobase
+ APCI1032_CTRL_REG
);
288 static int apci1032_di_insn_bits(struct comedi_device
*dev
,
289 struct comedi_subdevice
*s
,
290 struct comedi_insn
*insn
,
293 data
[1] = inl(dev
->iobase
+ APCI1032_DI_REG
);
298 static int apci1032_auto_attach(struct comedi_device
*dev
,
299 unsigned long context_unused
)
301 struct pci_dev
*pcidev
= comedi_to_pci_dev(dev
);
302 struct apci1032_private
*devpriv
;
303 struct comedi_subdevice
*s
;
306 devpriv
= comedi_alloc_devpriv(dev
, sizeof(*devpriv
));
310 ret
= comedi_pci_enable(dev
);
314 devpriv
->amcc_iobase
= pci_resource_start(pcidev
, 0);
315 dev
->iobase
= pci_resource_start(pcidev
, 1);
317 if (pcidev
->irq
> 0) {
318 ret
= request_irq(pcidev
->irq
, apci1032_interrupt
, IRQF_SHARED
,
319 dev
->board_name
, dev
);
321 dev
->irq
= pcidev
->irq
;
324 ret
= comedi_alloc_subdevices(dev
, 2);
328 /* Allocate and Initialise DI Subdevice Structures */
329 s
= &dev
->subdevices
[0];
330 s
->type
= COMEDI_SUBD_DI
;
331 s
->subdev_flags
= SDF_READABLE
;
334 s
->range_table
= &range_digital
;
335 s
->insn_bits
= apci1032_di_insn_bits
;
337 /* Change-Of-State (COS) interrupt subdevice */
338 s
= &dev
->subdevices
[1];
340 dev
->read_subdev
= s
;
341 s
->type
= COMEDI_SUBD_DI
;
342 s
->subdev_flags
= SDF_READABLE
| SDF_CMD_READ
;
345 s
->range_table
= &range_digital
;
346 s
->insn_config
= apci1032_cos_insn_config
;
347 s
->insn_bits
= apci1032_cos_insn_bits
;
349 s
->do_cmdtest
= apci1032_cos_cmdtest
;
350 s
->do_cmd
= apci1032_cos_cmd
;
351 s
->cancel
= apci1032_cos_cancel
;
353 s
->type
= COMEDI_SUBD_UNUSED
;
359 static void apci1032_detach(struct comedi_device
*dev
)
363 comedi_pci_detach(dev
);
366 static struct comedi_driver apci1032_driver
= {
367 .driver_name
= "addi_apci_1032",
368 .module
= THIS_MODULE
,
369 .auto_attach
= apci1032_auto_attach
,
370 .detach
= apci1032_detach
,
373 static int apci1032_pci_probe(struct pci_dev
*dev
,
374 const struct pci_device_id
*id
)
376 return comedi_pci_auto_config(dev
, &apci1032_driver
, id
->driver_data
);
379 static const struct pci_device_id apci1032_pci_table
[] = {
380 { PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA
, 0x1003) },
383 MODULE_DEVICE_TABLE(pci
, apci1032_pci_table
);
385 static struct pci_driver apci1032_pci_driver
= {
386 .name
= "addi_apci_1032",
387 .id_table
= apci1032_pci_table
,
388 .probe
= apci1032_pci_probe
,
389 .remove
= comedi_pci_auto_unconfig
,
391 module_comedi_pci_driver(apci1032_driver
, apci1032_pci_driver
);
393 MODULE_AUTHOR("Comedi http://www.comedi.org");
394 MODULE_DESCRIPTION("ADDI-DATA APCI-1032, 32 channel DI boards");
395 MODULE_LICENSE("GPL");