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staging: comedi: propogate error code from comedi_alloc_subdevices
[deliverable/linux.git] / drivers / staging / comedi / drivers / adl_pci9111.c
1 /*
2
3 comedi/drivers/adl_pci9111.c
4
5 Hardware driver for PCI9111 ADLink cards:
6
7 PCI-9111HR
8
9 Copyright (C) 2002-2005 Emmanuel Pacaud <emmanuel.pacaud@univ-poitiers.fr>
10
11 This program is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 2 of the License, or
14 (at your option) any later version.
15
16 This program is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 GNU General Public License for more details.
20
21 You should have received a copy of the GNU General Public License
22 along with this program; if not, write to the Free Software
23 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 */
25
26 /*
27 Driver: adl_pci9111
28 Description: Adlink PCI-9111HR
29 Author: Emmanuel Pacaud <emmanuel.pacaud@univ-poitiers.fr>
30 Devices: [ADLink] PCI-9111HR (adl_pci9111)
31 Status: experimental
32
33 Supports:
34
35 - ai_insn read
36 - ao_insn read/write
37 - di_insn read
38 - do_insn read/write
39 - ai_do_cmd mode with the following sources:
40
41 - start_src TRIG_NOW
42 - scan_begin_src TRIG_FOLLOW TRIG_TIMER TRIG_EXT
43 - convert_src TRIG_TIMER TRIG_EXT
44 - scan_end_src TRIG_COUNT
45 - stop_src TRIG_COUNT TRIG_NONE
46
47 The scanned channels must be consecutive and start from 0. They must
48 all have the same range and aref.
49
50 Configuration options:
51
52 [0] - PCI bus number (optional)
53 [1] - PCI slot number (optional)
54
55 If bus/slot is not specified, the first available PCI
56 device will be used.
57
58 */
59
60 /*
61 CHANGELOG:
62
63 2005/02/17 Extend AI streaming capabilities. Now, scan_begin_arg can be
64 a multiple of chanlist_len*convert_arg.
65 2002/02/19 Fixed the two's complement conversion in pci9111_(hr_)ai_get_data.
66 2002/02/18 Added external trigger support for analog input.
67
68 TODO:
69
70 - Really test implemented functionality.
71 - Add support for the PCI-9111DG with a probe routine to identify
72 the card type (perhaps with the help of the channel number readback
73 of the A/D Data register).
74 - Add external multiplexer support.
75
76 */
77
78 #include "../comedidev.h"
79
80 #include <linux/delay.h>
81 #include <linux/interrupt.h>
82
83 #include "8253.h"
84 #include "comedi_fc.h"
85
86 #define PCI9111_DRIVER_NAME "adl_pci9111"
87 #define PCI9111_HR_DEVICE_ID 0x9111
88
89 /* TODO: Add other pci9111 board id */
90
91 #define PCI9111_IO_RANGE 0x0100
92
93 #define PCI9111_FIFO_HALF_SIZE 512
94
95 #define PCI9111_AI_CHANNEL_NBR 16
96
97 #define PCI9111_AI_RESOLUTION 12
98 #define PCI9111_AI_RESOLUTION_MASK 0x0FFF
99 #define PCI9111_AI_RESOLUTION_2_CMP_BIT 0x0800
100
101 #define PCI9111_HR_AI_RESOLUTION 16
102 #define PCI9111_HR_AI_RESOLUTION_MASK 0xFFFF
103 #define PCI9111_HR_AI_RESOLUTION_2_CMP_BIT 0x8000
104
105 #define PCI9111_AI_ACQUISITION_PERIOD_MIN_NS 10000
106 #define PCI9111_AO_CHANNEL_NBR 1
107 #define PCI9111_AO_RESOLUTION 12
108 #define PCI9111_AO_RESOLUTION_MASK 0x0FFF
109 #define PCI9111_DI_CHANNEL_NBR 16
110 #define PCI9111_DO_CHANNEL_NBR 16
111 #define PCI9111_DO_MASK 0xFFFF
112
113 #define PCI9111_RANGE_SETTING_DELAY 10
114 #define PCI9111_AI_INSTANT_READ_UDELAY_US 2
115 #define PCI9111_AI_INSTANT_READ_TIMEOUT 100
116
117 #define PCI9111_8254_CLOCK_PERIOD_NS 500
118
119 #define PCI9111_8254_COUNTER_0 0x00
120 #define PCI9111_8254_COUNTER_1 0x40
121 #define PCI9111_8254_COUNTER_2 0x80
122 #define PCI9111_8254_COUNTER_LATCH 0x00
123 #define PCI9111_8254_READ_LOAD_LSB_ONLY 0x10
124 #define PCI9111_8254_READ_LOAD_MSB_ONLY 0x20
125 #define PCI9111_8254_READ_LOAD_LSB_MSB 0x30
126 #define PCI9111_8254_MODE_0 0x00
127 #define PCI9111_8254_MODE_1 0x02
128 #define PCI9111_8254_MODE_2 0x04
129 #define PCI9111_8254_MODE_3 0x06
130 #define PCI9111_8254_MODE_4 0x08
131 #define PCI9111_8254_MODE_5 0x0A
132 #define PCI9111_8254_BINARY_COUNTER 0x00
133 #define PCI9111_8254_BCD_COUNTER 0x01
134
135 /* IO address map */
136
137 #define PCI9111_REGISTER_AD_FIFO_VALUE 0x00 /* AD Data stored
138 in FIFO */
139 #define PCI9111_REGISTER_DA_OUTPUT 0x00
140 #define PCI9111_REGISTER_DIGITAL_IO 0x02
141 #define PCI9111_REGISTER_EXTENDED_IO_PORTS 0x04
142 #define PCI9111_REGISTER_AD_CHANNEL_CONTROL 0x06 /* Channel
143 selection */
144 #define PCI9111_REGISTER_AD_CHANNEL_READBACK 0x06
145 #define PCI9111_REGISTER_INPUT_SIGNAL_RANGE 0x08
146 #define PCI9111_REGISTER_RANGE_STATUS_READBACK 0x08
147 #define PCI9111_REGISTER_TRIGGER_MODE_CONTROL 0x0A
148 #define PCI9111_REGISTER_AD_MODE_INTERRUPT_READBACK 0x0A
149 #define PCI9111_REGISTER_SOFTWARE_TRIGGER 0x0E
150 #define PCI9111_REGISTER_INTERRUPT_CONTROL 0x0C
151 #define PCI9111_REGISTER_8254_COUNTER_0 0x40
152 #define PCI9111_REGISTER_8254_COUNTER_1 0x42
153 #define PCI9111_REGISTER_8254_COUNTER_2 0X44
154 #define PCI9111_REGISTER_8254_CONTROL 0x46
155 #define PCI9111_REGISTER_INTERRUPT_CLEAR 0x48
156
157 #define PCI9111_TRIGGER_MASK 0x0F
158 #define PCI9111_PTRG_OFF (0 << 3)
159 #define PCI9111_PTRG_ON (1 << 3)
160 #define PCI9111_EITS_EXTERNAL (1 << 2)
161 #define PCI9111_EITS_INTERNAL (0 << 2)
162 #define PCI9111_TPST_SOFTWARE_TRIGGER (0 << 1)
163 #define PCI9111_TPST_TIMER_PACER (1 << 1)
164 #define PCI9111_ASCAN_ON (1 << 0)
165 #define PCI9111_ASCAN_OFF (0 << 0)
166
167 #define PCI9111_ISC0_SET_IRQ_ON_ENDING_OF_AD_CONVERSION (0 << 0)
168 #define PCI9111_ISC0_SET_IRQ_ON_FIFO_HALF_FULL (1 << 0)
169 #define PCI9111_ISC1_SET_IRQ_ON_TIMER_TICK (0 << 1)
170 #define PCI9111_ISC1_SET_IRQ_ON_EXT_TRG (1 << 1)
171 #define PCI9111_FFEN_SET_FIFO_ENABLE (0 << 2)
172 #define PCI9111_FFEN_SET_FIFO_DISABLE (1 << 2)
173
174 #define PCI9111_CHANNEL_MASK 0x0F
175
176 #define PCI9111_RANGE_MASK 0x07
177 #define PCI9111_FIFO_EMPTY_MASK 0x10
178 #define PCI9111_FIFO_HALF_FULL_MASK 0x20
179 #define PCI9111_FIFO_FULL_MASK 0x40
180 #define PCI9111_AD_BUSY_MASK 0x80
181
182 #define PCI9111_IO_BASE (dev->iobase)
183
184 /*
185 * Define inlined function
186 */
187
188 #define pci9111_trigger_and_autoscan_get() \
189 (inb(PCI9111_IO_BASE+PCI9111_REGISTER_AD_MODE_INTERRUPT_READBACK)&0x0F)
190
191 #define pci9111_trigger_and_autoscan_set(flags) \
192 outb(flags, PCI9111_IO_BASE+PCI9111_REGISTER_TRIGGER_MODE_CONTROL)
193
194 #define pci9111_interrupt_and_fifo_get() \
195 ((inb(PCI9111_IO_BASE+PCI9111_REGISTER_AD_MODE_INTERRUPT_READBACK) \
196 >> 4) & 0x03)
197
198 #define pci9111_interrupt_and_fifo_set(flags) \
199 outb(flags, PCI9111_IO_BASE+PCI9111_REGISTER_INTERRUPT_CONTROL)
200
201 #define pci9111_interrupt_clear() \
202 outb(0, PCI9111_IO_BASE+PCI9111_REGISTER_INTERRUPT_CLEAR)
203
204 #define pci9111_software_trigger() \
205 outb(0, PCI9111_IO_BASE+PCI9111_REGISTER_SOFTWARE_TRIGGER)
206
207 #define pci9111_fifo_reset() do { \
208 outb(PCI9111_FFEN_SET_FIFO_ENABLE, \
209 PCI9111_IO_BASE+PCI9111_REGISTER_INTERRUPT_CONTROL); \
210 outb(PCI9111_FFEN_SET_FIFO_DISABLE, \
211 PCI9111_IO_BASE+PCI9111_REGISTER_INTERRUPT_CONTROL); \
212 outb(PCI9111_FFEN_SET_FIFO_ENABLE, \
213 PCI9111_IO_BASE+PCI9111_REGISTER_INTERRUPT_CONTROL); \
214 } while (0)
215
216 #define pci9111_is_fifo_full() \
217 ((inb(PCI9111_IO_BASE+PCI9111_REGISTER_RANGE_STATUS_READBACK)& \
218 PCI9111_FIFO_FULL_MASK) == 0)
219
220 #define pci9111_is_fifo_half_full() \
221 ((inb(PCI9111_IO_BASE+PCI9111_REGISTER_RANGE_STATUS_READBACK)& \
222 PCI9111_FIFO_HALF_FULL_MASK) == 0)
223
224 #define pci9111_is_fifo_empty() \
225 ((inb(PCI9111_IO_BASE+PCI9111_REGISTER_RANGE_STATUS_READBACK)& \
226 PCI9111_FIFO_EMPTY_MASK) == 0)
227
228 #define pci9111_ai_channel_set(channel) \
229 outb((channel)&PCI9111_CHANNEL_MASK, \
230 PCI9111_IO_BASE+PCI9111_REGISTER_AD_CHANNEL_CONTROL)
231
232 #define pci9111_ai_channel_get() \
233 (inb(PCI9111_IO_BASE+PCI9111_REGISTER_AD_CHANNEL_READBACK) \
234 &PCI9111_CHANNEL_MASK)
235
236 #define pci9111_ai_range_set(range) \
237 outb((range)&PCI9111_RANGE_MASK, \
238 PCI9111_IO_BASE+PCI9111_REGISTER_INPUT_SIGNAL_RANGE)
239
240 #define pci9111_ai_range_get() \
241 (inb(PCI9111_IO_BASE+PCI9111_REGISTER_RANGE_STATUS_READBACK) \
242 &PCI9111_RANGE_MASK)
243
244 #define pci9111_ai_get_data() \
245 (((inw(PCI9111_IO_BASE+PCI9111_REGISTER_AD_FIFO_VALUE)>>4) \
246 &PCI9111_AI_RESOLUTION_MASK) \
247 ^ PCI9111_AI_RESOLUTION_2_CMP_BIT)
248
249 #define pci9111_hr_ai_get_data() \
250 ((inw(PCI9111_IO_BASE+PCI9111_REGISTER_AD_FIFO_VALUE) \
251 &PCI9111_HR_AI_RESOLUTION_MASK) \
252 ^ PCI9111_HR_AI_RESOLUTION_2_CMP_BIT)
253
254 #define pci9111_ao_set_data(data) \
255 outw(data&PCI9111_AO_RESOLUTION_MASK, \
256 PCI9111_IO_BASE+PCI9111_REGISTER_DA_OUTPUT)
257
258 #define pci9111_di_get_bits() \
259 inw(PCI9111_IO_BASE+PCI9111_REGISTER_DIGITAL_IO)
260
261 #define pci9111_do_set_bits(bits) \
262 outw(bits, PCI9111_IO_BASE+PCI9111_REGISTER_DIGITAL_IO)
263
264 #define pci9111_8254_control_set(flags) \
265 outb(flags, PCI9111_IO_BASE+PCI9111_REGISTER_8254_CONTROL)
266
267 #define pci9111_8254_counter_0_set(data) \
268 do { \
269 outb(data & 0xFF, \
270 PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_0); \
271 outb((data >> 8) & 0xFF, \
272 PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_0); \
273 } while (0)
274
275 #define pci9111_8254_counter_1_set(data) \
276 do { \
277 outb(data & 0xFF, \
278 PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_1); \
279 outb((data >> 8) & 0xFF, \
280 PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_1); \
281 } while (0)
282
283 #define pci9111_8254_counter_2_set(data) \
284 do { \
285 outb(data & 0xFF, \
286 PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_2); \
287 outb((data >> 8) & 0xFF, \
288 PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_2); \
289 } while (0)
290
291 static const struct comedi_lrange pci9111_hr_ai_range = {
292 5,
293 {
294 BIP_RANGE(10),
295 BIP_RANGE(5),
296 BIP_RANGE(2.5),
297 BIP_RANGE(1.25),
298 BIP_RANGE(0.625)
299 }
300 };
301
302 /* */
303 /* Board specification structure */
304 /* */
305
306 struct pci9111_board {
307 const char *name; /* driver name */
308 int device_id;
309 int ai_channel_nbr; /* num of A/D chans */
310 int ao_channel_nbr; /* num of D/A chans */
311 int ai_resolution; /* resolution of A/D */
312 int ai_resolution_mask;
313 int ao_resolution; /* resolution of D/A */
314 int ao_resolution_mask;
315 const struct comedi_lrange *ai_range_list; /* rangelist for A/D */
316 const struct comedi_lrange *ao_range_list; /* rangelist for D/A */
317 unsigned int ai_acquisition_period_min_ns;
318 };
319
320 static const struct pci9111_board pci9111_boards[] = {
321 {
322 .name = "pci9111_hr",
323 .device_id = PCI9111_HR_DEVICE_ID,
324 .ai_channel_nbr = PCI9111_AI_CHANNEL_NBR,
325 .ao_channel_nbr = PCI9111_AO_CHANNEL_NBR,
326 .ai_resolution = PCI9111_HR_AI_RESOLUTION,
327 .ai_resolution_mask = PCI9111_HR_AI_RESOLUTION_MASK,
328 .ao_resolution = PCI9111_AO_RESOLUTION,
329 .ao_resolution_mask = PCI9111_AO_RESOLUTION_MASK,
330 .ai_range_list = &pci9111_hr_ai_range,
331 .ao_range_list = &range_bipolar10,
332 .ai_acquisition_period_min_ns = PCI9111_AI_ACQUISITION_PERIOD_MIN_NS}
333 };
334
335 #define pci9111_board_nbr \
336 (sizeof(pci9111_boards)/sizeof(struct pci9111_board))
337
338 /* Private data structure */
339
340 struct pci9111_private_data {
341 struct pci_dev *pci_device;
342 unsigned long io_range; /* PCI6503 io range */
343
344 unsigned long lcr_io_base; /* Local configuration register base
345 * address */
346 unsigned long lcr_io_range;
347
348 int stop_counter;
349 int stop_is_none;
350
351 unsigned int scan_delay;
352 unsigned int chanlist_len;
353 unsigned int chunk_counter;
354 unsigned int chunk_num_samples;
355
356 int ao_readback; /* Last written analog output data */
357
358 unsigned int timer_divisor_1; /* Divisor values for the 8254 timer
359 * pacer */
360 unsigned int timer_divisor_2;
361
362 int is_valid; /* Is device valid */
363
364 short ai_bounce_buffer[2 * PCI9111_FIFO_HALF_SIZE];
365 };
366
367 #define dev_private ((struct pci9111_private_data *)dev->private)
368
369 /* ------------------------------------------------------------------ */
370 /* PLX9050 SECTION */
371 /* ------------------------------------------------------------------ */
372
373 #define PLX9050_REGISTER_INTERRUPT_CONTROL 0x4c
374
375 #define PLX9050_LINTI1_ENABLE (1 << 0)
376 #define PLX9050_LINTI1_ACTIVE_HIGH (1 << 1)
377 #define PLX9050_LINTI1_STATUS (1 << 2)
378 #define PLX9050_LINTI2_ENABLE (1 << 3)
379 #define PLX9050_LINTI2_ACTIVE_HIGH (1 << 4)
380 #define PLX9050_LINTI2_STATUS (1 << 5)
381 #define PLX9050_PCI_INTERRUPT_ENABLE (1 << 6)
382 #define PLX9050_SOFTWARE_INTERRUPT (1 << 7)
383
384 static void plx9050_interrupt_control(unsigned long io_base,
385 bool LINTi1_enable,
386 bool LINTi1_active_high,
387 bool LINTi2_enable,
388 bool LINTi2_active_high,
389 bool interrupt_enable)
390 {
391 int flags = 0;
392
393 if (LINTi1_enable)
394 flags |= PLX9050_LINTI1_ENABLE;
395 if (LINTi1_active_high)
396 flags |= PLX9050_LINTI1_ACTIVE_HIGH;
397 if (LINTi2_enable)
398 flags |= PLX9050_LINTI2_ENABLE;
399 if (LINTi2_active_high)
400 flags |= PLX9050_LINTI2_ACTIVE_HIGH;
401
402 if (interrupt_enable)
403 flags |= PLX9050_PCI_INTERRUPT_ENABLE;
404
405 outb(flags, io_base + PLX9050_REGISTER_INTERRUPT_CONTROL);
406 }
407
408 /* ------------------------------------------------------------------ */
409 /* MISCELLANEOUS SECTION */
410 /* ------------------------------------------------------------------ */
411
412 /* 8254 timer */
413
414 static void pci9111_timer_set(struct comedi_device *dev)
415 {
416 pci9111_8254_control_set(PCI9111_8254_COUNTER_0 |
417 PCI9111_8254_READ_LOAD_LSB_MSB |
418 PCI9111_8254_MODE_0 |
419 PCI9111_8254_BINARY_COUNTER);
420
421 pci9111_8254_control_set(PCI9111_8254_COUNTER_1 |
422 PCI9111_8254_READ_LOAD_LSB_MSB |
423 PCI9111_8254_MODE_2 |
424 PCI9111_8254_BINARY_COUNTER);
425
426 pci9111_8254_control_set(PCI9111_8254_COUNTER_2 |
427 PCI9111_8254_READ_LOAD_LSB_MSB |
428 PCI9111_8254_MODE_2 |
429 PCI9111_8254_BINARY_COUNTER);
430
431 udelay(1);
432
433 pci9111_8254_counter_2_set(dev_private->timer_divisor_2);
434 pci9111_8254_counter_1_set(dev_private->timer_divisor_1);
435 }
436
437 enum pci9111_trigger_sources {
438 software,
439 timer_pacer,
440 external
441 };
442
443 static void pci9111_trigger_source_set(struct comedi_device *dev,
444 enum pci9111_trigger_sources source)
445 {
446 int flags;
447
448 flags = pci9111_trigger_and_autoscan_get() & 0x09;
449
450 switch (source) {
451 case software:
452 flags |= PCI9111_EITS_INTERNAL | PCI9111_TPST_SOFTWARE_TRIGGER;
453 break;
454
455 case timer_pacer:
456 flags |= PCI9111_EITS_INTERNAL | PCI9111_TPST_TIMER_PACER;
457 break;
458
459 case external:
460 flags |= PCI9111_EITS_EXTERNAL;
461 break;
462 }
463
464 pci9111_trigger_and_autoscan_set(flags);
465 }
466
467 static void pci9111_pretrigger_set(struct comedi_device *dev, bool pretrigger)
468 {
469 int flags;
470
471 flags = pci9111_trigger_and_autoscan_get() & 0x07;
472
473 if (pretrigger)
474 flags |= PCI9111_PTRG_ON;
475
476 pci9111_trigger_and_autoscan_set(flags);
477 }
478
479 static void pci9111_autoscan_set(struct comedi_device *dev, bool autoscan)
480 {
481 int flags;
482
483 flags = pci9111_trigger_and_autoscan_get() & 0x0e;
484
485 if (autoscan)
486 flags |= PCI9111_ASCAN_ON;
487
488 pci9111_trigger_and_autoscan_set(flags);
489 }
490
491 enum pci9111_ISC0_sources {
492 irq_on_eoc,
493 irq_on_fifo_half_full
494 };
495
496 enum pci9111_ISC1_sources {
497 irq_on_timer_tick,
498 irq_on_external_trigger
499 };
500
501 static void pci9111_interrupt_source_set(struct comedi_device *dev,
502 enum pci9111_ISC0_sources irq_0_source,
503 enum pci9111_ISC1_sources irq_1_source)
504 {
505 int flags;
506
507 flags = pci9111_interrupt_and_fifo_get() & 0x04;
508
509 if (irq_0_source == irq_on_fifo_half_full)
510 flags |= PCI9111_ISC0_SET_IRQ_ON_FIFO_HALF_FULL;
511
512 if (irq_1_source == irq_on_external_trigger)
513 flags |= PCI9111_ISC1_SET_IRQ_ON_EXT_TRG;
514
515 pci9111_interrupt_and_fifo_set(flags);
516 }
517
518 /* ------------------------------------------------------------------ */
519 /* HARDWARE TRIGGERED ANALOG INPUT SECTION */
520 /* ------------------------------------------------------------------ */
521
522 /* Cancel analog input autoscan */
523
524 #undef AI_DO_CMD_DEBUG
525
526 static int pci9111_ai_cancel(struct comedi_device *dev,
527 struct comedi_subdevice *s)
528 {
529 /* Disable interrupts */
530
531 plx9050_interrupt_control(dev_private->lcr_io_base, true, true, true,
532 true, false);
533
534 pci9111_trigger_source_set(dev, software);
535
536 pci9111_autoscan_set(dev, false);
537
538 pci9111_fifo_reset();
539
540 #ifdef AI_DO_CMD_DEBUG
541 printk(PCI9111_DRIVER_NAME ": ai_cancel\n");
542 #endif
543
544 return 0;
545 }
546
547 /* Test analog input command */
548
549 #define pci9111_check_trigger_src(src, flags) do { \
550 tmp = src; \
551 src &= flags; \
552 if (!src || tmp != src) \
553 error++; \
554 } while (false);
555
556 static int
557 pci9111_ai_do_cmd_test(struct comedi_device *dev,
558 struct comedi_subdevice *s, struct comedi_cmd *cmd)
559 {
560 int tmp;
561 int error = 0;
562 int range, reference;
563 int i;
564 struct pci9111_board *board = (struct pci9111_board *)dev->board_ptr;
565
566 /* Step 1 : check if trigger are trivialy valid */
567
568 pci9111_check_trigger_src(cmd->start_src, TRIG_NOW);
569 pci9111_check_trigger_src(cmd->scan_begin_src,
570 TRIG_TIMER | TRIG_FOLLOW | TRIG_EXT);
571 pci9111_check_trigger_src(cmd->convert_src, TRIG_TIMER | TRIG_EXT);
572 pci9111_check_trigger_src(cmd->scan_end_src, TRIG_COUNT);
573 pci9111_check_trigger_src(cmd->stop_src, TRIG_COUNT | TRIG_NONE);
574
575 if (error)
576 return 1;
577
578 /* step 2 : make sure trigger sources are unique and mutually
579 * compatible */
580
581 if (cmd->start_src != TRIG_NOW)
582 error++;
583
584 if ((cmd->scan_begin_src != TRIG_TIMER) &&
585 (cmd->scan_begin_src != TRIG_FOLLOW) &&
586 (cmd->scan_begin_src != TRIG_EXT))
587 error++;
588
589 if ((cmd->convert_src != TRIG_TIMER) && (cmd->convert_src != TRIG_EXT))
590 error++;
591 if ((cmd->convert_src == TRIG_TIMER) &&
592 !((cmd->scan_begin_src == TRIG_TIMER) ||
593 (cmd->scan_begin_src == TRIG_FOLLOW)))
594 error++;
595 if ((cmd->convert_src == TRIG_EXT) &&
596 !((cmd->scan_begin_src == TRIG_EXT) ||
597 (cmd->scan_begin_src == TRIG_FOLLOW)))
598 error++;
599
600
601 if (cmd->scan_end_src != TRIG_COUNT)
602 error++;
603 if ((cmd->stop_src != TRIG_COUNT) && (cmd->stop_src != TRIG_NONE))
604 error++;
605
606 if (error)
607 return 2;
608
609 /* Step 3 : make sure arguments are trivialy compatible */
610
611 if (cmd->chanlist_len < 1) {
612 cmd->chanlist_len = 1;
613 error++;
614 }
615
616 if (cmd->chanlist_len > board->ai_channel_nbr) {
617 cmd->chanlist_len = board->ai_channel_nbr;
618 error++;
619 }
620
621 if ((cmd->start_src == TRIG_NOW) && (cmd->start_arg != 0)) {
622 cmd->start_arg = 0;
623 error++;
624 }
625
626 if ((cmd->convert_src == TRIG_TIMER) &&
627 (cmd->convert_arg < board->ai_acquisition_period_min_ns)) {
628 cmd->convert_arg = board->ai_acquisition_period_min_ns;
629 error++;
630 }
631 if ((cmd->convert_src == TRIG_EXT) && (cmd->convert_arg != 0)) {
632 cmd->convert_arg = 0;
633 error++;
634 }
635
636 if ((cmd->scan_begin_src == TRIG_TIMER) &&
637 (cmd->scan_begin_arg < board->ai_acquisition_period_min_ns)) {
638 cmd->scan_begin_arg = board->ai_acquisition_period_min_ns;
639 error++;
640 }
641 if ((cmd->scan_begin_src == TRIG_FOLLOW)
642 && (cmd->scan_begin_arg != 0)) {
643 cmd->scan_begin_arg = 0;
644 error++;
645 }
646 if ((cmd->scan_begin_src == TRIG_EXT) && (cmd->scan_begin_arg != 0)) {
647 cmd->scan_begin_arg = 0;
648 error++;
649 }
650
651 if ((cmd->scan_end_src == TRIG_COUNT) &&
652 (cmd->scan_end_arg != cmd->chanlist_len)) {
653 cmd->scan_end_arg = cmd->chanlist_len;
654 error++;
655 }
656
657 if ((cmd->stop_src == TRIG_COUNT) && (cmd->stop_arg < 1)) {
658 cmd->stop_arg = 1;
659 error++;
660 }
661 if ((cmd->stop_src == TRIG_NONE) && (cmd->stop_arg != 0)) {
662 cmd->stop_arg = 0;
663 error++;
664 }
665
666 if (error)
667 return 3;
668
669 /* Step 4 : fix up any arguments */
670
671 if (cmd->convert_src == TRIG_TIMER) {
672 tmp = cmd->convert_arg;
673 i8253_cascade_ns_to_timer_2div(PCI9111_8254_CLOCK_PERIOD_NS,
674 &(dev_private->timer_divisor_1),
675 &(dev_private->timer_divisor_2),
676 &(cmd->convert_arg),
677 cmd->flags & TRIG_ROUND_MASK);
678 if (tmp != cmd->convert_arg)
679 error++;
680 }
681 /* There's only one timer on this card, so the scan_begin timer must */
682 /* be a multiple of chanlist_len*convert_arg */
683
684 if (cmd->scan_begin_src == TRIG_TIMER) {
685
686 unsigned int scan_begin_min;
687 unsigned int scan_begin_arg;
688 unsigned int scan_factor;
689
690 scan_begin_min = cmd->chanlist_len * cmd->convert_arg;
691
692 if (cmd->scan_begin_arg != scan_begin_min) {
693 if (scan_begin_min < cmd->scan_begin_arg) {
694 scan_factor =
695 cmd->scan_begin_arg / scan_begin_min;
696 scan_begin_arg = scan_factor * scan_begin_min;
697 if (cmd->scan_begin_arg != scan_begin_arg) {
698 cmd->scan_begin_arg = scan_begin_arg;
699 error++;
700 }
701 } else {
702 cmd->scan_begin_arg = scan_begin_min;
703 error++;
704 }
705 }
706 }
707
708 if (error)
709 return 4;
710
711 /* Step 5 : check channel list */
712
713 if (cmd->chanlist) {
714
715 range = CR_RANGE(cmd->chanlist[0]);
716 reference = CR_AREF(cmd->chanlist[0]);
717
718 if (cmd->chanlist_len > 1) {
719 for (i = 0; i < cmd->chanlist_len; i++) {
720 if (CR_CHAN(cmd->chanlist[i]) != i) {
721 comedi_error(dev,
722 "entries in chanlist must be consecutive "
723 "channels,counting upwards from 0\n");
724 error++;
725 }
726 if (CR_RANGE(cmd->chanlist[i]) != range) {
727 comedi_error(dev,
728 "entries in chanlist must all have the same gain\n");
729 error++;
730 }
731 if (CR_AREF(cmd->chanlist[i]) != reference) {
732 comedi_error(dev,
733 "entries in chanlist must all have the same reference\n");
734 error++;
735 }
736 }
737 } else {
738 if ((CR_CHAN(cmd->chanlist[0]) >
739 (board->ai_channel_nbr - 1))
740 || (CR_CHAN(cmd->chanlist[0]) < 0)) {
741 comedi_error(dev,
742 "channel number is out of limits\n");
743 error++;
744 }
745 }
746 }
747
748 if (error)
749 return 5;
750
751 return 0;
752
753 }
754
755 /* Analog input command */
756
757 static int pci9111_ai_do_cmd(struct comedi_device *dev,
758 struct comedi_subdevice *subdevice)
759 {
760 struct comedi_cmd *async_cmd = &subdevice->async->cmd;
761
762 if (!dev->irq) {
763 comedi_error(dev,
764 "no irq assigned for PCI9111, cannot do hardware conversion");
765 return -1;
766 }
767 /* Set channel scan limit */
768 /* PCI9111 allows only scanning from channel 0 to channel n */
769 /* TODO: handle the case of an external multiplexer */
770
771 if (async_cmd->chanlist_len > 1) {
772 pci9111_ai_channel_set((async_cmd->chanlist_len) - 1);
773 pci9111_autoscan_set(dev, true);
774 } else {
775 pci9111_ai_channel_set(CR_CHAN(async_cmd->chanlist[0]));
776 pci9111_autoscan_set(dev, false);
777 }
778
779 /* Set gain */
780 /* This is the same gain on every channel */
781
782 pci9111_ai_range_set(CR_RANGE(async_cmd->chanlist[0]));
783
784 /* Set counter */
785
786 switch (async_cmd->stop_src) {
787 case TRIG_COUNT:
788 dev_private->stop_counter =
789 async_cmd->stop_arg * async_cmd->chanlist_len;
790 dev_private->stop_is_none = 0;
791 break;
792
793 case TRIG_NONE:
794 dev_private->stop_counter = 0;
795 dev_private->stop_is_none = 1;
796 break;
797
798 default:
799 comedi_error(dev, "Invalid stop trigger");
800 return -1;
801 }
802
803 /* Set timer pacer */
804
805 dev_private->scan_delay = 0;
806 switch (async_cmd->convert_src) {
807 case TRIG_TIMER:
808 i8253_cascade_ns_to_timer_2div(PCI9111_8254_CLOCK_PERIOD_NS,
809 &(dev_private->timer_divisor_1),
810 &(dev_private->timer_divisor_2),
811 &(async_cmd->convert_arg),
812 async_cmd->
813 flags & TRIG_ROUND_MASK);
814 #ifdef AI_DO_CMD_DEBUG
815 printk(PCI9111_DRIVER_NAME ": divisors = %d, %d\n",
816 dev_private->timer_divisor_1,
817 dev_private->timer_divisor_2);
818 #endif
819
820 pci9111_trigger_source_set(dev, software);
821 pci9111_timer_set(dev);
822 pci9111_fifo_reset();
823 pci9111_interrupt_source_set(dev, irq_on_fifo_half_full,
824 irq_on_timer_tick);
825 pci9111_trigger_source_set(dev, timer_pacer);
826 plx9050_interrupt_control(dev_private->lcr_io_base, true, true,
827 false, true, true);
828
829 if (async_cmd->scan_begin_src == TRIG_TIMER) {
830 dev_private->scan_delay =
831 (async_cmd->scan_begin_arg /
832 (async_cmd->convert_arg *
833 async_cmd->chanlist_len)) - 1;
834 }
835
836 break;
837
838 case TRIG_EXT:
839
840 pci9111_trigger_source_set(dev, external);
841 pci9111_fifo_reset();
842 pci9111_interrupt_source_set(dev, irq_on_fifo_half_full,
843 irq_on_timer_tick);
844 plx9050_interrupt_control(dev_private->lcr_io_base, true, true,
845 false, true, true);
846
847 break;
848
849 default:
850 comedi_error(dev, "Invalid convert trigger");
851 return -1;
852 }
853
854 dev_private->stop_counter *= (1 + dev_private->scan_delay);
855 dev_private->chanlist_len = async_cmd->chanlist_len;
856 dev_private->chunk_counter = 0;
857 dev_private->chunk_num_samples =
858 dev_private->chanlist_len * (1 + dev_private->scan_delay);
859
860 #ifdef AI_DO_CMD_DEBUG
861 printk(PCI9111_DRIVER_NAME ": start interruptions!\n");
862 printk(PCI9111_DRIVER_NAME ": trigger source = %2x\n",
863 pci9111_trigger_and_autoscan_get());
864 printk(PCI9111_DRIVER_NAME ": irq source = %2x\n",
865 pci9111_interrupt_and_fifo_get());
866 printk(PCI9111_DRIVER_NAME ": ai_do_cmd\n");
867 printk(PCI9111_DRIVER_NAME ": stop counter = %d\n",
868 dev_private->stop_counter);
869 printk(PCI9111_DRIVER_NAME ": scan delay = %d\n",
870 dev_private->scan_delay);
871 printk(PCI9111_DRIVER_NAME ": chanlist_len = %d\n",
872 dev_private->chanlist_len);
873 printk(PCI9111_DRIVER_NAME ": chunk num samples = %d\n",
874 dev_private->chunk_num_samples);
875 #endif
876
877 return 0;
878 }
879
880 static void pci9111_ai_munge(struct comedi_device *dev,
881 struct comedi_subdevice *s, void *data,
882 unsigned int num_bytes,
883 unsigned int start_chan_index)
884 {
885 unsigned int i, num_samples = num_bytes / sizeof(short);
886 short *array = data;
887 int resolution =
888 ((struct pci9111_board *)dev->board_ptr)->ai_resolution;
889
890 for (i = 0; i < num_samples; i++) {
891 if (resolution == PCI9111_HR_AI_RESOLUTION)
892 array[i] =
893 (array[i] & PCI9111_HR_AI_RESOLUTION_MASK) ^
894 PCI9111_HR_AI_RESOLUTION_2_CMP_BIT;
895 else
896 array[i] =
897 ((array[i] >> 4) & PCI9111_AI_RESOLUTION_MASK) ^
898 PCI9111_AI_RESOLUTION_2_CMP_BIT;
899 }
900 }
901
902 /* ------------------------------------------------------------------ */
903 /* INTERRUPT SECTION */
904 /* ------------------------------------------------------------------ */
905
906 #undef INTERRUPT_DEBUG
907
908 static irqreturn_t pci9111_interrupt(int irq, void *p_device)
909 {
910 struct comedi_device *dev = p_device;
911 struct comedi_subdevice *subdevice = dev->read_subdev;
912 struct comedi_async *async;
913 unsigned long irq_flags;
914 unsigned char intcsr;
915
916 if (!dev->attached) {
917 /* Ignore interrupt before device fully attached. */
918 /* Might not even have allocated subdevices yet! */
919 return IRQ_NONE;
920 }
921
922 async = subdevice->async;
923
924 spin_lock_irqsave(&dev->spinlock, irq_flags);
925
926 /* Check if we are source of interrupt */
927 intcsr = inb(dev_private->lcr_io_base +
928 PLX9050_REGISTER_INTERRUPT_CONTROL);
929 if (!(((intcsr & PLX9050_PCI_INTERRUPT_ENABLE) != 0)
930 && (((intcsr & (PLX9050_LINTI1_ENABLE | PLX9050_LINTI1_STATUS))
931 == (PLX9050_LINTI1_ENABLE | PLX9050_LINTI1_STATUS))
932 || ((intcsr & (PLX9050_LINTI2_ENABLE | PLX9050_LINTI2_STATUS))
933 == (PLX9050_LINTI2_ENABLE | PLX9050_LINTI2_STATUS))))) {
934 /* Not the source of the interrupt. */
935 /* (N.B. not using PLX9050_SOFTWARE_INTERRUPT) */
936 spin_unlock_irqrestore(&dev->spinlock, irq_flags);
937 return IRQ_NONE;
938 }
939
940 if ((intcsr & (PLX9050_LINTI1_ENABLE | PLX9050_LINTI1_STATUS)) ==
941 (PLX9050_LINTI1_ENABLE | PLX9050_LINTI1_STATUS)) {
942 /* Interrupt comes from fifo_half-full signal */
943
944 if (pci9111_is_fifo_full()) {
945 spin_unlock_irqrestore(&dev->spinlock, irq_flags);
946 comedi_error(dev, PCI9111_DRIVER_NAME " fifo overflow");
947 pci9111_interrupt_clear();
948 pci9111_ai_cancel(dev, subdevice);
949 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
950 comedi_event(dev, subdevice);
951
952 return IRQ_HANDLED;
953 }
954
955 if (pci9111_is_fifo_half_full()) {
956 unsigned int num_samples;
957 unsigned int bytes_written = 0;
958
959 #ifdef INTERRUPT_DEBUG
960 printk(PCI9111_DRIVER_NAME ": fifo is half full\n");
961 #endif
962
963 num_samples =
964 PCI9111_FIFO_HALF_SIZE >
965 dev_private->stop_counter
966 && !dev_private->
967 stop_is_none ? dev_private->stop_counter :
968 PCI9111_FIFO_HALF_SIZE;
969 insw(PCI9111_IO_BASE + PCI9111_REGISTER_AD_FIFO_VALUE,
970 dev_private->ai_bounce_buffer, num_samples);
971
972 if (dev_private->scan_delay < 1) {
973 bytes_written =
974 cfc_write_array_to_buffer(subdevice,
975 dev_private->
976 ai_bounce_buffer,
977 num_samples *
978 sizeof(short));
979 } else {
980 int position = 0;
981 int to_read;
982
983 while (position < num_samples) {
984 if (dev_private->chunk_counter <
985 dev_private->chanlist_len) {
986 to_read =
987 dev_private->chanlist_len -
988 dev_private->chunk_counter;
989
990 if (to_read >
991 num_samples - position)
992 to_read =
993 num_samples -
994 position;
995
996 bytes_written +=
997 cfc_write_array_to_buffer
998 (subdevice,
999 dev_private->ai_bounce_buffer
1000 + position,
1001 to_read * sizeof(short));
1002 } else {
1003 to_read =
1004 dev_private->chunk_num_samples
1005 -
1006 dev_private->chunk_counter;
1007 if (to_read >
1008 num_samples - position)
1009 to_read =
1010 num_samples -
1011 position;
1012
1013 bytes_written +=
1014 sizeof(short) * to_read;
1015 }
1016
1017 position += to_read;
1018 dev_private->chunk_counter += to_read;
1019
1020 if (dev_private->chunk_counter >=
1021 dev_private->chunk_num_samples)
1022 dev_private->chunk_counter = 0;
1023 }
1024 }
1025
1026 dev_private->stop_counter -=
1027 bytes_written / sizeof(short);
1028 }
1029 }
1030
1031 if ((dev_private->stop_counter == 0) && (!dev_private->stop_is_none)) {
1032 async->events |= COMEDI_CB_EOA;
1033 pci9111_ai_cancel(dev, subdevice);
1034 }
1035
1036 /* Very important, otherwise another interrupt request will be inserted
1037 * and will cause driver hangs on processing interrupt event. */
1038
1039 pci9111_interrupt_clear();
1040
1041 spin_unlock_irqrestore(&dev->spinlock, irq_flags);
1042
1043 comedi_event(dev, subdevice);
1044
1045 return IRQ_HANDLED;
1046 }
1047
1048 /* ------------------------------------------------------------------ */
1049 /* INSTANT ANALOG INPUT OUTPUT SECTION */
1050 /* ------------------------------------------------------------------ */
1051
1052 /* analog instant input */
1053
1054 #undef AI_INSN_DEBUG
1055
1056 static int pci9111_ai_insn_read(struct comedi_device *dev,
1057 struct comedi_subdevice *subdevice,
1058 struct comedi_insn *insn, unsigned int *data)
1059 {
1060 int resolution =
1061 ((struct pci9111_board *)dev->board_ptr)->ai_resolution;
1062
1063 int timeout, i;
1064
1065 #ifdef AI_INSN_DEBUG
1066 printk(PCI9111_DRIVER_NAME ": ai_insn set c/r/n = %2x/%2x/%2x\n",
1067 CR_CHAN((&insn->chanspec)[0]),
1068 CR_RANGE((&insn->chanspec)[0]), insn->n);
1069 #endif
1070
1071 pci9111_ai_channel_set(CR_CHAN((&insn->chanspec)[0]));
1072
1073 if ((pci9111_ai_range_get()) != CR_RANGE((&insn->chanspec)[0]))
1074 pci9111_ai_range_set(CR_RANGE((&insn->chanspec)[0]));
1075
1076 pci9111_fifo_reset();
1077
1078 for (i = 0; i < insn->n; i++) {
1079 pci9111_software_trigger();
1080
1081 timeout = PCI9111_AI_INSTANT_READ_TIMEOUT;
1082
1083 while (timeout--) {
1084 if (!pci9111_is_fifo_empty())
1085 goto conversion_done;
1086 }
1087
1088 comedi_error(dev, "A/D read timeout");
1089 data[i] = 0;
1090 pci9111_fifo_reset();
1091 return -ETIME;
1092
1093 conversion_done:
1094
1095 if (resolution == PCI9111_HR_AI_RESOLUTION)
1096 data[i] = pci9111_hr_ai_get_data();
1097 else
1098 data[i] = pci9111_ai_get_data();
1099 }
1100
1101 #ifdef AI_INSN_DEBUG
1102 printk(PCI9111_DRIVER_NAME ": ai_insn get c/r/t = %2x/%2x/%2x\n",
1103 pci9111_ai_channel_get(),
1104 pci9111_ai_range_get(), pci9111_trigger_and_autoscan_get());
1105 #endif
1106
1107 return i;
1108 }
1109
1110 /* Analog instant output */
1111
1112 static int
1113 pci9111_ao_insn_write(struct comedi_device *dev,
1114 struct comedi_subdevice *s, struct comedi_insn *insn,
1115 unsigned int *data)
1116 {
1117 int i;
1118
1119 for (i = 0; i < insn->n; i++) {
1120 pci9111_ao_set_data(data[i]);
1121 dev_private->ao_readback = data[i];
1122 }
1123
1124 return i;
1125 }
1126
1127 /* Analog output readback */
1128
1129 static int pci9111_ao_insn_read(struct comedi_device *dev,
1130 struct comedi_subdevice *s,
1131 struct comedi_insn *insn, unsigned int *data)
1132 {
1133 int i;
1134
1135 for (i = 0; i < insn->n; i++)
1136 data[i] = dev_private->ao_readback & PCI9111_AO_RESOLUTION_MASK;
1137
1138 return i;
1139 }
1140
1141 /* ------------------------------------------------------------------ */
1142 /* DIGITAL INPUT OUTPUT SECTION */
1143 /* ------------------------------------------------------------------ */
1144
1145 /* Digital inputs */
1146
1147 static int pci9111_di_insn_bits(struct comedi_device *dev,
1148 struct comedi_subdevice *subdevice,
1149 struct comedi_insn *insn, unsigned int *data)
1150 {
1151 unsigned int bits;
1152
1153 bits = pci9111_di_get_bits();
1154 data[1] = bits;
1155
1156 return 2;
1157 }
1158
1159 /* Digital outputs */
1160
1161 static int pci9111_do_insn_bits(struct comedi_device *dev,
1162 struct comedi_subdevice *subdevice,
1163 struct comedi_insn *insn, unsigned int *data)
1164 {
1165 unsigned int bits;
1166
1167 /* Only set bits that have been masked */
1168 /* data[0] = mask */
1169 /* data[1] = bit state */
1170
1171 data[0] &= PCI9111_DO_MASK;
1172
1173 bits = subdevice->state;
1174 bits &= ~data[0];
1175 bits |= data[0] & data[1];
1176 subdevice->state = bits;
1177
1178 pci9111_do_set_bits(bits);
1179
1180 data[1] = bits;
1181
1182 return 2;
1183 }
1184
1185 /* ------------------------------------------------------------------ */
1186 /* INITIALISATION SECTION */
1187 /* ------------------------------------------------------------------ */
1188
1189 /* Reset device */
1190
1191 static int pci9111_reset(struct comedi_device *dev)
1192 {
1193 /* Set trigger source to software */
1194
1195 plx9050_interrupt_control(dev_private->lcr_io_base, true, true, true,
1196 true, false);
1197
1198 pci9111_trigger_source_set(dev, software);
1199 pci9111_pretrigger_set(dev, false);
1200 pci9111_autoscan_set(dev, false);
1201
1202 /* Reset 8254 chip */
1203
1204 dev_private->timer_divisor_1 = 0;
1205 dev_private->timer_divisor_2 = 0;
1206
1207 pci9111_timer_set(dev);
1208
1209 return 0;
1210 }
1211
1212 static struct pci_dev *pci9111_find_pci(struct comedi_device *dev,
1213 struct comedi_devconfig *it)
1214 {
1215 struct pci_dev *pcidev = NULL;
1216 int bus = it->options[0];
1217 int slot = it->options[1];
1218 int i;
1219
1220 for_each_pci_dev(pcidev) {
1221 if (pcidev->vendor != PCI_VENDOR_ID_ADLINK)
1222 continue;
1223 for (i = 0; i < pci9111_board_nbr; i++) {
1224 if (pcidev->device != pci9111_boards[i].device_id)
1225 continue;
1226 if (bus || slot) {
1227 /* requested particular bus/slot */
1228 if (pcidev->bus->number != bus ||
1229 PCI_SLOT(pcidev->devfn) != slot)
1230 continue;
1231 }
1232 dev->board_ptr = pci9111_boards + i;
1233 printk(KERN_ERR
1234 "comedi%d: found %s (b:s:f=%d:%d:%d), irq=%d\n",
1235 dev->minor, pci9111_boards[i].name,
1236 pcidev->bus->number, PCI_SLOT(pcidev->devfn),
1237 PCI_FUNC(pcidev->devfn), pcidev->irq);
1238 return pcidev;
1239 }
1240 }
1241 printk(KERN_ERR
1242 "comedi%d: no supported board found! (req. bus/slot : %d/%d)\n",
1243 dev->minor, bus, slot);
1244 return NULL;
1245 }
1246
1247 static int pci9111_attach(struct comedi_device *dev,
1248 struct comedi_devconfig *it)
1249 {
1250 struct comedi_subdevice *subdevice;
1251 unsigned long io_base, io_range, lcr_io_base, lcr_io_range;
1252 int error;
1253 const struct pci9111_board *board;
1254
1255 if (alloc_private(dev, sizeof(struct pci9111_private_data)) < 0)
1256 return -ENOMEM;
1257 /* Probe the device to determine what device in the series it is. */
1258
1259 printk(KERN_ERR "comedi%d: " PCI9111_DRIVER_NAME " driver\n",
1260 dev->minor);
1261
1262 dev_private->pci_device = pci9111_find_pci(dev, it);
1263 if (!dev_private->pci_device)
1264 return -EIO;
1265 board = (struct pci9111_board *)dev->board_ptr;
1266
1267 /* TODO: Warn about non-tested boards. */
1268
1269 /* Read local configuration register base address
1270 * [PCI_BASE_ADDRESS #1]. */
1271
1272 lcr_io_base = pci_resource_start(dev_private->pci_device, 1);
1273 lcr_io_range = pci_resource_len(dev_private->pci_device, 1);
1274
1275 printk
1276 ("comedi%d: local configuration registers at address 0x%4lx [0x%4lx]\n",
1277 dev->minor, lcr_io_base, lcr_io_range);
1278
1279 /* Enable PCI device and request regions */
1280 if (comedi_pci_enable(dev_private->pci_device, PCI9111_DRIVER_NAME) < 0) {
1281 printk
1282 ("comedi%d: Failed to enable PCI device and request regions\n",
1283 dev->minor);
1284 return -EIO;
1285 }
1286 /* Read PCI6308 register base address [PCI_BASE_ADDRESS #2]. */
1287
1288 io_base = pci_resource_start(dev_private->pci_device, 2);
1289 io_range = pci_resource_len(dev_private->pci_device, 2);
1290
1291 printk(KERN_ERR "comedi%d: 6503 registers at address 0x%4lx [0x%4lx]\n",
1292 dev->minor, io_base, io_range);
1293
1294 dev->iobase = io_base;
1295 dev->board_name = board->name;
1296 dev_private->io_range = io_range;
1297 dev_private->is_valid = 0;
1298 dev_private->lcr_io_base = lcr_io_base;
1299 dev_private->lcr_io_range = lcr_io_range;
1300
1301 pci9111_reset(dev);
1302
1303 /* Irq setup */
1304
1305 dev->irq = 0;
1306 if (dev_private->pci_device->irq > 0) {
1307 dev->irq = dev_private->pci_device->irq;
1308
1309 if (request_irq(dev->irq, pci9111_interrupt,
1310 IRQF_SHARED, PCI9111_DRIVER_NAME, dev) != 0) {
1311 printk(KERN_ERR
1312 "comedi%d: unable to allocate irq %u\n",
1313 dev->minor, dev->irq);
1314 return -EINVAL;
1315 }
1316 }
1317
1318 /* TODO: Add external multiplexer setup (according to option[2]). */
1319
1320 error = comedi_alloc_subdevices(dev, 4);
1321 if (error)
1322 return error;
1323
1324 subdevice = dev->subdevices + 0;
1325 dev->read_subdev = subdevice;
1326
1327 subdevice->type = COMEDI_SUBD_AI;
1328 subdevice->subdev_flags = SDF_READABLE | SDF_COMMON | SDF_CMD_READ;
1329
1330 /* TODO: Add external multiplexer data */
1331 /* if (devpriv->usemux) { subdevice->n_chan = devpriv->usemux; } */
1332 /* else { subdevice->n_chan = this_board->n_aichan; } */
1333
1334 subdevice->n_chan = board->ai_channel_nbr;
1335 subdevice->maxdata = board->ai_resolution_mask;
1336 subdevice->len_chanlist = board->ai_channel_nbr;
1337 subdevice->range_table = board->ai_range_list;
1338 subdevice->cancel = pci9111_ai_cancel;
1339 subdevice->insn_read = pci9111_ai_insn_read;
1340 subdevice->do_cmdtest = pci9111_ai_do_cmd_test;
1341 subdevice->do_cmd = pci9111_ai_do_cmd;
1342 subdevice->munge = pci9111_ai_munge;
1343
1344 subdevice = dev->subdevices + 1;
1345 subdevice->type = COMEDI_SUBD_AO;
1346 subdevice->subdev_flags = SDF_WRITABLE | SDF_COMMON;
1347 subdevice->n_chan = board->ao_channel_nbr;
1348 subdevice->maxdata = board->ao_resolution_mask;
1349 subdevice->len_chanlist = board->ao_channel_nbr;
1350 subdevice->range_table = board->ao_range_list;
1351 subdevice->insn_write = pci9111_ao_insn_write;
1352 subdevice->insn_read = pci9111_ao_insn_read;
1353
1354 subdevice = dev->subdevices + 2;
1355 subdevice->type = COMEDI_SUBD_DI;
1356 subdevice->subdev_flags = SDF_READABLE;
1357 subdevice->n_chan = PCI9111_DI_CHANNEL_NBR;
1358 subdevice->maxdata = 1;
1359 subdevice->range_table = &range_digital;
1360 subdevice->insn_bits = pci9111_di_insn_bits;
1361
1362 subdevice = dev->subdevices + 3;
1363 subdevice->type = COMEDI_SUBD_DO;
1364 subdevice->subdev_flags = SDF_READABLE | SDF_WRITABLE;
1365 subdevice->n_chan = PCI9111_DO_CHANNEL_NBR;
1366 subdevice->maxdata = 1;
1367 subdevice->range_table = &range_digital;
1368 subdevice->insn_bits = pci9111_do_insn_bits;
1369
1370 dev_private->is_valid = 1;
1371
1372 return 0;
1373 }
1374
1375 static void pci9111_detach(struct comedi_device *dev)
1376 {
1377 if (dev->private != NULL) {
1378 if (dev_private->is_valid)
1379 pci9111_reset(dev);
1380 }
1381 if (dev->irq != 0)
1382 free_irq(dev->irq, dev);
1383 if (dev_private != NULL && dev_private->pci_device != NULL) {
1384 if (dev->iobase)
1385 comedi_pci_disable(dev_private->pci_device);
1386 pci_dev_put(dev_private->pci_device);
1387 }
1388 }
1389
1390 static struct comedi_driver adl_pci9111_driver = {
1391 .driver_name = "adl_pci9111",
1392 .module = THIS_MODULE,
1393 .attach = pci9111_attach,
1394 .detach = pci9111_detach,
1395 };
1396
1397 static int __devinit pci9111_pci_probe(struct pci_dev *dev,
1398 const struct pci_device_id *ent)
1399 {
1400 return comedi_pci_auto_config(dev, &adl_pci9111_driver);
1401 }
1402
1403 static void __devexit pci9111_pci_remove(struct pci_dev *dev)
1404 {
1405 comedi_pci_auto_unconfig(dev);
1406 }
1407
1408 static DEFINE_PCI_DEVICE_TABLE(pci9111_pci_table) = {
1409 { PCI_DEVICE(PCI_VENDOR_ID_ADLINK, PCI9111_HR_DEVICE_ID) },
1410 /* { PCI_DEVICE(PCI_VENDOR_ID_ADLINK, PCI9111_HG_DEVICE_ID) }, */
1411 { 0 }
1412 };
1413 MODULE_DEVICE_TABLE(pci, pci9111_pci_table);
1414
1415 static struct pci_driver adl_pci9111_pci_driver = {
1416 .name = "adl_pci9111",
1417 .id_table = pci9111_pci_table,
1418 .probe = pci9111_pci_probe,
1419 .remove = __devexit_p(pci9111_pci_remove),
1420 };
1421 module_comedi_pci_driver(adl_pci9111_driver, adl_pci9111_pci_driver);
1422
1423 MODULE_AUTHOR("Comedi http://www.comedi.org");
1424 MODULE_DESCRIPTION("Comedi low-level driver");
1425 MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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