drivers/staging/comedi/drivers/amplc_dio200.c

   1 /*
   2     comedi/drivers/amplc_dio200.c
   3
   4     Driver for Amplicon PC212E, PC214E, PC215E, PC218E, PC272E.
   5
   6     Copyright (C) 2005-2013 MEV Ltd. <http://www.mev.co.uk/>
   7
   8     COMEDI - Linux Control and Measurement Device Interface
   9     Copyright (C) 1998,2000 David A. Schleef <ds@schleef.org>
  10
  11     This program is free software; you can redistribute it and/or modify
  12     it under the terms of the GNU General Public License as published by
  13     the Free Software Foundation; either version 2 of the License, or
  14     (at your option) any later version.
  15
  16     This program is distributed in the hope that it will be useful,
  17     but WITHOUT ANY WARRANTY; without even the implied warranty of
  18     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19     GNU General Public License for more details.
  20
  21     You should have received a copy of the GNU General Public License
  22     along with this program; if not, write to the Free Software
  23     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  24
  25 */
  26 /*
  27  * Driver: amplc_dio200
  28  * Description: Amplicon 200 Series ISA Digital I/O
  29  * Author: Ian Abbott <abbotti@mev.co.uk>
  30  * Devices: [Amplicon] PC212E (pc212e), PC214E (pc214e), PC215E (pc215e),
  31  *   PC218E (pc218e), PC272E (pc272e)
  32  * Updated: Mon, 18 Mar 2013 14:40:41 +0000
  33  *
  34  * Status: works
  35  *
  36  * Configuration options:
  37  *   [0] - I/O port base address
  38  *   [1] - IRQ (optional, but commands won't work without it)
  39  *
  40  * Passing a zero for an option is the same as leaving it unspecified.
  41  *
  42  * SUBDEVICES
  43  *
  44  *                     PC212E         PC214E         PC215E
  45  *                  -------------  -------------  -------------
  46  *   Subdevices           6              4              5
  47  *    0                 PPI-X          PPI-X          PPI-X
  48  *    1                 CTR-Y1         PPI-Y          PPI-Y
  49  *    2                 CTR-Y2         CTR-Z1*        CTR-Z1
  50  *    3                 CTR-Z1       INTERRUPT*       CTR-Z2
  51  *    4                 CTR-Z2                      INTERRUPT
  52  *    5               INTERRUPT
  53  *
  54  *                     PC218E         PC272E
  55  *                  -------------  -------------
  56  *   Subdevices           7              4
  57  *    0                 CTR-X1         PPI-X
  58  *    1                 CTR-X2         PPI-Y
  59  *    2                 CTR-Y1         PPI-Z
  60  *    3                 CTR-Y2       INTERRUPT
  61  *    4                 CTR-Z1
  62  *    5                 CTR-Z2
  63  *    6               INTERRUPT
  64  *
  65  * Each PPI is a 8255 chip providing 24 DIO channels.  The DIO channels
  66  * are configurable as inputs or outputs in four groups:
  67  *
  68  *   Port A  - channels  0 to  7
  69  *   Port B  - channels  8 to 15
  70  *   Port CL - channels 16 to 19
  71  *   Port CH - channels 20 to 23
  72  *
  73  * Only mode 0 of the 8255 chips is supported.
  74  *
  75  * Each CTR is a 8254 chip providing 3 16-bit counter channels.  Each
  76  * channel is configured individually with INSN_CONFIG instructions.  The
  77  * specific type of configuration instruction is specified in data[0].
  78  * Some configuration instructions expect an additional parameter in
  79  * data[1]; others return a value in data[1].  The following configuration
  80  * instructions are supported:
  81  *
  82  *   INSN_CONFIG_SET_COUNTER_MODE.  Sets the counter channel's mode and
  83  *     BCD/binary setting specified in data[1].
  84  *
  85  *   INSN_CONFIG_8254_READ_STATUS.  Reads the status register value for the
  86  *     counter channel into data[1].
  87  *
  88  *   INSN_CONFIG_SET_CLOCK_SRC.  Sets the counter channel's clock source as
  89  *     specified in data[1] (this is a hardware-specific value).  Not
  90  *     supported on PC214E.  For the other boards, valid clock sources are
  91  *     0 to 7 as follows:
  92  *
  93  *       0.  CLK n, the counter channel's dedicated CLK input from the SK1
  94  *         connector.  (N.B. for other values, the counter channel's CLKn
  95  *         pin on the SK1 connector is an output!)
  96  *       1.  Internal 10 MHz clock.
  97  *       2.  Internal 1 MHz clock.
  98  *       3.  Internal 100 kHz clock.
  99  *       4.  Internal 10 kHz clock.
 100  *       5.  Internal 1 kHz clock.
 101  *       6.  OUT n-1, the output of counter channel n-1 (see note 1 below).
 102  *       7.  Ext Clock, the counter chip's dedicated Ext Clock input from
 103  *         the SK1 connector.  This pin is shared by all three counter
 104  *         channels on the chip.
 105  *
 106  *   INSN_CONFIG_GET_CLOCK_SRC.  Returns the counter channel's current
 107  *     clock source in data[1].  For internal clock sources, data[2] is set
 108  *     to the period in ns.
 109  *
 110  *   INSN_CONFIG_SET_GATE_SRC.  Sets the counter channel's gate source as
 111  *     specified in data[2] (this is a hardware-specific value).  Not
 112  *     supported on PC214E.  For the other boards, valid gate sources are 0
 113  *     to 7 as follows:
 114  *
 115  *       0.  VCC (internal +5V d.c.), i.e. gate permanently enabled.
 116  *       1.  GND (internal 0V d.c.), i.e. gate permanently disabled.
 117  *       2.  GAT n, the counter channel's dedicated GAT input from the SK1
 118  *         connector.  (N.B. for other values, the counter channel's GATn
 119  *         pin on the SK1 connector is an output!)
 120  *       3.  /OUT n-2, the inverted output of counter channel n-2 (see note
 121  *         2 below).
 122  *       4.  Reserved.
 123  *       5.  Reserved.
 124  *       6.  Reserved.
 125  *       7.  Reserved.
 126  *
 127  *   INSN_CONFIG_GET_GATE_SRC.  Returns the counter channel's current gate
 128  *     source in data[2].
 129  *
 130  * Clock and gate interconnection notes:
 131  *
 132  *   1.  Clock source OUT n-1 is the output of the preceding channel on the
 133  *   same counter subdevice if n > 0, or the output of channel 2 on the
 134  *   preceding counter subdevice (see note 3) if n = 0.
 135  *
 136  *   2.  Gate source /OUT n-2 is the inverted output of channel 0 on the
 137  *   same counter subdevice if n = 2, or the inverted output of channel n+1
 138  *   on the preceding counter subdevice (see note 3) if n < 2.
 139  *
 140  *   3.  The counter subdevices are connected in a ring, so the highest
 141  *   counter subdevice precedes the lowest.
 142  *
 143  * The 'INTERRUPT' subdevice pretends to be a digital input subdevice.  The
 144  * digital inputs come from the interrupt status register.  The number of
 145  * channels matches the number of interrupt sources.  The PC214E does not
 146  * have an interrupt status register; see notes on 'INTERRUPT SOURCES'
 147  * below.
 148  *
 149  * INTERRUPT SOURCES
 150  *
 151  *                     PC212E         PC214E         PC215E
 152  *                  -------------  -------------  -------------
 153  *   Sources              6              1              6
 154  *    0               PPI-X-C0       JUMPER-J5      PPI-X-C0
 155  *    1               PPI-X-C3                      PPI-X-C3
 156  *    2              CTR-Y1-OUT1                    PPI-Y-C0
 157  *    3              CTR-Y2-OUT1                    PPI-Y-C3
 158  *    4              CTR-Z1-OUT1                   CTR-Z1-OUT1
 159  *    5              CTR-Z2-OUT1                   CTR-Z2-OUT1
 160  *
 161  *                     PC218E         PC272E
 162  *                  -------------  -------------
 163  *   Sources              6              6
 164  *    0              CTR-X1-OUT1     PPI-X-C0
 165  *    1              CTR-X2-OUT1     PPI-X-C3
 166  *    2              CTR-Y1-OUT1     PPI-Y-C0
 167  *    3              CTR-Y2-OUT1     PPI-Y-C3
 168  *    4              CTR-Z1-OUT1     PPI-Z-C0
 169  *    5              CTR-Z2-OUT1     PPI-Z-C3
 170  *
 171  * When an interrupt source is enabled in the interrupt source enable
 172  * register, a rising edge on the source signal latches the corresponding
 173  * bit to 1 in the interrupt status register.
 174  *
 175  * When the interrupt status register value as a whole (actually, just the
 176  * 6 least significant bits) goes from zero to non-zero, the board will
 177  * generate an interrupt.  No further interrupts will occur until the
 178  * interrupt status register is cleared to zero.  To clear a bit to zero in
 179  * the interrupt status register, the corresponding interrupt source must
 180  * be disabled in the interrupt source enable register (there is no
 181  * separate interrupt clear register).
 182  *
 183  * The PC214E does not have an interrupt source enable register or an
 184  * interrupt status register; its 'INTERRUPT' subdevice has a single
 185  * channel and its interrupt source is selected by the position of jumper
 186  * J5.
 187  *
 188  * COMMANDS
 189  *
 190  * The driver supports a read streaming acquisition command on the
 191  * 'INTERRUPT' subdevice.  The channel list selects the interrupt sources
 192  * to be enabled.  All channels will be sampled together (convert_src ==
 193  * TRIG_NOW).  The scan begins a short time after the hardware interrupt
 194  * occurs, subject to interrupt latencies (scan_begin_src == TRIG_EXT,
 195  * scan_begin_arg == 0).  The value read from the interrupt status register
 196  * is packed into a short value, one bit per requested channel, in the
 197  * order they appear in the channel list.
 198  */
 199
 200 #include <linux/slab.h>
 201
 202 #include "../comedidev.h"
 203
 204 #include "amplc_dio200.h"
 205
 206 /*
 207  * Board descriptions.
 208  */
 209 static const struct dio200_board dio200_isa_boards[] = {
 210         {
 211                 .name = "pc212e",
 212                 .bustype = isa_bustype,
 213                 .mainsize = DIO200_IO_SIZE,
 214                 .layout = {
 215                         .n_subdevs = 6,
 216                         .sdtype = {sd_8255, sd_8254, sd_8254, sd_8254, sd_8254,
 217                                    sd_intr},
 218                         .sdinfo = {0x00, 0x08, 0x0C, 0x10, 0x14, 0x3F},
 219                         .has_int_sce = true,
 220                         .has_clk_gat_sce = true,
 221                 },
 222         },
 223         {
 224                 .name = "pc214e",
 225                 .bustype = isa_bustype,
 226                 .mainsize = DIO200_IO_SIZE,
 227                 .layout = {
 228                         .n_subdevs = 4,
 229                         .sdtype = {sd_8255, sd_8255, sd_8254, sd_intr},
 230                         .sdinfo = {0x00, 0x08, 0x10, 0x01},
 231                 },
 232         },
 233         {
 234                 .name = "pc215e",
 235                 .bustype = isa_bustype,
 236                 .mainsize = DIO200_IO_SIZE,
 237                 .layout = {
 238                         .n_subdevs = 5,
 239                         .sdtype = {sd_8255, sd_8255, sd_8254, sd_8254, sd_intr},
 240                         .sdinfo = {0x00, 0x08, 0x10, 0x14, 0x3F},
 241                         .has_int_sce = true,
 242                         .has_clk_gat_sce = true,
 243                 },
 244         },
 245         {
 246                 .name = "pc218e",
 247                 .bustype = isa_bustype,
 248                 .mainsize = DIO200_IO_SIZE,
 249                 .layout = {
 250                         .n_subdevs = 7,
 251                         .sdtype = {sd_8254, sd_8254, sd_8255, sd_8254, sd_8254,
 252                                    sd_intr},
 253                         .sdinfo = {0x00, 0x04, 0x08, 0x0C, 0x10, 0x14, 0x3F},
 254                         .has_int_sce = true,
 255                         .has_clk_gat_sce = true,
 256                 },
 257         },
 258         {
 259                 .name = "pc272e",
 260                 .bustype = isa_bustype,
 261                 .mainsize = DIO200_IO_SIZE,
 262                 .layout = {
 263                         .n_subdevs = 4,
 264                         .sdtype = {sd_8255, sd_8255, sd_8255, sd_intr},
 265                         .sdinfo = {0x00, 0x08, 0x10, 0x3F},
 266                         .has_int_sce = true,
 267                 },
 268         },
 269 };
 270
 271 /*
 272  * This function checks and requests an I/O region, reporting an error
 273  * if there is a conflict.
 274  */
 275 static int
 276 dio200_request_region(struct comedi_device *dev,
 277                       unsigned long from, unsigned long extent)
 278 {
 279         if (!from || !request_region(from, extent, dev->board_name)) {
 280                 dev_err(dev->class_dev, "I/O port conflict (%#lx,%lu)!\n",
 281                         from, extent);
 282                 return -EIO;
 283         }
 284         return 0;
 285 }
 286
 287 static int dio200_attach(struct comedi_device *dev, struct comedi_devconfig *it)
 288 {
 289         const struct dio200_board *thisboard = comedi_board(dev);
 290         struct dio200_private *devpriv;
 291         unsigned long iobase;
 292         unsigned int irq;
 293         int ret;
 294
 295         dev->board_name = thisboard->name;
 296         iobase = it->options[0];
 297         irq = it->options[1];
 298         dev_info(dev->class_dev, "%s: attach %s 0x%lX,%u\n",
 299                  dev->driver->driver_name, dev->board_name, iobase, irq);
 300
 301         devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
 302         if (!devpriv)
 303                 return -ENOMEM;
 304         dev->private = devpriv;
 305
 306         ret = dio200_request_region(dev, iobase, thisboard->mainsize);
 307         if (ret < 0)
 308                 return ret;
 309         devpriv->io.u.iobase = iobase;
 310         devpriv->io.regtype = io_regtype;
 311         return amplc_dio200_common_attach(dev, irq, 0);
 312 }
 313
 314 static void dio200_detach(struct comedi_device *dev)
 315 {
 316         const struct dio200_board *thisboard = comedi_board(dev);
 317         struct dio200_private *devpriv = dev->private;
 318
 319         if (!thisboard || !devpriv)
 320                 return;
 321         amplc_dio200_common_detach(dev);
 322         if (devpriv->io.regtype == io_regtype)
 323                 release_region(devpriv->io.u.iobase, thisboard->mainsize);
 324 }
 325
 326 static struct comedi_driver amplc_dio200_driver = {
 327         .driver_name = "amplc_dio200",
 328         .module = THIS_MODULE,
 329         .attach = dio200_attach,
 330         .detach = dio200_detach,
 331         .board_name = &dio200_isa_boards[0].name,
 332         .offset = sizeof(struct dio200_board),
 333         .num_names = ARRAY_SIZE(dio200_isa_boards),
 334 };
 335 module_comedi_driver(amplc_dio200_driver);
 336
 337 MODULE_AUTHOR("Comedi http://www.comedi.org");
 338 MODULE_DESCRIPTION("Comedi driver for Amplicon 200 Series ISA DIO boards");
 339 MODULE_LICENSE("GPL");