drivers/staging/comedi/drivers/dmm32at.c

   1 /*
   2     comedi/drivers/dmm32at.c
   3     Diamond Systems mm32at code for a Comedi driver
   4
   5     COMEDI - Linux Control and Measurement Device Interface
   6     Copyright (C) 2000 David A. Schleef <ds@schleef.org>
   7
   8     This program is free software; you can redistribute it and/or modify
   9     it under the terms of the GNU General Public License as published by
  10     the Free Software Foundation; either version 2 of the License, or
  11     (at your option) any later version.
  12
  13     This program is distributed in the hope that it will be useful,
  14     but WITHOUT ANY WARRANTY; without even the implied warranty of
  15     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16     GNU General Public License for more details.
  17
  18     You should have received a copy of the GNU General Public License
  19     along with this program; if not, write to the Free Software
  20     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21
  22 */
  23 /*
  24 Driver: dmm32at
  25 Description: Diamond Systems mm32at driver.
  26 Devices:
  27 Author: Perry J. Piplani <perry.j.piplani@nasa.gov>
  28 Updated: Fri Jun  4 09:13:24 CDT 2004
  29 Status: experimental
  30
  31 This driver is for the Diamond Systems MM-32-AT board
  32 http://www.diamondsystems.com/products/diamondmm32at It is being used
  33 on serveral projects inside NASA, without problems so far. For analog
  34 input commands, TRIG_EXT is not yet supported at all..
  35
  36 Configuration Options:
  37   comedi_config /dev/comedi0 dmm32at baseaddr,irq
  38 */
  39
  40 #include <linux/interrupt.h>
  41 #include "../comedidev.h"
  42 #include <linux/ioport.h>
  43
  44 /* Board register addresses */
  45
  46 #define DMM32AT_MEMSIZE 0x10
  47
  48 #define DMM32AT_CONV 0x00
  49 #define DMM32AT_AILSB 0x00
  50 #define DMM32AT_AUXDOUT 0x01
  51 #define DMM32AT_AIMSB 0x01
  52 #define DMM32AT_AILOW 0x02
  53 #define DMM32AT_AIHIGH 0x03
  54
  55 #define DMM32AT_DACLSB 0x04
  56 #define DMM32AT_DACSTAT 0x04
  57 #define DMM32AT_DACMSB 0x05
  58
  59 #define DMM32AT_FIFOCNTRL 0x07
  60 #define DMM32AT_FIFOSTAT 0x07
  61
  62 #define DMM32AT_CNTRL 0x08
  63 #define DMM32AT_AISTAT 0x08
  64
  65 #define DMM32AT_INTCLOCK 0x09
  66
  67 #define DMM32AT_CNTRDIO 0x0a
  68
  69 #define DMM32AT_AICONF 0x0b
  70 #define DMM32AT_AIRBACK 0x0b
  71
  72 #define DMM32AT_CLK1 0x0d
  73 #define DMM32AT_CLK2 0x0e
  74 #define DMM32AT_CLKCT 0x0f
  75
  76 #define DMM32AT_DIOA 0x0c
  77 #define DMM32AT_DIOB 0x0d
  78 #define DMM32AT_DIOC 0x0e
  79 #define DMM32AT_DIOCONF 0x0f
  80
  81 #define dmm_inb(cdev, reg) inb((cdev->iobase)+reg)
  82 #define dmm_outb(cdev, reg, valu) outb(valu, (cdev->iobase)+reg)
  83
  84 /* Board register values. */
  85
  86 /* DMM32AT_DACSTAT 0x04 */
  87 #define DMM32AT_DACBUSY 0x80
  88
  89 /* DMM32AT_FIFOCNTRL 0x07 */
  90 #define DMM32AT_FIFORESET 0x02
  91 #define DMM32AT_SCANENABLE 0x04
  92
  93 /* DMM32AT_CNTRL 0x08 */
  94 #define DMM32AT_RESET 0x20
  95 #define DMM32AT_INTRESET 0x08
  96 #define DMM32AT_CLKACC 0x00
  97 #define DMM32AT_DIOACC 0x01
  98
  99 /* DMM32AT_AISTAT 0x08 */
 100 #define DMM32AT_STATUS 0x80
 101
 102 /* DMM32AT_INTCLOCK 0x09 */
 103 #define DMM32AT_ADINT 0x80
 104 #define DMM32AT_CLKSEL 0x03
 105
 106 /* DMM32AT_CNTRDIO 0x0a */
 107 #define DMM32AT_FREQ12 0x80
 108
 109 /* DMM32AT_AICONF 0x0b */
 110 #define DMM32AT_RANGE_U10 0x0c
 111 #define DMM32AT_RANGE_U5 0x0d
 112 #define DMM32AT_RANGE_B10 0x08
 113 #define DMM32AT_RANGE_B5 0x00
 114 #define DMM32AT_SCINT_20 0x00
 115 #define DMM32AT_SCINT_15 0x10
 116 #define DMM32AT_SCINT_10 0x20
 117 #define DMM32AT_SCINT_5 0x30
 118
 119 /* DMM32AT_CLKCT 0x0f */
 120 #define DMM32AT_CLKCT1 0x56     /* mode3 counter 1 - write low byte only */
 121 #define DMM32AT_CLKCT2 0xb6     /*  mode3 counter 2 - write high and low byte */
 122
 123 /* DMM32AT_DIOCONF 0x0f */
 124 #define DMM32AT_DIENABLE 0x80
 125 #define DMM32AT_DIRA 0x10
 126 #define DMM32AT_DIRB 0x02
 127 #define DMM32AT_DIRCL 0x01
 128 #define DMM32AT_DIRCH 0x08
 129
 130 /* board AI ranges in comedi structure */
 131 static const struct comedi_lrange dmm32at_airanges = {
 132         4,
 133         {
 134          UNI_RANGE(10),
 135          UNI_RANGE(5),
 136          BIP_RANGE(10),
 137          BIP_RANGE(5),
 138          }
 139 };
 140
 141 /* register values for above ranges */
 142 static const unsigned char dmm32at_rangebits[] = {
 143         DMM32AT_RANGE_U10,
 144         DMM32AT_RANGE_U5,
 145         DMM32AT_RANGE_B10,
 146         DMM32AT_RANGE_B5,
 147 };
 148
 149 /* only one of these ranges is valid, as set by a jumper on the
 150  * board. The application should only use the range set by the jumper
 151  */
 152 static const struct comedi_lrange dmm32at_aoranges = {
 153         4,
 154         {
 155          UNI_RANGE(10),
 156          UNI_RANGE(5),
 157          BIP_RANGE(10),
 158          BIP_RANGE(5),
 159          }
 160 };
 161
 162 /*
 163  * Board descriptions for two imaginary boards.  Describing the
 164  * boards in this way is optional, and completely driver-dependent.
 165  * Some drivers use arrays such as this, other do not.
 166  */
 167 struct dmm32at_board {
 168         const char *name;
 169         int ai_chans;
 170         int ai_bits;
 171         const struct comedi_lrange *ai_ranges;
 172         int ao_chans;
 173         int ao_bits;
 174         const struct comedi_lrange *ao_ranges;
 175         int have_dio;
 176         int dio_chans;
 177 };
 178 static const struct dmm32at_board dmm32at_boards[] = {
 179         {
 180          .name = "dmm32at",
 181          .ai_chans = 32,
 182          .ai_bits = 16,
 183          .ai_ranges = &dmm32at_airanges,
 184          .ao_chans = 4,
 185          .ao_bits = 12,
 186          .ao_ranges = &dmm32at_aoranges,
 187          .have_dio = 1,
 188          .dio_chans = 24,
 189          },
 190 };
 191
 192 /* this structure is for data unique to this hardware driver.  If
 193  * several hardware drivers keep similar information in this structure,
 194  * feel free to suggest moving the variable to the struct comedi_device struct.
 195  */
 196 struct dmm32at_private {
 197
 198         int data;
 199         int ai_inuse;
 200         unsigned int ai_scans_left;
 201
 202         /* Used for AO readback */
 203         unsigned int ao_readback[4];
 204         unsigned char dio_config;
 205
 206 };
 207
 208 /*
 209  * most drivers define the following macro to make it easy to
 210  * access the private structure.
 211  */
 212 #define devpriv ((struct dmm32at_private *)dev->private)
 213
 214 /*
 215  * The struct comedi_driver structure tells the Comedi core module
 216  * which functions to call to configure/deconfigure (attach/detach)
 217  * the board, and also about the kernel module that contains
 218  * the device code.
 219  */
 220 static int dmm32at_attach(struct comedi_device *dev,
 221                           struct comedi_devconfig *it);
 222 static void dmm32at_detach(struct comedi_device *dev);
 223 static struct comedi_driver driver_dmm32at = {
 224         .driver_name = "dmm32at",
 225         .module = THIS_MODULE,
 226         .attach = dmm32at_attach,
 227         .detach = dmm32at_detach,
 228 /* It is not necessary to implement the following members if you are
 229  * writing a driver for a ISA PnP or PCI card */
 230 /* Most drivers will support multiple types of boards by
 231  * having an array of board structures.  These were defined
 232  * in dmm32at_boards[] above.  Note that the element 'name'
 233  * was first in the structure -- Comedi uses this fact to
 234  * extract the name of the board without knowing any details
 235  * about the structure except for its length.
 236  * When a device is attached (by comedi_config), the name
 237  * of the device is given to Comedi, and Comedi tries to
 238  * match it by going through the list of board names.  If
 239  * there is a match, the address of the pointer is put
 240  * into dev->board_ptr and driver->attach() is called.
 241  *
 242  * Note that these are not necessary if you can determine
 243  * the type of board in software.  ISA PnP, PCI, and PCMCIA
 244  * devices are such boards.
 245  */
 246         .board_name = &dmm32at_boards[0].name,
 247         .offset = sizeof(struct dmm32at_board),
 248         .num_names = ARRAY_SIZE(dmm32at_boards),
 249 };
 250
 251 /* prototypes for driver functions below */
 252 static int dmm32at_ai_rinsn(struct comedi_device *dev,
 253                             struct comedi_subdevice *s,
 254                             struct comedi_insn *insn, unsigned int *data);
 255 static int dmm32at_ao_winsn(struct comedi_device *dev,
 256                             struct comedi_subdevice *s,
 257                             struct comedi_insn *insn, unsigned int *data);
 258 static int dmm32at_ao_rinsn(struct comedi_device *dev,
 259                             struct comedi_subdevice *s,
 260                             struct comedi_insn *insn, unsigned int *data);
 261 static int dmm32at_dio_insn_bits(struct comedi_device *dev,
 262                                  struct comedi_subdevice *s,
 263                                  struct comedi_insn *insn, unsigned int *data);
 264 static int dmm32at_dio_insn_config(struct comedi_device *dev,
 265                                    struct comedi_subdevice *s,
 266                                    struct comedi_insn *insn,
 267                                    unsigned int *data);
 268 static int dmm32at_ai_cmdtest(struct comedi_device *dev,
 269                               struct comedi_subdevice *s,
 270                               struct comedi_cmd *cmd);
 271 static int dmm32at_ai_cmd(struct comedi_device *dev,
 272                           struct comedi_subdevice *s);
 273 static int dmm32at_ai_cancel(struct comedi_device *dev,
 274                              struct comedi_subdevice *s);
 275 static int dmm32at_ns_to_timer(unsigned int *ns, int round);
 276 static irqreturn_t dmm32at_isr(int irq, void *d);
 277 void dmm32at_setaitimer(struct comedi_device *dev, unsigned int nansec);
 278
 279 /*
 280  * Attach is called by the Comedi core to configure the driver
 281  * for a particular board.  If you specified a board_name array
 282  * in the driver structure, dev->board_ptr contains that
 283  * address.
 284  */
 285 static int dmm32at_attach(struct comedi_device *dev,
 286                           struct comedi_devconfig *it)
 287 {
 288         const struct dmm32at_board *board = comedi_board(dev);
 289         int ret;
 290         struct comedi_subdevice *s;
 291         unsigned char aihi, ailo, fifostat, aistat, intstat, airback;
 292         unsigned long iobase;
 293         unsigned int irq;
 294
 295         iobase = it->options[0];
 296         irq = it->options[1];
 297
 298         printk(KERN_INFO "comedi%d: dmm32at: attaching\n", dev->minor);
 299         printk(KERN_DEBUG "dmm32at: probing at address 0x%04lx, irq %u\n",
 300                iobase, irq);
 301
 302         /* register address space */
 303         if (!request_region(iobase, DMM32AT_MEMSIZE, board->name)) {
 304                 printk(KERN_ERR "comedi%d: dmm32at: I/O port conflict\n",
 305                        dev->minor);
 306                 return -EIO;
 307         }
 308         dev->iobase = iobase;
 309
 310         /* the following just makes sure the board is there and gets
 311            it to a known state */
 312
 313         /* reset the board */
 314         dmm_outb(dev, DMM32AT_CNTRL, DMM32AT_RESET);
 315
 316         /* allow a millisecond to reset */
 317         udelay(1000);
 318
 319         /* zero scan and fifo control */
 320         dmm_outb(dev, DMM32AT_FIFOCNTRL, 0x0);
 321
 322         /* zero interrupt and clock control */
 323         dmm_outb(dev, DMM32AT_INTCLOCK, 0x0);
 324
 325         /* write a test channel range, the high 3 bits should drop */
 326         dmm_outb(dev, DMM32AT_AILOW, 0x80);
 327         dmm_outb(dev, DMM32AT_AIHIGH, 0xff);
 328
 329         /* set the range at 10v unipolar */
 330         dmm_outb(dev, DMM32AT_AICONF, DMM32AT_RANGE_U10);
 331
 332         /* should take 10 us to settle, here's a hundred */
 333         udelay(100);
 334
 335         /* read back the values */
 336         ailo = dmm_inb(dev, DMM32AT_AILOW);
 337         aihi = dmm_inb(dev, DMM32AT_AIHIGH);
 338         fifostat = dmm_inb(dev, DMM32AT_FIFOSTAT);
 339         aistat = dmm_inb(dev, DMM32AT_AISTAT);
 340         intstat = dmm_inb(dev, DMM32AT_INTCLOCK);
 341         airback = dmm_inb(dev, DMM32AT_AIRBACK);
 342
 343         printk(KERN_DEBUG "dmm32at: lo=0x%02x hi=0x%02x fifostat=0x%02x\n",
 344                ailo, aihi, fifostat);
 345         printk(KERN_DEBUG
 346                "dmm32at: aistat=0x%02x intstat=0x%02x airback=0x%02x\n",
 347                aistat, intstat, airback);
 348
 349         if ((ailo != 0x00) || (aihi != 0x1f) || (fifostat != 0x80) ||
 350             (aistat != 0x60 || (intstat != 0x00) || airback != 0x0c)) {
 351                 printk(KERN_ERR "dmmat32: board detection failed\n");
 352                 return -EIO;
 353         }
 354
 355         /* board is there, register interrupt */
 356         if (irq) {
 357                 ret = request_irq(irq, dmm32at_isr, 0, board->name, dev);
 358                 if (ret < 0) {
 359                         printk(KERN_ERR "dmm32at: irq conflict\n");
 360                         return ret;
 361                 }
 362                 dev->irq = irq;
 363         }
 364
 365         dev->board_name = board->name;
 366
 367 /*
 368  * Allocate the private structure area.  alloc_private() is a
 369  * convenient macro defined in comedidev.h.
 370  */
 371         if (alloc_private(dev, sizeof(struct dmm32at_private)) < 0)
 372                 return -ENOMEM;
 373
 374         ret = comedi_alloc_subdevices(dev, 3);
 375         if (ret)
 376                 return ret;
 377
 378         s = dev->subdevices + 0;
 379         dev->read_subdev = s;
 380         /* analog input subdevice */
 381         s->type = COMEDI_SUBD_AI;
 382         /* we support single-ended (ground) and differential */
 383         s->subdev_flags = SDF_READABLE | SDF_GROUND | SDF_DIFF | SDF_CMD_READ;
 384         s->n_chan = board->ai_chans;
 385         s->maxdata = (1 << board->ai_bits) - 1;
 386         s->range_table = board->ai_ranges;
 387         s->len_chanlist = 32;   /* This is the maximum chanlist length that
 388                                    the board can handle */
 389         s->insn_read = dmm32at_ai_rinsn;
 390         s->do_cmd = dmm32at_ai_cmd;
 391         s->do_cmdtest = dmm32at_ai_cmdtest;
 392         s->cancel = dmm32at_ai_cancel;
 393
 394         s = dev->subdevices + 1;
 395         /* analog output subdevice */
 396         s->type = COMEDI_SUBD_AO;
 397         s->subdev_flags = SDF_WRITABLE;
 398         s->n_chan = board->ao_chans;
 399         s->maxdata = (1 << board->ao_bits) - 1;
 400         s->range_table = board->ao_ranges;
 401         s->insn_write = dmm32at_ao_winsn;
 402         s->insn_read = dmm32at_ao_rinsn;
 403
 404         s = dev->subdevices + 2;
 405         /* digital i/o subdevice */
 406         if (board->have_dio) {
 407
 408                 /* get access to the DIO regs */
 409                 dmm_outb(dev, DMM32AT_CNTRL, DMM32AT_DIOACC);
 410                 /* set the DIO's to the defualt input setting */
 411                 devpriv->dio_config = DMM32AT_DIRA | DMM32AT_DIRB |
 412                     DMM32AT_DIRCL | DMM32AT_DIRCH | DMM32AT_DIENABLE;
 413                 dmm_outb(dev, DMM32AT_DIOCONF, devpriv->dio_config);
 414
 415                 /* set up the subdevice */
 416                 s->type = COMEDI_SUBD_DIO;
 417                 s->subdev_flags = SDF_READABLE | SDF_WRITABLE;
 418                 s->n_chan = board->dio_chans;
 419                 s->maxdata = 1;
 420                 s->state = 0;
 421                 s->range_table = &range_digital;
 422                 s->insn_bits = dmm32at_dio_insn_bits;
 423                 s->insn_config = dmm32at_dio_insn_config;
 424         } else {
 425                 s->type = COMEDI_SUBD_UNUSED;
 426         }
 427
 428         /* success */
 429         printk(KERN_INFO "comedi%d: dmm32at: attached\n", dev->minor);
 430
 431         return 1;
 432
 433 }
 434
 435 static void dmm32at_detach(struct comedi_device *dev)
 436 {
 437         if (dev->irq)
 438                 free_irq(dev->irq, dev);
 439         if (dev->iobase)
 440                 release_region(dev->iobase, DMM32AT_MEMSIZE);
 441 }
 442
 443 /*
 444  * "instructions" read/write data in "one-shot" or "software-triggered"
 445  * mode.
 446  */
 447
 448 static int dmm32at_ai_rinsn(struct comedi_device *dev,
 449                             struct comedi_subdevice *s,
 450                             struct comedi_insn *insn, unsigned int *data)
 451 {
 452         int n, i;
 453         unsigned int d;
 454         unsigned char status;
 455         unsigned short msb, lsb;
 456         unsigned char chan;
 457         int range;
 458
 459         /* get the channel and range number */
 460
 461         chan = CR_CHAN(insn->chanspec) & (s->n_chan - 1);
 462         range = CR_RANGE(insn->chanspec);
 463
 464         /* printk("channel=0x%02x, range=%d\n",chan,range); */
 465
 466         /* zero scan and fifo control and reset fifo */
 467         dmm_outb(dev, DMM32AT_FIFOCNTRL, DMM32AT_FIFORESET);
 468
 469         /* write the ai channel range regs */
 470         dmm_outb(dev, DMM32AT_AILOW, chan);
 471         dmm_outb(dev, DMM32AT_AIHIGH, chan);
 472         /* set the range bits */
 473         dmm_outb(dev, DMM32AT_AICONF, dmm32at_rangebits[range]);
 474
 475         /* wait for circuit to settle */
 476         for (i = 0; i < 40000; i++) {
 477                 status = dmm_inb(dev, DMM32AT_AIRBACK);
 478                 if ((status & DMM32AT_STATUS) == 0)
 479                         break;
 480         }
 481         if (i == 40000) {
 482                 printk(KERN_WARNING "dmm32at: timeout\n");
 483                 return -ETIMEDOUT;
 484         }
 485
 486         /* convert n samples */
 487         for (n = 0; n < insn->n; n++) {
 488                 /* trigger conversion */
 489                 dmm_outb(dev, DMM32AT_CONV, 0xff);
 490                 /* wait for conversion to end */
 491                 for (i = 0; i < 40000; i++) {
 492                         status = dmm_inb(dev, DMM32AT_AISTAT);
 493                         if ((status & DMM32AT_STATUS) == 0)
 494                                 break;
 495                 }
 496                 if (i == 40000) {
 497                         printk(KERN_WARNING "dmm32at: timeout\n");
 498                         return -ETIMEDOUT;
 499                 }
 500
 501                 /* read data */
 502                 lsb = dmm_inb(dev, DMM32AT_AILSB);
 503                 msb = dmm_inb(dev, DMM32AT_AIMSB);
 504
 505                 /* invert sign bit to make range unsigned, this is an
 506                    idiosyncrasy of the diamond board, it return
 507                    conversions as a signed value, i.e. -32768 to
 508                    32767, flipping the bit and interpreting it as
 509                    signed gives you a range of 0 to 65535 which is
 510                    used by comedi */
 511                 d = ((msb ^ 0x0080) << 8) + lsb;
 512
 513                 data[n] = d;
 514         }
 515
 516         /* return the number of samples read/written */
 517         return n;
 518 }
 519
 520 static int dmm32at_ai_cmdtest(struct comedi_device *dev,
 521                               struct comedi_subdevice *s,
 522                               struct comedi_cmd *cmd)
 523 {
 524         int err = 0;
 525         int tmp;
 526         int start_chan, gain, i;
 527
 528         /* printk("dmmat32 in command test\n"); */
 529
 530         /* cmdtest tests a particular command to see if it is valid.
 531          * Using the cmdtest ioctl, a user can create a valid cmd
 532          * and then have it executes by the cmd ioctl.
 533          *
 534          * cmdtest returns 1,2,3,4 or 0, depending on which tests
 535          * the command passes. */
 536
 537         /* step 1: make sure trigger sources are trivially valid */
 538
 539         tmp = cmd->start_src;
 540         cmd->start_src &= TRIG_NOW;
 541         if (!cmd->start_src || tmp != cmd->start_src)
 542                 err++;
 543
 544         tmp = cmd->scan_begin_src;
 545         cmd->scan_begin_src &= TRIG_TIMER /*| TRIG_EXT */ ;
 546         if (!cmd->scan_begin_src || tmp != cmd->scan_begin_src)
 547                 err++;
 548
 549         tmp = cmd->convert_src;
 550         cmd->convert_src &= TRIG_TIMER /*| TRIG_EXT */ ;
 551         if (!cmd->convert_src || tmp != cmd->convert_src)
 552                 err++;
 553
 554         tmp = cmd->scan_end_src;
 555         cmd->scan_end_src &= TRIG_COUNT;
 556         if (!cmd->scan_end_src || tmp != cmd->scan_end_src)
 557                 err++;
 558
 559         tmp = cmd->stop_src;
 560         cmd->stop_src &= TRIG_COUNT | TRIG_NONE;
 561         if (!cmd->stop_src || tmp != cmd->stop_src)
 562                 err++;
 563
 564         if (err)
 565                 return 1;
 566
 567         /* step 2: make sure trigger sources are unique and mutually
 568          * compatible */
 569
 570         /* note that mutual compatibility is not an issue here */
 571         if (cmd->scan_begin_src != TRIG_TIMER &&
 572             cmd->scan_begin_src != TRIG_EXT)
 573                 err++;
 574         if (cmd->convert_src != TRIG_TIMER && cmd->convert_src != TRIG_EXT)
 575                 err++;
 576         if (cmd->stop_src != TRIG_COUNT && cmd->stop_src != TRIG_NONE)
 577                 err++;
 578
 579         if (err)
 580                 return 2;
 581
 582         /* step 3: make sure arguments are trivially compatible */
 583
 584         if (cmd->start_arg != 0) {
 585                 cmd->start_arg = 0;
 586                 err++;
 587         }
 588 #define MAX_SCAN_SPEED  1000000 /* in nanoseconds */
 589 #define MIN_SCAN_SPEED  1000000000      /* in nanoseconds */
 590
 591         if (cmd->scan_begin_src == TRIG_TIMER) {
 592                 if (cmd->scan_begin_arg < MAX_SCAN_SPEED) {
 593                         cmd->scan_begin_arg = MAX_SCAN_SPEED;
 594                         err++;
 595                 }
 596                 if (cmd->scan_begin_arg > MIN_SCAN_SPEED) {
 597                         cmd->scan_begin_arg = MIN_SCAN_SPEED;
 598                         err++;
 599                 }
 600         } else {
 601                 /* external trigger */
 602                 /* should be level/edge, hi/lo specification here */
 603                 /* should specify multiple external triggers */
 604                 if (cmd->scan_begin_arg > 9) {
 605                         cmd->scan_begin_arg = 9;
 606                         err++;
 607                 }
 608         }
 609         if (cmd->convert_src == TRIG_TIMER) {
 610                 if (cmd->convert_arg >= 17500)
 611                         cmd->convert_arg = 20000;
 612                 else if (cmd->convert_arg >= 12500)
 613                         cmd->convert_arg = 15000;
 614                 else if (cmd->convert_arg >= 7500)
 615                         cmd->convert_arg = 10000;
 616                 else
 617                         cmd->convert_arg = 5000;
 618
 619         } else {
 620                 /* external trigger */
 621                 /* see above */
 622                 if (cmd->convert_arg > 9) {
 623                         cmd->convert_arg = 9;
 624                         err++;
 625                 }
 626         }
 627
 628         if (cmd->scan_end_arg != cmd->chanlist_len) {
 629                 cmd->scan_end_arg = cmd->chanlist_len;
 630                 err++;
 631         }
 632         if (cmd->stop_src == TRIG_COUNT) {
 633                 if (cmd->stop_arg > 0xfffffff0) {
 634                         cmd->stop_arg = 0xfffffff0;
 635                         err++;
 636                 }
 637                 if (cmd->stop_arg == 0) {
 638                         cmd->stop_arg = 1;
 639                         err++;
 640                 }
 641         } else {
 642                 /* TRIG_NONE */
 643                 if (cmd->stop_arg != 0) {
 644                         cmd->stop_arg = 0;
 645                         err++;
 646                 }
 647         }
 648
 649         if (err)
 650                 return 3;
 651
 652         /* step 4: fix up any arguments */
 653
 654         if (cmd->scan_begin_src == TRIG_TIMER) {
 655                 tmp = cmd->scan_begin_arg;
 656                 dmm32at_ns_to_timer(&cmd->scan_begin_arg,
 657                                     cmd->flags & TRIG_ROUND_MASK);
 658                 if (tmp != cmd->scan_begin_arg)
 659                         err++;
 660         }
 661         if (cmd->convert_src == TRIG_TIMER) {
 662                 tmp = cmd->convert_arg;
 663                 dmm32at_ns_to_timer(&cmd->convert_arg,
 664                                     cmd->flags & TRIG_ROUND_MASK);
 665                 if (tmp != cmd->convert_arg)
 666                         err++;
 667                 if (cmd->scan_begin_src == TRIG_TIMER &&
 668                     cmd->scan_begin_arg <
 669                     cmd->convert_arg * cmd->scan_end_arg) {
 670                         cmd->scan_begin_arg =
 671                             cmd->convert_arg * cmd->scan_end_arg;
 672                         err++;
 673                 }
 674         }
 675
 676         if (err)
 677                 return 4;
 678
 679         /* step 5 check the channel list, the channel list for this
 680            board must be consecutive and gains must be the same */
 681
 682         if (cmd->chanlist) {
 683                 gain = CR_RANGE(cmd->chanlist[0]);
 684                 start_chan = CR_CHAN(cmd->chanlist[0]);
 685                 for (i = 1; i < cmd->chanlist_len; i++) {
 686                         if (CR_CHAN(cmd->chanlist[i]) !=
 687                             (start_chan + i) % s->n_chan) {
 688                                 comedi_error(dev,
 689                                              "entries in chanlist must be consecutive channels, counting upwards\n");
 690                                 err++;
 691                         }
 692                         if (CR_RANGE(cmd->chanlist[i]) != gain) {
 693                                 comedi_error(dev,
 694                                              "entries in chanlist must all have the same gain\n");
 695                                 err++;
 696                         }
 697                 }
 698         }
 699
 700         if (err)
 701                 return 5;
 702
 703         return 0;
 704 }
 705
 706 static int dmm32at_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
 707 {
 708         struct comedi_cmd *cmd = &s->async->cmd;
 709         int i, range;
 710         unsigned char chanlo, chanhi, status;
 711
 712         if (!cmd->chanlist)
 713                 return -EINVAL;
 714
 715         /* get the channel list and range */
 716         chanlo = CR_CHAN(cmd->chanlist[0]) & (s->n_chan - 1);
 717         chanhi = chanlo + cmd->chanlist_len - 1;
 718         if (chanhi >= s->n_chan)
 719                 return -EINVAL;
 720         range = CR_RANGE(cmd->chanlist[0]);
 721
 722         /* reset fifo */
 723         dmm_outb(dev, DMM32AT_FIFOCNTRL, DMM32AT_FIFORESET);
 724
 725         /* set scan enable */
 726         dmm_outb(dev, DMM32AT_FIFOCNTRL, DMM32AT_SCANENABLE);
 727
 728         /* write the ai channel range regs */
 729         dmm_outb(dev, DMM32AT_AILOW, chanlo);
 730         dmm_outb(dev, DMM32AT_AIHIGH, chanhi);
 731
 732         /* set the range bits */
 733         dmm_outb(dev, DMM32AT_AICONF, dmm32at_rangebits[range]);
 734
 735         /* reset the interrupt just in case */
 736         dmm_outb(dev, DMM32AT_CNTRL, DMM32AT_INTRESET);
 737
 738         if (cmd->stop_src == TRIG_COUNT)
 739                 devpriv->ai_scans_left = cmd->stop_arg;
 740         else {                  /* TRIG_NONE */
 741                 devpriv->ai_scans_left = 0xffffffff; /* indicates TRIG_NONE to
 742                                                       * isr */
 743         }
 744
 745         /* wait for circuit to settle */
 746         for (i = 0; i < 40000; i++) {
 747                 status = dmm_inb(dev, DMM32AT_AIRBACK);
 748                 if ((status & DMM32AT_STATUS) == 0)
 749                         break;
 750         }
 751         if (i == 40000) {
 752                 printk(KERN_WARNING "dmm32at: timeout\n");
 753                 return -ETIMEDOUT;
 754         }
 755
 756         if (devpriv->ai_scans_left > 1) {
 757                 /* start the clock and enable the interrupts */
 758                 dmm32at_setaitimer(dev, cmd->scan_begin_arg);
 759         } else {
 760                 /* start the interrups and initiate a single scan */
 761                 dmm_outb(dev, DMM32AT_INTCLOCK, DMM32AT_ADINT);
 762                 dmm_outb(dev, DMM32AT_CONV, 0xff);
 763         }
 764
 765 /*      printk("dmmat32 in command\n"); */
 766
 767 /*      for(i=0;i<cmd->chanlist_len;i++) */
 768 /*              comedi_buf_put(s->async,i*100); */
 769
 770 /*      s->async->events |= COMEDI_CB_EOA; */
 771 /*      comedi_event(dev, s); */
 772
 773         return 0;
 774
 775 }
 776
 777 static int dmm32at_ai_cancel(struct comedi_device *dev,
 778                              struct comedi_subdevice *s)
 779 {
 780         devpriv->ai_scans_left = 1;
 781         return 0;
 782 }
 783
 784 static irqreturn_t dmm32at_isr(int irq, void *d)
 785 {
 786         unsigned char intstat;
 787         unsigned int samp;
 788         unsigned short msb, lsb;
 789         int i;
 790         struct comedi_device *dev = d;
 791
 792         if (!dev->attached) {
 793                 comedi_error(dev, "spurious interrupt");
 794                 return IRQ_HANDLED;
 795         }
 796
 797         intstat = dmm_inb(dev, DMM32AT_INTCLOCK);
 798
 799         if (intstat & DMM32AT_ADINT) {
 800                 struct comedi_subdevice *s = dev->read_subdev;
 801                 struct comedi_cmd *cmd = &s->async->cmd;
 802
 803                 for (i = 0; i < cmd->chanlist_len; i++) {
 804                         /* read data */
 805                         lsb = dmm_inb(dev, DMM32AT_AILSB);
 806                         msb = dmm_inb(dev, DMM32AT_AIMSB);
 807
 808                         /* invert sign bit to make range unsigned */
 809                         samp = ((msb ^ 0x0080) << 8) + lsb;
 810                         comedi_buf_put(s->async, samp);
 811                 }
 812
 813                 if (devpriv->ai_scans_left != 0xffffffff) {     /* TRIG_COUNT */
 814                         devpriv->ai_scans_left--;
 815                         if (devpriv->ai_scans_left == 0) {
 816                                 /* disable further interrupts and clocks */
 817                                 dmm_outb(dev, DMM32AT_INTCLOCK, 0x0);
 818                                 /* set the buffer to be flushed with an EOF */
 819                                 s->async->events |= COMEDI_CB_EOA;
 820                         }
 821
 822                 }
 823                 /* flush the buffer */
 824                 comedi_event(dev, s);
 825         }
 826
 827         /* reset the interrupt */
 828         dmm_outb(dev, DMM32AT_CNTRL, DMM32AT_INTRESET);
 829         return IRQ_HANDLED;
 830 }
 831
 832 /* This function doesn't require a particular form, this is just
 833  * what happens to be used in some of the drivers.  It should
 834  * convert ns nanoseconds to a counter value suitable for programming
 835  * the device.  Also, it should adjust ns so that it cooresponds to
 836  * the actual time that the device will use. */
 837 static int dmm32at_ns_to_timer(unsigned int *ns, int round)
 838 {
 839         /* trivial timer */
 840         /* if your timing is done through two cascaded timers, the
 841          * i8253_cascade_ns_to_timer() function in 8253.h can be
 842          * very helpful.  There are also i8254_load() and i8254_mm_load()
 843          * which can be used to load values into the ubiquitous 8254 counters
 844          */
 845
 846         return *ns;
 847 }
 848
 849 static int dmm32at_ao_winsn(struct comedi_device *dev,
 850                             struct comedi_subdevice *s,
 851                             struct comedi_insn *insn, unsigned int *data)
 852 {
 853         int i;
 854         int chan = CR_CHAN(insn->chanspec);
 855         unsigned char hi, lo, status;
 856
 857         /* Writing a list of values to an AO channel is probably not
 858          * very useful, but that's how the interface is defined. */
 859         for (i = 0; i < insn->n; i++) {
 860
 861                 devpriv->ao_readback[chan] = data[i];
 862
 863                 /* get the low byte */
 864                 lo = data[i] & 0x00ff;
 865                 /* high byte also contains channel number */
 866                 hi = (data[i] >> 8) + chan * (1 << 6);
 867                 /* printk("writing 0x%02x  0x%02x\n",hi,lo); */
 868                 /* write the low and high values to the board */
 869                 dmm_outb(dev, DMM32AT_DACLSB, lo);
 870                 dmm_outb(dev, DMM32AT_DACMSB, hi);
 871
 872                 /* wait for circuit to settle */
 873                 for (i = 0; i < 40000; i++) {
 874                         status = dmm_inb(dev, DMM32AT_DACSTAT);
 875                         if ((status & DMM32AT_DACBUSY) == 0)
 876                                 break;
 877                 }
 878                 if (i == 40000) {
 879                         printk(KERN_WARNING "dmm32at: timeout\n");
 880                         return -ETIMEDOUT;
 881                 }
 882                 /* dummy read to update trigger the output */
 883                 status = dmm_inb(dev, DMM32AT_DACMSB);
 884
 885         }
 886
 887         /* return the number of samples read/written */
 888         return i;
 889 }
 890
 891 /* AO subdevices should have a read insn as well as a write insn.
 892  * Usually this means copying a value stored in devpriv. */
 893 static int dmm32at_ao_rinsn(struct comedi_device *dev,
 894                             struct comedi_subdevice *s,
 895                             struct comedi_insn *insn, unsigned int *data)
 896 {
 897         int i;
 898         int chan = CR_CHAN(insn->chanspec);
 899
 900         for (i = 0; i < insn->n; i++)
 901                 data[i] = devpriv->ao_readback[chan];
 902
 903         return i;
 904 }
 905
 906 /* DIO devices are slightly special.  Although it is possible to
 907  * implement the insn_read/insn_write interface, it is much more
 908  * useful to applications if you implement the insn_bits interface.
 909  * This allows packed reading/writing of the DIO channels.  The
 910  * comedi core can convert between insn_bits and insn_read/write */
 911 static int dmm32at_dio_insn_bits(struct comedi_device *dev,
 912                                  struct comedi_subdevice *s,
 913                                  struct comedi_insn *insn, unsigned int *data)
 914 {
 915         unsigned char diobits;
 916
 917         if (insn->n != 2)
 918                 return -EINVAL;
 919
 920         /* The insn data is a mask in data[0] and the new data
 921          * in data[1], each channel cooresponding to a bit. */
 922         if (data[0]) {
 923                 s->state &= ~data[0];
 924                 s->state |= data[0] & data[1];
 925                 /* Write out the new digital output lines */
 926                 /* outw(s->state,dev->iobase + DMM32AT_DIO); */
 927         }
 928
 929         /* get access to the DIO regs */
 930         dmm_outb(dev, DMM32AT_CNTRL, DMM32AT_DIOACC);
 931
 932         /* if either part of dio is set for output */
 933         if (((devpriv->dio_config & DMM32AT_DIRCL) == 0) ||
 934             ((devpriv->dio_config & DMM32AT_DIRCH) == 0)) {
 935                 diobits = (s->state & 0x00ff0000) >> 16;
 936                 dmm_outb(dev, DMM32AT_DIOC, diobits);
 937         }
 938         if ((devpriv->dio_config & DMM32AT_DIRB) == 0) {
 939                 diobits = (s->state & 0x0000ff00) >> 8;
 940                 dmm_outb(dev, DMM32AT_DIOB, diobits);
 941         }
 942         if ((devpriv->dio_config & DMM32AT_DIRA) == 0) {
 943                 diobits = (s->state & 0x000000ff);
 944                 dmm_outb(dev, DMM32AT_DIOA, diobits);
 945         }
 946
 947         /* now read the state back in */
 948         s->state = dmm_inb(dev, DMM32AT_DIOC);
 949         s->state <<= 8;
 950         s->state |= dmm_inb(dev, DMM32AT_DIOB);
 951         s->state <<= 8;
 952         s->state |= dmm_inb(dev, DMM32AT_DIOA);
 953         data[1] = s->state;
 954
 955         /* on return, data[1] contains the value of the digital
 956          * input and output lines. */
 957         /* data[1]=inw(dev->iobase + DMM32AT_DIO); */
 958         /* or we could just return the software copy of the output values if
 959          * it was a purely digital output subdevice */
 960         /* data[1]=s->state; */
 961
 962         return 2;
 963 }
 964
 965 static int dmm32at_dio_insn_config(struct comedi_device *dev,
 966                                    struct comedi_subdevice *s,
 967                                    struct comedi_insn *insn, unsigned int *data)
 968 {
 969         unsigned char chanbit;
 970         int chan = CR_CHAN(insn->chanspec);
 971
 972         if (insn->n != 1)
 973                 return -EINVAL;
 974
 975         if (chan < 8)
 976                 chanbit = DMM32AT_DIRA;
 977         else if (chan < 16)
 978                 chanbit = DMM32AT_DIRB;
 979         else if (chan < 20)
 980                 chanbit = DMM32AT_DIRCL;
 981         else
 982                 chanbit = DMM32AT_DIRCH;
 983
 984         /* The input or output configuration of each digital line is
 985          * configured by a special insn_config instruction.  chanspec
 986          * contains the channel to be changed, and data[0] contains the
 987          * value COMEDI_INPUT or COMEDI_OUTPUT. */
 988
 989         /* if output clear the bit, otherwise set it */
 990         if (data[0] == COMEDI_OUTPUT)
 991                 devpriv->dio_config &= ~chanbit;
 992         else
 993                 devpriv->dio_config |= chanbit;
 994         /* get access to the DIO regs */
 995         dmm_outb(dev, DMM32AT_CNTRL, DMM32AT_DIOACC);
 996         /* set the DIO's to the new configuration setting */
 997         dmm_outb(dev, DMM32AT_DIOCONF, devpriv->dio_config);
 998
 999         return 1;
1000 }
1001
1002 void dmm32at_setaitimer(struct comedi_device *dev, unsigned int nansec)
1003 {
1004         unsigned char lo1, lo2, hi2;
1005         unsigned short both2;
1006
1007         /* based on 10mhz clock */
1008         lo1 = 200;
1009         both2 = nansec / 20000;
1010         hi2 = (both2 & 0xff00) >> 8;
1011         lo2 = both2 & 0x00ff;
1012
1013         /* set the counter frequency to 10mhz */
1014         dmm_outb(dev, DMM32AT_CNTRDIO, 0);
1015
1016         /* get access to the clock regs */
1017         dmm_outb(dev, DMM32AT_CNTRL, DMM32AT_CLKACC);
1018
1019         /* write the counter 1 control word and low byte to counter */
1020         dmm_outb(dev, DMM32AT_CLKCT, DMM32AT_CLKCT1);
1021         dmm_outb(dev, DMM32AT_CLK1, lo1);
1022
1023         /* write the counter 2 control word and low byte then to counter */
1024         dmm_outb(dev, DMM32AT_CLKCT, DMM32AT_CLKCT2);
1025         dmm_outb(dev, DMM32AT_CLK2, lo2);
1026         dmm_outb(dev, DMM32AT_CLK2, hi2);
1027
1028         /* enable the ai conversion interrupt and the clock to start scans */
1029         dmm_outb(dev, DMM32AT_INTCLOCK, DMM32AT_ADINT | DMM32AT_CLKSEL);
1030
1031 }
1032
1033 /*
1034  * A convenient macro that defines init_module() and cleanup_module(),
1035  * as necessary.
1036  */
1037 static int __init driver_dmm32at_init_module(void)
1038 {
1039         return comedi_driver_register(&driver_dmm32at);
1040 }
1041
1042 static void __exit driver_dmm32at_cleanup_module(void)
1043 {
1044         comedi_driver_unregister(&driver_dmm32at);
1045 }
1046
1047 module_init(driver_dmm32at_init_module);
1048 module_exit(driver_dmm32at_cleanup_module);
1049
1050 MODULE_AUTHOR("Comedi http://www.comedi.org");
1051 MODULE_DESCRIPTION("Comedi low-level driver");
1052 MODULE_LICENSE("GPL");