Staging: Comedi: drivers: Remove comment copied from skel.c
[deliverable/linux.git] / drivers / staging / comedi / drivers / dmm32at.c
1 /*
2 comedi/drivers/dmm32at.c
3 Diamond Systems mm32at code for a Comedi driver
4
5 COMEDI - Linux Control and Measurement Device Interface
6 Copyright (C) 2000 David A. Schleef <ds@schleef.org>
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21
22 */
23 /*
24 Driver: dmm32at
25 Description: Diamond Systems mm32at driver.
26 Devices:
27 Author: Perry J. Piplani <perry.j.piplani@nasa.gov>
28 Updated: Fri Jun 4 09:13:24 CDT 2004
29 Status: experimental
30
31 This driver is for the Diamond Systems MM-32-AT board
32 http://www.diamondsystems.com/products/diamondmm32at It is being used
33 on serveral projects inside NASA, without problems so far. For analog
34 input commands, TRIG_EXT is not yet supported at all..
35
36 Configuration Options:
37 comedi_config /dev/comedi0 dmm32at baseaddr,irq
38 */
39
40 #include <linux/interrupt.h>
41 #include "../comedidev.h"
42 #include <linux/ioport.h>
43
44 /* Board register addresses */
45
46 #define DMM32AT_MEMSIZE 0x10
47
48 #define DMM32AT_CONV 0x00
49 #define DMM32AT_AILSB 0x00
50 #define DMM32AT_AUXDOUT 0x01
51 #define DMM32AT_AIMSB 0x01
52 #define DMM32AT_AILOW 0x02
53 #define DMM32AT_AIHIGH 0x03
54
55 #define DMM32AT_DACLSB 0x04
56 #define DMM32AT_DACSTAT 0x04
57 #define DMM32AT_DACMSB 0x05
58
59 #define DMM32AT_FIFOCNTRL 0x07
60 #define DMM32AT_FIFOSTAT 0x07
61
62 #define DMM32AT_CNTRL 0x08
63 #define DMM32AT_AISTAT 0x08
64
65 #define DMM32AT_INTCLOCK 0x09
66
67 #define DMM32AT_CNTRDIO 0x0a
68
69 #define DMM32AT_AICONF 0x0b
70 #define DMM32AT_AIRBACK 0x0b
71
72 #define DMM32AT_CLK1 0x0d
73 #define DMM32AT_CLK2 0x0e
74 #define DMM32AT_CLKCT 0x0f
75
76 #define DMM32AT_DIOA 0x0c
77 #define DMM32AT_DIOB 0x0d
78 #define DMM32AT_DIOC 0x0e
79 #define DMM32AT_DIOCONF 0x0f
80
81 #define dmm_inb(cdev, reg) inb((cdev->iobase)+reg)
82 #define dmm_outb(cdev, reg, valu) outb(valu, (cdev->iobase)+reg)
83
84 /* Board register values. */
85
86 /* DMM32AT_DACSTAT 0x04 */
87 #define DMM32AT_DACBUSY 0x80
88
89 /* DMM32AT_FIFOCNTRL 0x07 */
90 #define DMM32AT_FIFORESET 0x02
91 #define DMM32AT_SCANENABLE 0x04
92
93 /* DMM32AT_CNTRL 0x08 */
94 #define DMM32AT_RESET 0x20
95 #define DMM32AT_INTRESET 0x08
96 #define DMM32AT_CLKACC 0x00
97 #define DMM32AT_DIOACC 0x01
98
99 /* DMM32AT_AISTAT 0x08 */
100 #define DMM32AT_STATUS 0x80
101
102 /* DMM32AT_INTCLOCK 0x09 */
103 #define DMM32AT_ADINT 0x80
104 #define DMM32AT_CLKSEL 0x03
105
106 /* DMM32AT_CNTRDIO 0x0a */
107 #define DMM32AT_FREQ12 0x80
108
109 /* DMM32AT_AICONF 0x0b */
110 #define DMM32AT_RANGE_U10 0x0c
111 #define DMM32AT_RANGE_U5 0x0d
112 #define DMM32AT_RANGE_B10 0x08
113 #define DMM32AT_RANGE_B5 0x00
114 #define DMM32AT_SCINT_20 0x00
115 #define DMM32AT_SCINT_15 0x10
116 #define DMM32AT_SCINT_10 0x20
117 #define DMM32AT_SCINT_5 0x30
118
119 /* DMM32AT_CLKCT 0x0f */
120 #define DMM32AT_CLKCT1 0x56 /* mode3 counter 1 - write low byte only */
121 #define DMM32AT_CLKCT2 0xb6 /* mode3 counter 2 - write high and low byte */
122
123 /* DMM32AT_DIOCONF 0x0f */
124 #define DMM32AT_DIENABLE 0x80
125 #define DMM32AT_DIRA 0x10
126 #define DMM32AT_DIRB 0x02
127 #define DMM32AT_DIRCL 0x01
128 #define DMM32AT_DIRCH 0x08
129
130 /* board AI ranges in comedi structure */
131 static const struct comedi_lrange dmm32at_airanges = {
132 4,
133 {
134 UNI_RANGE(10),
135 UNI_RANGE(5),
136 BIP_RANGE(10),
137 BIP_RANGE(5),
138 }
139 };
140
141 /* register values for above ranges */
142 static const unsigned char dmm32at_rangebits[] = {
143 DMM32AT_RANGE_U10,
144 DMM32AT_RANGE_U5,
145 DMM32AT_RANGE_B10,
146 DMM32AT_RANGE_B5,
147 };
148
149 /* only one of these ranges is valid, as set by a jumper on the
150 * board. The application should only use the range set by the jumper
151 */
152 static const struct comedi_lrange dmm32at_aoranges = {
153 4,
154 {
155 UNI_RANGE(10),
156 UNI_RANGE(5),
157 BIP_RANGE(10),
158 BIP_RANGE(5),
159 }
160 };
161
162 /*
163 * Board descriptions for two imaginary boards. Describing the
164 * boards in this way is optional, and completely driver-dependent.
165 * Some drivers use arrays such as this, other do not.
166 */
167 struct dmm32at_board {
168 const char *name;
169 int ai_chans;
170 int ai_bits;
171 const struct comedi_lrange *ai_ranges;
172 int ao_chans;
173 int ao_bits;
174 const struct comedi_lrange *ao_ranges;
175 int have_dio;
176 int dio_chans;
177 };
178 static const struct dmm32at_board dmm32at_boards[] = {
179 {
180 .name = "dmm32at",
181 .ai_chans = 32,
182 .ai_bits = 16,
183 .ai_ranges = &dmm32at_airanges,
184 .ao_chans = 4,
185 .ao_bits = 12,
186 .ao_ranges = &dmm32at_aoranges,
187 .have_dio = 1,
188 .dio_chans = 24,
189 },
190 };
191
192 /*
193 * Useful for shorthand access to the particular board structure
194 */
195 #define thisboard ((const struct dmm32at_board *)dev->board_ptr)
196
197 /* this structure is for data unique to this hardware driver. If
198 * several hardware drivers keep similar information in this structure,
199 * feel free to suggest moving the variable to the struct comedi_device struct.
200 */
201 struct dmm32at_private {
202
203 int data;
204 int ai_inuse;
205 unsigned int ai_scans_left;
206
207 /* Used for AO readback */
208 unsigned int ao_readback[4];
209 unsigned char dio_config;
210
211 };
212
213 /*
214 * most drivers define the following macro to make it easy to
215 * access the private structure.
216 */
217 #define devpriv ((struct dmm32at_private *)dev->private)
218
219 /*
220 * The struct comedi_driver structure tells the Comedi core module
221 * which functions to call to configure/deconfigure (attach/detach)
222 * the board, and also about the kernel module that contains
223 * the device code.
224 */
225 static int dmm32at_attach(struct comedi_device *dev,
226 struct comedi_devconfig *it);
227 static int dmm32at_detach(struct comedi_device *dev);
228 static struct comedi_driver driver_dmm32at = {
229 .driver_name = "dmm32at",
230 .module = THIS_MODULE,
231 .attach = dmm32at_attach,
232 .detach = dmm32at_detach,
233 /* It is not necessary to implement the following members if you are
234 * writing a driver for a ISA PnP or PCI card */
235 /* Most drivers will support multiple types of boards by
236 * having an array of board structures. These were defined
237 * in dmm32at_boards[] above. Note that the element 'name'
238 * was first in the structure -- Comedi uses this fact to
239 * extract the name of the board without knowing any details
240 * about the structure except for its length.
241 * When a device is attached (by comedi_config), the name
242 * of the device is given to Comedi, and Comedi tries to
243 * match it by going through the list of board names. If
244 * there is a match, the address of the pointer is put
245 * into dev->board_ptr and driver->attach() is called.
246 *
247 * Note that these are not necessary if you can determine
248 * the type of board in software. ISA PnP, PCI, and PCMCIA
249 * devices are such boards.
250 */
251 .board_name = &dmm32at_boards[0].name,
252 .offset = sizeof(struct dmm32at_board),
253 .num_names = ARRAY_SIZE(dmm32at_boards),
254 };
255
256 /* prototypes for driver functions below */
257 static int dmm32at_ai_rinsn(struct comedi_device *dev,
258 struct comedi_subdevice *s,
259 struct comedi_insn *insn, unsigned int *data);
260 static int dmm32at_ao_winsn(struct comedi_device *dev,
261 struct comedi_subdevice *s,
262 struct comedi_insn *insn, unsigned int *data);
263 static int dmm32at_ao_rinsn(struct comedi_device *dev,
264 struct comedi_subdevice *s,
265 struct comedi_insn *insn, unsigned int *data);
266 static int dmm32at_dio_insn_bits(struct comedi_device *dev,
267 struct comedi_subdevice *s,
268 struct comedi_insn *insn, unsigned int *data);
269 static int dmm32at_dio_insn_config(struct comedi_device *dev,
270 struct comedi_subdevice *s,
271 struct comedi_insn *insn,
272 unsigned int *data);
273 static int dmm32at_ai_cmdtest(struct comedi_device *dev,
274 struct comedi_subdevice *s,
275 struct comedi_cmd *cmd);
276 static int dmm32at_ai_cmd(struct comedi_device *dev,
277 struct comedi_subdevice *s);
278 static int dmm32at_ai_cancel(struct comedi_device *dev,
279 struct comedi_subdevice *s);
280 static int dmm32at_ns_to_timer(unsigned int *ns, int round);
281 static irqreturn_t dmm32at_isr(int irq, void *d);
282 void dmm32at_setaitimer(struct comedi_device *dev, unsigned int nansec);
283
284 /*
285 * Attach is called by the Comedi core to configure the driver
286 * for a particular board. If you specified a board_name array
287 * in the driver structure, dev->board_ptr contains that
288 * address.
289 */
290 static int dmm32at_attach(struct comedi_device *dev,
291 struct comedi_devconfig *it)
292 {
293 int ret;
294 struct comedi_subdevice *s;
295 unsigned char aihi, ailo, fifostat, aistat, intstat, airback;
296 unsigned long iobase;
297 unsigned int irq;
298
299 iobase = it->options[0];
300 irq = it->options[1];
301
302 printk("comedi%d: dmm32at: attaching\n", dev->minor);
303 printk("dmm32at: probing at address 0x%04lx, irq %u\n", iobase, irq);
304
305 /* register address space */
306 if (!request_region(iobase, DMM32AT_MEMSIZE, thisboard->name)) {
307 printk("I/O port conflict\n");
308 return -EIO;
309 }
310 dev->iobase = iobase;
311
312 /* the following just makes sure the board is there and gets
313 it to a known state */
314
315 /* reset the board */
316 dmm_outb(dev, DMM32AT_CNTRL, DMM32AT_RESET);
317
318 /* allow a millisecond to reset */
319 udelay(1000);
320
321 /* zero scan and fifo control */
322 dmm_outb(dev, DMM32AT_FIFOCNTRL, 0x0);
323
324 /* zero interrupt and clock control */
325 dmm_outb(dev, DMM32AT_INTCLOCK, 0x0);
326
327 /* write a test channel range, the high 3 bits should drop */
328 dmm_outb(dev, DMM32AT_AILOW, 0x80);
329 dmm_outb(dev, DMM32AT_AIHIGH, 0xff);
330
331 /* set the range at 10v unipolar */
332 dmm_outb(dev, DMM32AT_AICONF, DMM32AT_RANGE_U10);
333
334 /* should take 10 us to settle, here's a hundred */
335 udelay(100);
336
337 /* read back the values */
338 ailo = dmm_inb(dev, DMM32AT_AILOW);
339 aihi = dmm_inb(dev, DMM32AT_AIHIGH);
340 fifostat = dmm_inb(dev, DMM32AT_FIFOSTAT);
341 aistat = dmm_inb(dev, DMM32AT_AISTAT);
342 intstat = dmm_inb(dev, DMM32AT_INTCLOCK);
343 airback = dmm_inb(dev, DMM32AT_AIRBACK);
344
345 printk("dmm32at: lo=0x%02x hi=0x%02x fifostat=0x%02x\n",
346 ailo, aihi, fifostat);
347 printk("dmm32at: aistat=0x%02x intstat=0x%02x airback=0x%02x\n",
348 aistat, intstat, airback);
349
350 if ((ailo != 0x00) || (aihi != 0x1f) || (fifostat != 0x80) ||
351 (aistat != 0x60 || (intstat != 0x00) || airback != 0x0c)) {
352 printk("dmmat32: board detection failed\n");
353 return -EIO;
354 }
355
356 /* board is there, register interrupt */
357 if (irq) {
358 ret = request_irq(irq, dmm32at_isr, 0, thisboard->name, dev);
359 if (ret < 0) {
360 printk("irq conflict\n");
361 return ret;
362 }
363 dev->irq = irq;
364 }
365
366 /*
367 * If you can probe the device to determine what device in a series
368 * it is, this is the place to do it. Otherwise, dev->board_ptr
369 * should already be initialized.
370 */
371 /* dev->board_ptr = dmm32at_probe(dev); */
372
373 /*
374 * Initialize dev->board_name. Note that we can use the "thisboard"
375 * macro now, since we just initialized it in the last line.
376 */
377 dev->board_name = thisboard->name;
378
379 /*
380 * Allocate the private structure area. alloc_private() is a
381 * convenient macro defined in comedidev.h.
382 */
383 if (alloc_private(dev, sizeof(struct dmm32at_private)) < 0)
384 return -ENOMEM;
385
386 /*
387 * Allocate the subdevice structures. alloc_subdevice() is a
388 * convenient macro defined in comedidev.h.
389 */
390 if (alloc_subdevices(dev, 3) < 0)
391 return -ENOMEM;
392
393 s = dev->subdevices + 0;
394 dev->read_subdev = s;
395 /* analog input subdevice */
396 s->type = COMEDI_SUBD_AI;
397 /* we support single-ended (ground) and differential */
398 s->subdev_flags = SDF_READABLE | SDF_GROUND | SDF_DIFF | SDF_CMD_READ;
399 s->n_chan = thisboard->ai_chans;
400 s->maxdata = (1 << thisboard->ai_bits) - 1;
401 s->range_table = thisboard->ai_ranges;
402 s->len_chanlist = 32; /* This is the maximum chanlist length that
403 the board can handle */
404 s->insn_read = dmm32at_ai_rinsn;
405 s->do_cmd = dmm32at_ai_cmd;
406 s->do_cmdtest = dmm32at_ai_cmdtest;
407 s->cancel = dmm32at_ai_cancel;
408
409 s = dev->subdevices + 1;
410 /* analog output subdevice */
411 s->type = COMEDI_SUBD_AO;
412 s->subdev_flags = SDF_WRITABLE;
413 s->n_chan = thisboard->ao_chans;
414 s->maxdata = (1 << thisboard->ao_bits) - 1;
415 s->range_table = thisboard->ao_ranges;
416 s->insn_write = dmm32at_ao_winsn;
417 s->insn_read = dmm32at_ao_rinsn;
418
419 s = dev->subdevices + 2;
420 /* digital i/o subdevice */
421 if (thisboard->have_dio) {
422
423 /* get access to the DIO regs */
424 dmm_outb(dev, DMM32AT_CNTRL, DMM32AT_DIOACC);
425 /* set the DIO's to the defualt input setting */
426 devpriv->dio_config = DMM32AT_DIRA | DMM32AT_DIRB |
427 DMM32AT_DIRCL | DMM32AT_DIRCH | DMM32AT_DIENABLE;
428 dmm_outb(dev, DMM32AT_DIOCONF, devpriv->dio_config);
429
430 /* set up the subdevice */
431 s->type = COMEDI_SUBD_DIO;
432 s->subdev_flags = SDF_READABLE | SDF_WRITABLE;
433 s->n_chan = thisboard->dio_chans;
434 s->maxdata = 1;
435 s->state = 0;
436 s->range_table = &range_digital;
437 s->insn_bits = dmm32at_dio_insn_bits;
438 s->insn_config = dmm32at_dio_insn_config;
439 } else {
440 s->type = COMEDI_SUBD_UNUSED;
441 }
442
443 /* success */
444 printk("comedi%d: dmm32at: attached\n", dev->minor);
445
446 return 1;
447
448 }
449
450 /*
451 * _detach is called to deconfigure a device. It should deallocate
452 * resources.
453 * This function is also called when _attach() fails, so it should be
454 * careful not to release resources that were not necessarily
455 * allocated by _attach(). dev->private and dev->subdevices are
456 * deallocated automatically by the core.
457 */
458 static int dmm32at_detach(struct comedi_device *dev)
459 {
460 printk("comedi%d: dmm32at: remove\n", dev->minor);
461 if (dev->irq)
462 free_irq(dev->irq, dev);
463 if (dev->iobase)
464 release_region(dev->iobase, DMM32AT_MEMSIZE);
465
466 return 0;
467 }
468
469 /*
470 * "instructions" read/write data in "one-shot" or "software-triggered"
471 * mode.
472 */
473
474 static int dmm32at_ai_rinsn(struct comedi_device *dev,
475 struct comedi_subdevice *s,
476 struct comedi_insn *insn, unsigned int *data)
477 {
478 int n, i;
479 unsigned int d;
480 unsigned char status;
481 unsigned short msb, lsb;
482 unsigned char chan;
483 int range;
484
485 /* get the channel and range number */
486
487 chan = CR_CHAN(insn->chanspec) & (s->n_chan - 1);
488 range = CR_RANGE(insn->chanspec);
489
490 /* printk("channel=0x%02x, range=%d\n",chan,range); */
491
492 /* zero scan and fifo control and reset fifo */
493 dmm_outb(dev, DMM32AT_FIFOCNTRL, DMM32AT_FIFORESET);
494
495 /* write the ai channel range regs */
496 dmm_outb(dev, DMM32AT_AILOW, chan);
497 dmm_outb(dev, DMM32AT_AIHIGH, chan);
498 /* set the range bits */
499 dmm_outb(dev, DMM32AT_AICONF, dmm32at_rangebits[range]);
500
501 /* wait for circuit to settle */
502 for (i = 0; i < 40000; i++) {
503 status = dmm_inb(dev, DMM32AT_AIRBACK);
504 if ((status & DMM32AT_STATUS) == 0)
505 break;
506 }
507 if (i == 40000) {
508 printk("timeout\n");
509 return -ETIMEDOUT;
510 }
511
512 /* convert n samples */
513 for (n = 0; n < insn->n; n++) {
514 /* trigger conversion */
515 dmm_outb(dev, DMM32AT_CONV, 0xff);
516 /* wait for conversion to end */
517 for (i = 0; i < 40000; i++) {
518 status = dmm_inb(dev, DMM32AT_AISTAT);
519 if ((status & DMM32AT_STATUS) == 0)
520 break;
521 }
522 if (i == 40000) {
523 printk("timeout\n");
524 return -ETIMEDOUT;
525 }
526
527 /* read data */
528 lsb = dmm_inb(dev, DMM32AT_AILSB);
529 msb = dmm_inb(dev, DMM32AT_AIMSB);
530
531 /* invert sign bit to make range unsigned, this is an
532 idiosyncracy of the diamond board, it return
533 conversions as a signed value, i.e. -32768 to
534 32767, flipping the bit and interpreting it as
535 signed gives you a range of 0 to 65535 which is
536 used by comedi */
537 d = ((msb ^ 0x0080) << 8) + lsb;
538
539 data[n] = d;
540 }
541
542 /* return the number of samples read/written */
543 return n;
544 }
545
546 static int dmm32at_ai_cmdtest(struct comedi_device *dev,
547 struct comedi_subdevice *s,
548 struct comedi_cmd *cmd)
549 {
550 int err = 0;
551 int tmp;
552 int start_chan, gain, i;
553
554 /* printk("dmmat32 in command test\n"); */
555
556 /* cmdtest tests a particular command to see if it is valid.
557 * Using the cmdtest ioctl, a user can create a valid cmd
558 * and then have it executes by the cmd ioctl.
559 *
560 * cmdtest returns 1,2,3,4 or 0, depending on which tests
561 * the command passes. */
562
563 /* step 1: make sure trigger sources are trivially valid */
564
565 tmp = cmd->start_src;
566 cmd->start_src &= TRIG_NOW;
567 if (!cmd->start_src || tmp != cmd->start_src)
568 err++;
569
570 tmp = cmd->scan_begin_src;
571 cmd->scan_begin_src &= TRIG_TIMER /*| TRIG_EXT */ ;
572 if (!cmd->scan_begin_src || tmp != cmd->scan_begin_src)
573 err++;
574
575 tmp = cmd->convert_src;
576 cmd->convert_src &= TRIG_TIMER /*| TRIG_EXT */ ;
577 if (!cmd->convert_src || tmp != cmd->convert_src)
578 err++;
579
580 tmp = cmd->scan_end_src;
581 cmd->scan_end_src &= TRIG_COUNT;
582 if (!cmd->scan_end_src || tmp != cmd->scan_end_src)
583 err++;
584
585 tmp = cmd->stop_src;
586 cmd->stop_src &= TRIG_COUNT | TRIG_NONE;
587 if (!cmd->stop_src || tmp != cmd->stop_src)
588 err++;
589
590 if (err)
591 return 1;
592
593 /* step 2: make sure trigger sources are unique and mutually compatible */
594
595 /* note that mutual compatibility is not an issue here */
596 if (cmd->scan_begin_src != TRIG_TIMER &&
597 cmd->scan_begin_src != TRIG_EXT)
598 err++;
599 if (cmd->convert_src != TRIG_TIMER && cmd->convert_src != TRIG_EXT)
600 err++;
601 if (cmd->stop_src != TRIG_COUNT && cmd->stop_src != TRIG_NONE)
602 err++;
603
604 if (err)
605 return 2;
606
607 /* step 3: make sure arguments are trivially compatible */
608
609 if (cmd->start_arg != 0) {
610 cmd->start_arg = 0;
611 err++;
612 }
613 #define MAX_SCAN_SPEED 1000000 /* in nanoseconds */
614 #define MIN_SCAN_SPEED 1000000000 /* in nanoseconds */
615
616 if (cmd->scan_begin_src == TRIG_TIMER) {
617 if (cmd->scan_begin_arg < MAX_SCAN_SPEED) {
618 cmd->scan_begin_arg = MAX_SCAN_SPEED;
619 err++;
620 }
621 if (cmd->scan_begin_arg > MIN_SCAN_SPEED) {
622 cmd->scan_begin_arg = MIN_SCAN_SPEED;
623 err++;
624 }
625 } else {
626 /* external trigger */
627 /* should be level/edge, hi/lo specification here */
628 /* should specify multiple external triggers */
629 if (cmd->scan_begin_arg > 9) {
630 cmd->scan_begin_arg = 9;
631 err++;
632 }
633 }
634 if (cmd->convert_src == TRIG_TIMER) {
635 if (cmd->convert_arg >= 17500)
636 cmd->convert_arg = 20000;
637 else if (cmd->convert_arg >= 12500)
638 cmd->convert_arg = 15000;
639 else if (cmd->convert_arg >= 7500)
640 cmd->convert_arg = 10000;
641 else
642 cmd->convert_arg = 5000;
643
644 } else {
645 /* external trigger */
646 /* see above */
647 if (cmd->convert_arg > 9) {
648 cmd->convert_arg = 9;
649 err++;
650 }
651 }
652
653 if (cmd->scan_end_arg != cmd->chanlist_len) {
654 cmd->scan_end_arg = cmd->chanlist_len;
655 err++;
656 }
657 if (cmd->stop_src == TRIG_COUNT) {
658 if (cmd->stop_arg > 0xfffffff0) {
659 cmd->stop_arg = 0xfffffff0;
660 err++;
661 }
662 if (cmd->stop_arg == 0) {
663 cmd->stop_arg = 1;
664 err++;
665 }
666 } else {
667 /* TRIG_NONE */
668 if (cmd->stop_arg != 0) {
669 cmd->stop_arg = 0;
670 err++;
671 }
672 }
673
674 if (err)
675 return 3;
676
677 /* step 4: fix up any arguments */
678
679 if (cmd->scan_begin_src == TRIG_TIMER) {
680 tmp = cmd->scan_begin_arg;
681 dmm32at_ns_to_timer(&cmd->scan_begin_arg,
682 cmd->flags & TRIG_ROUND_MASK);
683 if (tmp != cmd->scan_begin_arg)
684 err++;
685 }
686 if (cmd->convert_src == TRIG_TIMER) {
687 tmp = cmd->convert_arg;
688 dmm32at_ns_to_timer(&cmd->convert_arg,
689 cmd->flags & TRIG_ROUND_MASK);
690 if (tmp != cmd->convert_arg)
691 err++;
692 if (cmd->scan_begin_src == TRIG_TIMER &&
693 cmd->scan_begin_arg <
694 cmd->convert_arg * cmd->scan_end_arg) {
695 cmd->scan_begin_arg =
696 cmd->convert_arg * cmd->scan_end_arg;
697 err++;
698 }
699 }
700
701 if (err)
702 return 4;
703
704 /* step 5 check the channel list, the channel list for this
705 board must be consecutive and gains must be the same */
706
707 if (cmd->chanlist) {
708 gain = CR_RANGE(cmd->chanlist[0]);
709 start_chan = CR_CHAN(cmd->chanlist[0]);
710 for (i = 1; i < cmd->chanlist_len; i++) {
711 if (CR_CHAN(cmd->chanlist[i]) !=
712 (start_chan + i) % s->n_chan) {
713 comedi_error(dev,
714 "entries in chanlist must be consecutive channels, counting upwards\n");
715 err++;
716 }
717 if (CR_RANGE(cmd->chanlist[i]) != gain) {
718 comedi_error(dev,
719 "entries in chanlist must all have the same gain\n");
720 err++;
721 }
722 }
723 }
724
725 if (err)
726 return 5;
727
728 return 0;
729 }
730
731 static int dmm32at_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
732 {
733 struct comedi_cmd *cmd = &s->async->cmd;
734 int i, range;
735 unsigned char chanlo, chanhi, status;
736
737 if (!cmd->chanlist)
738 return -EINVAL;
739
740 /* get the channel list and range */
741 chanlo = CR_CHAN(cmd->chanlist[0]) & (s->n_chan - 1);
742 chanhi = chanlo + cmd->chanlist_len - 1;
743 if (chanhi >= s->n_chan)
744 return -EINVAL;
745 range = CR_RANGE(cmd->chanlist[0]);
746
747 /* reset fifo */
748 dmm_outb(dev, DMM32AT_FIFOCNTRL, DMM32AT_FIFORESET);
749
750 /* set scan enable */
751 dmm_outb(dev, DMM32AT_FIFOCNTRL, DMM32AT_SCANENABLE);
752
753 /* write the ai channel range regs */
754 dmm_outb(dev, DMM32AT_AILOW, chanlo);
755 dmm_outb(dev, DMM32AT_AIHIGH, chanhi);
756
757 /* set the range bits */
758 dmm_outb(dev, DMM32AT_AICONF, dmm32at_rangebits[range]);
759
760 /* reset the interrupt just in case */
761 dmm_outb(dev, DMM32AT_CNTRL, DMM32AT_INTRESET);
762
763 if (cmd->stop_src == TRIG_COUNT)
764 devpriv->ai_scans_left = cmd->stop_arg;
765 else { /* TRIG_NONE */
766 devpriv->ai_scans_left = 0xffffffff; /* indicates TRIG_NONE to isr */
767 }
768
769 /* wait for circuit to settle */
770 for (i = 0; i < 40000; i++) {
771 status = dmm_inb(dev, DMM32AT_AIRBACK);
772 if ((status & DMM32AT_STATUS) == 0)
773 break;
774 }
775 if (i == 40000) {
776 printk("timeout\n");
777 return -ETIMEDOUT;
778 }
779
780 if (devpriv->ai_scans_left > 1) {
781 /* start the clock and enable the interrupts */
782 dmm32at_setaitimer(dev, cmd->scan_begin_arg);
783 } else {
784 /* start the interrups and initiate a single scan */
785 dmm_outb(dev, DMM32AT_INTCLOCK, DMM32AT_ADINT);
786 dmm_outb(dev, DMM32AT_CONV, 0xff);
787 }
788
789 /* printk("dmmat32 in command\n"); */
790
791 /* for(i=0;i<cmd->chanlist_len;i++) */
792 /* comedi_buf_put(s->async,i*100); */
793
794 /* s->async->events |= COMEDI_CB_EOA; */
795 /* comedi_event(dev, s); */
796
797 return 0;
798
799 }
800
801 static int dmm32at_ai_cancel(struct comedi_device *dev,
802 struct comedi_subdevice *s)
803 {
804 devpriv->ai_scans_left = 1;
805 return 0;
806 }
807
808 static irqreturn_t dmm32at_isr(int irq, void *d)
809 {
810 unsigned char intstat;
811 unsigned int samp;
812 unsigned short msb, lsb;
813 int i;
814 struct comedi_device *dev = d;
815
816 if (!dev->attached) {
817 comedi_error(dev, "spurious interrupt");
818 return IRQ_HANDLED;
819 }
820
821 intstat = dmm_inb(dev, DMM32AT_INTCLOCK);
822
823 if (intstat & DMM32AT_ADINT) {
824 struct comedi_subdevice *s = dev->read_subdev;
825 struct comedi_cmd *cmd = &s->async->cmd;
826
827 for (i = 0; i < cmd->chanlist_len; i++) {
828 /* read data */
829 lsb = dmm_inb(dev, DMM32AT_AILSB);
830 msb = dmm_inb(dev, DMM32AT_AIMSB);
831
832 /* invert sign bit to make range unsigned */
833 samp = ((msb ^ 0x0080) << 8) + lsb;
834 comedi_buf_put(s->async, samp);
835 }
836
837 if (devpriv->ai_scans_left != 0xffffffff) { /* TRIG_COUNT */
838 devpriv->ai_scans_left--;
839 if (devpriv->ai_scans_left == 0) {
840 /* disable further interrupts and clocks */
841 dmm_outb(dev, DMM32AT_INTCLOCK, 0x0);
842 /* set the buffer to be flushed with an EOF */
843 s->async->events |= COMEDI_CB_EOA;
844 }
845
846 }
847 /* flush the buffer */
848 comedi_event(dev, s);
849 }
850
851 /* reset the interrupt */
852 dmm_outb(dev, DMM32AT_CNTRL, DMM32AT_INTRESET);
853 return IRQ_HANDLED;
854 }
855
856 /* This function doesn't require a particular form, this is just
857 * what happens to be used in some of the drivers. It should
858 * convert ns nanoseconds to a counter value suitable for programming
859 * the device. Also, it should adjust ns so that it cooresponds to
860 * the actual time that the device will use. */
861 static int dmm32at_ns_to_timer(unsigned int *ns, int round)
862 {
863 /* trivial timer */
864 /* if your timing is done through two cascaded timers, the
865 * i8253_cascade_ns_to_timer() function in 8253.h can be
866 * very helpful. There are also i8254_load() and i8254_mm_load()
867 * which can be used to load values into the ubiquitous 8254 counters
868 */
869
870 return *ns;
871 }
872
873 static int dmm32at_ao_winsn(struct comedi_device *dev,
874 struct comedi_subdevice *s,
875 struct comedi_insn *insn, unsigned int *data)
876 {
877 int i;
878 int chan = CR_CHAN(insn->chanspec);
879 unsigned char hi, lo, status;
880
881 /* Writing a list of values to an AO channel is probably not
882 * very useful, but that's how the interface is defined. */
883 for (i = 0; i < insn->n; i++) {
884
885 devpriv->ao_readback[chan] = data[i];
886
887 /* get the low byte */
888 lo = data[i] & 0x00ff;
889 /* high byte also contains channel number */
890 hi = (data[i] >> 8) + chan * (1 << 6);
891 /* printk("writing 0x%02x 0x%02x\n",hi,lo); */
892 /* write the low and high values to the board */
893 dmm_outb(dev, DMM32AT_DACLSB, lo);
894 dmm_outb(dev, DMM32AT_DACMSB, hi);
895
896 /* wait for circuit to settle */
897 for (i = 0; i < 40000; i++) {
898 status = dmm_inb(dev, DMM32AT_DACSTAT);
899 if ((status & DMM32AT_DACBUSY) == 0)
900 break;
901 }
902 if (i == 40000) {
903 printk("timeout\n");
904 return -ETIMEDOUT;
905 }
906 /* dummy read to update trigger the output */
907 status = dmm_inb(dev, DMM32AT_DACMSB);
908
909 }
910
911 /* return the number of samples read/written */
912 return i;
913 }
914
915 /* AO subdevices should have a read insn as well as a write insn.
916 * Usually this means copying a value stored in devpriv. */
917 static int dmm32at_ao_rinsn(struct comedi_device *dev,
918 struct comedi_subdevice *s,
919 struct comedi_insn *insn, unsigned int *data)
920 {
921 int i;
922 int chan = CR_CHAN(insn->chanspec);
923
924 for (i = 0; i < insn->n; i++)
925 data[i] = devpriv->ao_readback[chan];
926
927 return i;
928 }
929
930 /* DIO devices are slightly special. Although it is possible to
931 * implement the insn_read/insn_write interface, it is much more
932 * useful to applications if you implement the insn_bits interface.
933 * This allows packed reading/writing of the DIO channels. The
934 * comedi core can convert between insn_bits and insn_read/write */
935 static int dmm32at_dio_insn_bits(struct comedi_device *dev,
936 struct comedi_subdevice *s,
937 struct comedi_insn *insn, unsigned int *data)
938 {
939 unsigned char diobits;
940
941 if (insn->n != 2)
942 return -EINVAL;
943
944 /* The insn data is a mask in data[0] and the new data
945 * in data[1], each channel cooresponding to a bit. */
946 if (data[0]) {
947 s->state &= ~data[0];
948 s->state |= data[0] & data[1];
949 /* Write out the new digital output lines */
950 /* outw(s->state,dev->iobase + DMM32AT_DIO); */
951 }
952
953 /* get access to the DIO regs */
954 dmm_outb(dev, DMM32AT_CNTRL, DMM32AT_DIOACC);
955
956 /* if either part of dio is set for output */
957 if (((devpriv->dio_config & DMM32AT_DIRCL) == 0) ||
958 ((devpriv->dio_config & DMM32AT_DIRCH) == 0)) {
959 diobits = (s->state & 0x00ff0000) >> 16;
960 dmm_outb(dev, DMM32AT_DIOC, diobits);
961 }
962 if ((devpriv->dio_config & DMM32AT_DIRB) == 0) {
963 diobits = (s->state & 0x0000ff00) >> 8;
964 dmm_outb(dev, DMM32AT_DIOB, diobits);
965 }
966 if ((devpriv->dio_config & DMM32AT_DIRA) == 0) {
967 diobits = (s->state & 0x000000ff);
968 dmm_outb(dev, DMM32AT_DIOA, diobits);
969 }
970
971 /* now read the state back in */
972 s->state = dmm_inb(dev, DMM32AT_DIOC);
973 s->state <<= 8;
974 s->state |= dmm_inb(dev, DMM32AT_DIOB);
975 s->state <<= 8;
976 s->state |= dmm_inb(dev, DMM32AT_DIOA);
977 data[1] = s->state;
978
979 /* on return, data[1] contains the value of the digital
980 * input and output lines. */
981 /* data[1]=inw(dev->iobase + DMM32AT_DIO); */
982 /* or we could just return the software copy of the output values if
983 * it was a purely digital output subdevice */
984 /* data[1]=s->state; */
985
986 return 2;
987 }
988
989 static int dmm32at_dio_insn_config(struct comedi_device *dev,
990 struct comedi_subdevice *s,
991 struct comedi_insn *insn, unsigned int *data)
992 {
993 unsigned char chanbit;
994 int chan = CR_CHAN(insn->chanspec);
995
996 if (insn->n != 1)
997 return -EINVAL;
998
999 if (chan < 8)
1000 chanbit = DMM32AT_DIRA;
1001 else if (chan < 16)
1002 chanbit = DMM32AT_DIRB;
1003 else if (chan < 20)
1004 chanbit = DMM32AT_DIRCL;
1005 else
1006 chanbit = DMM32AT_DIRCH;
1007
1008 /* The input or output configuration of each digital line is
1009 * configured by a special insn_config instruction. chanspec
1010 * contains the channel to be changed, and data[0] contains the
1011 * value COMEDI_INPUT or COMEDI_OUTPUT. */
1012
1013 /* if output clear the bit, otherwise set it */
1014 if (data[0] == COMEDI_OUTPUT)
1015 devpriv->dio_config &= ~chanbit;
1016 else
1017 devpriv->dio_config |= chanbit;
1018 /* get access to the DIO regs */
1019 dmm_outb(dev, DMM32AT_CNTRL, DMM32AT_DIOACC);
1020 /* set the DIO's to the new configuration setting */
1021 dmm_outb(dev, DMM32AT_DIOCONF, devpriv->dio_config);
1022
1023 return 1;
1024 }
1025
1026 void dmm32at_setaitimer(struct comedi_device *dev, unsigned int nansec)
1027 {
1028 unsigned char lo1, lo2, hi2;
1029 unsigned short both2;
1030
1031 /* based on 10mhz clock */
1032 lo1 = 200;
1033 both2 = nansec / 20000;
1034 hi2 = (both2 & 0xff00) >> 8;
1035 lo2 = both2 & 0x00ff;
1036
1037 /* set the counter frequency to 10mhz */
1038 dmm_outb(dev, DMM32AT_CNTRDIO, 0);
1039
1040 /* get access to the clock regs */
1041 dmm_outb(dev, DMM32AT_CNTRL, DMM32AT_CLKACC);
1042
1043 /* write the counter 1 control word and low byte to counter */
1044 dmm_outb(dev, DMM32AT_CLKCT, DMM32AT_CLKCT1);
1045 dmm_outb(dev, DMM32AT_CLK1, lo1);
1046
1047 /* write the counter 2 control word and low byte then to counter */
1048 dmm_outb(dev, DMM32AT_CLKCT, DMM32AT_CLKCT2);
1049 dmm_outb(dev, DMM32AT_CLK2, lo2);
1050 dmm_outb(dev, DMM32AT_CLK2, hi2);
1051
1052 /* enable the ai conversion interrupt and the clock to start scans */
1053 dmm_outb(dev, DMM32AT_INTCLOCK, DMM32AT_ADINT | DMM32AT_CLKSEL);
1054
1055 }
1056
1057 /*
1058 * A convenient macro that defines init_module() and cleanup_module(),
1059 * as necessary.
1060 */
1061 static int __init driver_dmm32at_init_module(void)
1062 {
1063 return comedi_driver_register(&driver_dmm32at);
1064 }
1065
1066 static void __exit driver_dmm32at_cleanup_module(void)
1067 {
1068 comedi_driver_unregister(&driver_dmm32at);
1069 }
1070
1071 module_init(driver_dmm32at_init_module);
1072 module_exit(driver_dmm32at_cleanup_module);
1073
1074 MODULE_AUTHOR("Comedi http://www.comedi.org");
1075 MODULE_DESCRIPTION("Comedi low-level driver");
1076 MODULE_LICENSE("GPL");
This page took 0.053279 seconds and 5 git commands to generate.