staging: delete non-required instances of include <linux/init.h>
[deliverable/linux.git] / drivers / staging / comedi / drivers / dt9812.c
1 /*
2 * comedi/drivers/dt9812.c
3 * COMEDI driver for DataTranslation DT9812 USB module
4 *
5 * Copyright (C) 2005 Anders Blomdell <anders.blomdell@control.lth.se>
6 *
7 * COMEDI - Linux Control and Measurement Device Interface
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 */
19
20 /*
21 Driver: dt9812
22 Description: Data Translation DT9812 USB module
23 Author: anders.blomdell@control.lth.se (Anders Blomdell)
24 Status: in development
25 Devices: [Data Translation] DT9812 (dt9812)
26 Updated: Sun Nov 20 20:18:34 EST 2005
27
28 This driver works, but bulk transfers not implemented. Might be a starting point
29 for someone else. I found out too late that USB has too high latencies (>1 ms)
30 for my needs.
31 */
32
33 /*
34 * Nota Bene:
35 * 1. All writes to command pipe has to be 32 bytes (ISP1181B SHRTP=0 ?)
36 * 2. The DDK source (as of sep 2005) is in error regarding the
37 * input MUX bits (example code says P4, but firmware schematics
38 * says P1).
39 */
40
41 #include <linux/kernel.h>
42 #include <linux/module.h>
43 #include <linux/errno.h>
44 #include <linux/uaccess.h>
45 #include <linux/usb.h>
46
47 #include "../comedidev.h"
48
49 #define DT9812_DIAGS_BOARD_INFO_ADDR 0xFBFF
50 #define DT9812_MAX_WRITE_CMD_PIPE_SIZE 32
51 #define DT9812_MAX_READ_CMD_PIPE_SIZE 32
52
53 /* usb_bulk_msg() timout in milliseconds */
54 #define DT9812_USB_TIMEOUT 1000
55
56 /*
57 * See Silican Laboratories C8051F020/1/2/3 manual
58 */
59 #define F020_SFR_P4 0x84
60 #define F020_SFR_P1 0x90
61 #define F020_SFR_P2 0xa0
62 #define F020_SFR_P3 0xb0
63 #define F020_SFR_AMX0CF 0xba
64 #define F020_SFR_AMX0SL 0xbb
65 #define F020_SFR_ADC0CF 0xbc
66 #define F020_SFR_ADC0L 0xbe
67 #define F020_SFR_ADC0H 0xbf
68 #define F020_SFR_DAC0L 0xd2
69 #define F020_SFR_DAC0H 0xd3
70 #define F020_SFR_DAC0CN 0xd4
71 #define F020_SFR_DAC1L 0xd5
72 #define F020_SFR_DAC1H 0xd6
73 #define F020_SFR_DAC1CN 0xd7
74 #define F020_SFR_ADC0CN 0xe8
75
76 #define F020_MASK_ADC0CF_AMP0GN0 0x01
77 #define F020_MASK_ADC0CF_AMP0GN1 0x02
78 #define F020_MASK_ADC0CF_AMP0GN2 0x04
79
80 #define F020_MASK_ADC0CN_AD0EN 0x80
81 #define F020_MASK_ADC0CN_AD0INT 0x20
82 #define F020_MASK_ADC0CN_AD0BUSY 0x10
83
84 #define F020_MASK_DACxCN_DACxEN 0x80
85
86 enum {
87 /* A/D D/A DI DO CT */
88 DT9812_DEVID_DT9812_10, /* 8 2 8 8 1 +/- 10V */
89 DT9812_DEVID_DT9812_2PT5, /* 8 2 8 8 1 0-2.44V */
90 };
91
92 enum dt9812_gain {
93 DT9812_GAIN_0PT25 = 1,
94 DT9812_GAIN_0PT5 = 2,
95 DT9812_GAIN_1 = 4,
96 DT9812_GAIN_2 = 8,
97 DT9812_GAIN_4 = 16,
98 DT9812_GAIN_8 = 32,
99 DT9812_GAIN_16 = 64,
100 };
101
102 enum {
103 DT9812_LEAST_USB_FIRMWARE_CMD_CODE = 0,
104 /* Write Flash memory */
105 DT9812_W_FLASH_DATA = 0,
106 /* Read Flash memory misc config info */
107 DT9812_R_FLASH_DATA = 1,
108
109 /*
110 * Register read/write commands for processor
111 */
112
113 /* Read a single byte of USB memory */
114 DT9812_R_SINGLE_BYTE_REG = 2,
115 /* Write a single byte of USB memory */
116 DT9812_W_SINGLE_BYTE_REG = 3,
117 /* Multiple Reads of USB memory */
118 DT9812_R_MULTI_BYTE_REG = 4,
119 /* Multiple Writes of USB memory */
120 DT9812_W_MULTI_BYTE_REG = 5,
121 /* Read, (AND) with mask, OR value, then write (single) */
122 DT9812_RMW_SINGLE_BYTE_REG = 6,
123 /* Read, (AND) with mask, OR value, then write (multiple) */
124 DT9812_RMW_MULTI_BYTE_REG = 7,
125
126 /*
127 * Register read/write commands for SMBus
128 */
129
130 /* Read a single byte of SMBus */
131 DT9812_R_SINGLE_BYTE_SMBUS = 8,
132 /* Write a single byte of SMBus */
133 DT9812_W_SINGLE_BYTE_SMBUS = 9,
134 /* Multiple Reads of SMBus */
135 DT9812_R_MULTI_BYTE_SMBUS = 10,
136 /* Multiple Writes of SMBus */
137 DT9812_W_MULTI_BYTE_SMBUS = 11,
138
139 /*
140 * Register read/write commands for a device
141 */
142
143 /* Read a single byte of a device */
144 DT9812_R_SINGLE_BYTE_DEV = 12,
145 /* Write a single byte of a device */
146 DT9812_W_SINGLE_BYTE_DEV = 13,
147 /* Multiple Reads of a device */
148 DT9812_R_MULTI_BYTE_DEV = 14,
149 /* Multiple Writes of a device */
150 DT9812_W_MULTI_BYTE_DEV = 15,
151
152 /* Not sure if we'll need this */
153 DT9812_W_DAC_THRESHOLD = 16,
154
155 /* Set interrupt on change mask */
156 DT9812_W_INT_ON_CHANGE_MASK = 17,
157
158 /* Write (or Clear) the CGL for the ADC */
159 DT9812_W_CGL = 18,
160 /* Multiple Reads of USB memory */
161 DT9812_R_MULTI_BYTE_USBMEM = 19,
162 /* Multiple Writes to USB memory */
163 DT9812_W_MULTI_BYTE_USBMEM = 20,
164
165 /* Issue a start command to a given subsystem */
166 DT9812_START_SUBSYSTEM = 21,
167 /* Issue a stop command to a given subsystem */
168 DT9812_STOP_SUBSYSTEM = 22,
169
170 /* calibrate the board using CAL_POT_CMD */
171 DT9812_CALIBRATE_POT = 23,
172 /* set the DAC FIFO size */
173 DT9812_W_DAC_FIFO_SIZE = 24,
174 /* Write or Clear the CGL for the DAC */
175 DT9812_W_CGL_DAC = 25,
176 /* Read a single value from a subsystem */
177 DT9812_R_SINGLE_VALUE_CMD = 26,
178 /* Write a single value to a subsystem */
179 DT9812_W_SINGLE_VALUE_CMD = 27,
180 /* Valid DT9812_USB_FIRMWARE_CMD_CODE's will be less than this number */
181 DT9812_MAX_USB_FIRMWARE_CMD_CODE,
182 };
183
184 struct dt9812_flash_data {
185 __le16 numbytes;
186 __le16 address;
187 };
188
189 #define DT9812_MAX_NUM_MULTI_BYTE_RDS \
190 ((DT9812_MAX_WRITE_CMD_PIPE_SIZE - 4 - 1) / sizeof(u8))
191
192 struct dt9812_read_multi {
193 u8 count;
194 u8 address[DT9812_MAX_NUM_MULTI_BYTE_RDS];
195 };
196
197 struct dt9812_write_byte {
198 u8 address;
199 u8 value;
200 };
201
202 #define DT9812_MAX_NUM_MULTI_BYTE_WRTS \
203 ((DT9812_MAX_WRITE_CMD_PIPE_SIZE - 4 - 1) / \
204 sizeof(struct dt9812_write_byte))
205
206 struct dt9812_write_multi {
207 u8 count;
208 struct dt9812_write_byte write[DT9812_MAX_NUM_MULTI_BYTE_WRTS];
209 };
210
211 struct dt9812_rmw_byte {
212 u8 address;
213 u8 and_mask;
214 u8 or_value;
215 };
216
217 #define DT9812_MAX_NUM_MULTI_BYTE_RMWS \
218 ((DT9812_MAX_WRITE_CMD_PIPE_SIZE - 4 - 1) / \
219 sizeof(struct dt9812_rmw_byte))
220
221 struct dt9812_rmw_multi {
222 u8 count;
223 struct dt9812_rmw_byte rmw[DT9812_MAX_NUM_MULTI_BYTE_RMWS];
224 };
225
226 struct dt9812_usb_cmd {
227 __le32 cmd;
228 union {
229 struct dt9812_flash_data flash_data_info;
230 struct dt9812_read_multi read_multi_info;
231 struct dt9812_write_multi write_multi_info;
232 struct dt9812_rmw_multi rmw_multi_info;
233 } u;
234 };
235
236 struct dt9812_private {
237 struct semaphore sem;
238 struct {
239 __u8 addr;
240 size_t size;
241 } cmd_wr, cmd_rd;
242 u16 device;
243 u16 ao_shadow[2];
244 };
245
246 static int dt9812_read_info(struct comedi_device *dev,
247 int offset, void *buf, size_t buf_size)
248 {
249 struct usb_device *usb = comedi_to_usb_dev(dev);
250 struct dt9812_private *devpriv = dev->private;
251 struct dt9812_usb_cmd cmd;
252 int count, ret;
253
254 cmd.cmd = cpu_to_le32(DT9812_R_FLASH_DATA);
255 cmd.u.flash_data_info.address =
256 cpu_to_le16(DT9812_DIAGS_BOARD_INFO_ADDR + offset);
257 cmd.u.flash_data_info.numbytes = cpu_to_le16(buf_size);
258
259 /* DT9812 only responds to 32 byte writes!! */
260 ret = usb_bulk_msg(usb, usb_sndbulkpipe(usb, devpriv->cmd_wr.addr),
261 &cmd, 32, &count, DT9812_USB_TIMEOUT);
262 if (ret)
263 return ret;
264
265 return usb_bulk_msg(usb, usb_rcvbulkpipe(usb, devpriv->cmd_rd.addr),
266 buf, buf_size, &count, DT9812_USB_TIMEOUT);
267 }
268
269 static int dt9812_read_multiple_registers(struct comedi_device *dev,
270 int reg_count, u8 *address,
271 u8 *value)
272 {
273 struct usb_device *usb = comedi_to_usb_dev(dev);
274 struct dt9812_private *devpriv = dev->private;
275 struct dt9812_usb_cmd cmd;
276 int i, count, ret;
277
278 cmd.cmd = cpu_to_le32(DT9812_R_MULTI_BYTE_REG);
279 cmd.u.read_multi_info.count = reg_count;
280 for (i = 0; i < reg_count; i++)
281 cmd.u.read_multi_info.address[i] = address[i];
282
283 /* DT9812 only responds to 32 byte writes!! */
284 ret = usb_bulk_msg(usb, usb_sndbulkpipe(usb, devpriv->cmd_wr.addr),
285 &cmd, 32, &count, DT9812_USB_TIMEOUT);
286 if (ret)
287 return ret;
288
289 return usb_bulk_msg(usb, usb_rcvbulkpipe(usb, devpriv->cmd_rd.addr),
290 value, reg_count, &count, DT9812_USB_TIMEOUT);
291 }
292
293 static int dt9812_write_multiple_registers(struct comedi_device *dev,
294 int reg_count, u8 *address,
295 u8 *value)
296 {
297 struct usb_device *usb = comedi_to_usb_dev(dev);
298 struct dt9812_private *devpriv = dev->private;
299 struct dt9812_usb_cmd cmd;
300 int i, count;
301
302 cmd.cmd = cpu_to_le32(DT9812_W_MULTI_BYTE_REG);
303 cmd.u.read_multi_info.count = reg_count;
304 for (i = 0; i < reg_count; i++) {
305 cmd.u.write_multi_info.write[i].address = address[i];
306 cmd.u.write_multi_info.write[i].value = value[i];
307 }
308
309 /* DT9812 only responds to 32 byte writes!! */
310 return usb_bulk_msg(usb, usb_sndbulkpipe(usb, devpriv->cmd_wr.addr),
311 &cmd, 32, &count, DT9812_USB_TIMEOUT);
312 }
313
314 static int dt9812_rmw_multiple_registers(struct comedi_device *dev,
315 int reg_count,
316 struct dt9812_rmw_byte *rmw)
317 {
318 struct usb_device *usb = comedi_to_usb_dev(dev);
319 struct dt9812_private *devpriv = dev->private;
320 struct dt9812_usb_cmd cmd;
321 int i, count;
322
323 cmd.cmd = cpu_to_le32(DT9812_RMW_MULTI_BYTE_REG);
324 cmd.u.rmw_multi_info.count = reg_count;
325 for (i = 0; i < reg_count; i++)
326 cmd.u.rmw_multi_info.rmw[i] = rmw[i];
327
328 /* DT9812 only responds to 32 byte writes!! */
329 return usb_bulk_msg(usb, usb_sndbulkpipe(usb, devpriv->cmd_wr.addr),
330 &cmd, 32, &count, DT9812_USB_TIMEOUT);
331 }
332
333 static int dt9812_digital_in(struct comedi_device *dev, u8 *bits)
334 {
335 struct dt9812_private *devpriv = dev->private;
336 u8 reg[2] = { F020_SFR_P3, F020_SFR_P1 };
337 u8 value[2];
338 int ret;
339
340 down(&devpriv->sem);
341 ret = dt9812_read_multiple_registers(dev, 2, reg, value);
342 if (ret == 0) {
343 /*
344 * bits 0-6 in F020_SFR_P3 are bits 0-6 in the digital
345 * input port bit 3 in F020_SFR_P1 is bit 7 in the
346 * digital input port
347 */
348 *bits = (value[0] & 0x7f) | ((value[1] & 0x08) << 4);
349 }
350 up(&devpriv->sem);
351
352 return ret;
353 }
354
355 static int dt9812_digital_out(struct comedi_device *dev, u8 bits)
356 {
357 struct dt9812_private *devpriv = dev->private;
358 u8 reg[1] = { F020_SFR_P2 };
359 u8 value[1] = { bits };
360 int ret;
361
362 down(&devpriv->sem);
363 ret = dt9812_write_multiple_registers(dev, 1, reg, value);
364 up(&devpriv->sem);
365
366 return ret;
367 }
368
369 static void dt9812_configure_mux(struct comedi_device *dev,
370 struct dt9812_rmw_byte *rmw, int channel)
371 {
372 struct dt9812_private *devpriv = dev->private;
373
374 if (devpriv->device == DT9812_DEVID_DT9812_10) {
375 /* In the DT9812/10V MUX is selected by P1.5-7 */
376 rmw->address = F020_SFR_P1;
377 rmw->and_mask = 0xe0;
378 rmw->or_value = channel << 5;
379 } else {
380 /* In the DT9812/2.5V, internal mux is selected by bits 0:2 */
381 rmw->address = F020_SFR_AMX0SL;
382 rmw->and_mask = 0xff;
383 rmw->or_value = channel & 0x07;
384 }
385 }
386
387 static void dt9812_configure_gain(struct comedi_device *dev,
388 struct dt9812_rmw_byte *rmw,
389 enum dt9812_gain gain)
390 {
391 struct dt9812_private *devpriv = dev->private;
392
393 /* In the DT9812/10V, there is an external gain of 0.5 */
394 if (devpriv->device == DT9812_DEVID_DT9812_10)
395 gain <<= 1;
396
397 rmw->address = F020_SFR_ADC0CF;
398 rmw->and_mask = F020_MASK_ADC0CF_AMP0GN2 |
399 F020_MASK_ADC0CF_AMP0GN1 |
400 F020_MASK_ADC0CF_AMP0GN0;
401
402 switch (gain) {
403 /*
404 * 000 -> Gain = 1
405 * 001 -> Gain = 2
406 * 010 -> Gain = 4
407 * 011 -> Gain = 8
408 * 10x -> Gain = 16
409 * 11x -> Gain = 0.5
410 */
411 case DT9812_GAIN_0PT5:
412 rmw->or_value = F020_MASK_ADC0CF_AMP0GN2 |
413 F020_MASK_ADC0CF_AMP0GN1;
414 break;
415 default:
416 /* this should never happen, just use a gain of 1 */
417 case DT9812_GAIN_1:
418 rmw->or_value = 0x00;
419 break;
420 case DT9812_GAIN_2:
421 rmw->or_value = F020_MASK_ADC0CF_AMP0GN0;
422 break;
423 case DT9812_GAIN_4:
424 rmw->or_value = F020_MASK_ADC0CF_AMP0GN1;
425 break;
426 case DT9812_GAIN_8:
427 rmw->or_value = F020_MASK_ADC0CF_AMP0GN1 |
428 F020_MASK_ADC0CF_AMP0GN0;
429 break;
430 case DT9812_GAIN_16:
431 rmw->or_value = F020_MASK_ADC0CF_AMP0GN2;
432 break;
433 }
434 }
435
436 static int dt9812_analog_in(struct comedi_device *dev,
437 int channel, u16 *value, enum dt9812_gain gain)
438 {
439 struct dt9812_private *devpriv = dev->private;
440 struct dt9812_rmw_byte rmw[3];
441 u8 reg[3] = {
442 F020_SFR_ADC0CN,
443 F020_SFR_ADC0H,
444 F020_SFR_ADC0L
445 };
446 u8 val[3];
447 int ret;
448
449 down(&devpriv->sem);
450
451 /* 1 select the gain */
452 dt9812_configure_gain(dev, &rmw[0], gain);
453
454 /* 2 set the MUX to select the channel */
455 dt9812_configure_mux(dev, &rmw[1], channel);
456
457 /* 3 start conversion */
458 rmw[2].address = F020_SFR_ADC0CN;
459 rmw[2].and_mask = 0xff;
460 rmw[2].or_value = F020_MASK_ADC0CN_AD0EN | F020_MASK_ADC0CN_AD0BUSY;
461
462 ret = dt9812_rmw_multiple_registers(dev, 3, rmw);
463 if (ret)
464 goto exit;
465
466 /* read the status and ADC */
467 ret = dt9812_read_multiple_registers(dev, 3, reg, val);
468 if (ret)
469 goto exit;
470
471 /*
472 * An ADC conversion takes 16 SAR clocks cycles, i.e. about 9us.
473 * Therefore, between the instant that AD0BUSY was set via
474 * dt9812_rmw_multiple_registers and the read of AD0BUSY via
475 * dt9812_read_multiple_registers, the conversion should be complete
476 * since these two operations require two USB transactions each taking
477 * at least a millisecond to complete. However, lets make sure that
478 * conversion is finished.
479 */
480 if ((val[0] & (F020_MASK_ADC0CN_AD0INT | F020_MASK_ADC0CN_AD0BUSY)) ==
481 F020_MASK_ADC0CN_AD0INT) {
482 switch (devpriv->device) {
483 case DT9812_DEVID_DT9812_10:
484 /*
485 * For DT9812-10V the personality module set the
486 * encoding to 2's complement. Hence, convert it before
487 * returning it
488 */
489 *value = ((val[1] << 8) | val[2]) + 0x800;
490 break;
491 case DT9812_DEVID_DT9812_2PT5:
492 *value = (val[1] << 8) | val[2];
493 break;
494 }
495 }
496
497 exit:
498 up(&devpriv->sem);
499
500 return ret;
501 }
502
503 static int dt9812_analog_out(struct comedi_device *dev, int channel, u16 value)
504 {
505 struct dt9812_private *devpriv = dev->private;
506 struct dt9812_rmw_byte rmw[3];
507 int ret;
508
509 down(&devpriv->sem);
510
511 switch (channel) {
512 case 0:
513 /* 1. Set DAC mode */
514 rmw[0].address = F020_SFR_DAC0CN;
515 rmw[0].and_mask = 0xff;
516 rmw[0].or_value = F020_MASK_DACxCN_DACxEN;
517
518 /* 2 load low byte of DAC value first */
519 rmw[1].address = F020_SFR_DAC0L;
520 rmw[1].and_mask = 0xff;
521 rmw[1].or_value = value & 0xff;
522
523 /* 3 load high byte of DAC value next to latch the
524 12-bit value */
525 rmw[2].address = F020_SFR_DAC0H;
526 rmw[2].and_mask = 0xff;
527 rmw[2].or_value = (value >> 8) & 0xf;
528 break;
529
530 case 1:
531 /* 1. Set DAC mode */
532 rmw[0].address = F020_SFR_DAC1CN;
533 rmw[0].and_mask = 0xff;
534 rmw[0].or_value = F020_MASK_DACxCN_DACxEN;
535
536 /* 2 load low byte of DAC value first */
537 rmw[1].address = F020_SFR_DAC1L;
538 rmw[1].and_mask = 0xff;
539 rmw[1].or_value = value & 0xff;
540
541 /* 3 load high byte of DAC value next to latch the
542 12-bit value */
543 rmw[2].address = F020_SFR_DAC1H;
544 rmw[2].and_mask = 0xff;
545 rmw[2].or_value = (value >> 8) & 0xf;
546 break;
547 }
548 ret = dt9812_rmw_multiple_registers(dev, 3, rmw);
549 devpriv->ao_shadow[channel] = value;
550
551 up(&devpriv->sem);
552
553 return ret;
554 }
555
556 static int dt9812_di_insn_bits(struct comedi_device *dev,
557 struct comedi_subdevice *s,
558 struct comedi_insn *insn,
559 unsigned int *data)
560 {
561 u8 bits = 0;
562 int ret;
563
564 ret = dt9812_digital_in(dev, &bits);
565 if (ret)
566 return ret;
567
568 data[1] = bits;
569
570 return insn->n;
571 }
572
573 static int dt9812_do_insn_bits(struct comedi_device *dev,
574 struct comedi_subdevice *s,
575 struct comedi_insn *insn,
576 unsigned int *data)
577 {
578 if (comedi_dio_update_state(s, data))
579 dt9812_digital_out(dev, s->state);
580
581 data[1] = s->state;
582
583 return insn->n;
584 }
585
586 static int dt9812_ai_insn_read(struct comedi_device *dev,
587 struct comedi_subdevice *s,
588 struct comedi_insn *insn,
589 unsigned int *data)
590 {
591 unsigned int chan = CR_CHAN(insn->chanspec);
592 u16 val = 0;
593 int ret;
594 int i;
595
596 for (i = 0; i < insn->n; i++) {
597 ret = dt9812_analog_in(dev, chan, &val, DT9812_GAIN_1);
598 if (ret)
599 return ret;
600 data[i] = val;
601 }
602
603 return insn->n;
604 }
605
606 static int dt9812_ao_insn_read(struct comedi_device *dev,
607 struct comedi_subdevice *s,
608 struct comedi_insn *insn,
609 unsigned int *data)
610 {
611 struct dt9812_private *devpriv = dev->private;
612 unsigned int chan = CR_CHAN(insn->chanspec);
613 int i;
614
615 down(&devpriv->sem);
616 for (i = 0; i < insn->n; i++)
617 data[i] = devpriv->ao_shadow[chan];
618 up(&devpriv->sem);
619
620 return insn->n;
621 }
622
623 static int dt9812_ao_insn_write(struct comedi_device *dev,
624 struct comedi_subdevice *s,
625 struct comedi_insn *insn,
626 unsigned int *data)
627 {
628 unsigned int chan = CR_CHAN(insn->chanspec);
629 int ret;
630 int i;
631
632 for (i = 0; i < insn->n; i++) {
633 ret = dt9812_analog_out(dev, chan, data[i]);
634 if (ret)
635 return ret;
636 }
637
638 return insn->n;
639 }
640
641 static int dt9812_find_endpoints(struct comedi_device *dev)
642 {
643 struct usb_interface *intf = comedi_to_usb_interface(dev);
644 struct usb_host_interface *host = intf->cur_altsetting;
645 struct dt9812_private *devpriv = dev->private;
646 struct usb_endpoint_descriptor *ep;
647 int i;
648
649 if (host->desc.bNumEndpoints != 5) {
650 dev_err(dev->class_dev, "Wrong number of endpoints\n");
651 return -ENODEV;
652 }
653
654 for (i = 0; i < host->desc.bNumEndpoints; ++i) {
655 int dir = -1;
656 ep = &host->endpoint[i].desc;
657 switch (i) {
658 case 0:
659 /* unused message pipe */
660 dir = USB_DIR_IN;
661 break;
662 case 1:
663 dir = USB_DIR_OUT;
664 devpriv->cmd_wr.addr = ep->bEndpointAddress;
665 devpriv->cmd_wr.size = le16_to_cpu(ep->wMaxPacketSize);
666 break;
667 case 2:
668 dir = USB_DIR_IN;
669 devpriv->cmd_rd.addr = ep->bEndpointAddress;
670 devpriv->cmd_rd.size = le16_to_cpu(ep->wMaxPacketSize);
671 break;
672 case 3:
673 /* unused write stream */
674 dir = USB_DIR_OUT;
675 break;
676 case 4:
677 /* unused read stream */
678 dir = USB_DIR_IN;
679 break;
680 }
681 if ((ep->bEndpointAddress & USB_DIR_IN) != dir) {
682 dev_err(dev->class_dev,
683 "Endpoint has wrong direction\n");
684 return -ENODEV;
685 }
686 }
687 return 0;
688 }
689
690 static int dt9812_reset_device(struct comedi_device *dev)
691 {
692 struct usb_device *usb = comedi_to_usb_dev(dev);
693 struct dt9812_private *devpriv = dev->private;
694 u32 serial;
695 u16 vendor;
696 u16 product;
697 u8 tmp8;
698 __le16 tmp16;
699 __le32 tmp32;
700 int ret;
701 int i;
702
703 ret = dt9812_read_info(dev, 0, &tmp8, sizeof(tmp8));
704 if (ret) {
705 /*
706 * Seems like a configuration reset is necessary if driver is
707 * reloaded while device is attached
708 */
709 usb_reset_configuration(usb);
710 for (i = 0; i < 10; i++) {
711 ret = dt9812_read_info(dev, 1, &tmp8, sizeof(tmp8));
712 if (ret == 0)
713 break;
714 }
715 if (ret) {
716 dev_err(dev->class_dev,
717 "unable to reset configuration\n");
718 return ret;
719 }
720 }
721
722 ret = dt9812_read_info(dev, 1, &tmp16, sizeof(tmp16));
723 if (ret) {
724 dev_err(dev->class_dev, "failed to read vendor id\n");
725 return ret;
726 }
727 vendor = le16_to_cpu(tmp16);
728
729 ret = dt9812_read_info(dev, 3, &tmp16, sizeof(tmp16));
730 if (ret) {
731 dev_err(dev->class_dev, "failed to read product id\n");
732 return ret;
733 }
734 product = le16_to_cpu(tmp16);
735
736 ret = dt9812_read_info(dev, 5, &tmp16, sizeof(tmp16));
737 if (ret) {
738 dev_err(dev->class_dev, "failed to read device id\n");
739 return ret;
740 }
741 devpriv->device = le16_to_cpu(tmp16);
742
743 ret = dt9812_read_info(dev, 7, &tmp32, sizeof(tmp32));
744 if (ret) {
745 dev_err(dev->class_dev, "failed to read serial number\n");
746 return ret;
747 }
748 serial = le32_to_cpu(tmp32);
749
750 /* let the user know what node this device is now attached to */
751 dev_info(dev->class_dev, "USB DT9812 (%4.4x.%4.4x.%4.4x) #0x%8.8x\n",
752 vendor, product, devpriv->device, serial);
753
754 if (devpriv->device != DT9812_DEVID_DT9812_10 &&
755 devpriv->device != DT9812_DEVID_DT9812_2PT5) {
756 dev_err(dev->class_dev, "Unsupported device!\n");
757 return -EINVAL;
758 }
759
760 return 0;
761 }
762
763 static int dt9812_auto_attach(struct comedi_device *dev,
764 unsigned long context)
765 {
766 struct usb_interface *intf = comedi_to_usb_interface(dev);
767 struct dt9812_private *devpriv;
768 struct comedi_subdevice *s;
769 bool is_unipolar;
770 int ret;
771
772 devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
773 if (!devpriv)
774 return -ENOMEM;
775
776 sema_init(&devpriv->sem, 1);
777 usb_set_intfdata(intf, devpriv);
778
779 ret = dt9812_find_endpoints(dev);
780 if (ret)
781 return ret;
782
783 ret = dt9812_reset_device(dev);
784 if (ret)
785 return ret;
786
787 is_unipolar = (devpriv->device == DT9812_DEVID_DT9812_2PT5);
788
789 ret = comedi_alloc_subdevices(dev, 4);
790 if (ret)
791 return ret;
792
793 /* Digital Input subdevice */
794 s = &dev->subdevices[0];
795 s->type = COMEDI_SUBD_DI;
796 s->subdev_flags = SDF_READABLE;
797 s->n_chan = 8;
798 s->maxdata = 1;
799 s->range_table = &range_digital;
800 s->insn_bits = dt9812_di_insn_bits;
801
802 /* Digital Output subdevice */
803 s = &dev->subdevices[1];
804 s->type = COMEDI_SUBD_DO;
805 s->subdev_flags = SDF_WRITEABLE;
806 s->n_chan = 8;
807 s->maxdata = 1;
808 s->range_table = &range_digital;
809 s->insn_bits = dt9812_do_insn_bits;
810
811 /* Analog Input subdevice */
812 s = &dev->subdevices[2];
813 s->type = COMEDI_SUBD_AI;
814 s->subdev_flags = SDF_READABLE | SDF_GROUND;
815 s->n_chan = 8;
816 s->maxdata = 0x0fff;
817 s->range_table = is_unipolar ? &range_unipolar2_5 : &range_bipolar10;
818 s->insn_read = dt9812_ai_insn_read;
819
820 /* Analog Output subdevice */
821 s = &dev->subdevices[3];
822 s->type = COMEDI_SUBD_AO;
823 s->subdev_flags = SDF_WRITEABLE;
824 s->n_chan = 2;
825 s->maxdata = 0x0fff;
826 s->range_table = is_unipolar ? &range_unipolar2_5 : &range_bipolar10;
827 s->insn_write = dt9812_ao_insn_write;
828 s->insn_read = dt9812_ao_insn_read;
829
830 devpriv->ao_shadow[0] = is_unipolar ? 0x0000 : 0x0800;
831 devpriv->ao_shadow[1] = is_unipolar ? 0x0000 : 0x0800;
832
833 return 0;
834 }
835
836 static void dt9812_detach(struct comedi_device *dev)
837 {
838 struct usb_interface *intf = comedi_to_usb_interface(dev);
839 struct dt9812_private *devpriv = dev->private;
840
841 if (!devpriv)
842 return;
843
844 down(&devpriv->sem);
845
846 usb_set_intfdata(intf, NULL);
847
848 up(&devpriv->sem);
849 }
850
851 static struct comedi_driver dt9812_driver = {
852 .driver_name = "dt9812",
853 .module = THIS_MODULE,
854 .auto_attach = dt9812_auto_attach,
855 .detach = dt9812_detach,
856 };
857
858 static int dt9812_usb_probe(struct usb_interface *intf,
859 const struct usb_device_id *id)
860 {
861 return comedi_usb_auto_config(intf, &dt9812_driver, id->driver_info);
862 }
863
864 static const struct usb_device_id dt9812_usb_table[] = {
865 { USB_DEVICE(0x0867, 0x9812) },
866 { }
867 };
868 MODULE_DEVICE_TABLE(usb, dt9812_usb_table);
869
870 static struct usb_driver dt9812_usb_driver = {
871 .name = "dt9812",
872 .id_table = dt9812_usb_table,
873 .probe = dt9812_usb_probe,
874 .disconnect = comedi_usb_auto_unconfig,
875 };
876 module_comedi_usb_driver(dt9812_driver, dt9812_usb_driver);
877
878 MODULE_AUTHOR("Anders Blomdell <anders.blomdell@control.lth.se>");
879 MODULE_DESCRIPTION("Comedi DT9812 driver");
880 MODULE_LICENSE("GPL");
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