2 comedi/drivers/ni_6527.c
3 driver for National Instruments PCI-6527
5 COMEDI - Linux Control and Measurement Device Interface
6 Copyright (C) 1999,2002,2003 David A. Schleef <ds@schleef.org>
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 Description: National Instruments 6527
28 Devices: [National Instruments] PCI-6527 (ni6527), PXI-6527
29 Updated: Sat, 25 Jan 2003 13:24:40 -0800
35 Manuals (available from ftp://ftp.natinst.com/support/manuals)
37 370106b.pdf 6527 Register Level Programmer Manual
44 #include <linux/pci.h>
45 #include <linux/interrupt.h>
47 #include "../comedidev.h"
49 #include "comedi_fc.h"
52 #define DRIVER_NAME "ni_6527"
54 #define NI6527_DIO_SIZE 4096
55 #define NI6527_MITE_SIZE 4096
57 #define Port_Register(x) (0x00+(x))
58 #define ID_Register 0x06
60 #define Clear_Register 0x07
62 #define ClrOverflow 0x04
63 #define ClrFilter 0x02
64 #define ClrInterval 0x01
66 #define Filter_Interval(x) (0x08+(x))
67 #define Filter_Enable(x) (0x0c+(x))
69 #define Change_Status 0x14
70 #define MasterInterruptStatus 0x04
72 #define EdgeStatus 0x01
74 #define Master_Interrupt_Control 0x15
75 #define FallingEdgeIntEnable 0x10
76 #define RisingEdgeIntEnable 0x08
77 #define MasterInterruptEnable 0x04
78 #define OverflowIntEnable 0x02
79 #define EdgeIntEnable 0x01
81 #define Rising_Edge_Detection_Enable(x) (0x018+(x))
82 #define Falling_Edge_Detection_Enable(x) (0x020+(x))
90 static const struct ni6527_board ni6527_boards
[] = {
101 #define this_board ((const struct ni6527_board *)dev->board_ptr)
103 static DEFINE_PCI_DEVICE_TABLE(ni6527_pci_table
) = {
104 {PCI_DEVICE(PCI_VENDOR_ID_NI
, 0x2b10)},
105 {PCI_DEVICE(PCI_VENDOR_ID_NI
, 0x2b20)},
109 MODULE_DEVICE_TABLE(pci
, ni6527_pci_table
);
111 struct ni6527_private
{
112 struct mite_struct
*mite
;
113 unsigned int filter_interval
;
114 unsigned int filter_enable
;
117 static int ni6527_di_insn_config(struct comedi_device
*dev
,
118 struct comedi_subdevice
*s
,
119 struct comedi_insn
*insn
, unsigned int *data
)
121 struct ni6527_private
*devpriv
= dev
->private;
122 int chan
= CR_CHAN(insn
->chanspec
);
123 unsigned int interval
;
128 if (data
[0] != INSN_CONFIG_FILTER
)
132 interval
= (data
[1] + 100) / 200;
133 data
[1] = interval
* 200;
135 if (interval
!= devpriv
->filter_interval
) {
136 writeb(interval
& 0xff,
137 devpriv
->mite
->daq_io_addr
+ Filter_Interval(0));
138 writeb((interval
>> 8) & 0xff,
139 devpriv
->mite
->daq_io_addr
+ Filter_Interval(1));
140 writeb((interval
>> 16) & 0x0f,
141 devpriv
->mite
->daq_io_addr
+ Filter_Interval(2));
144 devpriv
->mite
->daq_io_addr
+ Clear_Register
);
146 devpriv
->filter_interval
= interval
;
149 devpriv
->filter_enable
|= 1 << chan
;
151 devpriv
->filter_enable
&= ~(1 << chan
);
154 writeb(devpriv
->filter_enable
,
155 devpriv
->mite
->daq_io_addr
+ Filter_Enable(0));
156 writeb(devpriv
->filter_enable
>> 8,
157 devpriv
->mite
->daq_io_addr
+ Filter_Enable(1));
158 writeb(devpriv
->filter_enable
>> 16,
159 devpriv
->mite
->daq_io_addr
+ Filter_Enable(2));
164 static int ni6527_di_insn_bits(struct comedi_device
*dev
,
165 struct comedi_subdevice
*s
,
166 struct comedi_insn
*insn
, unsigned int *data
)
168 struct ni6527_private
*devpriv
= dev
->private;
170 data
[1] = readb(devpriv
->mite
->daq_io_addr
+ Port_Register(0));
171 data
[1] |= readb(devpriv
->mite
->daq_io_addr
+ Port_Register(1)) << 8;
172 data
[1] |= readb(devpriv
->mite
->daq_io_addr
+ Port_Register(2)) << 16;
177 static int ni6527_do_insn_bits(struct comedi_device
*dev
,
178 struct comedi_subdevice
*s
,
179 struct comedi_insn
*insn
, unsigned int *data
)
181 struct ni6527_private
*devpriv
= dev
->private;
184 s
->state
&= ~data
[0];
185 s
->state
|= (data
[0] & data
[1]);
187 /* The open relay state on the board cooresponds to 1,
188 * but in Comedi, it is represented by 0. */
189 if (data
[0] & 0x0000ff) {
190 writeb((s
->state
^ 0xff),
191 devpriv
->mite
->daq_io_addr
+ Port_Register(3));
193 if (data
[0] & 0x00ff00) {
194 writeb((s
->state
>> 8) ^ 0xff,
195 devpriv
->mite
->daq_io_addr
+ Port_Register(4));
197 if (data
[0] & 0xff0000) {
198 writeb((s
->state
>> 16) ^ 0xff,
199 devpriv
->mite
->daq_io_addr
+ Port_Register(5));
207 static irqreturn_t
ni6527_interrupt(int irq
, void *d
)
209 struct comedi_device
*dev
= d
;
210 struct ni6527_private
*devpriv
= dev
->private;
211 struct comedi_subdevice
*s
= &dev
->subdevices
[2];
214 status
= readb(devpriv
->mite
->daq_io_addr
+ Change_Status
);
215 if ((status
& MasterInterruptStatus
) == 0)
217 if ((status
& EdgeStatus
) == 0)
220 writeb(ClrEdge
| ClrOverflow
,
221 devpriv
->mite
->daq_io_addr
+ Clear_Register
);
223 comedi_buf_put(s
->async
, 0);
224 s
->async
->events
|= COMEDI_CB_EOS
;
225 comedi_event(dev
, s
);
229 static int ni6527_intr_cmdtest(struct comedi_device
*dev
,
230 struct comedi_subdevice
*s
,
231 struct comedi_cmd
*cmd
)
235 /* Step 1 : check if triggers are trivially valid */
237 err
|= cfc_check_trigger_src(&cmd
->start_src
, TRIG_NOW
);
238 err
|= cfc_check_trigger_src(&cmd
->scan_begin_src
, TRIG_OTHER
);
239 err
|= cfc_check_trigger_src(&cmd
->convert_src
, TRIG_FOLLOW
);
240 err
|= cfc_check_trigger_src(&cmd
->scan_end_src
, TRIG_COUNT
);
241 err
|= cfc_check_trigger_src(&cmd
->stop_src
, TRIG_COUNT
);
246 /* Step 2a : make sure trigger sources are unique */
247 /* Step 2b : and mutually compatible */
252 /* Step 3: check if arguments are trivially valid */
254 err
|= cfc_check_trigger_arg_is(&cmd
->start_arg
, 0);
255 err
|= cfc_check_trigger_arg_is(&cmd
->scan_begin_arg
, 0);
256 err
|= cfc_check_trigger_arg_is(&cmd
->convert_arg
, 0);
257 err
|= cfc_check_trigger_arg_is(&cmd
->scan_end_arg
, 1);
258 err
|= cfc_check_trigger_arg_is(&cmd
->stop_arg
, 0);
263 /* step 4: fix up any arguments */
271 static int ni6527_intr_cmd(struct comedi_device
*dev
,
272 struct comedi_subdevice
*s
)
274 struct ni6527_private
*devpriv
= dev
->private;
275 /* struct comedi_cmd *cmd = &s->async->cmd; */
277 writeb(ClrEdge
| ClrOverflow
,
278 devpriv
->mite
->daq_io_addr
+ Clear_Register
);
279 writeb(FallingEdgeIntEnable
| RisingEdgeIntEnable
|
280 MasterInterruptEnable
| EdgeIntEnable
,
281 devpriv
->mite
->daq_io_addr
+ Master_Interrupt_Control
);
286 static int ni6527_intr_cancel(struct comedi_device
*dev
,
287 struct comedi_subdevice
*s
)
289 struct ni6527_private
*devpriv
= dev
->private;
291 writeb(0x00, devpriv
->mite
->daq_io_addr
+ Master_Interrupt_Control
);
296 static int ni6527_intr_insn_bits(struct comedi_device
*dev
,
297 struct comedi_subdevice
*s
,
298 struct comedi_insn
*insn
, unsigned int *data
)
304 static int ni6527_intr_insn_config(struct comedi_device
*dev
,
305 struct comedi_subdevice
*s
,
306 struct comedi_insn
*insn
, unsigned int *data
)
308 struct ni6527_private
*devpriv
= dev
->private;
312 if (data
[0] != INSN_CONFIG_CHANGE_NOTIFY
)
316 devpriv
->mite
->daq_io_addr
+ Rising_Edge_Detection_Enable(0));
318 devpriv
->mite
->daq_io_addr
+ Rising_Edge_Detection_Enable(1));
319 writeb(data
[1] >> 16,
320 devpriv
->mite
->daq_io_addr
+ Rising_Edge_Detection_Enable(2));
323 devpriv
->mite
->daq_io_addr
+ Falling_Edge_Detection_Enable(0));
325 devpriv
->mite
->daq_io_addr
+ Falling_Edge_Detection_Enable(1));
326 writeb(data
[2] >> 16,
327 devpriv
->mite
->daq_io_addr
+ Falling_Edge_Detection_Enable(2));
332 static const struct ni6527_board
*
333 ni6527_find_boardinfo(struct pci_dev
*pcidev
)
335 unsigned int dev_id
= pcidev
->device
;
338 for (n
= 0; n
< ARRAY_SIZE(ni6527_boards
); n
++) {
339 const struct ni6527_board
*board
= &ni6527_boards
[n
];
340 if (board
->dev_id
== dev_id
)
346 static int ni6527_auto_attach(struct comedi_device
*dev
,
347 unsigned long context_unused
)
349 struct pci_dev
*pcidev
= comedi_to_pci_dev(dev
);
350 struct ni6527_private
*devpriv
;
351 struct comedi_subdevice
*s
;
354 devpriv
= kzalloc(sizeof(*devpriv
), GFP_KERNEL
);
357 dev
->private = devpriv
;
359 dev
->board_ptr
= ni6527_find_boardinfo(pcidev
);
363 devpriv
->mite
= mite_alloc(pcidev
);
367 ret
= mite_setup(devpriv
->mite
);
369 dev_err(dev
->class_dev
, "error setting up mite\n");
373 dev
->board_name
= this_board
->name
;
374 dev_info(dev
->class_dev
, "board: %s, ID=0x%02x\n", dev
->board_name
,
375 readb(devpriv
->mite
->daq_io_addr
+ ID_Register
));
377 ret
= comedi_alloc_subdevices(dev
, 3);
381 s
= &dev
->subdevices
[0];
382 s
->type
= COMEDI_SUBD_DI
;
383 s
->subdev_flags
= SDF_READABLE
;
385 s
->range_table
= &range_digital
;
387 s
->insn_config
= ni6527_di_insn_config
;
388 s
->insn_bits
= ni6527_di_insn_bits
;
390 s
= &dev
->subdevices
[1];
391 s
->type
= COMEDI_SUBD_DO
;
392 s
->subdev_flags
= SDF_READABLE
| SDF_WRITABLE
;
394 s
->range_table
= &range_unknown
; /* FIXME: actually conductance */
396 s
->insn_bits
= ni6527_do_insn_bits
;
398 s
= &dev
->subdevices
[2];
399 dev
->read_subdev
= s
;
400 s
->type
= COMEDI_SUBD_DI
;
401 s
->subdev_flags
= SDF_READABLE
| SDF_CMD_READ
;
403 s
->range_table
= &range_unknown
;
405 s
->do_cmdtest
= ni6527_intr_cmdtest
;
406 s
->do_cmd
= ni6527_intr_cmd
;
407 s
->cancel
= ni6527_intr_cancel
;
408 s
->insn_bits
= ni6527_intr_insn_bits
;
409 s
->insn_config
= ni6527_intr_insn_config
;
411 writeb(0x00, devpriv
->mite
->daq_io_addr
+ Filter_Enable(0));
412 writeb(0x00, devpriv
->mite
->daq_io_addr
+ Filter_Enable(1));
413 writeb(0x00, devpriv
->mite
->daq_io_addr
+ Filter_Enable(2));
415 writeb(ClrEdge
| ClrOverflow
| ClrFilter
| ClrInterval
,
416 devpriv
->mite
->daq_io_addr
+ Clear_Register
);
417 writeb(0x00, devpriv
->mite
->daq_io_addr
+ Master_Interrupt_Control
);
419 ret
= request_irq(mite_irq(devpriv
->mite
), ni6527_interrupt
,
420 IRQF_SHARED
, DRIVER_NAME
, dev
);
422 dev_warn(dev
->class_dev
, "irq not available\n");
424 dev
->irq
= mite_irq(devpriv
->mite
);
429 static void ni6527_detach(struct comedi_device
*dev
)
431 struct ni6527_private
*devpriv
= dev
->private;
433 if (devpriv
&& devpriv
->mite
&& devpriv
->mite
->daq_io_addr
)
435 devpriv
->mite
->daq_io_addr
+ Master_Interrupt_Control
);
437 free_irq(dev
->irq
, dev
);
438 if (devpriv
&& devpriv
->mite
) {
439 mite_unsetup(devpriv
->mite
);
440 mite_free(devpriv
->mite
);
444 static struct comedi_driver ni6527_driver
= {
445 .driver_name
= DRIVER_NAME
,
446 .module
= THIS_MODULE
,
447 .auto_attach
= ni6527_auto_attach
,
448 .detach
= ni6527_detach
,
451 static int ni6527_pci_probe(struct pci_dev
*dev
,
452 const struct pci_device_id
*ent
)
454 return comedi_pci_auto_config(dev
, &ni6527_driver
);
457 static struct pci_driver ni6527_pci_driver
= {
459 .id_table
= ni6527_pci_table
,
460 .probe
= ni6527_pci_probe
,
461 .remove
= comedi_pci_auto_unconfig
,
463 module_comedi_pci_driver(ni6527_driver
, ni6527_pci_driver
);
465 MODULE_AUTHOR("Comedi http://www.comedi.org");
466 MODULE_DESCRIPTION("Comedi low-level driver");
467 MODULE_LICENSE("GPL");