projects / deliverable / linux.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
staging: comedi: drivers: replace SDF_WRITEABLE with SDF_WRITABLE
[deliverable/linux.git] / drivers / staging / comedi / drivers / quatech_daqp_cs.c
1 /*======================================================================
2
3 comedi/drivers/quatech_daqp_cs.c
4
5 Quatech DAQP PCMCIA data capture cards COMEDI client driver
6 Copyright (C) 2000, 2003 Brent Baccala <baccala@freesoft.org>
7 The DAQP interface code in this file is released into the public domain.
8
9 COMEDI - Linux Control and Measurement Device Interface
10 Copyright (C) 1998 David A. Schleef <ds@schleef.org>
11 http://www.comedi.org/
12
13 quatech_daqp_cs.c 1.10
14
15 Documentation for the DAQP PCMCIA cards can be found on Quatech's site:
16
17 ftp://ftp.quatech.com/Manuals/daqp-208.pdf
18
19 This manual is for both the DAQP-208 and the DAQP-308.
20
21 What works:
22
23 - A/D conversion
24 - 8 channels
25 - 4 gain ranges
26 - ground ref or differential
27 - single-shot and timed both supported
28 - D/A conversion, single-shot
29 - digital I/O
30
31 What doesn't:
32
33 - any kind of triggering - external or D/A channel 1
34 - the card's optional expansion board
35 - the card's timer (for anything other than A/D conversion)
36 - D/A update modes other than immediate (i.e, timed)
37 - fancier timing modes
38 - setting card's FIFO buffer thresholds to anything but default
39
40 ======================================================================*/
41
42 /*
43 Driver: quatech_daqp_cs
44 Description: Quatech DAQP PCMCIA data capture cards
45 Author: Brent Baccala <baccala@freesoft.org>
46 Status: works
47 Devices: [Quatech] DAQP-208 (daqp), DAQP-308
48 */
49
50 #include <linux/module.h>
51 #include "../comedidev.h"
52 #include <linux/semaphore.h>
53
54 #include <pcmcia/cistpl.h>
55 #include <pcmcia/cisreg.h>
56 #include <pcmcia/ds.h>
57
58 #include <linux/completion.h>
59
60 #include "comedi_fc.h"
61
62 struct daqp_private {
63 int stop;
64
65 enum { semaphore, buffer } interrupt_mode;
66
67 struct completion eos;
68
69 int count;
70 };
71
72 /* The DAQP communicates with the system through a 16 byte I/O window. */
73
74 #define DAQP_FIFO_SIZE 4096
75
76 #define DAQP_FIFO 0
77 #define DAQP_SCANLIST 1
78 #define DAQP_CONTROL 2
79 #define DAQP_STATUS 2
80 #define DAQP_DIGITAL_IO 3
81 #define DAQP_PACER_LOW 4
82 #define DAQP_PACER_MID 5
83 #define DAQP_PACER_HIGH 6
84 #define DAQP_COMMAND 7
85 #define DAQP_DA 8
86 #define DAQP_TIMER 10
87 #define DAQP_AUX 15
88
89 #define DAQP_SCANLIST_DIFFERENTIAL 0x4000
90 #define DAQP_SCANLIST_GAIN(x) ((x)<<12)
91 #define DAQP_SCANLIST_CHANNEL(x) ((x)<<8)
92 #define DAQP_SCANLIST_START 0x0080
93 #define DAQP_SCANLIST_EXT_GAIN(x) ((x)<<4)
94 #define DAQP_SCANLIST_EXT_CHANNEL(x) (x)
95
96 #define DAQP_CONTROL_PACER_100kHz 0xc0
97 #define DAQP_CONTROL_PACER_1MHz 0x80
98 #define DAQP_CONTROL_PACER_5MHz 0x40
99 #define DAQP_CONTROL_PACER_EXTERNAL 0x00
100 #define DAQP_CONTORL_EXPANSION 0x20
101 #define DAQP_CONTROL_EOS_INT_ENABLE 0x10
102 #define DAQP_CONTROL_FIFO_INT_ENABLE 0x08
103 #define DAQP_CONTROL_TRIGGER_ONESHOT 0x00
104 #define DAQP_CONTROL_TRIGGER_CONTINUOUS 0x04
105 #define DAQP_CONTROL_TRIGGER_INTERNAL 0x00
106 #define DAQP_CONTROL_TRIGGER_EXTERNAL 0x02
107 #define DAQP_CONTROL_TRIGGER_RISING 0x00
108 #define DAQP_CONTROL_TRIGGER_FALLING 0x01
109
110 #define DAQP_STATUS_IDLE 0x80
111 #define DAQP_STATUS_RUNNING 0x40
112 #define DAQP_STATUS_EVENTS 0x38
113 #define DAQP_STATUS_DATA_LOST 0x20
114 #define DAQP_STATUS_END_OF_SCAN 0x10
115 #define DAQP_STATUS_FIFO_THRESHOLD 0x08
116 #define DAQP_STATUS_FIFO_FULL 0x04
117 #define DAQP_STATUS_FIFO_NEARFULL 0x02
118 #define DAQP_STATUS_FIFO_EMPTY 0x01
119
120 #define DAQP_COMMAND_ARM 0x80
121 #define DAQP_COMMAND_RSTF 0x40
122 #define DAQP_COMMAND_RSTQ 0x20
123 #define DAQP_COMMAND_STOP 0x10
124 #define DAQP_COMMAND_LATCH 0x08
125 #define DAQP_COMMAND_100kHz 0x00
126 #define DAQP_COMMAND_50kHz 0x02
127 #define DAQP_COMMAND_25kHz 0x04
128 #define DAQP_COMMAND_FIFO_DATA 0x01
129 #define DAQP_COMMAND_FIFO_PROGRAM 0x00
130
131 #define DAQP_AUX_TRIGGER_TTL 0x00
132 #define DAQP_AUX_TRIGGER_ANALOG 0x80
133 #define DAQP_AUX_TRIGGER_PRETRIGGER 0x40
134 #define DAQP_AUX_TIMER_INT_ENABLE 0x20
135 #define DAQP_AUX_TIMER_RELOAD 0x00
136 #define DAQP_AUX_TIMER_PAUSE 0x08
137 #define DAQP_AUX_TIMER_GO 0x10
138 #define DAQP_AUX_TIMER_GO_EXTERNAL 0x18
139 #define DAQP_AUX_TIMER_EXTERNAL_SRC 0x04
140 #define DAQP_AUX_TIMER_INTERNAL_SRC 0x00
141 #define DAQP_AUX_DA_DIRECT 0x00
142 #define DAQP_AUX_DA_OVERFLOW 0x01
143 #define DAQP_AUX_DA_EXTERNAL 0x02
144 #define DAQP_AUX_DA_PACER 0x03
145
146 #define DAQP_AUX_RUNNING 0x80
147 #define DAQP_AUX_TRIGGERED 0x40
148 #define DAQP_AUX_DA_BUFFER 0x20
149 #define DAQP_AUX_TIMER_OVERFLOW 0x10
150 #define DAQP_AUX_CONVERSION 0x08
151 #define DAQP_AUX_DATA_LOST 0x04
152 #define DAQP_AUX_FIFO_NEARFULL 0x02
153 #define DAQP_AUX_FIFO_EMPTY 0x01
154
155 static const struct comedi_lrange range_daqp_ai = {
156 4, {
157 BIP_RANGE(10),
158 BIP_RANGE(5),
159 BIP_RANGE(2.5),
160 BIP_RANGE(1.25)
161 }
162 };
163
164 /* Cancel a running acquisition */
165
166 static int daqp_ai_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
167 {
168 struct daqp_private *devpriv = dev->private;
169
170 if (devpriv->stop)
171 return -EIO;
172
173 outb(DAQP_COMMAND_STOP, dev->iobase + DAQP_COMMAND);
174
175 /* flush any linguring data in FIFO - superfluous here */
176 /* outb(DAQP_COMMAND_RSTF, dev->iobase+DAQP_COMMAND); */
177
178 devpriv->interrupt_mode = semaphore;
179
180 return 0;
181 }
182
183 /* Interrupt handler
184 *
185 * Operates in one of two modes. If devpriv->interrupt_mode is
186 * 'semaphore', just signal the devpriv->eos completion and return
187 * (one-shot mode). Otherwise (continuous mode), read data in from
188 * the card, transfer it to the buffer provided by the higher-level
189 * comedi kernel module, and signal various comedi callback routines,
190 * which run pretty quick.
191 */
192 static enum irqreturn daqp_interrupt(int irq, void *dev_id)
193 {
194 struct comedi_device *dev = dev_id;
195 struct daqp_private *devpriv = dev->private;
196 struct comedi_subdevice *s = dev->read_subdev;
197 int loop_limit = 10000;
198 int status;
199
200 if (!dev->attached)
201 return IRQ_NONE;
202
203 switch (devpriv->interrupt_mode) {
204 case semaphore:
205 complete(&devpriv->eos);
206 break;
207
208 case buffer:
209 while (!((status = inb(dev->iobase + DAQP_STATUS))
210 & DAQP_STATUS_FIFO_EMPTY)) {
211 unsigned short data;
212
213 if (status & DAQP_STATUS_DATA_LOST) {
214 s->async->events |=
215 COMEDI_CB_EOA | COMEDI_CB_OVERFLOW;
216 dev_warn(dev->class_dev, "data lost\n");
217 break;
218 }
219
220 data = inb(dev->iobase + DAQP_FIFO);
221 data |= inb(dev->iobase + DAQP_FIFO) << 8;
222 data ^= 0x8000;
223
224 comedi_buf_write_samples(s, &data, 1);
225
226 /* If there's a limit, decrement it
227 * and stop conversion if zero
228 */
229
230 if (devpriv->count > 0) {
231 devpriv->count--;
232 if (devpriv->count == 0) {
233 s->async->events |= COMEDI_CB_EOA;
234 break;
235 }
236 }
237
238 if ((loop_limit--) <= 0)
239 break;
240 }
241
242 if (loop_limit <= 0) {
243 dev_warn(dev->class_dev,
244 "loop_limit reached in daqp_interrupt()\n");
245 s->async->events |= COMEDI_CB_EOA | COMEDI_CB_ERROR;
246 }
247
248 comedi_handle_events(dev, s);
249 }
250 return IRQ_HANDLED;
251 }
252
253 static void daqp_ai_set_one_scanlist_entry(struct comedi_device *dev,
254 unsigned int chanspec,
255 int start)
256 {
257 unsigned int chan = CR_CHAN(chanspec);
258 unsigned int range = CR_RANGE(chanspec);
259 unsigned int aref = CR_AREF(chanspec);
260 unsigned int val;
261
262 val = DAQP_SCANLIST_CHANNEL(chan) | DAQP_SCANLIST_GAIN(range);
263
264 if (aref == AREF_DIFF)
265 val |= DAQP_SCANLIST_DIFFERENTIAL;
266
267 if (start)
268 val |= DAQP_SCANLIST_START;
269
270 outb(val & 0xff, dev->iobase + DAQP_SCANLIST);
271 outb((val >> 8) & 0xff, dev->iobase + DAQP_SCANLIST);
272 }
273
274 /* One-shot analog data acquisition routine */
275
276 static int daqp_ai_insn_read(struct comedi_device *dev,
277 struct comedi_subdevice *s,
278 struct comedi_insn *insn, unsigned int *data)
279 {
280 struct daqp_private *devpriv = dev->private;
281 int i;
282 int v;
283 int counter = 10000;
284
285 if (devpriv->stop)
286 return -EIO;
287
288 /* Stop any running conversion */
289 daqp_ai_cancel(dev, s);
290
291 outb(0, dev->iobase + DAQP_AUX);
292
293 /* Reset scan list queue */
294 outb(DAQP_COMMAND_RSTQ, dev->iobase + DAQP_COMMAND);
295
296 /* Program one scan list entry */
297 daqp_ai_set_one_scanlist_entry(dev, insn->chanspec, 1);
298
299 /* Reset data FIFO (see page 28 of DAQP User's Manual) */
300
301 outb(DAQP_COMMAND_RSTF, dev->iobase + DAQP_COMMAND);
302
303 /* Set trigger */
304
305 v = DAQP_CONTROL_TRIGGER_ONESHOT | DAQP_CONTROL_TRIGGER_INTERNAL
306 | DAQP_CONTROL_PACER_100kHz | DAQP_CONTROL_EOS_INT_ENABLE;
307
308 outb(v, dev->iobase + DAQP_CONTROL);
309
310 /* Reset any pending interrupts (my card has a tendency to require
311 * require multiple reads on the status register to achieve this)
312 */
313
314 while (--counter
315 && (inb(dev->iobase + DAQP_STATUS) & DAQP_STATUS_EVENTS))
316 ;
317 if (!counter) {
318 dev_err(dev->class_dev,
319 "couldn't clear interrupts in status register\n");
320 return -1;
321 }
322
323 init_completion(&devpriv->eos);
324 devpriv->interrupt_mode = semaphore;
325
326 for (i = 0; i < insn->n; i++) {
327
328 /* Start conversion */
329 outb(DAQP_COMMAND_ARM | DAQP_COMMAND_FIFO_DATA,
330 dev->iobase + DAQP_COMMAND);
331
332 /* Wait for interrupt service routine to unblock completion */
333 /* Maybe could use a timeout here, but it's interruptible */
334 if (wait_for_completion_interruptible(&devpriv->eos))
335 return -EINTR;
336
337 data[i] = inb(dev->iobase + DAQP_FIFO);
338 data[i] |= inb(dev->iobase + DAQP_FIFO) << 8;
339 data[i] ^= 0x8000;
340 }
341
342 return insn->n;
343 }
344
345 /* This function converts ns nanoseconds to a counter value suitable
346 * for programming the device. We always use the DAQP's 5 MHz clock,
347 * which with its 24-bit counter, allows values up to 84 seconds.
348 * Also, the function adjusts ns so that it cooresponds to the actual
349 * time that the device will use.
350 */
351
352 static int daqp_ns_to_timer(unsigned int *ns, unsigned int flags)
353 {
354 int timer;
355
356 timer = *ns / 200;
357 *ns = timer * 200;
358
359 return timer;
360 }
361
362 /* cmdtest tests a particular command to see if it is valid.
363 * Using the cmdtest ioctl, a user can create a valid cmd
364 * and then have it executed by the cmd ioctl.
365 *
366 * cmdtest returns 1,2,3,4 or 0, depending on which tests
367 * the command passes.
368 */
369
370 static int daqp_ai_cmdtest(struct comedi_device *dev,
371 struct comedi_subdevice *s, struct comedi_cmd *cmd)
372 {
373 int err = 0;
374 unsigned int arg;
375
376 /* Step 1 : check if triggers are trivially valid */
377
378 err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW);
379 err |= cfc_check_trigger_src(&cmd->scan_begin_src,
380 TRIG_TIMER | TRIG_FOLLOW);
381 err |= cfc_check_trigger_src(&cmd->convert_src,
382 TRIG_TIMER | TRIG_NOW);
383 err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
384 err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
385
386 if (err)
387 return 1;
388
389 /* Step 2a : make sure trigger sources are unique */
390
391 err |= cfc_check_trigger_is_unique(cmd->scan_begin_src);
392 err |= cfc_check_trigger_is_unique(cmd->convert_src);
393 err |= cfc_check_trigger_is_unique(cmd->stop_src);
394
395 /* Step 2b : and mutually compatible */
396
397 if (err)
398 return 2;
399
400 /* Step 3: check if arguments are trivially valid */
401
402 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
403
404 #define MAX_SPEED 10000 /* 100 kHz - in nanoseconds */
405
406 if (cmd->scan_begin_src == TRIG_TIMER)
407 err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
408 MAX_SPEED);
409
410 /* If both scan_begin and convert are both timer values, the only
411 * way that can make sense is if the scan time is the number of
412 * conversions times the convert time
413 */
414
415 if (cmd->scan_begin_src == TRIG_TIMER && cmd->convert_src == TRIG_TIMER
416 && cmd->scan_begin_arg != cmd->convert_arg * cmd->scan_end_arg) {
417 err |= -EINVAL;
418 }
419
420 if (cmd->convert_src == TRIG_TIMER)
421 err |= cfc_check_trigger_arg_min(&cmd->convert_arg, MAX_SPEED);
422
423 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
424
425 if (cmd->stop_src == TRIG_COUNT)
426 err |= cfc_check_trigger_arg_max(&cmd->stop_arg, 0x00ffffff);
427 else /* TRIG_NONE */
428 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
429
430 if (err)
431 return 3;
432
433 /* step 4: fix up any arguments */
434
435 if (cmd->scan_begin_src == TRIG_TIMER) {
436 arg = cmd->scan_begin_arg;
437 daqp_ns_to_timer(&arg, cmd->flags);
438 err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, arg);
439 }
440
441 if (cmd->convert_src == TRIG_TIMER) {
442 arg = cmd->convert_arg;
443 daqp_ns_to_timer(&arg, cmd->flags);
444 err |= cfc_check_trigger_arg_is(&cmd->convert_arg, arg);
445 }
446
447 if (err)
448 return 4;
449
450 return 0;
451 }
452
453 static int daqp_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
454 {
455 struct daqp_private *devpriv = dev->private;
456 struct comedi_cmd *cmd = &s->async->cmd;
457 int counter;
458 int scanlist_start_on_every_entry;
459 int threshold;
460
461 int i;
462 int v;
463
464 if (devpriv->stop)
465 return -EIO;
466
467 /* Stop any running conversion */
468 daqp_ai_cancel(dev, s);
469
470 outb(0, dev->iobase + DAQP_AUX);
471
472 /* Reset scan list queue */
473 outb(DAQP_COMMAND_RSTQ, dev->iobase + DAQP_COMMAND);
474
475 /* Program pacer clock
476 *
477 * There's two modes we can operate in. If convert_src is
478 * TRIG_TIMER, then convert_arg specifies the time between
479 * each conversion, so we program the pacer clock to that
480 * frequency and set the SCANLIST_START bit on every scanlist
481 * entry. Otherwise, convert_src is TRIG_NOW, which means
482 * we want the fastest possible conversions, scan_begin_src
483 * is TRIG_TIMER, and scan_begin_arg specifies the time between
484 * each scan, so we program the pacer clock to this frequency
485 * and only set the SCANLIST_START bit on the first entry.
486 */
487
488 if (cmd->convert_src == TRIG_TIMER) {
489 counter = daqp_ns_to_timer(&cmd->convert_arg, cmd->flags);
490 outb(counter & 0xff, dev->iobase + DAQP_PACER_LOW);
491 outb((counter >> 8) & 0xff, dev->iobase + DAQP_PACER_MID);
492 outb((counter >> 16) & 0xff, dev->iobase + DAQP_PACER_HIGH);
493 scanlist_start_on_every_entry = 1;
494 } else {
495 counter = daqp_ns_to_timer(&cmd->scan_begin_arg, cmd->flags);
496 outb(counter & 0xff, dev->iobase + DAQP_PACER_LOW);
497 outb((counter >> 8) & 0xff, dev->iobase + DAQP_PACER_MID);
498 outb((counter >> 16) & 0xff, dev->iobase + DAQP_PACER_HIGH);
499 scanlist_start_on_every_entry = 0;
500 }
501
502 /* Program scan list */
503 for (i = 0; i < cmd->chanlist_len; i++) {
504 int start = (i == 0 || scanlist_start_on_every_entry);
505
506 daqp_ai_set_one_scanlist_entry(dev, cmd->chanlist[i], start);
507 }
508
509 /* Now it's time to program the FIFO threshold, basically the
510 * number of samples the card will buffer before it interrupts
511 * the CPU.
512 *
513 * If we don't have a stop count, then use half the size of
514 * the FIFO (the manufacturer's recommendation). Consider
515 * that the FIFO can hold 2K samples (4K bytes). With the
516 * threshold set at half the FIFO size, we have a margin of
517 * error of 1024 samples. At the chip's maximum sample rate
518 * of 100,000 Hz, the CPU would have to delay interrupt
519 * service for a full 10 milliseconds in order to lose data
520 * here (as opposed to higher up in the kernel). I've never
521 * seen it happen. However, for slow sample rates it may
522 * buffer too much data and introduce too much delay for the
523 * user application.
524 *
525 * If we have a stop count, then things get more interesting.
526 * If the stop count is less than the FIFO size (actually
527 * three-quarters of the FIFO size - see below), we just use
528 * the stop count itself as the threshold, the card interrupts
529 * us when that many samples have been taken, and we kill the
530 * acquisition at that point and are done. If the stop count
531 * is larger than that, then we divide it by 2 until it's less
532 * than three quarters of the FIFO size (we always leave the
533 * top quarter of the FIFO as protection against sluggish CPU
534 * interrupt response) and use that as the threshold. So, if
535 * the stop count is 4000 samples, we divide by two twice to
536 * get 1000 samples, use that as the threshold, take four
537 * interrupts to get our 4000 samples and are done.
538 *
539 * The algorithm could be more clever. For example, if 81000
540 * samples are requested, we could set the threshold to 1500
541 * samples and take 54 interrupts to get 81000. But 54 isn't
542 * a power of two, so this algorithm won't find that option.
543 * Instead, it'll set the threshold at 1266 and take 64
544 * interrupts to get 81024 samples, of which the last 24 will
545 * be discarded... but we won't get the last interrupt until
546 * they've been collected. To find the first option, the
547 * computer could look at the prime decomposition of the
548 * sample count (81000 = 3^4 * 5^3 * 2^3) and factor it into a
549 * threshold (1500 = 3 * 5^3 * 2^2) and an interrupt count (54
550 * = 3^3 * 2). Hmmm... a one-line while loop or prime
551 * decomposition of integers... I'll leave it the way it is.
552 *
553 * I'll also note a mini-race condition before ignoring it in
554 * the code. Let's say we're taking 4000 samples, as before.
555 * After 1000 samples, we get an interrupt. But before that
556 * interrupt is completely serviced, another sample is taken
557 * and loaded into the FIFO. Since the interrupt handler
558 * empties the FIFO before returning, it will read 1001 samples.
559 * If that happens four times, we'll end up taking 4004 samples,
560 * not 4000. The interrupt handler will discard the extra four
561 * samples (by halting the acquisition with four samples still
562 * in the FIFO), but we will have to wait for them.
563 *
564 * In short, this code works pretty well, but for either of
565 * the two reasons noted, might end up waiting for a few more
566 * samples than actually requested. Shouldn't make too much
567 * of a difference.
568 */
569
570 /* Save away the number of conversions we should perform, and
571 * compute the FIFO threshold (in bytes, not samples - that's
572 * why we multiple devpriv->count by 2 = sizeof(sample))
573 */
574
575 if (cmd->stop_src == TRIG_COUNT) {
576 devpriv->count = cmd->stop_arg * cmd->scan_end_arg;
577 threshold = 2 * devpriv->count;
578 while (threshold > DAQP_FIFO_SIZE * 3 / 4)
579 threshold /= 2;
580 } else {
581 devpriv->count = -1;
582 threshold = DAQP_FIFO_SIZE / 2;
583 }
584
585 /* Reset data FIFO (see page 28 of DAQP User's Manual) */
586
587 outb(DAQP_COMMAND_RSTF, dev->iobase + DAQP_COMMAND);
588
589 /* Set FIFO threshold. First two bytes are near-empty
590 * threshold, which is unused; next two bytes are near-full
591 * threshold. We computed the number of bytes we want in the
592 * FIFO when the interrupt is generated, what the card wants
593 * is actually the number of available bytes left in the FIFO
594 * when the interrupt is to happen.
595 */
596
597 outb(0x00, dev->iobase + DAQP_FIFO);
598 outb(0x00, dev->iobase + DAQP_FIFO);
599
600 outb((DAQP_FIFO_SIZE - threshold) & 0xff, dev->iobase + DAQP_FIFO);
601 outb((DAQP_FIFO_SIZE - threshold) >> 8, dev->iobase + DAQP_FIFO);
602
603 /* Set trigger */
604
605 v = DAQP_CONTROL_TRIGGER_CONTINUOUS | DAQP_CONTROL_TRIGGER_INTERNAL
606 | DAQP_CONTROL_PACER_5MHz | DAQP_CONTROL_FIFO_INT_ENABLE;
607
608 outb(v, dev->iobase + DAQP_CONTROL);
609
610 /* Reset any pending interrupts (my card has a tendency to require
611 * require multiple reads on the status register to achieve this)
612 */
613 counter = 100;
614 while (--counter
615 && (inb(dev->iobase + DAQP_STATUS) & DAQP_STATUS_EVENTS))
616 ;
617 if (!counter) {
618 dev_err(dev->class_dev,
619 "couldn't clear interrupts in status register\n");
620 return -1;
621 }
622
623 devpriv->interrupt_mode = buffer;
624
625 /* Start conversion */
626 outb(DAQP_COMMAND_ARM | DAQP_COMMAND_FIFO_DATA,
627 dev->iobase + DAQP_COMMAND);
628
629 return 0;
630 }
631
632 static int daqp_ao_insn_write(struct comedi_device *dev,
633 struct comedi_subdevice *s,
634 struct comedi_insn *insn,
635 unsigned int *data)
636 {
637 struct daqp_private *devpriv = dev->private;
638 unsigned int chan = CR_CHAN(insn->chanspec);
639 int i;
640
641 if (devpriv->stop)
642 return -EIO;
643
644 /* Make sure D/A update mode is direct update */
645 outb(0, dev->iobase + DAQP_AUX);
646
647 for (i = 0; i > insn->n; i++) {
648 unsigned val = data[i];
649
650 s->readback[chan] = val;
651
652 val &= 0x0fff;
653 val ^= 0x0800; /* Flip the sign */
654 val |= (chan << 12);
655
656 outw(val, dev->iobase + DAQP_DA);
657 }
658
659 return insn->n;
660 }
661
662 static int daqp_di_insn_bits(struct comedi_device *dev,
663 struct comedi_subdevice *s,
664 struct comedi_insn *insn,
665 unsigned int *data)
666 {
667 struct daqp_private *devpriv = dev->private;
668
669 if (devpriv->stop)
670 return -EIO;
671
672 data[0] = inb(dev->iobase + DAQP_DIGITAL_IO);
673
674 return insn->n;
675 }
676
677 static int daqp_do_insn_bits(struct comedi_device *dev,
678 struct comedi_subdevice *s,
679 struct comedi_insn *insn,
680 unsigned int *data)
681 {
682 struct daqp_private *devpriv = dev->private;
683
684 if (devpriv->stop)
685 return -EIO;
686
687 if (comedi_dio_update_state(s, data))
688 outb(s->state, dev->iobase + DAQP_DIGITAL_IO);
689
690 data[1] = s->state;
691
692 return insn->n;
693 }
694
695 static int daqp_auto_attach(struct comedi_device *dev,
696 unsigned long context)
697 {
698 struct pcmcia_device *link = comedi_to_pcmcia_dev(dev);
699 struct daqp_private *devpriv;
700 struct comedi_subdevice *s;
701 int ret;
702
703 devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
704 if (!devpriv)
705 return -ENOMEM;
706
707 link->config_flags |= CONF_AUTO_SET_IO | CONF_ENABLE_IRQ;
708 ret = comedi_pcmcia_enable(dev, NULL);
709 if (ret)
710 return ret;
711 dev->iobase = link->resource[0]->start;
712
713 link->priv = dev;
714 ret = pcmcia_request_irq(link, daqp_interrupt);
715 if (ret)
716 return ret;
717
718 ret = comedi_alloc_subdevices(dev, 4);
719 if (ret)
720 return ret;
721
722 s = &dev->subdevices[0];
723 dev->read_subdev = s;
724 s->type = COMEDI_SUBD_AI;
725 s->subdev_flags = SDF_READABLE | SDF_GROUND | SDF_DIFF | SDF_CMD_READ;
726 s->n_chan = 8;
727 s->len_chanlist = 2048;
728 s->maxdata = 0xffff;
729 s->range_table = &range_daqp_ai;
730 s->insn_read = daqp_ai_insn_read;
731 s->do_cmdtest = daqp_ai_cmdtest;
732 s->do_cmd = daqp_ai_cmd;
733 s->cancel = daqp_ai_cancel;
734
735 s = &dev->subdevices[1];
736 s->type = COMEDI_SUBD_AO;
737 s->subdev_flags = SDF_WRITABLE;
738 s->n_chan = 2;
739 s->maxdata = 0x0fff;
740 s->range_table = &range_bipolar5;
741 s->insn_write = daqp_ao_insn_write;
742 s->insn_read = comedi_readback_insn_read;
743
744 ret = comedi_alloc_subdev_readback(s);
745 if (ret)
746 return ret;
747
748 s = &dev->subdevices[2];
749 s->type = COMEDI_SUBD_DI;
750 s->subdev_flags = SDF_READABLE;
751 s->n_chan = 1;
752 s->maxdata = 1;
753 s->insn_bits = daqp_di_insn_bits;
754
755 s = &dev->subdevices[3];
756 s->type = COMEDI_SUBD_DO;
757 s->subdev_flags = SDF_WRITABLE;
758 s->n_chan = 1;
759 s->maxdata = 1;
760 s->insn_bits = daqp_do_insn_bits;
761
762 return 0;
763 }
764
765 static struct comedi_driver driver_daqp = {
766 .driver_name = "quatech_daqp_cs",
767 .module = THIS_MODULE,
768 .auto_attach = daqp_auto_attach,
769 .detach = comedi_pcmcia_disable,
770 };
771
772 static int daqp_cs_suspend(struct pcmcia_device *link)
773 {
774 struct comedi_device *dev = link->priv;
775 struct daqp_private *devpriv = dev ? dev->private : NULL;
776
777 /* Mark the device as stopped, to block IO until later */
778 if (devpriv)
779 devpriv->stop = 1;
780
781 return 0;
782 }
783
784 static int daqp_cs_resume(struct pcmcia_device *link)
785 {
786 struct comedi_device *dev = link->priv;
787 struct daqp_private *devpriv = dev ? dev->private : NULL;
788
789 if (devpriv)
790 devpriv->stop = 0;
791
792 return 0;
793 }
794
795 static int daqp_cs_attach(struct pcmcia_device *link)
796 {
797 return comedi_pcmcia_auto_config(link, &driver_daqp);
798 }
799
800 static const struct pcmcia_device_id daqp_cs_id_table[] = {
801 PCMCIA_DEVICE_MANF_CARD(0x0137, 0x0027),
802 PCMCIA_DEVICE_NULL
803 };
804 MODULE_DEVICE_TABLE(pcmcia, daqp_cs_id_table);
805
806 static struct pcmcia_driver daqp_cs_driver = {
807 .name = "quatech_daqp_cs",
808 .owner = THIS_MODULE,
809 .id_table = daqp_cs_id_table,
810 .probe = daqp_cs_attach,
811 .remove = comedi_pcmcia_auto_unconfig,
812 .suspend = daqp_cs_suspend,
813 .resume = daqp_cs_resume,
814 };
815 module_comedi_pcmcia_driver(driver_daqp, daqp_cs_driver);
816
817 MODULE_DESCRIPTION("Comedi driver for Quatech DAQP PCMCIA data capture cards");
818 MODULE_AUTHOR("Brent Baccala <baccala@freesoft.org>");
819 MODULE_LICENSE("GPL");
Linux kernel - Deliverables
This page took 0.062067 seconds and 5 git commands to generate.