2 * Freescale i.MX28 LRADC driver
4 * Copyright (c) 2012 DENX Software Engineering, GmbH.
5 * Marek Vasut <marex@denx.de>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
18 #include <linux/err.h>
19 #include <linux/interrupt.h>
20 #include <linux/device.h>
21 #include <linux/kernel.h>
22 #include <linux/slab.h>
24 #include <linux/of_device.h>
25 #include <linux/sysfs.h>
26 #include <linux/list.h>
28 #include <linux/module.h>
29 #include <linux/platform_device.h>
30 #include <linux/spinlock.h>
31 #include <linux/wait.h>
32 #include <linux/sched.h>
33 #include <linux/stmp_device.h>
34 #include <linux/bitops.h>
35 #include <linux/completion.h>
36 #include <linux/delay.h>
37 #include <linux/input.h>
38 #include <linux/clk.h>
40 #include <linux/iio/iio.h>
41 #include <linux/iio/sysfs.h>
42 #include <linux/iio/buffer.h>
43 #include <linux/iio/trigger.h>
44 #include <linux/iio/trigger_consumer.h>
45 #include <linux/iio/triggered_buffer.h>
47 #define DRIVER_NAME "mxs-lradc"
49 #define LRADC_MAX_DELAY_CHANS 4
50 #define LRADC_MAX_MAPPED_CHANS 8
51 #define LRADC_MAX_TOTAL_CHANS 16
53 #define LRADC_DELAY_TIMER_HZ 2000
56 * Make this runtime configurable if necessary. Currently, if the buffered mode
57 * is enabled, the LRADC takes LRADC_DELAY_TIMER_LOOP samples of data before
58 * triggering IRQ. The sampling happens every (LRADC_DELAY_TIMER_PER / 2000)
59 * seconds. The result is that the samples arrive every 500mS.
61 #define LRADC_DELAY_TIMER_PER 200
62 #define LRADC_DELAY_TIMER_LOOP 5
65 * Once the pen touches the touchscreen, the touchscreen switches from
66 * IRQ-driven mode to polling mode to prevent interrupt storm. The polling
67 * is realized by worker thread, which is called every 20 or so milliseconds.
68 * This gives the touchscreen enough fluence and does not strain the system
71 #define LRADC_TS_SAMPLE_DELAY_MS 5
74 * The LRADC reads the following amount of samples from each touchscreen
75 * channel and the driver then computes avarage of these.
77 #define LRADC_TS_SAMPLE_AMOUNT 4
84 static const char * const mx23_lradc_irq_names
[] = {
85 "mxs-lradc-touchscreen",
96 static const char * const mx28_lradc_irq_names
[] = {
97 "mxs-lradc-touchscreen",
100 "mxs-lradc-channel0",
101 "mxs-lradc-channel1",
102 "mxs-lradc-channel2",
103 "mxs-lradc-channel3",
104 "mxs-lradc-channel4",
105 "mxs-lradc-channel5",
106 "mxs-lradc-channel6",
107 "mxs-lradc-channel7",
112 struct mxs_lradc_of_config
{
114 const char * const *irq_name
;
115 const uint32_t *vref_mv
;
118 #define VREF_MV_BASE 1850
120 static const uint32_t mx23_vref_mv
[LRADC_MAX_TOTAL_CHANS
] = {
121 VREF_MV_BASE
, /* CH0 */
122 VREF_MV_BASE
, /* CH1 */
123 VREF_MV_BASE
, /* CH2 */
124 VREF_MV_BASE
, /* CH3 */
125 VREF_MV_BASE
, /* CH4 */
126 VREF_MV_BASE
, /* CH5 */
127 VREF_MV_BASE
* 2, /* CH6 VDDIO */
128 VREF_MV_BASE
* 4, /* CH7 VBATT */
129 VREF_MV_BASE
, /* CH8 Temp sense 0 */
130 VREF_MV_BASE
, /* CH9 Temp sense 1 */
131 VREF_MV_BASE
, /* CH10 */
132 VREF_MV_BASE
, /* CH11 */
133 VREF_MV_BASE
, /* CH12 USB_DP */
134 VREF_MV_BASE
, /* CH13 USB_DN */
135 VREF_MV_BASE
, /* CH14 VBG */
136 VREF_MV_BASE
* 4, /* CH15 VDD5V */
139 static const uint32_t mx28_vref_mv
[LRADC_MAX_TOTAL_CHANS
] = {
140 VREF_MV_BASE
, /* CH0 */
141 VREF_MV_BASE
, /* CH1 */
142 VREF_MV_BASE
, /* CH2 */
143 VREF_MV_BASE
, /* CH3 */
144 VREF_MV_BASE
, /* CH4 */
145 VREF_MV_BASE
, /* CH5 */
146 VREF_MV_BASE
, /* CH6 */
147 VREF_MV_BASE
* 4, /* CH7 VBATT */
148 VREF_MV_BASE
, /* CH8 Temp sense 0 */
149 VREF_MV_BASE
, /* CH9 Temp sense 1 */
150 VREF_MV_BASE
* 2, /* CH10 VDDIO */
151 VREF_MV_BASE
, /* CH11 VTH */
152 VREF_MV_BASE
* 2, /* CH12 VDDA */
153 VREF_MV_BASE
, /* CH13 VDDD */
154 VREF_MV_BASE
, /* CH14 VBG */
155 VREF_MV_BASE
* 4, /* CH15 VDD5V */
158 static const struct mxs_lradc_of_config mxs_lradc_of_config
[] = {
160 .irq_count
= ARRAY_SIZE(mx23_lradc_irq_names
),
161 .irq_name
= mx23_lradc_irq_names
,
162 .vref_mv
= mx23_vref_mv
,
165 .irq_count
= ARRAY_SIZE(mx28_lradc_irq_names
),
166 .irq_name
= mx28_lradc_irq_names
,
167 .vref_mv
= mx28_vref_mv
,
172 MXS_LRADC_TOUCHSCREEN_NONE
= 0,
173 MXS_LRADC_TOUCHSCREEN_4WIRE
,
174 MXS_LRADC_TOUCHSCREEN_5WIRE
,
178 * Touchscreen handling
180 enum lradc_ts_plate
{
184 LRADC_SAMPLE_PRESSURE
,
188 enum mxs_lradc_divbytwo
{
189 MXS_LRADC_DIV_DISABLED
= 0,
190 MXS_LRADC_DIV_ENABLED
,
193 struct mxs_lradc_scale
{
194 unsigned int integer
;
206 struct iio_trigger
*trig
;
210 struct completion completion
;
212 const uint32_t *vref_mv
;
213 struct mxs_lradc_scale scale_avail
[LRADC_MAX_TOTAL_CHANS
][2];
214 unsigned long is_divided
;
217 * Touchscreen LRADC channels receives a private slot in the CTRL4
218 * register, the slot #7. Therefore only 7 slots instead of 8 in the
219 * CTRL4 register can be mapped to LRADC channels when using the
222 * Furthermore, certain LRADC channels are shared between touchscreen
223 * and/or touch-buttons and generic LRADC block. Therefore when using
224 * either of these, these channels are not available for the regular
225 * sampling. The shared channels are as follows:
227 * CH0 -- Touch button #0
228 * CH1 -- Touch button #1
229 * CH2 -- Touch screen XPUL
230 * CH3 -- Touch screen YPLL
231 * CH4 -- Touch screen XNUL
232 * CH5 -- Touch screen YNLR
233 * CH6 -- Touch screen WIPER (5-wire only)
235 * The bitfields below represents which parts of the LRADC block are
236 * switched into special mode of operation. These channels can not
237 * be sampled as regular LRADC channels. The driver will refuse any
238 * attempt to sample these channels.
240 #define CHAN_MASK_TOUCHBUTTON (0x3 << 0)
241 #define CHAN_MASK_TOUCHSCREEN_4WIRE (0xf << 2)
242 #define CHAN_MASK_TOUCHSCREEN_5WIRE (0x1f << 2)
243 enum mxs_lradc_ts use_touchscreen
;
244 bool use_touchbutton
;
246 struct input_dev
*ts_input
;
248 enum mxs_lradc_id soc
;
249 enum lradc_ts_plate cur_plate
; /* statemachine */
253 unsigned ts_pressure
;
255 /* handle touchscreen's physical behaviour */
256 /* samples per coordinate */
257 unsigned over_sample_cnt
;
258 /* time clocks between samples */
259 unsigned over_sample_delay
;
260 /* time in clocks to wait after the plates where switched */
261 unsigned settling_delay
;
264 #define LRADC_CTRL0 0x00
265 # define LRADC_CTRL0_MX28_TOUCH_DETECT_ENABLE (1 << 23)
266 # define LRADC_CTRL0_MX28_TOUCH_SCREEN_TYPE (1 << 22)
267 # define LRADC_CTRL0_MX28_YNNSW /* YM */ (1 << 21)
268 # define LRADC_CTRL0_MX28_YPNSW /* YP */ (1 << 20)
269 # define LRADC_CTRL0_MX28_YPPSW /* YP */ (1 << 19)
270 # define LRADC_CTRL0_MX28_XNNSW /* XM */ (1 << 18)
271 # define LRADC_CTRL0_MX28_XNPSW /* XM */ (1 << 17)
272 # define LRADC_CTRL0_MX28_XPPSW /* XP */ (1 << 16)
274 # define LRADC_CTRL0_MX23_TOUCH_DETECT_ENABLE (1 << 20)
275 # define LRADC_CTRL0_MX23_YM (1 << 19)
276 # define LRADC_CTRL0_MX23_XM (1 << 18)
277 # define LRADC_CTRL0_MX23_YP (1 << 17)
278 # define LRADC_CTRL0_MX23_XP (1 << 16)
280 # define LRADC_CTRL0_MX28_PLATE_MASK \
281 (LRADC_CTRL0_MX28_TOUCH_DETECT_ENABLE | \
282 LRADC_CTRL0_MX28_YNNSW | LRADC_CTRL0_MX28_YPNSW | \
283 LRADC_CTRL0_MX28_YPPSW | LRADC_CTRL0_MX28_XNNSW | \
284 LRADC_CTRL0_MX28_XNPSW | LRADC_CTRL0_MX28_XPPSW)
286 # define LRADC_CTRL0_MX23_PLATE_MASK \
287 (LRADC_CTRL0_MX23_TOUCH_DETECT_ENABLE | \
288 LRADC_CTRL0_MX23_YM | LRADC_CTRL0_MX23_XM | \
289 LRADC_CTRL0_MX23_YP | LRADC_CTRL0_MX23_XP)
291 #define LRADC_CTRL1 0x10
292 #define LRADC_CTRL1_TOUCH_DETECT_IRQ_EN (1 << 24)
293 #define LRADC_CTRL1_LRADC_IRQ_EN(n) (1 << ((n) + 16))
294 #define LRADC_CTRL1_MX28_LRADC_IRQ_EN_MASK (0x1fff << 16)
295 #define LRADC_CTRL1_MX23_LRADC_IRQ_EN_MASK (0x01ff << 16)
296 #define LRADC_CTRL1_LRADC_IRQ_EN_OFFSET 16
297 #define LRADC_CTRL1_TOUCH_DETECT_IRQ (1 << 8)
298 #define LRADC_CTRL1_LRADC_IRQ(n) (1 << (n))
299 #define LRADC_CTRL1_MX28_LRADC_IRQ_MASK 0x1fff
300 #define LRADC_CTRL1_MX23_LRADC_IRQ_MASK 0x01ff
301 #define LRADC_CTRL1_LRADC_IRQ_OFFSET 0
303 #define LRADC_CTRL2 0x20
304 #define LRADC_CTRL2_DIVIDE_BY_TWO_OFFSET 24
305 #define LRADC_CTRL2_TEMPSENSE_PWD (1 << 15)
307 #define LRADC_STATUS 0x40
308 #define LRADC_STATUS_TOUCH_DETECT_RAW (1 << 0)
310 #define LRADC_CH(n) (0x50 + (0x10 * (n)))
311 #define LRADC_CH_ACCUMULATE (1 << 29)
312 #define LRADC_CH_NUM_SAMPLES_MASK (0x1f << 24)
313 #define LRADC_CH_NUM_SAMPLES_OFFSET 24
314 #define LRADC_CH_NUM_SAMPLES(x) \
315 ((x) << LRADC_CH_NUM_SAMPLES_OFFSET)
316 #define LRADC_CH_VALUE_MASK 0x3ffff
317 #define LRADC_CH_VALUE_OFFSET 0
319 #define LRADC_DELAY(n) (0xd0 + (0x10 * (n)))
320 #define LRADC_DELAY_TRIGGER_LRADCS_MASK (0xff << 24)
321 #define LRADC_DELAY_TRIGGER_LRADCS_OFFSET 24
322 #define LRADC_DELAY_TRIGGER(x) \
323 (((x) << LRADC_DELAY_TRIGGER_LRADCS_OFFSET) & \
324 LRADC_DELAY_TRIGGER_LRADCS_MASK)
325 #define LRADC_DELAY_KICK (1 << 20)
326 #define LRADC_DELAY_TRIGGER_DELAYS_MASK (0xf << 16)
327 #define LRADC_DELAY_TRIGGER_DELAYS_OFFSET 16
328 #define LRADC_DELAY_TRIGGER_DELAYS(x) \
329 (((x) << LRADC_DELAY_TRIGGER_DELAYS_OFFSET) & \
330 LRADC_DELAY_TRIGGER_DELAYS_MASK)
331 #define LRADC_DELAY_LOOP_COUNT_MASK (0x1f << 11)
332 #define LRADC_DELAY_LOOP_COUNT_OFFSET 11
333 #define LRADC_DELAY_LOOP(x) \
334 (((x) << LRADC_DELAY_LOOP_COUNT_OFFSET) & \
335 LRADC_DELAY_LOOP_COUNT_MASK)
336 #define LRADC_DELAY_DELAY_MASK 0x7ff
337 #define LRADC_DELAY_DELAY_OFFSET 0
338 #define LRADC_DELAY_DELAY(x) \
339 (((x) << LRADC_DELAY_DELAY_OFFSET) & \
340 LRADC_DELAY_DELAY_MASK)
342 #define LRADC_CTRL4 0x140
343 #define LRADC_CTRL4_LRADCSELECT_MASK(n) (0xf << ((n) * 4))
344 #define LRADC_CTRL4_LRADCSELECT_OFFSET(n) ((n) * 4)
346 #define LRADC_RESOLUTION 12
347 #define LRADC_SINGLE_SAMPLE_MASK ((1 << LRADC_RESOLUTION) - 1)
349 static void mxs_lradc_reg_set(struct mxs_lradc
*lradc
, u32 val
, u32 reg
)
351 writel(val
, lradc
->base
+ reg
+ STMP_OFFSET_REG_SET
);
354 static void mxs_lradc_reg_clear(struct mxs_lradc
*lradc
, u32 val
, u32 reg
)
356 writel(val
, lradc
->base
+ reg
+ STMP_OFFSET_REG_CLR
);
359 static void mxs_lradc_reg_wrt(struct mxs_lradc
*lradc
, u32 val
, u32 reg
)
361 writel(val
, lradc
->base
+ reg
);
364 static u32
mxs_lradc_plate_mask(struct mxs_lradc
*lradc
)
366 if (lradc
->soc
== IMX23_LRADC
)
367 return LRADC_CTRL0_MX23_PLATE_MASK
;
368 return LRADC_CTRL0_MX28_PLATE_MASK
;
371 static u32
mxs_lradc_irq_en_mask(struct mxs_lradc
*lradc
)
373 if (lradc
->soc
== IMX23_LRADC
)
374 return LRADC_CTRL1_MX23_LRADC_IRQ_EN_MASK
;
375 return LRADC_CTRL1_MX28_LRADC_IRQ_EN_MASK
;
378 static u32
mxs_lradc_irq_mask(struct mxs_lradc
*lradc
)
380 if (lradc
->soc
== IMX23_LRADC
)
381 return LRADC_CTRL1_MX23_LRADC_IRQ_MASK
;
382 return LRADC_CTRL1_MX28_LRADC_IRQ_MASK
;
385 static u32
mxs_lradc_touch_detect_bit(struct mxs_lradc
*lradc
)
387 if (lradc
->soc
== IMX23_LRADC
)
388 return LRADC_CTRL0_MX23_TOUCH_DETECT_ENABLE
;
389 return LRADC_CTRL0_MX28_TOUCH_DETECT_ENABLE
;
392 static u32
mxs_lradc_drive_x_plate(struct mxs_lradc
*lradc
)
394 if (lradc
->soc
== IMX23_LRADC
)
395 return LRADC_CTRL0_MX23_XP
| LRADC_CTRL0_MX23_XM
;
396 return LRADC_CTRL0_MX28_XPPSW
| LRADC_CTRL0_MX28_XNNSW
;
399 static u32
mxs_lradc_drive_y_plate(struct mxs_lradc
*lradc
)
401 if (lradc
->soc
== IMX23_LRADC
)
402 return LRADC_CTRL0_MX23_YP
| LRADC_CTRL0_MX23_YM
;
403 return LRADC_CTRL0_MX28_YPPSW
| LRADC_CTRL0_MX28_YNNSW
;
406 static u32
mxs_lradc_drive_pressure(struct mxs_lradc
*lradc
)
408 if (lradc
->soc
== IMX23_LRADC
)
409 return LRADC_CTRL0_MX23_YP
| LRADC_CTRL0_MX23_XM
;
410 return LRADC_CTRL0_MX28_YPPSW
| LRADC_CTRL0_MX28_XNNSW
;
413 static bool mxs_lradc_check_touch_event(struct mxs_lradc
*lradc
)
415 return !!(readl(lradc
->base
+ LRADC_STATUS
) &
416 LRADC_STATUS_TOUCH_DETECT_RAW
);
419 static void mxs_lradc_setup_ts_channel(struct mxs_lradc
*lradc
, unsigned ch
)
422 * prepare for oversampling conversion
424 * from the datasheet:
425 * "The ACCUMULATE bit in the appropriate channel register
426 * HW_LRADC_CHn must be set to 1 if NUM_SAMPLES is greater then 0;
427 * otherwise, the IRQs will not fire."
429 mxs_lradc_reg_wrt(lradc
, LRADC_CH_ACCUMULATE
|
430 LRADC_CH_NUM_SAMPLES(lradc
->over_sample_cnt
- 1),
433 /* from the datasheet:
434 * "Software must clear this register in preparation for a
435 * multi-cycle accumulation.
437 mxs_lradc_reg_clear(lradc
, LRADC_CH_VALUE_MASK
, LRADC_CH(ch
));
440 * prepare the delay/loop unit according to the oversampling count
442 * from the datasheet:
443 * "The DELAY fields in HW_LRADC_DELAY0, HW_LRADC_DELAY1,
444 * HW_LRADC_DELAY2, and HW_LRADC_DELAY3 must be non-zero; otherwise,
445 * the LRADC will not trigger the delay group."
447 mxs_lradc_reg_wrt(lradc
, LRADC_DELAY_TRIGGER(1 << ch
) |
448 LRADC_DELAY_TRIGGER_DELAYS(0) |
449 LRADC_DELAY_LOOP(lradc
->over_sample_cnt
- 1) |
450 LRADC_DELAY_DELAY(lradc
->over_sample_delay
- 1),
453 mxs_lradc_reg_clear(lradc
, LRADC_CTRL1_LRADC_IRQ(2) |
454 LRADC_CTRL1_LRADC_IRQ(3) | LRADC_CTRL1_LRADC_IRQ(4) |
455 LRADC_CTRL1_LRADC_IRQ(5), LRADC_CTRL1
);
457 /* wake us again, when the complete conversion is done */
458 mxs_lradc_reg_set(lradc
, LRADC_CTRL1_LRADC_IRQ_EN(ch
), LRADC_CTRL1
);
460 * after changing the touchscreen plates setting
461 * the signals need some initial time to settle. Start the
462 * SoC's delay unit and start the conversion later
465 mxs_lradc_reg_wrt(lradc
,
466 LRADC_DELAY_TRIGGER(0) | /* don't trigger ADC */
467 LRADC_DELAY_TRIGGER_DELAYS(1 << 3) | /* trigger DELAY unit#3 */
469 LRADC_DELAY_DELAY(lradc
->settling_delay
),
474 * Pressure detection is special:
475 * We want to do both required measurements for the pressure detection in
476 * one turn. Use the hardware features to chain both conversions and let the
477 * hardware report one interrupt if both conversions are done
479 static void mxs_lradc_setup_ts_pressure(struct mxs_lradc
*lradc
, unsigned ch1
,
485 * prepare for oversampling conversion
487 * from the datasheet:
488 * "The ACCUMULATE bit in the appropriate channel register
489 * HW_LRADC_CHn must be set to 1 if NUM_SAMPLES is greater then 0;
490 * otherwise, the IRQs will not fire."
492 reg
= LRADC_CH_ACCUMULATE
|
493 LRADC_CH_NUM_SAMPLES(lradc
->over_sample_cnt
- 1);
494 mxs_lradc_reg_wrt(lradc
, reg
, LRADC_CH(ch1
));
495 mxs_lradc_reg_wrt(lradc
, reg
, LRADC_CH(ch2
));
497 /* from the datasheet:
498 * "Software must clear this register in preparation for a
499 * multi-cycle accumulation.
501 mxs_lradc_reg_clear(lradc
, LRADC_CH_VALUE_MASK
, LRADC_CH(ch1
));
502 mxs_lradc_reg_clear(lradc
, LRADC_CH_VALUE_MASK
, LRADC_CH(ch2
));
504 /* prepare the delay/loop unit according to the oversampling count */
505 mxs_lradc_reg_wrt(lradc
, LRADC_DELAY_TRIGGER(1 << ch1
) |
506 LRADC_DELAY_TRIGGER(1 << ch2
) | /* start both channels */
507 LRADC_DELAY_TRIGGER_DELAYS(0) |
508 LRADC_DELAY_LOOP(lradc
->over_sample_cnt
- 1) |
509 LRADC_DELAY_DELAY(lradc
->over_sample_delay
- 1),
512 mxs_lradc_reg_clear(lradc
, LRADC_CTRL1_LRADC_IRQ(2) |
513 LRADC_CTRL1_LRADC_IRQ(3) | LRADC_CTRL1_LRADC_IRQ(4) |
514 LRADC_CTRL1_LRADC_IRQ(5), LRADC_CTRL1
);
516 /* wake us again, when the conversions are done */
517 mxs_lradc_reg_set(lradc
, LRADC_CTRL1_LRADC_IRQ_EN(ch2
), LRADC_CTRL1
);
519 * after changing the touchscreen plates setting
520 * the signals need some initial time to settle. Start the
521 * SoC's delay unit and start the conversion later
524 mxs_lradc_reg_wrt(lradc
,
525 LRADC_DELAY_TRIGGER(0) | /* don't trigger ADC */
526 LRADC_DELAY_TRIGGER_DELAYS(1 << 3) | /* trigger DELAY unit#3 */
528 LRADC_DELAY_DELAY(lradc
->settling_delay
), LRADC_DELAY(2));
531 static unsigned mxs_lradc_read_raw_channel(struct mxs_lradc
*lradc
,
535 unsigned num_samples
, val
;
537 reg
= readl(lradc
->base
+ LRADC_CH(channel
));
538 if (reg
& LRADC_CH_ACCUMULATE
)
539 num_samples
= lradc
->over_sample_cnt
;
543 val
= (reg
& LRADC_CH_VALUE_MASK
) >> LRADC_CH_VALUE_OFFSET
;
544 return val
/ num_samples
;
547 static unsigned mxs_lradc_read_ts_pressure(struct mxs_lradc
*lradc
,
548 unsigned ch1
, unsigned ch2
)
551 unsigned pressure
, m1
, m2
;
553 mask
= LRADC_CTRL1_LRADC_IRQ(ch1
) | LRADC_CTRL1_LRADC_IRQ(ch2
);
554 reg
= readl(lradc
->base
+ LRADC_CTRL1
) & mask
;
556 while (reg
!= mask
) {
557 reg
= readl(lradc
->base
+ LRADC_CTRL1
) & mask
;
558 dev_dbg(lradc
->dev
, "One channel is still busy: %X\n", reg
);
561 m1
= mxs_lradc_read_raw_channel(lradc
, ch1
);
562 m2
= mxs_lradc_read_raw_channel(lradc
, ch2
);
565 dev_warn(lradc
->dev
, "Cannot calculate pressure\n");
566 return 1 << (LRADC_RESOLUTION
- 1);
569 /* simply scale the value from 0 ... max ADC resolution */
571 pressure
*= (1 << LRADC_RESOLUTION
);
574 dev_dbg(lradc
->dev
, "Pressure = %u\n", pressure
);
583 static int mxs_lradc_read_ts_channel(struct mxs_lradc
*lradc
)
588 reg
= readl(lradc
->base
+ LRADC_CTRL1
);
590 /* only channels 3 to 5 are of interest here */
591 if (reg
& LRADC_CTRL1_LRADC_IRQ(TS_CH_YP
)) {
592 mxs_lradc_reg_clear(lradc
, LRADC_CTRL1_LRADC_IRQ_EN(TS_CH_YP
) |
593 LRADC_CTRL1_LRADC_IRQ(TS_CH_YP
), LRADC_CTRL1
);
594 val
= mxs_lradc_read_raw_channel(lradc
, TS_CH_YP
);
595 } else if (reg
& LRADC_CTRL1_LRADC_IRQ(TS_CH_XM
)) {
596 mxs_lradc_reg_clear(lradc
, LRADC_CTRL1_LRADC_IRQ_EN(TS_CH_XM
) |
597 LRADC_CTRL1_LRADC_IRQ(TS_CH_XM
), LRADC_CTRL1
);
598 val
= mxs_lradc_read_raw_channel(lradc
, TS_CH_XM
);
599 } else if (reg
& LRADC_CTRL1_LRADC_IRQ(TS_CH_YM
)) {
600 mxs_lradc_reg_clear(lradc
, LRADC_CTRL1_LRADC_IRQ_EN(TS_CH_YM
) |
601 LRADC_CTRL1_LRADC_IRQ(TS_CH_YM
), LRADC_CTRL1
);
602 val
= mxs_lradc_read_raw_channel(lradc
, TS_CH_YM
);
607 mxs_lradc_reg_wrt(lradc
, 0, LRADC_DELAY(2));
608 mxs_lradc_reg_wrt(lradc
, 0, LRADC_DELAY(3));
614 * YP(open)--+-------------+
617 * YM(-)--+-------------+ |
622 * "weak+" means 200k Ohm VDDIO
625 static void mxs_lradc_setup_touch_detection(struct mxs_lradc
*lradc
)
628 * In order to detect a touch event the 'touch detect enable' bit
630 * - a weak pullup to the X+ connector
631 * - a strong ground at the Y- connector
633 mxs_lradc_reg_clear(lradc
, mxs_lradc_plate_mask(lradc
), LRADC_CTRL0
);
634 mxs_lradc_reg_set(lradc
, mxs_lradc_touch_detect_bit(lradc
),
639 * YP(meas)--+-------------+
642 * YM(open)--+-------------+ |
647 * (+) means here 1.85 V
650 static void mxs_lradc_prepare_x_pos(struct mxs_lradc
*lradc
)
652 mxs_lradc_reg_clear(lradc
, mxs_lradc_plate_mask(lradc
), LRADC_CTRL0
);
653 mxs_lradc_reg_set(lradc
, mxs_lradc_drive_x_plate(lradc
), LRADC_CTRL0
);
655 lradc
->cur_plate
= LRADC_SAMPLE_X
;
656 mxs_lradc_setup_ts_channel(lradc
, TS_CH_YP
);
660 * YP(+)--+-------------+
663 * YM(-)--+-------------+ |
668 * (+) means here 1.85 V
671 static void mxs_lradc_prepare_y_pos(struct mxs_lradc
*lradc
)
673 mxs_lradc_reg_clear(lradc
, mxs_lradc_plate_mask(lradc
), LRADC_CTRL0
);
674 mxs_lradc_reg_set(lradc
, mxs_lradc_drive_y_plate(lradc
), LRADC_CTRL0
);
676 lradc
->cur_plate
= LRADC_SAMPLE_Y
;
677 mxs_lradc_setup_ts_channel(lradc
, TS_CH_XM
);
681 * YP(+)--+-------------+
684 * YM(meas)--+-------------+ |
689 * (+) means here 1.85 V
692 static void mxs_lradc_prepare_pressure(struct mxs_lradc
*lradc
)
694 mxs_lradc_reg_clear(lradc
, mxs_lradc_plate_mask(lradc
), LRADC_CTRL0
);
695 mxs_lradc_reg_set(lradc
, mxs_lradc_drive_pressure(lradc
), LRADC_CTRL0
);
697 lradc
->cur_plate
= LRADC_SAMPLE_PRESSURE
;
698 mxs_lradc_setup_ts_pressure(lradc
, TS_CH_XP
, TS_CH_YM
);
701 static void mxs_lradc_enable_touch_detection(struct mxs_lradc
*lradc
)
703 mxs_lradc_setup_touch_detection(lradc
);
705 lradc
->cur_plate
= LRADC_TOUCH
;
706 mxs_lradc_reg_clear(lradc
, LRADC_CTRL1_TOUCH_DETECT_IRQ
|
707 LRADC_CTRL1_TOUCH_DETECT_IRQ_EN
, LRADC_CTRL1
);
708 mxs_lradc_reg_set(lradc
, LRADC_CTRL1_TOUCH_DETECT_IRQ_EN
, LRADC_CTRL1
);
711 static void mxs_lradc_report_ts_event(struct mxs_lradc
*lradc
)
713 input_report_abs(lradc
->ts_input
, ABS_X
, lradc
->ts_x_pos
);
714 input_report_abs(lradc
->ts_input
, ABS_Y
, lradc
->ts_y_pos
);
715 input_report_abs(lradc
->ts_input
, ABS_PRESSURE
, lradc
->ts_pressure
);
716 input_report_key(lradc
->ts_input
, BTN_TOUCH
, 1);
717 input_sync(lradc
->ts_input
);
720 static void mxs_lradc_complete_touch_event(struct mxs_lradc
*lradc
)
722 mxs_lradc_setup_touch_detection(lradc
);
723 lradc
->cur_plate
= LRADC_SAMPLE_VALID
;
725 * start a dummy conversion to burn time to settle the signals
726 * note: we are not interested in the conversion's value
728 mxs_lradc_reg_wrt(lradc
, 0, LRADC_CH(5));
729 mxs_lradc_reg_clear(lradc
, LRADC_CTRL1_LRADC_IRQ(5), LRADC_CTRL1
);
730 mxs_lradc_reg_set(lradc
, LRADC_CTRL1_LRADC_IRQ_EN(5), LRADC_CTRL1
);
731 mxs_lradc_reg_wrt(lradc
, LRADC_DELAY_TRIGGER(1 << 5) |
732 LRADC_DELAY_KICK
| LRADC_DELAY_DELAY(10), /* waste 5 ms */
737 * in order to avoid false measurements, report only samples where
738 * the surface is still touched after the position measurement
740 static void mxs_lradc_finish_touch_event(struct mxs_lradc
*lradc
, bool valid
)
742 /* if it is still touched, report the sample */
743 if (valid
&& mxs_lradc_check_touch_event(lradc
)) {
744 lradc
->ts_valid
= true;
745 mxs_lradc_report_ts_event(lradc
);
748 /* if it is even still touched, continue with the next measurement */
749 if (mxs_lradc_check_touch_event(lradc
)) {
750 mxs_lradc_prepare_y_pos(lradc
);
754 if (lradc
->ts_valid
) {
755 /* signal the release */
756 lradc
->ts_valid
= false;
757 input_report_key(lradc
->ts_input
, BTN_TOUCH
, 0);
758 input_sync(lradc
->ts_input
);
761 /* if it is released, wait for the next touch via IRQ */
762 lradc
->cur_plate
= LRADC_TOUCH
;
763 mxs_lradc_reg_clear(lradc
, LRADC_CTRL1_TOUCH_DETECT_IRQ
, LRADC_CTRL1
);
764 mxs_lradc_reg_set(lradc
, LRADC_CTRL1_TOUCH_DETECT_IRQ_EN
, LRADC_CTRL1
);
767 /* touchscreen's state machine */
768 static void mxs_lradc_handle_touch(struct mxs_lradc
*lradc
)
772 switch (lradc
->cur_plate
) {
775 * start with the Y-pos, because it uses nearly the same plate
776 * settings like the touch detection
778 if (mxs_lradc_check_touch_event(lradc
)) {
779 mxs_lradc_reg_clear(lradc
,
780 LRADC_CTRL1_TOUCH_DETECT_IRQ_EN
,
782 mxs_lradc_prepare_y_pos(lradc
);
784 mxs_lradc_reg_clear(lradc
, LRADC_CTRL1_TOUCH_DETECT_IRQ
,
789 val
= mxs_lradc_read_ts_channel(lradc
);
791 mxs_lradc_enable_touch_detection(lradc
); /* re-start */
794 lradc
->ts_y_pos
= val
;
795 mxs_lradc_prepare_x_pos(lradc
);
799 val
= mxs_lradc_read_ts_channel(lradc
);
801 mxs_lradc_enable_touch_detection(lradc
); /* re-start */
804 lradc
->ts_x_pos
= val
;
805 mxs_lradc_prepare_pressure(lradc
);
808 case LRADC_SAMPLE_PRESSURE
:
810 mxs_lradc_read_ts_pressure(lradc
, TS_CH_XP
, TS_CH_YM
);
811 mxs_lradc_complete_touch_event(lradc
);
814 case LRADC_SAMPLE_VALID
:
815 val
= mxs_lradc_read_ts_channel(lradc
); /* ignore the value */
816 mxs_lradc_finish_touch_event(lradc
, 1);
824 static int mxs_lradc_read_single(struct iio_dev
*iio_dev
, int chan
, int *val
)
826 struct mxs_lradc
*lradc
= iio_priv(iio_dev
);
830 * See if there is no buffered operation in progess. If there is, simply
831 * bail out. This can be improved to support both buffered and raw IO at
832 * the same time, yet the code becomes horribly complicated. Therefore I
833 * applied KISS principle here.
835 ret
= mutex_trylock(&lradc
->lock
);
839 reinit_completion(&lradc
->completion
);
842 * No buffered operation in progress, map the channel and trigger it.
843 * Virtual channel 0 is always used here as the others are always not
844 * used if doing raw sampling.
846 if (lradc
->soc
== IMX28_LRADC
)
847 mxs_lradc_reg_clear(lradc
, LRADC_CTRL1_MX28_LRADC_IRQ_EN_MASK
,
849 mxs_lradc_reg_clear(lradc
, 0xff, LRADC_CTRL0
);
851 /* Enable / disable the divider per requirement */
852 if (test_bit(chan
, &lradc
->is_divided
))
853 mxs_lradc_reg_set(lradc
, 1 << LRADC_CTRL2_DIVIDE_BY_TWO_OFFSET
,
856 mxs_lradc_reg_clear(lradc
,
857 1 << LRADC_CTRL2_DIVIDE_BY_TWO_OFFSET
, LRADC_CTRL2
);
859 /* Clean the slot's previous content, then set new one. */
860 mxs_lradc_reg_clear(lradc
, LRADC_CTRL4_LRADCSELECT_MASK(0),
862 mxs_lradc_reg_set(lradc
, chan
, LRADC_CTRL4
);
864 mxs_lradc_reg_wrt(lradc
, 0, LRADC_CH(0));
866 /* Enable the IRQ and start sampling the channel. */
867 mxs_lradc_reg_set(lradc
, LRADC_CTRL1_LRADC_IRQ_EN(0), LRADC_CTRL1
);
868 mxs_lradc_reg_set(lradc
, 1 << 0, LRADC_CTRL0
);
870 /* Wait for completion on the channel, 1 second max. */
871 ret
= wait_for_completion_killable_timeout(&lradc
->completion
, HZ
);
878 *val
= readl(lradc
->base
+ LRADC_CH(0)) & LRADC_CH_VALUE_MASK
;
882 mxs_lradc_reg_clear(lradc
, LRADC_CTRL1_LRADC_IRQ_EN(0), LRADC_CTRL1
);
884 mutex_unlock(&lradc
->lock
);
889 static int mxs_lradc_read_temp(struct iio_dev
*iio_dev
, int *val
)
893 ret
= mxs_lradc_read_single(iio_dev
, 8, &min
);
894 if (ret
!= IIO_VAL_INT
)
897 ret
= mxs_lradc_read_single(iio_dev
, 9, &max
);
898 if (ret
!= IIO_VAL_INT
)
906 static int mxs_lradc_read_raw(struct iio_dev
*iio_dev
,
907 const struct iio_chan_spec
*chan
,
908 int *val
, int *val2
, long m
)
910 struct mxs_lradc
*lradc
= iio_priv(iio_dev
);
913 case IIO_CHAN_INFO_RAW
:
914 if (chan
->type
== IIO_TEMP
)
915 return mxs_lradc_read_temp(iio_dev
, val
);
917 return mxs_lradc_read_single(iio_dev
, chan
->channel
, val
);
919 case IIO_CHAN_INFO_SCALE
:
920 if (chan
->type
== IIO_TEMP
) {
921 /* From the datasheet, we have to multiply by 1.012 and
926 return IIO_VAL_INT_PLUS_MICRO
;
929 *val
= lradc
->vref_mv
[chan
->channel
];
930 *val2
= chan
->scan_type
.realbits
-
931 test_bit(chan
->channel
, &lradc
->is_divided
);
932 return IIO_VAL_FRACTIONAL_LOG2
;
934 case IIO_CHAN_INFO_OFFSET
:
935 if (chan
->type
== IIO_TEMP
) {
936 /* The calculated value from the ADC is in Kelvin, we
937 * want Celsius for hwmon so the offset is
943 return IIO_VAL_INT_PLUS_MICRO
;
955 static int mxs_lradc_write_raw(struct iio_dev
*iio_dev
,
956 const struct iio_chan_spec
*chan
,
957 int val
, int val2
, long m
)
959 struct mxs_lradc
*lradc
= iio_priv(iio_dev
);
960 struct mxs_lradc_scale
*scale_avail
=
961 lradc
->scale_avail
[chan
->channel
];
964 ret
= mutex_trylock(&lradc
->lock
);
969 case IIO_CHAN_INFO_SCALE
:
971 if (val
== scale_avail
[MXS_LRADC_DIV_DISABLED
].integer
&&
972 val2
== scale_avail
[MXS_LRADC_DIV_DISABLED
].nano
) {
973 /* divider by two disabled */
974 clear_bit(chan
->channel
, &lradc
->is_divided
);
976 } else if (val
== scale_avail
[MXS_LRADC_DIV_ENABLED
].integer
&&
977 val2
== scale_avail
[MXS_LRADC_DIV_ENABLED
].nano
) {
978 /* divider by two enabled */
979 set_bit(chan
->channel
, &lradc
->is_divided
);
989 mutex_unlock(&lradc
->lock
);
994 static int mxs_lradc_write_raw_get_fmt(struct iio_dev
*iio_dev
,
995 const struct iio_chan_spec
*chan
,
998 return IIO_VAL_INT_PLUS_NANO
;
1001 static ssize_t
mxs_lradc_show_scale_available_ch(struct device
*dev
,
1002 struct device_attribute
*attr
,
1006 struct iio_dev
*iio
= dev_to_iio_dev(dev
);
1007 struct mxs_lradc
*lradc
= iio_priv(iio
);
1010 for (i
= 0; i
< ARRAY_SIZE(lradc
->scale_avail
[ch
]); i
++)
1011 len
+= sprintf(buf
+ len
, "%d.%09u ",
1012 lradc
->scale_avail
[ch
][i
].integer
,
1013 lradc
->scale_avail
[ch
][i
].nano
);
1015 len
+= sprintf(buf
+ len
, "\n");
1020 static ssize_t
mxs_lradc_show_scale_available(struct device
*dev
,
1021 struct device_attribute
*attr
,
1024 struct iio_dev_attr
*iio_attr
= to_iio_dev_attr(attr
);
1026 return mxs_lradc_show_scale_available_ch(dev
, attr
, buf
,
1030 #define SHOW_SCALE_AVAILABLE_ATTR(ch) \
1031 static IIO_DEVICE_ATTR(in_voltage##ch##_scale_available, S_IRUGO, \
1032 mxs_lradc_show_scale_available, NULL, ch)
1034 SHOW_SCALE_AVAILABLE_ATTR(0);
1035 SHOW_SCALE_AVAILABLE_ATTR(1);
1036 SHOW_SCALE_AVAILABLE_ATTR(2);
1037 SHOW_SCALE_AVAILABLE_ATTR(3);
1038 SHOW_SCALE_AVAILABLE_ATTR(4);
1039 SHOW_SCALE_AVAILABLE_ATTR(5);
1040 SHOW_SCALE_AVAILABLE_ATTR(6);
1041 SHOW_SCALE_AVAILABLE_ATTR(7);
1042 SHOW_SCALE_AVAILABLE_ATTR(10);
1043 SHOW_SCALE_AVAILABLE_ATTR(11);
1044 SHOW_SCALE_AVAILABLE_ATTR(12);
1045 SHOW_SCALE_AVAILABLE_ATTR(13);
1046 SHOW_SCALE_AVAILABLE_ATTR(14);
1047 SHOW_SCALE_AVAILABLE_ATTR(15);
1049 static struct attribute
*mxs_lradc_attributes
[] = {
1050 &iio_dev_attr_in_voltage0_scale_available
.dev_attr
.attr
,
1051 &iio_dev_attr_in_voltage1_scale_available
.dev_attr
.attr
,
1052 &iio_dev_attr_in_voltage2_scale_available
.dev_attr
.attr
,
1053 &iio_dev_attr_in_voltage3_scale_available
.dev_attr
.attr
,
1054 &iio_dev_attr_in_voltage4_scale_available
.dev_attr
.attr
,
1055 &iio_dev_attr_in_voltage5_scale_available
.dev_attr
.attr
,
1056 &iio_dev_attr_in_voltage6_scale_available
.dev_attr
.attr
,
1057 &iio_dev_attr_in_voltage7_scale_available
.dev_attr
.attr
,
1058 &iio_dev_attr_in_voltage10_scale_available
.dev_attr
.attr
,
1059 &iio_dev_attr_in_voltage11_scale_available
.dev_attr
.attr
,
1060 &iio_dev_attr_in_voltage12_scale_available
.dev_attr
.attr
,
1061 &iio_dev_attr_in_voltage13_scale_available
.dev_attr
.attr
,
1062 &iio_dev_attr_in_voltage14_scale_available
.dev_attr
.attr
,
1063 &iio_dev_attr_in_voltage15_scale_available
.dev_attr
.attr
,
1067 static const struct attribute_group mxs_lradc_attribute_group
= {
1068 .attrs
= mxs_lradc_attributes
,
1071 static const struct iio_info mxs_lradc_iio_info
= {
1072 .driver_module
= THIS_MODULE
,
1073 .read_raw
= mxs_lradc_read_raw
,
1074 .write_raw
= mxs_lradc_write_raw
,
1075 .write_raw_get_fmt
= mxs_lradc_write_raw_get_fmt
,
1076 .attrs
= &mxs_lradc_attribute_group
,
1079 static int mxs_lradc_ts_open(struct input_dev
*dev
)
1081 struct mxs_lradc
*lradc
= input_get_drvdata(dev
);
1083 /* Enable the touch-detect circuitry. */
1084 mxs_lradc_enable_touch_detection(lradc
);
1089 static void mxs_lradc_disable_ts(struct mxs_lradc
*lradc
)
1091 /* stop all interrupts from firing */
1092 mxs_lradc_reg_clear(lradc
, LRADC_CTRL1_TOUCH_DETECT_IRQ_EN
|
1093 LRADC_CTRL1_LRADC_IRQ_EN(2) | LRADC_CTRL1_LRADC_IRQ_EN(3) |
1094 LRADC_CTRL1_LRADC_IRQ_EN(4) | LRADC_CTRL1_LRADC_IRQ_EN(5),
1097 /* Power-down touchscreen touch-detect circuitry. */
1098 mxs_lradc_reg_clear(lradc
, mxs_lradc_plate_mask(lradc
), LRADC_CTRL0
);
1101 static void mxs_lradc_ts_close(struct input_dev
*dev
)
1103 struct mxs_lradc
*lradc
= input_get_drvdata(dev
);
1105 mxs_lradc_disable_ts(lradc
);
1108 static int mxs_lradc_ts_register(struct mxs_lradc
*lradc
)
1110 struct input_dev
*input
;
1111 struct device
*dev
= lradc
->dev
;
1114 if (!lradc
->use_touchscreen
)
1117 input
= input_allocate_device();
1121 input
->name
= DRIVER_NAME
;
1122 input
->id
.bustype
= BUS_HOST
;
1123 input
->dev
.parent
= dev
;
1124 input
->open
= mxs_lradc_ts_open
;
1125 input
->close
= mxs_lradc_ts_close
;
1127 __set_bit(EV_ABS
, input
->evbit
);
1128 __set_bit(EV_KEY
, input
->evbit
);
1129 __set_bit(BTN_TOUCH
, input
->keybit
);
1130 input_set_abs_params(input
, ABS_X
, 0, LRADC_SINGLE_SAMPLE_MASK
, 0, 0);
1131 input_set_abs_params(input
, ABS_Y
, 0, LRADC_SINGLE_SAMPLE_MASK
, 0, 0);
1132 input_set_abs_params(input
, ABS_PRESSURE
, 0, LRADC_SINGLE_SAMPLE_MASK
,
1135 lradc
->ts_input
= input
;
1136 input_set_drvdata(input
, lradc
);
1137 ret
= input_register_device(input
);
1139 input_free_device(lradc
->ts_input
);
1144 static void mxs_lradc_ts_unregister(struct mxs_lradc
*lradc
)
1146 if (!lradc
->use_touchscreen
)
1149 mxs_lradc_disable_ts(lradc
);
1150 input_unregister_device(lradc
->ts_input
);
1156 static irqreturn_t
mxs_lradc_handle_irq(int irq
, void *data
)
1158 struct iio_dev
*iio
= data
;
1159 struct mxs_lradc
*lradc
= iio_priv(iio
);
1160 unsigned long reg
= readl(lradc
->base
+ LRADC_CTRL1
);
1161 const uint32_t ts_irq_mask
=
1162 LRADC_CTRL1_TOUCH_DETECT_IRQ
|
1163 LRADC_CTRL1_LRADC_IRQ(2) |
1164 LRADC_CTRL1_LRADC_IRQ(3) |
1165 LRADC_CTRL1_LRADC_IRQ(4) |
1166 LRADC_CTRL1_LRADC_IRQ(5);
1168 if (!(reg
& mxs_lradc_irq_mask(lradc
)))
1171 if (lradc
->use_touchscreen
&& (reg
& ts_irq_mask
))
1172 mxs_lradc_handle_touch(lradc
);
1174 if (iio_buffer_enabled(iio
))
1175 iio_trigger_poll(iio
->trig
);
1176 else if (reg
& LRADC_CTRL1_LRADC_IRQ(0))
1177 complete(&lradc
->completion
);
1179 mxs_lradc_reg_clear(lradc
, reg
& mxs_lradc_irq_mask(lradc
),
1188 static irqreturn_t
mxs_lradc_trigger_handler(int irq
, void *p
)
1190 struct iio_poll_func
*pf
= p
;
1191 struct iio_dev
*iio
= pf
->indio_dev
;
1192 struct mxs_lradc
*lradc
= iio_priv(iio
);
1193 const uint32_t chan_value
= LRADC_CH_ACCUMULATE
|
1194 ((LRADC_DELAY_TIMER_LOOP
- 1) << LRADC_CH_NUM_SAMPLES_OFFSET
);
1195 unsigned int i
, j
= 0;
1197 for_each_set_bit(i
, iio
->active_scan_mask
, LRADC_MAX_TOTAL_CHANS
) {
1198 lradc
->buffer
[j
] = readl(lradc
->base
+ LRADC_CH(j
));
1199 mxs_lradc_reg_wrt(lradc
, chan_value
, LRADC_CH(j
));
1200 lradc
->buffer
[j
] &= LRADC_CH_VALUE_MASK
;
1201 lradc
->buffer
[j
] /= LRADC_DELAY_TIMER_LOOP
;
1205 iio_push_to_buffers_with_timestamp(iio
, lradc
->buffer
, pf
->timestamp
);
1207 iio_trigger_notify_done(iio
->trig
);
1212 static int mxs_lradc_configure_trigger(struct iio_trigger
*trig
, bool state
)
1214 struct iio_dev
*iio
= iio_trigger_get_drvdata(trig
);
1215 struct mxs_lradc
*lradc
= iio_priv(iio
);
1216 const uint32_t st
= state
? STMP_OFFSET_REG_SET
: STMP_OFFSET_REG_CLR
;
1218 mxs_lradc_reg_wrt(lradc
, LRADC_DELAY_KICK
, LRADC_DELAY(0) + st
);
1223 static const struct iio_trigger_ops mxs_lradc_trigger_ops
= {
1224 .owner
= THIS_MODULE
,
1225 .set_trigger_state
= &mxs_lradc_configure_trigger
,
1228 static int mxs_lradc_trigger_init(struct iio_dev
*iio
)
1231 struct iio_trigger
*trig
;
1232 struct mxs_lradc
*lradc
= iio_priv(iio
);
1234 trig
= iio_trigger_alloc("%s-dev%i", iio
->name
, iio
->id
);
1238 trig
->dev
.parent
= lradc
->dev
;
1239 iio_trigger_set_drvdata(trig
, iio
);
1240 trig
->ops
= &mxs_lradc_trigger_ops
;
1242 ret
= iio_trigger_register(trig
);
1244 iio_trigger_free(trig
);
1253 static void mxs_lradc_trigger_remove(struct iio_dev
*iio
)
1255 struct mxs_lradc
*lradc
= iio_priv(iio
);
1257 iio_trigger_unregister(lradc
->trig
);
1258 iio_trigger_free(lradc
->trig
);
1261 static int mxs_lradc_buffer_preenable(struct iio_dev
*iio
)
1263 struct mxs_lradc
*lradc
= iio_priv(iio
);
1264 int ret
= 0, chan
, ofs
= 0;
1265 unsigned long enable
= 0;
1266 uint32_t ctrl4_set
= 0;
1267 uint32_t ctrl4_clr
= 0;
1268 uint32_t ctrl1_irq
= 0;
1269 const uint32_t chan_value
= LRADC_CH_ACCUMULATE
|
1270 ((LRADC_DELAY_TIMER_LOOP
- 1) << LRADC_CH_NUM_SAMPLES_OFFSET
);
1271 const int len
= bitmap_weight(iio
->active_scan_mask
,
1272 LRADC_MAX_TOTAL_CHANS
);
1278 * Lock the driver so raw access can not be done during buffered
1279 * operation. This simplifies the code a lot.
1281 ret
= mutex_trylock(&lradc
->lock
);
1285 lradc
->buffer
= kmalloc_array(len
, sizeof(*lradc
->buffer
), GFP_KERNEL
);
1286 if (!lradc
->buffer
) {
1291 if (lradc
->soc
== IMX28_LRADC
)
1292 mxs_lradc_reg_clear(lradc
, LRADC_CTRL1_MX28_LRADC_IRQ_EN_MASK
,
1294 mxs_lradc_reg_clear(lradc
, 0xff, LRADC_CTRL0
);
1296 for_each_set_bit(chan
, iio
->active_scan_mask
, LRADC_MAX_TOTAL_CHANS
) {
1297 ctrl4_set
|= chan
<< LRADC_CTRL4_LRADCSELECT_OFFSET(ofs
);
1298 ctrl4_clr
|= LRADC_CTRL4_LRADCSELECT_MASK(ofs
);
1299 ctrl1_irq
|= LRADC_CTRL1_LRADC_IRQ_EN(ofs
);
1300 mxs_lradc_reg_wrt(lradc
, chan_value
, LRADC_CH(ofs
));
1301 bitmap_set(&enable
, ofs
, 1);
1305 mxs_lradc_reg_clear(lradc
, LRADC_DELAY_TRIGGER_LRADCS_MASK
|
1306 LRADC_DELAY_KICK
, LRADC_DELAY(0));
1307 mxs_lradc_reg_clear(lradc
, ctrl4_clr
, LRADC_CTRL4
);
1308 mxs_lradc_reg_set(lradc
, ctrl4_set
, LRADC_CTRL4
);
1309 mxs_lradc_reg_set(lradc
, ctrl1_irq
, LRADC_CTRL1
);
1310 mxs_lradc_reg_set(lradc
, enable
<< LRADC_DELAY_TRIGGER_LRADCS_OFFSET
,
1316 mutex_unlock(&lradc
->lock
);
1320 static int mxs_lradc_buffer_postdisable(struct iio_dev
*iio
)
1322 struct mxs_lradc
*lradc
= iio_priv(iio
);
1324 mxs_lradc_reg_clear(lradc
, LRADC_DELAY_TRIGGER_LRADCS_MASK
|
1325 LRADC_DELAY_KICK
, LRADC_DELAY(0));
1327 mxs_lradc_reg_clear(lradc
, 0xff, LRADC_CTRL0
);
1328 if (lradc
->soc
== IMX28_LRADC
)
1329 mxs_lradc_reg_clear(lradc
, LRADC_CTRL1_MX28_LRADC_IRQ_EN_MASK
,
1332 kfree(lradc
->buffer
);
1333 mutex_unlock(&lradc
->lock
);
1338 static bool mxs_lradc_validate_scan_mask(struct iio_dev
*iio
,
1339 const unsigned long *mask
)
1341 struct mxs_lradc
*lradc
= iio_priv(iio
);
1342 const int map_chans
= bitmap_weight(mask
, LRADC_MAX_TOTAL_CHANS
);
1344 unsigned long rsvd_mask
= 0;
1346 if (lradc
->use_touchbutton
)
1347 rsvd_mask
|= CHAN_MASK_TOUCHBUTTON
;
1348 if (lradc
->use_touchscreen
== MXS_LRADC_TOUCHSCREEN_4WIRE
)
1349 rsvd_mask
|= CHAN_MASK_TOUCHSCREEN_4WIRE
;
1350 if (lradc
->use_touchscreen
== MXS_LRADC_TOUCHSCREEN_5WIRE
)
1351 rsvd_mask
|= CHAN_MASK_TOUCHSCREEN_5WIRE
;
1353 if (lradc
->use_touchbutton
)
1355 if (lradc
->use_touchscreen
)
1358 /* Test for attempts to map channels with special mode of operation. */
1359 if (bitmap_intersects(mask
, &rsvd_mask
, LRADC_MAX_TOTAL_CHANS
))
1362 /* Test for attempts to map more channels then available slots. */
1363 if (map_chans
+ rsvd_chans
> LRADC_MAX_MAPPED_CHANS
)
1369 static const struct iio_buffer_setup_ops mxs_lradc_buffer_ops
= {
1370 .preenable
= &mxs_lradc_buffer_preenable
,
1371 .postenable
= &iio_triggered_buffer_postenable
,
1372 .predisable
= &iio_triggered_buffer_predisable
,
1373 .postdisable
= &mxs_lradc_buffer_postdisable
,
1374 .validate_scan_mask
= &mxs_lradc_validate_scan_mask
,
1378 * Driver initialization
1381 #define MXS_ADC_CHAN(idx, chan_type) { \
1382 .type = (chan_type), \
1384 .scan_index = (idx), \
1385 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
1386 BIT(IIO_CHAN_INFO_SCALE), \
1391 .realbits = LRADC_RESOLUTION, \
1392 .storagebits = 32, \
1396 static const struct iio_chan_spec mxs_lradc_chan_spec
[] = {
1397 MXS_ADC_CHAN(0, IIO_VOLTAGE
),
1398 MXS_ADC_CHAN(1, IIO_VOLTAGE
),
1399 MXS_ADC_CHAN(2, IIO_VOLTAGE
),
1400 MXS_ADC_CHAN(3, IIO_VOLTAGE
),
1401 MXS_ADC_CHAN(4, IIO_VOLTAGE
),
1402 MXS_ADC_CHAN(5, IIO_VOLTAGE
),
1403 MXS_ADC_CHAN(6, IIO_VOLTAGE
),
1404 MXS_ADC_CHAN(7, IIO_VOLTAGE
), /* VBATT */
1405 /* Combined Temperature sensors */
1410 .info_mask_separate
= BIT(IIO_CHAN_INFO_RAW
) |
1411 BIT(IIO_CHAN_INFO_OFFSET
) |
1412 BIT(IIO_CHAN_INFO_SCALE
),
1414 .scan_type
= {.sign
= 'u', .realbits
= 18, .storagebits
= 32,},
1416 MXS_ADC_CHAN(10, IIO_VOLTAGE
), /* VDDIO */
1417 MXS_ADC_CHAN(11, IIO_VOLTAGE
), /* VTH */
1418 MXS_ADC_CHAN(12, IIO_VOLTAGE
), /* VDDA */
1419 MXS_ADC_CHAN(13, IIO_VOLTAGE
), /* VDDD */
1420 MXS_ADC_CHAN(14, IIO_VOLTAGE
), /* VBG */
1421 MXS_ADC_CHAN(15, IIO_VOLTAGE
), /* VDD5V */
1424 static int mxs_lradc_hw_init(struct mxs_lradc
*lradc
)
1426 /* The ADC always uses DELAY CHANNEL 0. */
1427 const uint32_t adc_cfg
=
1428 (1 << (LRADC_DELAY_TRIGGER_DELAYS_OFFSET
+ 0)) |
1429 (LRADC_DELAY_TIMER_PER
<< LRADC_DELAY_DELAY_OFFSET
);
1431 int ret
= stmp_reset_block(lradc
->base
);
1436 /* Configure DELAY CHANNEL 0 for generic ADC sampling. */
1437 mxs_lradc_reg_wrt(lradc
, adc_cfg
, LRADC_DELAY(0));
1439 /* Disable remaining DELAY CHANNELs */
1440 mxs_lradc_reg_wrt(lradc
, 0, LRADC_DELAY(1));
1441 mxs_lradc_reg_wrt(lradc
, 0, LRADC_DELAY(2));
1442 mxs_lradc_reg_wrt(lradc
, 0, LRADC_DELAY(3));
1444 /* Configure the touchscreen type */
1445 if (lradc
->soc
== IMX28_LRADC
) {
1446 mxs_lradc_reg_clear(lradc
, LRADC_CTRL0_MX28_TOUCH_SCREEN_TYPE
,
1449 if (lradc
->use_touchscreen
== MXS_LRADC_TOUCHSCREEN_5WIRE
)
1450 mxs_lradc_reg_set(lradc
, LRADC_CTRL0_MX28_TOUCH_SCREEN_TYPE
,
1454 /* Start internal temperature sensing. */
1455 mxs_lradc_reg_wrt(lradc
, 0, LRADC_CTRL2
);
1460 static void mxs_lradc_hw_stop(struct mxs_lradc
*lradc
)
1464 mxs_lradc_reg_clear(lradc
, mxs_lradc_irq_en_mask(lradc
), LRADC_CTRL1
);
1466 for (i
= 0; i
< LRADC_MAX_DELAY_CHANS
; i
++)
1467 mxs_lradc_reg_wrt(lradc
, 0, LRADC_DELAY(i
));
1470 static const struct of_device_id mxs_lradc_dt_ids
[] = {
1471 { .compatible
= "fsl,imx23-lradc", .data
= (void *)IMX23_LRADC
, },
1472 { .compatible
= "fsl,imx28-lradc", .data
= (void *)IMX28_LRADC
, },
1475 MODULE_DEVICE_TABLE(of
, mxs_lradc_dt_ids
);
1477 static int mxs_lradc_probe_touchscreen(struct mxs_lradc
*lradc
,
1478 struct device_node
*lradc_node
)
1481 u32 ts_wires
= 0, adapt
;
1483 ret
= of_property_read_u32(lradc_node
, "fsl,lradc-touchscreen-wires",
1486 return -ENODEV
; /* touchscreen feature disabled */
1490 lradc
->use_touchscreen
= MXS_LRADC_TOUCHSCREEN_4WIRE
;
1493 if (lradc
->soc
== IMX28_LRADC
) {
1494 lradc
->use_touchscreen
= MXS_LRADC_TOUCHSCREEN_5WIRE
;
1497 /* fall through an error message for i.MX23 */
1500 "Unsupported number of touchscreen wires (%d)\n",
1505 if (of_property_read_u32(lradc_node
, "fsl,ave-ctrl", &adapt
)) {
1506 lradc
->over_sample_cnt
= 4;
1508 if (adapt
< 1 || adapt
> 32) {
1509 dev_err(lradc
->dev
, "Invalid sample count (%u)\n",
1513 lradc
->over_sample_cnt
= adapt
;
1516 if (of_property_read_u32(lradc_node
, "fsl,ave-delay", &adapt
)) {
1517 lradc
->over_sample_delay
= 2;
1519 if (adapt
< 2 || adapt
> LRADC_DELAY_DELAY_MASK
+ 1) {
1520 dev_err(lradc
->dev
, "Invalid sample delay (%u)\n",
1524 lradc
->over_sample_delay
= adapt
;
1527 if (of_property_read_u32(lradc_node
, "fsl,settling", &adapt
)) {
1528 lradc
->settling_delay
= 10;
1530 if (adapt
< 1 || adapt
> LRADC_DELAY_DELAY_MASK
) {
1531 dev_err(lradc
->dev
, "Invalid settling delay (%u)\n",
1535 lradc
->settling_delay
= adapt
;
1541 static int mxs_lradc_probe(struct platform_device
*pdev
)
1543 const struct of_device_id
*of_id
=
1544 of_match_device(mxs_lradc_dt_ids
, &pdev
->dev
);
1545 const struct mxs_lradc_of_config
*of_cfg
=
1546 &mxs_lradc_of_config
[(enum mxs_lradc_id
)of_id
->data
];
1547 struct device
*dev
= &pdev
->dev
;
1548 struct device_node
*node
= dev
->of_node
;
1549 struct mxs_lradc
*lradc
;
1550 struct iio_dev
*iio
;
1551 struct resource
*iores
;
1552 int ret
= 0, touch_ret
;
1556 /* Allocate the IIO device. */
1557 iio
= devm_iio_device_alloc(dev
, sizeof(*lradc
));
1559 dev_err(dev
, "Failed to allocate IIO device\n");
1563 lradc
= iio_priv(iio
);
1564 lradc
->soc
= (enum mxs_lradc_id
)of_id
->data
;
1566 /* Grab the memory area */
1567 iores
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
1568 lradc
->dev
= &pdev
->dev
;
1569 lradc
->base
= devm_ioremap_resource(dev
, iores
);
1570 if (IS_ERR(lradc
->base
))
1571 return PTR_ERR(lradc
->base
);
1573 lradc
->clk
= devm_clk_get(&pdev
->dev
, NULL
);
1574 if (IS_ERR(lradc
->clk
)) {
1575 dev_err(dev
, "Failed to get the delay unit clock\n");
1576 return PTR_ERR(lradc
->clk
);
1578 ret
= clk_prepare_enable(lradc
->clk
);
1580 dev_err(dev
, "Failed to enable the delay unit clock\n");
1584 touch_ret
= mxs_lradc_probe_touchscreen(lradc
, node
);
1586 /* Grab all IRQ sources */
1587 for (i
= 0; i
< of_cfg
->irq_count
; i
++) {
1588 lradc
->irq
[i
] = platform_get_irq(pdev
, i
);
1589 if (lradc
->irq
[i
] < 0) {
1590 ret
= lradc
->irq
[i
];
1594 ret
= devm_request_irq(dev
, lradc
->irq
[i
],
1595 mxs_lradc_handle_irq
, 0,
1596 of_cfg
->irq_name
[i
], iio
);
1601 lradc
->vref_mv
= of_cfg
->vref_mv
;
1603 platform_set_drvdata(pdev
, iio
);
1605 init_completion(&lradc
->completion
);
1606 mutex_init(&lradc
->lock
);
1608 iio
->name
= pdev
->name
;
1609 iio
->dev
.parent
= &pdev
->dev
;
1610 iio
->info
= &mxs_lradc_iio_info
;
1611 iio
->modes
= INDIO_DIRECT_MODE
;
1612 iio
->channels
= mxs_lradc_chan_spec
;
1613 iio
->num_channels
= ARRAY_SIZE(mxs_lradc_chan_spec
);
1614 iio
->masklength
= LRADC_MAX_TOTAL_CHANS
;
1616 ret
= iio_triggered_buffer_setup(iio
, &iio_pollfunc_store_time
,
1617 &mxs_lradc_trigger_handler
,
1618 &mxs_lradc_buffer_ops
);
1622 ret
= mxs_lradc_trigger_init(iio
);
1626 /* Populate available ADC input ranges */
1627 for (i
= 0; i
< LRADC_MAX_TOTAL_CHANS
; i
++) {
1628 for (s
= 0; s
< ARRAY_SIZE(lradc
->scale_avail
[i
]); s
++) {
1630 * [s=0] = optional divider by two disabled (default)
1631 * [s=1] = optional divider by two enabled
1633 * The scale is calculated by doing:
1634 * Vref >> (realbits - s)
1635 * which multiplies by two on the second component
1638 scale_uv
= ((u64
)lradc
->vref_mv
[i
] * 100000000) >>
1639 (LRADC_RESOLUTION
- s
);
1640 lradc
->scale_avail
[i
][s
].nano
=
1641 do_div(scale_uv
, 100000000) * 10;
1642 lradc
->scale_avail
[i
][s
].integer
= scale_uv
;
1646 /* Configure the hardware. */
1647 ret
= mxs_lradc_hw_init(lradc
);
1651 /* Register the touchscreen input device. */
1652 if (touch_ret
== 0) {
1653 ret
= mxs_lradc_ts_register(lradc
);
1655 goto err_ts_register
;
1658 /* Register IIO device. */
1659 ret
= iio_device_register(iio
);
1661 dev_err(dev
, "Failed to register IIO device\n");
1668 mxs_lradc_ts_unregister(lradc
);
1670 mxs_lradc_hw_stop(lradc
);
1672 mxs_lradc_trigger_remove(iio
);
1674 iio_triggered_buffer_cleanup(iio
);
1676 clk_disable_unprepare(lradc
->clk
);
1680 static int mxs_lradc_remove(struct platform_device
*pdev
)
1682 struct iio_dev
*iio
= platform_get_drvdata(pdev
);
1683 struct mxs_lradc
*lradc
= iio_priv(iio
);
1685 iio_device_unregister(iio
);
1686 mxs_lradc_ts_unregister(lradc
);
1687 mxs_lradc_hw_stop(lradc
);
1688 mxs_lradc_trigger_remove(iio
);
1689 iio_triggered_buffer_cleanup(iio
);
1691 clk_disable_unprepare(lradc
->clk
);
1695 static struct platform_driver mxs_lradc_driver
= {
1697 .name
= DRIVER_NAME
,
1698 .owner
= THIS_MODULE
,
1699 .of_match_table
= mxs_lradc_dt_ids
,
1701 .probe
= mxs_lradc_probe
,
1702 .remove
= mxs_lradc_remove
,
1705 module_platform_driver(mxs_lradc_driver
);
1707 MODULE_AUTHOR("Marek Vasut <marex@denx.de>");
1708 MODULE_DESCRIPTION("Freescale i.MX28 LRADC driver");
1709 MODULE_LICENSE("GPL v2");
1710 MODULE_ALIAS("platform:" DRIVER_NAME
);