drivers/staging/iio/impedance-analyzer/ad5933.c

   1 /*
   2  * AD5933 AD5934 Impedance Converter, Network Analyzer
   3  *
   4  * Copyright 2011 Analog Devices Inc.
   5  *
   6  * Licensed under the GPL-2.
   7  */
   8
   9 #include <linux/interrupt.h>
  10 #include <linux/device.h>
  11 #include <linux/kernel.h>
  12 #include <linux/sysfs.h>
  13 #include <linux/i2c.h>
  14 #include <linux/regulator/consumer.h>
  15 #include <linux/slab.h>
  16 #include <linux/types.h>
  17 #include <linux/err.h>
  18 #include <linux/delay.h>
  19 #include <linux/module.h>
  20 #include <asm/div64.h>
  21
  22 #include <linux/iio/iio.h>
  23 #include <linux/iio/sysfs.h>
  24 #include <linux/iio/buffer.h>
  25 #include <linux/iio/kfifo_buf.h>
  26
  27 #include "ad5933.h"
  28
  29 /* AD5933/AD5934 Registers */
  30 #define AD5933_REG_CONTROL_HB           0x80    /* R/W, 2 bytes */
  31 #define AD5933_REG_CONTROL_LB           0x81    /* R/W, 2 bytes */
  32 #define AD5933_REG_FREQ_START           0x82    /* R/W, 3 bytes */
  33 #define AD5933_REG_FREQ_INC             0x85    /* R/W, 3 bytes */
  34 #define AD5933_REG_INC_NUM              0x88    /* R/W, 2 bytes, 9 bit */
  35 #define AD5933_REG_SETTLING_CYCLES      0x8A    /* R/W, 2 bytes */
  36 #define AD5933_REG_STATUS               0x8F    /* R, 1 byte */
  37 #define AD5933_REG_TEMP_DATA            0x92    /* R, 2 bytes*/
  38 #define AD5933_REG_REAL_DATA            0x94    /* R, 2 bytes*/
  39 #define AD5933_REG_IMAG_DATA            0x96    /* R, 2 bytes*/
  40
  41 /* AD5933_REG_CONTROL_HB Bits */
  42 #define AD5933_CTRL_INIT_START_FREQ     (0x1 << 4)
  43 #define AD5933_CTRL_START_SWEEP         (0x2 << 4)
  44 #define AD5933_CTRL_INC_FREQ            (0x3 << 4)
  45 #define AD5933_CTRL_REPEAT_FREQ         (0x4 << 4)
  46 #define AD5933_CTRL_MEASURE_TEMP        (0x9 << 4)
  47 #define AD5933_CTRL_POWER_DOWN          (0xA << 4)
  48 #define AD5933_CTRL_STANDBY             (0xB << 4)
  49
  50 #define AD5933_CTRL_RANGE_2000mVpp      (0x0 << 1)
  51 #define AD5933_CTRL_RANGE_200mVpp       (0x1 << 1)
  52 #define AD5933_CTRL_RANGE_400mVpp       (0x2 << 1)
  53 #define AD5933_CTRL_RANGE_1000mVpp      (0x3 << 1)
  54 #define AD5933_CTRL_RANGE(x)            ((x) << 1)
  55
  56 #define AD5933_CTRL_PGA_GAIN_1          (0x1 << 0)
  57 #define AD5933_CTRL_PGA_GAIN_5          (0x0 << 0)
  58
  59 /* AD5933_REG_CONTROL_LB Bits */
  60 #define AD5933_CTRL_RESET               (0x1 << 4)
  61 #define AD5933_CTRL_INT_SYSCLK          (0x0 << 3)
  62 #define AD5933_CTRL_EXT_SYSCLK          (0x1 << 3)
  63
  64 /* AD5933_REG_STATUS Bits */
  65 #define AD5933_STAT_TEMP_VALID          (0x1 << 0)
  66 #define AD5933_STAT_DATA_VALID          (0x1 << 1)
  67 #define AD5933_STAT_SWEEP_DONE          (0x1 << 2)
  68
  69 /* I2C Block Commands */
  70 #define AD5933_I2C_BLOCK_WRITE          0xA0
  71 #define AD5933_I2C_BLOCK_READ           0xA1
  72 #define AD5933_I2C_ADDR_POINTER         0xB0
  73
  74 /* Device Specs */
  75 #define AD5933_INT_OSC_FREQ_Hz          16776000
  76 #define AD5933_MAX_OUTPUT_FREQ_Hz       100000
  77 #define AD5933_MAX_RETRIES              100
  78
  79 #define AD5933_OUT_RANGE                1
  80 #define AD5933_OUT_RANGE_AVAIL          2
  81 #define AD5933_OUT_SETTLING_CYCLES      3
  82 #define AD5933_IN_PGA_GAIN              4
  83 #define AD5933_IN_PGA_GAIN_AVAIL        5
  84 #define AD5933_FREQ_POINTS              6
  85
  86 #define AD5933_POLL_TIME_ms             10
  87 #define AD5933_INIT_EXCITATION_TIME_ms  100
  88
  89 struct ad5933_state {
  90         struct i2c_client               *client;
  91         struct regulator                *reg;
  92         struct ad5933_platform_data     *pdata;
  93         struct delayed_work             work;
  94         unsigned long                   mclk_hz;
  95         unsigned char                   ctrl_hb;
  96         unsigned char                   ctrl_lb;
  97         unsigned                        range_avail[4];
  98         unsigned short                  vref_mv;
  99         unsigned short                  settling_cycles;
 100         unsigned short                  freq_points;
 101         unsigned                        freq_start;
 102         unsigned                        freq_inc;
 103         unsigned                        state;
 104         unsigned                        poll_time_jiffies;
 105 };
 106
 107 static struct ad5933_platform_data ad5933_default_pdata  = {
 108         .vref_mv = 3300,
 109 };
 110
 111 static const struct iio_chan_spec ad5933_channels[] = {
 112         {
 113                 .type = IIO_TEMP,
 114                 .indexed = 1,
 115                 .channel = 0,
 116                 .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED),
 117                 .address = AD5933_REG_TEMP_DATA,
 118                 .scan_type = {
 119                         .sign = 's',
 120                         .realbits = 14,
 121                         .storagebits = 16,
 122                 },
 123         }, { /* Ring Channels */
 124                 .type = IIO_VOLTAGE,
 125                 .indexed = 1,
 126                 .channel = 0,
 127                 .extend_name = "real_raw",
 128                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
 129                 BIT(IIO_CHAN_INFO_SCALE),
 130                 .address = AD5933_REG_REAL_DATA,
 131                 .scan_index = 0,
 132                 .scan_type = {
 133                         .sign = 's',
 134                         .realbits = 16,
 135                         .storagebits = 16,
 136                 },
 137         }, {
 138                 .type = IIO_VOLTAGE,
 139                 .indexed = 1,
 140                 .channel = 0,
 141                 .extend_name = "imag_raw",
 142                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
 143                 BIT(IIO_CHAN_INFO_SCALE),
 144                 .address = AD5933_REG_IMAG_DATA,
 145                 .scan_index = 1,
 146                 .scan_type = {
 147                         .sign = 's',
 148                         .realbits = 16,
 149                         .storagebits = 16,
 150                 },
 151         },
 152 };
 153
 154 static int ad5933_i2c_write(struct i2c_client *client,
 155                               u8 reg, u8 len, u8 *data)
 156 {
 157         int ret;
 158
 159         while (len--) {
 160                 ret = i2c_smbus_write_byte_data(client, reg++, *data++);
 161                 if (ret < 0) {
 162                         dev_err(&client->dev, "I2C write error\n");
 163                         return ret;
 164                 }
 165         }
 166         return 0;
 167 }
 168
 169 static int ad5933_i2c_read(struct i2c_client *client,
 170                               u8 reg, u8 len, u8 *data)
 171 {
 172         int ret;
 173
 174         while (len--) {
 175                 ret = i2c_smbus_read_byte_data(client, reg++);
 176                 if (ret < 0) {
 177                         dev_err(&client->dev, "I2C read error\n");
 178                         return ret;
 179                 }
 180                 *data++ = ret;
 181         }
 182         return 0;
 183 }
 184
 185 static int ad5933_cmd(struct ad5933_state *st, unsigned char cmd)
 186 {
 187         unsigned char dat = st->ctrl_hb | cmd;
 188
 189         return ad5933_i2c_write(st->client,
 190                         AD5933_REG_CONTROL_HB, 1, &dat);
 191 }
 192
 193 static int ad5933_reset(struct ad5933_state *st)
 194 {
 195         unsigned char dat = st->ctrl_lb | AD5933_CTRL_RESET;
 196
 197         return ad5933_i2c_write(st->client,
 198                         AD5933_REG_CONTROL_LB, 1, &dat);
 199 }
 200
 201 static int ad5933_wait_busy(struct ad5933_state *st, unsigned char event)
 202 {
 203         unsigned char val, timeout = AD5933_MAX_RETRIES;
 204         int ret;
 205
 206         while (timeout--) {
 207                 ret =  ad5933_i2c_read(st->client, AD5933_REG_STATUS, 1, &val);
 208                 if (ret < 0)
 209                         return ret;
 210                 if (val & event)
 211                         return val;
 212                 cpu_relax();
 213                 mdelay(1);
 214         }
 215
 216         return -EAGAIN;
 217 }
 218
 219 static int ad5933_set_freq(struct ad5933_state *st,
 220                            unsigned reg, unsigned long freq)
 221 {
 222         unsigned long long freqreg;
 223         union {
 224                 __be32 d32;
 225                 u8 d8[4];
 226         } dat;
 227
 228         freqreg = (u64) freq * (u64) (1 << 27);
 229         do_div(freqreg, st->mclk_hz / 4);
 230
 231         switch (reg) {
 232         case AD5933_REG_FREQ_START:
 233                 st->freq_start = freq;
 234                 break;
 235         case AD5933_REG_FREQ_INC:
 236                 st->freq_inc = freq;
 237                 break;
 238         default:
 239                 return -EINVAL;
 240         }
 241
 242         dat.d32 = cpu_to_be32(freqreg);
 243         return ad5933_i2c_write(st->client, reg, 3, &dat.d8[1]);
 244 }
 245
 246 static int ad5933_setup(struct ad5933_state *st)
 247 {
 248         __be16 dat;
 249         int ret;
 250
 251         ret = ad5933_reset(st);
 252         if (ret < 0)
 253                 return ret;
 254
 255         ret = ad5933_set_freq(st, AD5933_REG_FREQ_START, 10000);
 256         if (ret < 0)
 257                 return ret;
 258
 259         ret = ad5933_set_freq(st, AD5933_REG_FREQ_INC, 200);
 260         if (ret < 0)
 261                 return ret;
 262
 263         st->settling_cycles = 10;
 264         dat = cpu_to_be16(st->settling_cycles);
 265
 266         ret = ad5933_i2c_write(st->client,
 267                         AD5933_REG_SETTLING_CYCLES, 2, (u8 *)&dat);
 268         if (ret < 0)
 269                 return ret;
 270
 271         st->freq_points = 100;
 272         dat = cpu_to_be16(st->freq_points);
 273
 274         return ad5933_i2c_write(st->client, AD5933_REG_INC_NUM, 2, (u8 *)&dat);
 275 }
 276
 277 static void ad5933_calc_out_ranges(struct ad5933_state *st)
 278 {
 279         int i;
 280         unsigned normalized_3v3[4] = {1980, 198, 383, 970};
 281
 282         for (i = 0; i < 4; i++)
 283                 st->range_avail[i] = normalized_3v3[i] * st->vref_mv / 3300;
 284
 285 }
 286
 287 /*
 288  * handles: AD5933_REG_FREQ_START and AD5933_REG_FREQ_INC
 289  */
 290
 291 static ssize_t ad5933_show_frequency(struct device *dev,
 292                                         struct device_attribute *attr,
 293                                         char *buf)
 294 {
 295         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 296         struct ad5933_state *st = iio_priv(indio_dev);
 297         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 298         int ret;
 299         unsigned long long freqreg;
 300         union {
 301                 __be32 d32;
 302                 u8 d8[4];
 303         } dat;
 304
 305         mutex_lock(&indio_dev->mlock);
 306         ret = ad5933_i2c_read(st->client, this_attr->address, 3, &dat.d8[1]);
 307         mutex_unlock(&indio_dev->mlock);
 308         if (ret < 0)
 309                 return ret;
 310
 311         freqreg = be32_to_cpu(dat.d32) & 0xFFFFFF;
 312
 313         freqreg = (u64) freqreg * (u64) (st->mclk_hz / 4);
 314         do_div(freqreg, 1 << 27);
 315
 316         return sprintf(buf, "%d\n", (int) freqreg);
 317 }
 318
 319 static ssize_t ad5933_store_frequency(struct device *dev,
 320                                          struct device_attribute *attr,
 321                                          const char *buf,
 322                                          size_t len)
 323 {
 324         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 325         struct ad5933_state *st = iio_priv(indio_dev);
 326         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 327         unsigned long val;
 328         int ret;
 329
 330         ret = kstrtoul(buf, 10, &val);
 331         if (ret)
 332                 return ret;
 333
 334         if (val > AD5933_MAX_OUTPUT_FREQ_Hz)
 335                 return -EINVAL;
 336
 337         mutex_lock(&indio_dev->mlock);
 338         ret = ad5933_set_freq(st, this_attr->address, val);
 339         mutex_unlock(&indio_dev->mlock);
 340
 341         return ret ? ret : len;
 342 }
 343
 344 static IIO_DEVICE_ATTR(out_voltage0_freq_start, S_IRUGO | S_IWUSR,
 345                         ad5933_show_frequency,
 346                         ad5933_store_frequency,
 347                         AD5933_REG_FREQ_START);
 348
 349 static IIO_DEVICE_ATTR(out_voltage0_freq_increment, S_IRUGO | S_IWUSR,
 350                         ad5933_show_frequency,
 351                         ad5933_store_frequency,
 352                         AD5933_REG_FREQ_INC);
 353
 354 static ssize_t ad5933_show(struct device *dev,
 355                                         struct device_attribute *attr,
 356                                         char *buf)
 357 {
 358         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 359         struct ad5933_state *st = iio_priv(indio_dev);
 360         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 361         int ret = 0, len = 0;
 362
 363         mutex_lock(&indio_dev->mlock);
 364         switch ((u32) this_attr->address) {
 365         case AD5933_OUT_RANGE:
 366                 len = sprintf(buf, "%d\n",
 367                               st->range_avail[(st->ctrl_hb >> 1) & 0x3]);
 368                 break;
 369         case AD5933_OUT_RANGE_AVAIL:
 370                 len = sprintf(buf, "%d %d %d %d\n", st->range_avail[0],
 371                               st->range_avail[3], st->range_avail[2],
 372                               st->range_avail[1]);
 373                 break;
 374         case AD5933_OUT_SETTLING_CYCLES:
 375                 len = sprintf(buf, "%d\n", st->settling_cycles);
 376                 break;
 377         case AD5933_IN_PGA_GAIN:
 378                 len = sprintf(buf, "%s\n",
 379                               (st->ctrl_hb & AD5933_CTRL_PGA_GAIN_1) ?
 380                               "1" : "0.2");
 381                 break;
 382         case AD5933_IN_PGA_GAIN_AVAIL:
 383                 len = sprintf(buf, "1 0.2\n");
 384                 break;
 385         case AD5933_FREQ_POINTS:
 386                 len = sprintf(buf, "%d\n", st->freq_points);
 387                 break;
 388         default:
 389                 ret = -EINVAL;
 390         }
 391
 392         mutex_unlock(&indio_dev->mlock);
 393         return ret ? ret : len;
 394 }
 395
 396 static ssize_t ad5933_store(struct device *dev,
 397                                          struct device_attribute *attr,
 398                                          const char *buf,
 399                                          size_t len)
 400 {
 401         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 402         struct ad5933_state *st = iio_priv(indio_dev);
 403         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 404         u16 val;
 405         int i, ret = 0;
 406         __be16 dat;
 407
 408         if (this_attr->address != AD5933_IN_PGA_GAIN) {
 409                 ret = kstrtou16(buf, 10, &val);
 410                 if (ret)
 411                         return ret;
 412         }
 413
 414         mutex_lock(&indio_dev->mlock);
 415         switch ((u32) this_attr->address) {
 416         case AD5933_OUT_RANGE:
 417                 for (i = 0; i < 4; i++)
 418                         if (val == st->range_avail[i]) {
 419                                 st->ctrl_hb &= ~AD5933_CTRL_RANGE(0x3);
 420                                 st->ctrl_hb |= AD5933_CTRL_RANGE(i);
 421                                 ret = ad5933_cmd(st, 0);
 422                                 break;
 423                         }
 424                 ret = -EINVAL;
 425                 break;
 426         case AD5933_IN_PGA_GAIN:
 427                 if (sysfs_streq(buf, "1")) {
 428                         st->ctrl_hb |= AD5933_CTRL_PGA_GAIN_1;
 429                 } else if (sysfs_streq(buf, "0.2")) {
 430                         st->ctrl_hb &= ~AD5933_CTRL_PGA_GAIN_1;
 431                 } else {
 432                         ret = -EINVAL;
 433                         break;
 434                 }
 435                 ret = ad5933_cmd(st, 0);
 436                 break;
 437         case AD5933_OUT_SETTLING_CYCLES:
 438                 val = clamp(val, (u16)0, (u16)0x7FF);
 439                 st->settling_cycles = val;
 440
 441                 /* 2x, 4x handling, see datasheet */
 442                 if (val > 511)
 443                         val = (val >> 1) | (1 << 9);
 444                 else if (val > 1022)
 445                         val = (val >> 2) | (3 << 9);
 446
 447                 dat = cpu_to_be16(val);
 448                 ret = ad5933_i2c_write(st->client,
 449                                 AD5933_REG_SETTLING_CYCLES, 2, (u8 *)&dat);
 450                 break;
 451         case AD5933_FREQ_POINTS:
 452                 val = clamp(val, (u16)0, (u16)511);
 453                 st->freq_points = val;
 454
 455                 dat = cpu_to_be16(val);
 456                 ret = ad5933_i2c_write(st->client, AD5933_REG_INC_NUM, 2,
 457                                        (u8 *)&dat);
 458                 break;
 459         default:
 460                 ret = -EINVAL;
 461         }
 462
 463         mutex_unlock(&indio_dev->mlock);
 464         return ret ? ret : len;
 465 }
 466
 467 static IIO_DEVICE_ATTR(out_voltage0_scale, S_IRUGO | S_IWUSR,
 468                         ad5933_show,
 469                         ad5933_store,
 470                         AD5933_OUT_RANGE);
 471
 472 static IIO_DEVICE_ATTR(out_voltage0_scale_available, S_IRUGO,
 473                         ad5933_show,
 474                         NULL,
 475                         AD5933_OUT_RANGE_AVAIL);
 476
 477 static IIO_DEVICE_ATTR(in_voltage0_scale, S_IRUGO | S_IWUSR,
 478                         ad5933_show,
 479                         ad5933_store,
 480                         AD5933_IN_PGA_GAIN);
 481
 482 static IIO_DEVICE_ATTR(in_voltage0_scale_available, S_IRUGO,
 483                         ad5933_show,
 484                         NULL,
 485                         AD5933_IN_PGA_GAIN_AVAIL);
 486
 487 static IIO_DEVICE_ATTR(out_voltage0_freq_points, S_IRUGO | S_IWUSR,
 488                         ad5933_show,
 489                         ad5933_store,
 490                         AD5933_FREQ_POINTS);
 491
 492 static IIO_DEVICE_ATTR(out_voltage0_settling_cycles, S_IRUGO | S_IWUSR,
 493                         ad5933_show,
 494                         ad5933_store,
 495                         AD5933_OUT_SETTLING_CYCLES);
 496
 497 /* note:
 498  * ideally we would handle the scale attributes via the iio_info
 499  * (read|write)_raw methods, however this part is a untypical since we
 500  * don't create dedicated sysfs channel attributes for out0 and in0.
 501  */
 502 static struct attribute *ad5933_attributes[] = {
 503         &iio_dev_attr_out_voltage0_scale.dev_attr.attr,
 504         &iio_dev_attr_out_voltage0_scale_available.dev_attr.attr,
 505         &iio_dev_attr_out_voltage0_freq_start.dev_attr.attr,
 506         &iio_dev_attr_out_voltage0_freq_increment.dev_attr.attr,
 507         &iio_dev_attr_out_voltage0_freq_points.dev_attr.attr,
 508         &iio_dev_attr_out_voltage0_settling_cycles.dev_attr.attr,
 509         &iio_dev_attr_in_voltage0_scale.dev_attr.attr,
 510         &iio_dev_attr_in_voltage0_scale_available.dev_attr.attr,
 511         NULL
 512 };
 513
 514 static const struct attribute_group ad5933_attribute_group = {
 515         .attrs = ad5933_attributes,
 516 };
 517
 518 static int ad5933_read_raw(struct iio_dev *indio_dev,
 519                            struct iio_chan_spec const *chan,
 520                            int *val,
 521                            int *val2,
 522                            long m)
 523 {
 524         struct ad5933_state *st = iio_priv(indio_dev);
 525         __be16 dat;
 526         int ret = -EINVAL;
 527
 528         mutex_lock(&indio_dev->mlock);
 529         switch (m) {
 530         case IIO_CHAN_INFO_RAW:
 531         case IIO_CHAN_INFO_PROCESSED:
 532                 if (iio_buffer_enabled(indio_dev)) {
 533                         ret = -EBUSY;
 534                         goto out;
 535                 }
 536                 ret = ad5933_cmd(st, AD5933_CTRL_MEASURE_TEMP);
 537                 if (ret < 0)
 538                         goto out;
 539                 ret = ad5933_wait_busy(st, AD5933_STAT_TEMP_VALID);
 540                 if (ret < 0)
 541                         goto out;
 542
 543                 ret = ad5933_i2c_read(st->client,
 544                                 AD5933_REG_TEMP_DATA, 2,
 545                                 (u8 *)&dat);
 546                 if (ret < 0)
 547                         goto out;
 548                 mutex_unlock(&indio_dev->mlock);
 549                 ret = be16_to_cpu(dat);
 550                 /* Temp in Milli degrees Celsius */
 551                 if (ret < 8192)
 552                         *val = ret * 1000 / 32;
 553                 else
 554                         *val = (ret - 16384) * 1000 / 32;
 555
 556                 return IIO_VAL_INT;
 557         }
 558
 559 out:
 560         mutex_unlock(&indio_dev->mlock);
 561         return ret;
 562 }
 563
 564 static const struct iio_info ad5933_info = {
 565         .read_raw = &ad5933_read_raw,
 566         .attrs = &ad5933_attribute_group,
 567         .driver_module = THIS_MODULE,
 568 };
 569
 570 static int ad5933_ring_preenable(struct iio_dev *indio_dev)
 571 {
 572         struct ad5933_state *st = iio_priv(indio_dev);
 573         int ret;
 574
 575         if (bitmap_empty(indio_dev->active_scan_mask, indio_dev->masklength))
 576                 return -EINVAL;
 577
 578         ret = ad5933_reset(st);
 579         if (ret < 0)
 580                 return ret;
 581
 582         ret = ad5933_cmd(st, AD5933_CTRL_STANDBY);
 583         if (ret < 0)
 584                 return ret;
 585
 586         ret = ad5933_cmd(st, AD5933_CTRL_INIT_START_FREQ);
 587         if (ret < 0)
 588                 return ret;
 589
 590         st->state = AD5933_CTRL_INIT_START_FREQ;
 591
 592         return 0;
 593 }
 594
 595 static int ad5933_ring_postenable(struct iio_dev *indio_dev)
 596 {
 597         struct ad5933_state *st = iio_priv(indio_dev);
 598
 599         /* AD5933_CTRL_INIT_START_FREQ:
 600          * High Q complex circuits require a long time to reach steady state.
 601          * To facilitate the measurement of such impedances, this mode allows
 602          * the user full control of the settling time requirement before
 603          * entering start frequency sweep mode where the impedance measurement
 604          * takes place. In this mode the impedance is excited with the
 605          * programmed start frequency (ad5933_ring_preenable),
 606          * but no measurement takes place.
 607          */
 608
 609         schedule_delayed_work(&st->work,
 610                               msecs_to_jiffies(AD5933_INIT_EXCITATION_TIME_ms));
 611         return 0;
 612 }
 613
 614 static int ad5933_ring_postdisable(struct iio_dev *indio_dev)
 615 {
 616         struct ad5933_state *st = iio_priv(indio_dev);
 617
 618         cancel_delayed_work_sync(&st->work);
 619         return ad5933_cmd(st, AD5933_CTRL_POWER_DOWN);
 620 }
 621
 622 static const struct iio_buffer_setup_ops ad5933_ring_setup_ops = {
 623         .preenable = &ad5933_ring_preenable,
 624         .postenable = &ad5933_ring_postenable,
 625         .postdisable = &ad5933_ring_postdisable,
 626 };
 627
 628 static int ad5933_register_ring_funcs_and_init(struct iio_dev *indio_dev)
 629 {
 630         struct iio_buffer *buffer;
 631
 632         buffer = iio_kfifo_allocate(indio_dev);
 633         if (!buffer)
 634                 return -ENOMEM;
 635
 636         iio_device_attach_buffer(indio_dev, buffer);
 637
 638         /* Ring buffer functions - here trigger setup related */
 639         indio_dev->setup_ops = &ad5933_ring_setup_ops;
 640
 641         indio_dev->modes |= INDIO_BUFFER_HARDWARE;
 642
 643         return 0;
 644 }
 645
 646 static void ad5933_work(struct work_struct *work)
 647 {
 648         struct ad5933_state *st = container_of(work,
 649                 struct ad5933_state, work.work);
 650         struct iio_dev *indio_dev = i2c_get_clientdata(st->client);
 651         signed short buf[2];
 652         unsigned char status;
 653
 654         mutex_lock(&indio_dev->mlock);
 655         if (st->state == AD5933_CTRL_INIT_START_FREQ) {
 656                 /* start sweep */
 657                 ad5933_cmd(st, AD5933_CTRL_START_SWEEP);
 658                 st->state = AD5933_CTRL_START_SWEEP;
 659                 schedule_delayed_work(&st->work, st->poll_time_jiffies);
 660                 mutex_unlock(&indio_dev->mlock);
 661                 return;
 662         }
 663
 664         ad5933_i2c_read(st->client, AD5933_REG_STATUS, 1, &status);
 665
 666         if (status & AD5933_STAT_DATA_VALID) {
 667                 int scan_count = bitmap_weight(indio_dev->active_scan_mask,
 668                                                indio_dev->masklength);
 669                 ad5933_i2c_read(st->client,
 670                                 test_bit(1, indio_dev->active_scan_mask) ?
 671                                 AD5933_REG_REAL_DATA : AD5933_REG_IMAG_DATA,
 672                                 scan_count * 2, (u8 *)buf);
 673
 674                 if (scan_count == 2) {
 675                         buf[0] = be16_to_cpu(buf[0]);
 676                         buf[1] = be16_to_cpu(buf[1]);
 677                 } else {
 678                         buf[0] = be16_to_cpu(buf[0]);
 679                 }
 680                 iio_push_to_buffers(indio_dev, buf);
 681         } else {
 682                 /* no data available - try again later */
 683                 schedule_delayed_work(&st->work, st->poll_time_jiffies);
 684                 mutex_unlock(&indio_dev->mlock);
 685                 return;
 686         }
 687
 688         if (status & AD5933_STAT_SWEEP_DONE) {
 689                 /* last sample received - power down do nothing until
 690                  * the ring enable is toggled */
 691                 ad5933_cmd(st, AD5933_CTRL_POWER_DOWN);
 692         } else {
 693                 /* we just received a valid datum, move on to the next */
 694                 ad5933_cmd(st, AD5933_CTRL_INC_FREQ);
 695                 schedule_delayed_work(&st->work, st->poll_time_jiffies);
 696         }
 697
 698         mutex_unlock(&indio_dev->mlock);
 699 }
 700
 701 static int ad5933_probe(struct i2c_client *client,
 702                                    const struct i2c_device_id *id)
 703 {
 704         int ret, voltage_uv = 0;
 705         struct ad5933_platform_data *pdata = client->dev.platform_data;
 706         struct ad5933_state *st;
 707         struct iio_dev *indio_dev;
 708
 709         indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*st));
 710         if (indio_dev == NULL)
 711                 return -ENOMEM;
 712
 713         st = iio_priv(indio_dev);
 714         i2c_set_clientdata(client, indio_dev);
 715         st->client = client;
 716
 717         if (!pdata)
 718                 st->pdata = &ad5933_default_pdata;
 719         else
 720                 st->pdata = pdata;
 721
 722         st->reg = devm_regulator_get(&client->dev, "vcc");
 723         if (!IS_ERR(st->reg)) {
 724                 ret = regulator_enable(st->reg);
 725                 if (ret)
 726                         return ret;
 727                 voltage_uv = regulator_get_voltage(st->reg);
 728         }
 729
 730         if (voltage_uv)
 731                 st->vref_mv = voltage_uv / 1000;
 732         else
 733                 st->vref_mv = st->pdata->vref_mv;
 734
 735         if (st->pdata->ext_clk_Hz) {
 736                 st->mclk_hz = st->pdata->ext_clk_Hz;
 737                 st->ctrl_lb = AD5933_CTRL_EXT_SYSCLK;
 738         } else {
 739                 st->mclk_hz = AD5933_INT_OSC_FREQ_Hz;
 740                 st->ctrl_lb = AD5933_CTRL_INT_SYSCLK;
 741         }
 742
 743         ad5933_calc_out_ranges(st);
 744         INIT_DELAYED_WORK(&st->work, ad5933_work);
 745         st->poll_time_jiffies = msecs_to_jiffies(AD5933_POLL_TIME_ms);
 746
 747         indio_dev->dev.parent = &client->dev;
 748         indio_dev->info = &ad5933_info;
 749         indio_dev->name = id->name;
 750         indio_dev->modes = INDIO_DIRECT_MODE;
 751         indio_dev->channels = ad5933_channels;
 752         indio_dev->num_channels = 1; /* only register temp0_input */
 753
 754         ret = ad5933_register_ring_funcs_and_init(indio_dev);
 755         if (ret)
 756                 goto error_disable_reg;
 757
 758         /* skip temp0_input, register in0_(real|imag)_raw */
 759         ret = iio_buffer_register(indio_dev, &ad5933_channels[1], 2);
 760         if (ret)
 761                 goto error_unreg_ring;
 762
 763         /* enable both REAL and IMAG channels by default */
 764         iio_scan_mask_set(indio_dev, indio_dev->buffer, 0);
 765         iio_scan_mask_set(indio_dev, indio_dev->buffer, 1);
 766
 767         ret = ad5933_setup(st);
 768         if (ret)
 769                 goto error_uninitialize_ring;
 770
 771         ret = iio_device_register(indio_dev);
 772         if (ret)
 773                 goto error_uninitialize_ring;
 774
 775         return 0;
 776
 777 error_uninitialize_ring:
 778         iio_buffer_unregister(indio_dev);
 779 error_unreg_ring:
 780         iio_kfifo_free(indio_dev->buffer);
 781 error_disable_reg:
 782         if (!IS_ERR(st->reg))
 783                 regulator_disable(st->reg);
 784
 785         return ret;
 786 }
 787
 788 static int ad5933_remove(struct i2c_client *client)
 789 {
 790         struct iio_dev *indio_dev = i2c_get_clientdata(client);
 791         struct ad5933_state *st = iio_priv(indio_dev);
 792
 793         iio_device_unregister(indio_dev);
 794         iio_buffer_unregister(indio_dev);
 795         iio_kfifo_free(indio_dev->buffer);
 796         if (!IS_ERR(st->reg))
 797                 regulator_disable(st->reg);
 798
 799         return 0;
 800 }
 801
 802 static const struct i2c_device_id ad5933_id[] = {
 803         { "ad5933", 0 },
 804         { "ad5934", 0 },
 805         {}
 806 };
 807
 808 MODULE_DEVICE_TABLE(i2c, ad5933_id);
 809
 810 static struct i2c_driver ad5933_driver = {
 811         .driver = {
 812                 .name = "ad5933",
 813         },
 814         .probe = ad5933_probe,
 815         .remove = ad5933_remove,
 816         .id_table = ad5933_id,
 817 };
 818 module_i2c_driver(ad5933_driver);
 819
 820 MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
 821 MODULE_DESCRIPTION("Analog Devices AD5933 Impedance Conv. Network Analyzer");
 822 MODULE_LICENSE("GPL v2");