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Merge 3.7-rc3 into staging-next
[deliverable/linux.git] / drivers / staging / iio / imu / adis16400_core.c
1 /*
2 * adis16400.c support Analog Devices ADIS16400/5
3 * 3d 2g Linear Accelerometers,
4 * 3d Gyroscopes,
5 * 3d Magnetometers via SPI
6 *
7 * Copyright (c) 2009 Manuel Stahl <manuel.stahl@iis.fraunhofer.de>
8 * Copyright (c) 2007 Jonathan Cameron <jic23@kernel.org>
9 * Copyright (c) 2011 Analog Devices Inc.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 *
15 */
16
17 #include <linux/interrupt.h>
18 #include <linux/irq.h>
19 #include <linux/delay.h>
20 #include <linux/mutex.h>
21 #include <linux/device.h>
22 #include <linux/kernel.h>
23 #include <linux/spi/spi.h>
24 #include <linux/slab.h>
25 #include <linux/sysfs.h>
26 #include <linux/list.h>
27 #include <linux/module.h>
28
29 #include <linux/iio/iio.h>
30 #include <linux/iio/sysfs.h>
31 #include <linux/iio/buffer.h>
32 #include "adis16400.h"
33
34 enum adis16400_chip_variant {
35 ADIS16300,
36 ADIS16334,
37 ADIS16350,
38 ADIS16360,
39 ADIS16362,
40 ADIS16364,
41 ADIS16365,
42 ADIS16400,
43 };
44
45 /**
46 * adis16400_spi_write_reg_8() - write single byte to a register
47 * @dev: device associated with child of actual device (iio_dev or iio_trig)
48 * @reg_address: the address of the register to be written
49 * @val: the value to write
50 */
51 static int adis16400_spi_write_reg_8(struct iio_dev *indio_dev,
52 u8 reg_address,
53 u8 val)
54 {
55 int ret;
56 struct adis16400_state *st = iio_priv(indio_dev);
57
58 mutex_lock(&st->buf_lock);
59 st->tx[0] = ADIS16400_WRITE_REG(reg_address);
60 st->tx[1] = val;
61
62 ret = spi_write(st->us, st->tx, 2);
63 mutex_unlock(&st->buf_lock);
64
65 return ret;
66 }
67
68 /**
69 * adis16400_spi_write_reg_16() - write 2 bytes to a pair of registers
70 * @dev: device associated with child of actual device (iio_dev or iio_trig)
71 * @reg_address: the address of the lower of the two registers. Second register
72 * is assumed to have address one greater.
73 * @val: value to be written
74 *
75 * At the moment the spi framework doesn't allow global setting of cs_change.
76 * This means that use cannot be made of spi_write.
77 */
78 static int adis16400_spi_write_reg_16(struct iio_dev *indio_dev,
79 u8 lower_reg_address,
80 u16 value)
81 {
82 int ret;
83 struct spi_message msg;
84 struct adis16400_state *st = iio_priv(indio_dev);
85 struct spi_transfer xfers[] = {
86 {
87 .tx_buf = st->tx,
88 .bits_per_word = 8,
89 .len = 2,
90 .cs_change = 1,
91 }, {
92 .tx_buf = st->tx + 2,
93 .bits_per_word = 8,
94 .len = 2,
95 },
96 };
97
98 mutex_lock(&st->buf_lock);
99 st->tx[0] = ADIS16400_WRITE_REG(lower_reg_address);
100 st->tx[1] = value & 0xFF;
101 st->tx[2] = ADIS16400_WRITE_REG(lower_reg_address + 1);
102 st->tx[3] = (value >> 8) & 0xFF;
103
104 spi_message_init(&msg);
105 spi_message_add_tail(&xfers[0], &msg);
106 spi_message_add_tail(&xfers[1], &msg);
107 ret = spi_sync(st->us, &msg);
108 mutex_unlock(&st->buf_lock);
109
110 return ret;
111 }
112
113 /**
114 * adis16400_spi_read_reg_16() - read 2 bytes from a 16-bit register
115 * @indio_dev: iio device
116 * @reg_address: the address of the lower of the two registers. Second register
117 * is assumed to have address one greater.
118 * @val: somewhere to pass back the value read
119 *
120 * At the moment the spi framework doesn't allow global setting of cs_change.
121 * This means that use cannot be made of spi_read.
122 **/
123 static int adis16400_spi_read_reg_16(struct iio_dev *indio_dev,
124 u8 lower_reg_address,
125 u16 *val)
126 {
127 struct spi_message msg;
128 struct adis16400_state *st = iio_priv(indio_dev);
129 int ret;
130 struct spi_transfer xfers[] = {
131 {
132 .tx_buf = st->tx,
133 .bits_per_word = 8,
134 .len = 2,
135 .cs_change = 1,
136 }, {
137 .rx_buf = st->rx,
138 .bits_per_word = 8,
139 .len = 2,
140 },
141 };
142
143 mutex_lock(&st->buf_lock);
144 st->tx[0] = ADIS16400_READ_REG(lower_reg_address);
145 st->tx[1] = 0;
146
147 spi_message_init(&msg);
148 spi_message_add_tail(&xfers[0], &msg);
149 spi_message_add_tail(&xfers[1], &msg);
150 ret = spi_sync(st->us, &msg);
151 if (ret) {
152 dev_err(&st->us->dev,
153 "problem when reading 16 bit register 0x%02X",
154 lower_reg_address);
155 goto error_ret;
156 }
157 *val = (st->rx[0] << 8) | st->rx[1];
158
159 error_ret:
160 mutex_unlock(&st->buf_lock);
161 return ret;
162 }
163
164 static int adis16400_get_freq(struct iio_dev *indio_dev)
165 {
166 u16 t;
167 int sps, ret;
168
169 ret = adis16400_spi_read_reg_16(indio_dev, ADIS16400_SMPL_PRD, &t);
170 if (ret < 0)
171 return ret;
172 sps = (t & ADIS16400_SMPL_PRD_TIME_BASE) ? 53 : 1638;
173 sps /= (t & ADIS16400_SMPL_PRD_DIV_MASK) + 1;
174
175 return sps;
176 }
177
178 static ssize_t adis16400_read_frequency(struct device *dev,
179 struct device_attribute *attr,
180 char *buf)
181 {
182 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
183 int ret, len = 0;
184 ret = adis16400_get_freq(indio_dev);
185 if (ret < 0)
186 return ret;
187 len = sprintf(buf, "%d SPS\n", ret);
188 return len;
189 }
190
191 static const unsigned adis16400_3db_divisors[] = {
192 [0] = 2, /* Special case */
193 [1] = 5,
194 [2] = 10,
195 [3] = 50,
196 [4] = 200,
197 };
198
199 static int adis16400_set_filter(struct iio_dev *indio_dev, int sps, int val)
200 {
201 int i, ret;
202 u16 val16;
203 for (i = ARRAY_SIZE(adis16400_3db_divisors) - 1; i >= 0; i--)
204 if (sps/adis16400_3db_divisors[i] > val)
205 break;
206 if (i == -1)
207 ret = -EINVAL;
208 else {
209 ret = adis16400_spi_read_reg_16(indio_dev,
210 ADIS16400_SENS_AVG,
211 &val16);
212 if (ret < 0)
213 goto error_ret;
214
215 ret = adis16400_spi_write_reg_16(indio_dev,
216 ADIS16400_SENS_AVG,
217 (val16 & ~0x03) | i);
218 }
219 error_ret:
220 return ret;
221 }
222
223 static ssize_t adis16400_write_frequency(struct device *dev,
224 struct device_attribute *attr,
225 const char *buf,
226 size_t len)
227 {
228 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
229 struct adis16400_state *st = iio_priv(indio_dev);
230 long val;
231 int ret;
232 u8 t;
233
234 ret = strict_strtol(buf, 10, &val);
235 if (ret)
236 return ret;
237 if (val == 0)
238 return -EINVAL;
239
240 mutex_lock(&indio_dev->mlock);
241
242 t = (1638 / val);
243 if (t > 0)
244 t--;
245 t &= ADIS16400_SMPL_PRD_DIV_MASK;
246 if ((t & ADIS16400_SMPL_PRD_DIV_MASK) >= 0x0A)
247 st->us->max_speed_hz = ADIS16400_SPI_SLOW;
248 else
249 st->us->max_speed_hz = ADIS16400_SPI_FAST;
250
251 ret = adis16400_spi_write_reg_8(indio_dev,
252 ADIS16400_SMPL_PRD,
253 t);
254
255 /* Also update the filter */
256 mutex_unlock(&indio_dev->mlock);
257
258 return ret ? ret : len;
259 }
260
261 static int adis16400_reset(struct iio_dev *indio_dev)
262 {
263 int ret;
264 ret = adis16400_spi_write_reg_8(indio_dev,
265 ADIS16400_GLOB_CMD,
266 ADIS16400_GLOB_CMD_SW_RESET);
267 if (ret)
268 dev_err(&indio_dev->dev, "problem resetting device");
269
270 return ret;
271 }
272
273 int adis16400_set_irq(struct iio_dev *indio_dev, bool enable)
274 {
275 int ret;
276 u16 msc;
277
278 ret = adis16400_spi_read_reg_16(indio_dev, ADIS16400_MSC_CTRL, &msc);
279 if (ret)
280 goto error_ret;
281
282 msc |= ADIS16400_MSC_CTRL_DATA_RDY_POL_HIGH;
283 if (enable)
284 msc |= ADIS16400_MSC_CTRL_DATA_RDY_EN;
285 else
286 msc &= ~ADIS16400_MSC_CTRL_DATA_RDY_EN;
287
288 ret = adis16400_spi_write_reg_16(indio_dev, ADIS16400_MSC_CTRL, msc);
289 if (ret)
290 goto error_ret;
291
292 error_ret:
293 return ret;
294 }
295
296 /* Power down the device */
297 static int adis16400_stop_device(struct iio_dev *indio_dev)
298 {
299 int ret;
300 u16 val = ADIS16400_SLP_CNT_POWER_OFF;
301
302 ret = adis16400_spi_write_reg_16(indio_dev, ADIS16400_SLP_CNT, val);
303 if (ret)
304 dev_err(&indio_dev->dev,
305 "problem with turning device off: SLP_CNT");
306
307 return ret;
308 }
309
310 static int adis16400_check_status(struct iio_dev *indio_dev)
311 {
312 u16 status;
313 int ret;
314 struct device *dev = &indio_dev->dev;
315
316 ret = adis16400_spi_read_reg_16(indio_dev,
317 ADIS16400_DIAG_STAT, &status);
318
319 if (ret < 0) {
320 dev_err(dev, "Reading status failed\n");
321 goto error_ret;
322 }
323 ret = status;
324 if (status & ADIS16400_DIAG_STAT_ZACCL_FAIL)
325 dev_err(dev, "Z-axis accelerometer self-test failure\n");
326 if (status & ADIS16400_DIAG_STAT_YACCL_FAIL)
327 dev_err(dev, "Y-axis accelerometer self-test failure\n");
328 if (status & ADIS16400_DIAG_STAT_XACCL_FAIL)
329 dev_err(dev, "X-axis accelerometer self-test failure\n");
330 if (status & ADIS16400_DIAG_STAT_XGYRO_FAIL)
331 dev_err(dev, "X-axis gyroscope self-test failure\n");
332 if (status & ADIS16400_DIAG_STAT_YGYRO_FAIL)
333 dev_err(dev, "Y-axis gyroscope self-test failure\n");
334 if (status & ADIS16400_DIAG_STAT_ZGYRO_FAIL)
335 dev_err(dev, "Z-axis gyroscope self-test failure\n");
336 if (status & ADIS16400_DIAG_STAT_ALARM2)
337 dev_err(dev, "Alarm 2 active\n");
338 if (status & ADIS16400_DIAG_STAT_ALARM1)
339 dev_err(dev, "Alarm 1 active\n");
340 if (status & ADIS16400_DIAG_STAT_FLASH_CHK)
341 dev_err(dev, "Flash checksum error\n");
342 if (status & ADIS16400_DIAG_STAT_SELF_TEST)
343 dev_err(dev, "Self test error\n");
344 if (status & ADIS16400_DIAG_STAT_OVERFLOW)
345 dev_err(dev, "Sensor overrange\n");
346 if (status & ADIS16400_DIAG_STAT_SPI_FAIL)
347 dev_err(dev, "SPI failure\n");
348 if (status & ADIS16400_DIAG_STAT_FLASH_UPT)
349 dev_err(dev, "Flash update failed\n");
350 if (status & ADIS16400_DIAG_STAT_POWER_HIGH)
351 dev_err(dev, "Power supply above 5.25V\n");
352 if (status & ADIS16400_DIAG_STAT_POWER_LOW)
353 dev_err(dev, "Power supply below 4.75V\n");
354
355 error_ret:
356 return ret;
357 }
358
359 static int adis16400_self_test(struct iio_dev *indio_dev)
360 {
361 int ret;
362 ret = adis16400_spi_write_reg_16(indio_dev,
363 ADIS16400_MSC_CTRL,
364 ADIS16400_MSC_CTRL_MEM_TEST);
365 if (ret) {
366 dev_err(&indio_dev->dev, "problem starting self test");
367 goto err_ret;
368 }
369
370 msleep(ADIS16400_MTEST_DELAY);
371 adis16400_check_status(indio_dev);
372
373 err_ret:
374 return ret;
375 }
376
377 static int adis16400_initial_setup(struct iio_dev *indio_dev)
378 {
379 int ret;
380 u16 prod_id, smp_prd;
381 struct adis16400_state *st = iio_priv(indio_dev);
382
383 /* use low spi speed for init */
384 st->us->max_speed_hz = ADIS16400_SPI_SLOW;
385 st->us->mode = SPI_MODE_3;
386 spi_setup(st->us);
387
388 ret = adis16400_set_irq(indio_dev, false);
389 if (ret) {
390 dev_err(&indio_dev->dev, "disable irq failed");
391 goto err_ret;
392 }
393
394 ret = adis16400_self_test(indio_dev);
395 if (ret) {
396 dev_err(&indio_dev->dev, "self test failure");
397 goto err_ret;
398 }
399
400 ret = adis16400_check_status(indio_dev);
401 if (ret) {
402 adis16400_reset(indio_dev);
403 dev_err(&indio_dev->dev, "device not playing ball -> reset");
404 msleep(ADIS16400_STARTUP_DELAY);
405 ret = adis16400_check_status(indio_dev);
406 if (ret) {
407 dev_err(&indio_dev->dev, "giving up");
408 goto err_ret;
409 }
410 }
411 if (st->variant->flags & ADIS16400_HAS_PROD_ID) {
412 ret = adis16400_spi_read_reg_16(indio_dev,
413 ADIS16400_PRODUCT_ID, &prod_id);
414 if (ret)
415 goto err_ret;
416
417 if ((prod_id & 0xF000) != st->variant->product_id)
418 dev_warn(&indio_dev->dev, "incorrect id");
419
420 dev_info(&indio_dev->dev, "%s: prod_id 0x%04x at CS%d (irq %d)\n",
421 indio_dev->name, prod_id,
422 st->us->chip_select, st->us->irq);
423 }
424 /* use high spi speed if possible */
425 ret = adis16400_spi_read_reg_16(indio_dev,
426 ADIS16400_SMPL_PRD, &smp_prd);
427 if (!ret && (smp_prd & ADIS16400_SMPL_PRD_DIV_MASK) < 0x0A) {
428 st->us->max_speed_hz = ADIS16400_SPI_SLOW;
429 spi_setup(st->us);
430 }
431
432 err_ret:
433 return ret;
434 }
435
436 static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
437 adis16400_read_frequency,
438 adis16400_write_frequency);
439
440 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("409 546 819 1638");
441
442 enum adis16400_chan {
443 in_supply,
444 gyro_x,
445 gyro_y,
446 gyro_z,
447 accel_x,
448 accel_y,
449 accel_z,
450 magn_x,
451 magn_y,
452 magn_z,
453 temp,
454 temp0, temp1, temp2,
455 in1,
456 in2,
457 incli_x,
458 incli_y,
459 };
460
461 static u8 adis16400_addresses[18][2] = {
462 [in_supply] = { ADIS16400_SUPPLY_OUT },
463 [gyro_x] = { ADIS16400_XGYRO_OUT, ADIS16400_XGYRO_OFF },
464 [gyro_y] = { ADIS16400_YGYRO_OUT, ADIS16400_YGYRO_OFF },
465 [gyro_z] = { ADIS16400_ZGYRO_OUT, ADIS16400_ZGYRO_OFF },
466 [accel_x] = { ADIS16400_XACCL_OUT, ADIS16400_XACCL_OFF },
467 [accel_y] = { ADIS16400_YACCL_OUT, ADIS16400_YACCL_OFF },
468 [accel_z] = { ADIS16400_ZACCL_OUT, ADIS16400_ZACCL_OFF },
469 [magn_x] = { ADIS16400_XMAGN_OUT },
470 [magn_y] = { ADIS16400_YMAGN_OUT },
471 [magn_z] = { ADIS16400_ZMAGN_OUT },
472 [temp] = { ADIS16400_TEMP_OUT },
473 [temp0] = { ADIS16350_XTEMP_OUT },
474 [temp1] = { ADIS16350_YTEMP_OUT },
475 [temp2] = { ADIS16350_ZTEMP_OUT },
476 [in1] = { ADIS16300_AUX_ADC },
477 [in2] = { ADIS16400_AUX_ADC },
478 [incli_x] = { ADIS16300_PITCH_OUT },
479 [incli_y] = { ADIS16300_ROLL_OUT }
480 };
481
482
483 static int adis16400_write_raw(struct iio_dev *indio_dev,
484 struct iio_chan_spec const *chan,
485 int val,
486 int val2,
487 long mask)
488 {
489 struct adis16400_state *st = iio_priv(indio_dev);
490 int ret, sps;
491
492 switch (mask) {
493 case IIO_CHAN_INFO_CALIBBIAS:
494 mutex_lock(&indio_dev->mlock);
495 ret = adis16400_spi_write_reg_16(indio_dev,
496 adis16400_addresses[chan->address][1],
497 val);
498 mutex_unlock(&indio_dev->mlock);
499 return ret;
500 case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
501 /* Need to cache values so we can update if the frequency
502 changes */
503 mutex_lock(&indio_dev->mlock);
504 st->filt_int = val;
505 /* Work out update to current value */
506 sps = adis16400_get_freq(indio_dev);
507 if (sps < 0) {
508 mutex_unlock(&indio_dev->mlock);
509 return sps;
510 }
511
512 ret = adis16400_set_filter(indio_dev, sps, val);
513 mutex_unlock(&indio_dev->mlock);
514 return ret;
515 default:
516 return -EINVAL;
517 }
518 }
519
520 static int adis16400_read_raw(struct iio_dev *indio_dev,
521 struct iio_chan_spec const *chan,
522 int *val,
523 int *val2,
524 long mask)
525 {
526 struct adis16400_state *st = iio_priv(indio_dev);
527 int ret, shift;
528 s16 val16;
529
530 switch (mask) {
531 case IIO_CHAN_INFO_RAW:
532 mutex_lock(&indio_dev->mlock);
533 ret = adis16400_spi_read_reg_16(indio_dev,
534 adis16400_addresses[chan->address][0],
535 &val16);
536 if (ret) {
537 mutex_unlock(&indio_dev->mlock);
538 return ret;
539 }
540 val16 &= (1 << chan->scan_type.realbits) - 1;
541 if (chan->scan_type.sign == 's') {
542 shift = 16 - chan->scan_type.realbits;
543 val16 = (s16)(val16 << shift) >> shift;
544 }
545 *val = val16;
546 mutex_unlock(&indio_dev->mlock);
547 return IIO_VAL_INT;
548 case IIO_CHAN_INFO_SCALE:
549 switch (chan->type) {
550 case IIO_ANGL_VEL:
551 *val = 0;
552 *val2 = st->variant->gyro_scale_micro;
553 return IIO_VAL_INT_PLUS_MICRO;
554 case IIO_VOLTAGE:
555 *val = 0;
556 if (chan->channel == 0) {
557 *val = 2;
558 *val2 = 418000; /* 2.418 mV */
559 } else {
560 *val = 0;
561 *val2 = 805800; /* 805.8 uV */
562 }
563 return IIO_VAL_INT_PLUS_MICRO;
564 case IIO_ACCEL:
565 *val = 0;
566 *val2 = st->variant->accel_scale_micro;
567 return IIO_VAL_INT_PLUS_MICRO;
568 case IIO_MAGN:
569 *val = 0;
570 *val2 = 500; /* 0.5 mgauss */
571 return IIO_VAL_INT_PLUS_MICRO;
572 case IIO_TEMP:
573 *val = st->variant->temp_scale_nano / 1000000;
574 *val2 = (st->variant->temp_scale_nano % 1000000);
575 return IIO_VAL_INT_PLUS_MICRO;
576 default:
577 return -EINVAL;
578 }
579 case IIO_CHAN_INFO_CALIBBIAS:
580 mutex_lock(&indio_dev->mlock);
581 ret = adis16400_spi_read_reg_16(indio_dev,
582 adis16400_addresses[chan->address][1],
583 &val16);
584 mutex_unlock(&indio_dev->mlock);
585 if (ret)
586 return ret;
587 val16 = ((val16 & 0xFFF) << 4) >> 4;
588 *val = val16;
589 return IIO_VAL_INT;
590 case IIO_CHAN_INFO_OFFSET:
591 /* currently only temperature */
592 *val = st->variant->temp_offset;
593 return IIO_VAL_INT;
594 case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
595 mutex_lock(&indio_dev->mlock);
596 /* Need both the number of taps and the sampling frequency */
597 ret = adis16400_spi_read_reg_16(indio_dev,
598 ADIS16400_SENS_AVG,
599 &val16);
600 if (ret < 0) {
601 mutex_unlock(&indio_dev->mlock);
602 return ret;
603 }
604 ret = adis16400_get_freq(indio_dev);
605 if (ret > 0)
606 *val = ret/adis16400_3db_divisors[val16 & 0x03];
607 *val2 = 0;
608 mutex_unlock(&indio_dev->mlock);
609 if (ret < 0)
610 return ret;
611 return IIO_VAL_INT_PLUS_MICRO;
612 default:
613 return -EINVAL;
614 }
615 }
616
617 static const struct iio_chan_spec adis16400_channels[] = {
618 {
619 .type = IIO_VOLTAGE,
620 .indexed = 1,
621 .channel = 0,
622 .extend_name = "supply",
623 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
624 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
625 .address = in_supply,
626 .scan_index = ADIS16400_SCAN_SUPPLY,
627 .scan_type = IIO_ST('u', 14, 16, 0),
628 }, {
629 .type = IIO_ANGL_VEL,
630 .modified = 1,
631 .channel2 = IIO_MOD_X,
632 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
633 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
634 IIO_CHAN_INFO_SCALE_SHARED_BIT |
635 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
636 .address = gyro_x,
637 .scan_index = ADIS16400_SCAN_GYRO_X,
638 .scan_type = IIO_ST('s', 14, 16, 0),
639 }, {
640 .type = IIO_ANGL_VEL,
641 .modified = 1,
642 .channel2 = IIO_MOD_Y,
643 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
644 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
645 IIO_CHAN_INFO_SCALE_SHARED_BIT |
646 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
647 .address = gyro_y,
648 .scan_index = ADIS16400_SCAN_GYRO_Y,
649 .scan_type = IIO_ST('s', 14, 16, 0),
650 }, {
651 .type = IIO_ANGL_VEL,
652 .modified = 1,
653 .channel2 = IIO_MOD_Z,
654 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
655 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
656 IIO_CHAN_INFO_SCALE_SHARED_BIT |
657 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
658 .address = gyro_z,
659 .scan_index = ADIS16400_SCAN_GYRO_Z,
660 .scan_type = IIO_ST('s', 14, 16, 0),
661 }, {
662 .type = IIO_ACCEL,
663 .modified = 1,
664 .channel2 = IIO_MOD_X,
665 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
666 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
667 IIO_CHAN_INFO_SCALE_SHARED_BIT |
668 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
669 .address = accel_x,
670 .scan_index = ADIS16400_SCAN_ACC_X,
671 .scan_type = IIO_ST('s', 14, 16, 0),
672 }, {
673 .type = IIO_ACCEL,
674 .modified = 1,
675 .channel2 = IIO_MOD_Y,
676 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
677 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
678 IIO_CHAN_INFO_SCALE_SHARED_BIT |
679 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
680 .address = accel_y,
681 .scan_index = ADIS16400_SCAN_ACC_Y,
682 .scan_type = IIO_ST('s', 14, 16, 0),
683 }, {
684 .type = IIO_ACCEL,
685 .modified = 1,
686 .channel2 = IIO_MOD_Z,
687 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
688 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
689 IIO_CHAN_INFO_SCALE_SHARED_BIT |
690 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
691 .address = accel_z,
692 .scan_index = ADIS16400_SCAN_ACC_Z,
693 .scan_type = IIO_ST('s', 14, 16, 0),
694 }, {
695 .type = IIO_MAGN,
696 .modified = 1,
697 .channel2 = IIO_MOD_X,
698 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
699 IIO_CHAN_INFO_SCALE_SHARED_BIT |
700 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
701 .address = magn_x,
702 .scan_index = ADIS16400_SCAN_MAGN_X,
703 .scan_type = IIO_ST('s', 14, 16, 0),
704 }, {
705 .type = IIO_MAGN,
706 .modified = 1,
707 .channel2 = IIO_MOD_Y,
708 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
709 IIO_CHAN_INFO_SCALE_SHARED_BIT |
710 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
711 .address = magn_y,
712 .scan_index = ADIS16400_SCAN_MAGN_Y,
713 .scan_type = IIO_ST('s', 14, 16, 0),
714 }, {
715 .type = IIO_MAGN,
716 .modified = 1,
717 .channel2 = IIO_MOD_Z,
718 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
719 IIO_CHAN_INFO_SCALE_SHARED_BIT |
720 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
721 .address = magn_z,
722 .scan_index = ADIS16400_SCAN_MAGN_Z,
723 .scan_type = IIO_ST('s', 14, 16, 0),
724 }, {
725 .type = IIO_TEMP,
726 .indexed = 1,
727 .channel = 0,
728 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
729 IIO_CHAN_INFO_OFFSET_SEPARATE_BIT |
730 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
731 .address = temp,
732 .scan_index = ADIS16400_SCAN_TEMP,
733 .scan_type = IIO_ST('s', 12, 16, 0),
734 }, {
735 .type = IIO_VOLTAGE,
736 .indexed = 1,
737 .channel = 1,
738 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
739 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
740 .address = in2,
741 .scan_index = ADIS16400_SCAN_ADC_0,
742 .scan_type = IIO_ST('s', 12, 16, 0),
743 },
744 IIO_CHAN_SOFT_TIMESTAMP(12)
745 };
746
747 static const struct iio_chan_spec adis16350_channels[] = {
748 {
749 .type = IIO_VOLTAGE,
750 .indexed = 1,
751 .channel = 0,
752 .extend_name = "supply",
753 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
754 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
755 .address = in_supply,
756 .scan_index = ADIS16400_SCAN_SUPPLY,
757 .scan_type = IIO_ST('u', 12, 16, 0),
758 }, {
759 .type = IIO_ANGL_VEL,
760 .modified = 1,
761 .channel2 = IIO_MOD_X,
762 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
763 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
764 IIO_CHAN_INFO_SCALE_SHARED_BIT |
765 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
766 .address = gyro_x,
767 .scan_index = ADIS16400_SCAN_GYRO_X,
768 .scan_type = IIO_ST('s', 14, 16, 0),
769 }, {
770 .type = IIO_ANGL_VEL,
771 .modified = 1,
772 .channel2 = IIO_MOD_Y,
773 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
774 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
775 IIO_CHAN_INFO_SCALE_SHARED_BIT |
776 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
777 .address = gyro_y,
778 .scan_index = ADIS16400_SCAN_GYRO_Y,
779 .scan_type = IIO_ST('s', 14, 16, 0),
780 }, {
781 .type = IIO_ANGL_VEL,
782 .modified = 1,
783 .channel2 = IIO_MOD_Z,
784 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
785 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
786 IIO_CHAN_INFO_SCALE_SHARED_BIT |
787 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
788 .address = gyro_z,
789 .scan_index = ADIS16400_SCAN_GYRO_Z,
790 .scan_type = IIO_ST('s', 14, 16, 0),
791 }, {
792 .type = IIO_ACCEL,
793 .modified = 1,
794 .channel2 = IIO_MOD_X,
795 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
796 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
797 IIO_CHAN_INFO_SCALE_SHARED_BIT |
798 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
799 .address = accel_x,
800 .scan_index = ADIS16400_SCAN_ACC_X,
801 .scan_type = IIO_ST('s', 14, 16, 0),
802 }, {
803 .type = IIO_ACCEL,
804 .modified = 1,
805 .channel2 = IIO_MOD_Y,
806 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
807 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
808 IIO_CHAN_INFO_SCALE_SHARED_BIT |
809 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
810 .address = accel_y,
811 .scan_index = ADIS16400_SCAN_ACC_Y,
812 .scan_type = IIO_ST('s', 14, 16, 0),
813 }, {
814 .type = IIO_ACCEL,
815 .modified = 1,
816 .channel2 = IIO_MOD_Z,
817 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
818 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
819 IIO_CHAN_INFO_SCALE_SHARED_BIT |
820 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
821 .address = accel_z,
822 .scan_index = ADIS16400_SCAN_ACC_Z,
823 .scan_type = IIO_ST('s', 14, 16, 0),
824 }, {
825 .type = IIO_TEMP,
826 .indexed = 1,
827 .channel = 0,
828 .extend_name = "x",
829 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
830 IIO_CHAN_INFO_OFFSET_SEPARATE_BIT |
831 IIO_CHAN_INFO_SCALE_SEPARATE_BIT |
832 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
833 .address = temp0,
834 .scan_index = ADIS16350_SCAN_TEMP_X,
835 .scan_type = IIO_ST('s', 12, 16, 0),
836 }, {
837 .type = IIO_TEMP,
838 .indexed = 1,
839 .channel = 1,
840 .extend_name = "y",
841 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
842 IIO_CHAN_INFO_OFFSET_SEPARATE_BIT |
843 IIO_CHAN_INFO_SCALE_SEPARATE_BIT |
844 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
845 .address = temp1,
846 .scan_index = ADIS16350_SCAN_TEMP_Y,
847 .scan_type = IIO_ST('s', 12, 16, 0),
848 }, {
849 .type = IIO_TEMP,
850 .indexed = 1,
851 .channel = 2,
852 .extend_name = "z",
853 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
854 IIO_CHAN_INFO_OFFSET_SEPARATE_BIT |
855 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
856 .address = temp2,
857 .scan_index = ADIS16350_SCAN_TEMP_Z,
858 .scan_type = IIO_ST('s', 12, 16, 0),
859 }, {
860 .type = IIO_VOLTAGE,
861 .indexed = 1,
862 .channel = 1,
863 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
864 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
865 .address = in1,
866 .scan_index = ADIS16350_SCAN_ADC_0,
867 .scan_type = IIO_ST('s', 12, 16, 0),
868 },
869 IIO_CHAN_SOFT_TIMESTAMP(11)
870 };
871
872 static const struct iio_chan_spec adis16300_channels[] = {
873 {
874 .type = IIO_VOLTAGE,
875 .indexed = 1,
876 .channel = 0,
877 .extend_name = "supply",
878 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
879 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
880 .address = in_supply,
881 .scan_index = ADIS16400_SCAN_SUPPLY,
882 .scan_type = IIO_ST('u', 12, 16, 0),
883 }, {
884 .type = IIO_ANGL_VEL,
885 .modified = 1,
886 .channel2 = IIO_MOD_X,
887 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
888 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
889 IIO_CHAN_INFO_SCALE_SHARED_BIT |
890 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
891 .address = gyro_x,
892 .scan_index = ADIS16400_SCAN_GYRO_X,
893 .scan_type = IIO_ST('s', 14, 16, 0),
894 }, {
895 .type = IIO_ACCEL,
896 .modified = 1,
897 .channel2 = IIO_MOD_X,
898 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
899 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
900 IIO_CHAN_INFO_SCALE_SHARED_BIT |
901 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
902 .address = accel_x,
903 .scan_index = ADIS16400_SCAN_ACC_X,
904 .scan_type = IIO_ST('s', 14, 16, 0),
905 }, {
906 .type = IIO_ACCEL,
907 .modified = 1,
908 .channel2 = IIO_MOD_Y,
909 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
910 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
911 IIO_CHAN_INFO_SCALE_SHARED_BIT |
912 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
913 .address = accel_y,
914 .scan_index = ADIS16400_SCAN_ACC_Y,
915 .scan_type = IIO_ST('s', 14, 16, 0),
916 }, {
917 .type = IIO_ACCEL,
918 .modified = 1,
919 .channel2 = IIO_MOD_Z,
920 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
921 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
922 IIO_CHAN_INFO_SCALE_SHARED_BIT |
923 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
924 .address = accel_z,
925 .scan_index = ADIS16400_SCAN_ACC_Z,
926 .scan_type = IIO_ST('s', 14, 16, 0),
927 }, {
928 .type = IIO_TEMP,
929 .indexed = 1,
930 .channel = 0,
931 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
932 IIO_CHAN_INFO_OFFSET_SEPARATE_BIT |
933 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
934 .address = temp0,
935 .scan_index = ADIS16400_SCAN_TEMP,
936 .scan_type = IIO_ST('s', 12, 16, 0),
937 }, {
938 .type = IIO_VOLTAGE,
939 .indexed = 1,
940 .channel = 1,
941 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
942 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
943 .address = in1,
944 .scan_index = ADIS16350_SCAN_ADC_0,
945 .scan_type = IIO_ST('s', 12, 16, 0),
946 }, {
947 .type = IIO_INCLI,
948 .modified = 1,
949 .channel2 = IIO_MOD_X,
950 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
951 IIO_CHAN_INFO_SCALE_SHARED_BIT,
952 .address = incli_x,
953 .scan_index = ADIS16300_SCAN_INCLI_X,
954 .scan_type = IIO_ST('s', 13, 16, 0),
955 }, {
956 .type = IIO_INCLI,
957 .modified = 1,
958 .channel2 = IIO_MOD_Y,
959 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
960 IIO_CHAN_INFO_SCALE_SHARED_BIT,
961 .address = incli_y,
962 .scan_index = ADIS16300_SCAN_INCLI_Y,
963 .scan_type = IIO_ST('s', 13, 16, 0),
964 },
965 IIO_CHAN_SOFT_TIMESTAMP(14)
966 };
967
968 static const struct iio_chan_spec adis16334_channels[] = {
969 {
970 .type = IIO_ANGL_VEL,
971 .modified = 1,
972 .channel2 = IIO_MOD_X,
973 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
974 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
975 IIO_CHAN_INFO_SCALE_SHARED_BIT |
976 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
977 .address = gyro_x,
978 .scan_index = ADIS16400_SCAN_GYRO_X,
979 .scan_type = IIO_ST('s', 14, 16, 0),
980 }, {
981 .type = IIO_ANGL_VEL,
982 .modified = 1,
983 .channel2 = IIO_MOD_Y,
984 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
985 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
986 IIO_CHAN_INFO_SCALE_SHARED_BIT |
987 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
988 .address = gyro_y,
989 .scan_index = ADIS16400_SCAN_GYRO_Y,
990 .scan_type = IIO_ST('s', 14, 16, 0),
991 }, {
992 .type = IIO_ANGL_VEL,
993 .modified = 1,
994 .channel2 = IIO_MOD_Z,
995 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
996 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
997 IIO_CHAN_INFO_SCALE_SHARED_BIT |
998 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
999 .address = gyro_z,
1000 .scan_index = ADIS16400_SCAN_GYRO_Z,
1001 .scan_type = IIO_ST('s', 14, 16, 0),
1002 }, {
1003 .type = IIO_ACCEL,
1004 .modified = 1,
1005 .channel2 = IIO_MOD_X,
1006 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
1007 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
1008 IIO_CHAN_INFO_SCALE_SHARED_BIT |
1009 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
1010 .address = accel_x,
1011 .scan_index = ADIS16400_SCAN_ACC_X,
1012 .scan_type = IIO_ST('s', 14, 16, 0),
1013 }, {
1014 .type = IIO_ACCEL,
1015 .modified = 1,
1016 .channel2 = IIO_MOD_Y,
1017 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
1018 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
1019 IIO_CHAN_INFO_SCALE_SHARED_BIT |
1020 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
1021 .address = accel_y,
1022 .scan_index = ADIS16400_SCAN_ACC_Y,
1023 .scan_type = IIO_ST('s', 14, 16, 0),
1024 }, {
1025 .type = IIO_ACCEL,
1026 .modified = 1,
1027 .channel2 = IIO_MOD_Z,
1028 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
1029 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
1030 IIO_CHAN_INFO_SCALE_SHARED_BIT |
1031 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
1032 .address = accel_z,
1033 .scan_index = ADIS16400_SCAN_ACC_Z,
1034 .scan_type = IIO_ST('s', 14, 16, 0),
1035 }, {
1036 .type = IIO_TEMP,
1037 .indexed = 1,
1038 .channel = 0,
1039 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
1040 IIO_CHAN_INFO_OFFSET_SEPARATE_BIT |
1041 IIO_CHAN_INFO_SCALE_SHARED_BIT,
1042 .address = temp0,
1043 .scan_index = ADIS16400_SCAN_TEMP,
1044 .scan_type = IIO_ST('s', 14, 16, 0),
1045 },
1046 IIO_CHAN_SOFT_TIMESTAMP(12)
1047 };
1048
1049 static struct attribute *adis16400_attributes[] = {
1050 &iio_dev_attr_sampling_frequency.dev_attr.attr,
1051 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
1052 NULL
1053 };
1054
1055 static const struct attribute_group adis16400_attribute_group = {
1056 .attrs = adis16400_attributes,
1057 };
1058
1059 static struct adis16400_chip_info adis16400_chips[] = {
1060 [ADIS16300] = {
1061 .channels = adis16300_channels,
1062 .num_channels = ARRAY_SIZE(adis16300_channels),
1063 .gyro_scale_micro = IIO_DEGREE_TO_RAD(50000), /* 0.05 deg/s */
1064 .accel_scale_micro = 5884,
1065 .temp_scale_nano = 140000000, /* 0.14 C */
1066 .temp_offset = 25000000 / 140000, /* 25 C = 0x00 */
1067 .default_scan_mask = (1 << ADIS16400_SCAN_SUPPLY) |
1068 (1 << ADIS16400_SCAN_GYRO_X) | (1 << ADIS16400_SCAN_ACC_X) |
1069 (1 << ADIS16400_SCAN_ACC_Y) | (1 << ADIS16400_SCAN_ACC_Z) |
1070 (1 << ADIS16400_SCAN_TEMP) | (1 << ADIS16400_SCAN_ADC_0) |
1071 (1 << ADIS16300_SCAN_INCLI_X) | (1 << ADIS16300_SCAN_INCLI_Y) |
1072 (1 << 14),
1073 },
1074 [ADIS16334] = {
1075 .channels = adis16334_channels,
1076 .num_channels = ARRAY_SIZE(adis16334_channels),
1077 .gyro_scale_micro = IIO_DEGREE_TO_RAD(50000), /* 0.05 deg/s */
1078 .accel_scale_micro = IIO_G_TO_M_S_2(1000), /* 1 mg */
1079 .temp_scale_nano = 67850000, /* 0.06785 C */
1080 .temp_offset = 25000000 / 67850, /* 25 C = 0x00 */
1081 .default_scan_mask = (1 << ADIS16400_SCAN_GYRO_X) |
1082 (1 << ADIS16400_SCAN_GYRO_Y) | (1 << ADIS16400_SCAN_GYRO_Z) |
1083 (1 << ADIS16400_SCAN_ACC_X) | (1 << ADIS16400_SCAN_ACC_Y) |
1084 (1 << ADIS16400_SCAN_ACC_Z),
1085 },
1086 [ADIS16350] = {
1087 .channels = adis16350_channels,
1088 .num_channels = ARRAY_SIZE(adis16350_channels),
1089 .gyro_scale_micro = IIO_DEGREE_TO_RAD(73260), /* 0.07326 deg/s */
1090 .accel_scale_micro = IIO_G_TO_M_S_2(2522), /* 0.002522 g */
1091 .temp_scale_nano = 145300000, /* 0.1453 C */
1092 .temp_offset = 25000000 / 145300, /* 25 C = 0x00 */
1093 .default_scan_mask = 0x7FF,
1094 .flags = ADIS16400_NO_BURST,
1095 },
1096 [ADIS16360] = {
1097 .channels = adis16350_channels,
1098 .num_channels = ARRAY_SIZE(adis16350_channels),
1099 .flags = ADIS16400_HAS_PROD_ID,
1100 .product_id = 0x3FE8,
1101 .gyro_scale_micro = IIO_DEGREE_TO_RAD(50000), /* 0.05 deg/s */
1102 .accel_scale_micro = IIO_G_TO_M_S_2(3333), /* 3.333 mg */
1103 .temp_scale_nano = 136000000, /* 0.136 C */
1104 .temp_offset = 25000000 / 136000, /* 25 C = 0x00 */
1105 .default_scan_mask = 0x7FF,
1106 },
1107 [ADIS16362] = {
1108 .channels = adis16350_channels,
1109 .num_channels = ARRAY_SIZE(adis16350_channels),
1110 .flags = ADIS16400_HAS_PROD_ID,
1111 .product_id = 0x3FEA,
1112 .gyro_scale_micro = IIO_DEGREE_TO_RAD(50000), /* 0.05 deg/s */
1113 .accel_scale_micro = IIO_G_TO_M_S_2(333), /* 0.333 mg */
1114 .temp_scale_nano = 136000000, /* 0.136 C */
1115 .temp_offset = 25000000 / 136000, /* 25 C = 0x00 */
1116 .default_scan_mask = 0x7FF,
1117 },
1118 [ADIS16364] = {
1119 .channels = adis16350_channels,
1120 .num_channels = ARRAY_SIZE(adis16350_channels),
1121 .flags = ADIS16400_HAS_PROD_ID,
1122 .product_id = 0x3FEC,
1123 .gyro_scale_micro = IIO_DEGREE_TO_RAD(50000), /* 0.05 deg/s */
1124 .accel_scale_micro = IIO_G_TO_M_S_2(1000), /* 1 mg */
1125 .temp_scale_nano = 136000000, /* 0.136 C */
1126 .temp_offset = 25000000 / 136000, /* 25 C = 0x00 */
1127 .default_scan_mask = 0x7FF,
1128 },
1129 [ADIS16365] = {
1130 .channels = adis16350_channels,
1131 .num_channels = ARRAY_SIZE(adis16350_channels),
1132 .flags = ADIS16400_HAS_PROD_ID,
1133 .product_id = 0x3FED,
1134 .gyro_scale_micro = IIO_DEGREE_TO_RAD(50000), /* 0.05 deg/s */
1135 .accel_scale_micro = IIO_G_TO_M_S_2(1000), /* 1 mg */
1136 .temp_scale_nano = 136000000, /* 0.136 C */
1137 .temp_offset = 25000000 / 136000, /* 25 C = 0x00 */
1138 .default_scan_mask = 0x7FF,
1139 },
1140 [ADIS16400] = {
1141 .channels = adis16400_channels,
1142 .num_channels = ARRAY_SIZE(adis16400_channels),
1143 .flags = ADIS16400_HAS_PROD_ID,
1144 .product_id = 0x4015,
1145 .gyro_scale_micro = IIO_DEGREE_TO_RAD(50000), /* 0.05 deg/s */
1146 .accel_scale_micro = IIO_G_TO_M_S_2(3333), /* 3.333 mg */
1147 .default_scan_mask = 0xFFF,
1148 .temp_scale_nano = 140000000, /* 0.14 C */
1149 .temp_offset = 25000000 / 140000, /* 25 C = 0x00 */
1150 }
1151 };
1152
1153 static const struct iio_info adis16400_info = {
1154 .driver_module = THIS_MODULE,
1155 .read_raw = &adis16400_read_raw,
1156 .write_raw = &adis16400_write_raw,
1157 .attrs = &adis16400_attribute_group,
1158 };
1159
1160 static int __devinit adis16400_probe(struct spi_device *spi)
1161 {
1162 int ret;
1163 struct adis16400_state *st;
1164 struct iio_dev *indio_dev = iio_device_alloc(sizeof(*st));
1165 if (indio_dev == NULL) {
1166 ret = -ENOMEM;
1167 goto error_ret;
1168 }
1169 st = iio_priv(indio_dev);
1170 /* this is only used for removal purposes */
1171 spi_set_drvdata(spi, indio_dev);
1172
1173 st->us = spi;
1174 mutex_init(&st->buf_lock);
1175
1176 /* setup the industrialio driver allocated elements */
1177 st->variant = &adis16400_chips[spi_get_device_id(spi)->driver_data];
1178 indio_dev->dev.parent = &spi->dev;
1179 indio_dev->name = spi_get_device_id(spi)->name;
1180 indio_dev->channels = st->variant->channels;
1181 indio_dev->num_channels = st->variant->num_channels;
1182 indio_dev->info = &adis16400_info;
1183 indio_dev->modes = INDIO_DIRECT_MODE;
1184
1185 ret = adis16400_configure_ring(indio_dev);
1186 if (ret)
1187 goto error_free_dev;
1188
1189 ret = iio_buffer_register(indio_dev,
1190 st->variant->channels,
1191 st->variant->num_channels);
1192 if (ret) {
1193 dev_err(&spi->dev, "failed to initialize the ring\n");
1194 goto error_unreg_ring_funcs;
1195 }
1196
1197 if (spi->irq) {
1198 ret = adis16400_probe_trigger(indio_dev);
1199 if (ret)
1200 goto error_uninitialize_ring;
1201 }
1202
1203 /* Get the device into a sane initial state */
1204 ret = adis16400_initial_setup(indio_dev);
1205 if (ret)
1206 goto error_remove_trigger;
1207 ret = iio_device_register(indio_dev);
1208 if (ret)
1209 goto error_remove_trigger;
1210
1211 return 0;
1212
1213 error_remove_trigger:
1214 if (spi->irq)
1215 adis16400_remove_trigger(indio_dev);
1216 error_uninitialize_ring:
1217 iio_buffer_unregister(indio_dev);
1218 error_unreg_ring_funcs:
1219 adis16400_unconfigure_ring(indio_dev);
1220 error_free_dev:
1221 iio_device_free(indio_dev);
1222 error_ret:
1223 return ret;
1224 }
1225
1226 /* fixme, confirm ordering in this function */
1227 static int __devexit adis16400_remove(struct spi_device *spi)
1228 {
1229 struct iio_dev *indio_dev = spi_get_drvdata(spi);
1230
1231 iio_device_unregister(indio_dev);
1232 adis16400_stop_device(indio_dev);
1233
1234 adis16400_remove_trigger(indio_dev);
1235 iio_buffer_unregister(indio_dev);
1236 adis16400_unconfigure_ring(indio_dev);
1237 iio_device_free(indio_dev);
1238
1239 return 0;
1240 }
1241
1242 static const struct spi_device_id adis16400_id[] = {
1243 {"adis16300", ADIS16300},
1244 {"adis16334", ADIS16334},
1245 {"adis16350", ADIS16350},
1246 {"adis16354", ADIS16350},
1247 {"adis16355", ADIS16350},
1248 {"adis16360", ADIS16360},
1249 {"adis16362", ADIS16362},
1250 {"adis16364", ADIS16364},
1251 {"adis16365", ADIS16365},
1252 {"adis16400", ADIS16400},
1253 {"adis16405", ADIS16400},
1254 {}
1255 };
1256 MODULE_DEVICE_TABLE(spi, adis16400_id);
1257
1258 static struct spi_driver adis16400_driver = {
1259 .driver = {
1260 .name = "adis16400",
1261 .owner = THIS_MODULE,
1262 },
1263 .id_table = adis16400_id,
1264 .probe = adis16400_probe,
1265 .remove = __devexit_p(adis16400_remove),
1266 };
1267 module_spi_driver(adis16400_driver);
1268
1269 MODULE_AUTHOR("Manuel Stahl <manuel.stahl@iis.fraunhofer.de>");
1270 MODULE_DESCRIPTION("Analog Devices ADIS16400/5 IMU SPI driver");
1271 MODULE_LICENSE("GPL v2");
Linux kernel - Deliverables
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