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Merge branch 'for-airlied' of git://people.freedesktop.org/~danvet/drm-intel into...
[deliverable/linux.git] / drivers / staging / iio / imu / adis16400_core.c
1 /*
2 * adis16400.c support Analog Devices ADIS16400/5
3 * 3d 2g Linear Accelerometers,
4 * 3d Gyroscopes,
5 * 3d Magnetometers via SPI
6 *
7 * Copyright (c) 2009 Manuel Stahl <manuel.stahl@iis.fraunhofer.de>
8 * Copyright (c) 2007 Jonathan Cameron <jic23@cam.ac.uk>
9 * Copyright (c) 2011 Analog Devices Inc.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 *
15 */
16
17 #include <linux/interrupt.h>
18 #include <linux/irq.h>
19 #include <linux/delay.h>
20 #include <linux/mutex.h>
21 #include <linux/device.h>
22 #include <linux/kernel.h>
23 #include <linux/spi/spi.h>
24 #include <linux/slab.h>
25 #include <linux/sysfs.h>
26 #include <linux/list.h>
27 #include <linux/module.h>
28
29 #include <linux/iio/iio.h>
30 #include <linux/iio/sysfs.h>
31 #include <linux/iio/buffer.h>
32 #include "adis16400.h"
33
34 enum adis16400_chip_variant {
35 ADIS16300,
36 ADIS16334,
37 ADIS16350,
38 ADIS16360,
39 ADIS16362,
40 ADIS16364,
41 ADIS16365,
42 ADIS16400,
43 };
44
45 /**
46 * adis16400_spi_write_reg_8() - write single byte to a register
47 * @dev: device associated with child of actual device (iio_dev or iio_trig)
48 * @reg_address: the address of the register to be written
49 * @val: the value to write
50 */
51 static int adis16400_spi_write_reg_8(struct iio_dev *indio_dev,
52 u8 reg_address,
53 u8 val)
54 {
55 int ret;
56 struct adis16400_state *st = iio_priv(indio_dev);
57
58 mutex_lock(&st->buf_lock);
59 st->tx[0] = ADIS16400_WRITE_REG(reg_address);
60 st->tx[1] = val;
61
62 ret = spi_write(st->us, st->tx, 2);
63 mutex_unlock(&st->buf_lock);
64
65 return ret;
66 }
67
68 /**
69 * adis16400_spi_write_reg_16() - write 2 bytes to a pair of registers
70 * @dev: device associated with child of actual device (iio_dev or iio_trig)
71 * @reg_address: the address of the lower of the two registers. Second register
72 * is assumed to have address one greater.
73 * @val: value to be written
74 *
75 * At the moment the spi framework doesn't allow global setting of cs_change.
76 * This means that use cannot be made of spi_write.
77 */
78 static int adis16400_spi_write_reg_16(struct iio_dev *indio_dev,
79 u8 lower_reg_address,
80 u16 value)
81 {
82 int ret;
83 struct spi_message msg;
84 struct adis16400_state *st = iio_priv(indio_dev);
85 struct spi_transfer xfers[] = {
86 {
87 .tx_buf = st->tx,
88 .bits_per_word = 8,
89 .len = 2,
90 .cs_change = 1,
91 }, {
92 .tx_buf = st->tx + 2,
93 .bits_per_word = 8,
94 .len = 2,
95 },
96 };
97
98 mutex_lock(&st->buf_lock);
99 st->tx[0] = ADIS16400_WRITE_REG(lower_reg_address);
100 st->tx[1] = value & 0xFF;
101 st->tx[2] = ADIS16400_WRITE_REG(lower_reg_address + 1);
102 st->tx[3] = (value >> 8) & 0xFF;
103
104 spi_message_init(&msg);
105 spi_message_add_tail(&xfers[0], &msg);
106 spi_message_add_tail(&xfers[1], &msg);
107 ret = spi_sync(st->us, &msg);
108 mutex_unlock(&st->buf_lock);
109
110 return ret;
111 }
112
113 /**
114 * adis16400_spi_read_reg_16() - read 2 bytes from a 16-bit register
115 * @indio_dev: iio device
116 * @reg_address: the address of the lower of the two registers. Second register
117 * is assumed to have address one greater.
118 * @val: somewhere to pass back the value read
119 *
120 * At the moment the spi framework doesn't allow global setting of cs_change.
121 * This means that use cannot be made of spi_read.
122 **/
123 static int adis16400_spi_read_reg_16(struct iio_dev *indio_dev,
124 u8 lower_reg_address,
125 u16 *val)
126 {
127 struct spi_message msg;
128 struct adis16400_state *st = iio_priv(indio_dev);
129 int ret;
130 struct spi_transfer xfers[] = {
131 {
132 .tx_buf = st->tx,
133 .bits_per_word = 8,
134 .len = 2,
135 .cs_change = 1,
136 }, {
137 .rx_buf = st->rx,
138 .bits_per_word = 8,
139 .len = 2,
140 },
141 };
142
143 mutex_lock(&st->buf_lock);
144 st->tx[0] = ADIS16400_READ_REG(lower_reg_address);
145 st->tx[1] = 0;
146
147 spi_message_init(&msg);
148 spi_message_add_tail(&xfers[0], &msg);
149 spi_message_add_tail(&xfers[1], &msg);
150 ret = spi_sync(st->us, &msg);
151 if (ret) {
152 dev_err(&st->us->dev,
153 "problem when reading 16 bit register 0x%02X",
154 lower_reg_address);
155 goto error_ret;
156 }
157 *val = (st->rx[0] << 8) | st->rx[1];
158
159 error_ret:
160 mutex_unlock(&st->buf_lock);
161 return ret;
162 }
163
164 static int adis16400_get_freq(struct iio_dev *indio_dev)
165 {
166 u16 t;
167 int sps, ret;
168
169 ret = adis16400_spi_read_reg_16(indio_dev, ADIS16400_SMPL_PRD, &t);
170 if (ret < 0)
171 return ret;
172 sps = (t & ADIS16400_SMPL_PRD_TIME_BASE) ? 53 : 1638;
173 sps /= (t & ADIS16400_SMPL_PRD_DIV_MASK) + 1;
174
175 return sps;
176 }
177
178 static ssize_t adis16400_read_frequency(struct device *dev,
179 struct device_attribute *attr,
180 char *buf)
181 {
182 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
183 int ret, len = 0;
184 ret = adis16400_get_freq(indio_dev);
185 if (ret < 0)
186 return ret;
187 len = sprintf(buf, "%d SPS\n", ret);
188 return len;
189 }
190
191 static const unsigned adis16400_3db_divisors[] = {
192 [0] = 2, /* Special case */
193 [1] = 5,
194 [2] = 10,
195 [3] = 50,
196 [4] = 200,
197 };
198
199 static int adis16400_set_filter(struct iio_dev *indio_dev, int sps, int val)
200 {
201 int i, ret;
202 u16 val16;
203 for (i = ARRAY_SIZE(adis16400_3db_divisors) - 1; i >= 0; i--)
204 if (sps/adis16400_3db_divisors[i] > val)
205 break;
206 if (i == -1)
207 ret = -EINVAL;
208 else {
209 ret = adis16400_spi_read_reg_16(indio_dev,
210 ADIS16400_SENS_AVG,
211 &val16);
212 if (ret < 0)
213 goto error_ret;
214
215 ret = adis16400_spi_write_reg_16(indio_dev,
216 ADIS16400_SENS_AVG,
217 (val16 & ~0x03) | i);
218 }
219 error_ret:
220 return ret;
221 }
222
223 static ssize_t adis16400_write_frequency(struct device *dev,
224 struct device_attribute *attr,
225 const char *buf,
226 size_t len)
227 {
228 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
229 struct adis16400_state *st = iio_priv(indio_dev);
230 long val;
231 int ret;
232 u8 t;
233
234 ret = strict_strtol(buf, 10, &val);
235 if (ret)
236 return ret;
237 if (val == 0)
238 return -EINVAL;
239
240 mutex_lock(&indio_dev->mlock);
241
242 t = (1638 / val);
243 if (t > 0)
244 t--;
245 t &= ADIS16400_SMPL_PRD_DIV_MASK;
246 if ((t & ADIS16400_SMPL_PRD_DIV_MASK) >= 0x0A)
247 st->us->max_speed_hz = ADIS16400_SPI_SLOW;
248 else
249 st->us->max_speed_hz = ADIS16400_SPI_FAST;
250
251 ret = adis16400_spi_write_reg_8(indio_dev,
252 ADIS16400_SMPL_PRD,
253 t);
254
255 /* Also update the filter */
256 mutex_unlock(&indio_dev->mlock);
257
258 return ret ? ret : len;
259 }
260
261 static int adis16400_reset(struct iio_dev *indio_dev)
262 {
263 int ret;
264 ret = adis16400_spi_write_reg_8(indio_dev,
265 ADIS16400_GLOB_CMD,
266 ADIS16400_GLOB_CMD_SW_RESET);
267 if (ret)
268 dev_err(&indio_dev->dev, "problem resetting device");
269
270 return ret;
271 }
272
273 int adis16400_set_irq(struct iio_dev *indio_dev, bool enable)
274 {
275 int ret;
276 u16 msc;
277
278 ret = adis16400_spi_read_reg_16(indio_dev, ADIS16400_MSC_CTRL, &msc);
279 if (ret)
280 goto error_ret;
281
282 msc |= ADIS16400_MSC_CTRL_DATA_RDY_POL_HIGH;
283 if (enable)
284 msc |= ADIS16400_MSC_CTRL_DATA_RDY_EN;
285 else
286 msc &= ~ADIS16400_MSC_CTRL_DATA_RDY_EN;
287
288 ret = adis16400_spi_write_reg_16(indio_dev, ADIS16400_MSC_CTRL, msc);
289 if (ret)
290 goto error_ret;
291
292 error_ret:
293 return ret;
294 }
295
296 /* Power down the device */
297 static int adis16400_stop_device(struct iio_dev *indio_dev)
298 {
299 int ret;
300 u16 val = ADIS16400_SLP_CNT_POWER_OFF;
301
302 ret = adis16400_spi_write_reg_16(indio_dev, ADIS16400_SLP_CNT, val);
303 if (ret)
304 dev_err(&indio_dev->dev,
305 "problem with turning device off: SLP_CNT");
306
307 return ret;
308 }
309
310 static int adis16400_check_status(struct iio_dev *indio_dev)
311 {
312 u16 status;
313 int ret;
314 struct device *dev = &indio_dev->dev;
315
316 ret = adis16400_spi_read_reg_16(indio_dev,
317 ADIS16400_DIAG_STAT, &status);
318
319 if (ret < 0) {
320 dev_err(dev, "Reading status failed\n");
321 goto error_ret;
322 }
323 ret = status;
324 if (status & ADIS16400_DIAG_STAT_ZACCL_FAIL)
325 dev_err(dev, "Z-axis accelerometer self-test failure\n");
326 if (status & ADIS16400_DIAG_STAT_YACCL_FAIL)
327 dev_err(dev, "Y-axis accelerometer self-test failure\n");
328 if (status & ADIS16400_DIAG_STAT_XACCL_FAIL)
329 dev_err(dev, "X-axis accelerometer self-test failure\n");
330 if (status & ADIS16400_DIAG_STAT_XGYRO_FAIL)
331 dev_err(dev, "X-axis gyroscope self-test failure\n");
332 if (status & ADIS16400_DIAG_STAT_YGYRO_FAIL)
333 dev_err(dev, "Y-axis gyroscope self-test failure\n");
334 if (status & ADIS16400_DIAG_STAT_ZGYRO_FAIL)
335 dev_err(dev, "Z-axis gyroscope self-test failure\n");
336 if (status & ADIS16400_DIAG_STAT_ALARM2)
337 dev_err(dev, "Alarm 2 active\n");
338 if (status & ADIS16400_DIAG_STAT_ALARM1)
339 dev_err(dev, "Alarm 1 active\n");
340 if (status & ADIS16400_DIAG_STAT_FLASH_CHK)
341 dev_err(dev, "Flash checksum error\n");
342 if (status & ADIS16400_DIAG_STAT_SELF_TEST)
343 dev_err(dev, "Self test error\n");
344 if (status & ADIS16400_DIAG_STAT_OVERFLOW)
345 dev_err(dev, "Sensor overrange\n");
346 if (status & ADIS16400_DIAG_STAT_SPI_FAIL)
347 dev_err(dev, "SPI failure\n");
348 if (status & ADIS16400_DIAG_STAT_FLASH_UPT)
349 dev_err(dev, "Flash update failed\n");
350 if (status & ADIS16400_DIAG_STAT_POWER_HIGH)
351 dev_err(dev, "Power supply above 5.25V\n");
352 if (status & ADIS16400_DIAG_STAT_POWER_LOW)
353 dev_err(dev, "Power supply below 4.75V\n");
354
355 error_ret:
356 return ret;
357 }
358
359 static int adis16400_self_test(struct iio_dev *indio_dev)
360 {
361 int ret;
362 ret = adis16400_spi_write_reg_16(indio_dev,
363 ADIS16400_MSC_CTRL,
364 ADIS16400_MSC_CTRL_MEM_TEST);
365 if (ret) {
366 dev_err(&indio_dev->dev, "problem starting self test");
367 goto err_ret;
368 }
369
370 msleep(ADIS16400_MTEST_DELAY);
371 adis16400_check_status(indio_dev);
372
373 err_ret:
374 return ret;
375 }
376
377 static int adis16400_initial_setup(struct iio_dev *indio_dev)
378 {
379 int ret;
380 u16 prod_id, smp_prd;
381 struct adis16400_state *st = iio_priv(indio_dev);
382
383 /* use low spi speed for init */
384 st->us->max_speed_hz = ADIS16400_SPI_SLOW;
385 st->us->mode = SPI_MODE_3;
386 spi_setup(st->us);
387
388 ret = adis16400_set_irq(indio_dev, false);
389 if (ret) {
390 dev_err(&indio_dev->dev, "disable irq failed");
391 goto err_ret;
392 }
393
394 ret = adis16400_self_test(indio_dev);
395 if (ret) {
396 dev_err(&indio_dev->dev, "self test failure");
397 goto err_ret;
398 }
399
400 ret = adis16400_check_status(indio_dev);
401 if (ret) {
402 adis16400_reset(indio_dev);
403 dev_err(&indio_dev->dev, "device not playing ball -> reset");
404 msleep(ADIS16400_STARTUP_DELAY);
405 ret = adis16400_check_status(indio_dev);
406 if (ret) {
407 dev_err(&indio_dev->dev, "giving up");
408 goto err_ret;
409 }
410 }
411 if (st->variant->flags & ADIS16400_HAS_PROD_ID) {
412 ret = adis16400_spi_read_reg_16(indio_dev,
413 ADIS16400_PRODUCT_ID, &prod_id);
414 if (ret)
415 goto err_ret;
416
417 if ((prod_id & 0xF000) != st->variant->product_id)
418 dev_warn(&indio_dev->dev, "incorrect id");
419
420 dev_info(&indio_dev->dev, "%s: prod_id 0x%04x at CS%d (irq %d)\n",
421 indio_dev->name, prod_id,
422 st->us->chip_select, st->us->irq);
423 }
424 /* use high spi speed if possible */
425 ret = adis16400_spi_read_reg_16(indio_dev,
426 ADIS16400_SMPL_PRD, &smp_prd);
427 if (!ret && (smp_prd & ADIS16400_SMPL_PRD_DIV_MASK) < 0x0A) {
428 st->us->max_speed_hz = ADIS16400_SPI_SLOW;
429 spi_setup(st->us);
430 }
431
432 err_ret:
433 return ret;
434 }
435
436 static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
437 adis16400_read_frequency,
438 adis16400_write_frequency);
439
440 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("409 546 819 1638");
441
442 enum adis16400_chan {
443 in_supply,
444 gyro_x,
445 gyro_y,
446 gyro_z,
447 accel_x,
448 accel_y,
449 accel_z,
450 magn_x,
451 magn_y,
452 magn_z,
453 temp,
454 temp0, temp1, temp2,
455 in1,
456 in2,
457 incli_x,
458 incli_y,
459 };
460
461 static u8 adis16400_addresses[18][2] = {
462 [in_supply] = { ADIS16400_SUPPLY_OUT },
463 [gyro_x] = { ADIS16400_XGYRO_OUT, ADIS16400_XGYRO_OFF },
464 [gyro_y] = { ADIS16400_YGYRO_OUT, ADIS16400_YGYRO_OFF },
465 [gyro_z] = { ADIS16400_ZGYRO_OUT, ADIS16400_ZGYRO_OFF },
466 [accel_x] = { ADIS16400_XACCL_OUT, ADIS16400_XACCL_OFF },
467 [accel_y] = { ADIS16400_YACCL_OUT, ADIS16400_YACCL_OFF },
468 [accel_z] = { ADIS16400_ZACCL_OUT, ADIS16400_ZACCL_OFF },
469 [magn_x] = { ADIS16400_XMAGN_OUT },
470 [magn_y] = { ADIS16400_YMAGN_OUT },
471 [magn_z] = { ADIS16400_ZMAGN_OUT },
472 [temp] = { ADIS16400_TEMP_OUT },
473 [temp0] = { ADIS16350_XTEMP_OUT },
474 [temp1] = { ADIS16350_YTEMP_OUT },
475 [temp2] = { ADIS16350_ZTEMP_OUT },
476 [in1] = { ADIS16300_AUX_ADC },
477 [in2] = { ADIS16400_AUX_ADC },
478 [incli_x] = { ADIS16300_PITCH_OUT },
479 [incli_y] = { ADIS16300_ROLL_OUT }
480 };
481
482
483 static int adis16400_write_raw(struct iio_dev *indio_dev,
484 struct iio_chan_spec const *chan,
485 int val,
486 int val2,
487 long mask)
488 {
489 struct adis16400_state *st = iio_priv(indio_dev);
490 int ret, sps;
491
492 switch (mask) {
493 case IIO_CHAN_INFO_CALIBBIAS:
494 mutex_lock(&indio_dev->mlock);
495 ret = adis16400_spi_write_reg_16(indio_dev,
496 adis16400_addresses[chan->address][1],
497 val);
498 mutex_unlock(&indio_dev->mlock);
499 return ret;
500 case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
501 /* Need to cache values so we can update if the frequency
502 changes */
503 mutex_lock(&indio_dev->mlock);
504 st->filt_int = val;
505 /* Work out update to current value */
506 sps = adis16400_get_freq(indio_dev);
507 if (sps < 0) {
508 mutex_unlock(&indio_dev->mlock);
509 return sps;
510 }
511
512 ret = adis16400_set_filter(indio_dev, sps, val);
513 mutex_unlock(&indio_dev->mlock);
514 return ret;
515 default:
516 return -EINVAL;
517 }
518 }
519
520 static int adis16400_read_raw(struct iio_dev *indio_dev,
521 struct iio_chan_spec const *chan,
522 int *val,
523 int *val2,
524 long mask)
525 {
526 struct adis16400_state *st = iio_priv(indio_dev);
527 int ret, shift;
528 s16 val16;
529
530 switch (mask) {
531 case IIO_CHAN_INFO_RAW:
532 mutex_lock(&indio_dev->mlock);
533 ret = adis16400_spi_read_reg_16(indio_dev,
534 adis16400_addresses[chan->address][0],
535 &val16);
536 if (ret) {
537 mutex_unlock(&indio_dev->mlock);
538 return ret;
539 }
540 val16 &= (1 << chan->scan_type.realbits) - 1;
541 if (chan->scan_type.sign == 's') {
542 shift = 16 - chan->scan_type.realbits;
543 val16 = (s16)(val16 << shift) >> shift;
544 }
545 *val = val16;
546 mutex_unlock(&indio_dev->mlock);
547 return IIO_VAL_INT;
548 case IIO_CHAN_INFO_SCALE:
549 switch (chan->type) {
550 case IIO_ANGL_VEL:
551 *val = 0;
552 *val2 = st->variant->gyro_scale_micro;
553 return IIO_VAL_INT_PLUS_MICRO;
554 case IIO_VOLTAGE:
555 *val = 0;
556 if (chan->channel == 0)
557 *val2 = 2418;
558 else
559 *val2 = 806;
560 return IIO_VAL_INT_PLUS_MICRO;
561 case IIO_ACCEL:
562 *val = 0;
563 *val2 = st->variant->accel_scale_micro;
564 return IIO_VAL_INT_PLUS_MICRO;
565 case IIO_MAGN:
566 *val = 0;
567 *val2 = 500;
568 return IIO_VAL_INT_PLUS_MICRO;
569 case IIO_TEMP:
570 *val = 0;
571 *val2 = 140000;
572 return IIO_VAL_INT_PLUS_MICRO;
573 default:
574 return -EINVAL;
575 }
576 case IIO_CHAN_INFO_CALIBBIAS:
577 mutex_lock(&indio_dev->mlock);
578 ret = adis16400_spi_read_reg_16(indio_dev,
579 adis16400_addresses[chan->address][1],
580 &val16);
581 mutex_unlock(&indio_dev->mlock);
582 if (ret)
583 return ret;
584 val16 = ((val16 & 0xFFF) << 4) >> 4;
585 *val = val16;
586 return IIO_VAL_INT;
587 case IIO_CHAN_INFO_OFFSET:
588 /* currently only temperature */
589 *val = 198;
590 *val2 = 160000;
591 return IIO_VAL_INT_PLUS_MICRO;
592 case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
593 mutex_lock(&indio_dev->mlock);
594 /* Need both the number of taps and the sampling frequency */
595 ret = adis16400_spi_read_reg_16(indio_dev,
596 ADIS16400_SENS_AVG,
597 &val16);
598 if (ret < 0) {
599 mutex_unlock(&indio_dev->mlock);
600 return ret;
601 }
602 ret = adis16400_get_freq(indio_dev);
603 if (ret > 0)
604 *val = ret/adis16400_3db_divisors[val16 & 0x03];
605 *val2 = 0;
606 mutex_unlock(&indio_dev->mlock);
607 if (ret < 0)
608 return ret;
609 return IIO_VAL_INT_PLUS_MICRO;
610 default:
611 return -EINVAL;
612 }
613 }
614
615 static struct iio_chan_spec adis16400_channels[] = {
616 {
617 .type = IIO_VOLTAGE,
618 .indexed = 1,
619 .channel = 0,
620 .extend_name = "supply",
621 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
622 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
623 .address = in_supply,
624 .scan_index = ADIS16400_SCAN_SUPPLY,
625 .scan_type = IIO_ST('u', 14, 16, 0)
626 }, {
627 .type = IIO_ANGL_VEL,
628 .modified = 1,
629 .channel2 = IIO_MOD_X,
630 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
631 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
632 IIO_CHAN_INFO_SCALE_SHARED_BIT |
633 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
634 .address = gyro_x,
635 .scan_index = ADIS16400_SCAN_GYRO_X,
636 .scan_type = IIO_ST('s', 14, 16, 0)
637 }, {
638 .type = IIO_ANGL_VEL,
639 .modified = 1,
640 .channel2 = IIO_MOD_Y,
641 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
642 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
643 IIO_CHAN_INFO_SCALE_SHARED_BIT |
644 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
645 .address = gyro_y,
646 .scan_index = ADIS16400_SCAN_GYRO_Y,
647 .scan_type = IIO_ST('s', 14, 16, 0),
648 }, {
649 .type = IIO_ANGL_VEL,
650 .modified = 1,
651 .channel2 = IIO_MOD_Z,
652 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
653 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
654 IIO_CHAN_INFO_SCALE_SHARED_BIT |
655 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
656 .address = gyro_z,
657 .scan_index = ADIS16400_SCAN_GYRO_Z,
658 .scan_type = IIO_ST('s', 14, 16, 0),
659 }, {
660 .type = IIO_ACCEL,
661 .modified = 1,
662 .channel2 = IIO_MOD_X,
663 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
664 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
665 IIO_CHAN_INFO_SCALE_SHARED_BIT |
666 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
667 .address = accel_x,
668 .scan_index = ADIS16400_SCAN_ACC_X,
669 .scan_type = IIO_ST('s', 14, 16, 0),
670 }, {
671 .type = IIO_ACCEL,
672 .modified = 1,
673 .channel2 = IIO_MOD_Y,
674 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
675 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
676 IIO_CHAN_INFO_SCALE_SHARED_BIT |
677 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
678 .address = accel_y,
679 .scan_index = ADIS16400_SCAN_ACC_Y,
680 .scan_type = IIO_ST('s', 14, 16, 0),
681 }, {
682 .type = IIO_ACCEL,
683 .modified = 1,
684 .channel2 = IIO_MOD_Z,
685 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
686 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
687 IIO_CHAN_INFO_SCALE_SHARED_BIT |
688 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
689 .address = accel_z,
690 .scan_index = ADIS16400_SCAN_ACC_Z,
691 .scan_type = IIO_ST('s', 14, 16, 0),
692 }, {
693 .type = IIO_MAGN,
694 .modified = 1,
695 .channel2 = IIO_MOD_X,
696 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
697 IIO_CHAN_INFO_SCALE_SHARED_BIT |
698 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
699 .address = magn_x,
700 .scan_index = ADIS16400_SCAN_MAGN_X,
701 .scan_type = IIO_ST('s', 14, 16, 0),
702 }, {
703 .type = IIO_MAGN,
704 .modified = 1,
705 .channel2 = IIO_MOD_Y,
706 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
707 IIO_CHAN_INFO_SCALE_SHARED_BIT |
708 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
709 .address = magn_y,
710 .scan_index = ADIS16400_SCAN_MAGN_Y,
711 .scan_type = IIO_ST('s', 14, 16, 0),
712 }, {
713 .type = IIO_MAGN,
714 .modified = 1,
715 .channel2 = IIO_MOD_Z,
716 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
717 IIO_CHAN_INFO_SCALE_SHARED_BIT |
718 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
719 .address = magn_z,
720 .scan_index = ADIS16400_SCAN_MAGN_Z,
721 .scan_type = IIO_ST('s', 14, 16, 0),
722 }, {
723 .type = IIO_TEMP,
724 .indexed = 1,
725 .channel = 0,
726 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
727 IIO_CHAN_INFO_OFFSET_SEPARATE_BIT |
728 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
729 .address = temp,
730 .scan_index = ADIS16400_SCAN_TEMP,
731 .scan_type = IIO_ST('s', 12, 16, 0),
732 }, {
733 .type = IIO_VOLTAGE,
734 .indexed = 1,
735 .channel = 1,
736 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
737 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
738 .address = in2,
739 .scan_index = ADIS16400_SCAN_ADC_0,
740 .scan_type = IIO_ST('s', 12, 16, 0),
741 },
742 IIO_CHAN_SOFT_TIMESTAMP(12)
743 };
744
745 static struct iio_chan_spec adis16350_channels[] = {
746 {
747 .type = IIO_VOLTAGE,
748 .indexed = 1,
749 .channel = 0,
750 .extend_name = "supply",
751 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
752 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
753 .address = in_supply,
754 .scan_index = ADIS16400_SCAN_SUPPLY,
755 .scan_type = IIO_ST('u', 12, 16, 0)
756 }, {
757 .type = IIO_ANGL_VEL,
758 .modified = 1,
759 .channel2 = IIO_MOD_X,
760 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
761 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
762 IIO_CHAN_INFO_SCALE_SHARED_BIT |
763 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
764 .address = gyro_x,
765 .scan_index = ADIS16400_SCAN_GYRO_X,
766 .scan_type = IIO_ST('s', 14, 16, 0)
767 }, {
768 .type = IIO_ANGL_VEL,
769 .modified = 1,
770 .channel2 = IIO_MOD_Y,
771 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
772 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
773 IIO_CHAN_INFO_SCALE_SHARED_BIT |
774 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
775 .address = gyro_y,
776 .scan_index = ADIS16400_SCAN_GYRO_Y,
777 .scan_type = IIO_ST('s', 14, 16, 0),
778 }, {
779 .type = IIO_ANGL_VEL,
780 .modified = 1,
781 .channel2 = IIO_MOD_Z,
782 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
783 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
784 IIO_CHAN_INFO_SCALE_SHARED_BIT |
785 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
786 .address = gyro_z,
787 .scan_index = ADIS16400_SCAN_GYRO_Z,
788 .scan_type = IIO_ST('s', 14, 16, 0),
789 }, {
790 .type = IIO_ACCEL,
791 .modified = 1,
792 .channel2 = IIO_MOD_X,
793 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
794 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
795 IIO_CHAN_INFO_SCALE_SHARED_BIT |
796 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
797 .address = accel_x,
798 .scan_index = ADIS16400_SCAN_ACC_X,
799 .scan_type = IIO_ST('s', 14, 16, 0),
800 }, {
801 .type = IIO_ACCEL,
802 .modified = 1,
803 .channel2 = IIO_MOD_Y,
804 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
805 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
806 IIO_CHAN_INFO_SCALE_SHARED_BIT |
807 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
808 .address = accel_y,
809 .scan_index = ADIS16400_SCAN_ACC_Y,
810 .scan_type = IIO_ST('s', 14, 16, 0),
811 }, {
812 .type = IIO_ACCEL,
813 .modified = 1,
814 .channel2 = IIO_MOD_Z,
815 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
816 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
817 IIO_CHAN_INFO_SCALE_SHARED_BIT |
818 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
819 .address = accel_z,
820 .scan_index = ADIS16400_SCAN_ACC_Z,
821 .scan_type = IIO_ST('s', 14, 16, 0),
822 }, {
823 .type = IIO_TEMP,
824 .indexed = 1,
825 .channel = 0,
826 .extend_name = "x",
827 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
828 IIO_CHAN_INFO_OFFSET_SEPARATE_BIT |
829 IIO_CHAN_INFO_SCALE_SEPARATE_BIT |
830 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
831 .address = temp0,
832 .scan_index = ADIS16350_SCAN_TEMP_X,
833 .scan_type = IIO_ST('s', 12, 16, 0),
834 }, {
835 .type = IIO_TEMP,
836 .indexed = 1,
837 .channel = 1,
838 .extend_name = "y",
839 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
840 IIO_CHAN_INFO_OFFSET_SEPARATE_BIT |
841 IIO_CHAN_INFO_SCALE_SEPARATE_BIT |
842 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
843 .address = temp1,
844 .scan_index = ADIS16350_SCAN_TEMP_Y,
845 .scan_type = IIO_ST('s', 12, 16, 0),
846 }, {
847 .type = IIO_TEMP,
848 .indexed = 1,
849 .channel = 2,
850 .extend_name = "z",
851 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
852 IIO_CHAN_INFO_OFFSET_SEPARATE_BIT |
853 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
854 .address = temp2,
855 .scan_index = ADIS16350_SCAN_TEMP_Z,
856 .scan_type = IIO_ST('s', 12, 16, 0),
857 }, {
858 .type = IIO_VOLTAGE,
859 .indexed = 1,
860 .channel = 1,
861 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
862 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
863 .address = in1,
864 .scan_index = ADIS16350_SCAN_ADC_0,
865 .scan_type = IIO_ST('s', 12, 16, 0),
866 },
867 IIO_CHAN_SOFT_TIMESTAMP(11)
868 };
869
870 static struct iio_chan_spec adis16300_channels[] = {
871 {
872 .type = IIO_VOLTAGE,
873 .indexed = 1,
874 .channel = 0,
875 .extend_name = "supply",
876 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
877 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
878 .address = in_supply,
879 .scan_index = ADIS16400_SCAN_SUPPLY,
880 .scan_type = IIO_ST('u', 12, 16, 0)
881 }, {
882 .type = IIO_ANGL_VEL,
883 .modified = 1,
884 .channel2 = IIO_MOD_X,
885 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
886 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
887 IIO_CHAN_INFO_SCALE_SHARED_BIT |
888 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
889 .address = gyro_x,
890 .scan_index = ADIS16400_SCAN_GYRO_X,
891 .scan_type = IIO_ST('s', 14, 16, 0),
892 }, {
893 .type = IIO_ACCEL,
894 .modified = 1,
895 .channel2 = IIO_MOD_X,
896 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
897 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
898 IIO_CHAN_INFO_SCALE_SHARED_BIT |
899 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
900 .address = accel_x,
901 .scan_index = ADIS16400_SCAN_ACC_X,
902 .scan_type = IIO_ST('s', 14, 16, 0),
903 }, {
904 .type = IIO_ACCEL,
905 .modified = 1,
906 .channel2 = IIO_MOD_Y,
907 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
908 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
909 IIO_CHAN_INFO_SCALE_SHARED_BIT |
910 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
911 .address = accel_y,
912 .scan_index = ADIS16400_SCAN_ACC_Y,
913 .scan_type = IIO_ST('s', 14, 16, 0),
914 }, {
915 .type = IIO_ACCEL,
916 .modified = 1,
917 .channel2 = IIO_MOD_Z,
918 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
919 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
920 IIO_CHAN_INFO_SCALE_SHARED_BIT |
921 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
922 .address = accel_z,
923 .scan_index = ADIS16400_SCAN_ACC_Z,
924 .scan_type = IIO_ST('s', 14, 16, 0),
925 }, {
926 .type = IIO_TEMP,
927 .indexed = 1,
928 .channel = 0,
929 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
930 IIO_CHAN_INFO_OFFSET_SEPARATE_BIT |
931 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
932 .address = temp0,
933 .scan_index = ADIS16400_SCAN_TEMP,
934 .scan_type = IIO_ST('s', 12, 16, 0),
935 }, {
936 .type = IIO_VOLTAGE,
937 .indexed = 1,
938 .channel = 1,
939 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
940 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
941 .address = in1,
942 .scan_index = ADIS16350_SCAN_ADC_0,
943 .scan_type = IIO_ST('s', 12, 16, 0),
944 }, {
945 .type = IIO_INCLI,
946 .modified = 1,
947 .channel2 = IIO_MOD_X,
948 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
949 IIO_CHAN_INFO_SCALE_SHARED_BIT,
950 .address = incli_x,
951 .scan_index = ADIS16300_SCAN_INCLI_X,
952 .scan_type = IIO_ST('s', 13, 16, 0),
953 }, {
954 .type = IIO_INCLI,
955 .modified = 1,
956 .channel2 = IIO_MOD_Y,
957 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
958 IIO_CHAN_INFO_SCALE_SHARED_BIT,
959 .address = incli_y,
960 .scan_index = ADIS16300_SCAN_INCLI_Y,
961 .scan_type = IIO_ST('s', 13, 16, 0),
962 },
963 IIO_CHAN_SOFT_TIMESTAMP(14)
964 };
965
966 static const struct iio_chan_spec adis16334_channels[] = {
967 {
968 .type = IIO_ANGL_VEL,
969 .modified = 1,
970 .channel2 = IIO_MOD_X,
971 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
972 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
973 IIO_CHAN_INFO_SCALE_SHARED_BIT |
974 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
975 .address = gyro_x,
976 .scan_index = ADIS16400_SCAN_GYRO_X,
977 .scan_type = IIO_ST('s', 14, 16, 0),
978 }, {
979 .type = IIO_ANGL_VEL,
980 .modified = 1,
981 .channel2 = IIO_MOD_Y,
982 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
983 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
984 IIO_CHAN_INFO_SCALE_SHARED_BIT |
985 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
986 .address = gyro_y,
987 .scan_index = ADIS16400_SCAN_GYRO_Y,
988 .scan_type = IIO_ST('s', 14, 16, 0),
989 }, {
990 .type = IIO_ANGL_VEL,
991 .modified = 1,
992 .channel2 = IIO_MOD_Z,
993 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
994 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
995 IIO_CHAN_INFO_SCALE_SHARED_BIT |
996 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
997 .address = gyro_z,
998 .scan_index = ADIS16400_SCAN_GYRO_Z,
999 .scan_type = IIO_ST('s', 14, 16, 0),
1000 }, {
1001 .type = IIO_ACCEL,
1002 .modified = 1,
1003 .channel2 = IIO_MOD_X,
1004 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
1005 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
1006 IIO_CHAN_INFO_SCALE_SHARED_BIT |
1007 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
1008 .address = accel_x,
1009 .scan_index = ADIS16400_SCAN_ACC_X,
1010 .scan_type = IIO_ST('s', 14, 16, 0),
1011 }, {
1012 .type = IIO_ACCEL,
1013 .modified = 1,
1014 .channel2 = IIO_MOD_Y,
1015 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
1016 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
1017 IIO_CHAN_INFO_SCALE_SHARED_BIT |
1018 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
1019 .address = accel_y,
1020 .scan_index = ADIS16400_SCAN_ACC_Y,
1021 .scan_type = IIO_ST('s', 14, 16, 0),
1022 }, {
1023 .type = IIO_ACCEL,
1024 .modified = 1,
1025 .channel2 = IIO_MOD_Z,
1026 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
1027 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
1028 IIO_CHAN_INFO_SCALE_SHARED_BIT |
1029 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
1030 .address = accel_z,
1031 .scan_index = ADIS16400_SCAN_ACC_Z,
1032 .scan_type = IIO_ST('s', 14, 16, 0),
1033 }, {
1034 .type = IIO_TEMP,
1035 .indexed = 1,
1036 .channel = 0,
1037 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
1038 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
1039 IIO_CHAN_INFO_SCALE_SHARED_BIT,
1040 .address = temp0,
1041 .scan_index = ADIS16400_SCAN_TEMP,
1042 .scan_type = IIO_ST('s', 14, 16, 0),
1043 },
1044 IIO_CHAN_SOFT_TIMESTAMP(12)
1045 };
1046
1047 static struct attribute *adis16400_attributes[] = {
1048 &iio_dev_attr_sampling_frequency.dev_attr.attr,
1049 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
1050 NULL
1051 };
1052
1053 static const struct attribute_group adis16400_attribute_group = {
1054 .attrs = adis16400_attributes,
1055 };
1056
1057 static struct adis16400_chip_info adis16400_chips[] = {
1058 [ADIS16300] = {
1059 .channels = adis16300_channels,
1060 .num_channels = ARRAY_SIZE(adis16300_channels),
1061 .gyro_scale_micro = 873,
1062 .accel_scale_micro = 5884,
1063 .default_scan_mask = (1 << ADIS16400_SCAN_SUPPLY) |
1064 (1 << ADIS16400_SCAN_GYRO_X) | (1 << ADIS16400_SCAN_ACC_X) |
1065 (1 << ADIS16400_SCAN_ACC_Y) | (1 << ADIS16400_SCAN_ACC_Z) |
1066 (1 << ADIS16400_SCAN_TEMP) | (1 << ADIS16400_SCAN_ADC_0) |
1067 (1 << ADIS16300_SCAN_INCLI_X) | (1 << ADIS16300_SCAN_INCLI_Y) |
1068 (1 << 14),
1069 },
1070 [ADIS16334] = {
1071 .channels = adis16334_channels,
1072 .num_channels = ARRAY_SIZE(adis16334_channels),
1073 .gyro_scale_micro = 873,
1074 .accel_scale_micro = 981,
1075 .default_scan_mask = (1 << ADIS16400_SCAN_GYRO_X) |
1076 (1 << ADIS16400_SCAN_GYRO_Y) | (1 << ADIS16400_SCAN_GYRO_Z) |
1077 (1 << ADIS16400_SCAN_ACC_X) | (1 << ADIS16400_SCAN_ACC_Y) |
1078 (1 << ADIS16400_SCAN_ACC_Z),
1079 },
1080 [ADIS16350] = {
1081 .channels = adis16350_channels,
1082 .num_channels = ARRAY_SIZE(adis16350_channels),
1083 .gyro_scale_micro = 872664,
1084 .accel_scale_micro = 24732,
1085 .default_scan_mask = 0x7FF,
1086 .flags = ADIS16400_NO_BURST,
1087 },
1088 [ADIS16360] = {
1089 .channels = adis16350_channels,
1090 .num_channels = ARRAY_SIZE(adis16350_channels),
1091 .flags = ADIS16400_HAS_PROD_ID,
1092 .product_id = 0x3FE8,
1093 .gyro_scale_micro = 1279,
1094 .accel_scale_micro = 24732,
1095 .default_scan_mask = 0x7FF,
1096 },
1097 [ADIS16362] = {
1098 .channels = adis16350_channels,
1099 .num_channels = ARRAY_SIZE(adis16350_channels),
1100 .flags = ADIS16400_HAS_PROD_ID,
1101 .product_id = 0x3FEA,
1102 .gyro_scale_micro = 1279,
1103 .accel_scale_micro = 24732,
1104 .default_scan_mask = 0x7FF,
1105 },
1106 [ADIS16364] = {
1107 .channels = adis16350_channels,
1108 .num_channels = ARRAY_SIZE(adis16350_channels),
1109 .flags = ADIS16400_HAS_PROD_ID,
1110 .product_id = 0x3FEC,
1111 .gyro_scale_micro = 1279,
1112 .accel_scale_micro = 24732,
1113 .default_scan_mask = 0x7FF,
1114 },
1115 [ADIS16365] = {
1116 .channels = adis16350_channels,
1117 .num_channels = ARRAY_SIZE(adis16350_channels),
1118 .flags = ADIS16400_HAS_PROD_ID,
1119 .product_id = 0x3FED,
1120 .gyro_scale_micro = 1279,
1121 .accel_scale_micro = 24732,
1122 .default_scan_mask = 0x7FF,
1123 },
1124 [ADIS16400] = {
1125 .channels = adis16400_channels,
1126 .num_channels = ARRAY_SIZE(adis16400_channels),
1127 .flags = ADIS16400_HAS_PROD_ID,
1128 .product_id = 0x4015,
1129 .gyro_scale_micro = 873,
1130 .accel_scale_micro = 32656,
1131 .default_scan_mask = 0xFFF,
1132 }
1133 };
1134
1135 static const struct iio_info adis16400_info = {
1136 .driver_module = THIS_MODULE,
1137 .read_raw = &adis16400_read_raw,
1138 .write_raw = &adis16400_write_raw,
1139 .attrs = &adis16400_attribute_group,
1140 };
1141
1142 static int __devinit adis16400_probe(struct spi_device *spi)
1143 {
1144 int ret;
1145 struct adis16400_state *st;
1146 struct iio_dev *indio_dev = iio_device_alloc(sizeof(*st));
1147 if (indio_dev == NULL) {
1148 ret = -ENOMEM;
1149 goto error_ret;
1150 }
1151 st = iio_priv(indio_dev);
1152 /* this is only used for removal purposes */
1153 spi_set_drvdata(spi, indio_dev);
1154
1155 st->us = spi;
1156 mutex_init(&st->buf_lock);
1157
1158 /* setup the industrialio driver allocated elements */
1159 st->variant = &adis16400_chips[spi_get_device_id(spi)->driver_data];
1160 indio_dev->dev.parent = &spi->dev;
1161 indio_dev->name = spi_get_device_id(spi)->name;
1162 indio_dev->channels = st->variant->channels;
1163 indio_dev->num_channels = st->variant->num_channels;
1164 indio_dev->info = &adis16400_info;
1165 indio_dev->modes = INDIO_DIRECT_MODE;
1166
1167 ret = adis16400_configure_ring(indio_dev);
1168 if (ret)
1169 goto error_free_dev;
1170
1171 ret = iio_buffer_register(indio_dev,
1172 st->variant->channels,
1173 st->variant->num_channels);
1174 if (ret) {
1175 dev_err(&spi->dev, "failed to initialize the ring\n");
1176 goto error_unreg_ring_funcs;
1177 }
1178
1179 if (spi->irq) {
1180 ret = adis16400_probe_trigger(indio_dev);
1181 if (ret)
1182 goto error_uninitialize_ring;
1183 }
1184
1185 /* Get the device into a sane initial state */
1186 ret = adis16400_initial_setup(indio_dev);
1187 if (ret)
1188 goto error_remove_trigger;
1189 ret = iio_device_register(indio_dev);
1190 if (ret)
1191 goto error_remove_trigger;
1192
1193 return 0;
1194
1195 error_remove_trigger:
1196 if (spi->irq)
1197 adis16400_remove_trigger(indio_dev);
1198 error_uninitialize_ring:
1199 iio_buffer_unregister(indio_dev);
1200 error_unreg_ring_funcs:
1201 adis16400_unconfigure_ring(indio_dev);
1202 error_free_dev:
1203 iio_device_free(indio_dev);
1204 error_ret:
1205 return ret;
1206 }
1207
1208 /* fixme, confirm ordering in this function */
1209 static int adis16400_remove(struct spi_device *spi)
1210 {
1211 int ret;
1212 struct iio_dev *indio_dev = spi_get_drvdata(spi);
1213
1214 iio_device_unregister(indio_dev);
1215 ret = adis16400_stop_device(indio_dev);
1216 if (ret)
1217 goto err_ret;
1218
1219 adis16400_remove_trigger(indio_dev);
1220 iio_buffer_unregister(indio_dev);
1221 adis16400_unconfigure_ring(indio_dev);
1222 iio_device_free(indio_dev);
1223
1224 return 0;
1225
1226 err_ret:
1227 return ret;
1228 }
1229
1230 static const struct spi_device_id adis16400_id[] = {
1231 {"adis16300", ADIS16300},
1232 {"adis16334", ADIS16334},
1233 {"adis16350", ADIS16350},
1234 {"adis16354", ADIS16350},
1235 {"adis16355", ADIS16350},
1236 {"adis16360", ADIS16360},
1237 {"adis16362", ADIS16362},
1238 {"adis16364", ADIS16364},
1239 {"adis16365", ADIS16365},
1240 {"adis16400", ADIS16400},
1241 {"adis16405", ADIS16400},
1242 {}
1243 };
1244 MODULE_DEVICE_TABLE(spi, adis16400_id);
1245
1246 static struct spi_driver adis16400_driver = {
1247 .driver = {
1248 .name = "adis16400",
1249 .owner = THIS_MODULE,
1250 },
1251 .id_table = adis16400_id,
1252 .probe = adis16400_probe,
1253 .remove = __devexit_p(adis16400_remove),
1254 };
1255 module_spi_driver(adis16400_driver);
1256
1257 MODULE_AUTHOR("Manuel Stahl <manuel.stahl@iis.fraunhofer.de>");
1258 MODULE_DESCRIPTION("Analog Devices ADIS16400/5 IMU SPI driver");
1259 MODULE_LICENSE("GPL v2");
Linux kernel - Deliverables
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