2 * ADE7758 Poly Phase Multifunction Energy Metering IC driver
4 * Copyright 2010-2011 Analog Devices Inc.
6 * Licensed under the GPL-2.
9 #include <linux/interrupt.h>
10 #include <linux/irq.h>
11 #include <linux/delay.h>
12 #include <linux/mutex.h>
13 #include <linux/device.h>
14 #include <linux/kernel.h>
15 #include <linux/spi/spi.h>
16 #include <linux/slab.h>
17 #include <linux/sysfs.h>
18 #include <linux/list.h>
19 #include <linux/module.h>
21 #include <linux/iio/iio.h>
22 #include <linux/iio/sysfs.h>
23 #include <linux/iio/buffer.h>
27 int ade7758_spi_write_reg_8(struct device
*dev
,
32 struct iio_dev
*indio_dev
= dev_to_iio_dev(dev
);
33 struct ade7758_state
*st
= iio_priv(indio_dev
);
35 mutex_lock(&st
->buf_lock
);
36 st
->tx
[0] = ADE7758_WRITE_REG(reg_address
);
39 ret
= spi_write(st
->us
, st
->tx
, 2);
40 mutex_unlock(&st
->buf_lock
);
45 static int ade7758_spi_write_reg_16(struct device
*dev
,
50 struct iio_dev
*indio_dev
= dev_to_iio_dev(dev
);
51 struct ade7758_state
*st
= iio_priv(indio_dev
);
52 struct spi_transfer xfers
[] = {
60 mutex_lock(&st
->buf_lock
);
61 st
->tx
[0] = ADE7758_WRITE_REG(reg_address
);
62 st
->tx
[1] = (value
>> 8) & 0xFF;
63 st
->tx
[2] = value
& 0xFF;
65 ret
= spi_sync_transfer(st
->us
, xfers
, ARRAY_SIZE(xfers
));
66 mutex_unlock(&st
->buf_lock
);
71 static int ade7758_spi_write_reg_24(struct device
*dev
,
76 struct iio_dev
*indio_dev
= dev_to_iio_dev(dev
);
77 struct ade7758_state
*st
= iio_priv(indio_dev
);
78 struct spi_transfer xfers
[] = {
86 mutex_lock(&st
->buf_lock
);
87 st
->tx
[0] = ADE7758_WRITE_REG(reg_address
);
88 st
->tx
[1] = (value
>> 16) & 0xFF;
89 st
->tx
[2] = (value
>> 8) & 0xFF;
90 st
->tx
[3] = value
& 0xFF;
92 ret
= spi_sync_transfer(st
->us
, xfers
, ARRAY_SIZE(xfers
));
93 mutex_unlock(&st
->buf_lock
);
98 int ade7758_spi_read_reg_8(struct device
*dev
,
102 struct iio_dev
*indio_dev
= dev_to_iio_dev(dev
);
103 struct ade7758_state
*st
= iio_priv(indio_dev
);
105 struct spi_transfer xfers
[] = {
113 .tx_buf
= &st
->tx
[1],
120 mutex_lock(&st
->buf_lock
);
121 st
->tx
[0] = ADE7758_READ_REG(reg_address
);
124 ret
= spi_sync_transfer(st
->us
, xfers
, ARRAY_SIZE(xfers
));
126 dev_err(&st
->us
->dev
, "problem when reading 8 bit register 0x%02X",
133 mutex_unlock(&st
->buf_lock
);
137 static int ade7758_spi_read_reg_16(struct device
*dev
,
141 struct iio_dev
*indio_dev
= dev_to_iio_dev(dev
);
142 struct ade7758_state
*st
= iio_priv(indio_dev
);
144 struct spi_transfer xfers
[] = {
152 .tx_buf
= &st
->tx
[1],
160 mutex_lock(&st
->buf_lock
);
161 st
->tx
[0] = ADE7758_READ_REG(reg_address
);
165 ret
= spi_sync_transfer(st
->us
, xfers
, ARRAY_SIZE(xfers
));
167 dev_err(&st
->us
->dev
, "problem when reading 16 bit register 0x%02X",
172 *val
= (st
->rx
[0] << 8) | st
->rx
[1];
175 mutex_unlock(&st
->buf_lock
);
179 static int ade7758_spi_read_reg_24(struct device
*dev
,
183 struct iio_dev
*indio_dev
= dev_to_iio_dev(dev
);
184 struct ade7758_state
*st
= iio_priv(indio_dev
);
186 struct spi_transfer xfers
[] = {
194 .tx_buf
= &st
->tx
[1],
201 mutex_lock(&st
->buf_lock
);
202 st
->tx
[0] = ADE7758_READ_REG(reg_address
);
207 ret
= spi_sync_transfer(st
->us
, xfers
, ARRAY_SIZE(xfers
));
209 dev_err(&st
->us
->dev
, "problem when reading 24 bit register 0x%02X",
213 *val
= (st
->rx
[0] << 16) | (st
->rx
[1] << 8) | st
->rx
[2];
216 mutex_unlock(&st
->buf_lock
);
220 static ssize_t
ade7758_read_8bit(struct device
*dev
,
221 struct device_attribute
*attr
,
226 struct iio_dev_attr
*this_attr
= to_iio_dev_attr(attr
);
228 ret
= ade7758_spi_read_reg_8(dev
, this_attr
->address
, &val
);
232 return sprintf(buf
, "%u\n", val
);
235 static ssize_t
ade7758_read_16bit(struct device
*dev
,
236 struct device_attribute
*attr
,
241 struct iio_dev_attr
*this_attr
= to_iio_dev_attr(attr
);
243 ret
= ade7758_spi_read_reg_16(dev
, this_attr
->address
, &val
);
247 return sprintf(buf
, "%u\n", val
);
250 static ssize_t
ade7758_read_24bit(struct device
*dev
,
251 struct device_attribute
*attr
,
256 struct iio_dev_attr
*this_attr
= to_iio_dev_attr(attr
);
258 ret
= ade7758_spi_read_reg_24(dev
, this_attr
->address
, &val
);
262 return sprintf(buf
, "%u\n", val
& 0xFFFFFF);
265 static ssize_t
ade7758_write_8bit(struct device
*dev
,
266 struct device_attribute
*attr
,
270 struct iio_dev_attr
*this_attr
= to_iio_dev_attr(attr
);
274 ret
= strict_strtol(buf
, 10, &val
);
277 ret
= ade7758_spi_write_reg_8(dev
, this_attr
->address
, val
);
280 return ret
? ret
: len
;
283 static ssize_t
ade7758_write_16bit(struct device
*dev
,
284 struct device_attribute
*attr
,
288 struct iio_dev_attr
*this_attr
= to_iio_dev_attr(attr
);
292 ret
= strict_strtol(buf
, 10, &val
);
295 ret
= ade7758_spi_write_reg_16(dev
, this_attr
->address
, val
);
298 return ret
? ret
: len
;
301 static int ade7758_reset(struct device
*dev
)
305 ade7758_spi_read_reg_8(dev
,
308 val
|= 1 << 6; /* Software Chip Reset */
309 ret
= ade7758_spi_write_reg_8(dev
,
316 static ssize_t
ade7758_write_reset(struct device
*dev
,
317 struct device_attribute
*attr
,
318 const char *buf
, size_t len
)
326 return ade7758_reset(dev
);
331 static IIO_DEV_ATTR_VPEAK(S_IWUSR
| S_IRUGO
,
335 static IIO_DEV_ATTR_IPEAK(S_IWUSR
| S_IRUGO
,
339 static IIO_DEV_ATTR_APHCAL(S_IWUSR
| S_IRUGO
,
343 static IIO_DEV_ATTR_BPHCAL(S_IWUSR
| S_IRUGO
,
347 static IIO_DEV_ATTR_CPHCAL(S_IWUSR
| S_IRUGO
,
351 static IIO_DEV_ATTR_WDIV(S_IWUSR
| S_IRUGO
,
355 static IIO_DEV_ATTR_VADIV(S_IWUSR
| S_IRUGO
,
359 static IIO_DEV_ATTR_AIRMS(S_IRUGO
,
363 static IIO_DEV_ATTR_BIRMS(S_IRUGO
,
367 static IIO_DEV_ATTR_CIRMS(S_IRUGO
,
371 static IIO_DEV_ATTR_AVRMS(S_IRUGO
,
375 static IIO_DEV_ATTR_BVRMS(S_IRUGO
,
379 static IIO_DEV_ATTR_CVRMS(S_IRUGO
,
383 static IIO_DEV_ATTR_AIRMSOS(S_IWUSR
| S_IRUGO
,
387 static IIO_DEV_ATTR_BIRMSOS(S_IWUSR
| S_IRUGO
,
391 static IIO_DEV_ATTR_CIRMSOS(S_IWUSR
| S_IRUGO
,
395 static IIO_DEV_ATTR_AVRMSOS(S_IWUSR
| S_IRUGO
,
399 static IIO_DEV_ATTR_BVRMSOS(S_IWUSR
| S_IRUGO
,
403 static IIO_DEV_ATTR_CVRMSOS(S_IWUSR
| S_IRUGO
,
407 static IIO_DEV_ATTR_AIGAIN(S_IWUSR
| S_IRUGO
,
411 static IIO_DEV_ATTR_BIGAIN(S_IWUSR
| S_IRUGO
,
415 static IIO_DEV_ATTR_CIGAIN(S_IWUSR
| S_IRUGO
,
419 static IIO_DEV_ATTR_AVRMSGAIN(S_IWUSR
| S_IRUGO
,
423 static IIO_DEV_ATTR_BVRMSGAIN(S_IWUSR
| S_IRUGO
,
427 static IIO_DEV_ATTR_CVRMSGAIN(S_IWUSR
| S_IRUGO
,
432 int ade7758_set_irq(struct device
*dev
, bool enable
)
436 ret
= ade7758_spi_read_reg_24(dev
, ADE7758_MASK
, &irqen
);
441 irqen
|= 1 << 16; /* Enables an interrupt when a data is
442 present in the waveform register */
446 ret
= ade7758_spi_write_reg_24(dev
, ADE7758_MASK
, irqen
);
454 /* Power down the device */
455 static int ade7758_stop_device(struct device
*dev
)
459 ade7758_spi_read_reg_8(dev
,
462 val
|= 7 << 3; /* ADE7758 powered down */
463 ret
= ade7758_spi_write_reg_8(dev
,
470 static int ade7758_initial_setup(struct iio_dev
*indio_dev
)
472 struct ade7758_state
*st
= iio_priv(indio_dev
);
473 struct device
*dev
= &indio_dev
->dev
;
476 /* use low spi speed for init */
477 st
->us
->mode
= SPI_MODE_1
;
481 ret
= ade7758_set_irq(dev
, false);
483 dev_err(dev
, "disable irq failed");
488 msleep(ADE7758_STARTUP_DELAY
);
494 static ssize_t
ade7758_read_frequency(struct device
*dev
,
495 struct device_attribute
*attr
,
501 ret
= ade7758_spi_read_reg_8(dev
,
508 sps
= 26040 / (1 << t
);
510 len
= sprintf(buf
, "%d SPS\n", sps
);
514 static ssize_t
ade7758_write_frequency(struct device
*dev
,
515 struct device_attribute
*attr
,
519 struct iio_dev
*indio_dev
= dev_to_iio_dev(dev
);
524 ret
= strict_strtol(buf
, 10, &val
);
528 mutex_lock(&indio_dev
->mlock
);
548 ret
= ade7758_spi_read_reg_8(dev
,
557 ret
= ade7758_spi_write_reg_8(dev
,
562 mutex_unlock(&indio_dev
->mlock
);
564 return ret
? ret
: len
;
567 static IIO_DEV_ATTR_TEMP_RAW(ade7758_read_8bit
);
568 static IIO_CONST_ATTR(in_temp_offset
, "129 C");
569 static IIO_CONST_ATTR(in_temp_scale
, "4 C");
571 static IIO_DEV_ATTR_AWATTHR(ade7758_read_16bit
,
573 static IIO_DEV_ATTR_BWATTHR(ade7758_read_16bit
,
575 static IIO_DEV_ATTR_CWATTHR(ade7758_read_16bit
,
577 static IIO_DEV_ATTR_AVARHR(ade7758_read_16bit
,
579 static IIO_DEV_ATTR_BVARHR(ade7758_read_16bit
,
581 static IIO_DEV_ATTR_CVARHR(ade7758_read_16bit
,
583 static IIO_DEV_ATTR_AVAHR(ade7758_read_16bit
,
585 static IIO_DEV_ATTR_BVAHR(ade7758_read_16bit
,
587 static IIO_DEV_ATTR_CVAHR(ade7758_read_16bit
,
590 static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR
| S_IRUGO
,
591 ade7758_read_frequency
,
592 ade7758_write_frequency
);
594 static IIO_DEV_ATTR_RESET(ade7758_write_reset
);
596 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("26040 13020 6510 3255");
598 static struct attribute
*ade7758_attributes
[] = {
599 &iio_dev_attr_in_temp_raw
.dev_attr
.attr
,
600 &iio_const_attr_in_temp_offset
.dev_attr
.attr
,
601 &iio_const_attr_in_temp_scale
.dev_attr
.attr
,
602 &iio_dev_attr_sampling_frequency
.dev_attr
.attr
,
603 &iio_const_attr_sampling_frequency_available
.dev_attr
.attr
,
604 &iio_dev_attr_reset
.dev_attr
.attr
,
605 &iio_dev_attr_awatthr
.dev_attr
.attr
,
606 &iio_dev_attr_bwatthr
.dev_attr
.attr
,
607 &iio_dev_attr_cwatthr
.dev_attr
.attr
,
608 &iio_dev_attr_avarhr
.dev_attr
.attr
,
609 &iio_dev_attr_bvarhr
.dev_attr
.attr
,
610 &iio_dev_attr_cvarhr
.dev_attr
.attr
,
611 &iio_dev_attr_avahr
.dev_attr
.attr
,
612 &iio_dev_attr_bvahr
.dev_attr
.attr
,
613 &iio_dev_attr_cvahr
.dev_attr
.attr
,
614 &iio_dev_attr_vpeak
.dev_attr
.attr
,
615 &iio_dev_attr_ipeak
.dev_attr
.attr
,
616 &iio_dev_attr_aphcal
.dev_attr
.attr
,
617 &iio_dev_attr_bphcal
.dev_attr
.attr
,
618 &iio_dev_attr_cphcal
.dev_attr
.attr
,
619 &iio_dev_attr_wdiv
.dev_attr
.attr
,
620 &iio_dev_attr_vadiv
.dev_attr
.attr
,
621 &iio_dev_attr_airms
.dev_attr
.attr
,
622 &iio_dev_attr_birms
.dev_attr
.attr
,
623 &iio_dev_attr_cirms
.dev_attr
.attr
,
624 &iio_dev_attr_avrms
.dev_attr
.attr
,
625 &iio_dev_attr_bvrms
.dev_attr
.attr
,
626 &iio_dev_attr_cvrms
.dev_attr
.attr
,
627 &iio_dev_attr_aigain
.dev_attr
.attr
,
628 &iio_dev_attr_bigain
.dev_attr
.attr
,
629 &iio_dev_attr_cigain
.dev_attr
.attr
,
630 &iio_dev_attr_avrmsgain
.dev_attr
.attr
,
631 &iio_dev_attr_bvrmsgain
.dev_attr
.attr
,
632 &iio_dev_attr_cvrmsgain
.dev_attr
.attr
,
633 &iio_dev_attr_airmsos
.dev_attr
.attr
,
634 &iio_dev_attr_birmsos
.dev_attr
.attr
,
635 &iio_dev_attr_cirmsos
.dev_attr
.attr
,
636 &iio_dev_attr_avrmsos
.dev_attr
.attr
,
637 &iio_dev_attr_bvrmsos
.dev_attr
.attr
,
638 &iio_dev_attr_cvrmsos
.dev_attr
.attr
,
642 static const struct attribute_group ade7758_attribute_group
= {
643 .attrs
= ade7758_attributes
,
646 static const struct iio_chan_spec ade7758_channels
[] = {
651 .extend_name
= "raw",
652 .info_mask_separate
= BIT(IIO_CHAN_INFO_RAW
),
653 .info_mask_shared_by_type
= BIT(IIO_CHAN_INFO_SCALE
),
654 .address
= AD7758_WT(AD7758_PHASE_A
, AD7758_VOLTAGE
),
665 .extend_name
= "raw",
666 .info_mask_separate
= BIT(IIO_CHAN_INFO_RAW
),
667 .info_mask_shared_by_type
= BIT(IIO_CHAN_INFO_SCALE
),
668 .address
= AD7758_WT(AD7758_PHASE_A
, AD7758_CURRENT
),
679 .extend_name
= "apparent_raw",
680 .info_mask_separate
= BIT(IIO_CHAN_INFO_RAW
),
681 .info_mask_shared_by_type
= BIT(IIO_CHAN_INFO_SCALE
),
682 .address
= AD7758_WT(AD7758_PHASE_A
, AD7758_APP_PWR
),
693 .extend_name
= "active_raw",
694 .info_mask_separate
= BIT(IIO_CHAN_INFO_RAW
),
695 .info_mask_shared_by_type
= BIT(IIO_CHAN_INFO_SCALE
),
696 .address
= AD7758_WT(AD7758_PHASE_A
, AD7758_ACT_PWR
),
707 .extend_name
= "reactive_raw",
708 .info_mask_separate
= BIT(IIO_CHAN_INFO_RAW
),
709 .info_mask_shared_by_type
= BIT(IIO_CHAN_INFO_SCALE
),
710 .address
= AD7758_WT(AD7758_PHASE_A
, AD7758_REACT_PWR
),
721 .extend_name
= "raw",
722 .info_mask_separate
= BIT(IIO_CHAN_INFO_RAW
),
723 .info_mask_shared_by_type
= BIT(IIO_CHAN_INFO_SCALE
),
724 .address
= AD7758_WT(AD7758_PHASE_B
, AD7758_VOLTAGE
),
735 .extend_name
= "raw",
736 .info_mask_separate
= BIT(IIO_CHAN_INFO_RAW
),
737 .info_mask_shared_by_type
= BIT(IIO_CHAN_INFO_SCALE
),
738 .address
= AD7758_WT(AD7758_PHASE_B
, AD7758_CURRENT
),
749 .extend_name
= "apparent_raw",
750 .info_mask_separate
= BIT(IIO_CHAN_INFO_RAW
),
751 .info_mask_shared_by_type
= BIT(IIO_CHAN_INFO_SCALE
),
752 .address
= AD7758_WT(AD7758_PHASE_B
, AD7758_APP_PWR
),
763 .extend_name
= "active_raw",
764 .info_mask_separate
= BIT(IIO_CHAN_INFO_RAW
),
765 .info_mask_shared_by_type
= BIT(IIO_CHAN_INFO_SCALE
),
766 .address
= AD7758_WT(AD7758_PHASE_B
, AD7758_ACT_PWR
),
777 .extend_name
= "reactive_raw",
778 .info_mask_separate
= BIT(IIO_CHAN_INFO_RAW
),
779 .info_mask_shared_by_type
= BIT(IIO_CHAN_INFO_SCALE
),
780 .address
= AD7758_WT(AD7758_PHASE_B
, AD7758_REACT_PWR
),
791 .extend_name
= "raw",
792 .info_mask_separate
= BIT(IIO_CHAN_INFO_RAW
),
793 .info_mask_shared_by_type
= BIT(IIO_CHAN_INFO_SCALE
),
794 .address
= AD7758_WT(AD7758_PHASE_C
, AD7758_VOLTAGE
),
805 .extend_name
= "raw",
806 .info_mask_separate
= BIT(IIO_CHAN_INFO_RAW
),
807 .info_mask_shared_by_type
= BIT(IIO_CHAN_INFO_SCALE
),
808 .address
= AD7758_WT(AD7758_PHASE_C
, AD7758_CURRENT
),
819 .extend_name
= "apparent_raw",
820 .info_mask_separate
= BIT(IIO_CHAN_INFO_RAW
),
821 .info_mask_shared_by_type
= BIT(IIO_CHAN_INFO_SCALE
),
822 .address
= AD7758_WT(AD7758_PHASE_C
, AD7758_APP_PWR
),
833 .extend_name
= "active_raw",
834 .info_mask_separate
= BIT(IIO_CHAN_INFO_RAW
),
835 .info_mask_shared_by_type
= BIT(IIO_CHAN_INFO_SCALE
),
836 .address
= AD7758_WT(AD7758_PHASE_C
, AD7758_ACT_PWR
),
847 .extend_name
= "reactive_raw",
848 .info_mask_separate
= BIT(IIO_CHAN_INFO_RAW
),
849 .info_mask_shared_by_type
= BIT(IIO_CHAN_INFO_SCALE
),
850 .address
= AD7758_WT(AD7758_PHASE_C
, AD7758_REACT_PWR
),
858 IIO_CHAN_SOFT_TIMESTAMP(15),
861 static const struct iio_info ade7758_info
= {
862 .attrs
= &ade7758_attribute_group
,
863 .driver_module
= THIS_MODULE
,
866 static int ade7758_probe(struct spi_device
*spi
)
869 struct ade7758_state
*st
;
870 struct iio_dev
*indio_dev
= iio_device_alloc(sizeof(*st
));
872 if (indio_dev
== NULL
) {
877 st
= iio_priv(indio_dev
);
878 /* this is only used for removal purposes */
879 spi_set_drvdata(spi
, indio_dev
);
881 /* Allocate the comms buffers */
882 st
->rx
= kcalloc(ADE7758_MAX_RX
, sizeof(*st
->rx
), GFP_KERNEL
);
883 if (st
->rx
== NULL
) {
887 st
->tx
= kcalloc(ADE7758_MAX_TX
, sizeof(*st
->tx
), GFP_KERNEL
);
888 if (st
->tx
== NULL
) {
893 st
->ade7758_ring_channels
= &ade7758_channels
[0];
894 mutex_init(&st
->buf_lock
);
896 indio_dev
->name
= spi
->dev
.driver
->name
;
897 indio_dev
->dev
.parent
= &spi
->dev
;
898 indio_dev
->info
= &ade7758_info
;
899 indio_dev
->modes
= INDIO_DIRECT_MODE
;
901 ret
= ade7758_configure_ring(indio_dev
);
905 ret
= iio_buffer_register(indio_dev
,
906 &ade7758_channels
[0],
907 ARRAY_SIZE(ade7758_channels
));
909 dev_err(&spi
->dev
, "failed to initialize the ring\n");
910 goto error_unreg_ring_funcs
;
913 /* Get the device into a sane initial state */
914 ret
= ade7758_initial_setup(indio_dev
);
916 goto error_uninitialize_ring
;
919 ret
= ade7758_probe_trigger(indio_dev
);
921 goto error_uninitialize_ring
;
924 ret
= iio_device_register(indio_dev
);
926 goto error_remove_trigger
;
930 error_remove_trigger
:
932 ade7758_remove_trigger(indio_dev
);
933 error_uninitialize_ring
:
934 ade7758_uninitialize_ring(indio_dev
);
935 error_unreg_ring_funcs
:
936 ade7758_unconfigure_ring(indio_dev
);
942 iio_device_free(indio_dev
);
947 static int ade7758_remove(struct spi_device
*spi
)
949 struct iio_dev
*indio_dev
= spi_get_drvdata(spi
);
950 struct ade7758_state
*st
= iio_priv(indio_dev
);
952 iio_device_unregister(indio_dev
);
953 ade7758_stop_device(&indio_dev
->dev
);
954 ade7758_remove_trigger(indio_dev
);
955 ade7758_uninitialize_ring(indio_dev
);
956 ade7758_unconfigure_ring(indio_dev
);
960 iio_device_free(indio_dev
);
965 static const struct spi_device_id ade7758_id
[] = {
969 MODULE_DEVICE_TABLE(spi
, ade7758_id
);
971 static struct spi_driver ade7758_driver
= {
974 .owner
= THIS_MODULE
,
976 .probe
= ade7758_probe
,
977 .remove
= ade7758_remove
,
978 .id_table
= ade7758_id
,
980 module_spi_driver(ade7758_driver
);
982 MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
983 MODULE_DESCRIPTION("Analog Devices ADE7758 Polyphase Multifunction Energy Metering IC Driver");
984 MODULE_LICENSE("GPL v2");