c40e00a12d7c337bca0423276e0427ef62da8da8
[deliverable/linux.git] / drivers / staging / intel_sst / intel_sst.c
1 /*
2 * intel_sst.c - Intel SST Driver for audio engine
3 *
4 * Copyright (C) 2008-10 Intel Corp
5 * Authors: Vinod Koul <vinod.koul@intel.com>
6 * Harsha Priya <priya.harsha@intel.com>
7 * Dharageswari R <dharageswari.r@intel.com>
8 * KP Jeeja <jeeja.kp@intel.com>
9 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; version 2 of the License.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License along
21 * with this program; if not, write to the Free Software Foundation, Inc.,
22 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
23 *
24 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
25 *
26 * This driver exposes the audio engine functionalities to the ALSA
27 * and middleware.
28 *
29 * This file contains all init functions
30 */
31
32 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
33
34 #include <linux/pci.h>
35 #include <linux/fs.h>
36 #include <linux/interrupt.h>
37 #include <linux/firmware.h>
38 #include <linux/miscdevice.h>
39 #include <linux/pm_runtime.h>
40 #include <asm/mrst.h>
41 #include "intel_sst.h"
42 #include "intel_sst_ioctl.h"
43 #include "intel_sst_fw_ipc.h"
44 #include "intel_sst_common.h"
45
46
47 MODULE_AUTHOR("Vinod Koul <vinod.koul@intel.com>");
48 MODULE_AUTHOR("Harsha Priya <priya.harsha@intel.com>");
49 MODULE_AUTHOR("Dharageswari R <dharageswari.r@intel.com>");
50 MODULE_AUTHOR("KP Jeeja <jeeja.kp@intel.com>");
51 MODULE_DESCRIPTION("Intel (R) SST(R) Audio Engine Driver");
52 MODULE_LICENSE("GPL v2");
53 MODULE_VERSION(SST_DRIVER_VERSION);
54
55 struct intel_sst_drv *sst_drv_ctx;
56 static struct mutex drv_ctx_lock;
57 struct class *sst_class;
58
59 /* fops Routines */
60 static const struct file_operations intel_sst_fops = {
61 .owner = THIS_MODULE,
62 .open = intel_sst_open,
63 .release = intel_sst_release,
64 .read = intel_sst_read,
65 .write = intel_sst_write,
66 .unlocked_ioctl = intel_sst_ioctl,
67 .mmap = intel_sst_mmap,
68 .aio_read = intel_sst_aio_read,
69 .aio_write = intel_sst_aio_write,
70 };
71 static const struct file_operations intel_sst_fops_cntrl = {
72 .owner = THIS_MODULE,
73 .open = intel_sst_open_cntrl,
74 .release = intel_sst_release_cntrl,
75 .unlocked_ioctl = intel_sst_ioctl,
76 };
77
78 static struct miscdevice lpe_dev = {
79 .minor = MISC_DYNAMIC_MINOR,/* dynamic allocation */
80 .name = "intel_sst",/* /dev/intel_sst */
81 .fops = &intel_sst_fops
82 };
83
84
85 static struct miscdevice lpe_ctrl = {
86 .minor = MISC_DYNAMIC_MINOR,/* dynamic allocation */
87 .name = "intel_sst_ctrl",/* /dev/intel_sst_ctrl */
88 .fops = &intel_sst_fops_cntrl
89 };
90
91 /**
92 * intel_sst_interrupt - Interrupt service routine for SST
93 *
94 * @irq: irq number of interrupt
95 * @context: pointer to device structre
96 *
97 * This function is called by OS when SST device raises
98 * an interrupt. This will be result of write in IPC register
99 * Source can be busy or done interrupt
100 */
101 static irqreturn_t intel_sst_interrupt(int irq, void *context)
102 {
103 union interrupt_reg isr;
104 union ipc_header header;
105 union interrupt_reg imr;
106 struct intel_sst_drv *drv = (struct intel_sst_drv *) context;
107 unsigned int size = 0, str_id;
108 struct stream_info *stream ;
109
110 /* Interrupt arrived, check src */
111 isr.full = sst_shim_read(drv->shim, SST_ISRX);
112
113 if (isr.part.busy_interrupt) {
114 header.full = sst_shim_read(drv->shim, SST_IPCD);
115 if (header.part.msg_id == IPC_SST_PERIOD_ELAPSED) {
116 sst_clear_interrupt();
117 str_id = header.part.str_id;
118 stream = &sst_drv_ctx->streams[str_id];
119 if (stream->period_elapsed)
120 stream->period_elapsed(stream->pcm_substream);
121 return IRQ_HANDLED;
122 }
123 if (header.part.large)
124 size = header.part.data;
125 if (header.part.msg_id & REPLY_MSG) {
126 sst_drv_ctx->ipc_process_msg.header = header;
127 memcpy_fromio(sst_drv_ctx->ipc_process_msg.mailbox,
128 drv->mailbox + SST_MAILBOX_RCV, size);
129 queue_work(sst_drv_ctx->process_msg_wq,
130 &sst_drv_ctx->ipc_process_msg.wq);
131 } else {
132 sst_drv_ctx->ipc_process_reply.header = header;
133 memcpy_fromio(sst_drv_ctx->ipc_process_reply.mailbox,
134 drv->mailbox + SST_MAILBOX_RCV, size);
135 queue_work(sst_drv_ctx->process_reply_wq,
136 &sst_drv_ctx->ipc_process_reply.wq);
137 }
138 /* mask busy inetrrupt */
139 imr.full = sst_shim_read(drv->shim, SST_IMRX);
140 imr.part.busy_interrupt = 1;
141 sst_shim_write(sst_drv_ctx->shim, SST_IMRX, imr.full);
142 return IRQ_HANDLED;
143 } else if (isr.part.done_interrupt) {
144 /* Clear done bit */
145 header.full = sst_shim_read(drv->shim, SST_IPCX);
146 header.part.done = 0;
147 sst_shim_write(sst_drv_ctx->shim, SST_IPCX, header.full);
148 /* write 1 to clear status register */;
149 isr.part.done_interrupt = 1;
150 /* dummy register for shim workaround */
151 sst_shim_write(sst_drv_ctx->shim, SST_ISRX, isr.full);
152 queue_work(sst_drv_ctx->post_msg_wq,
153 &sst_drv_ctx->ipc_post_msg.wq);
154 return IRQ_HANDLED;
155 } else
156 return IRQ_NONE;
157
158 }
159
160
161 /*
162 * intel_sst_probe - PCI probe function
163 *
164 * @pci: PCI device structure
165 * @pci_id: PCI device ID structure
166 *
167 * This function is called by OS when a device is found
168 * This enables the device, interrupt etc
169 */
170 static int __devinit intel_sst_probe(struct pci_dev *pci,
171 const struct pci_device_id *pci_id)
172 {
173 int i, ret = 0;
174
175 pr_debug("Probe for DID %x\n", pci->device);
176 mutex_lock(&drv_ctx_lock);
177 if (sst_drv_ctx) {
178 pr_err("Only one sst handle is supported\n");
179 mutex_unlock(&drv_ctx_lock);
180 return -EBUSY;
181 }
182
183 sst_drv_ctx = kzalloc(sizeof(*sst_drv_ctx), GFP_KERNEL);
184 if (!sst_drv_ctx) {
185 pr_err("malloc fail\n");
186 mutex_unlock(&drv_ctx_lock);
187 return -ENOMEM;
188 }
189 mutex_unlock(&drv_ctx_lock);
190
191 sst_drv_ctx->pci_id = pci->device;
192
193 mutex_init(&sst_drv_ctx->stream_lock);
194 mutex_init(&sst_drv_ctx->sst_lock);
195 sst_drv_ctx->pmic_state = SND_MAD_UN_INIT;
196
197 sst_drv_ctx->stream_cnt = 0;
198 sst_drv_ctx->encoded_cnt = 0;
199 sst_drv_ctx->am_cnt = 0;
200 sst_drv_ctx->pb_streams = 0;
201 sst_drv_ctx->cp_streams = 0;
202 sst_drv_ctx->unique_id = 0;
203 sst_drv_ctx->pmic_port_instance = SST_DEFAULT_PMIC_PORT;
204
205 INIT_LIST_HEAD(&sst_drv_ctx->ipc_dispatch_list);
206 INIT_WORK(&sst_drv_ctx->ipc_post_msg.wq, sst_post_message);
207 INIT_WORK(&sst_drv_ctx->ipc_process_msg.wq, sst_process_message);
208 INIT_WORK(&sst_drv_ctx->ipc_process_reply.wq, sst_process_reply);
209 INIT_WORK(&sst_drv_ctx->mad_ops.wq, sst_process_mad_ops);
210 init_waitqueue_head(&sst_drv_ctx->wait_queue);
211
212 sst_drv_ctx->mad_wq = create_workqueue("sst_mad_wq");
213 if (!sst_drv_ctx->mad_wq)
214 goto do_free_drv_ctx;
215 sst_drv_ctx->post_msg_wq = create_workqueue("sst_post_msg_wq");
216 if (!sst_drv_ctx->post_msg_wq)
217 goto free_mad_wq;
218 sst_drv_ctx->process_msg_wq = create_workqueue("sst_process_msg_wqq");
219 if (!sst_drv_ctx->process_msg_wq)
220 goto free_post_msg_wq;
221 sst_drv_ctx->process_reply_wq = create_workqueue("sst_proces_reply_wq");
222 if (!sst_drv_ctx->process_reply_wq)
223 goto free_process_msg_wq;
224
225 for (i = 0; i < MAX_ACTIVE_STREAM; i++) {
226 sst_drv_ctx->alloc_block[i].sst_id = BLOCK_UNINIT;
227 sst_drv_ctx->alloc_block[i].ops_block.condition = false;
228 }
229 spin_lock_init(&sst_drv_ctx->list_spin_lock);
230
231 sst_drv_ctx->max_streams = pci_id->driver_data;
232 pr_debug("Got drv data max stream %d\n",
233 sst_drv_ctx->max_streams);
234 for (i = 1; i <= sst_drv_ctx->max_streams; i++) {
235 struct stream_info *stream = &sst_drv_ctx->streams[i];
236 INIT_LIST_HEAD(&stream->bufs);
237 mutex_init(&stream->lock);
238 spin_lock_init(&stream->pcm_lock);
239 }
240 if (sst_drv_ctx->pci_id == SST_MRST_PCI_ID) {
241 sst_drv_ctx->mmap_mem = NULL;
242 sst_drv_ctx->mmap_len = SST_MMAP_PAGES * PAGE_SIZE;
243 while (sst_drv_ctx->mmap_len > 0) {
244 sst_drv_ctx->mmap_mem =
245 kzalloc(sst_drv_ctx->mmap_len, GFP_KERNEL);
246 if (sst_drv_ctx->mmap_mem) {
247 pr_debug("Got memory %p size 0x%x\n",
248 sst_drv_ctx->mmap_mem,
249 sst_drv_ctx->mmap_len);
250 break;
251 }
252 if (sst_drv_ctx->mmap_len < (SST_MMAP_STEP*PAGE_SIZE)) {
253 pr_err("mem alloc fail...abort!!\n");
254 ret = -ENOMEM;
255 goto free_process_reply_wq;
256 }
257 sst_drv_ctx->mmap_len -= (SST_MMAP_STEP * PAGE_SIZE);
258 pr_debug("mem alloc failed...trying %d\n",
259 sst_drv_ctx->mmap_len);
260 }
261 }
262
263 /* Init the device */
264 ret = pci_enable_device(pci);
265 if (ret) {
266 pr_err("device can't be enabled\n");
267 goto do_free_mem;
268 }
269 sst_drv_ctx->pci = pci_dev_get(pci);
270 ret = pci_request_regions(pci, SST_DRV_NAME);
271 if (ret)
272 goto do_disable_device;
273 /* map registers */
274 /* SST Shim */
275 sst_drv_ctx->shim_phy_add = pci_resource_start(pci, 1);
276 sst_drv_ctx->shim = pci_ioremap_bar(pci, 1);
277 if (!sst_drv_ctx->shim)
278 goto do_release_regions;
279 pr_debug("SST Shim Ptr %p\n", sst_drv_ctx->shim);
280
281 /* Shared SRAM */
282 sst_drv_ctx->mailbox = pci_ioremap_bar(pci, 2);
283 if (!sst_drv_ctx->mailbox)
284 goto do_unmap_shim;
285 pr_debug("SRAM Ptr %p\n", sst_drv_ctx->mailbox);
286
287 /* IRAM */
288 sst_drv_ctx->iram = pci_ioremap_bar(pci, 3);
289 if (!sst_drv_ctx->iram)
290 goto do_unmap_sram;
291 pr_debug("IRAM Ptr %p\n", sst_drv_ctx->iram);
292
293 /* DRAM */
294 sst_drv_ctx->dram = pci_ioremap_bar(pci, 4);
295 if (!sst_drv_ctx->dram)
296 goto do_unmap_iram;
297 pr_debug("DRAM Ptr %p\n", sst_drv_ctx->dram);
298
299 mutex_lock(&sst_drv_ctx->sst_lock);
300 sst_drv_ctx->sst_state = SST_UN_INIT;
301 mutex_unlock(&sst_drv_ctx->sst_lock);
302 /* Register the ISR */
303 ret = request_irq(pci->irq, intel_sst_interrupt,
304 IRQF_SHARED, SST_DRV_NAME, sst_drv_ctx);
305 if (ret)
306 goto do_unmap_dram;
307 pr_debug("Registered IRQ 0x%x\n", pci->irq);
308
309 /*Register LPE Control as misc driver*/
310 ret = misc_register(&lpe_ctrl);
311 if (ret) {
312 pr_err("couldn't register control device\n");
313 goto do_free_irq;
314 }
315
316 if (sst_drv_ctx->pci_id == SST_MRST_PCI_ID) {
317 ret = misc_register(&lpe_dev);
318 if (ret) {
319 pr_err("couldn't register LPE device\n");
320 goto do_free_misc;
321 }
322 } else if (sst_drv_ctx->pci_id == SST_MFLD_PCI_ID) {
323 u32 csr;
324
325 /*allocate mem for fw context save during suspend*/
326 sst_drv_ctx->fw_cntx = kzalloc(FW_CONTEXT_MEM, GFP_KERNEL);
327 if (!sst_drv_ctx->fw_cntx) {
328 ret = -ENOMEM;
329 goto do_free_misc;
330 }
331 /*setting zero as that is valid mem to restore*/
332 sst_drv_ctx->fw_cntx_size = 0;
333
334 /*set lpe start clock and ram size*/
335 csr = sst_shim_read(sst_drv_ctx->shim, SST_CSR);
336 csr |= 0x30060; /*remove the clock ratio after fw fix*/
337 sst_shim_write(sst_drv_ctx->shim, SST_CSR, csr);
338 }
339 sst_drv_ctx->lpe_stalled = 0;
340 pm_runtime_set_active(&pci->dev);
341 pm_runtime_enable(&pci->dev);
342 pm_runtime_allow(&pci->dev);
343 pr_debug("...successfully done!!!\n");
344 return ret;
345
346 do_free_misc:
347 misc_deregister(&lpe_ctrl);
348 do_free_irq:
349 free_irq(pci->irq, sst_drv_ctx);
350 do_unmap_dram:
351 iounmap(sst_drv_ctx->dram);
352 do_unmap_iram:
353 iounmap(sst_drv_ctx->iram);
354 do_unmap_sram:
355 iounmap(sst_drv_ctx->mailbox);
356 do_unmap_shim:
357 iounmap(sst_drv_ctx->shim);
358 do_release_regions:
359 pci_release_regions(pci);
360 do_disable_device:
361 pci_disable_device(pci);
362 do_free_mem:
363 kfree(sst_drv_ctx->mmap_mem);
364 free_process_reply_wq:
365 destroy_workqueue(sst_drv_ctx->process_reply_wq);
366 free_process_msg_wq:
367 destroy_workqueue(sst_drv_ctx->process_msg_wq);
368 free_post_msg_wq:
369 destroy_workqueue(sst_drv_ctx->post_msg_wq);
370 free_mad_wq:
371 destroy_workqueue(sst_drv_ctx->mad_wq);
372 do_free_drv_ctx:
373 kfree(sst_drv_ctx);
374 sst_drv_ctx = NULL;
375 pr_err("Probe failed with %d\n", ret);
376 return ret;
377 }
378
379 /**
380 * intel_sst_remove - PCI remove function
381 *
382 * @pci: PCI device structure
383 *
384 * This function is called by OS when a device is unloaded
385 * This frees the interrupt etc
386 */
387 static void __devexit intel_sst_remove(struct pci_dev *pci)
388 {
389 pci_dev_put(sst_drv_ctx->pci);
390 mutex_lock(&sst_drv_ctx->sst_lock);
391 sst_drv_ctx->sst_state = SST_UN_INIT;
392 mutex_unlock(&sst_drv_ctx->sst_lock);
393 misc_deregister(&lpe_ctrl);
394 free_irq(pci->irq, sst_drv_ctx);
395 iounmap(sst_drv_ctx->dram);
396 iounmap(sst_drv_ctx->iram);
397 iounmap(sst_drv_ctx->mailbox);
398 iounmap(sst_drv_ctx->shim);
399 sst_drv_ctx->pmic_state = SND_MAD_UN_INIT;
400 if (sst_drv_ctx->pci_id == SST_MRST_PCI_ID) {
401 misc_deregister(&lpe_dev);
402 kfree(sst_drv_ctx->mmap_mem);
403 } else
404 kfree(sst_drv_ctx->fw_cntx);
405 flush_scheduled_work();
406 destroy_workqueue(sst_drv_ctx->process_reply_wq);
407 destroy_workqueue(sst_drv_ctx->process_msg_wq);
408 destroy_workqueue(sst_drv_ctx->post_msg_wq);
409 destroy_workqueue(sst_drv_ctx->mad_wq);
410 kfree(sst_drv_ctx);
411 sst_drv_ctx = NULL;
412 pci_release_regions(pci);
413 pci_disable_device(pci);
414 pci_set_drvdata(pci, NULL);
415 }
416
417 void sst_save_dsp_context(void)
418 {
419 struct snd_sst_ctxt_params fw_context;
420 unsigned int pvt_id, i;
421 struct ipc_post *msg = NULL;
422
423 /*check cpu type*/
424 if (sst_drv_ctx->pci_id != SST_MFLD_PCI_ID)
425 return;
426 /*not supported for rest*/
427 if (sst_drv_ctx->sst_state != SST_FW_RUNNING) {
428 pr_debug("fw not running no context save ...\n");
429 return;
430 }
431
432 /*send msg to fw*/
433 if (sst_create_large_msg(&msg))
434 return;
435 pvt_id = sst_assign_pvt_id(sst_drv_ctx);
436 i = sst_get_block_stream(sst_drv_ctx);
437 sst_drv_ctx->alloc_block[i].sst_id = pvt_id;
438 sst_fill_header(&msg->header, IPC_IA_GET_FW_CTXT, 1, pvt_id);
439 msg->header.part.data = sizeof(fw_context) + sizeof(u32);
440 fw_context.address = virt_to_phys((void *)sst_drv_ctx->fw_cntx);
441 fw_context.size = FW_CONTEXT_MEM;
442 memcpy(msg->mailbox_data, &msg->header, sizeof(u32));
443 memcpy(msg->mailbox_data + sizeof(u32),
444 &fw_context, sizeof(fw_context));
445 spin_lock(&sst_drv_ctx->list_spin_lock);
446 list_add_tail(&msg->node, &sst_drv_ctx->ipc_dispatch_list);
447 spin_unlock(&sst_drv_ctx->list_spin_lock);
448 sst_post_message(&sst_drv_ctx->ipc_post_msg_wq);
449 /*wait for reply*/
450 if (sst_wait_timeout(sst_drv_ctx, &sst_drv_ctx->alloc_block[i]))
451 pr_debug("err fw context save timeout ...\n");
452 sst_drv_ctx->alloc_block[i].sst_id = BLOCK_UNINIT;
453 pr_debug("fw context saved ...\n");
454 return;
455 }
456
457 /* Power Management */
458 /*
459 * intel_sst_suspend - PCI suspend function
460 *
461 * @pci: PCI device structure
462 * @state: PM message
463 *
464 * This function is called by OS when a power event occurs
465 */
466 int intel_sst_suspend(struct pci_dev *pci, pm_message_t state)
467 {
468 union config_status_reg csr;
469
470 pr_debug("intel_sst_suspend called\n");
471
472 if (sst_drv_ctx->stream_cnt) {
473 pr_err("active streams,not able to suspend\n");
474 return -EBUSY;
475 }
476 /*save fw context*/
477 sst_save_dsp_context();
478 /*Assert RESET on LPE Processor*/
479 csr.full = sst_shim_read(sst_drv_ctx->shim, SST_CSR);
480 csr.full = csr.full | 0x2;
481 /* Move the SST state to Suspended */
482 mutex_lock(&sst_drv_ctx->sst_lock);
483 sst_drv_ctx->sst_state = SST_SUSPENDED;
484 sst_shim_write(sst_drv_ctx->shim, SST_CSR, csr.full);
485 mutex_unlock(&sst_drv_ctx->sst_lock);
486 pci_set_drvdata(pci, sst_drv_ctx);
487 pci_save_state(pci);
488 pci_disable_device(pci);
489 pci_set_power_state(pci, PCI_D3hot);
490 return 0;
491 }
492
493 /**
494 * intel_sst_resume - PCI resume function
495 *
496 * @pci: PCI device structure
497 *
498 * This function is called by OS when a power event occurs
499 */
500 int intel_sst_resume(struct pci_dev *pci)
501 {
502 int ret = 0;
503
504 pr_debug("intel_sst_resume called\n");
505 if (sst_drv_ctx->sst_state != SST_SUSPENDED) {
506 pr_err("SST is not in suspended state\n");
507 return 0;
508 }
509 sst_drv_ctx = pci_get_drvdata(pci);
510 pci_set_power_state(pci, PCI_D0);
511 pci_restore_state(pci);
512 ret = pci_enable_device(pci);
513 if (ret)
514 pr_err("device can't be enabled\n");
515
516 mutex_lock(&sst_drv_ctx->sst_lock);
517 sst_drv_ctx->sst_state = SST_UN_INIT;
518 mutex_unlock(&sst_drv_ctx->sst_lock);
519 return 0;
520 }
521
522 static int intel_sst_runtime_suspend(struct device *dev)
523 {
524 struct pci_dev *pci_dev = to_pci_dev(dev);
525 pr_debug("runtime_suspend called\n");
526 return intel_sst_suspend(pci_dev, PMSG_SUSPEND);
527 }
528
529 static int intel_sst_runtime_resume(struct device *dev)
530 {
531 struct pci_dev *pci_dev = to_pci_dev(dev);
532 pr_debug("runtime_resume called\n");
533 return intel_sst_resume(pci_dev);
534 }
535
536 static int intel_sst_runtime_idle(struct device *dev)
537 {
538 pr_debug("runtime_idle called\n");
539 if (sst_drv_ctx->stream_cnt == 0 && sst_drv_ctx->am_cnt == 0)
540 pm_schedule_suspend(dev, SST_SUSPEND_DELAY);
541 return -EBUSY;
542 }
543
544 static const struct dev_pm_ops intel_sst_pm = {
545 .runtime_suspend = intel_sst_runtime_suspend,
546 .runtime_resume = intel_sst_runtime_resume,
547 .runtime_idle = intel_sst_runtime_idle,
548 };
549
550 /* PCI Routines */
551 static struct pci_device_id intel_sst_ids[] = {
552 { PCI_VDEVICE(INTEL, SST_MRST_PCI_ID), 3},
553 { PCI_VDEVICE(INTEL, SST_MFLD_PCI_ID), 6},
554 { 0, }
555 };
556 MODULE_DEVICE_TABLE(pci, intel_sst_ids);
557
558 static struct pci_driver driver = {
559 .name = SST_DRV_NAME,
560 .id_table = intel_sst_ids,
561 .probe = intel_sst_probe,
562 .remove = __devexit_p(intel_sst_remove),
563 #ifdef CONFIG_PM
564 .suspend = intel_sst_suspend,
565 .resume = intel_sst_resume,
566 .driver = {
567 .pm = &intel_sst_pm,
568 },
569 #endif
570 };
571
572 /**
573 * intel_sst_init - Module init function
574 *
575 * Registers with PCI
576 * Registers with /dev
577 * Init all data strutures
578 */
579 static int __init intel_sst_init(void)
580 {
581 /* Init all variables, data structure etc....*/
582 int ret = 0;
583 pr_debug("INFO: ******** SST DRIVER loading.. Ver: %s\n",
584 SST_DRIVER_VERSION);
585
586 mutex_init(&drv_ctx_lock);
587 /* Register with PCI */
588 ret = pci_register_driver(&driver);
589 if (ret)
590 pr_err("PCI register failed\n");
591 return ret;
592 }
593
594 /**
595 * intel_sst_exit - Module exit function
596 *
597 * Unregisters with PCI
598 * Unregisters with /dev
599 * Frees all data strutures
600 */
601 static void __exit intel_sst_exit(void)
602 {
603 pci_unregister_driver(&driver);
604
605 pr_debug("driver unloaded\n");
606 sst_drv_ctx = NULL;
607 return;
608 }
609
610 module_init(intel_sst_init);
611 module_exit(intel_sst_exit);
This page took 0.041941 seconds and 4 git commands to generate.