Merge branch 'next/drivers' into HEAD
[deliverable/linux.git] / drivers / staging / ipack / bridges / tpci200.h
1 /**
2 * tpci200.h
3 *
4 * driver for the carrier TEWS TPCI-200
5 * Copyright (c) 2009 Nicolas Serafini, EIC2 SA
6 * Copyright (c) 2010,2011 Samuel Iglesias Gonsalvez <siglesia@cern.ch>, CERN
7 * Copyright (c) 2012 Samuel Iglesias Gonsalvez <siglesias@igalia.com>, Igalia
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the Free
11 * Software Foundation; version 2 of the License.
12 */
13
14 #ifndef _TPCI200_H_
15 #define _TPCI200_H_
16
17 #include <linux/limits.h>
18 #include <linux/pci.h>
19 #include <linux/spinlock.h>
20 #include <linux/swab.h>
21 #include <linux/io.h>
22
23 #include "../ipack.h"
24
25 #define TPCI200_NB_SLOT 0x4
26 #define TPCI200_NB_BAR 0x6
27
28 #define TPCI200_VENDOR_ID 0x1498
29 #define TPCI200_DEVICE_ID 0x30C8
30 #define TPCI200_SUBVENDOR_ID 0x1498
31 #define TPCI200_SUBDEVICE_ID 0x300A
32
33 #define TPCI200_CFG_MEM_BAR 0
34 #define TPCI200_IP_INTERFACE_BAR 2
35 #define TPCI200_IO_ID_INT_SPACES_BAR 3
36 #define TPCI200_MEM16_SPACE_BAR 4
37 #define TPCI200_MEM8_SPACE_BAR 5
38
39 struct tpci200_regs {
40 __le16 revision;
41 /* writes to control should occur with the mutex held to protect
42 * read-modify-write operations */
43 __le16 control[4];
44 __le16 reset;
45 __le16 status;
46 u8 reserved[242];
47 } __packed;
48
49 #define TPCI200_IFACE_SIZE 0x100
50
51 #define TPCI200_IO_SPACE_OFF 0x0000
52 #define TPCI200_IO_SPACE_GAP 0x0100
53 #define TPCI200_IO_SPACE_SIZE 0x0080
54 #define TPCI200_ID_SPACE_OFF 0x0080
55 #define TPCI200_ID_SPACE_GAP 0x0100
56 #define TPCI200_ID_SPACE_SIZE 0x0040
57 #define TPCI200_INT_SPACE_OFF 0x00C0
58 #define TPCI200_INT_SPACE_GAP 0x0100
59 #define TPCI200_INT_SPACE_SIZE 0x0040
60 #define TPCI200_IOIDINT_SIZE 0x0400
61
62 #define TPCI200_MEM8_GAP 0x00400000
63 #define TPCI200_MEM8_SIZE 0x00400000
64 #define TPCI200_MEM16_GAP 0x00800000
65 #define TPCI200_MEM16_SIZE 0x00800000
66
67 /* control field in tpci200_regs */
68 #define TPCI200_INT0_EN 0x0040
69 #define TPCI200_INT1_EN 0x0080
70 #define TPCI200_INT0_EDGE 0x0010
71 #define TPCI200_INT1_EDGE 0x0020
72 #define TPCI200_ERR_INT_EN 0x0008
73 #define TPCI200_TIME_INT_EN 0x0004
74 #define TPCI200_RECOVER_EN 0x0002
75 #define TPCI200_CLK32 0x0001
76
77 /* reset field in tpci200_regs */
78 #define TPCI200_A_RESET 0x0001
79 #define TPCI200_B_RESET 0x0002
80 #define TPCI200_C_RESET 0x0004
81 #define TPCI200_D_RESET 0x0008
82
83 /* status field in tpci200_regs */
84 #define TPCI200_A_TIMEOUT 0x1000
85 #define TPCI200_B_TIMEOUT 0x2000
86 #define TPCI200_C_TIMEOUT 0x4000
87 #define TPCI200_D_TIMEOUT 0x8000
88
89 #define TPCI200_A_ERROR 0x0100
90 #define TPCI200_B_ERROR 0x0200
91 #define TPCI200_C_ERROR 0x0400
92 #define TPCI200_D_ERROR 0x0800
93
94 #define TPCI200_A_INT0 0x0001
95 #define TPCI200_A_INT1 0x0002
96 #define TPCI200_B_INT0 0x0004
97 #define TPCI200_B_INT1 0x0008
98 #define TPCI200_C_INT0 0x0010
99 #define TPCI200_C_INT1 0x0020
100 #define TPCI200_D_INT0 0x0040
101 #define TPCI200_D_INT1 0x0080
102
103 #define TPCI200_SLOT_INT_MASK 0x00FF
104
105 /* PCI Configuration registers. The PCI bridge is a PLX Technology PCI9030. */
106 #define LAS1_DESC 0x2C
107 #define LAS2_DESC 0x30
108
109 /* Bits in the LAS?_DESC registers */
110 #define LAS_BIT_BIGENDIAN 24
111
112 #define VME_IOID_SPACE "IOID"
113 #define VME_MEM_SPACE "MEM"
114
115 /**
116 * struct slot_irq - slot IRQ definition.
117 * @vector Vector number
118 * @handler Handler called when IRQ arrives
119 * @arg Handler argument
120 *
121 */
122 struct slot_irq {
123 struct ipack_device *holder;
124 int vector;
125 irqreturn_t (*handler)(void *);
126 void *arg;
127 };
128
129 /**
130 * struct tpci200_slot - data specific to the tpci200 slot.
131 * @slot_id Slot identification gived to external interface
132 * @irq Slot IRQ infos
133 * @io_phys IO physical base address register of the slot
134 * @id_phys ID physical base address register of the slot
135 * @int_phys INT physical base address register of the slot
136 * @mem_phys MEM physical base address register of the slot
137 *
138 */
139 struct tpci200_slot {
140 struct slot_irq *irq;
141 struct ipack_addr_space io_phys;
142 struct ipack_addr_space id_phys;
143 struct ipack_addr_space int_phys;
144 struct ipack_addr_space mem_phys;
145 };
146
147 /**
148 * struct tpci200_infos - informations specific of the TPCI200 tpci200.
149 * @pci_dev PCI device
150 * @interface_regs Pointer to IP interface space (Bar 2)
151 * @ioidint_space Pointer to IP ID, IO and INT space (Bar 3)
152 * @mem8_space Pointer to MEM space (Bar 4)
153 *
154 */
155 struct tpci200_infos {
156 struct pci_dev *pdev;
157 struct pci_device_id *id_table;
158 struct tpci200_regs __iomem *interface_regs;
159 void __iomem *ioidint_space;
160 void __iomem *mem8_space;
161 void __iomem *cfg_regs;
162 struct ipack_bus_device *ipack_bus;
163 };
164 struct tpci200_board {
165 unsigned int number;
166 struct mutex mutex;
167 spinlock_t regs_lock;
168 struct tpci200_slot *slots;
169 struct tpci200_infos *info;
170 };
171
172 #endif /* _TPCI200_H_ */
This page took 0.067575 seconds and 5 git commands to generate.