drivers/staging/media/solo6x10/p2m.c

   1 /*
   2  * Copyright (C) 2010-2013 Bluecherry, LLC <http://www.bluecherrydvr.com>
   3  *
   4  * Original author:
   5  * Ben Collins <bcollins@ubuntu.com>
   6  *
   7  * Additional work by:
   8  * John Brooks <john.brooks@bluecherry.net>
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License as published by
  12  * the Free Software Foundation; either version 2 of the License, or
  13  * (at your option) any later version.
  14  *
  15  * This program is distributed in the hope that it will be useful,
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18  * GNU General Public License for more details.
  19  *
  20  * You should have received a copy of the GNU General Public License
  21  * along with this program; if not, write to the Free Software
  22  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  23  */
  24
  25 #include <linux/kernel.h>
  26 #include <linux/module.h>
  27 #include <linux/slab.h>
  28
  29 #include "solo6x10.h"
  30
  31 static int multi_p2m;
  32 module_param(multi_p2m, uint, 0644);
  33 MODULE_PARM_DESC(multi_p2m,
  34                  "Use multiple P2M DMA channels (default: no, 6010-only)");
  35
  36 static int desc_mode;
  37 module_param(desc_mode, uint, 0644);
  38 MODULE_PARM_DESC(desc_mode,
  39                  "Allow use of descriptor mode DMA (default: no, 6010-only)");
  40
  41 int solo_p2m_dma(struct solo_dev *solo_dev, int wr,
  42                  void *sys_addr, u32 ext_addr, u32 size,
  43                  int repeat, u32 ext_size)
  44 {
  45         dma_addr_t dma_addr;
  46         int ret;
  47
  48         if (WARN_ON_ONCE((unsigned long)sys_addr & 0x03))
  49                 return -EINVAL;
  50         if (WARN_ON_ONCE(!size))
  51                 return -EINVAL;
  52
  53         dma_addr = pci_map_single(solo_dev->pdev, sys_addr, size,
  54                                   wr ? PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
  55         if (pci_dma_mapping_error(solo_dev->pdev, dma_addr))
  56                 return -ENOMEM;
  57
  58         ret = solo_p2m_dma_t(solo_dev, wr, dma_addr, ext_addr, size,
  59                              repeat, ext_size);
  60
  61         pci_unmap_single(solo_dev->pdev, dma_addr, size,
  62                          wr ? PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
  63
  64         return ret;
  65 }
  66
  67 /* Mutex must be held for p2m_id before calling this!! */
  68 int solo_p2m_dma_desc(struct solo_dev *solo_dev,
  69                       struct solo_p2m_desc *desc, dma_addr_t desc_dma,
  70                       int desc_cnt)
  71 {
  72         struct solo_p2m_dev *p2m_dev;
  73         unsigned int timeout;
  74         unsigned int config = 0;
  75         int ret = 0;
  76         int p2m_id = 0;
  77
  78         /* Get next ID. According to Softlogic, 6110 has problems on !=0 P2M */
  79         if (solo_dev->type != SOLO_DEV_6110 && multi_p2m) {
  80                 p2m_id = atomic_inc_return(&solo_dev->p2m_count) % SOLO_NR_P2M;
  81                 if (p2m_id < 0)
  82                         p2m_id = -p2m_id;
  83         }
  84
  85         p2m_dev = &solo_dev->p2m_dev[p2m_id];
  86
  87         if (mutex_lock_interruptible(&p2m_dev->mutex))
  88                 return -EINTR;
  89
  90         INIT_COMPLETION(p2m_dev->completion);
  91         p2m_dev->error = 0;
  92
  93         if (desc_cnt > 1 && solo_dev->type != SOLO_DEV_6110 && desc_mode) {
  94                 /* For 6010 with more than one desc, we can do a one-shot */
  95                 p2m_dev->desc_count = p2m_dev->desc_idx = 0;
  96                 config = solo_reg_read(solo_dev, SOLO_P2M_CONFIG(p2m_id));
  97
  98                 solo_reg_write(solo_dev, SOLO_P2M_DES_ADR(p2m_id), desc_dma);
  99                 solo_reg_write(solo_dev, SOLO_P2M_DESC_ID(p2m_id), desc_cnt);
 100                 solo_reg_write(solo_dev, SOLO_P2M_CONFIG(p2m_id), config |
 101                                SOLO_P2M_DESC_MODE);
 102         } else {
 103                 /* For single descriptors and 6110, we need to run each desc */
 104                 p2m_dev->desc_count = desc_cnt;
 105                 p2m_dev->desc_idx = 1;
 106                 p2m_dev->descs = desc;
 107
 108                 solo_reg_write(solo_dev, SOLO_P2M_TAR_ADR(p2m_id),
 109                                desc[1].dma_addr);
 110                 solo_reg_write(solo_dev, SOLO_P2M_EXT_ADR(p2m_id),
 111                                desc[1].ext_addr);
 112                 solo_reg_write(solo_dev, SOLO_P2M_EXT_CFG(p2m_id),
 113                                desc[1].cfg);
 114                 solo_reg_write(solo_dev, SOLO_P2M_CONTROL(p2m_id),
 115                                desc[1].ctrl);
 116         }
 117
 118         timeout = wait_for_completion_timeout(&p2m_dev->completion,
 119                                               solo_dev->p2m_jiffies);
 120
 121         if (WARN_ON_ONCE(p2m_dev->error))
 122                 ret = -EIO;
 123         else if (timeout == 0) {
 124                 solo_dev->p2m_timeouts++;
 125                 ret = -EAGAIN;
 126         }
 127
 128         solo_reg_write(solo_dev, SOLO_P2M_CONTROL(p2m_id), 0);
 129
 130         /* Don't write here for the no_desc_mode case, because config is 0.
 131          * We can't test no_desc_mode again, it might race. */
 132         if (desc_cnt > 1 && solo_dev->type != SOLO_DEV_6110 && config)
 133                 solo_reg_write(solo_dev, SOLO_P2M_CONFIG(p2m_id), config);
 134
 135         mutex_unlock(&p2m_dev->mutex);
 136
 137         return ret;
 138 }
 139
 140 void solo_p2m_fill_desc(struct solo_p2m_desc *desc, int wr,
 141                         dma_addr_t dma_addr, u32 ext_addr, u32 size,
 142                         int repeat, u32 ext_size)
 143 {
 144         WARN_ON_ONCE(dma_addr & 0x03);
 145         WARN_ON_ONCE(!size);
 146
 147         desc->cfg = SOLO_P2M_COPY_SIZE(size >> 2);
 148         desc->ctrl = SOLO_P2M_BURST_SIZE(SOLO_P2M_BURST_256) |
 149                 (wr ? SOLO_P2M_WRITE : 0) | SOLO_P2M_TRANS_ON;
 150
 151         if (repeat) {
 152                 desc->cfg |= SOLO_P2M_EXT_INC(ext_size >> 2);
 153                 desc->ctrl |=  SOLO_P2M_PCI_INC(size >> 2) |
 154                          SOLO_P2M_REPEAT(repeat);
 155         }
 156
 157         desc->dma_addr = dma_addr;
 158         desc->ext_addr = ext_addr;
 159 }
 160
 161 int solo_p2m_dma_t(struct solo_dev *solo_dev, int wr,
 162                    dma_addr_t dma_addr, u32 ext_addr, u32 size,
 163                    int repeat, u32 ext_size)
 164 {
 165         struct solo_p2m_desc desc[2];
 166
 167         solo_p2m_fill_desc(&desc[1], wr, dma_addr, ext_addr, size, repeat,
 168                            ext_size);
 169
 170         /* No need for desc_dma since we know it is a single-shot */
 171         return solo_p2m_dma_desc(solo_dev, desc, 0, 1);
 172 }
 173
 174 void solo_p2m_isr(struct solo_dev *solo_dev, int id)
 175 {
 176         struct solo_p2m_dev *p2m_dev = &solo_dev->p2m_dev[id];
 177         struct solo_p2m_desc *desc;
 178
 179         if (p2m_dev->desc_count <= p2m_dev->desc_idx) {
 180                 complete(&p2m_dev->completion);
 181                 return;
 182         }
 183
 184         /* Setup next descriptor */
 185         p2m_dev->desc_idx++;
 186         desc = &p2m_dev->descs[p2m_dev->desc_idx];
 187
 188         solo_reg_write(solo_dev, SOLO_P2M_CONTROL(id), 0);
 189         solo_reg_write(solo_dev, SOLO_P2M_TAR_ADR(id), desc->dma_addr);
 190         solo_reg_write(solo_dev, SOLO_P2M_EXT_ADR(id), desc->ext_addr);
 191         solo_reg_write(solo_dev, SOLO_P2M_EXT_CFG(id), desc->cfg);
 192         solo_reg_write(solo_dev, SOLO_P2M_CONTROL(id), desc->ctrl);
 193 }
 194
 195 void solo_p2m_error_isr(struct solo_dev *solo_dev)
 196 {
 197         unsigned int err = solo_reg_read(solo_dev, SOLO_PCI_ERR);
 198         struct solo_p2m_dev *p2m_dev;
 199         int i;
 200
 201         if (!(err & (SOLO_PCI_ERR_P2M | SOLO_PCI_ERR_P2M_DESC)))
 202                 return;
 203
 204         for (i = 0; i < SOLO_NR_P2M; i++) {
 205                 p2m_dev = &solo_dev->p2m_dev[i];
 206                 p2m_dev->error = 1;
 207                 solo_reg_write(solo_dev, SOLO_P2M_CONTROL(i), 0);
 208                 complete(&p2m_dev->completion);
 209         }
 210 }
 211
 212 void solo_p2m_exit(struct solo_dev *solo_dev)
 213 {
 214         int i;
 215
 216         for (i = 0; i < SOLO_NR_P2M; i++)
 217                 solo_irq_off(solo_dev, SOLO_IRQ_P2M(i));
 218 }
 219
 220 static int solo_p2m_test(struct solo_dev *solo_dev, int base, int size)
 221 {
 222         u32 *wr_buf;
 223         u32 *rd_buf;
 224         int i;
 225         int ret = -EIO;
 226         int order = get_order(size);
 227
 228         wr_buf = (u32 *)__get_free_pages(GFP_KERNEL, order);
 229         if (wr_buf == NULL)
 230                 return -1;
 231
 232         rd_buf = (u32 *)__get_free_pages(GFP_KERNEL, order);
 233         if (rd_buf == NULL) {
 234                 free_pages((unsigned long)wr_buf, order);
 235                 return -1;
 236         }
 237
 238         for (i = 0; i < (size >> 3); i++)
 239                 *(wr_buf + i) = (i << 16) | (i + 1);
 240
 241         for (i = (size >> 3); i < (size >> 2); i++)
 242                 *(wr_buf + i) = ~((i << 16) | (i + 1));
 243
 244         memset(rd_buf, 0x55, size);
 245
 246         if (solo_p2m_dma(solo_dev, 1, wr_buf, base, size, 0, 0))
 247                 goto test_fail;
 248
 249         if (solo_p2m_dma(solo_dev, 0, rd_buf, base, size, 0, 0))
 250                 goto test_fail;
 251
 252         for (i = 0; i < (size >> 2); i++) {
 253                 if (*(wr_buf + i) != *(rd_buf + i))
 254                         goto test_fail;
 255         }
 256
 257         ret = 0;
 258
 259 test_fail:
 260         free_pages((unsigned long)wr_buf, order);
 261         free_pages((unsigned long)rd_buf, order);
 262
 263         return ret;
 264 }
 265
 266 int solo_p2m_init(struct solo_dev *solo_dev)
 267 {
 268         struct solo_p2m_dev *p2m_dev;
 269         int i;
 270
 271         for (i = 0; i < SOLO_NR_P2M; i++) {
 272                 p2m_dev = &solo_dev->p2m_dev[i];
 273
 274                 mutex_init(&p2m_dev->mutex);
 275                 init_completion(&p2m_dev->completion);
 276
 277                 solo_reg_write(solo_dev, SOLO_P2M_CONTROL(i), 0);
 278                 solo_reg_write(solo_dev, SOLO_P2M_CONFIG(i),
 279                                SOLO_P2M_CSC_16BIT_565 |
 280                                SOLO_P2M_DESC_INTR_OPT |
 281                                SOLO_P2M_DMA_INTERVAL(0) |
 282                                SOLO_P2M_PCI_MASTER_MODE);
 283                 solo_irq_on(solo_dev, SOLO_IRQ_P2M(i));
 284         }
 285
 286         /* Find correct SDRAM size */
 287         for (solo_dev->sdram_size = 0, i = 2; i >= 0; i--) {
 288                 solo_reg_write(solo_dev, SOLO_DMA_CTRL,
 289                                SOLO_DMA_CTRL_REFRESH_CYCLE(1) |
 290                                SOLO_DMA_CTRL_SDRAM_SIZE(i) |
 291                                SOLO_DMA_CTRL_SDRAM_CLK_INVERT |
 292                                SOLO_DMA_CTRL_READ_CLK_SELECT |
 293                                SOLO_DMA_CTRL_LATENCY(1));
 294
 295                 solo_reg_write(solo_dev, SOLO_SYS_CFG, solo_dev->sys_config |
 296                                SOLO_SYS_CFG_RESET);
 297                 solo_reg_write(solo_dev, SOLO_SYS_CFG, solo_dev->sys_config);
 298
 299                 switch (i) {
 300                 case 2:
 301                         if (solo_p2m_test(solo_dev, 0x07ff0000, 0x00010000) ||
 302                             solo_p2m_test(solo_dev, 0x05ff0000, 0x00010000))
 303                                 continue;
 304                         break;
 305
 306                 case 1:
 307                         if (solo_p2m_test(solo_dev, 0x03ff0000, 0x00010000))
 308                                 continue;
 309                         break;
 310
 311                 default:
 312                         if (solo_p2m_test(solo_dev, 0x01ff0000, 0x00010000))
 313                                 continue;
 314                 }
 315
 316                 solo_dev->sdram_size = (32 << 20) << i;
 317                 break;
 318         }
 319
 320         if (!solo_dev->sdram_size) {
 321                 dev_err(&solo_dev->pdev->dev, "Error detecting SDRAM size\n");
 322                 return -EIO;
 323         }
 324
 325         if (SOLO_SDRAM_END(solo_dev) > solo_dev->sdram_size) {
 326                 dev_err(&solo_dev->pdev->dev,
 327                         "SDRAM is not large enough (%u < %u)\n",
 328                         solo_dev->sdram_size, SOLO_SDRAM_END(solo_dev));
 329                 return -EIO;
 330         }
 331
 332         return 0;
 333 }