1 /***********************license start***************
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38 ***********************license end**************************************/
44 * "cvmx-usb.c" defines a set of low level USB functions to help
45 * developers create Octeon USB drivers for various operating
46 * systems. These functions provide a generic API to the Octeon
47 * USB blocks, hiding the internal hardware specific
50 #include <linux/delay.h>
51 #include <asm/octeon/cvmx.h>
52 #include <asm/octeon/octeon.h>
53 #include <asm/octeon/cvmx-sysinfo.h>
54 #include "cvmx-usbnx-defs.h"
55 #include "cvmx-usbcx-defs.h"
57 #include <asm/octeon/cvmx-helper.h>
58 #include <asm/octeon/cvmx-helper-board.h>
60 /* Normal prefetch that use the pref instruction. */
61 #define CVMX_PREFETCH(address, offset) asm volatile ("pref %[type], %[off](%[rbase])" : : [rbase] "d" (address), [off] "I" (offset), [type] "n" (0))
63 #define MAX_RETRIES 3 /* Maximum number of times to retry failed transactions */
64 #define MAX_PIPES 32 /* Maximum number of pipes that can be open at once */
65 #define MAX_TRANSACTIONS 256 /* Maximum number of outstanding transactions across all pipes */
66 #define MAX_CHANNELS 8 /* Maximum number of hardware channels supported by the USB block */
67 #define MAX_USB_ADDRESS 127 /* The highest valid USB device address */
68 #define MAX_USB_ENDPOINT 15 /* The highest valid USB endpoint number */
69 #define MAX_USB_HUB_PORT 15 /* The highest valid port number on a hub */
70 #define MAX_TRANSFER_BYTES ((1<<19)-1) /* The low level hardware can transfer a maximum of this number of bytes in each transfer. The field is 19 bits wide */
71 #define MAX_TRANSFER_PACKETS ((1<<10)-1) /* The low level hardware can transfer a maximum of this number of packets in each transfer. The field is 10 bits wide */
73 enum cvmx_usb_transaction_flags
{
74 __CVMX_USB_TRANSACTION_FLAGS_IN_USE
= 1<<16,
78 USB_CLOCK_TYPE_REF_12
,
79 USB_CLOCK_TYPE_REF_24
,
80 USB_CLOCK_TYPE_REF_48
,
81 USB_CLOCK_TYPE_CRYSTAL_12
,
85 * Logical transactions may take numerous low level
86 * transactions, especially when splits are concerned. This
87 * enum represents all of the possible stages a transaction can
88 * be in. Note that split completes are always even. This is so
89 * the NAK handler can backup to the previous low level
90 * transaction with a simple clearing of bit 0.
93 CVMX_USB_STAGE_NON_CONTROL
,
94 CVMX_USB_STAGE_NON_CONTROL_SPLIT_COMPLETE
,
96 CVMX_USB_STAGE_SETUP_SPLIT_COMPLETE
,
98 CVMX_USB_STAGE_DATA_SPLIT_COMPLETE
,
99 CVMX_USB_STAGE_STATUS
,
100 CVMX_USB_STAGE_STATUS_SPLIT_COMPLETE
,
104 * struct cvmx_usb_transaction - describes each pending USB transaction
105 * regardless of type. These are linked together
106 * to form a list of pending requests for a pipe.
108 * @prev: Transaction before this one in the pipe.
109 * @next: Transaction after this one in the pipe.
110 * @type: Type of transaction, duplicated of the pipe.
111 * @flags: State flags for this transaction.
112 * @buffer: User's physical buffer address to read/write.
113 * @buffer_length: Size of the user's buffer in bytes.
114 * @control_header: For control transactions, physical address of the 8
115 * byte standard header.
116 * @iso_start_frame: For ISO transactions, the starting frame number.
117 * @iso_number_packets: For ISO transactions, the number of packets in the
119 * @iso_packets: For ISO transactions, the sub packets in the request.
120 * @actual_bytes: Actual bytes transfer for this transaction.
121 * @stage: For control transactions, the current stage.
122 * @callback: User's callback function when complete.
123 * @callback_data: User's data.
125 struct cvmx_usb_transaction
{
126 struct cvmx_usb_transaction
*prev
;
127 struct cvmx_usb_transaction
*next
;
128 enum cvmx_usb_transfer type
;
129 enum cvmx_usb_transaction_flags flags
;
132 uint64_t control_header
;
134 int iso_number_packets
;
135 struct cvmx_usb_iso_packet
*iso_packets
;
140 enum cvmx_usb_stage stage
;
141 cvmx_usb_callback_func_t callback
;
146 * struct cvmx_usb_pipe - a pipe represents a virtual connection between Octeon
147 * and some USB device. It contains a list of pending
148 * request to the device.
150 * @prev: Pipe before this one in the list
151 * @next: Pipe after this one in the list
152 * @head: The first pending transaction
153 * @tail: The last pending transaction
154 * @interval: For periodic pipes, the interval between packets in
156 * @next_tx_frame: The next frame this pipe is allowed to transmit on
157 * @flags: State flags for this pipe
158 * @device_speed: Speed of device connected to this pipe
159 * @transfer_type: Type of transaction supported by this pipe
160 * @transfer_dir: IN or OUT. Ignored for Control
161 * @multi_count: Max packet in a row for the device
162 * @max_packet: The device's maximum packet size in bytes
163 * @device_addr: USB device address at other end of pipe
164 * @endpoint_num: USB endpoint number at other end of pipe
165 * @hub_device_addr: Hub address this device is connected to
166 * @hub_port: Hub port this device is connected to
167 * @pid_toggle: This toggles between 0/1 on every packet send to track
168 * the data pid needed
169 * @channel: Hardware DMA channel for this pipe
170 * @split_sc_frame: The low order bits of the frame number the split
171 * complete should be sent on
173 struct cvmx_usb_pipe
{
174 struct cvmx_usb_pipe
*prev
;
175 struct cvmx_usb_pipe
*next
;
176 struct cvmx_usb_transaction
*head
;
177 struct cvmx_usb_transaction
*tail
;
179 uint64_t next_tx_frame
;
180 enum cvmx_usb_pipe_flags flags
;
181 enum cvmx_usb_speed device_speed
;
182 enum cvmx_usb_transfer transfer_type
;
183 enum cvmx_usb_direction transfer_dir
;
187 uint8_t endpoint_num
;
188 uint8_t hub_device_addr
;
192 int8_t split_sc_frame
;
196 * struct cvmx_usb_pipe_list
198 * @head: Head of the list, or NULL if empty.
199 * @tail: Tail if the list, or NULL if empty.
201 struct cvmx_usb_pipe_list
{
202 struct cvmx_usb_pipe
*head
;
203 struct cvmx_usb_pipe
*tail
;
206 struct cvmx_usb_tx_fifo
{
211 } entry
[MAX_CHANNELS
+1];
217 * struct cvmx_usb_internal_state - the state of the USB block
219 * init_flags: Flags passed to initialize.
220 * index: Which USB block this is for.
221 * idle_hardware_channels: Bit set for every idle hardware channel.
222 * usbcx_hprt: Stored port status so we don't need to read a CSR to
224 * pipe_for_channel: Map channels to pipes.
225 * free_transaction_head: List of free transactions head.
226 * free_transaction_tail: List of free transactions tail.
227 * pipe: Storage for pipes.
228 * transaction: Storage for transactions.
229 * callback: User global callbacks.
230 * callback_data: User data for each callback.
231 * indent: Used by debug output to indent functions.
232 * port_status: Last port status used for change notification.
233 * free_pipes: List of all pipes that are currently closed.
234 * idle_pipes: List of open pipes that have no transactions.
235 * active_pipes: Active pipes indexed by transfer type.
236 * frame_number: Increments every SOF interrupt for time keeping.
237 * active_split: Points to the current active split, or NULL.
239 struct cvmx_usb_internal_state
{
242 int idle_hardware_channels
;
243 union cvmx_usbcx_hprt usbcx_hprt
;
244 struct cvmx_usb_pipe
*pipe_for_channel
[MAX_CHANNELS
];
245 struct cvmx_usb_transaction
*free_transaction_head
;
246 struct cvmx_usb_transaction
*free_transaction_tail
;
247 struct cvmx_usb_pipe pipe
[MAX_PIPES
];
248 struct cvmx_usb_transaction transaction
[MAX_TRANSACTIONS
];
249 cvmx_usb_callback_func_t callback
[__CVMX_USB_CALLBACK_END
];
250 void *callback_data
[__CVMX_USB_CALLBACK_END
];
252 struct cvmx_usb_port_status port_status
;
253 struct cvmx_usb_pipe_list free_pipes
;
254 struct cvmx_usb_pipe_list idle_pipes
;
255 struct cvmx_usb_pipe_list active_pipes
[4];
256 uint64_t frame_number
;
257 struct cvmx_usb_transaction
*active_split
;
258 struct cvmx_usb_tx_fifo periodic
;
259 struct cvmx_usb_tx_fifo nonperiodic
;
262 /* This macro spins on a field waiting for it to reach a value */
263 #define CVMX_WAIT_FOR_FIELD32(address, type, field, op, value, timeout_usec)\
266 uint64_t done = cvmx_get_cycle() + (uint64_t)timeout_usec * \
267 octeon_get_clock_rate() / 1000000; \
270 c.u32 = __cvmx_usb_read_csr32(usb, address); \
271 if (c.s.field op (value)) { \
274 } else if (cvmx_get_cycle() > done) { \
284 * This macro logically sets a single field in a CSR. It does the sequence
285 * read, modify, and write
287 #define USB_SET_FIELD32(address, type, field, value) \
290 c.u32 = __cvmx_usb_read_csr32(usb, address); \
292 __cvmx_usb_write_csr32(usb, address, c.u32); \
295 /* Returns the IO address to push/pop stuff data from the FIFOs */
296 #define USB_FIFO_ADDRESS(channel, usb_index) (CVMX_USBCX_GOTGCTL(usb_index) + ((channel)+1)*0x1000)
298 static int octeon_usb_get_clock_type(void)
300 switch (cvmx_sysinfo_get()->board_type
) {
301 case CVMX_BOARD_TYPE_BBGW_REF
:
302 case CVMX_BOARD_TYPE_LANAI2_A
:
303 case CVMX_BOARD_TYPE_LANAI2_U
:
304 case CVMX_BOARD_TYPE_LANAI2_G
:
305 case CVMX_BOARD_TYPE_UBNT_E100
:
306 return USB_CLOCK_TYPE_CRYSTAL_12
;
308 return USB_CLOCK_TYPE_REF_48
;
312 * Read a USB 32bit CSR. It performs the necessary address swizzle
313 * for 32bit CSRs and logs the value in a readable format if
316 * @usb: USB block this access is for
317 * @address: 64bit address to read
319 * Returns: Result of the read
321 static inline uint32_t __cvmx_usb_read_csr32(struct cvmx_usb_internal_state
*usb
,
324 uint32_t result
= cvmx_read64_uint32(address
^ 4);
330 * Write a USB 32bit CSR. It performs the necessary address
331 * swizzle for 32bit CSRs and logs the value in a readable format
332 * if debugging is on.
334 * @usb: USB block this access is for
335 * @address: 64bit address to write
336 * @value: Value to write
338 static inline void __cvmx_usb_write_csr32(struct cvmx_usb_internal_state
*usb
,
339 uint64_t address
, uint32_t value
)
341 cvmx_write64_uint32(address
^ 4, value
);
342 cvmx_read64_uint64(CVMX_USBNX_DMA0_INB_CHN0(usb
->index
));
347 * Read a USB 64bit CSR. It logs the value in a readable format if
350 * @usb: USB block this access is for
351 * @address: 64bit address to read
353 * Returns: Result of the read
355 static inline uint64_t __cvmx_usb_read_csr64(struct cvmx_usb_internal_state
*usb
,
358 uint64_t result
= cvmx_read64_uint64(address
);
364 * Write a USB 64bit CSR. It logs the value in a readable format
365 * if debugging is on.
367 * @usb: USB block this access is for
368 * @address: 64bit address to write
369 * @value: Value to write
371 static inline void __cvmx_usb_write_csr64(struct cvmx_usb_internal_state
*usb
,
372 uint64_t address
, uint64_t value
)
374 cvmx_write64_uint64(address
, value
);
378 * Return non zero if this pipe connects to a non HIGH speed
379 * device through a high speed hub.
381 * @usb: USB block this access is for
382 * @pipe: Pipe to check
384 * Returns: Non zero if we need to do split transactions
386 static inline int __cvmx_usb_pipe_needs_split(struct cvmx_usb_internal_state
*usb
, struct cvmx_usb_pipe
*pipe
)
388 return ((pipe
->device_speed
!= CVMX_USB_SPEED_HIGH
) && (usb
->usbcx_hprt
.s
.prtspd
== CVMX_USB_SPEED_HIGH
));
393 * Trivial utility function to return the correct PID for a pipe
395 * @pipe: pipe to check
397 * Returns: PID for pipe
399 static inline int __cvmx_usb_get_data_pid(struct cvmx_usb_pipe
*pipe
)
401 if (pipe
->pid_toggle
)
402 return 2; /* Data1 */
404 return 0; /* Data0 */
409 * Return the number of USB ports supported by this Octeon
410 * chip. If the chip doesn't support USB, or is not supported
411 * by this API, a zero will be returned. Most Octeon chips
412 * support one usb port, but some support two ports.
413 * cvmx_usb_initialize() must be called on independent
414 * struct cvmx_usb_state.
416 * Returns: Number of port, zero if usb isn't supported
418 int cvmx_usb_get_num_ports(void)
422 if (OCTEON_IS_MODEL(OCTEON_CN56XX
))
424 else if (OCTEON_IS_MODEL(OCTEON_CN52XX
))
426 else if (OCTEON_IS_MODEL(OCTEON_CN50XX
))
428 else if (OCTEON_IS_MODEL(OCTEON_CN31XX
))
430 else if (OCTEON_IS_MODEL(OCTEON_CN30XX
))
440 * Allocate a usb transaction for use
442 * @usb: USB device state populated by
443 * cvmx_usb_initialize().
445 * Returns: Transaction or NULL
447 static inline struct cvmx_usb_transaction
*__cvmx_usb_alloc_transaction(struct cvmx_usb_internal_state
*usb
)
449 struct cvmx_usb_transaction
*t
;
450 t
= usb
->free_transaction_head
;
452 usb
->free_transaction_head
= t
->next
;
453 if (!usb
->free_transaction_head
)
454 usb
->free_transaction_tail
= NULL
;
457 memset(t
, 0, sizeof(*t
));
458 t
->flags
= __CVMX_USB_TRANSACTION_FLAGS_IN_USE
;
465 * Free a usb transaction
467 * @usb: USB device state populated by
468 * cvmx_usb_initialize().
470 * Transaction to free
472 static inline void __cvmx_usb_free_transaction(struct cvmx_usb_internal_state
*usb
,
473 struct cvmx_usb_transaction
*transaction
)
475 transaction
->flags
= 0;
476 transaction
->prev
= NULL
;
477 transaction
->next
= NULL
;
478 if (usb
->free_transaction_tail
)
479 usb
->free_transaction_tail
->next
= transaction
;
481 usb
->free_transaction_head
= transaction
;
482 usb
->free_transaction_tail
= transaction
;
487 * Add a pipe to the tail of a list
488 * @list: List to add pipe to
491 static inline void __cvmx_usb_append_pipe(struct cvmx_usb_pipe_list
*list
, struct cvmx_usb_pipe
*pipe
)
494 pipe
->prev
= list
->tail
;
496 list
->tail
->next
= pipe
;
504 * Remove a pipe from a list
505 * @list: List to remove pipe from
506 * @pipe: Pipe to remove
508 static inline void __cvmx_usb_remove_pipe(struct cvmx_usb_pipe_list
*list
, struct cvmx_usb_pipe
*pipe
)
510 if (list
->head
== pipe
) {
511 list
->head
= pipe
->next
;
514 list
->head
->prev
= NULL
;
517 } else if (list
->tail
== pipe
) {
518 list
->tail
= pipe
->prev
;
519 list
->tail
->next
= NULL
;
522 pipe
->prev
->next
= pipe
->next
;
523 pipe
->next
->prev
= pipe
->prev
;
531 * Initialize a USB port for use. This must be called before any
532 * other access to the Octeon USB port is made. The port starts
533 * off in the disabled state.
535 * @state: Pointer to an empty struct cvmx_usb_state
536 * that will be populated by the initialize call.
537 * This structure is then passed to all other USB
540 * Which Octeon USB port to initialize.
542 * Returns: 0 or a negative error code.
544 int cvmx_usb_initialize(struct cvmx_usb_state
*state
, int usb_port_number
)
546 union cvmx_usbnx_clk_ctl usbn_clk_ctl
;
547 union cvmx_usbnx_usbp_ctl_status usbn_usbp_ctl_status
;
548 struct cvmx_usb_internal_state
*usb
= (struct cvmx_usb_internal_state
*)state
;
549 enum cvmx_usb_initialize_flags flags
= 0;
551 /* Make sure that state is large enough to store the internal state */
552 if (sizeof(*state
) < sizeof(*usb
))
554 /* At first allow 0-1 for the usb port number */
555 if ((usb_port_number
< 0) || (usb_port_number
> 1))
557 /* For all chips except 52XX there is only one port */
558 if (!OCTEON_IS_MODEL(OCTEON_CN52XX
) && (usb_port_number
> 0))
560 /* Try to determine clock type automatically */
561 if (octeon_usb_get_clock_type() == USB_CLOCK_TYPE_CRYSTAL_12
) {
562 /* Only 12 MHZ crystals are supported */
563 flags
|= CVMX_USB_INITIALIZE_FLAGS_CLOCK_XO_XI
;
565 flags
|= CVMX_USB_INITIALIZE_FLAGS_CLOCK_XO_GND
;
567 switch (octeon_usb_get_clock_type()) {
568 case USB_CLOCK_TYPE_REF_12
:
569 flags
|= CVMX_USB_INITIALIZE_FLAGS_CLOCK_12MHZ
;
571 case USB_CLOCK_TYPE_REF_24
:
572 flags
|= CVMX_USB_INITIALIZE_FLAGS_CLOCK_24MHZ
;
574 case USB_CLOCK_TYPE_REF_48
:
575 flags
|= CVMX_USB_INITIALIZE_FLAGS_CLOCK_48MHZ
;
583 memset(usb
, 0, sizeof(*usb
));
584 usb
->init_flags
= flags
;
586 /* Initialize the USB state structure */
589 usb
->index
= usb_port_number
;
591 /* Initialize the transaction double linked list */
592 usb
->free_transaction_head
= NULL
;
593 usb
->free_transaction_tail
= NULL
;
594 for (i
= 0; i
< MAX_TRANSACTIONS
; i
++)
595 __cvmx_usb_free_transaction(usb
, usb
->transaction
+ i
);
596 for (i
= 0; i
< MAX_PIPES
; i
++)
597 __cvmx_usb_append_pipe(&usb
->free_pipes
, usb
->pipe
+ i
);
601 * Power On Reset and PHY Initialization
603 * 1. Wait for DCOK to assert (nothing to do)
605 * 2a. Write USBN0/1_CLK_CTL[POR] = 1 and
606 * USBN0/1_CLK_CTL[HRST,PRST,HCLK_RST] = 0
608 usbn_clk_ctl
.u64
= __cvmx_usb_read_csr64(usb
, CVMX_USBNX_CLK_CTL(usb
->index
));
609 usbn_clk_ctl
.s
.por
= 1;
610 usbn_clk_ctl
.s
.hrst
= 0;
611 usbn_clk_ctl
.s
.prst
= 0;
612 usbn_clk_ctl
.s
.hclk_rst
= 0;
613 usbn_clk_ctl
.s
.enable
= 0;
615 * 2b. Select the USB reference clock/crystal parameters by writing
616 * appropriate values to USBN0/1_CLK_CTL[P_C_SEL, P_RTYPE, P_COM_ON]
618 if (usb
->init_flags
& CVMX_USB_INITIALIZE_FLAGS_CLOCK_XO_GND
) {
620 * The USB port uses 12/24/48MHz 2.5V board clock
621 * source at USB_XO. USB_XI should be tied to GND.
622 * Most Octeon evaluation boards require this setting
624 if (OCTEON_IS_MODEL(OCTEON_CN3XXX
)) {
625 usbn_clk_ctl
.cn31xx
.p_rclk
= 1; /* From CN31XX,CN30XX manual */
626 usbn_clk_ctl
.cn31xx
.p_xenbn
= 0;
627 } else if (OCTEON_IS_MODEL(OCTEON_CN56XX
) || OCTEON_IS_MODEL(OCTEON_CN50XX
))
628 usbn_clk_ctl
.cn56xx
.p_rtype
= 2; /* From CN56XX,CN50XX manual */
630 usbn_clk_ctl
.cn52xx
.p_rtype
= 1; /* From CN52XX manual */
632 switch (flags
& CVMX_USB_INITIALIZE_FLAGS_CLOCK_MHZ_MASK
) {
633 case CVMX_USB_INITIALIZE_FLAGS_CLOCK_12MHZ
:
634 usbn_clk_ctl
.s
.p_c_sel
= 0;
636 case CVMX_USB_INITIALIZE_FLAGS_CLOCK_24MHZ
:
637 usbn_clk_ctl
.s
.p_c_sel
= 1;
639 case CVMX_USB_INITIALIZE_FLAGS_CLOCK_48MHZ
:
640 usbn_clk_ctl
.s
.p_c_sel
= 2;
645 * The USB port uses a 12MHz crystal as clock source
646 * at USB_XO and USB_XI
648 if (OCTEON_IS_MODEL(OCTEON_CN3XXX
)) {
649 usbn_clk_ctl
.cn31xx
.p_rclk
= 1; /* From CN31XX,CN30XX manual */
650 usbn_clk_ctl
.cn31xx
.p_xenbn
= 1;
651 } else if (OCTEON_IS_MODEL(OCTEON_CN56XX
) || OCTEON_IS_MODEL(OCTEON_CN50XX
))
652 usbn_clk_ctl
.cn56xx
.p_rtype
= 0; /* From CN56XX,CN50XX manual */
654 usbn_clk_ctl
.cn52xx
.p_rtype
= 0; /* From CN52XX manual */
656 usbn_clk_ctl
.s
.p_c_sel
= 0;
659 * 2c. Select the HCLK via writing USBN0/1_CLK_CTL[DIVIDE, DIVIDE2] and
660 * setting USBN0/1_CLK_CTL[ENABLE] = 1. Divide the core clock down
661 * such that USB is as close as possible to 125Mhz
664 int divisor
= (octeon_get_clock_rate()+125000000-1)/125000000;
665 if (divisor
< 4) /* Lower than 4 doesn't seem to work properly */
667 usbn_clk_ctl
.s
.divide
= divisor
;
668 usbn_clk_ctl
.s
.divide2
= 0;
670 __cvmx_usb_write_csr64(usb
, CVMX_USBNX_CLK_CTL(usb
->index
),
672 /* 2d. Write USBN0/1_CLK_CTL[HCLK_RST] = 1 */
673 usbn_clk_ctl
.s
.hclk_rst
= 1;
674 __cvmx_usb_write_csr64(usb
, CVMX_USBNX_CLK_CTL(usb
->index
),
676 /* 2e. Wait 64 core-clock cycles for HCLK to stabilize */
679 * 3. Program the power-on reset field in the USBN clock-control
681 * USBN_CLK_CTL[POR] = 0
683 usbn_clk_ctl
.s
.por
= 0;
684 __cvmx_usb_write_csr64(usb
, CVMX_USBNX_CLK_CTL(usb
->index
),
686 /* 4. Wait 1 ms for PHY clock to start */
689 * 5. Program the Reset input from automatic test equipment field in the
690 * USBP control and status register:
691 * USBN_USBP_CTL_STATUS[ATE_RESET] = 1
693 usbn_usbp_ctl_status
.u64
= __cvmx_usb_read_csr64(usb
, CVMX_USBNX_USBP_CTL_STATUS(usb
->index
));
694 usbn_usbp_ctl_status
.s
.ate_reset
= 1;
695 __cvmx_usb_write_csr64(usb
, CVMX_USBNX_USBP_CTL_STATUS(usb
->index
),
696 usbn_usbp_ctl_status
.u64
);
697 /* 6. Wait 10 cycles */
700 * 7. Clear ATE_RESET field in the USBN clock-control register:
701 * USBN_USBP_CTL_STATUS[ATE_RESET] = 0
703 usbn_usbp_ctl_status
.s
.ate_reset
= 0;
704 __cvmx_usb_write_csr64(usb
, CVMX_USBNX_USBP_CTL_STATUS(usb
->index
),
705 usbn_usbp_ctl_status
.u64
);
707 * 8. Program the PHY reset field in the USBN clock-control register:
708 * USBN_CLK_CTL[PRST] = 1
710 usbn_clk_ctl
.s
.prst
= 1;
711 __cvmx_usb_write_csr64(usb
, CVMX_USBNX_CLK_CTL(usb
->index
),
714 * 9. Program the USBP control and status register to select host or
715 * device mode. USBN_USBP_CTL_STATUS[HST_MODE] = 0 for host, = 1 for
718 usbn_usbp_ctl_status
.s
.hst_mode
= 0;
719 __cvmx_usb_write_csr64(usb
, CVMX_USBNX_USBP_CTL_STATUS(usb
->index
),
720 usbn_usbp_ctl_status
.u64
);
724 * 11. Program the hreset_n field in the USBN clock-control register:
725 * USBN_CLK_CTL[HRST] = 1
727 usbn_clk_ctl
.s
.hrst
= 1;
728 __cvmx_usb_write_csr64(usb
, CVMX_USBNX_CLK_CTL(usb
->index
),
730 /* 12. Proceed to USB core initialization */
731 usbn_clk_ctl
.s
.enable
= 1;
732 __cvmx_usb_write_csr64(usb
, CVMX_USBNX_CLK_CTL(usb
->index
),
737 * USB Core Initialization
739 * 1. Read USBC_GHWCFG1, USBC_GHWCFG2, USBC_GHWCFG3, USBC_GHWCFG4 to
740 * determine USB core configuration parameters.
744 * 2. Program the following fields in the global AHB configuration
745 * register (USBC_GAHBCFG)
746 * DMA mode, USBC_GAHBCFG[DMAEn]: 1 = DMA mode, 0 = slave mode
747 * Burst length, USBC_GAHBCFG[HBSTLEN] = 0
748 * Nonperiodic TxFIFO empty level (slave mode only),
749 * USBC_GAHBCFG[NPTXFEMPLVL]
750 * Periodic TxFIFO empty level (slave mode only),
751 * USBC_GAHBCFG[PTXFEMPLVL]
752 * Global interrupt mask, USBC_GAHBCFG[GLBLINTRMSK] = 1
755 union cvmx_usbcx_gahbcfg usbcx_gahbcfg
;
756 /* Due to an errata, CN31XX doesn't support DMA */
757 if (OCTEON_IS_MODEL(OCTEON_CN31XX
))
758 usb
->init_flags
|= CVMX_USB_INITIALIZE_FLAGS_NO_DMA
;
759 usbcx_gahbcfg
.u32
= 0;
760 usbcx_gahbcfg
.s
.dmaen
= !(usb
->init_flags
& CVMX_USB_INITIALIZE_FLAGS_NO_DMA
);
761 if (usb
->init_flags
& CVMX_USB_INITIALIZE_FLAGS_NO_DMA
)
762 usb
->idle_hardware_channels
= 0x1; /* Only use one channel with non DMA */
763 else if (OCTEON_IS_MODEL(OCTEON_CN5XXX
))
764 usb
->idle_hardware_channels
= 0xf7; /* CN5XXX have an errata with channel 3 */
766 usb
->idle_hardware_channels
= 0xff;
767 usbcx_gahbcfg
.s
.hbstlen
= 0;
768 usbcx_gahbcfg
.s
.nptxfemplvl
= 1;
769 usbcx_gahbcfg
.s
.ptxfemplvl
= 1;
770 usbcx_gahbcfg
.s
.glblintrmsk
= 1;
771 __cvmx_usb_write_csr32(usb
, CVMX_USBCX_GAHBCFG(usb
->index
),
775 * 3. Program the following fields in USBC_GUSBCFG register.
776 * HS/FS timeout calibration, USBC_GUSBCFG[TOUTCAL] = 0
777 * ULPI DDR select, USBC_GUSBCFG[DDRSEL] = 0
778 * USB turnaround time, USBC_GUSBCFG[USBTRDTIM] = 0x5
779 * PHY low-power clock select, USBC_GUSBCFG[PHYLPWRCLKSEL] = 0
782 union cvmx_usbcx_gusbcfg usbcx_gusbcfg
;
783 usbcx_gusbcfg
.u32
= __cvmx_usb_read_csr32(usb
, CVMX_USBCX_GUSBCFG(usb
->index
));
784 usbcx_gusbcfg
.s
.toutcal
= 0;
785 usbcx_gusbcfg
.s
.ddrsel
= 0;
786 usbcx_gusbcfg
.s
.usbtrdtim
= 0x5;
787 usbcx_gusbcfg
.s
.phylpwrclksel
= 0;
788 __cvmx_usb_write_csr32(usb
, CVMX_USBCX_GUSBCFG(usb
->index
),
792 * 4. The software must unmask the following bits in the USBC_GINTMSK
794 * OTG interrupt mask, USBC_GINTMSK[OTGINTMSK] = 1
795 * Mode mismatch interrupt mask, USBC_GINTMSK[MODEMISMSK] = 1
798 union cvmx_usbcx_gintmsk usbcx_gintmsk
;
801 usbcx_gintmsk
.u32
= __cvmx_usb_read_csr32(usb
, CVMX_USBCX_GINTMSK(usb
->index
));
802 usbcx_gintmsk
.s
.otgintmsk
= 1;
803 usbcx_gintmsk
.s
.modemismsk
= 1;
804 usbcx_gintmsk
.s
.hchintmsk
= 1;
805 usbcx_gintmsk
.s
.sofmsk
= 0;
806 /* We need RX FIFO interrupts if we don't have DMA */
807 if (usb
->init_flags
& CVMX_USB_INITIALIZE_FLAGS_NO_DMA
)
808 usbcx_gintmsk
.s
.rxflvlmsk
= 1;
809 __cvmx_usb_write_csr32(usb
, CVMX_USBCX_GINTMSK(usb
->index
),
812 /* Disable all channel interrupts. We'll enable them per channel later */
813 for (channel
= 0; channel
< 8; channel
++)
814 __cvmx_usb_write_csr32(usb
, CVMX_USBCX_HCINTMSKX(channel
, usb
->index
), 0);
819 * Host Port Initialization
821 * 1. Program the host-port interrupt-mask field to unmask,
822 * USBC_GINTMSK[PRTINT] = 1
824 USB_SET_FIELD32(CVMX_USBCX_GINTMSK(usb
->index
), union cvmx_usbcx_gintmsk
,
826 USB_SET_FIELD32(CVMX_USBCX_GINTMSK(usb
->index
), union cvmx_usbcx_gintmsk
,
829 * 2. Program the USBC_HCFG register to select full-speed host
830 * or high-speed host.
833 union cvmx_usbcx_hcfg usbcx_hcfg
;
834 usbcx_hcfg
.u32
= __cvmx_usb_read_csr32(usb
, CVMX_USBCX_HCFG(usb
->index
));
835 usbcx_hcfg
.s
.fslssupp
= 0;
836 usbcx_hcfg
.s
.fslspclksel
= 0;
837 __cvmx_usb_write_csr32(usb
, CVMX_USBCX_HCFG(usb
->index
), usbcx_hcfg
.u32
);
840 * 3. Program the port power bit to drive VBUS on the USB,
841 * USBC_HPRT[PRTPWR] = 1
843 USB_SET_FIELD32(CVMX_USBCX_HPRT(usb
->index
), union cvmx_usbcx_hprt
, prtpwr
, 1);
846 * Steps 4-15 from the manual are done later in the port enable
855 * Shutdown a USB port after a call to cvmx_usb_initialize().
856 * The port should be disabled with all pipes closed when this
857 * function is called.
859 * @state: USB device state populated by
860 * cvmx_usb_initialize().
862 * Returns: 0 or a negative error code.
864 int cvmx_usb_shutdown(struct cvmx_usb_state
*state
)
866 union cvmx_usbnx_clk_ctl usbn_clk_ctl
;
867 struct cvmx_usb_internal_state
*usb
= (struct cvmx_usb_internal_state
*)state
;
869 /* Make sure all pipes are closed */
870 if (usb
->idle_pipes
.head
||
871 usb
->active_pipes
[CVMX_USB_TRANSFER_ISOCHRONOUS
].head
||
872 usb
->active_pipes
[CVMX_USB_TRANSFER_INTERRUPT
].head
||
873 usb
->active_pipes
[CVMX_USB_TRANSFER_CONTROL
].head
||
874 usb
->active_pipes
[CVMX_USB_TRANSFER_BULK
].head
)
877 /* Disable the clocks and put them in power on reset */
878 usbn_clk_ctl
.u64
= __cvmx_usb_read_csr64(usb
, CVMX_USBNX_CLK_CTL(usb
->index
));
879 usbn_clk_ctl
.s
.enable
= 1;
880 usbn_clk_ctl
.s
.por
= 1;
881 usbn_clk_ctl
.s
.hclk_rst
= 1;
882 usbn_clk_ctl
.s
.prst
= 0;
883 usbn_clk_ctl
.s
.hrst
= 0;
884 __cvmx_usb_write_csr64(usb
, CVMX_USBNX_CLK_CTL(usb
->index
),
891 * Enable a USB port. After this call succeeds, the USB port is
892 * online and servicing requests.
894 * @state: USB device state populated by
895 * cvmx_usb_initialize().
897 * Returns: 0 or a negative error code.
899 int cvmx_usb_enable(struct cvmx_usb_state
*state
)
901 union cvmx_usbcx_ghwcfg3 usbcx_ghwcfg3
;
902 struct cvmx_usb_internal_state
*usb
= (struct cvmx_usb_internal_state
*)state
;
904 usb
->usbcx_hprt
.u32
= __cvmx_usb_read_csr32(usb
, CVMX_USBCX_HPRT(usb
->index
));
907 * If the port is already enabled the just return. We don't need to do
910 if (usb
->usbcx_hprt
.s
.prtena
)
913 /* If there is nothing plugged into the port then fail immediately */
914 if (!usb
->usbcx_hprt
.s
.prtconnsts
) {
918 /* Program the port reset bit to start the reset process */
919 USB_SET_FIELD32(CVMX_USBCX_HPRT(usb
->index
), union cvmx_usbcx_hprt
, prtrst
, 1);
922 * Wait at least 50ms (high speed), or 10ms (full speed) for the reset
923 * process to complete.
927 /* Program the port reset bit to 0, USBC_HPRT[PRTRST] = 0 */
928 USB_SET_FIELD32(CVMX_USBCX_HPRT(usb
->index
), union cvmx_usbcx_hprt
, prtrst
, 0);
930 /* Wait for the USBC_HPRT[PRTENA]. */
931 if (CVMX_WAIT_FOR_FIELD32(CVMX_USBCX_HPRT(usb
->index
), union cvmx_usbcx_hprt
,
932 prtena
, ==, 1, 100000))
935 /* Read the port speed field to get the enumerated speed, USBC_HPRT[PRTSPD]. */
936 usb
->usbcx_hprt
.u32
= __cvmx_usb_read_csr32(usb
, CVMX_USBCX_HPRT(usb
->index
));
937 usbcx_ghwcfg3
.u32
= __cvmx_usb_read_csr32(usb
, CVMX_USBCX_GHWCFG3(usb
->index
));
940 * 13. Program the USBC_GRXFSIZ register to select the size of the
941 * receive FIFO (25%).
943 USB_SET_FIELD32(CVMX_USBCX_GRXFSIZ(usb
->index
), union cvmx_usbcx_grxfsiz
,
944 rxfdep
, usbcx_ghwcfg3
.s
.dfifodepth
/ 4);
946 * 14. Program the USBC_GNPTXFSIZ register to select the size and the
947 * start address of the non- periodic transmit FIFO for nonperiodic
948 * transactions (50%).
951 union cvmx_usbcx_gnptxfsiz siz
;
952 siz
.u32
= __cvmx_usb_read_csr32(usb
, CVMX_USBCX_GNPTXFSIZ(usb
->index
));
953 siz
.s
.nptxfdep
= usbcx_ghwcfg3
.s
.dfifodepth
/ 2;
954 siz
.s
.nptxfstaddr
= usbcx_ghwcfg3
.s
.dfifodepth
/ 4;
955 __cvmx_usb_write_csr32(usb
, CVMX_USBCX_GNPTXFSIZ(usb
->index
), siz
.u32
);
958 * 15. Program the USBC_HPTXFSIZ register to select the size and start
959 * address of the periodic transmit FIFO for periodic transactions
963 union cvmx_usbcx_hptxfsiz siz
;
964 siz
.u32
= __cvmx_usb_read_csr32(usb
, CVMX_USBCX_HPTXFSIZ(usb
->index
));
965 siz
.s
.ptxfsize
= usbcx_ghwcfg3
.s
.dfifodepth
/ 4;
966 siz
.s
.ptxfstaddr
= 3 * usbcx_ghwcfg3
.s
.dfifodepth
/ 4;
967 __cvmx_usb_write_csr32(usb
, CVMX_USBCX_HPTXFSIZ(usb
->index
), siz
.u32
);
969 /* Flush all FIFOs */
970 USB_SET_FIELD32(CVMX_USBCX_GRSTCTL(usb
->index
), union cvmx_usbcx_grstctl
, txfnum
, 0x10);
971 USB_SET_FIELD32(CVMX_USBCX_GRSTCTL(usb
->index
), union cvmx_usbcx_grstctl
, txfflsh
, 1);
972 CVMX_WAIT_FOR_FIELD32(CVMX_USBCX_GRSTCTL(usb
->index
), union cvmx_usbcx_grstctl
,
973 txfflsh
, ==, 0, 100);
974 USB_SET_FIELD32(CVMX_USBCX_GRSTCTL(usb
->index
), union cvmx_usbcx_grstctl
, rxfflsh
, 1);
975 CVMX_WAIT_FOR_FIELD32(CVMX_USBCX_GRSTCTL(usb
->index
), union cvmx_usbcx_grstctl
,
976 rxfflsh
, ==, 0, 100);
983 * Disable a USB port. After this call the USB port will not
984 * generate data transfers and will not generate events.
985 * Transactions in process will fail and call their
986 * associated callbacks.
988 * @state: USB device state populated by
989 * cvmx_usb_initialize().
991 * Returns: 0 or a negative error code.
993 int cvmx_usb_disable(struct cvmx_usb_state
*state
)
995 struct cvmx_usb_internal_state
*usb
= (struct cvmx_usb_internal_state
*)state
;
997 /* Disable the port */
998 USB_SET_FIELD32(CVMX_USBCX_HPRT(usb
->index
), union cvmx_usbcx_hprt
, prtena
, 1);
1004 * Get the current state of the USB port. Use this call to
1005 * determine if the usb port has anything connected, is enabled,
1006 * or has some sort of error condition. The return value of this
1007 * call has "changed" bits to signal of the value of some fields
1008 * have changed between calls. These "changed" fields are based
1009 * on the last call to cvmx_usb_set_status(). In order to clear
1010 * them, you must update the status through cvmx_usb_set_status().
1012 * @state: USB device state populated by
1013 * cvmx_usb_initialize().
1015 * Returns: Port status information
1017 struct cvmx_usb_port_status
cvmx_usb_get_status(struct cvmx_usb_state
*state
)
1019 union cvmx_usbcx_hprt usbc_hprt
;
1020 struct cvmx_usb_port_status result
;
1021 struct cvmx_usb_internal_state
*usb
= (struct cvmx_usb_internal_state
*)state
;
1023 memset(&result
, 0, sizeof(result
));
1025 usbc_hprt
.u32
= __cvmx_usb_read_csr32(usb
, CVMX_USBCX_HPRT(usb
->index
));
1026 result
.port_enabled
= usbc_hprt
.s
.prtena
;
1027 result
.port_over_current
= usbc_hprt
.s
.prtovrcurract
;
1028 result
.port_powered
= usbc_hprt
.s
.prtpwr
;
1029 result
.port_speed
= usbc_hprt
.s
.prtspd
;
1030 result
.connected
= usbc_hprt
.s
.prtconnsts
;
1031 result
.connect_change
= (result
.connected
!= usb
->port_status
.connected
);
1038 * Set the current state of the USB port. The status is used as
1039 * a reference for the "changed" bits returned by
1040 * cvmx_usb_get_status(). Other than serving as a reference, the
1041 * status passed to this function is not used. No fields can be
1042 * changed through this call.
1044 * @state: USB device state populated by
1045 * cvmx_usb_initialize().
1047 * Port status to set, most like returned by cvmx_usb_get_status()
1049 void cvmx_usb_set_status(struct cvmx_usb_state
*state
, struct cvmx_usb_port_status port_status
)
1051 struct cvmx_usb_internal_state
*usb
= (struct cvmx_usb_internal_state
*)state
;
1052 usb
->port_status
= port_status
;
1058 * Convert a USB transaction into a handle
1060 * @usb: USB device state populated by
1061 * cvmx_usb_initialize().
1063 * Transaction to get handle for
1067 static inline int __cvmx_usb_get_submit_handle(struct cvmx_usb_internal_state
*usb
,
1068 struct cvmx_usb_transaction
*transaction
)
1070 return ((unsigned long)transaction
- (unsigned long)usb
->transaction
) /
1071 sizeof(*transaction
);
1076 * Convert a USB pipe into a handle
1078 * @usb: USB device state populated by
1079 * cvmx_usb_initialize().
1080 * @pipe: Pipe to get handle for
1084 static inline int __cvmx_usb_get_pipe_handle(struct cvmx_usb_internal_state
*usb
,
1085 struct cvmx_usb_pipe
*pipe
)
1087 return ((unsigned long)pipe
- (unsigned long)usb
->pipe
) / sizeof(*pipe
);
1092 * Open a virtual pipe between the host and a USB device. A pipe
1093 * must be opened before data can be transferred between a device
1096 * @state: USB device state populated by
1097 * cvmx_usb_initialize().
1099 * USB device address to open the pipe to
1102 * USB endpoint number to open the pipe to
1105 * The speed of the device the pipe is going
1106 * to. This must match the device's speed,
1107 * which may be different than the port speed.
1108 * @max_packet: The maximum packet length the device can
1109 * transmit/receive (low speed=0-8, full
1110 * speed=0-1023, high speed=0-1024). This value
1111 * comes from the standard endpoint descriptor
1112 * field wMaxPacketSize bits <10:0>.
1114 * The type of transfer this pipe is for.
1116 * The direction the pipe is in. This is not
1117 * used for control pipes.
1118 * @interval: For ISOCHRONOUS and INTERRUPT transfers,
1119 * this is how often the transfer is scheduled
1120 * for. All other transfers should specify
1121 * zero. The units are in frames (8000/sec at
1122 * high speed, 1000/sec for full speed).
1124 * For high speed devices, this is the maximum
1125 * allowed number of packet per microframe.
1126 * Specify zero for non high speed devices. This
1127 * value comes from the standard endpoint descriptor
1128 * field wMaxPacketSize bits <12:11>.
1130 * Hub device address this device is connected
1131 * to. Devices connected directly to Octeon
1132 * use zero. This is only used when the device
1133 * is full/low speed behind a high speed hub.
1134 * The address will be of the high speed hub,
1135 * not and full speed hubs after it.
1136 * @hub_port: Which port on the hub the device is
1137 * connected. Use zero for devices connected
1138 * directly to Octeon. Like hub_device_addr,
1139 * this is only used for full/low speed
1140 * devices behind a high speed hub.
1142 * Returns: A non negative value is a pipe handle. Negative
1143 * values are error codes.
1145 int cvmx_usb_open_pipe(struct cvmx_usb_state
*state
,
1146 int device_addr
, int endpoint_num
,
1147 enum cvmx_usb_speed device_speed
, int max_packet
,
1148 enum cvmx_usb_transfer transfer_type
,
1149 enum cvmx_usb_direction transfer_dir
, int interval
,
1150 int multi_count
, int hub_device_addr
, int hub_port
)
1152 struct cvmx_usb_pipe
*pipe
;
1153 struct cvmx_usb_internal_state
*usb
= (struct cvmx_usb_internal_state
*)state
;
1155 if (unlikely((device_addr
< 0) || (device_addr
> MAX_USB_ADDRESS
)))
1157 if (unlikely((endpoint_num
< 0) || (endpoint_num
> MAX_USB_ENDPOINT
)))
1159 if (unlikely(device_speed
> CVMX_USB_SPEED_LOW
))
1161 if (unlikely((max_packet
<= 0) || (max_packet
> 1024)))
1163 if (unlikely(transfer_type
> CVMX_USB_TRANSFER_INTERRUPT
))
1165 if (unlikely((transfer_dir
!= CVMX_USB_DIRECTION_OUT
) &&
1166 (transfer_dir
!= CVMX_USB_DIRECTION_IN
)))
1168 if (unlikely(interval
< 0))
1170 if (unlikely((transfer_type
== CVMX_USB_TRANSFER_CONTROL
) && interval
))
1172 if (unlikely(multi_count
< 0))
1174 if (unlikely((device_speed
!= CVMX_USB_SPEED_HIGH
) &&
1175 (multi_count
!= 0)))
1177 if (unlikely((hub_device_addr
< 0) || (hub_device_addr
> MAX_USB_ADDRESS
)))
1179 if (unlikely((hub_port
< 0) || (hub_port
> MAX_USB_HUB_PORT
)))
1182 /* Find a free pipe */
1183 pipe
= usb
->free_pipes
.head
;
1186 __cvmx_usb_remove_pipe(&usb
->free_pipes
, pipe
);
1187 pipe
->flags
= __CVMX_USB_PIPE_FLAGS_OPEN
;
1188 if ((device_speed
== CVMX_USB_SPEED_HIGH
) &&
1189 (transfer_dir
== CVMX_USB_DIRECTION_OUT
) &&
1190 (transfer_type
== CVMX_USB_TRANSFER_BULK
))
1191 pipe
->flags
|= __CVMX_USB_PIPE_FLAGS_NEED_PING
;
1192 pipe
->device_addr
= device_addr
;
1193 pipe
->endpoint_num
= endpoint_num
;
1194 pipe
->device_speed
= device_speed
;
1195 pipe
->max_packet
= max_packet
;
1196 pipe
->transfer_type
= transfer_type
;
1197 pipe
->transfer_dir
= transfer_dir
;
1199 * All pipes use interval to rate limit NAK processing. Force an
1200 * interval if one wasn't supplied
1204 if (__cvmx_usb_pipe_needs_split(usb
, pipe
)) {
1205 pipe
->interval
= interval
*8;
1206 /* Force start splits to be schedule on uFrame 0 */
1207 pipe
->next_tx_frame
= ((usb
->frame_number
+7)&~7) + pipe
->interval
;
1209 pipe
->interval
= interval
;
1210 pipe
->next_tx_frame
= usb
->frame_number
+ pipe
->interval
;
1212 pipe
->multi_count
= multi_count
;
1213 pipe
->hub_device_addr
= hub_device_addr
;
1214 pipe
->hub_port
= hub_port
;
1215 pipe
->pid_toggle
= 0;
1216 pipe
->split_sc_frame
= -1;
1217 __cvmx_usb_append_pipe(&usb
->idle_pipes
, pipe
);
1220 * We don't need to tell the hardware about this pipe yet since
1221 * it doesn't have any submitted requests
1224 return __cvmx_usb_get_pipe_handle(usb
, pipe
);
1229 * Poll the RX FIFOs and remove data as needed. This function is only used
1230 * in non DMA mode. It is very important that this function be called quickly
1231 * enough to prevent FIFO overflow.
1233 * @usb: USB device state populated by
1234 * cvmx_usb_initialize().
1236 static void __cvmx_usb_poll_rx_fifo(struct cvmx_usb_internal_state
*usb
)
1238 union cvmx_usbcx_grxstsph rx_status
;
1244 rx_status
.u32
= __cvmx_usb_read_csr32(usb
, CVMX_USBCX_GRXSTSPH(usb
->index
));
1245 /* Only read data if IN data is there */
1246 if (rx_status
.s
.pktsts
!= 2)
1248 /* Check if no data is available */
1249 if (!rx_status
.s
.bcnt
)
1252 channel
= rx_status
.s
.chnum
;
1253 bytes
= rx_status
.s
.bcnt
;
1257 /* Get where the DMA engine would have written this data */
1258 address
= __cvmx_usb_read_csr64(usb
, CVMX_USBNX_DMA0_INB_CHN0(usb
->index
) + channel
*8);
1259 ptr
= cvmx_phys_to_ptr(address
);
1260 __cvmx_usb_write_csr64(usb
, CVMX_USBNX_DMA0_INB_CHN0(usb
->index
) + channel
*8, address
+ bytes
);
1262 /* Loop writing the FIFO data for this packet into memory */
1264 *ptr
++ = __cvmx_usb_read_csr32(usb
, USB_FIFO_ADDRESS(channel
, usb
->index
));
1274 * Fill the TX hardware fifo with data out of the software
1277 * @usb: USB device state populated by
1278 * cvmx_usb_initialize().
1279 * @fifo: Software fifo to use
1280 * @available: Amount of space in the hardware fifo
1282 * Returns: Non zero if the hardware fifo was too small and needs
1283 * to be serviced again.
1285 static int __cvmx_usb_fill_tx_hw(struct cvmx_usb_internal_state
*usb
, struct cvmx_usb_tx_fifo
*fifo
, int available
)
1288 * We're done either when there isn't anymore space or the software FIFO
1291 while (available
&& (fifo
->head
!= fifo
->tail
)) {
1293 const uint32_t *ptr
= cvmx_phys_to_ptr(fifo
->entry
[i
].address
);
1294 uint64_t csr_address
= USB_FIFO_ADDRESS(fifo
->entry
[i
].channel
, usb
->index
) ^ 4;
1295 int words
= available
;
1297 /* Limit the amount of data to waht the SW fifo has */
1298 if (fifo
->entry
[i
].size
<= available
) {
1299 words
= fifo
->entry
[i
].size
;
1301 if (fifo
->tail
> MAX_CHANNELS
)
1305 /* Update the next locations and counts */
1307 fifo
->entry
[i
].address
+= words
* 4;
1308 fifo
->entry
[i
].size
-= words
;
1311 * Write the HW fifo data. The read every three writes is due
1312 * to an errata on CN3XXX chips
1315 cvmx_write64_uint32(csr_address
, *ptr
++);
1316 cvmx_write64_uint32(csr_address
, *ptr
++);
1317 cvmx_write64_uint32(csr_address
, *ptr
++);
1318 cvmx_read64_uint64(CVMX_USBNX_DMA0_INB_CHN0(usb
->index
));
1321 cvmx_write64_uint32(csr_address
, *ptr
++);
1323 cvmx_write64_uint32(csr_address
, *ptr
++);
1325 cvmx_write64_uint32(csr_address
, *ptr
++);
1327 cvmx_read64_uint64(CVMX_USBNX_DMA0_INB_CHN0(usb
->index
));
1329 return fifo
->head
!= fifo
->tail
;
1334 * Check the hardware FIFOs and fill them as needed
1336 * @usb: USB device state populated by
1337 * cvmx_usb_initialize().
1339 static void __cvmx_usb_poll_tx_fifo(struct cvmx_usb_internal_state
*usb
)
1341 if (usb
->periodic
.head
!= usb
->periodic
.tail
) {
1342 union cvmx_usbcx_hptxsts tx_status
;
1343 tx_status
.u32
= __cvmx_usb_read_csr32(usb
, CVMX_USBCX_HPTXSTS(usb
->index
));
1344 if (__cvmx_usb_fill_tx_hw(usb
, &usb
->periodic
, tx_status
.s
.ptxfspcavail
))
1345 USB_SET_FIELD32(CVMX_USBCX_GINTMSK(usb
->index
), union cvmx_usbcx_gintmsk
, ptxfempmsk
, 1);
1347 USB_SET_FIELD32(CVMX_USBCX_GINTMSK(usb
->index
), union cvmx_usbcx_gintmsk
, ptxfempmsk
, 0);
1350 if (usb
->nonperiodic
.head
!= usb
->nonperiodic
.tail
) {
1351 union cvmx_usbcx_gnptxsts tx_status
;
1352 tx_status
.u32
= __cvmx_usb_read_csr32(usb
, CVMX_USBCX_GNPTXSTS(usb
->index
));
1353 if (__cvmx_usb_fill_tx_hw(usb
, &usb
->nonperiodic
, tx_status
.s
.nptxfspcavail
))
1354 USB_SET_FIELD32(CVMX_USBCX_GINTMSK(usb
->index
), union cvmx_usbcx_gintmsk
, nptxfempmsk
, 1);
1356 USB_SET_FIELD32(CVMX_USBCX_GINTMSK(usb
->index
), union cvmx_usbcx_gintmsk
, nptxfempmsk
, 0);
1364 * Fill the TX FIFO with an outgoing packet
1366 * @usb: USB device state populated by
1367 * cvmx_usb_initialize().
1368 * @channel: Channel number to get packet from
1370 static void __cvmx_usb_fill_tx_fifo(struct cvmx_usb_internal_state
*usb
, int channel
)
1372 union cvmx_usbcx_hccharx hcchar
;
1373 union cvmx_usbcx_hcspltx usbc_hcsplt
;
1374 union cvmx_usbcx_hctsizx usbc_hctsiz
;
1375 struct cvmx_usb_tx_fifo
*fifo
;
1377 /* We only need to fill data on outbound channels */
1378 hcchar
.u32
= __cvmx_usb_read_csr32(usb
, CVMX_USBCX_HCCHARX(channel
, usb
->index
));
1379 if (hcchar
.s
.epdir
!= CVMX_USB_DIRECTION_OUT
)
1382 /* OUT Splits only have data on the start and not the complete */
1383 usbc_hcsplt
.u32
= __cvmx_usb_read_csr32(usb
, CVMX_USBCX_HCSPLTX(channel
, usb
->index
));
1384 if (usbc_hcsplt
.s
.spltena
&& usbc_hcsplt
.s
.compsplt
)
1387 /* Find out how many bytes we need to fill and convert it into 32bit words */
1388 usbc_hctsiz
.u32
= __cvmx_usb_read_csr32(usb
, CVMX_USBCX_HCTSIZX(channel
, usb
->index
));
1389 if (!usbc_hctsiz
.s
.xfersize
)
1392 if ((hcchar
.s
.eptype
== CVMX_USB_TRANSFER_INTERRUPT
) ||
1393 (hcchar
.s
.eptype
== CVMX_USB_TRANSFER_ISOCHRONOUS
))
1394 fifo
= &usb
->periodic
;
1396 fifo
= &usb
->nonperiodic
;
1398 fifo
->entry
[fifo
->head
].channel
= channel
;
1399 fifo
->entry
[fifo
->head
].address
= __cvmx_usb_read_csr64(usb
, CVMX_USBNX_DMA0_OUTB_CHN0(usb
->index
) + channel
*8);
1400 fifo
->entry
[fifo
->head
].size
= (usbc_hctsiz
.s
.xfersize
+3)>>2;
1402 if (fifo
->head
> MAX_CHANNELS
)
1405 __cvmx_usb_poll_tx_fifo(usb
);
1411 * Perform channel specific setup for Control transactions. All
1412 * the generic stuff will already have been done in
1413 * __cvmx_usb_start_channel()
1415 * @usb: USB device state populated by
1416 * cvmx_usb_initialize().
1417 * @channel: Channel to setup
1418 * @pipe: Pipe for control transaction
1420 static void __cvmx_usb_start_channel_control(struct cvmx_usb_internal_state
*usb
,
1422 struct cvmx_usb_pipe
*pipe
)
1424 struct cvmx_usb_transaction
*transaction
= pipe
->head
;
1425 union cvmx_usb_control_header
*header
=
1426 cvmx_phys_to_ptr(transaction
->control_header
);
1427 int bytes_to_transfer
= transaction
->buffer_length
- transaction
->actual_bytes
;
1428 int packets_to_transfer
;
1429 union cvmx_usbcx_hctsizx usbc_hctsiz
;
1431 usbc_hctsiz
.u32
= __cvmx_usb_read_csr32(usb
, CVMX_USBCX_HCTSIZX(channel
, usb
->index
));
1433 switch (transaction
->stage
) {
1434 case CVMX_USB_STAGE_NON_CONTROL
:
1435 case CVMX_USB_STAGE_NON_CONTROL_SPLIT_COMPLETE
:
1436 cvmx_dprintf("%s: ERROR - Non control stage\n", __FUNCTION__
);
1438 case CVMX_USB_STAGE_SETUP
:
1439 usbc_hctsiz
.s
.pid
= 3; /* Setup */
1440 bytes_to_transfer
= sizeof(*header
);
1441 /* All Control operations start with a setup going OUT */
1442 USB_SET_FIELD32(CVMX_USBCX_HCCHARX(channel
, usb
->index
), union cvmx_usbcx_hccharx
, epdir
, CVMX_USB_DIRECTION_OUT
);
1444 * Setup send the control header instead of the buffer data. The
1445 * buffer data will be used in the next stage
1447 __cvmx_usb_write_csr64(usb
, CVMX_USBNX_DMA0_OUTB_CHN0(usb
->index
) + channel
*8, transaction
->control_header
);
1449 case CVMX_USB_STAGE_SETUP_SPLIT_COMPLETE
:
1450 usbc_hctsiz
.s
.pid
= 3; /* Setup */
1451 bytes_to_transfer
= 0;
1452 /* All Control operations start with a setup going OUT */
1453 USB_SET_FIELD32(CVMX_USBCX_HCCHARX(channel
, usb
->index
), union cvmx_usbcx_hccharx
, epdir
, CVMX_USB_DIRECTION_OUT
);
1454 USB_SET_FIELD32(CVMX_USBCX_HCSPLTX(channel
, usb
->index
), union cvmx_usbcx_hcspltx
, compsplt
, 1);
1456 case CVMX_USB_STAGE_DATA
:
1457 usbc_hctsiz
.s
.pid
= __cvmx_usb_get_data_pid(pipe
);
1458 if (__cvmx_usb_pipe_needs_split(usb
, pipe
)) {
1459 if (header
->s
.request_type
& 0x80)
1460 bytes_to_transfer
= 0;
1461 else if (bytes_to_transfer
> pipe
->max_packet
)
1462 bytes_to_transfer
= pipe
->max_packet
;
1464 USB_SET_FIELD32(CVMX_USBCX_HCCHARX(channel
, usb
->index
),
1465 union cvmx_usbcx_hccharx
, epdir
,
1466 ((header
->s
.request_type
& 0x80) ?
1467 CVMX_USB_DIRECTION_IN
:
1468 CVMX_USB_DIRECTION_OUT
));
1470 case CVMX_USB_STAGE_DATA_SPLIT_COMPLETE
:
1471 usbc_hctsiz
.s
.pid
= __cvmx_usb_get_data_pid(pipe
);
1472 if (!(header
->s
.request_type
& 0x80))
1473 bytes_to_transfer
= 0;
1474 USB_SET_FIELD32(CVMX_USBCX_HCCHARX(channel
, usb
->index
),
1475 union cvmx_usbcx_hccharx
, epdir
,
1476 ((header
->s
.request_type
& 0x80) ?
1477 CVMX_USB_DIRECTION_IN
:
1478 CVMX_USB_DIRECTION_OUT
));
1479 USB_SET_FIELD32(CVMX_USBCX_HCSPLTX(channel
, usb
->index
), union cvmx_usbcx_hcspltx
, compsplt
, 1);
1481 case CVMX_USB_STAGE_STATUS
:
1482 usbc_hctsiz
.s
.pid
= __cvmx_usb_get_data_pid(pipe
);
1483 bytes_to_transfer
= 0;
1484 USB_SET_FIELD32(CVMX_USBCX_HCCHARX(channel
, usb
->index
), union cvmx_usbcx_hccharx
, epdir
,
1485 ((header
->s
.request_type
& 0x80) ?
1486 CVMX_USB_DIRECTION_OUT
:
1487 CVMX_USB_DIRECTION_IN
));
1489 case CVMX_USB_STAGE_STATUS_SPLIT_COMPLETE
:
1490 usbc_hctsiz
.s
.pid
= __cvmx_usb_get_data_pid(pipe
);
1491 bytes_to_transfer
= 0;
1492 USB_SET_FIELD32(CVMX_USBCX_HCCHARX(channel
, usb
->index
), union cvmx_usbcx_hccharx
, epdir
,
1493 ((header
->s
.request_type
& 0x80) ?
1494 CVMX_USB_DIRECTION_OUT
:
1495 CVMX_USB_DIRECTION_IN
));
1496 USB_SET_FIELD32(CVMX_USBCX_HCSPLTX(channel
, usb
->index
), union cvmx_usbcx_hcspltx
, compsplt
, 1);
1501 * Make sure the transfer never exceeds the byte limit of the hardware.
1502 * Further bytes will be sent as continued transactions
1504 if (bytes_to_transfer
> MAX_TRANSFER_BYTES
) {
1505 /* Round MAX_TRANSFER_BYTES to a multiple of out packet size */
1506 bytes_to_transfer
= MAX_TRANSFER_BYTES
/ pipe
->max_packet
;
1507 bytes_to_transfer
*= pipe
->max_packet
;
1511 * Calculate the number of packets to transfer. If the length is zero
1512 * we still need to transfer one packet
1514 packets_to_transfer
= (bytes_to_transfer
+ pipe
->max_packet
- 1) / pipe
->max_packet
;
1515 if (packets_to_transfer
== 0)
1516 packets_to_transfer
= 1;
1517 else if ((packets_to_transfer
> 1) && (usb
->init_flags
& CVMX_USB_INITIALIZE_FLAGS_NO_DMA
)) {
1519 * Limit to one packet when not using DMA. Channels must be
1520 * restarted between every packet for IN transactions, so there
1521 * is no reason to do multiple packets in a row
1523 packets_to_transfer
= 1;
1524 bytes_to_transfer
= packets_to_transfer
* pipe
->max_packet
;
1525 } else if (packets_to_transfer
> MAX_TRANSFER_PACKETS
) {
1527 * Limit the number of packet and data transferred to what the
1528 * hardware can handle
1530 packets_to_transfer
= MAX_TRANSFER_PACKETS
;
1531 bytes_to_transfer
= packets_to_transfer
* pipe
->max_packet
;
1534 usbc_hctsiz
.s
.xfersize
= bytes_to_transfer
;
1535 usbc_hctsiz
.s
.pktcnt
= packets_to_transfer
;
1537 __cvmx_usb_write_csr32(usb
, CVMX_USBCX_HCTSIZX(channel
, usb
->index
), usbc_hctsiz
.u32
);
1543 * Start a channel to perform the pipe's head transaction
1545 * @usb: USB device state populated by
1546 * cvmx_usb_initialize().
1547 * @channel: Channel to setup
1548 * @pipe: Pipe to start
1550 static void __cvmx_usb_start_channel(struct cvmx_usb_internal_state
*usb
,
1552 struct cvmx_usb_pipe
*pipe
)
1554 struct cvmx_usb_transaction
*transaction
= pipe
->head
;
1556 /* Make sure all writes to the DMA region get flushed */
1559 /* Attach the channel to the pipe */
1560 usb
->pipe_for_channel
[channel
] = pipe
;
1561 pipe
->channel
= channel
;
1562 pipe
->flags
|= __CVMX_USB_PIPE_FLAGS_SCHEDULED
;
1564 /* Mark this channel as in use */
1565 usb
->idle_hardware_channels
&= ~(1<<channel
);
1567 /* Enable the channel interrupt bits */
1569 union cvmx_usbcx_hcintx usbc_hcint
;
1570 union cvmx_usbcx_hcintmskx usbc_hcintmsk
;
1571 union cvmx_usbcx_haintmsk usbc_haintmsk
;
1573 /* Clear all channel status bits */
1574 usbc_hcint
.u32
= __cvmx_usb_read_csr32(usb
, CVMX_USBCX_HCINTX(channel
, usb
->index
));
1575 __cvmx_usb_write_csr32(usb
, CVMX_USBCX_HCINTX(channel
, usb
->index
), usbc_hcint
.u32
);
1577 usbc_hcintmsk
.u32
= 0;
1578 usbc_hcintmsk
.s
.chhltdmsk
= 1;
1579 if (usb
->init_flags
& CVMX_USB_INITIALIZE_FLAGS_NO_DMA
) {
1580 /* Channels need these extra interrupts when we aren't in DMA mode */
1581 usbc_hcintmsk
.s
.datatglerrmsk
= 1;
1582 usbc_hcintmsk
.s
.frmovrunmsk
= 1;
1583 usbc_hcintmsk
.s
.bblerrmsk
= 1;
1584 usbc_hcintmsk
.s
.xacterrmsk
= 1;
1585 if (__cvmx_usb_pipe_needs_split(usb
, pipe
)) {
1586 /* Splits don't generate xfercompl, so we need ACK and NYET */
1587 usbc_hcintmsk
.s
.nyetmsk
= 1;
1588 usbc_hcintmsk
.s
.ackmsk
= 1;
1590 usbc_hcintmsk
.s
.nakmsk
= 1;
1591 usbc_hcintmsk
.s
.stallmsk
= 1;
1592 usbc_hcintmsk
.s
.xfercomplmsk
= 1;
1594 __cvmx_usb_write_csr32(usb
, CVMX_USBCX_HCINTMSKX(channel
, usb
->index
), usbc_hcintmsk
.u32
);
1596 /* Enable the channel interrupt to propagate */
1597 usbc_haintmsk
.u32
= __cvmx_usb_read_csr32(usb
, CVMX_USBCX_HAINTMSK(usb
->index
));
1598 usbc_haintmsk
.s
.haintmsk
|= 1<<channel
;
1599 __cvmx_usb_write_csr32(usb
, CVMX_USBCX_HAINTMSK(usb
->index
), usbc_haintmsk
.u32
);
1602 /* Setup the locations the DMA engines use */
1604 uint64_t dma_address
= transaction
->buffer
+ transaction
->actual_bytes
;
1605 if (transaction
->type
== CVMX_USB_TRANSFER_ISOCHRONOUS
)
1606 dma_address
= transaction
->buffer
+ transaction
->iso_packets
[0].offset
+ transaction
->actual_bytes
;
1607 __cvmx_usb_write_csr64(usb
, CVMX_USBNX_DMA0_OUTB_CHN0(usb
->index
) + channel
*8, dma_address
);
1608 __cvmx_usb_write_csr64(usb
, CVMX_USBNX_DMA0_INB_CHN0(usb
->index
) + channel
*8, dma_address
);
1611 /* Setup both the size of the transfer and the SPLIT characteristics */
1613 union cvmx_usbcx_hcspltx usbc_hcsplt
= {.u32
= 0};
1614 union cvmx_usbcx_hctsizx usbc_hctsiz
= {.u32
= 0};
1615 int packets_to_transfer
;
1616 int bytes_to_transfer
= transaction
->buffer_length
- transaction
->actual_bytes
;
1619 * ISOCHRONOUS transactions store each individual transfer size
1620 * in the packet structure, not the global buffer_length
1622 if (transaction
->type
== CVMX_USB_TRANSFER_ISOCHRONOUS
)
1623 bytes_to_transfer
= transaction
->iso_packets
[0].length
- transaction
->actual_bytes
;
1626 * We need to do split transactions when we are talking to non
1627 * high speed devices that are behind a high speed hub
1629 if (__cvmx_usb_pipe_needs_split(usb
, pipe
)) {
1631 * On the start split phase (stage is even) record the
1632 * frame number we will need to send the split complete.
1633 * We only store the lower two bits since the time ahead
1634 * can only be two frames
1636 if ((transaction
->stage
&1) == 0) {
1637 if (transaction
->type
== CVMX_USB_TRANSFER_BULK
)
1638 pipe
->split_sc_frame
= (usb
->frame_number
+ 1) & 0x7f;
1640 pipe
->split_sc_frame
= (usb
->frame_number
+ 2) & 0x7f;
1642 pipe
->split_sc_frame
= -1;
1644 usbc_hcsplt
.s
.spltena
= 1;
1645 usbc_hcsplt
.s
.hubaddr
= pipe
->hub_device_addr
;
1646 usbc_hcsplt
.s
.prtaddr
= pipe
->hub_port
;
1647 usbc_hcsplt
.s
.compsplt
= (transaction
->stage
== CVMX_USB_STAGE_NON_CONTROL_SPLIT_COMPLETE
);
1650 * SPLIT transactions can only ever transmit one data
1651 * packet so limit the transfer size to the max packet
1654 if (bytes_to_transfer
> pipe
->max_packet
)
1655 bytes_to_transfer
= pipe
->max_packet
;
1658 * ISOCHRONOUS OUT splits are unique in that they limit
1659 * data transfers to 188 byte chunks representing the
1660 * begin/middle/end of the data or all
1662 if (!usbc_hcsplt
.s
.compsplt
&&
1663 (pipe
->transfer_dir
== CVMX_USB_DIRECTION_OUT
) &&
1664 (pipe
->transfer_type
== CVMX_USB_TRANSFER_ISOCHRONOUS
)) {
1666 * Clear the split complete frame number as
1667 * there isn't going to be a split complete
1669 pipe
->split_sc_frame
= -1;
1671 * See if we've started this transfer and sent
1674 if (transaction
->actual_bytes
== 0) {
1676 * Nothing sent yet, this is either a
1677 * begin or the entire payload
1679 if (bytes_to_transfer
<= 188)
1680 usbc_hcsplt
.s
.xactpos
= 3; /* Entire payload in one go */
1682 usbc_hcsplt
.s
.xactpos
= 2; /* First part of payload */
1685 * Continuing the previous data, we must
1686 * either be in the middle or at the end
1688 if (bytes_to_transfer
<= 188)
1689 usbc_hcsplt
.s
.xactpos
= 1; /* End of payload */
1691 usbc_hcsplt
.s
.xactpos
= 0; /* Middle of payload */
1694 * Again, the transfer size is limited to 188
1697 if (bytes_to_transfer
> 188)
1698 bytes_to_transfer
= 188;
1703 * Make sure the transfer never exceeds the byte limit of the
1704 * hardware. Further bytes will be sent as continued
1707 if (bytes_to_transfer
> MAX_TRANSFER_BYTES
) {
1709 * Round MAX_TRANSFER_BYTES to a multiple of out packet
1712 bytes_to_transfer
= MAX_TRANSFER_BYTES
/ pipe
->max_packet
;
1713 bytes_to_transfer
*= pipe
->max_packet
;
1717 * Calculate the number of packets to transfer. If the length is
1718 * zero we still need to transfer one packet
1720 packets_to_transfer
= (bytes_to_transfer
+ pipe
->max_packet
- 1) / pipe
->max_packet
;
1721 if (packets_to_transfer
== 0)
1722 packets_to_transfer
= 1;
1723 else if ((packets_to_transfer
> 1) && (usb
->init_flags
& CVMX_USB_INITIALIZE_FLAGS_NO_DMA
)) {
1725 * Limit to one packet when not using DMA. Channels must
1726 * be restarted between every packet for IN
1727 * transactions, so there is no reason to do multiple
1730 packets_to_transfer
= 1;
1731 bytes_to_transfer
= packets_to_transfer
* pipe
->max_packet
;
1732 } else if (packets_to_transfer
> MAX_TRANSFER_PACKETS
) {
1734 * Limit the number of packet and data transferred to
1735 * what the hardware can handle
1737 packets_to_transfer
= MAX_TRANSFER_PACKETS
;
1738 bytes_to_transfer
= packets_to_transfer
* pipe
->max_packet
;
1741 usbc_hctsiz
.s
.xfersize
= bytes_to_transfer
;
1742 usbc_hctsiz
.s
.pktcnt
= packets_to_transfer
;
1744 /* Update the DATA0/DATA1 toggle */
1745 usbc_hctsiz
.s
.pid
= __cvmx_usb_get_data_pid(pipe
);
1747 * High speed pipes may need a hardware ping before they start
1749 if (pipe
->flags
& __CVMX_USB_PIPE_FLAGS_NEED_PING
)
1750 usbc_hctsiz
.s
.dopng
= 1;
1752 __cvmx_usb_write_csr32(usb
, CVMX_USBCX_HCSPLTX(channel
, usb
->index
), usbc_hcsplt
.u32
);
1753 __cvmx_usb_write_csr32(usb
, CVMX_USBCX_HCTSIZX(channel
, usb
->index
), usbc_hctsiz
.u32
);
1756 /* Setup the Host Channel Characteristics Register */
1758 union cvmx_usbcx_hccharx usbc_hcchar
= {.u32
= 0};
1761 * Set the startframe odd/even properly. This is only used for
1764 usbc_hcchar
.s
.oddfrm
= usb
->frame_number
&1;
1767 * Set the number of back to back packets allowed by this
1768 * endpoint. Split transactions interpret "ec" as the number of
1769 * immediate retries of failure. These retries happen too
1770 * quickly, so we disable these entirely for splits
1772 if (__cvmx_usb_pipe_needs_split(usb
, pipe
))
1773 usbc_hcchar
.s
.ec
= 1;
1774 else if (pipe
->multi_count
< 1)
1775 usbc_hcchar
.s
.ec
= 1;
1776 else if (pipe
->multi_count
> 3)
1777 usbc_hcchar
.s
.ec
= 3;
1779 usbc_hcchar
.s
.ec
= pipe
->multi_count
;
1781 /* Set the rest of the endpoint specific settings */
1782 usbc_hcchar
.s
.devaddr
= pipe
->device_addr
;
1783 usbc_hcchar
.s
.eptype
= transaction
->type
;
1784 usbc_hcchar
.s
.lspddev
= (pipe
->device_speed
== CVMX_USB_SPEED_LOW
);
1785 usbc_hcchar
.s
.epdir
= pipe
->transfer_dir
;
1786 usbc_hcchar
.s
.epnum
= pipe
->endpoint_num
;
1787 usbc_hcchar
.s
.mps
= pipe
->max_packet
;
1788 __cvmx_usb_write_csr32(usb
, CVMX_USBCX_HCCHARX(channel
, usb
->index
), usbc_hcchar
.u32
);
1791 /* Do transaction type specific fixups as needed */
1792 switch (transaction
->type
) {
1793 case CVMX_USB_TRANSFER_CONTROL
:
1794 __cvmx_usb_start_channel_control(usb
, channel
, pipe
);
1796 case CVMX_USB_TRANSFER_BULK
:
1797 case CVMX_USB_TRANSFER_INTERRUPT
:
1799 case CVMX_USB_TRANSFER_ISOCHRONOUS
:
1800 if (!__cvmx_usb_pipe_needs_split(usb
, pipe
)) {
1802 * ISO transactions require different PIDs depending on
1803 * direction and how many packets are needed
1805 if (pipe
->transfer_dir
== CVMX_USB_DIRECTION_OUT
) {
1806 if (pipe
->multi_count
< 2) /* Need DATA0 */
1807 USB_SET_FIELD32(CVMX_USBCX_HCTSIZX(channel
, usb
->index
), union cvmx_usbcx_hctsizx
, pid
, 0);
1808 else /* Need MDATA */
1809 USB_SET_FIELD32(CVMX_USBCX_HCTSIZX(channel
, usb
->index
), union cvmx_usbcx_hctsizx
, pid
, 3);
1815 union cvmx_usbcx_hctsizx usbc_hctsiz
= {.u32
= __cvmx_usb_read_csr32(usb
, CVMX_USBCX_HCTSIZX(channel
, usb
->index
))};
1816 transaction
->xfersize
= usbc_hctsiz
.s
.xfersize
;
1817 transaction
->pktcnt
= usbc_hctsiz
.s
.pktcnt
;
1819 /* Remeber when we start a split transaction */
1820 if (__cvmx_usb_pipe_needs_split(usb
, pipe
))
1821 usb
->active_split
= transaction
;
1822 USB_SET_FIELD32(CVMX_USBCX_HCCHARX(channel
, usb
->index
), union cvmx_usbcx_hccharx
, chena
, 1);
1823 if (usb
->init_flags
& CVMX_USB_INITIALIZE_FLAGS_NO_DMA
)
1824 __cvmx_usb_fill_tx_fifo(usb
, channel
);
1830 * Find a pipe that is ready to be scheduled to hardware.
1831 * @usb: USB device state populated by
1832 * cvmx_usb_initialize().
1833 * @list: Pipe list to search
1835 * Frame counter to use as a time reference.
1837 * Returns: Pipe or NULL if none are ready
1839 static struct cvmx_usb_pipe
*__cvmx_usb_find_ready_pipe(struct cvmx_usb_internal_state
*usb
, struct cvmx_usb_pipe_list
*list
, uint64_t current_frame
)
1841 struct cvmx_usb_pipe
*pipe
= list
->head
;
1843 if (!(pipe
->flags
& __CVMX_USB_PIPE_FLAGS_SCHEDULED
) && pipe
->head
&&
1844 (pipe
->next_tx_frame
<= current_frame
) &&
1845 ((pipe
->split_sc_frame
== -1) || ((((int)current_frame
- (int)pipe
->split_sc_frame
) & 0x7f) < 0x40)) &&
1846 (!usb
->active_split
|| (usb
->active_split
== pipe
->head
))) {
1847 CVMX_PREFETCH(pipe
, 128);
1848 CVMX_PREFETCH(pipe
->head
, 0);
1858 * Called whenever a pipe might need to be scheduled to the
1861 * @usb: USB device state populated by
1862 * cvmx_usb_initialize().
1863 * @is_sof: True if this schedule was called on a SOF interrupt.
1865 static void __cvmx_usb_schedule(struct cvmx_usb_internal_state
*usb
, int is_sof
)
1868 struct cvmx_usb_pipe
*pipe
;
1870 enum cvmx_usb_transfer ttype
;
1872 if (usb
->init_flags
& CVMX_USB_INITIALIZE_FLAGS_NO_DMA
) {
1873 /* Without DMA we need to be careful to not schedule something at the end of a frame and cause an overrun */
1874 union cvmx_usbcx_hfnum hfnum
= {.u32
= __cvmx_usb_read_csr32(usb
, CVMX_USBCX_HFNUM(usb
->index
))};
1875 union cvmx_usbcx_hfir hfir
= {.u32
= __cvmx_usb_read_csr32(usb
, CVMX_USBCX_HFIR(usb
->index
))};
1876 if (hfnum
.s
.frrem
< hfir
.s
.frint
/4)
1880 while (usb
->idle_hardware_channels
) {
1881 /* Find an idle channel */
1882 channel
= __fls(usb
->idle_hardware_channels
);
1883 if (unlikely(channel
> 7))
1886 /* Find a pipe needing service */
1890 * Only process periodic pipes on SOF interrupts. This
1891 * way we are sure that the periodic data is sent in the
1892 * beginning of the frame
1894 pipe
= __cvmx_usb_find_ready_pipe(usb
, usb
->active_pipes
+ CVMX_USB_TRANSFER_ISOCHRONOUS
, usb
->frame_number
);
1896 pipe
= __cvmx_usb_find_ready_pipe(usb
, usb
->active_pipes
+ CVMX_USB_TRANSFER_INTERRUPT
, usb
->frame_number
);
1898 if (likely(!pipe
)) {
1899 pipe
= __cvmx_usb_find_ready_pipe(usb
, usb
->active_pipes
+ CVMX_USB_TRANSFER_CONTROL
, usb
->frame_number
);
1901 pipe
= __cvmx_usb_find_ready_pipe(usb
, usb
->active_pipes
+ CVMX_USB_TRANSFER_BULK
, usb
->frame_number
);
1906 __cvmx_usb_start_channel(usb
, channel
, pipe
);
1911 * Only enable SOF interrupts when we have transactions pending in the
1912 * future that might need to be scheduled
1915 for (ttype
= CVMX_USB_TRANSFER_CONTROL
; ttype
<= CVMX_USB_TRANSFER_INTERRUPT
; ttype
++) {
1916 pipe
= usb
->active_pipes
[ttype
].head
;
1918 if (pipe
->next_tx_frame
> usb
->frame_number
) {
1925 USB_SET_FIELD32(CVMX_USBCX_GINTMSK(usb
->index
), union cvmx_usbcx_gintmsk
, sofmsk
, need_sof
);
1931 * Call a user's callback for a specific reason.
1933 * @usb: USB device state populated by
1934 * cvmx_usb_initialize().
1935 * @pipe: Pipe the callback is for or NULL
1937 * Transaction the callback is for or NULL
1938 * @reason: Reason this callback is being called
1940 * Completion code for the transaction, if any
1942 static void __cvmx_usb_perform_callback(struct cvmx_usb_internal_state
*usb
,
1943 struct cvmx_usb_pipe
*pipe
,
1944 struct cvmx_usb_transaction
*transaction
,
1945 enum cvmx_usb_callback reason
,
1946 enum cvmx_usb_complete complete_code
)
1948 cvmx_usb_callback_func_t callback
= usb
->callback
[reason
];
1949 void *user_data
= usb
->callback_data
[reason
];
1950 int submit_handle
= -1;
1951 int pipe_handle
= -1;
1952 int bytes_transferred
= 0;
1955 pipe_handle
= __cvmx_usb_get_pipe_handle(usb
, pipe
);
1958 submit_handle
= __cvmx_usb_get_submit_handle(usb
, transaction
);
1959 bytes_transferred
= transaction
->actual_bytes
;
1960 /* Transactions are allowed to override the default callback */
1961 if ((reason
== CVMX_USB_CALLBACK_TRANSFER_COMPLETE
) && transaction
->callback
) {
1962 callback
= transaction
->callback
;
1963 user_data
= transaction
->callback_data
;
1970 callback((struct cvmx_usb_state
*)usb
, reason
, complete_code
, pipe_handle
, submit_handle
,
1971 bytes_transferred
, user_data
);
1976 * Signal the completion of a transaction and free it. The
1977 * transaction will be removed from the pipe transaction list.
1979 * @usb: USB device state populated by
1980 * cvmx_usb_initialize().
1981 * @pipe: Pipe the transaction is on
1983 * Transaction that completed
1987 static void __cvmx_usb_perform_complete(struct cvmx_usb_internal_state
*usb
,
1988 struct cvmx_usb_pipe
*pipe
,
1989 struct cvmx_usb_transaction
*transaction
,
1990 enum cvmx_usb_complete complete_code
)
1992 /* If this was a split then clear our split in progress marker */
1993 if (usb
->active_split
== transaction
)
1994 usb
->active_split
= NULL
;
1997 * Isochronous transactions need extra processing as they might not be
1998 * done after a single data transfer
2000 if (unlikely(transaction
->type
== CVMX_USB_TRANSFER_ISOCHRONOUS
)) {
2001 /* Update the number of bytes transferred in this ISO packet */
2002 transaction
->iso_packets
[0].length
= transaction
->actual_bytes
;
2003 transaction
->iso_packets
[0].status
= complete_code
;
2006 * If there are more ISOs pending and we succeeded, schedule the
2009 if ((transaction
->iso_number_packets
> 1) && (complete_code
== CVMX_USB_COMPLETE_SUCCESS
)) {
2010 transaction
->actual_bytes
= 0; /* No bytes transferred for this packet as of yet */
2011 transaction
->iso_number_packets
--; /* One less ISO waiting to transfer */
2012 transaction
->iso_packets
++; /* Increment to the next location in our packet array */
2013 transaction
->stage
= CVMX_USB_STAGE_NON_CONTROL
;
2018 /* Remove the transaction from the pipe list */
2019 if (transaction
->next
)
2020 transaction
->next
->prev
= transaction
->prev
;
2022 pipe
->tail
= transaction
->prev
;
2023 if (transaction
->prev
)
2024 transaction
->prev
->next
= transaction
->next
;
2026 pipe
->head
= transaction
->next
;
2028 __cvmx_usb_remove_pipe(usb
->active_pipes
+ pipe
->transfer_type
, pipe
);
2029 __cvmx_usb_append_pipe(&usb
->idle_pipes
, pipe
);
2032 __cvmx_usb_perform_callback(usb
, pipe
, transaction
,
2033 CVMX_USB_CALLBACK_TRANSFER_COMPLETE
,
2035 __cvmx_usb_free_transaction(usb
, transaction
);
2042 * Submit a usb transaction to a pipe. Called for all types
2047 * Which pipe to submit to. Will be validated in this function.
2048 * @type: Transaction type
2049 * @buffer: User buffer for the transaction
2051 * User buffer's length in bytes
2053 * For control transactions, the 8 byte standard header
2055 * For ISO transactions, the start frame
2056 * @iso_number_packets:
2057 * For ISO, the number of packet in the transaction.
2059 * A description of each ISO packet
2060 * @callback: User callback to call when the transaction completes
2061 * @user_data: User's data for the callback
2063 * Returns: Submit handle or negative on failure. Matches the result
2064 * in the external API.
2066 static int __cvmx_usb_submit_transaction(struct cvmx_usb_internal_state
*usb
,
2068 enum cvmx_usb_transfer type
,
2071 uint64_t control_header
,
2072 int iso_start_frame
,
2073 int iso_number_packets
,
2074 struct cvmx_usb_iso_packet
*iso_packets
,
2075 cvmx_usb_callback_func_t callback
,
2079 struct cvmx_usb_transaction
*transaction
;
2080 struct cvmx_usb_pipe
*pipe
= usb
->pipe
+ pipe_handle
;
2082 if (unlikely((pipe_handle
< 0) || (pipe_handle
>= MAX_PIPES
)))
2084 /* Fail if the pipe isn't open */
2085 if (unlikely((pipe
->flags
& __CVMX_USB_PIPE_FLAGS_OPEN
) == 0))
2087 if (unlikely(pipe
->transfer_type
!= type
))
2090 transaction
= __cvmx_usb_alloc_transaction(usb
);
2091 if (unlikely(!transaction
))
2094 transaction
->type
= type
;
2095 transaction
->buffer
= buffer
;
2096 transaction
->buffer_length
= buffer_length
;
2097 transaction
->control_header
= control_header
;
2098 transaction
->iso_start_frame
= iso_start_frame
; // FIXME: This is not used, implement it
2099 transaction
->iso_number_packets
= iso_number_packets
;
2100 transaction
->iso_packets
= iso_packets
;
2101 transaction
->callback
= callback
;
2102 transaction
->callback_data
= user_data
;
2103 if (transaction
->type
== CVMX_USB_TRANSFER_CONTROL
)
2104 transaction
->stage
= CVMX_USB_STAGE_SETUP
;
2106 transaction
->stage
= CVMX_USB_STAGE_NON_CONTROL
;
2108 transaction
->next
= NULL
;
2110 transaction
->prev
= pipe
->tail
;
2111 transaction
->prev
->next
= transaction
;
2113 if (pipe
->next_tx_frame
< usb
->frame_number
)
2114 pipe
->next_tx_frame
= usb
->frame_number
+ pipe
->interval
-
2115 (usb
->frame_number
- pipe
->next_tx_frame
) % pipe
->interval
;
2116 transaction
->prev
= NULL
;
2117 pipe
->head
= transaction
;
2118 __cvmx_usb_remove_pipe(&usb
->idle_pipes
, pipe
);
2119 __cvmx_usb_append_pipe(usb
->active_pipes
+ pipe
->transfer_type
, pipe
);
2121 pipe
->tail
= transaction
;
2123 submit_handle
= __cvmx_usb_get_submit_handle(usb
, transaction
);
2125 /* We may need to schedule the pipe if this was the head of the pipe */
2126 if (!transaction
->prev
)
2127 __cvmx_usb_schedule(usb
, 0);
2129 return submit_handle
;
2134 * Call to submit a USB Bulk transfer to a pipe.
2136 * @state: USB device state populated by
2137 * cvmx_usb_initialize().
2139 * Handle to the pipe for the transfer.
2140 * @buffer: Physical address of the data buffer in
2141 * memory. Note that this is NOT A POINTER, but
2142 * the full 64bit physical address of the
2143 * buffer. This may be zero if buffer_length is
2146 * Length of buffer in bytes.
2147 * @callback: Function to call when this transaction
2148 * completes. If the return value of this
2149 * function isn't an error, then this function
2150 * is guaranteed to be called when the
2151 * transaction completes. If this parameter is
2152 * NULL, then the generic callback registered
2153 * through cvmx_usb_register_callback is
2154 * called. If both are NULL, then there is no
2155 * way to know when a transaction completes.
2156 * @user_data: User supplied data returned when the
2157 * callback is called. This is only used if
2158 * callback in not NULL.
2160 * Returns: A submitted transaction handle or negative on
2161 * failure. Negative values are error codes.
2163 int cvmx_usb_submit_bulk(struct cvmx_usb_state
*state
, int pipe_handle
,
2164 uint64_t buffer
, int buffer_length
,
2165 cvmx_usb_callback_func_t callback
,
2169 struct cvmx_usb_internal_state
*usb
= (struct cvmx_usb_internal_state
*)state
;
2171 /* Pipe handle checking is done later in a common place */
2172 if (unlikely(!buffer
))
2174 if (unlikely(buffer_length
< 0))
2177 submit_handle
= __cvmx_usb_submit_transaction(usb
, pipe_handle
,
2178 CVMX_USB_TRANSFER_BULK
,
2181 0, /* control_header */
2182 0, /* iso_start_frame */
2183 0, /* iso_number_packets */
2184 NULL
, /* iso_packets */
2187 return submit_handle
;
2192 * Call to submit a USB Interrupt transfer to a pipe.
2194 * @state: USB device state populated by
2195 * cvmx_usb_initialize().
2197 * Handle to the pipe for the transfer.
2198 * @buffer: Physical address of the data buffer in
2199 * memory. Note that this is NOT A POINTER, but
2200 * the full 64bit physical address of the
2201 * buffer. This may be zero if buffer_length is
2204 * Length of buffer in bytes.
2205 * @callback: Function to call when this transaction
2206 * completes. If the return value of this
2207 * function isn't an error, then this function
2208 * is guaranteed to be called when the
2209 * transaction completes. If this parameter is
2210 * NULL, then the generic callback registered
2211 * through cvmx_usb_register_callback is
2212 * called. If both are NULL, then there is no
2213 * way to know when a transaction completes.
2214 * @user_data: User supplied data returned when the
2215 * callback is called. This is only used if
2216 * callback in not NULL.
2218 * Returns: A submitted transaction handle or negative on
2219 * failure. Negative values are error codes.
2221 int cvmx_usb_submit_interrupt(struct cvmx_usb_state
*state
, int pipe_handle
,
2222 uint64_t buffer
, int buffer_length
,
2223 cvmx_usb_callback_func_t callback
,
2227 struct cvmx_usb_internal_state
*usb
= (struct cvmx_usb_internal_state
*)state
;
2229 /* Pipe handle checking is done later in a common place */
2230 if (unlikely(!buffer
))
2232 if (unlikely(buffer_length
< 0))
2235 submit_handle
= __cvmx_usb_submit_transaction(usb
, pipe_handle
,
2236 CVMX_USB_TRANSFER_INTERRUPT
,
2239 0, /* control_header */
2240 0, /* iso_start_frame */
2241 0, /* iso_number_packets */
2242 NULL
, /* iso_packets */
2245 return submit_handle
;
2250 * Call to submit a USB Control transfer to a pipe.
2252 * @state: USB device state populated by
2253 * cvmx_usb_initialize().
2255 * Handle to the pipe for the transfer.
2257 * USB 8 byte control header physical address.
2258 * Note that this is NOT A POINTER, but the
2259 * full 64bit physical address of the buffer.
2260 * @buffer: Physical address of the data buffer in
2261 * memory. Note that this is NOT A POINTER, but
2262 * the full 64bit physical address of the
2263 * buffer. This may be zero if buffer_length is
2266 * Length of buffer in bytes.
2267 * @callback: Function to call when this transaction
2268 * completes. If the return value of this
2269 * function isn't an error, then this function
2270 * is guaranteed to be called when the
2271 * transaction completes. If this parameter is
2272 * NULL, then the generic callback registered
2273 * through cvmx_usb_register_callback is
2274 * called. If both are NULL, then there is no
2275 * way to know when a transaction completes.
2276 * @user_data: User supplied data returned when the
2277 * callback is called. This is only used if
2278 * callback in not NULL.
2280 * Returns: A submitted transaction handle or negative on
2281 * failure. Negative values are error codes.
2283 int cvmx_usb_submit_control(struct cvmx_usb_state
*state
, int pipe_handle
,
2284 uint64_t control_header
,
2285 uint64_t buffer
, int buffer_length
,
2286 cvmx_usb_callback_func_t callback
,
2290 struct cvmx_usb_internal_state
*usb
= (struct cvmx_usb_internal_state
*)state
;
2291 union cvmx_usb_control_header
*header
=
2292 cvmx_phys_to_ptr(control_header
);
2294 /* Pipe handle checking is done later in a common place */
2295 if (unlikely(!control_header
))
2297 /* Some drivers send a buffer with a zero length. God only knows why */
2298 if (unlikely(buffer
&& (buffer_length
< 0)))
2300 if (unlikely(!buffer
&& (buffer_length
!= 0)))
2302 if ((header
->s
.request_type
& 0x80) == 0)
2303 buffer_length
= le16_to_cpu(header
->s
.length
);
2305 submit_handle
= __cvmx_usb_submit_transaction(usb
, pipe_handle
,
2306 CVMX_USB_TRANSFER_CONTROL
,
2310 0, /* iso_start_frame */
2311 0, /* iso_number_packets */
2312 NULL
, /* iso_packets */
2315 return submit_handle
;
2320 * Call to submit a USB Isochronous transfer to a pipe.
2322 * @state: USB device state populated by
2323 * cvmx_usb_initialize().
2325 * Handle to the pipe for the transfer.
2327 * Number of frames into the future to schedule
2330 * Number of sequential packets to transfer.
2331 * "packets" is a pointer to an array of this
2332 * many packet structures.
2333 * @packets: Description of each transfer packet as
2334 * defined by struct cvmx_usb_iso_packet. The array
2335 * pointed to here must stay valid until the
2336 * complete callback is called.
2337 * @buffer: Physical address of the data buffer in
2338 * memory. Note that this is NOT A POINTER, but
2339 * the full 64bit physical address of the
2340 * buffer. This may be zero if buffer_length is
2343 * Length of buffer in bytes.
2344 * @callback: Function to call when this transaction
2345 * completes. If the return value of this
2346 * function isn't an error, then this function
2347 * is guaranteed to be called when the
2348 * transaction completes. If this parameter is
2349 * NULL, then the generic callback registered
2350 * through cvmx_usb_register_callback is
2351 * called. If both are NULL, then there is no
2352 * way to know when a transaction completes.
2353 * @user_data: User supplied data returned when the
2354 * callback is called. This is only used if
2355 * callback in not NULL.
2357 * Returns: A submitted transaction handle or negative on
2358 * failure. Negative values are error codes.
2360 int cvmx_usb_submit_isochronous(struct cvmx_usb_state
*state
, int pipe_handle
,
2363 struct cvmx_usb_iso_packet packets
[],
2364 uint64_t buffer
, int buffer_length
,
2365 cvmx_usb_callback_func_t callback
,
2369 struct cvmx_usb_internal_state
*usb
= (struct cvmx_usb_internal_state
*)state
;
2371 /* Pipe handle checking is done later in a common place */
2372 if (unlikely(start_frame
< 0))
2374 if (unlikely(number_packets
< 1))
2376 if (unlikely(!packets
))
2378 if (unlikely(!buffer
))
2380 if (unlikely(buffer_length
< 0))
2383 submit_handle
= __cvmx_usb_submit_transaction(usb
, pipe_handle
,
2384 CVMX_USB_TRANSFER_ISOCHRONOUS
,
2387 0, /* control_header */
2393 return submit_handle
;
2398 * Cancel one outstanding request in a pipe. Canceling a request
2399 * can fail if the transaction has already completed before cancel
2400 * is called. Even after a successful cancel call, it may take
2401 * a frame or two for the cvmx_usb_poll() function to call the
2402 * associated callback.
2404 * @state: USB device state populated by
2405 * cvmx_usb_initialize().
2407 * Pipe handle to cancel requests in.
2409 * Handle to transaction to cancel, returned by the submit function.
2411 * Returns: 0 or a negative error code.
2413 int cvmx_usb_cancel(struct cvmx_usb_state
*state
, int pipe_handle
, int submit_handle
)
2415 struct cvmx_usb_transaction
*transaction
;
2416 struct cvmx_usb_internal_state
*usb
= (struct cvmx_usb_internal_state
*)state
;
2417 struct cvmx_usb_pipe
*pipe
= usb
->pipe
+ pipe_handle
;
2419 if (unlikely((pipe_handle
< 0) || (pipe_handle
>= MAX_PIPES
)))
2421 if (unlikely((submit_handle
< 0) || (submit_handle
>= MAX_TRANSACTIONS
)))
2424 /* Fail if the pipe isn't open */
2425 if (unlikely((pipe
->flags
& __CVMX_USB_PIPE_FLAGS_OPEN
) == 0))
2428 transaction
= usb
->transaction
+ submit_handle
;
2430 /* Fail if this transaction already completed */
2431 if (unlikely((transaction
->flags
& __CVMX_USB_TRANSACTION_FLAGS_IN_USE
) == 0))
2435 * If the transaction is the HEAD of the queue and scheduled. We need to
2438 if ((pipe
->head
== transaction
) &&
2439 (pipe
->flags
& __CVMX_USB_PIPE_FLAGS_SCHEDULED
)) {
2440 union cvmx_usbcx_hccharx usbc_hcchar
;
2442 usb
->pipe_for_channel
[pipe
->channel
] = NULL
;
2443 pipe
->flags
&= ~__CVMX_USB_PIPE_FLAGS_SCHEDULED
;
2447 usbc_hcchar
.u32
= __cvmx_usb_read_csr32(usb
, CVMX_USBCX_HCCHARX(pipe
->channel
, usb
->index
));
2448 /* If the channel isn't enabled then the transaction already completed */
2449 if (usbc_hcchar
.s
.chena
) {
2450 usbc_hcchar
.s
.chdis
= 1;
2451 __cvmx_usb_write_csr32(usb
, CVMX_USBCX_HCCHARX(pipe
->channel
, usb
->index
), usbc_hcchar
.u32
);
2454 __cvmx_usb_perform_complete(usb
, pipe
, transaction
, CVMX_USB_COMPLETE_CANCEL
);
2460 * Cancel all outstanding requests in a pipe. Logically all this
2461 * does is call cvmx_usb_cancel() in a loop.
2463 * @state: USB device state populated by
2464 * cvmx_usb_initialize().
2466 * Pipe handle to cancel requests in.
2468 * Returns: 0 or a negative error code.
2470 int cvmx_usb_cancel_all(struct cvmx_usb_state
*state
, int pipe_handle
)
2472 struct cvmx_usb_internal_state
*usb
= (struct cvmx_usb_internal_state
*)state
;
2473 struct cvmx_usb_pipe
*pipe
= usb
->pipe
+ pipe_handle
;
2475 if (unlikely((pipe_handle
< 0) || (pipe_handle
>= MAX_PIPES
)))
2478 /* Fail if the pipe isn't open */
2479 if (unlikely((pipe
->flags
& __CVMX_USB_PIPE_FLAGS_OPEN
) == 0))
2482 /* Simply loop through and attempt to cancel each transaction */
2483 while (pipe
->head
) {
2484 int result
= cvmx_usb_cancel(state
, pipe_handle
,
2485 __cvmx_usb_get_submit_handle(usb
, pipe
->head
));
2486 if (unlikely(result
!= 0))
2494 * Close a pipe created with cvmx_usb_open_pipe().
2496 * @state: USB device state populated by
2497 * cvmx_usb_initialize().
2499 * Pipe handle to close.
2501 * Returns: 0 or a negative error code. EBUSY is returned if the pipe has
2502 * outstanding transfers.
2504 int cvmx_usb_close_pipe(struct cvmx_usb_state
*state
, int pipe_handle
)
2506 struct cvmx_usb_internal_state
*usb
= (struct cvmx_usb_internal_state
*)state
;
2507 struct cvmx_usb_pipe
*pipe
= usb
->pipe
+ pipe_handle
;
2509 if (unlikely((pipe_handle
< 0) || (pipe_handle
>= MAX_PIPES
)))
2512 /* Fail if the pipe isn't open */
2513 if (unlikely((pipe
->flags
& __CVMX_USB_PIPE_FLAGS_OPEN
) == 0))
2516 /* Fail if the pipe has pending transactions */
2517 if (unlikely(pipe
->head
))
2521 __cvmx_usb_remove_pipe(&usb
->idle_pipes
, pipe
);
2522 __cvmx_usb_append_pipe(&usb
->free_pipes
, pipe
);
2529 * Register a function to be called when various USB events occur.
2531 * @state: USB device state populated by
2532 * cvmx_usb_initialize().
2533 * @reason: Which event to register for.
2534 * @callback: Function to call when the event occurs.
2535 * @user_data: User data parameter to the function.
2537 * Returns: 0 or a negative error code.
2539 int cvmx_usb_register_callback(struct cvmx_usb_state
*state
,
2540 enum cvmx_usb_callback reason
,
2541 cvmx_usb_callback_func_t callback
,
2544 struct cvmx_usb_internal_state
*usb
= (struct cvmx_usb_internal_state
*)state
;
2546 if (unlikely(reason
>= __CVMX_USB_CALLBACK_END
))
2548 if (unlikely(!callback
))
2551 usb
->callback
[reason
] = callback
;
2552 usb
->callback_data
[reason
] = user_data
;
2559 * Get the current USB protocol level frame number. The frame
2560 * number is always in the range of 0-0x7ff.
2562 * @state: USB device state populated by
2563 * cvmx_usb_initialize().
2565 * Returns: USB frame number
2567 int cvmx_usb_get_frame_number(struct cvmx_usb_state
*state
)
2570 struct cvmx_usb_internal_state
*usb
= (struct cvmx_usb_internal_state
*)state
;
2571 union cvmx_usbcx_hfnum usbc_hfnum
;
2573 usbc_hfnum
.u32
= __cvmx_usb_read_csr32(usb
, CVMX_USBCX_HFNUM(usb
->index
));
2574 frame_number
= usbc_hfnum
.s
.frnum
;
2576 return frame_number
;
2581 * Poll a channel for status
2584 * @channel: Channel to poll
2586 * Returns: Zero on success
2588 static int __cvmx_usb_poll_channel(struct cvmx_usb_internal_state
*usb
, int channel
)
2590 union cvmx_usbcx_hcintx usbc_hcint
;
2591 union cvmx_usbcx_hctsizx usbc_hctsiz
;
2592 union cvmx_usbcx_hccharx usbc_hcchar
;
2593 struct cvmx_usb_pipe
*pipe
;
2594 struct cvmx_usb_transaction
*transaction
;
2595 int bytes_this_transfer
;
2596 int bytes_in_last_packet
;
2597 int packets_processed
;
2598 int buffer_space_left
;
2600 /* Read the interrupt status bits for the channel */
2601 usbc_hcint
.u32
= __cvmx_usb_read_csr32(usb
, CVMX_USBCX_HCINTX(channel
, usb
->index
));
2603 if (usb
->init_flags
& CVMX_USB_INITIALIZE_FLAGS_NO_DMA
) {
2604 usbc_hcchar
.u32
= __cvmx_usb_read_csr32(usb
, CVMX_USBCX_HCCHARX(channel
, usb
->index
));
2606 if (usbc_hcchar
.s
.chena
&& usbc_hcchar
.s
.chdis
) {
2608 * There seems to be a bug in CN31XX which can cause
2609 * interrupt IN transfers to get stuck until we do a
2610 * write of HCCHARX without changing things
2612 __cvmx_usb_write_csr32(usb
, CVMX_USBCX_HCCHARX(channel
, usb
->index
), usbc_hcchar
.u32
);
2617 * In non DMA mode the channels don't halt themselves. We need
2618 * to manually disable channels that are left running
2620 if (!usbc_hcint
.s
.chhltd
) {
2621 if (usbc_hcchar
.s
.chena
) {
2622 union cvmx_usbcx_hcintmskx hcintmsk
;
2623 /* Disable all interrupts except CHHLTD */
2625 hcintmsk
.s
.chhltdmsk
= 1;
2626 __cvmx_usb_write_csr32(usb
, CVMX_USBCX_HCINTMSKX(channel
, usb
->index
), hcintmsk
.u32
);
2627 usbc_hcchar
.s
.chdis
= 1;
2628 __cvmx_usb_write_csr32(usb
, CVMX_USBCX_HCCHARX(channel
, usb
->index
), usbc_hcchar
.u32
);
2630 } else if (usbc_hcint
.s
.xfercompl
) {
2631 /* Successful IN/OUT with transfer complete. Channel halt isn't needed */
2633 cvmx_dprintf("USB%d: Channel %d interrupt without halt\n", usb
->index
, channel
);
2639 * There is are no interrupts that we need to process when the
2640 * channel is still running
2642 if (!usbc_hcint
.s
.chhltd
)
2646 /* Disable the channel interrupts now that it is done */
2647 __cvmx_usb_write_csr32(usb
, CVMX_USBCX_HCINTMSKX(channel
, usb
->index
), 0);
2648 usb
->idle_hardware_channels
|= (1<<channel
);
2650 /* Make sure this channel is tied to a valid pipe */
2651 pipe
= usb
->pipe_for_channel
[channel
];
2652 CVMX_PREFETCH(pipe
, 0);
2653 CVMX_PREFETCH(pipe
, 128);
2656 transaction
= pipe
->head
;
2657 CVMX_PREFETCH(transaction
, 0);
2660 * Disconnect this pipe from the HW channel. Later the schedule
2661 * function will figure out which pipe needs to go
2663 usb
->pipe_for_channel
[channel
] = NULL
;
2664 pipe
->flags
&= ~__CVMX_USB_PIPE_FLAGS_SCHEDULED
;
2667 * Read the channel config info so we can figure out how much data
2670 usbc_hcchar
.u32
= __cvmx_usb_read_csr32(usb
, CVMX_USBCX_HCCHARX(channel
, usb
->index
));
2671 usbc_hctsiz
.u32
= __cvmx_usb_read_csr32(usb
, CVMX_USBCX_HCTSIZX(channel
, usb
->index
));
2674 * Calculating the number of bytes successfully transferred is dependent
2675 * on the transfer direction
2677 packets_processed
= transaction
->pktcnt
- usbc_hctsiz
.s
.pktcnt
;
2678 if (usbc_hcchar
.s
.epdir
) {
2680 * IN transactions are easy. For every byte received the
2681 * hardware decrements xfersize. All we need to do is subtract
2682 * the current value of xfersize from its starting value and we
2683 * know how many bytes were written to the buffer
2685 bytes_this_transfer
= transaction
->xfersize
- usbc_hctsiz
.s
.xfersize
;
2688 * OUT transaction don't decrement xfersize. Instead pktcnt is
2689 * decremented on every successful packet send. The hardware
2690 * does this when it receives an ACK, or NYET. If it doesn't
2691 * receive one of these responses pktcnt doesn't change
2693 bytes_this_transfer
= packets_processed
* usbc_hcchar
.s
.mps
;
2695 * The last packet may not be a full transfer if we didn't have
2698 if (bytes_this_transfer
> transaction
->xfersize
)
2699 bytes_this_transfer
= transaction
->xfersize
;
2701 /* Figure out how many bytes were in the last packet of the transfer */
2702 if (packets_processed
)
2703 bytes_in_last_packet
= bytes_this_transfer
- (packets_processed
-1) * usbc_hcchar
.s
.mps
;
2705 bytes_in_last_packet
= bytes_this_transfer
;
2708 * As a special case, setup transactions output the setup header, not
2709 * the user's data. For this reason we don't count setup data as bytes
2712 if ((transaction
->stage
== CVMX_USB_STAGE_SETUP
) ||
2713 (transaction
->stage
== CVMX_USB_STAGE_SETUP_SPLIT_COMPLETE
))
2714 bytes_this_transfer
= 0;
2717 * Add the bytes transferred to the running total. It is important that
2718 * bytes_this_transfer doesn't count any data that needs to be
2721 transaction
->actual_bytes
+= bytes_this_transfer
;
2722 if (transaction
->type
== CVMX_USB_TRANSFER_ISOCHRONOUS
)
2723 buffer_space_left
= transaction
->iso_packets
[0].length
- transaction
->actual_bytes
;
2725 buffer_space_left
= transaction
->buffer_length
- transaction
->actual_bytes
;
2728 * We need to remember the PID toggle state for the next transaction.
2729 * The hardware already updated it for the next transaction
2731 pipe
->pid_toggle
= !(usbc_hctsiz
.s
.pid
== 0);
2734 * For high speed bulk out, assume the next transaction will need to do
2735 * a ping before proceeding. If this isn't true the ACK processing below
2736 * will clear this flag
2738 if ((pipe
->device_speed
== CVMX_USB_SPEED_HIGH
) &&
2739 (pipe
->transfer_type
== CVMX_USB_TRANSFER_BULK
) &&
2740 (pipe
->transfer_dir
== CVMX_USB_DIRECTION_OUT
))
2741 pipe
->flags
|= __CVMX_USB_PIPE_FLAGS_NEED_PING
;
2743 if (usbc_hcint
.s
.stall
) {
2745 * STALL as a response means this transaction cannot be
2746 * completed because the device can't process transactions. Tell
2747 * the user. Any data that was transferred will be counted on
2748 * the actual bytes transferred
2750 pipe
->pid_toggle
= 0;
2751 __cvmx_usb_perform_complete(usb
, pipe
, transaction
, CVMX_USB_COMPLETE_STALL
);
2752 } else if (usbc_hcint
.s
.xacterr
) {
2754 * We know at least one packet worked if we get a ACK or NAK.
2755 * Reset the retry counter
2757 if (usbc_hcint
.s
.nak
|| usbc_hcint
.s
.ack
)
2758 transaction
->retries
= 0;
2759 transaction
->retries
++;
2760 if (transaction
->retries
> MAX_RETRIES
) {
2762 * XactErr as a response means the device signaled
2763 * something wrong with the transfer. For example, PID
2764 * toggle errors cause these
2766 __cvmx_usb_perform_complete(usb
, pipe
, transaction
, CVMX_USB_COMPLETE_XACTERR
);
2769 * If this was a split then clear our split in progress
2772 if (usb
->active_split
== transaction
)
2773 usb
->active_split
= NULL
;
2775 * Rewind to the beginning of the transaction by anding
2776 * off the split complete bit
2778 transaction
->stage
&= ~1;
2779 pipe
->split_sc_frame
= -1;
2780 pipe
->next_tx_frame
+= pipe
->interval
;
2781 if (pipe
->next_tx_frame
< usb
->frame_number
)
2782 pipe
->next_tx_frame
= usb
->frame_number
+ pipe
->interval
-
2783 (usb
->frame_number
- pipe
->next_tx_frame
) % pipe
->interval
;
2785 } else if (usbc_hcint
.s
.bblerr
) {
2786 /* Babble Error (BblErr) */
2787 __cvmx_usb_perform_complete(usb
, pipe
, transaction
, CVMX_USB_COMPLETE_BABBLEERR
);
2788 } else if (usbc_hcint
.s
.datatglerr
) {
2789 /* We'll retry the exact same transaction again */
2790 transaction
->retries
++;
2791 } else if (usbc_hcint
.s
.nyet
) {
2793 * NYET as a response is only allowed in three cases: as a
2794 * response to a ping, as a response to a split transaction, and
2795 * as a response to a bulk out. The ping case is handled by
2796 * hardware, so we only have splits and bulk out
2798 if (!__cvmx_usb_pipe_needs_split(usb
, pipe
)) {
2799 transaction
->retries
= 0;
2801 * If there is more data to go then we need to try
2802 * again. Otherwise this transaction is complete
2804 if ((buffer_space_left
== 0) || (bytes_in_last_packet
< pipe
->max_packet
))
2805 __cvmx_usb_perform_complete(usb
, pipe
, transaction
, CVMX_USB_COMPLETE_SUCCESS
);
2808 * Split transactions retry the split complete 4 times
2809 * then rewind to the start split and do the entire
2810 * transactions again
2812 transaction
->retries
++;
2813 if ((transaction
->retries
& 0x3) == 0) {
2815 * Rewind to the beginning of the transaction by
2816 * anding off the split complete bit
2818 transaction
->stage
&= ~1;
2819 pipe
->split_sc_frame
= -1;
2822 } else if (usbc_hcint
.s
.ack
) {
2823 transaction
->retries
= 0;
2825 * The ACK bit can only be checked after the other error bits.
2826 * This is because a multi packet transfer may succeed in a
2827 * number of packets and then get a different response on the
2828 * last packet. In this case both ACK and the last response bit
2829 * will be set. If none of the other response bits is set, then
2830 * the last packet must have been an ACK
2832 * Since we got an ACK, we know we don't need to do a ping on
2835 pipe
->flags
&= ~__CVMX_USB_PIPE_FLAGS_NEED_PING
;
2837 switch (transaction
->type
) {
2838 case CVMX_USB_TRANSFER_CONTROL
:
2839 switch (transaction
->stage
) {
2840 case CVMX_USB_STAGE_NON_CONTROL
:
2841 case CVMX_USB_STAGE_NON_CONTROL_SPLIT_COMPLETE
:
2842 /* This should be impossible */
2843 __cvmx_usb_perform_complete(usb
, pipe
, transaction
, CVMX_USB_COMPLETE_ERROR
);
2845 case CVMX_USB_STAGE_SETUP
:
2846 pipe
->pid_toggle
= 1;
2847 if (__cvmx_usb_pipe_needs_split(usb
, pipe
))
2848 transaction
->stage
= CVMX_USB_STAGE_SETUP_SPLIT_COMPLETE
;
2850 union cvmx_usb_control_header
*header
=
2851 cvmx_phys_to_ptr(transaction
->control_header
);
2852 if (header
->s
.length
)
2853 transaction
->stage
= CVMX_USB_STAGE_DATA
;
2855 transaction
->stage
= CVMX_USB_STAGE_STATUS
;
2858 case CVMX_USB_STAGE_SETUP_SPLIT_COMPLETE
:
2860 union cvmx_usb_control_header
*header
=
2861 cvmx_phys_to_ptr(transaction
->control_header
);
2862 if (header
->s
.length
)
2863 transaction
->stage
= CVMX_USB_STAGE_DATA
;
2865 transaction
->stage
= CVMX_USB_STAGE_STATUS
;
2868 case CVMX_USB_STAGE_DATA
:
2869 if (__cvmx_usb_pipe_needs_split(usb
, pipe
)) {
2870 transaction
->stage
= CVMX_USB_STAGE_DATA_SPLIT_COMPLETE
;
2872 * For setup OUT data that are splits,
2873 * the hardware doesn't appear to count
2874 * transferred data. Here we manually
2875 * update the data transferred
2877 if (!usbc_hcchar
.s
.epdir
) {
2878 if (buffer_space_left
< pipe
->max_packet
)
2879 transaction
->actual_bytes
+= buffer_space_left
;
2881 transaction
->actual_bytes
+= pipe
->max_packet
;
2883 } else if ((buffer_space_left
== 0) || (bytes_in_last_packet
< pipe
->max_packet
)) {
2884 pipe
->pid_toggle
= 1;
2885 transaction
->stage
= CVMX_USB_STAGE_STATUS
;
2888 case CVMX_USB_STAGE_DATA_SPLIT_COMPLETE
:
2889 if ((buffer_space_left
== 0) || (bytes_in_last_packet
< pipe
->max_packet
)) {
2890 pipe
->pid_toggle
= 1;
2891 transaction
->stage
= CVMX_USB_STAGE_STATUS
;
2893 transaction
->stage
= CVMX_USB_STAGE_DATA
;
2896 case CVMX_USB_STAGE_STATUS
:
2897 if (__cvmx_usb_pipe_needs_split(usb
, pipe
))
2898 transaction
->stage
= CVMX_USB_STAGE_STATUS_SPLIT_COMPLETE
;
2900 __cvmx_usb_perform_complete(usb
, pipe
, transaction
, CVMX_USB_COMPLETE_SUCCESS
);
2902 case CVMX_USB_STAGE_STATUS_SPLIT_COMPLETE
:
2903 __cvmx_usb_perform_complete(usb
, pipe
, transaction
, CVMX_USB_COMPLETE_SUCCESS
);
2907 case CVMX_USB_TRANSFER_BULK
:
2908 case CVMX_USB_TRANSFER_INTERRUPT
:
2910 * The only time a bulk transfer isn't complete when it
2911 * finishes with an ACK is during a split transaction.
2912 * For splits we need to continue the transfer if more
2915 if (__cvmx_usb_pipe_needs_split(usb
, pipe
)) {
2916 if (transaction
->stage
== CVMX_USB_STAGE_NON_CONTROL
)
2917 transaction
->stage
= CVMX_USB_STAGE_NON_CONTROL_SPLIT_COMPLETE
;
2919 if (buffer_space_left
&& (bytes_in_last_packet
== pipe
->max_packet
))
2920 transaction
->stage
= CVMX_USB_STAGE_NON_CONTROL
;
2922 if (transaction
->type
== CVMX_USB_TRANSFER_INTERRUPT
)
2923 pipe
->next_tx_frame
+= pipe
->interval
;
2924 __cvmx_usb_perform_complete(usb
, pipe
, transaction
, CVMX_USB_COMPLETE_SUCCESS
);
2928 if ((pipe
->device_speed
== CVMX_USB_SPEED_HIGH
) &&
2929 (pipe
->transfer_type
== CVMX_USB_TRANSFER_BULK
) &&
2930 (pipe
->transfer_dir
== CVMX_USB_DIRECTION_OUT
) &&
2932 pipe
->flags
|= __CVMX_USB_PIPE_FLAGS_NEED_PING
;
2933 if (!buffer_space_left
|| (bytes_in_last_packet
< pipe
->max_packet
)) {
2934 if (transaction
->type
== CVMX_USB_TRANSFER_INTERRUPT
)
2935 pipe
->next_tx_frame
+= pipe
->interval
;
2936 __cvmx_usb_perform_complete(usb
, pipe
, transaction
, CVMX_USB_COMPLETE_SUCCESS
);
2940 case CVMX_USB_TRANSFER_ISOCHRONOUS
:
2941 if (__cvmx_usb_pipe_needs_split(usb
, pipe
)) {
2943 * ISOCHRONOUS OUT splits don't require a
2944 * complete split stage. Instead they use a
2945 * sequence of begin OUT splits to transfer the
2946 * data 188 bytes at a time. Once the transfer
2947 * is complete, the pipe sleeps until the next
2950 if (pipe
->transfer_dir
== CVMX_USB_DIRECTION_OUT
) {
2952 * If no space left or this wasn't a max
2953 * size packet then this transfer is
2954 * complete. Otherwise start it again to
2955 * send the next 188 bytes
2957 if (!buffer_space_left
|| (bytes_this_transfer
< 188)) {
2958 pipe
->next_tx_frame
+= pipe
->interval
;
2959 __cvmx_usb_perform_complete(usb
, pipe
, transaction
, CVMX_USB_COMPLETE_SUCCESS
);
2962 if (transaction
->stage
== CVMX_USB_STAGE_NON_CONTROL_SPLIT_COMPLETE
) {
2964 * We are in the incoming data
2965 * phase. Keep getting data
2966 * until we run out of space or
2967 * get a small packet
2969 if ((buffer_space_left
== 0) || (bytes_in_last_packet
< pipe
->max_packet
)) {
2970 pipe
->next_tx_frame
+= pipe
->interval
;
2971 __cvmx_usb_perform_complete(usb
, pipe
, transaction
, CVMX_USB_COMPLETE_SUCCESS
);
2974 transaction
->stage
= CVMX_USB_STAGE_NON_CONTROL_SPLIT_COMPLETE
;
2977 pipe
->next_tx_frame
+= pipe
->interval
;
2978 __cvmx_usb_perform_complete(usb
, pipe
, transaction
, CVMX_USB_COMPLETE_SUCCESS
);
2982 } else if (usbc_hcint
.s
.nak
) {
2983 /* If this was a split then clear our split in progress marker */
2984 if (usb
->active_split
== transaction
)
2985 usb
->active_split
= NULL
;
2987 * NAK as a response means the device couldn't accept the
2988 * transaction, but it should be retried in the future. Rewind
2989 * to the beginning of the transaction by anding off the split
2990 * complete bit. Retry in the next interval
2992 transaction
->retries
= 0;
2993 transaction
->stage
&= ~1;
2994 pipe
->next_tx_frame
+= pipe
->interval
;
2995 if (pipe
->next_tx_frame
< usb
->frame_number
)
2996 pipe
->next_tx_frame
= usb
->frame_number
+ pipe
->interval
-
2997 (usb
->frame_number
- pipe
->next_tx_frame
) % pipe
->interval
;
2999 struct cvmx_usb_port_status port
;
3000 port
= cvmx_usb_get_status((struct cvmx_usb_state
*)usb
);
3001 if (port
.port_enabled
) {
3002 /* We'll retry the exact same transaction again */
3003 transaction
->retries
++;
3006 * We get channel halted interrupts with no result bits
3007 * sets when the cable is unplugged
3009 __cvmx_usb_perform_complete(usb
, pipe
, transaction
, CVMX_USB_COMPLETE_ERROR
);
3017 * Poll the USB block for status and call all needed callback
3018 * handlers. This function is meant to be called in the interrupt
3019 * handler for the USB controller. It can also be called
3020 * periodically in a loop for non-interrupt based operation.
3022 * @state: USB device state populated by
3023 * cvmx_usb_initialize().
3025 * Returns: 0 or a negative error code.
3027 int cvmx_usb_poll(struct cvmx_usb_state
*state
)
3029 union cvmx_usbcx_hfnum usbc_hfnum
;
3030 union cvmx_usbcx_gintsts usbc_gintsts
;
3031 struct cvmx_usb_internal_state
*usb
= (struct cvmx_usb_internal_state
*)state
;
3033 CVMX_PREFETCH(usb
, 0);
3034 CVMX_PREFETCH(usb
, 1*128);
3035 CVMX_PREFETCH(usb
, 2*128);
3036 CVMX_PREFETCH(usb
, 3*128);
3037 CVMX_PREFETCH(usb
, 4*128);
3039 /* Update the frame counter */
3040 usbc_hfnum
.u32
= __cvmx_usb_read_csr32(usb
, CVMX_USBCX_HFNUM(usb
->index
));
3041 if ((usb
->frame_number
&0x3fff) > usbc_hfnum
.s
.frnum
)
3042 usb
->frame_number
+= 0x4000;
3043 usb
->frame_number
&= ~0x3fffull
;
3044 usb
->frame_number
|= usbc_hfnum
.s
.frnum
;
3046 /* Read the pending interrupts */
3047 usbc_gintsts
.u32
= __cvmx_usb_read_csr32(usb
, CVMX_USBCX_GINTSTS(usb
->index
));
3049 /* Clear the interrupts now that we know about them */
3050 __cvmx_usb_write_csr32(usb
, CVMX_USBCX_GINTSTS(usb
->index
), usbc_gintsts
.u32
);
3052 if (usbc_gintsts
.s
.rxflvl
) {
3054 * RxFIFO Non-Empty (RxFLvl)
3055 * Indicates that there is at least one packet pending to be
3056 * read from the RxFIFO.
3058 * In DMA mode this is handled by hardware
3060 if (usb
->init_flags
& CVMX_USB_INITIALIZE_FLAGS_NO_DMA
)
3061 __cvmx_usb_poll_rx_fifo(usb
);
3063 if (usbc_gintsts
.s
.ptxfemp
|| usbc_gintsts
.s
.nptxfemp
) {
3064 /* Fill the Tx FIFOs when not in DMA mode */
3065 if (usb
->init_flags
& CVMX_USB_INITIALIZE_FLAGS_NO_DMA
)
3066 __cvmx_usb_poll_tx_fifo(usb
);
3068 if (usbc_gintsts
.s
.disconnint
|| usbc_gintsts
.s
.prtint
) {
3069 union cvmx_usbcx_hprt usbc_hprt
;
3071 * Disconnect Detected Interrupt (DisconnInt)
3072 * Asserted when a device disconnect is detected.
3074 * Host Port Interrupt (PrtInt)
3075 * The core sets this bit to indicate a change in port status of
3076 * one of the O2P USB core ports in Host mode. The application
3077 * must read the Host Port Control and Status (HPRT) register to
3078 * determine the exact event that caused this interrupt. The
3079 * application must clear the appropriate status bit in the Host
3080 * Port Control and Status register to clear this bit.
3082 * Call the user's port callback
3084 __cvmx_usb_perform_callback(usb
, NULL
, NULL
,
3085 CVMX_USB_CALLBACK_PORT_CHANGED
,
3086 CVMX_USB_COMPLETE_SUCCESS
);
3087 /* Clear the port change bits */
3088 usbc_hprt
.u32
= __cvmx_usb_read_csr32(usb
, CVMX_USBCX_HPRT(usb
->index
));
3089 usbc_hprt
.s
.prtena
= 0;
3090 __cvmx_usb_write_csr32(usb
, CVMX_USBCX_HPRT(usb
->index
), usbc_hprt
.u32
);
3092 if (usbc_gintsts
.s
.hchint
) {
3094 * Host Channels Interrupt (HChInt)
3095 * The core sets this bit to indicate that an interrupt is
3096 * pending on one of the channels of the core (in Host mode).
3097 * The application must read the Host All Channels Interrupt
3098 * (HAINT) register to determine the exact number of the channel
3099 * on which the interrupt occurred, and then read the
3100 * corresponding Host Channel-n Interrupt (HCINTn) register to
3101 * determine the exact cause of the interrupt. The application
3102 * must clear the appropriate status bit in the HCINTn register
3103 * to clear this bit.
3105 union cvmx_usbcx_haint usbc_haint
;
3106 usbc_haint
.u32
= __cvmx_usb_read_csr32(usb
, CVMX_USBCX_HAINT(usb
->index
));
3107 while (usbc_haint
.u32
) {
3110 channel
= __fls(usbc_haint
.u32
);
3111 __cvmx_usb_poll_channel(usb
, channel
);
3112 usbc_haint
.u32
^= 1<<channel
;
3116 __cvmx_usb_schedule(usb
, usbc_gintsts
.s
.sof
);