IB/hfi1: Adjust default MTU to be 10KB
[deliverable/linux.git] / drivers / staging / rdma / hfi1 / driver.c
1 /*
2 * Copyright(c) 2015, 2016 Intel Corporation.
3 *
4 * This file is provided under a dual BSD/GPLv2 license. When using or
5 * redistributing this file, you may do so under either license.
6 *
7 * GPL LICENSE SUMMARY
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * BSD LICENSE
19 *
20 * Redistribution and use in source and binary forms, with or without
21 * modification, are permitted provided that the following conditions
22 * are met:
23 *
24 * - Redistributions of source code must retain the above copyright
25 * notice, this list of conditions and the following disclaimer.
26 * - Redistributions in binary form must reproduce the above copyright
27 * notice, this list of conditions and the following disclaimer in
28 * the documentation and/or other materials provided with the
29 * distribution.
30 * - Neither the name of Intel Corporation nor the names of its
31 * contributors may be used to endorse or promote products derived
32 * from this software without specific prior written permission.
33 *
34 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
35 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
36 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
37 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
38 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
39 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
40 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
41 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
42 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
43 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
44 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
45 *
46 */
47
48 #include <linux/spinlock.h>
49 #include <linux/pci.h>
50 #include <linux/io.h>
51 #include <linux/delay.h>
52 #include <linux/netdevice.h>
53 #include <linux/vmalloc.h>
54 #include <linux/module.h>
55 #include <linux/prefetch.h>
56 #include <rdma/ib_verbs.h>
57
58 #include "hfi.h"
59 #include "trace.h"
60 #include "qp.h"
61 #include "sdma.h"
62
63 #undef pr_fmt
64 #define pr_fmt(fmt) DRIVER_NAME ": " fmt
65
66 /*
67 * The size has to be longer than this string, so we can append
68 * board/chip information to it in the initialization code.
69 */
70 const char ib_hfi1_version[] = HFI1_DRIVER_VERSION "\n";
71
72 DEFINE_SPINLOCK(hfi1_devs_lock);
73 LIST_HEAD(hfi1_dev_list);
74 DEFINE_MUTEX(hfi1_mutex); /* general driver use */
75
76 unsigned int hfi1_max_mtu = HFI1_DEFAULT_MAX_MTU;
77 module_param_named(max_mtu, hfi1_max_mtu, uint, S_IRUGO);
78 MODULE_PARM_DESC(max_mtu, "Set max MTU bytes, default is " __stringify(
79 HFI1_DEFAULT_MAX_MTU));
80
81 unsigned int hfi1_cu = 1;
82 module_param_named(cu, hfi1_cu, uint, S_IRUGO);
83 MODULE_PARM_DESC(cu, "Credit return units");
84
85 unsigned long hfi1_cap_mask = HFI1_CAP_MASK_DEFAULT;
86 static int hfi1_caps_set(const char *, const struct kernel_param *);
87 static int hfi1_caps_get(char *, const struct kernel_param *);
88 static const struct kernel_param_ops cap_ops = {
89 .set = hfi1_caps_set,
90 .get = hfi1_caps_get
91 };
92 module_param_cb(cap_mask, &cap_ops, &hfi1_cap_mask, S_IWUSR | S_IRUGO);
93 MODULE_PARM_DESC(cap_mask, "Bit mask of enabled/disabled HW features");
94
95 MODULE_LICENSE("Dual BSD/GPL");
96 MODULE_DESCRIPTION("Intel Omni-Path Architecture driver");
97 MODULE_VERSION(HFI1_DRIVER_VERSION);
98
99 /*
100 * MAX_PKT_RCV is the max # if packets processed per receive interrupt.
101 */
102 #define MAX_PKT_RECV 64
103 #define EGR_HEAD_UPDATE_THRESHOLD 16
104
105 struct hfi1_ib_stats hfi1_stats;
106
107 static int hfi1_caps_set(const char *val, const struct kernel_param *kp)
108 {
109 int ret = 0;
110 unsigned long *cap_mask_ptr = (unsigned long *)kp->arg,
111 cap_mask = *cap_mask_ptr, value, diff,
112 write_mask = ((HFI1_CAP_WRITABLE_MASK << HFI1_CAP_USER_SHIFT) |
113 HFI1_CAP_WRITABLE_MASK);
114
115 ret = kstrtoul(val, 0, &value);
116 if (ret) {
117 pr_warn("Invalid module parameter value for 'cap_mask'\n");
118 goto done;
119 }
120 /* Get the changed bits (except the locked bit) */
121 diff = value ^ (cap_mask & ~HFI1_CAP_LOCKED_SMASK);
122
123 /* Remove any bits that are not allowed to change after driver load */
124 if (HFI1_CAP_LOCKED() && (diff & ~write_mask)) {
125 pr_warn("Ignoring non-writable capability bits %#lx\n",
126 diff & ~write_mask);
127 diff &= write_mask;
128 }
129
130 /* Mask off any reserved bits */
131 diff &= ~HFI1_CAP_RESERVED_MASK;
132 /* Clear any previously set and changing bits */
133 cap_mask &= ~diff;
134 /* Update the bits with the new capability */
135 cap_mask |= (value & diff);
136 /* Check for any kernel/user restrictions */
137 diff = (cap_mask & (HFI1_CAP_MUST_HAVE_KERN << HFI1_CAP_USER_SHIFT)) ^
138 ((cap_mask & HFI1_CAP_MUST_HAVE_KERN) << HFI1_CAP_USER_SHIFT);
139 cap_mask &= ~diff;
140 /* Set the bitmask to the final set */
141 *cap_mask_ptr = cap_mask;
142 done:
143 return ret;
144 }
145
146 static int hfi1_caps_get(char *buffer, const struct kernel_param *kp)
147 {
148 unsigned long cap_mask = *(unsigned long *)kp->arg;
149
150 cap_mask &= ~HFI1_CAP_LOCKED_SMASK;
151 cap_mask |= ((cap_mask & HFI1_CAP_K2U) << HFI1_CAP_USER_SHIFT);
152
153 return scnprintf(buffer, PAGE_SIZE, "0x%lx", cap_mask);
154 }
155
156 const char *get_unit_name(int unit)
157 {
158 static char iname[16];
159
160 snprintf(iname, sizeof(iname), DRIVER_NAME "_%u", unit);
161 return iname;
162 }
163
164 const char *get_card_name(struct rvt_dev_info *rdi)
165 {
166 struct hfi1_ibdev *ibdev = container_of(rdi, struct hfi1_ibdev, rdi);
167 struct hfi1_devdata *dd = container_of(ibdev,
168 struct hfi1_devdata, verbs_dev);
169 return get_unit_name(dd->unit);
170 }
171
172 struct pci_dev *get_pci_dev(struct rvt_dev_info *rdi)
173 {
174 struct hfi1_ibdev *ibdev = container_of(rdi, struct hfi1_ibdev, rdi);
175 struct hfi1_devdata *dd = container_of(ibdev,
176 struct hfi1_devdata, verbs_dev);
177 return dd->pcidev;
178 }
179
180 /*
181 * Return count of units with at least one port ACTIVE.
182 */
183 int hfi1_count_active_units(void)
184 {
185 struct hfi1_devdata *dd;
186 struct hfi1_pportdata *ppd;
187 unsigned long flags;
188 int pidx, nunits_active = 0;
189
190 spin_lock_irqsave(&hfi1_devs_lock, flags);
191 list_for_each_entry(dd, &hfi1_dev_list, list) {
192 if (!(dd->flags & HFI1_PRESENT) || !dd->kregbase)
193 continue;
194 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
195 ppd = dd->pport + pidx;
196 if (ppd->lid && ppd->linkup) {
197 nunits_active++;
198 break;
199 }
200 }
201 }
202 spin_unlock_irqrestore(&hfi1_devs_lock, flags);
203 return nunits_active;
204 }
205
206 /*
207 * Return count of all units, optionally return in arguments
208 * the number of usable (present) units, and the number of
209 * ports that are up.
210 */
211 int hfi1_count_units(int *npresentp, int *nupp)
212 {
213 int nunits = 0, npresent = 0, nup = 0;
214 struct hfi1_devdata *dd;
215 unsigned long flags;
216 int pidx;
217 struct hfi1_pportdata *ppd;
218
219 spin_lock_irqsave(&hfi1_devs_lock, flags);
220
221 list_for_each_entry(dd, &hfi1_dev_list, list) {
222 nunits++;
223 if ((dd->flags & HFI1_PRESENT) && dd->kregbase)
224 npresent++;
225 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
226 ppd = dd->pport + pidx;
227 if (ppd->lid && ppd->linkup)
228 nup++;
229 }
230 }
231
232 spin_unlock_irqrestore(&hfi1_devs_lock, flags);
233
234 if (npresentp)
235 *npresentp = npresent;
236 if (nupp)
237 *nupp = nup;
238
239 return nunits;
240 }
241
242 /*
243 * Get address of eager buffer from it's index (allocated in chunks, not
244 * contiguous).
245 */
246 static inline void *get_egrbuf(const struct hfi1_ctxtdata *rcd, u64 rhf,
247 u8 *update)
248 {
249 u32 idx = rhf_egr_index(rhf), offset = rhf_egr_buf_offset(rhf);
250
251 *update |= !(idx & (rcd->egrbufs.threshold - 1)) && !offset;
252 return (void *)(((u64)(rcd->egrbufs.rcvtids[idx].addr)) +
253 (offset * RCV_BUF_BLOCK_SIZE));
254 }
255
256 /*
257 * Validate and encode the a given RcvArray Buffer size.
258 * The function will check whether the given size falls within
259 * allowed size ranges for the respective type and, optionally,
260 * return the proper encoding.
261 */
262 inline int hfi1_rcvbuf_validate(u32 size, u8 type, u16 *encoded)
263 {
264 if (unlikely(!PAGE_ALIGNED(size)))
265 return 0;
266 if (unlikely(size < MIN_EAGER_BUFFER))
267 return 0;
268 if (size >
269 (type == PT_EAGER ? MAX_EAGER_BUFFER : MAX_EXPECTED_BUFFER))
270 return 0;
271 if (encoded)
272 *encoded = ilog2(size / PAGE_SIZE) + 1;
273 return 1;
274 }
275
276 static void rcv_hdrerr(struct hfi1_ctxtdata *rcd, struct hfi1_pportdata *ppd,
277 struct hfi1_packet *packet)
278 {
279 struct hfi1_message_header *rhdr = packet->hdr;
280 u32 rte = rhf_rcv_type_err(packet->rhf);
281 int lnh = be16_to_cpu(rhdr->lrh[0]) & 3;
282 struct hfi1_ibport *ibp = &ppd->ibport_data;
283 struct hfi1_devdata *dd = ppd->dd;
284 struct rvt_dev_info *rdi = &dd->verbs_dev.rdi;
285
286 if (packet->rhf & (RHF_VCRC_ERR | RHF_ICRC_ERR))
287 return;
288
289 if (packet->rhf & RHF_TID_ERR) {
290 /* For TIDERR and RC QPs preemptively schedule a NAK */
291 struct hfi1_ib_header *hdr = (struct hfi1_ib_header *)rhdr;
292 struct hfi1_other_headers *ohdr = NULL;
293 u32 tlen = rhf_pkt_len(packet->rhf); /* in bytes */
294 u16 lid = be16_to_cpu(hdr->lrh[1]);
295 u32 qp_num;
296 u32 rcv_flags = 0;
297
298 /* Sanity check packet */
299 if (tlen < 24)
300 goto drop;
301
302 /* Check for GRH */
303 if (lnh == HFI1_LRH_BTH) {
304 ohdr = &hdr->u.oth;
305 } else if (lnh == HFI1_LRH_GRH) {
306 u32 vtf;
307
308 ohdr = &hdr->u.l.oth;
309 if (hdr->u.l.grh.next_hdr != IB_GRH_NEXT_HDR)
310 goto drop;
311 vtf = be32_to_cpu(hdr->u.l.grh.version_tclass_flow);
312 if ((vtf >> IB_GRH_VERSION_SHIFT) != IB_GRH_VERSION)
313 goto drop;
314 rcv_flags |= HFI1_HAS_GRH;
315 } else {
316 goto drop;
317 }
318 /* Get the destination QP number. */
319 qp_num = be32_to_cpu(ohdr->bth[1]) & RVT_QPN_MASK;
320 if (lid < be16_to_cpu(IB_MULTICAST_LID_BASE)) {
321 struct rvt_qp *qp;
322 unsigned long flags;
323
324 rcu_read_lock();
325 qp = rvt_lookup_qpn(rdi, &ibp->rvp, qp_num);
326 if (!qp) {
327 rcu_read_unlock();
328 goto drop;
329 }
330
331 /*
332 * Handle only RC QPs - for other QP types drop error
333 * packet.
334 */
335 spin_lock_irqsave(&qp->r_lock, flags);
336
337 /* Check for valid receive state. */
338 if (!(ib_rvt_state_ops[qp->state] &
339 RVT_PROCESS_RECV_OK)) {
340 ibp->rvp.n_pkt_drops++;
341 }
342
343 switch (qp->ibqp.qp_type) {
344 case IB_QPT_RC:
345 hfi1_rc_hdrerr(
346 rcd,
347 hdr,
348 rcv_flags,
349 qp);
350 break;
351 default:
352 /* For now don't handle any other QP types */
353 break;
354 }
355
356 spin_unlock_irqrestore(&qp->r_lock, flags);
357 rcu_read_unlock();
358 } /* Unicast QP */
359 } /* Valid packet with TIDErr */
360
361 /* handle "RcvTypeErr" flags */
362 switch (rte) {
363 case RHF_RTE_ERROR_OP_CODE_ERR:
364 {
365 u32 opcode;
366 void *ebuf = NULL;
367 __be32 *bth = NULL;
368
369 if (rhf_use_egr_bfr(packet->rhf))
370 ebuf = packet->ebuf;
371
372 if (!ebuf)
373 goto drop; /* this should never happen */
374
375 if (lnh == HFI1_LRH_BTH)
376 bth = (__be32 *)ebuf;
377 else if (lnh == HFI1_LRH_GRH)
378 bth = (__be32 *)((char *)ebuf + sizeof(struct ib_grh));
379 else
380 goto drop;
381
382 opcode = be32_to_cpu(bth[0]) >> 24;
383 opcode &= 0xff;
384
385 if (opcode == IB_OPCODE_CNP) {
386 /*
387 * Only in pre-B0 h/w is the CNP_OPCODE handled
388 * via this code path.
389 */
390 struct rvt_qp *qp = NULL;
391 u32 lqpn, rqpn;
392 u16 rlid;
393 u8 svc_type, sl, sc5;
394
395 sc5 = (be16_to_cpu(rhdr->lrh[0]) >> 12) & 0xf;
396 if (rhf_dc_info(packet->rhf))
397 sc5 |= 0x10;
398 sl = ibp->sc_to_sl[sc5];
399
400 lqpn = be32_to_cpu(bth[1]) & RVT_QPN_MASK;
401 rcu_read_lock();
402 qp = rvt_lookup_qpn(rdi, &ibp->rvp, lqpn);
403 if (!qp) {
404 rcu_read_unlock();
405 goto drop;
406 }
407
408 switch (qp->ibqp.qp_type) {
409 case IB_QPT_UD:
410 rlid = 0;
411 rqpn = 0;
412 svc_type = IB_CC_SVCTYPE_UD;
413 break;
414 case IB_QPT_UC:
415 rlid = be16_to_cpu(rhdr->lrh[3]);
416 rqpn = qp->remote_qpn;
417 svc_type = IB_CC_SVCTYPE_UC;
418 break;
419 default:
420 goto drop;
421 }
422
423 process_becn(ppd, sl, rlid, lqpn, rqpn, svc_type);
424 rcu_read_unlock();
425 }
426
427 packet->rhf &= ~RHF_RCV_TYPE_ERR_SMASK;
428 break;
429 }
430 default:
431 break;
432 }
433
434 drop:
435 return;
436 }
437
438 static inline void init_packet(struct hfi1_ctxtdata *rcd,
439 struct hfi1_packet *packet)
440 {
441 packet->rsize = rcd->rcvhdrqentsize; /* words */
442 packet->maxcnt = rcd->rcvhdrq_cnt * packet->rsize; /* words */
443 packet->rcd = rcd;
444 packet->updegr = 0;
445 packet->etail = -1;
446 packet->rhf_addr = get_rhf_addr(rcd);
447 packet->rhf = rhf_to_cpu(packet->rhf_addr);
448 packet->rhqoff = rcd->head;
449 packet->numpkt = 0;
450 packet->rcv_flags = 0;
451 }
452
453 static void process_ecn(struct rvt_qp *qp, struct hfi1_ib_header *hdr,
454 struct hfi1_other_headers *ohdr,
455 u64 rhf, u32 bth1, struct ib_grh *grh)
456 {
457 struct hfi1_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num);
458 u32 rqpn = 0;
459 u16 rlid;
460 u8 sc5, svc_type;
461
462 switch (qp->ibqp.qp_type) {
463 case IB_QPT_SMI:
464 case IB_QPT_GSI:
465 case IB_QPT_UD:
466 rlid = be16_to_cpu(hdr->lrh[3]);
467 rqpn = be32_to_cpu(ohdr->u.ud.deth[1]) & RVT_QPN_MASK;
468 svc_type = IB_CC_SVCTYPE_UD;
469 break;
470 case IB_QPT_UC:
471 rlid = qp->remote_ah_attr.dlid;
472 rqpn = qp->remote_qpn;
473 svc_type = IB_CC_SVCTYPE_UC;
474 break;
475 case IB_QPT_RC:
476 rlid = qp->remote_ah_attr.dlid;
477 rqpn = qp->remote_qpn;
478 svc_type = IB_CC_SVCTYPE_RC;
479 break;
480 default:
481 return;
482 }
483
484 sc5 = (be16_to_cpu(hdr->lrh[0]) >> 12) & 0xf;
485 if (rhf_dc_info(rhf))
486 sc5 |= 0x10;
487
488 if (bth1 & HFI1_FECN_SMASK) {
489 u16 pkey = (u16)be32_to_cpu(ohdr->bth[0]);
490 u16 dlid = be16_to_cpu(hdr->lrh[1]);
491
492 return_cnp(ibp, qp, rqpn, pkey, dlid, rlid, sc5, grh);
493 }
494
495 if (bth1 & HFI1_BECN_SMASK) {
496 struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
497 u32 lqpn = bth1 & RVT_QPN_MASK;
498 u8 sl = ibp->sc_to_sl[sc5];
499
500 process_becn(ppd, sl, rlid, lqpn, rqpn, svc_type);
501 }
502 }
503
504 struct ps_mdata {
505 struct hfi1_ctxtdata *rcd;
506 u32 rsize;
507 u32 maxcnt;
508 u32 ps_head;
509 u32 ps_tail;
510 u32 ps_seq;
511 };
512
513 static inline void init_ps_mdata(struct ps_mdata *mdata,
514 struct hfi1_packet *packet)
515 {
516 struct hfi1_ctxtdata *rcd = packet->rcd;
517
518 mdata->rcd = rcd;
519 mdata->rsize = packet->rsize;
520 mdata->maxcnt = packet->maxcnt;
521 mdata->ps_head = packet->rhqoff;
522
523 if (HFI1_CAP_KGET_MASK(rcd->flags, DMA_RTAIL)) {
524 mdata->ps_tail = get_rcvhdrtail(rcd);
525 if (rcd->ctxt == HFI1_CTRL_CTXT)
526 mdata->ps_seq = rcd->seq_cnt;
527 else
528 mdata->ps_seq = 0; /* not used with DMA_RTAIL */
529 } else {
530 mdata->ps_tail = 0; /* used only with DMA_RTAIL*/
531 mdata->ps_seq = rcd->seq_cnt;
532 }
533 }
534
535 static inline int ps_done(struct ps_mdata *mdata, u64 rhf,
536 struct hfi1_ctxtdata *rcd)
537 {
538 if (HFI1_CAP_KGET_MASK(rcd->flags, DMA_RTAIL))
539 return mdata->ps_head == mdata->ps_tail;
540 return mdata->ps_seq != rhf_rcv_seq(rhf);
541 }
542
543 static inline int ps_skip(struct ps_mdata *mdata, u64 rhf,
544 struct hfi1_ctxtdata *rcd)
545 {
546 /*
547 * Control context can potentially receive an invalid rhf.
548 * Drop such packets.
549 */
550 if ((rcd->ctxt == HFI1_CTRL_CTXT) && (mdata->ps_head != mdata->ps_tail))
551 return mdata->ps_seq != rhf_rcv_seq(rhf);
552
553 return 0;
554 }
555
556 static inline void update_ps_mdata(struct ps_mdata *mdata,
557 struct hfi1_ctxtdata *rcd)
558 {
559 mdata->ps_head += mdata->rsize;
560 if (mdata->ps_head >= mdata->maxcnt)
561 mdata->ps_head = 0;
562
563 /* Control context must do seq counting */
564 if (!HFI1_CAP_KGET_MASK(rcd->flags, DMA_RTAIL) ||
565 (rcd->ctxt == HFI1_CTRL_CTXT)) {
566 if (++mdata->ps_seq > 13)
567 mdata->ps_seq = 1;
568 }
569 }
570
571 /*
572 * prescan_rxq - search through the receive queue looking for packets
573 * containing Excplicit Congestion Notifications (FECNs, or BECNs).
574 * When an ECN is found, process the Congestion Notification, and toggle
575 * it off.
576 * This is declared as a macro to allow quick checking of the port to avoid
577 * the overhead of a function call if not enabled.
578 */
579 #define prescan_rxq(rcd, packet) \
580 do { \
581 if (rcd->ppd->cc_prescan) \
582 __prescan_rxq(packet); \
583 } while (0)
584 static void __prescan_rxq(struct hfi1_packet *packet)
585 {
586 struct hfi1_ctxtdata *rcd = packet->rcd;
587 struct ps_mdata mdata;
588
589 init_ps_mdata(&mdata, packet);
590
591 while (1) {
592 struct hfi1_devdata *dd = rcd->dd;
593 struct hfi1_ibport *ibp = &rcd->ppd->ibport_data;
594 __le32 *rhf_addr = (__le32 *)rcd->rcvhdrq + mdata.ps_head +
595 dd->rhf_offset;
596 struct rvt_qp *qp;
597 struct hfi1_ib_header *hdr;
598 struct hfi1_other_headers *ohdr;
599 struct ib_grh *grh = NULL;
600 struct rvt_dev_info *rdi = &dd->verbs_dev.rdi;
601 u64 rhf = rhf_to_cpu(rhf_addr);
602 u32 etype = rhf_rcv_type(rhf), qpn, bth1;
603 int is_ecn = 0;
604 u8 lnh;
605
606 if (ps_done(&mdata, rhf, rcd))
607 break;
608
609 if (ps_skip(&mdata, rhf, rcd))
610 goto next;
611
612 if (etype != RHF_RCV_TYPE_IB)
613 goto next;
614
615 hdr = (struct hfi1_ib_header *)
616 hfi1_get_msgheader(dd, rhf_addr);
617 lnh = be16_to_cpu(hdr->lrh[0]) & 3;
618
619 if (lnh == HFI1_LRH_BTH) {
620 ohdr = &hdr->u.oth;
621 } else if (lnh == HFI1_LRH_GRH) {
622 ohdr = &hdr->u.l.oth;
623 grh = &hdr->u.l.grh;
624 } else {
625 goto next; /* just in case */
626 }
627 bth1 = be32_to_cpu(ohdr->bth[1]);
628 is_ecn = !!(bth1 & (HFI1_FECN_SMASK | HFI1_BECN_SMASK));
629
630 if (!is_ecn)
631 goto next;
632
633 qpn = bth1 & RVT_QPN_MASK;
634 rcu_read_lock();
635 qp = rvt_lookup_qpn(rdi, &ibp->rvp, qpn);
636
637 if (!qp) {
638 rcu_read_unlock();
639 goto next;
640 }
641
642 process_ecn(qp, hdr, ohdr, rhf, bth1, grh);
643 rcu_read_unlock();
644
645 /* turn off BECN, FECN */
646 bth1 &= ~(HFI1_FECN_SMASK | HFI1_BECN_SMASK);
647 ohdr->bth[1] = cpu_to_be32(bth1);
648 next:
649 update_ps_mdata(&mdata, rcd);
650 }
651 }
652
653 static inline int skip_rcv_packet(struct hfi1_packet *packet, int thread)
654 {
655 int ret = RCV_PKT_OK;
656
657 /* Set up for the next packet */
658 packet->rhqoff += packet->rsize;
659 if (packet->rhqoff >= packet->maxcnt)
660 packet->rhqoff = 0;
661
662 packet->numpkt++;
663 if (unlikely((packet->numpkt & (MAX_PKT_RECV - 1)) == 0)) {
664 if (thread) {
665 cond_resched();
666 } else {
667 ret = RCV_PKT_LIMIT;
668 this_cpu_inc(*packet->rcd->dd->rcv_limit);
669 }
670 }
671
672 packet->rhf_addr = (__le32 *)packet->rcd->rcvhdrq + packet->rhqoff +
673 packet->rcd->dd->rhf_offset;
674 packet->rhf = rhf_to_cpu(packet->rhf_addr);
675
676 return ret;
677 }
678
679 static inline int process_rcv_packet(struct hfi1_packet *packet, int thread)
680 {
681 int ret = RCV_PKT_OK;
682
683 packet->hdr = hfi1_get_msgheader(packet->rcd->dd,
684 packet->rhf_addr);
685 packet->hlen = (u8 *)packet->rhf_addr - (u8 *)packet->hdr;
686 packet->etype = rhf_rcv_type(packet->rhf);
687 /* total length */
688 packet->tlen = rhf_pkt_len(packet->rhf); /* in bytes */
689 /* retrieve eager buffer details */
690 packet->ebuf = NULL;
691 if (rhf_use_egr_bfr(packet->rhf)) {
692 packet->etail = rhf_egr_index(packet->rhf);
693 packet->ebuf = get_egrbuf(packet->rcd, packet->rhf,
694 &packet->updegr);
695 /*
696 * Prefetch the contents of the eager buffer. It is
697 * OK to send a negative length to prefetch_range().
698 * The +2 is the size of the RHF.
699 */
700 prefetch_range(packet->ebuf,
701 packet->tlen - ((packet->rcd->rcvhdrqentsize -
702 (rhf_hdrq_offset(packet->rhf)
703 + 2)) * 4));
704 }
705
706 /*
707 * Call a type specific handler for the packet. We
708 * should be able to trust that etype won't be beyond
709 * the range of valid indexes. If so something is really
710 * wrong and we can probably just let things come
711 * crashing down. There is no need to eat another
712 * comparison in this performance critical code.
713 */
714 packet->rcd->dd->rhf_rcv_function_map[packet->etype](packet);
715 packet->numpkt++;
716
717 /* Set up for the next packet */
718 packet->rhqoff += packet->rsize;
719 if (packet->rhqoff >= packet->maxcnt)
720 packet->rhqoff = 0;
721
722 if (unlikely((packet->numpkt & (MAX_PKT_RECV - 1)) == 0)) {
723 if (thread) {
724 cond_resched();
725 } else {
726 ret = RCV_PKT_LIMIT;
727 this_cpu_inc(*packet->rcd->dd->rcv_limit);
728 }
729 }
730
731 packet->rhf_addr = (__le32 *)packet->rcd->rcvhdrq + packet->rhqoff +
732 packet->rcd->dd->rhf_offset;
733 packet->rhf = rhf_to_cpu(packet->rhf_addr);
734
735 return ret;
736 }
737
738 static inline void process_rcv_update(int last, struct hfi1_packet *packet)
739 {
740 /*
741 * Update head regs etc., every 16 packets, if not last pkt,
742 * to help prevent rcvhdrq overflows, when many packets
743 * are processed and queue is nearly full.
744 * Don't request an interrupt for intermediate updates.
745 */
746 if (!last && !(packet->numpkt & 0xf)) {
747 update_usrhead(packet->rcd, packet->rhqoff, packet->updegr,
748 packet->etail, 0, 0);
749 packet->updegr = 0;
750 }
751 packet->rcv_flags = 0;
752 }
753
754 static inline void finish_packet(struct hfi1_packet *packet)
755 {
756 /*
757 * Nothing we need to free for the packet.
758 *
759 * The only thing we need to do is a final update and call for an
760 * interrupt
761 */
762 update_usrhead(packet->rcd, packet->rcd->head, packet->updegr,
763 packet->etail, rcv_intr_dynamic, packet->numpkt);
764 }
765
766 static inline void process_rcv_qp_work(struct hfi1_packet *packet)
767 {
768 struct hfi1_ctxtdata *rcd;
769 struct rvt_qp *qp, *nqp;
770
771 rcd = packet->rcd;
772 rcd->head = packet->rhqoff;
773
774 /*
775 * Iterate over all QPs waiting to respond.
776 * The list won't change since the IRQ is only run on one CPU.
777 */
778 list_for_each_entry_safe(qp, nqp, &rcd->qp_wait_list, rspwait) {
779 list_del_init(&qp->rspwait);
780 if (qp->r_flags & RVT_R_RSP_NAK) {
781 qp->r_flags &= ~RVT_R_RSP_NAK;
782 hfi1_send_rc_ack(rcd, qp, 0);
783 }
784 if (qp->r_flags & RVT_R_RSP_SEND) {
785 unsigned long flags;
786
787 qp->r_flags &= ~RVT_R_RSP_SEND;
788 spin_lock_irqsave(&qp->s_lock, flags);
789 if (ib_rvt_state_ops[qp->state] &
790 RVT_PROCESS_OR_FLUSH_SEND)
791 hfi1_schedule_send(qp);
792 spin_unlock_irqrestore(&qp->s_lock, flags);
793 }
794 if (atomic_dec_and_test(&qp->refcount))
795 wake_up(&qp->wait);
796 }
797 }
798
799 /*
800 * Handle receive interrupts when using the no dma rtail option.
801 */
802 int handle_receive_interrupt_nodma_rtail(struct hfi1_ctxtdata *rcd, int thread)
803 {
804 u32 seq;
805 int last = RCV_PKT_OK;
806 struct hfi1_packet packet;
807
808 init_packet(rcd, &packet);
809 seq = rhf_rcv_seq(packet.rhf);
810 if (seq != rcd->seq_cnt) {
811 last = RCV_PKT_DONE;
812 goto bail;
813 }
814
815 prescan_rxq(rcd, &packet);
816
817 while (last == RCV_PKT_OK) {
818 last = process_rcv_packet(&packet, thread);
819 seq = rhf_rcv_seq(packet.rhf);
820 if (++rcd->seq_cnt > 13)
821 rcd->seq_cnt = 1;
822 if (seq != rcd->seq_cnt)
823 last = RCV_PKT_DONE;
824 process_rcv_update(last, &packet);
825 }
826 process_rcv_qp_work(&packet);
827 bail:
828 finish_packet(&packet);
829 return last;
830 }
831
832 int handle_receive_interrupt_dma_rtail(struct hfi1_ctxtdata *rcd, int thread)
833 {
834 u32 hdrqtail;
835 int last = RCV_PKT_OK;
836 struct hfi1_packet packet;
837
838 init_packet(rcd, &packet);
839 hdrqtail = get_rcvhdrtail(rcd);
840 if (packet.rhqoff == hdrqtail) {
841 last = RCV_PKT_DONE;
842 goto bail;
843 }
844 smp_rmb(); /* prevent speculative reads of dma'ed hdrq */
845
846 prescan_rxq(rcd, &packet);
847
848 while (last == RCV_PKT_OK) {
849 last = process_rcv_packet(&packet, thread);
850 if (packet.rhqoff == hdrqtail)
851 last = RCV_PKT_DONE;
852 process_rcv_update(last, &packet);
853 }
854 process_rcv_qp_work(&packet);
855 bail:
856 finish_packet(&packet);
857 return last;
858 }
859
860 static inline void set_all_nodma_rtail(struct hfi1_devdata *dd)
861 {
862 int i;
863
864 for (i = HFI1_CTRL_CTXT + 1; i < dd->first_user_ctxt; i++)
865 dd->rcd[i]->do_interrupt =
866 &handle_receive_interrupt_nodma_rtail;
867 }
868
869 static inline void set_all_dma_rtail(struct hfi1_devdata *dd)
870 {
871 int i;
872
873 for (i = HFI1_CTRL_CTXT + 1; i < dd->first_user_ctxt; i++)
874 dd->rcd[i]->do_interrupt =
875 &handle_receive_interrupt_dma_rtail;
876 }
877
878 void set_all_slowpath(struct hfi1_devdata *dd)
879 {
880 int i;
881
882 /* HFI1_CTRL_CTXT must always use the slow path interrupt handler */
883 for (i = HFI1_CTRL_CTXT + 1; i < dd->first_user_ctxt; i++)
884 dd->rcd[i]->do_interrupt = &handle_receive_interrupt;
885 }
886
887 static inline int set_armed_to_active(struct hfi1_ctxtdata *rcd,
888 struct hfi1_packet packet,
889 struct hfi1_devdata *dd)
890 {
891 struct work_struct *lsaw = &rcd->ppd->linkstate_active_work;
892 struct hfi1_message_header *hdr = hfi1_get_msgheader(packet.rcd->dd,
893 packet.rhf_addr);
894
895 if (hdr2sc(hdr, packet.rhf) != 0xf) {
896 int hwstate = read_logical_state(dd);
897
898 if (hwstate != LSTATE_ACTIVE) {
899 dd_dev_info(dd, "Unexpected link state %d\n", hwstate);
900 return 0;
901 }
902
903 queue_work(rcd->ppd->hfi1_wq, lsaw);
904 return 1;
905 }
906 return 0;
907 }
908
909 /*
910 * handle_receive_interrupt - receive a packet
911 * @rcd: the context
912 *
913 * Called from interrupt handler for errors or receive interrupt.
914 * This is the slow path interrupt handler.
915 */
916 int handle_receive_interrupt(struct hfi1_ctxtdata *rcd, int thread)
917 {
918 struct hfi1_devdata *dd = rcd->dd;
919 u32 hdrqtail;
920 int needset, last = RCV_PKT_OK;
921 struct hfi1_packet packet;
922 int skip_pkt = 0;
923
924 /* Control context will always use the slow path interrupt handler */
925 needset = (rcd->ctxt == HFI1_CTRL_CTXT) ? 0 : 1;
926
927 init_packet(rcd, &packet);
928
929 if (!HFI1_CAP_KGET_MASK(rcd->flags, DMA_RTAIL)) {
930 u32 seq = rhf_rcv_seq(packet.rhf);
931
932 if (seq != rcd->seq_cnt) {
933 last = RCV_PKT_DONE;
934 goto bail;
935 }
936 hdrqtail = 0;
937 } else {
938 hdrqtail = get_rcvhdrtail(rcd);
939 if (packet.rhqoff == hdrqtail) {
940 last = RCV_PKT_DONE;
941 goto bail;
942 }
943 smp_rmb(); /* prevent speculative reads of dma'ed hdrq */
944
945 /*
946 * Control context can potentially receive an invalid
947 * rhf. Drop such packets.
948 */
949 if (rcd->ctxt == HFI1_CTRL_CTXT) {
950 u32 seq = rhf_rcv_seq(packet.rhf);
951
952 if (seq != rcd->seq_cnt)
953 skip_pkt = 1;
954 }
955 }
956
957 prescan_rxq(rcd, &packet);
958
959 while (last == RCV_PKT_OK) {
960 if (unlikely(dd->do_drop &&
961 atomic_xchg(&dd->drop_packet, DROP_PACKET_OFF) ==
962 DROP_PACKET_ON)) {
963 dd->do_drop = 0;
964
965 /* On to the next packet */
966 packet.rhqoff += packet.rsize;
967 packet.rhf_addr = (__le32 *)rcd->rcvhdrq +
968 packet.rhqoff +
969 dd->rhf_offset;
970 packet.rhf = rhf_to_cpu(packet.rhf_addr);
971
972 } else if (skip_pkt) {
973 last = skip_rcv_packet(&packet, thread);
974 skip_pkt = 0;
975 } else {
976 /* Auto activate link on non-SC15 packet receive */
977 if (unlikely(rcd->ppd->host_link_state ==
978 HLS_UP_ARMED) &&
979 set_armed_to_active(rcd, packet, dd))
980 goto bail;
981 last = process_rcv_packet(&packet, thread);
982 }
983
984 if (!HFI1_CAP_KGET_MASK(rcd->flags, DMA_RTAIL)) {
985 u32 seq = rhf_rcv_seq(packet.rhf);
986
987 if (++rcd->seq_cnt > 13)
988 rcd->seq_cnt = 1;
989 if (seq != rcd->seq_cnt)
990 last = RCV_PKT_DONE;
991 if (needset) {
992 dd_dev_info(dd, "Switching to NO_DMA_RTAIL\n");
993 set_all_nodma_rtail(dd);
994 needset = 0;
995 }
996 } else {
997 if (packet.rhqoff == hdrqtail)
998 last = RCV_PKT_DONE;
999 /*
1000 * Control context can potentially receive an invalid
1001 * rhf. Drop such packets.
1002 */
1003 if (rcd->ctxt == HFI1_CTRL_CTXT) {
1004 u32 seq = rhf_rcv_seq(packet.rhf);
1005
1006 if (++rcd->seq_cnt > 13)
1007 rcd->seq_cnt = 1;
1008 if (!last && (seq != rcd->seq_cnt))
1009 skip_pkt = 1;
1010 }
1011
1012 if (needset) {
1013 dd_dev_info(dd,
1014 "Switching to DMA_RTAIL\n");
1015 set_all_dma_rtail(dd);
1016 needset = 0;
1017 }
1018 }
1019
1020 process_rcv_update(last, &packet);
1021 }
1022
1023 process_rcv_qp_work(&packet);
1024
1025 bail:
1026 /*
1027 * Always write head at end, and setup rcv interrupt, even
1028 * if no packets were processed.
1029 */
1030 finish_packet(&packet);
1031 return last;
1032 }
1033
1034 /*
1035 * We may discover in the interrupt that the hardware link state has
1036 * changed from ARMED to ACTIVE (due to the arrival of a non-SC15 packet),
1037 * and we need to update the driver's notion of the link state. We cannot
1038 * run set_link_state from interrupt context, so we queue this function on
1039 * a workqueue.
1040 *
1041 * We delay the regular interrupt processing until after the state changes
1042 * so that the link will be in the correct state by the time any application
1043 * we wake up attempts to send a reply to any message it received.
1044 * (Subsequent receive interrupts may possibly force the wakeup before we
1045 * update the link state.)
1046 *
1047 * The rcd is freed in hfi1_free_ctxtdata after hfi1_postinit_cleanup invokes
1048 * dd->f_cleanup(dd) to disable the interrupt handler and flush workqueues,
1049 * so we're safe from use-after-free of the rcd.
1050 */
1051 void receive_interrupt_work(struct work_struct *work)
1052 {
1053 struct hfi1_pportdata *ppd = container_of(work, struct hfi1_pportdata,
1054 linkstate_active_work);
1055 struct hfi1_devdata *dd = ppd->dd;
1056 int i;
1057
1058 /* Received non-SC15 packet implies neighbor_normal */
1059 ppd->neighbor_normal = 1;
1060 set_link_state(ppd, HLS_UP_ACTIVE);
1061
1062 /*
1063 * Interrupt all kernel contexts that could have had an
1064 * interrupt during auto activation.
1065 */
1066 for (i = HFI1_CTRL_CTXT; i < dd->first_user_ctxt; i++)
1067 force_recv_intr(dd->rcd[i]);
1068 }
1069
1070 /*
1071 * Convert a given MTU size to the on-wire MAD packet enumeration.
1072 * Return -1 if the size is invalid.
1073 */
1074 int mtu_to_enum(u32 mtu, int default_if_bad)
1075 {
1076 switch (mtu) {
1077 case 0: return OPA_MTU_0;
1078 case 256: return OPA_MTU_256;
1079 case 512: return OPA_MTU_512;
1080 case 1024: return OPA_MTU_1024;
1081 case 2048: return OPA_MTU_2048;
1082 case 4096: return OPA_MTU_4096;
1083 case 8192: return OPA_MTU_8192;
1084 case 10240: return OPA_MTU_10240;
1085 }
1086 return default_if_bad;
1087 }
1088
1089 u16 enum_to_mtu(int mtu)
1090 {
1091 switch (mtu) {
1092 case OPA_MTU_0: return 0;
1093 case OPA_MTU_256: return 256;
1094 case OPA_MTU_512: return 512;
1095 case OPA_MTU_1024: return 1024;
1096 case OPA_MTU_2048: return 2048;
1097 case OPA_MTU_4096: return 4096;
1098 case OPA_MTU_8192: return 8192;
1099 case OPA_MTU_10240: return 10240;
1100 default: return 0xffff;
1101 }
1102 }
1103
1104 /*
1105 * set_mtu - set the MTU
1106 * @ppd: the per port data
1107 *
1108 * We can handle "any" incoming size, the issue here is whether we
1109 * need to restrict our outgoing size. We do not deal with what happens
1110 * to programs that are already running when the size changes.
1111 */
1112 int set_mtu(struct hfi1_pportdata *ppd)
1113 {
1114 struct hfi1_devdata *dd = ppd->dd;
1115 int i, drain, ret = 0, is_up = 0;
1116
1117 ppd->ibmtu = 0;
1118 for (i = 0; i < ppd->vls_supported; i++)
1119 if (ppd->ibmtu < dd->vld[i].mtu)
1120 ppd->ibmtu = dd->vld[i].mtu;
1121 ppd->ibmaxlen = ppd->ibmtu + lrh_max_header_bytes(ppd->dd);
1122
1123 mutex_lock(&ppd->hls_lock);
1124 if (ppd->host_link_state == HLS_UP_INIT ||
1125 ppd->host_link_state == HLS_UP_ARMED ||
1126 ppd->host_link_state == HLS_UP_ACTIVE)
1127 is_up = 1;
1128
1129 drain = !is_ax(dd) && is_up;
1130
1131 if (drain)
1132 /*
1133 * MTU is specified per-VL. To ensure that no packet gets
1134 * stuck (due, e.g., to the MTU for the packet's VL being
1135 * reduced), empty the per-VL FIFOs before adjusting MTU.
1136 */
1137 ret = stop_drain_data_vls(dd);
1138
1139 if (ret) {
1140 dd_dev_err(dd, "%s: cannot stop/drain VLs - refusing to change per-VL MTUs\n",
1141 __func__);
1142 goto err;
1143 }
1144
1145 hfi1_set_ib_cfg(ppd, HFI1_IB_CFG_MTU, 0);
1146
1147 if (drain)
1148 open_fill_data_vls(dd); /* reopen all VLs */
1149
1150 err:
1151 mutex_unlock(&ppd->hls_lock);
1152
1153 return ret;
1154 }
1155
1156 int hfi1_set_lid(struct hfi1_pportdata *ppd, u32 lid, u8 lmc)
1157 {
1158 struct hfi1_devdata *dd = ppd->dd;
1159
1160 ppd->lid = lid;
1161 ppd->lmc = lmc;
1162 hfi1_set_ib_cfg(ppd, HFI1_IB_CFG_LIDLMC, 0);
1163
1164 dd_dev_info(dd, "IB%u:%u got a lid: 0x%x\n", dd->unit, ppd->port, lid);
1165
1166 return 0;
1167 }
1168
1169 void shutdown_led_override(struct hfi1_pportdata *ppd)
1170 {
1171 struct hfi1_devdata *dd = ppd->dd;
1172
1173 /*
1174 * This pairs with the memory barrier in hfi1_start_led_override to
1175 * ensure that we read the correct state of LED beaconing represented
1176 * by led_override_timer_active
1177 */
1178 smp_rmb();
1179 if (atomic_read(&ppd->led_override_timer_active)) {
1180 del_timer_sync(&ppd->led_override_timer);
1181 atomic_set(&ppd->led_override_timer_active, 0);
1182 /* Ensure the atomic_set is visible to all CPUs */
1183 smp_wmb();
1184 }
1185
1186 /* Hand control of the LED to the DC for normal operation */
1187 write_csr(dd, DCC_CFG_LED_CNTRL, 0);
1188 }
1189
1190 static void run_led_override(unsigned long opaque)
1191 {
1192 struct hfi1_pportdata *ppd = (struct hfi1_pportdata *)opaque;
1193 struct hfi1_devdata *dd = ppd->dd;
1194 unsigned long timeout;
1195 int phase_idx;
1196
1197 if (!(dd->flags & HFI1_INITTED))
1198 return;
1199
1200 phase_idx = ppd->led_override_phase & 1;
1201
1202 setextled(dd, phase_idx);
1203
1204 timeout = ppd->led_override_vals[phase_idx];
1205
1206 /* Set up for next phase */
1207 ppd->led_override_phase = !ppd->led_override_phase;
1208
1209 mod_timer(&ppd->led_override_timer, jiffies + timeout);
1210 }
1211
1212 /*
1213 * To have the LED blink in a particular pattern, provide timeon and timeoff
1214 * in milliseconds.
1215 * To turn off custom blinking and return to normal operation, use
1216 * shutdown_led_override()
1217 */
1218 void hfi1_start_led_override(struct hfi1_pportdata *ppd, unsigned int timeon,
1219 unsigned int timeoff)
1220 {
1221 if (!(ppd->dd->flags & HFI1_INITTED))
1222 return;
1223
1224 /* Convert to jiffies for direct use in timer */
1225 ppd->led_override_vals[0] = msecs_to_jiffies(timeoff);
1226 ppd->led_override_vals[1] = msecs_to_jiffies(timeon);
1227
1228 /* Arbitrarily start from LED on phase */
1229 ppd->led_override_phase = 1;
1230
1231 /*
1232 * If the timer has not already been started, do so. Use a "quick"
1233 * timeout so the handler will be called soon to look at our request.
1234 */
1235 if (!timer_pending(&ppd->led_override_timer)) {
1236 setup_timer(&ppd->led_override_timer, run_led_override,
1237 (unsigned long)ppd);
1238 ppd->led_override_timer.expires = jiffies + 1;
1239 add_timer(&ppd->led_override_timer);
1240 atomic_set(&ppd->led_override_timer_active, 1);
1241 /* Ensure the atomic_set is visible to all CPUs */
1242 smp_wmb();
1243 }
1244 }
1245
1246 /**
1247 * hfi1_reset_device - reset the chip if possible
1248 * @unit: the device to reset
1249 *
1250 * Whether or not reset is successful, we attempt to re-initialize the chip
1251 * (that is, much like a driver unload/reload). We clear the INITTED flag
1252 * so that the various entry points will fail until we reinitialize. For
1253 * now, we only allow this if no user contexts are open that use chip resources
1254 */
1255 int hfi1_reset_device(int unit)
1256 {
1257 int ret, i;
1258 struct hfi1_devdata *dd = hfi1_lookup(unit);
1259 struct hfi1_pportdata *ppd;
1260 unsigned long flags;
1261 int pidx;
1262
1263 if (!dd) {
1264 ret = -ENODEV;
1265 goto bail;
1266 }
1267
1268 dd_dev_info(dd, "Reset on unit %u requested\n", unit);
1269
1270 if (!dd->kregbase || !(dd->flags & HFI1_PRESENT)) {
1271 dd_dev_info(dd,
1272 "Invalid unit number %u or not initialized or not present\n",
1273 unit);
1274 ret = -ENXIO;
1275 goto bail;
1276 }
1277
1278 spin_lock_irqsave(&dd->uctxt_lock, flags);
1279 if (dd->rcd)
1280 for (i = dd->first_user_ctxt; i < dd->num_rcv_contexts; i++) {
1281 if (!dd->rcd[i] || !dd->rcd[i]->cnt)
1282 continue;
1283 spin_unlock_irqrestore(&dd->uctxt_lock, flags);
1284 ret = -EBUSY;
1285 goto bail;
1286 }
1287 spin_unlock_irqrestore(&dd->uctxt_lock, flags);
1288
1289 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
1290 ppd = dd->pport + pidx;
1291
1292 shutdown_led_override(ppd);
1293 }
1294 if (dd->flags & HFI1_HAS_SEND_DMA)
1295 sdma_exit(dd);
1296
1297 hfi1_reset_cpu_counters(dd);
1298
1299 ret = hfi1_init(dd, 1);
1300
1301 if (ret)
1302 dd_dev_err(dd,
1303 "Reinitialize unit %u after reset failed with %d\n",
1304 unit, ret);
1305 else
1306 dd_dev_info(dd, "Reinitialized unit %u after resetting\n",
1307 unit);
1308
1309 bail:
1310 return ret;
1311 }
1312
1313 void handle_eflags(struct hfi1_packet *packet)
1314 {
1315 struct hfi1_ctxtdata *rcd = packet->rcd;
1316 u32 rte = rhf_rcv_type_err(packet->rhf);
1317
1318 rcv_hdrerr(rcd, rcd->ppd, packet);
1319 if (rhf_err_flags(packet->rhf))
1320 dd_dev_err(rcd->dd,
1321 "receive context %d: rhf 0x%016llx, errs [ %s%s%s%s%s%s%s%s] rte 0x%x\n",
1322 rcd->ctxt, packet->rhf,
1323 packet->rhf & RHF_K_HDR_LEN_ERR ? "k_hdr_len " : "",
1324 packet->rhf & RHF_DC_UNC_ERR ? "dc_unc " : "",
1325 packet->rhf & RHF_DC_ERR ? "dc " : "",
1326 packet->rhf & RHF_TID_ERR ? "tid " : "",
1327 packet->rhf & RHF_LEN_ERR ? "len " : "",
1328 packet->rhf & RHF_ECC_ERR ? "ecc " : "",
1329 packet->rhf & RHF_VCRC_ERR ? "vcrc " : "",
1330 packet->rhf & RHF_ICRC_ERR ? "icrc " : "",
1331 rte);
1332 }
1333
1334 /*
1335 * The following functions are called by the interrupt handler. They are type
1336 * specific handlers for each packet type.
1337 */
1338 int process_receive_ib(struct hfi1_packet *packet)
1339 {
1340 trace_hfi1_rcvhdr(packet->rcd->ppd->dd,
1341 packet->rcd->ctxt,
1342 rhf_err_flags(packet->rhf),
1343 RHF_RCV_TYPE_IB,
1344 packet->hlen,
1345 packet->tlen,
1346 packet->updegr,
1347 rhf_egr_index(packet->rhf));
1348
1349 if (unlikely(rhf_err_flags(packet->rhf))) {
1350 handle_eflags(packet);
1351 return RHF_RCV_CONTINUE;
1352 }
1353
1354 hfi1_ib_rcv(packet);
1355 return RHF_RCV_CONTINUE;
1356 }
1357
1358 int process_receive_bypass(struct hfi1_packet *packet)
1359 {
1360 if (unlikely(rhf_err_flags(packet->rhf)))
1361 handle_eflags(packet);
1362
1363 dd_dev_err(packet->rcd->dd,
1364 "Bypass packets are not supported in normal operation. Dropping\n");
1365 return RHF_RCV_CONTINUE;
1366 }
1367
1368 int process_receive_error(struct hfi1_packet *packet)
1369 {
1370 handle_eflags(packet);
1371
1372 if (unlikely(rhf_err_flags(packet->rhf)))
1373 dd_dev_err(packet->rcd->dd,
1374 "Unhandled error packet received. Dropping.\n");
1375
1376 return RHF_RCV_CONTINUE;
1377 }
1378
1379 int kdeth_process_expected(struct hfi1_packet *packet)
1380 {
1381 if (unlikely(rhf_err_flags(packet->rhf)))
1382 handle_eflags(packet);
1383
1384 dd_dev_err(packet->rcd->dd,
1385 "Unhandled expected packet received. Dropping.\n");
1386 return RHF_RCV_CONTINUE;
1387 }
1388
1389 int kdeth_process_eager(struct hfi1_packet *packet)
1390 {
1391 if (unlikely(rhf_err_flags(packet->rhf)))
1392 handle_eflags(packet);
1393
1394 dd_dev_err(packet->rcd->dd,
1395 "Unhandled eager packet received. Dropping.\n");
1396 return RHF_RCV_CONTINUE;
1397 }
1398
1399 int process_receive_invalid(struct hfi1_packet *packet)
1400 {
1401 dd_dev_err(packet->rcd->dd, "Invalid packet type %d. Dropping\n",
1402 rhf_rcv_type(packet->rhf));
1403 return RHF_RCV_CONTINUE;
1404 }
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