staging: rtl8192e: Comment cleanup (style/format)
[deliverable/linux.git] / drivers / staging / rtl8192e / rtl8192e / r8192E_hwimg.h
1 /******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 *
4 * This program is distributed in the hope that it will be useful, but WITHOUT
5 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
6 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
7 * more details.
8 *
9 * You should have received a copy of the GNU General Public License along with
10 * this program; if not, write to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
12 *
13 * The full GNU General Public License is included in this distribution in the
14 * file called LICENSE.
15 *
16 * Contact Information:
17 * wlanfae <wlanfae@realtek.com>
18 ******************************************************************************/
19 #ifndef __INC_HAL8192PciE_FW_IMG_H
20 #define __INC_HAL8192PciE_FW_IMG_H
21
22 /*Created on 2008/11/18, 3: 7*/
23
24 #include <linux/types.h>
25
26 #define BootArrayLengthPciE 344
27 extern u8 Rtl8192PciEFwBootArray[BootArrayLengthPciE];
28 #define MainArrayLengthPciE 43012
29 extern u8 Rtl8192PciEFwMainArray[MainArrayLengthPciE];
30 #define DataArrayLengthPciE 848
31 extern u8 Rtl8192PciEFwDataArray[DataArrayLengthPciE];
32 #define PHY_REGArrayLengthPciE 1
33 extern u32 Rtl8192PciEPHY_REGArray[PHY_REGArrayLengthPciE];
34 #define PHY_REG_1T2RArrayLengthPciE 296
35 extern u32 Rtl8192PciEPHY_REG_1T2RArray[PHY_REG_1T2RArrayLengthPciE];
36 #define RadioA_ArrayLengthPciE 246
37 extern u32 Rtl8192PciERadioA_Array[RadioA_ArrayLengthPciE];
38 #define RadioB_ArrayLengthPciE 78
39 extern u32 Rtl8192PciERadioB_Array[RadioB_ArrayLengthPciE];
40 #define RadioC_ArrayLengthPciE 2
41 extern u32 Rtl8192PciERadioC_Array[RadioC_ArrayLengthPciE];
42 #define RadioD_ArrayLengthPciE 2
43 extern u32 Rtl8192PciERadioD_Array[RadioD_ArrayLengthPciE];
44 #define MACPHY_ArrayLengthPciE 18
45 extern u32 Rtl8192PciEMACPHY_Array[MACPHY_ArrayLengthPciE];
46 #define MACPHY_Array_PGLengthPciE 30
47 extern u32 Rtl8192PciEMACPHY_Array_PG[MACPHY_Array_PGLengthPciE];
48 #define AGCTAB_ArrayLengthPciE 384
49 extern u32 Rtl8192PciEAGCTAB_Array[AGCTAB_ArrayLengthPciE];
50
51 #endif
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