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staging: rtl8821ae: halbtc8192e2ant.c fix checkpatch leading spaces/tabs issues
[deliverable/linux.git] / drivers / staging / rtl8821ae / btcoexist / halbtc8192e2ant.c
1 /**************************************************************
2 * Description:
3 *
4 * This file is for RTL8192E Co-exist mechanism
5 *
6 * History
7 * 2012/11/15 Cosa first check in.
8 *
9 **************************************************************/
10
11 /**************************************************************
12 * include files
13 **************************************************************/
14 #include "halbt_precomp.h"
15
16 /**************************************************************
17 * Global variables, these are static variables
18 **************************************************************/
19 static struct coex_dm_8192e_2ant glcoex_dm_8192e_2ant;
20 static struct coex_dm_8192e_2ant *coex_dm = &glcoex_dm_8192e_2ant;
21 static struct coex_sta_8192e_2ant glcoex_sta_8192e_2ant;
22 static struct coex_sta_8192e_2ant *coex_sta = &glcoex_sta_8192e_2ant;
23
24 static const char *const GLBtInfoSrc8192e2Ant[] = {
25 "BT Info[wifi fw]",
26 "BT Info[bt rsp]",
27 "BT Info[bt auto report]",
28 };
29
30 static u32 glcoex_ver_date_8192e_2ant = 20130902;
31 static u32 glcoex_ver_8192e_2ant = 0x34;
32
33 /**************************************************************
34 * local function proto type if needed
35 **************************************************************/
36 /**************************************************************
37 * local function start with halbtc8192e2ant_
38 **************************************************************/
39 static u8 halbtc8192e2ant_btrssi_state(u8 level_num, u8 rssi_thresh,
40 u8 rssi_thresh1)
41 {
42 int btrssi = coex_sta->bt_rssi;
43 u8 btrssi_state = coex_sta->pre_bt_rssi_state;
44
45 if (level_num == 2) {
46 if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) ||
47 (coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
48 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
49 "BT Rssi pre state=LOW\n");
50 if (btrssi >= (rssi_thresh +
51 BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) {
52 btrssi_state = BTC_RSSI_STATE_HIGH;
53 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
54 "BT Rssi state switch to High\n");
55 } else {
56 btrssi_state = BTC_RSSI_STATE_STAY_LOW;
57 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
58 "BT Rssi state stay at Low\n");
59 }
60 } else {
61 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
62 "BT Rssi pre state=HIGH\n");
63 if (btrssi < rssi_thresh) {
64 btrssi_state = BTC_RSSI_STATE_LOW;
65 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
66 "BT Rssi state switch to Low\n");
67 } else {
68 btrssi_state = BTC_RSSI_STATE_STAY_HIGH;
69 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
70 "BT Rssi state stay at High\n");
71 }
72 }
73 } else if (level_num == 3) {
74 if (rssi_thresh > rssi_thresh1) {
75 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
76 "BT Rssi thresh error!!\n");
77 return coex_sta->pre_bt_rssi_state;
78 }
79
80 if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) ||
81 (coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
82 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
83 "BT Rssi pre state=LOW\n");
84 if (btrssi >= (rssi_thresh +
85 BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) {
86 btrssi_state = BTC_RSSI_STATE_MEDIUM;
87 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
88 "BT Rssi state switch to Medium\n");
89 } else {
90 btrssi_state = BTC_RSSI_STATE_STAY_LOW;
91 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
92 "BT Rssi state stay at Low\n");
93 }
94 } else if ((coex_sta->pre_bt_rssi_state ==
95 BTC_RSSI_STATE_MEDIUM) ||
96 (coex_sta->pre_bt_rssi_state ==
97 BTC_RSSI_STATE_STAY_MEDIUM)) {
98 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
99 "[BTCoex], BT Rssi pre state=MEDIUM\n");
100 if (btrssi >= (rssi_thresh1 +
101 BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) {
102 btrssi_state = BTC_RSSI_STATE_HIGH;
103 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
104 "BT Rssi state switch to High\n");
105 } else if (btrssi < rssi_thresh) {
106 btrssi_state = BTC_RSSI_STATE_LOW;
107 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
108 "BT Rssi state switch to Low\n");
109 } else {
110 btrssi_state = BTC_RSSI_STATE_STAY_MEDIUM;
111 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
112 "BT Rssi state stay at Medium\n");
113 }
114 } else {
115 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
116 "BT Rssi pre state=HIGH\n");
117 if (btrssi < rssi_thresh1) {
118 btrssi_state = BTC_RSSI_STATE_MEDIUM;
119 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
120 "BT Rssi state switch to Medium\n");
121 } else {
122 btrssi_state = BTC_RSSI_STATE_STAY_HIGH;
123 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
124 "BT Rssi state stay at High\n");
125 }
126 }
127 }
128
129 coex_sta->pre_bt_rssi_state = btrssi_state;
130
131 return btrssi_state;
132 }
133
134 static u8 halbtc8192e2ant_wifirssi_state(struct btc_coexist *btcoexist,
135 u8 index, u8 level_num,
136 u8 rssi_thresh, u8 rssi_thresh1)
137 {
138 int wifirssi = 0;
139 u8 wifirssi_state = coex_sta->pre_wifi_rssi_state[index];
140
141 btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifirssi);
142
143 if (level_num == 2) {
144 if ((coex_sta->pre_wifi_rssi_state[index] ==
145 BTC_RSSI_STATE_LOW) ||
146 (coex_sta->pre_wifi_rssi_state[index] ==
147 BTC_RSSI_STATE_STAY_LOW)) {
148 if (wifirssi >= (rssi_thresh +
149 BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) {
150 wifirssi_state = BTC_RSSI_STATE_HIGH;
151 BTC_PRINT(BTC_MSG_ALGORITHM,
152 ALGO_WIFI_RSSI_STATE,
153 "wifi RSSI state switch to High\n");
154 } else {
155 wifirssi_state = BTC_RSSI_STATE_STAY_LOW;
156 BTC_PRINT(BTC_MSG_ALGORITHM,
157 ALGO_WIFI_RSSI_STATE,
158 "wifi RSSI state stay at Low\n");
159 }
160 } else {
161 if (wifirssi < rssi_thresh) {
162 wifirssi_state = BTC_RSSI_STATE_LOW;
163 BTC_PRINT(BTC_MSG_ALGORITHM,
164 ALGO_WIFI_RSSI_STATE,
165 "wifi RSSI state switch to Low\n");
166 } else {
167 wifirssi_state = BTC_RSSI_STATE_STAY_HIGH;
168 BTC_PRINT(BTC_MSG_ALGORITHM,
169 ALGO_WIFI_RSSI_STATE,
170 "wifi RSSI state stay at High\n");
171 }
172 }
173 } else if (level_num == 3) {
174 if (rssi_thresh > rssi_thresh1) {
175 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE,
176 "wifi RSSI thresh error!!\n");
177 return coex_sta->pre_wifi_rssi_state[index];
178 }
179
180 if ((coex_sta->pre_wifi_rssi_state[index] ==
181 BTC_RSSI_STATE_LOW) ||
182 (coex_sta->pre_wifi_rssi_state[index] ==
183 BTC_RSSI_STATE_STAY_LOW)) {
184 if (wifirssi >= (rssi_thresh +
185 BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) {
186 wifirssi_state = BTC_RSSI_STATE_MEDIUM;
187 BTC_PRINT(BTC_MSG_ALGORITHM,
188 ALGO_WIFI_RSSI_STATE,
189 "wifi RSSI state switch to Medium\n");
190 } else {
191 wifirssi_state = BTC_RSSI_STATE_STAY_LOW;
192 BTC_PRINT(BTC_MSG_ALGORITHM,
193 ALGO_WIFI_RSSI_STATE,
194 "wifi RSSI state stay at Low\n");
195 }
196 } else if ((coex_sta->pre_wifi_rssi_state[index] ==
197 BTC_RSSI_STATE_MEDIUM) ||
198 (coex_sta->pre_wifi_rssi_state[index] ==
199 BTC_RSSI_STATE_STAY_MEDIUM)) {
200 if (wifirssi >= (rssi_thresh1 +
201 BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) {
202 wifirssi_state = BTC_RSSI_STATE_HIGH;
203 BTC_PRINT(BTC_MSG_ALGORITHM,
204 ALGO_WIFI_RSSI_STATE,
205 "wifi RSSI state switch to High\n");
206 } else if (wifirssi < rssi_thresh) {
207 wifirssi_state = BTC_RSSI_STATE_LOW;
208 BTC_PRINT(BTC_MSG_ALGORITHM,
209 ALGO_WIFI_RSSI_STATE,
210 "wifi RSSI state switch to Low\n");
211 } else {
212 wifirssi_state = BTC_RSSI_STATE_STAY_MEDIUM;
213 BTC_PRINT(BTC_MSG_ALGORITHM,
214 ALGO_WIFI_RSSI_STATE,
215 "wifi RSSI state stay at Medium\n");
216 }
217 } else {
218 if (wifirssi < rssi_thresh1) {
219 wifirssi_state = BTC_RSSI_STATE_MEDIUM;
220 BTC_PRINT(BTC_MSG_ALGORITHM,
221 ALGO_WIFI_RSSI_STATE,
222 "wifi RSSI state switch to Medium\n");
223 } else {
224 wifirssi_state = BTC_RSSI_STATE_STAY_HIGH;
225 BTC_PRINT(BTC_MSG_ALGORITHM,
226 ALGO_WIFI_RSSI_STATE,
227 "wifi RSSI state stay at High\n");
228 }
229 }
230 }
231
232 coex_sta->pre_wifi_rssi_state[index] = wifirssi_state;
233
234 return wifirssi_state;
235 }
236
237 static void halbtc8192e2ant_monitor_bt_enable_disable(struct btc_coexist *btcoexist)
238 {
239 static bool pre_bt_disabled = false;
240 static u32 bt_disable_cnt = 0;
241 bool bt_active = true, bt_disabled = false;
242
243 /* This function check if bt is disabled */
244
245 if (coex_sta->high_priority_tx == 0 &&
246 coex_sta->high_priority_rx == 0 &&
247 coex_sta->low_priority_tx == 0 &&
248 coex_sta->low_priority_rx == 0)
249 bt_active = false;
250
251 if (coex_sta->high_priority_tx == 0xffff &&
252 coex_sta->high_priority_rx == 0xffff &&
253 coex_sta->low_priority_tx == 0xffff &&
254 coex_sta->low_priority_rx == 0xffff)
255 bt_active = false;
256
257 if (bt_active) {
258 bt_disable_cnt = 0;
259 bt_disabled = false;
260 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE,
261 &bt_disabled);
262 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR,
263 "[BTCoex], BT is enabled !!\n");
264 } else {
265 bt_disable_cnt++;
266 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR,
267 "[BTCoex], bt all counters=0, %d times!!\n",
268 bt_disable_cnt);
269 if (bt_disable_cnt >= 2) {
270 bt_disabled = true;
271 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE,
272 &bt_disabled);
273 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR,
274 "[BTCoex], BT is disabled !!\n");
275 }
276 }
277 if (pre_bt_disabled != bt_disabled) {
278 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR,
279 "[BTCoex], BT is from %s to %s!!\n",
280 (pre_bt_disabled ? "disabled":"enabled"),
281 (bt_disabled ? "disabled":"enabled"));
282 pre_bt_disabled = bt_disabled;
283 }
284 }
285
286 static u32 halbtc8192e2ant_decidera_mask(struct btc_coexist *btcoexist,
287 u8 sstype, u32 ra_masktype)
288 {
289 u32 disra_mask = 0x0;
290
291 switch (ra_masktype) {
292 case 0: /* normal mode */
293 if (sstype == 2)
294 disra_mask = 0x0; /* enable 2ss */
295 else
296 disra_mask = 0xfff00000;/* disable 2ss */
297 break;
298 case 1: /* disable cck 1/2 */
299 if (sstype == 2)
300 disra_mask = 0x00000003;/* enable 2ss */
301 else
302 disra_mask = 0xfff00003;/* disable 2ss */
303 break;
304 case 2: /* disable cck 1/2/5.5, ofdm 6/9/12/18/24, mcs 0/1/2/3/4 */
305 if (sstype == 2)
306 disra_mask = 0x0001f1f7;/* enable 2ss */
307 else
308 disra_mask = 0xfff1f1f7;/* disable 2ss */
309 break;
310 default:
311 break;
312 }
313
314 return disra_mask;
315 }
316
317 static void halbtc8192e2ant_Updatera_mask(struct btc_coexist *btcoexist,
318 bool force_exec, u32 dis_ratemask)
319 {
320 coex_dm->curra_mask = dis_ratemask;
321
322 if (force_exec || (coex_dm->prera_mask != coex_dm->curra_mask))
323 btcoexist->btc_set(btcoexist, BTC_SET_ACT_UPDATE_ra_mask,
324 &coex_dm->curra_mask);
325 coex_dm->prera_mask = coex_dm->curra_mask;
326 }
327
328 static void halbtc8192e2ant_autorate_fallback_retry(struct btc_coexist *btcoexist,
329 bool force_exec, u8 type)
330 {
331 bool wifi_under_bmode = false;
332
333 coex_dm->cur_arfrtype = type;
334
335 if (force_exec || (coex_dm->pre_arfrtype != coex_dm->cur_arfrtype)) {
336 switch (coex_dm->cur_arfrtype) {
337 case 0: /* normal mode */
338 btcoexist->btc_write_4byte(btcoexist, 0x430,
339 coex_dm->backup_arfr_cnt1);
340 btcoexist->btc_write_4byte(btcoexist, 0x434,
341 coex_dm->backup_arfr_cnt2);
342 break;
343 case 1:
344 btcoexist->btc_get(btcoexist,
345 BTC_GET_BL_WIFI_UNDER_B_MODE,
346 &wifi_under_bmode);
347 if (wifi_under_bmode) {
348 btcoexist->btc_write_4byte(btcoexist, 0x430,
349 0x0);
350 btcoexist->btc_write_4byte(btcoexist, 0x434,
351 0x01010101);
352 } else {
353 btcoexist->btc_write_4byte(btcoexist, 0x430,
354 0x0);
355 btcoexist->btc_write_4byte(btcoexist, 0x434,
356 0x04030201);
357 }
358 break;
359 default:
360 break;
361 }
362 }
363
364 coex_dm->pre_arfrtype = coex_dm->cur_arfrtype;
365 }
366
367 static void halbtc8192e2ant_retrylimit(struct btc_coexist *btcoexist,
368 bool force_exec, u8 type)
369 {
370 coex_dm->cur_retrylimit_type = type;
371
372 if (force_exec || (coex_dm->pre_retrylimit_type !=
373 coex_dm->cur_retrylimit_type)) {
374 switch (coex_dm->cur_retrylimit_type) {
375 case 0: /* normal mode */
376 btcoexist->btc_write_2byte(btcoexist, 0x42a,
377 coex_dm->backup_retrylimit);
378 break;
379 case 1: /* retry limit=8 */
380 btcoexist->btc_write_2byte(btcoexist, 0x42a,
381 0x0808);
382 break;
383 default:
384 break;
385 }
386 }
387
388 coex_dm->pre_retrylimit_type = coex_dm->cur_retrylimit_type;
389 }
390
391 static void halbtc8192e2ant_ampdu_maxtime(struct btc_coexist *btcoexist,
392 bool force_exec, u8 type)
393 {
394 coex_dm->cur_ampdutime_type = type;
395
396 if (force_exec || (coex_dm->pre_ampdutime_type !=
397 coex_dm->cur_ampdutime_type)) {
398 switch (coex_dm->cur_ampdutime_type) {
399 case 0: /* normal mode */
400 btcoexist->btc_write_1byte(btcoexist, 0x456,
401 coex_dm->backup_ampdu_maxtime);
402 break;
403 case 1: /* AMPDU timw = 0x38 * 32us */
404 btcoexist->btc_write_1byte(btcoexist, 0x456, 0x38);
405 break;
406 default:
407 break;
408 }
409 }
410
411 coex_dm->pre_ampdutime_type = coex_dm->cur_ampdutime_type;
412 }
413
414 static void halbtc8192e2ant_limited_tx(struct btc_coexist *btcoexist,
415 bool force_exec, u8 ra_masktype,
416 u8 arfr_type, u8 retrylimit_type,
417 u8 ampdutime_type)
418 {
419 u32 disra_mask = 0x0;
420
421 coex_dm->curra_masktype = ra_masktype;
422 disra_mask = halbtc8192e2ant_decidera_mask(btcoexist,
423 coex_dm->cur_sstype,
424 ra_masktype);
425 halbtc8192e2ant_Updatera_mask(btcoexist, force_exec, disra_mask);
426
427 halbtc8192e2ant_autorate_fallback_retry(btcoexist, force_exec,
428 arfr_type);
429 halbtc8192e2ant_retrylimit(btcoexist, force_exec, retrylimit_type);
430 halbtc8192e2ant_ampdu_maxtime(btcoexist, force_exec, ampdutime_type);
431 }
432
433 static void halbtc8192e2ant_limited_rx(struct btc_coexist *btcoexist,
434 bool force_exec, bool rej_ap_agg_pkt,
435 bool b_bt_ctrl_agg_buf_size,
436 u8 agg_buf_size)
437 {
438 bool reject_rx_agg = rej_ap_agg_pkt;
439 bool bt_ctrl_rx_agg_size = b_bt_ctrl_agg_buf_size;
440 u8 rx_agg_size = agg_buf_size;
441
442 /*********************************************
443 * Rx Aggregation related setting
444 *********************************************/
445 btcoexist->btc_set(btcoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT,
446 &reject_rx_agg);
447 /* decide BT control aggregation buf size or not */
448 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE,
449 &bt_ctrl_rx_agg_size);
450 /* aggregation buf size, only work
451 * when BT control Rx aggregation size. */
452 btcoexist->btc_set(btcoexist, BTC_SET_U1_AGG_BUF_SIZE, &rx_agg_size);
453 /* real update aggregation setting */
454 btcoexist->btc_set(btcoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL);
455
456
457 }
458
459 static void halbtc8192e2ant_monitor_bt_ctr(struct btc_coexist *btcoexist)
460 {
461 u32 reg_hp_txrx, reg_lp_txrx, u32tmp;
462 u32 reg_hp_tx = 0, reg_hp_rx = 0, reg_lp_tx = 0, reg_lp_rx = 0;
463
464 reg_hp_txrx = 0x770;
465 reg_lp_txrx = 0x774;
466
467 u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_hp_txrx);
468 reg_hp_tx = u32tmp & MASKLWORD;
469 reg_hp_rx = (u32tmp & MASKHWORD)>>16;
470
471 u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_lp_txrx);
472 reg_lp_tx = u32tmp & MASKLWORD;
473 reg_lp_rx = (u32tmp & MASKHWORD)>>16;
474
475 coex_sta->high_priority_tx = reg_hp_tx;
476 coex_sta->high_priority_rx = reg_hp_rx;
477 coex_sta->low_priority_tx = reg_lp_tx;
478 coex_sta->low_priority_rx = reg_lp_rx;
479
480 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR,
481 "[BTCoex] High Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n",
482 reg_hp_txrx, reg_hp_tx, reg_hp_tx, reg_hp_rx, reg_hp_rx);
483 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR,
484 "[BTCoex] Low Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n",
485 reg_lp_txrx, reg_lp_tx, reg_lp_tx, reg_lp_rx, reg_lp_rx);
486
487 /* reset counter */
488 btcoexist->btc_write_1byte(btcoexist, 0x76e, 0xc);
489 }
490
491 static void halbtc8192e2ant_querybt_info(struct btc_coexist *btcoexist)
492 {
493 u8 h2c_parameter[1] = {0};
494
495 coex_sta->c2h_bt_info_req_sent = true;
496
497 h2c_parameter[0] |= BIT0; /* trigger */
498
499 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
500 "[BTCoex], Query Bt Info, FW write 0x61=0x%x\n",
501 h2c_parameter[0]);
502
503 btcoexist->btc_fill_h2c(btcoexist, 0x61, 1, h2c_parameter);
504 }
505
506 static bool halbtc8192e2ant_iswifi_status_changed(struct btc_coexist *btcoexist)
507 {
508 static bool pre_wifi_busy = false;
509 static bool pre_under_4way = false, pre_bt_hson = false;
510 bool wifi_busy = false, under_4way = false, bt_hson = false;
511 bool wifi_connected = false;
512
513 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
514 &wifi_connected);
515 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
516 btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hson);
517 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS,
518 &under_4way);
519
520 if (wifi_connected) {
521 if (wifi_busy != pre_wifi_busy) {
522 pre_wifi_busy = wifi_busy;
523 return true;
524 }
525 if (under_4way != pre_under_4way) {
526 pre_under_4way = under_4way;
527 return true;
528 }
529 if (bt_hson != pre_bt_hson) {
530 pre_bt_hson = bt_hson;
531 return true;
532 }
533 }
534
535 return false;
536 }
537
538 static void halbtc8192e2ant_update_btlink_info(struct btc_coexist *btcoexist)
539 {
540 struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
541 bool bt_hson = false;
542
543 btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hson);
544
545 bt_link_info->bt_link_exist = coex_sta->bt_link_exist;
546 bt_link_info->sco_exist = coex_sta->sco_exist;
547 bt_link_info->a2dp_exist = coex_sta->a2dp_exist;
548 bt_link_info->pan_exist = coex_sta->pan_exist;
549 bt_link_info->hid_exist = coex_sta->hid_exist;
550
551 /* work around for HS mode. */
552 if (bt_hson) {
553 bt_link_info->pan_exist = true;
554 bt_link_info->bt_link_exist = true;
555 }
556
557 /* check if Sco only */
558 if (bt_link_info->sco_exist &&
559 !bt_link_info->a2dp_exist &&
560 !bt_link_info->pan_exist &&
561 !bt_link_info->hid_exist)
562 bt_link_info->sco_only = true;
563 else
564 bt_link_info->sco_only = false;
565
566 /* check if A2dp only */
567 if (!bt_link_info->sco_exist &&
568 bt_link_info->a2dp_exist &&
569 !bt_link_info->pan_exist &&
570 !bt_link_info->hid_exist)
571 bt_link_info->a2dp_only = true;
572 else
573 bt_link_info->a2dp_only = false;
574
575 /* check if Pan only */
576 if (!bt_link_info->sco_exist &&
577 !bt_link_info->a2dp_exist &&
578 bt_link_info->pan_exist &&
579 !bt_link_info->hid_exist)
580 bt_link_info->pan_only = true;
581 else
582 bt_link_info->pan_only = false;
583
584 /* check if Hid only */
585 if (!bt_link_info->sco_exist &&
586 !bt_link_info->a2dp_exist &&
587 !bt_link_info->pan_exist &&
588 bt_link_info->hid_exist)
589 bt_link_info->hid_only = true;
590 else
591 bt_link_info->hid_only = false;
592 }
593
594 static u8 halbtc8192e2ant_action_algorithm(struct btc_coexist *btcoexist)
595 {
596 struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
597 struct btc_stack_info *stack_info = &btcoexist->stack_info;
598 bool bt_hson = false;
599 u8 algorithm = BT_8192E_2ANT_COEX_ALGO_UNDEFINED;
600 u8 numOfDiffProfile = 0;
601
602 btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hson);
603
604 if (!bt_link_info->bt_link_exist) {
605 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
606 "No BT link exists!!!\n");
607 return algorithm;
608 }
609
610 if (bt_link_info->sco_exist)
611 numOfDiffProfile++;
612 if (bt_link_info->hid_exist)
613 numOfDiffProfile++;
614 if (bt_link_info->pan_exist)
615 numOfDiffProfile++;
616 if (bt_link_info->a2dp_exist)
617 numOfDiffProfile++;
618
619 if (numOfDiffProfile == 1) {
620 if (bt_link_info->sco_exist) {
621 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
622 "SCO only\n");
623 algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
624 } else {
625 if (bt_link_info->hid_exist) {
626 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
627 "HID only\n");
628 algorithm = BT_8192E_2ANT_COEX_ALGO_HID;
629 } else if (bt_link_info->a2dp_exist) {
630 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
631 "A2DP only\n");
632 algorithm = BT_8192E_2ANT_COEX_ALGO_A2DP;
633 } else if (bt_link_info->pan_exist) {
634 if (bt_hson) {
635 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
636 "PAN(HS) only\n");
637 algorithm =
638 BT_8192E_2ANT_COEX_ALGO_PANHS;
639 } else {
640 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
641 "PAN(EDR) only\n");
642 algorithm =
643 BT_8192E_2ANT_COEX_ALGO_PANEDR;
644 }
645 }
646 }
647 } else if (numOfDiffProfile == 2) {
648 if (bt_link_info->sco_exist) {
649 if (bt_link_info->hid_exist) {
650 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
651 "SCO + HID\n");
652 algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
653 } else if (bt_link_info->a2dp_exist) {
654 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
655 "SCO + A2DP ==> SCO\n");
656 algorithm = BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
657 } else if (bt_link_info->pan_exist) {
658 if (bt_hson) {
659 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
660 "SCO + PAN(HS)\n");
661 algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
662 } else {
663 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
664 "SCO + PAN(EDR)\n");
665 algorithm =
666 BT_8192E_2ANT_COEX_ALGO_SCO_PAN;
667 }
668 }
669 } else {
670 if (bt_link_info->hid_exist &&
671 bt_link_info->a2dp_exist) {
672 if (stack_info->num_of_hid >= 2) {
673 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
674 "HID*2 + A2DP\n");
675 algorithm =
676 BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR;
677 } else {
678 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
679 "HID + A2DP\n");
680 algorithm =
681 BT_8192E_2ANT_COEX_ALGO_HID_A2DP;
682 }
683 } else if (bt_link_info->hid_exist &&
684 bt_link_info->pan_exist) {
685 if (bt_hson) {
686 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
687 "HID + PAN(HS)\n");
688 algorithm = BT_8192E_2ANT_COEX_ALGO_HID;
689 } else {
690 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
691 "HID + PAN(EDR)\n");
692 algorithm =
693 BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
694 }
695 } else if (bt_link_info->pan_exist &&
696 bt_link_info->a2dp_exist) {
697 if (bt_hson) {
698 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
699 "A2DP + PAN(HS)\n");
700 algorithm =
701 BT_8192E_2ANT_COEX_ALGO_A2DP_PANHS;
702 } else {
703 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
704 "A2DP + PAN(EDR)\n");
705 algorithm =
706 BT_8192E_2ANT_COEX_ALGO_PANEDR_A2DP;
707 }
708 }
709 }
710 } else if (numOfDiffProfile == 3) {
711 if (bt_link_info->sco_exist) {
712 if (bt_link_info->hid_exist &&
713 bt_link_info->a2dp_exist) {
714 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
715 "SCO + HID + A2DP ==> HID\n");
716 algorithm = BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
717 } else if (bt_link_info->hid_exist &&
718 bt_link_info->pan_exist) {
719 if (bt_hson) {
720 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
721 "SCO + HID + PAN(HS)\n");
722 algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
723 } else {
724 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
725 "SCO + HID + PAN(EDR)\n");
726 algorithm =
727 BT_8192E_2ANT_COEX_ALGO_SCO_PAN;
728 }
729 } else if (bt_link_info->pan_exist &&
730 bt_link_info->a2dp_exist) {
731 if (bt_hson) {
732 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
733 "SCO + A2DP + PAN(HS)\n");
734 algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
735 } else {
736 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
737 "SCO + A2DP + PAN(EDR)\n");
738 algorithm =
739 BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
740 }
741 }
742 } else {
743 if (bt_link_info->hid_exist &&
744 bt_link_info->pan_exist &&
745 bt_link_info->a2dp_exist) {
746 if (bt_hson) {
747 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
748 "HID + A2DP + PAN(HS)\n");
749 algorithm =
750 BT_8192E_2ANT_COEX_ALGO_HID_A2DP;
751 } else {
752 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
753 "HID + A2DP + PAN(EDR)\n");
754 algorithm =
755 BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR;
756 }
757 }
758 }
759 } else if (numOfDiffProfile >= 3) {
760 if (bt_link_info->sco_exist) {
761 if (bt_link_info->hid_exist &&
762 bt_link_info->pan_exist &&
763 bt_link_info->a2dp_exist) {
764 if (bt_hson) {
765 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
766 "ErrorSCO+HID+A2DP+PAN(HS)\n");
767
768 } else {
769 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
770 "SCO+HID+A2DP+PAN(EDR)\n");
771 algorithm =
772 BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
773 }
774 }
775 }
776 }
777
778 return algorithm;
779 }
780
781 static void halbtc8192e2ant_setfw_dac_swinglevel(struct btc_coexist *btcoexist,
782 u8 dac_swinglvl)
783 {
784 u8 h2c_parameter[1] = {0};
785
786 /* There are several type of dacswing
787 * 0x18/ 0x10/ 0xc/ 0x8/ 0x4/ 0x6 */
788 h2c_parameter[0] = dac_swinglvl;
789
790 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
791 "[BTCoex], Set Dac Swing Level=0x%x\n", dac_swinglvl);
792 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
793 "[BTCoex], FW write 0x64=0x%x\n", h2c_parameter[0]);
794
795 btcoexist->btc_fill_h2c(btcoexist, 0x64, 1, h2c_parameter);
796 }
797
798 static void halbtc8192e2ant_set_fwdec_btpwr(struct btc_coexist *btcoexist,
799 u8 dec_btpwr_lvl)
800 {
801 u8 h2c_parameter[1] = {0};
802
803 h2c_parameter[0] = dec_btpwr_lvl;
804
805 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
806 "[BTCoex] decrease Bt Power level = %d, FW write 0x62=0x%x\n",
807 dec_btpwr_lvl, h2c_parameter[0]);
808
809 btcoexist->btc_fill_h2c(btcoexist, 0x62, 1, h2c_parameter);
810 }
811
812 static void halbtc8192e2ant_dec_btpwr(struct btc_coexist *btcoexist,
813 bool force_exec, u8 dec_btpwr_lvl)
814 {
815 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW,
816 "[BTCoex], %s Dec BT power level = %d\n",
817 (force_exec ? "force to":""), dec_btpwr_lvl);
818 coex_dm->cur_dec_bt_pwr = dec_btpwr_lvl;
819
820 if (!force_exec) {
821 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
822 "[BTCoex], preBtDecPwrLvl=%d, curBtDecPwrLvl=%d\n",
823 coex_dm->pre_dec_bt_pwr, coex_dm->cur_dec_bt_pwr);
824 }
825 halbtc8192e2ant_set_fwdec_btpwr(btcoexist, coex_dm->cur_dec_bt_pwr);
826
827 coex_dm->pre_dec_bt_pwr = coex_dm->cur_dec_bt_pwr;
828 }
829
830 static void halbtc8192e2ant_set_bt_autoreport(struct btc_coexist *btcoexist,
831 bool enable_autoreport)
832 {
833 u8 h2c_parameter[1] = {0};
834
835 h2c_parameter[0] = 0;
836
837 if (enable_autoreport)
838 h2c_parameter[0] |= BIT0;
839
840 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
841 "[BTCoex], BT FW auto report : %s, FW write 0x68=0x%x\n",
842 (enable_autoreport ? "Enabled!!":"Disabled!!"),
843 h2c_parameter[0]);
844
845 btcoexist->btc_fill_h2c(btcoexist, 0x68, 1, h2c_parameter);
846 }
847
848 static void halbtc8192e2ant_bt_autoreport(struct btc_coexist *btcoexist,
849 bool force_exec,
850 bool enable_autoreport)
851 {
852 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW,
853 "[BTCoex], %s BT Auto report = %s\n",
854 (force_exec ? "force to":""),
855 ((enable_autoreport) ? "Enabled":"Disabled"));
856 coex_dm->cur_bt_auto_report = enable_autoreport;
857
858 if (!force_exec) {
859 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
860 "[BTCoex] bPreBtAutoReport=%d, bCurBtAutoReport=%d\n",
861 coex_dm->pre_bt_auto_report,
862 coex_dm->cur_bt_auto_report);
863
864 if (coex_dm->pre_bt_auto_report == coex_dm->cur_bt_auto_report)
865 return;
866 }
867 halbtc8192e2ant_set_bt_autoreport(btcoexist,
868 coex_dm->cur_bt_auto_report);
869
870 coex_dm->pre_bt_auto_report = coex_dm->cur_bt_auto_report;
871 }
872
873 static void halbtc8192e2ant_fw_dac_swinglvl(struct btc_coexist *btcoexist,
874 bool force_exec, u8 fw_dac_swinglvl)
875 {
876 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW,
877 "[BTCoex], %s set FW Dac Swing level = %d\n",
878 (force_exec ? "force to":""), fw_dac_swinglvl);
879 coex_dm->cur_fw_dac_swing_lvl = fw_dac_swinglvl;
880
881 if (!force_exec) {
882 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
883 "[BTCoex] preFwDacSwingLvl=%d, curFwDacSwingLvl=%d\n",
884 coex_dm->pre_fw_dac_swing_lvl,
885 coex_dm->cur_fw_dac_swing_lvl);
886
887 if (coex_dm->pre_fw_dac_swing_lvl ==
888 coex_dm->cur_fw_dac_swing_lvl)
889 return;
890 }
891
892 halbtc8192e2ant_setfw_dac_swinglevel(btcoexist,
893 coex_dm->cur_fw_dac_swing_lvl);
894
895 coex_dm->pre_fw_dac_swing_lvl = coex_dm->cur_fw_dac_swing_lvl;
896 }
897
898 static void halbtc8192e2ant_set_sw_rf_rx_lpf_corner(struct btc_coexist *btcoexist,
899 bool rx_rf_shrink_on)
900 {
901 if (rx_rf_shrink_on) {
902 /* Shrink RF Rx LPF corner */
903 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
904 "[BTCoex], Shrink RF Rx LPF corner!!\n");
905 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e,
906 0xfffff, 0xffffc);
907 } else {
908 /* Resume RF Rx LPF corner
909 * After initialized, we can use coex_dm->btRf0x1eBackup */
910 if (btcoexist->initilized) {
911 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
912 "[BTCoex], Resume RF Rx LPF corner!!\n");
913 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e,
914 0xfffff,
915 coex_dm->bt_rf0x1e_backup);
916 }
917 }
918 }
919
920 static void halbtc8192e2ant_rf_shrink(struct btc_coexist *btcoexist,
921 bool force_exec, bool rx_rf_shrink_on)
922 {
923 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW,
924 "[BTCoex], %s turn Rx RF Shrink = %s\n",
925 (force_exec ? "force to":""), ((rx_rf_shrink_on) ? "ON":"OFF"));
926 coex_dm->cur_rf_rx_lpf_shrink = rx_rf_shrink_on;
927
928 if (!force_exec) {
929 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
930 "[BTCoex]bPreRfRxLpfShrink=%d,bCurRfRxLpfShrink=%d\n",
931 coex_dm->pre_rf_rx_lpf_shrink,
932 coex_dm->cur_rf_rx_lpf_shrink);
933
934 if (coex_dm->pre_rf_rx_lpf_shrink ==
935 coex_dm->cur_rf_rx_lpf_shrink)
936 return;
937 }
938 halbtc8192e2ant_set_sw_rf_rx_lpf_corner(btcoexist,
939 coex_dm->cur_rf_rx_lpf_shrink);
940
941 coex_dm->pre_rf_rx_lpf_shrink = coex_dm->cur_rf_rx_lpf_shrink;
942 }
943
944 static void halbtc8192e2ant_set_dac_swingreg(struct btc_coexist *btcoexist,
945 u32 level)
946 {
947 u8 val = (u8)level;
948
949 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
950 "[BTCoex], Write SwDacSwing = 0x%x\n", level);
951 btcoexist->btc_write_1byte_bitmask(btcoexist, 0x883, 0x3e, val);
952 }
953
954 static void halbtc8192e2ant_setsw_fulltime_dacswing(struct btc_coexist *btcoexist,
955 bool sw_dac_swingon,
956 u32 sw_dac_swinglvl)
957 {
958 if (sw_dac_swingon)
959 halbtc8192e2ant_set_dac_swingreg(btcoexist, sw_dac_swinglvl);
960 else
961 halbtc8192e2ant_set_dac_swingreg(btcoexist, 0x18);
962 }
963
964 static void halbtc8192e2ant_DacSwing(struct btc_coexist *btcoexist,
965 bool force_exec, bool dac_swingon,
966 u32 dac_swinglvl)
967 {
968 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW,
969 "[BTCoex], %s turn DacSwing=%s, dac_swinglvl=0x%x\n",
970 (force_exec ? "force to":""),
971 ((dac_swingon) ? "ON":"OFF"), dac_swinglvl);
972 coex_dm->cur_dac_swing_on = dac_swingon;
973 coex_dm->cur_dac_swing_lvl = dac_swinglvl;
974
975 if (!force_exec) {
976 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
977 "[BTCoex], bPreDacSwingOn=%d, preDacSwingLvl=0x%x, ",
978 coex_dm->pre_dac_swing_on,
979 coex_dm->pre_dac_swing_lvl);
980 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
981 "bCurDacSwingOn=%d, curDacSwingLvl=0x%x\n",
982 coex_dm->cur_dac_swing_on,
983 coex_dm->cur_dac_swing_lvl);
984
985 if ((coex_dm->pre_dac_swing_on == coex_dm->cur_dac_swing_on) &&
986 (coex_dm->pre_dac_swing_lvl == coex_dm->cur_dac_swing_lvl))
987 return;
988 }
989 mdelay(30);
990 halbtc8192e2ant_setsw_fulltime_dacswing(btcoexist, dac_swingon,
991 dac_swinglvl);
992
993 coex_dm->pre_dac_swing_on = coex_dm->cur_dac_swing_on;
994 coex_dm->pre_dac_swing_lvl = coex_dm->cur_dac_swing_lvl;
995 }
996
997 static void halbtc8192e2ant_set_agc_table(struct btc_coexist *btcoexist,
998 bool agc_table_en)
999 {
1000
1001 /* BB AGC Gain Table */
1002 if (agc_table_en) {
1003 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
1004 "[BTCoex], BB Agc Table On!\n");
1005 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x0a1A0001);
1006 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x091B0001);
1007 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x081C0001);
1008 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x071D0001);
1009 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x061E0001);
1010 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x051F0001);
1011 } else {
1012 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
1013 "[BTCoex], BB Agc Table Off!\n");
1014 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xaa1A0001);
1015 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa91B0001);
1016 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa81C0001);
1017 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa71D0001);
1018 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa61E0001);
1019 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa51F0001);
1020 }
1021 }
1022
1023 static void halbtc8192e2ant_AgcTable(struct btc_coexist *btcoexist,
1024 bool force_exec, bool agc_table_en)
1025 {
1026 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW,
1027 "[BTCoex], %s %s Agc Table\n",
1028 (force_exec ? "force to":""),
1029 ((agc_table_en) ? "Enable":"Disable"));
1030 coex_dm->cur_agc_table_en = agc_table_en;
1031
1032 if (!force_exec) {
1033 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
1034 "[BTCoex], bPreAgcTableEn=%d, bCurAgcTableEn=%d\n",
1035 coex_dm->pre_agc_table_en, coex_dm->cur_agc_table_en);
1036
1037 if (coex_dm->pre_agc_table_en == coex_dm->cur_agc_table_en)
1038 return;
1039 }
1040 halbtc8192e2ant_set_agc_table(btcoexist, agc_table_en);
1041
1042 coex_dm->pre_agc_table_en = coex_dm->cur_agc_table_en;
1043 }
1044
1045 static void halbtc8192e2ant_set_coex_table(struct btc_coexist *btcoexist,
1046 u32 val0x6c0, u32 val0x6c4,
1047 u32 val0x6c8, u8 val0x6cc)
1048 {
1049 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
1050 "[BTCoex], set coex table, set 0x6c0=0x%x\n", val0x6c0);
1051 btcoexist->btc_write_4byte(btcoexist, 0x6c0, val0x6c0);
1052
1053 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
1054 "[BTCoex], set coex table, set 0x6c4=0x%x\n", val0x6c4);
1055 btcoexist->btc_write_4byte(btcoexist, 0x6c4, val0x6c4);
1056
1057 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
1058 "[BTCoex], set coex table, set 0x6c8=0x%x\n", val0x6c8);
1059 btcoexist->btc_write_4byte(btcoexist, 0x6c8, val0x6c8);
1060
1061 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
1062 "[BTCoex], set coex table, set 0x6cc=0x%x\n", val0x6cc);
1063 btcoexist->btc_write_1byte(btcoexist, 0x6cc, val0x6cc);
1064 }
1065
1066 static void halbtc8192e2ant_coex_table(struct btc_coexist *btcoexist,
1067 bool force_exec,
1068 u32 val0x6c0, u32 val0x6c4,
1069 u32 val0x6c8, u8 val0x6cc)
1070 {
1071 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW,
1072 "[BTCoex], %s write Coex Table 0x6c0=0x%x, ",
1073 (force_exec ? "force to":""), val0x6c0);
1074 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW,
1075 "0x6c4=0x%x, 0x6c8=0x%x, 0x6cc=0x%x\n",
1076 val0x6c4, val0x6c8, val0x6cc);
1077 coex_dm->cur_val0x6c0 = val0x6c0;
1078 coex_dm->cur_val0x6c4 = val0x6c4;
1079 coex_dm->cur_val0x6c8 = val0x6c8;
1080 coex_dm->cur_val0x6cc = val0x6cc;
1081
1082 if (!force_exec) {
1083 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
1084 "[BTCoex], preVal0x6c0=0x%x, preVal0x6c4=0x%x, ",
1085 coex_dm->pre_val0x6c0, coex_dm->pre_val0x6c4);
1086 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
1087 "preVal0x6c8=0x%x, preVal0x6cc=0x%x !!\n",
1088 coex_dm->pre_val0x6c8, coex_dm->pre_val0x6cc);
1089 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
1090 "[BTCoex], curVal0x6c0=0x%x, curVal0x6c4=0x%x,\n",
1091 coex_dm->cur_val0x6c0, coex_dm->cur_val0x6c4);
1092 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
1093 "curVal0x6c8=0x%x, curVal0x6cc=0x%x !!\n",
1094 coex_dm->cur_val0x6c8, coex_dm->cur_val0x6cc);
1095
1096 if ((coex_dm->pre_val0x6c0 == coex_dm->cur_val0x6c0) &&
1097 (coex_dm->pre_val0x6c4 == coex_dm->cur_val0x6c4) &&
1098 (coex_dm->pre_val0x6c8 == coex_dm->cur_val0x6c8) &&
1099 (coex_dm->pre_val0x6cc == coex_dm->cur_val0x6cc))
1100 return;
1101 }
1102 halbtc8192e2ant_set_coex_table(btcoexist, val0x6c0, val0x6c4,
1103 val0x6c8, val0x6cc);
1104
1105 coex_dm->pre_val0x6c0 = coex_dm->cur_val0x6c0;
1106 coex_dm->pre_val0x6c4 = coex_dm->cur_val0x6c4;
1107 coex_dm->pre_val0x6c8 = coex_dm->cur_val0x6c8;
1108 coex_dm->pre_val0x6cc = coex_dm->cur_val0x6cc;
1109 }
1110
1111 static void halbtc8192e2ant_coex_table_with_type(struct btc_coexist *btcoexist,
1112 bool force_exec, u8 type)
1113 {
1114 switch (type) {
1115 case 0:
1116 halbtc8192e2ant_coex_table(btcoexist, force_exec, 0x55555555,
1117 0x5a5a5a5a, 0xffffff, 0x3);
1118 break;
1119 case 1:
1120 halbtc8192e2ant_coex_table(btcoexist, force_exec, 0x5a5a5a5a,
1121 0x5a5a5a5a, 0xffffff, 0x3);
1122 break;
1123 case 2:
1124 halbtc8192e2ant_coex_table(btcoexist, force_exec, 0x55555555,
1125 0x5ffb5ffb, 0xffffff, 0x3);
1126 break;
1127 case 3:
1128 halbtc8192e2ant_coex_table(btcoexist, force_exec, 0xdfffdfff,
1129 0x5fdb5fdb, 0xffffff, 0x3);
1130 break;
1131 case 4:
1132 halbtc8192e2ant_coex_table(btcoexist, force_exec, 0xdfffdfff,
1133 0x5ffb5ffb, 0xffffff, 0x3);
1134 break;
1135 default:
1136 break;
1137 }
1138 }
1139
1140 static void halbtc8192e2ant_set_fw_ignore_wlanact(struct btc_coexist *btcoexist,
1141 bool enable)
1142 {
1143 u8 h2c_parameter[1] = {0};
1144
1145 if (enable)
1146 h2c_parameter[0] |= BIT0; /* function enable */
1147
1148 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
1149 "[BTCoex]set FW for BT Ignore Wlan_Act, FW write 0x63=0x%x\n",
1150 h2c_parameter[0]);
1151
1152 btcoexist->btc_fill_h2c(btcoexist, 0x63, 1, h2c_parameter);
1153 }
1154
1155 static void halbtc8192e2ant_IgnoreWlanAct(struct btc_coexist *btcoexist,
1156 bool force_exec, bool enable)
1157 {
1158 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW,
1159 "[BTCoex], %s turn Ignore WlanAct %s\n",
1160 (force_exec ? "force to":""), (enable ? "ON":"OFF"));
1161 coex_dm->cur_ignore_wlan_act = enable;
1162
1163 if (!force_exec) {
1164 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
1165 "[BTCoex], bPreIgnoreWlanAct = %d ",
1166 coex_dm->pre_ignore_wlan_act);
1167 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
1168 "bCurIgnoreWlanAct = %d!!\n",
1169 coex_dm->cur_ignore_wlan_act);
1170
1171 if (coex_dm->pre_ignore_wlan_act ==
1172 coex_dm->cur_ignore_wlan_act)
1173 return;
1174 }
1175 halbtc8192e2ant_set_fw_ignore_wlanact(btcoexist, enable);
1176
1177 coex_dm->pre_ignore_wlan_act = coex_dm->cur_ignore_wlan_act;
1178 }
1179
1180 static void halbtc8192e2ant_SetFwPstdma(struct btc_coexist *btcoexist, u8 byte1,
1181 u8 byte2, u8 byte3, u8 byte4, u8 byte5)
1182 {
1183 u8 h2c_parameter[5] = {0};
1184
1185 h2c_parameter[0] = byte1;
1186 h2c_parameter[1] = byte2;
1187 h2c_parameter[2] = byte3;
1188 h2c_parameter[3] = byte4;
1189 h2c_parameter[4] = byte5;
1190
1191 coex_dm->ps_tdma_para[0] = byte1;
1192 coex_dm->ps_tdma_para[1] = byte2;
1193 coex_dm->ps_tdma_para[2] = byte3;
1194 coex_dm->ps_tdma_para[3] = byte4;
1195 coex_dm->ps_tdma_para[4] = byte5;
1196
1197 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
1198 "[BTCoex], FW write 0x60(5bytes)=0x%x%08x\n",
1199 h2c_parameter[0],
1200 h2c_parameter[1] << 24 | h2c_parameter[2] << 16 |
1201 h2c_parameter[3] << 8 | h2c_parameter[4]);
1202
1203 btcoexist->btc_fill_h2c(btcoexist, 0x60, 5, h2c_parameter);
1204 }
1205
1206 static void halbtc8192e2ant_sw_mechanism1(struct btc_coexist *btcoexist,
1207 bool shrink_rx_lpf,
1208 bool low_penalty_ra,
1209 bool limited_dig,
1210 bool btlan_constrain)
1211 {
1212 halbtc8192e2ant_rf_shrink(btcoexist, NORMAL_EXEC, shrink_rx_lpf);
1213 }
1214
1215 static void halbtc8192e2ant_sw_mechanism2(struct btc_coexist *btcoexist,
1216 bool agc_table_shift,
1217 bool adc_backoff,
1218 bool sw_dac_swing,
1219 u32 dac_swinglvl)
1220 {
1221 halbtc8192e2ant_AgcTable(btcoexist, NORMAL_EXEC, agc_table_shift);
1222 halbtc8192e2ant_DacSwing(btcoexist, NORMAL_EXEC, sw_dac_swing,
1223 dac_swinglvl);
1224 }
1225
1226 static void halbtc8192e2ant_ps_tdma(struct btc_coexist *btcoexist,
1227 bool force_exec, bool turn_on, u8 type)
1228 {
1229
1230 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW,
1231 "[BTCoex], %s turn %s PS TDMA, type=%d\n",
1232 (force_exec ? "force to":""), (turn_on ? "ON":"OFF"), type);
1233 coex_dm->cur_ps_tdma_on = turn_on;
1234 coex_dm->cur_ps_tdma = type;
1235
1236 if (!force_exec) {
1237 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
1238 "[BTCoex], bPrePsTdmaOn = %d, bCurPsTdmaOn = %d!!\n",
1239 coex_dm->pre_ps_tdma_on, coex_dm->cur_ps_tdma_on);
1240 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
1241 "[BTCoex], prePsTdma = %d, curPsTdma = %d!!\n",
1242 coex_dm->pre_ps_tdma, coex_dm->cur_ps_tdma);
1243
1244 if ((coex_dm->pre_ps_tdma_on == coex_dm->cur_ps_tdma_on) &&
1245 (coex_dm->pre_ps_tdma == coex_dm->cur_ps_tdma))
1246 return;
1247 }
1248 if (turn_on) {
1249 switch (type) {
1250 case 1:
1251 default:
1252 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1a,
1253 0x1a, 0xe1, 0x90);
1254 break;
1255 case 2:
1256 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x12,
1257 0x12, 0xe1, 0x90);
1258 break;
1259 case 3:
1260 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1c,
1261 0x3, 0xf1, 0x90);
1262 break;
1263 case 4:
1264 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x10,
1265 0x3, 0xf1, 0x90);
1266 break;
1267 case 5:
1268 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1a,
1269 0x1a, 0x60, 0x90);
1270 break;
1271 case 6:
1272 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x12,
1273 0x12, 0x60, 0x90);
1274 break;
1275 case 7:
1276 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1c,
1277 0x3, 0x70, 0x90);
1278 break;
1279 case 8:
1280 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xa3, 0x10,
1281 0x3, 0x70, 0x90);
1282 break;
1283 case 9:
1284 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1a,
1285 0x1a, 0xe1, 0x10);
1286 break;
1287 case 10:
1288 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x12,
1289 0x12, 0xe1, 0x10);
1290 break;
1291 case 11:
1292 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1c,
1293 0x3, 0xf1, 0x10);
1294 break;
1295 case 12:
1296 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x10,
1297 0x3, 0xf1, 0x10);
1298 break;
1299 case 13:
1300 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1a,
1301 0x1a, 0xe0, 0x10);
1302 break;
1303 case 14:
1304 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x12,
1305 0x12, 0xe0, 0x10);
1306 break;
1307 case 15:
1308 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1c,
1309 0x3, 0xf0, 0x10);
1310 break;
1311 case 16:
1312 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x12,
1313 0x3, 0xf0, 0x10);
1314 break;
1315 case 17:
1316 halbtc8192e2ant_SetFwPstdma(btcoexist, 0x61, 0x20,
1317 0x03, 0x10, 0x10);
1318 break;
1319 case 18:
1320 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x5,
1321 0x5, 0xe1, 0x90);
1322 break;
1323 case 19:
1324 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x25,
1325 0x25, 0xe1, 0x90);
1326 break;
1327 case 20:
1328 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x25,
1329 0x25, 0x60, 0x90);
1330 break;
1331 case 21:
1332 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x15,
1333 0x03, 0x70, 0x90);
1334 break;
1335 case 71:
1336 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1a,
1337 0x1a, 0xe1, 0x90);
1338 break;
1339 }
1340 } else {
1341 /* disable PS tdma */
1342 switch (type) {
1343 default:
1344 case 0:
1345 halbtc8192e2ant_SetFwPstdma(btcoexist, 0x8, 0x0, 0x0,
1346 0x0, 0x0);
1347 btcoexist->btc_write_1byte(btcoexist, 0x92c, 0x4);
1348 break;
1349 case 1:
1350 halbtc8192e2ant_SetFwPstdma(btcoexist, 0x0, 0x0, 0x0,
1351 0x8, 0x0);
1352 mdelay(5);
1353 btcoexist->btc_write_1byte(btcoexist, 0x92c, 0x20);
1354 break;
1355 }
1356 }
1357
1358 /* update pre state */
1359 coex_dm->pre_ps_tdma_on = coex_dm->cur_ps_tdma_on;
1360 coex_dm->pre_ps_tdma = coex_dm->cur_ps_tdma;
1361 }
1362
1363 static void halbtc8192e2ant_set_switch_sstype(struct btc_coexist *btcoexist,
1364 u8 sstype)
1365 {
1366 u8 mimops = BTC_MIMO_PS_DYNAMIC;
1367 u32 disra_mask = 0x0;
1368
1369 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
1370 "[BTCoex], REAL set SS Type = %d\n", sstype);
1371
1372 disra_mask = halbtc8192e2ant_decidera_mask(btcoexist, sstype,
1373 coex_dm->curra_masktype);
1374 halbtc8192e2ant_Updatera_mask(btcoexist, FORCE_EXEC, disra_mask);
1375
1376 if (sstype == 1) {
1377 halbtc8192e2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 1);
1378 /* switch ofdm path */
1379 btcoexist->btc_write_1byte(btcoexist, 0xc04, 0x11);
1380 btcoexist->btc_write_1byte(btcoexist, 0xd04, 0x1);
1381 btcoexist->btc_write_4byte(btcoexist, 0x90c, 0x81111111);
1382 /* switch cck patch */
1383 btcoexist->btc_write_1byte_bitmask(btcoexist, 0xe77, 0x4, 0x1);
1384 btcoexist->btc_write_1byte(btcoexist, 0xa07, 0x81);
1385 mimops = BTC_MIMO_PS_STATIC;
1386 } else if (sstype == 2) {
1387 halbtc8192e2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 0);
1388 btcoexist->btc_write_1byte(btcoexist, 0xc04, 0x33);
1389 btcoexist->btc_write_1byte(btcoexist, 0xd04, 0x3);
1390 btcoexist->btc_write_4byte(btcoexist, 0x90c, 0x81121313);
1391 btcoexist->btc_write_1byte_bitmask(btcoexist, 0xe77, 0x4, 0x0);
1392 btcoexist->btc_write_1byte(btcoexist, 0xa07, 0x41);
1393 mimops = BTC_MIMO_PS_DYNAMIC;
1394 }
1395 /* set rx 1ss or 2ss */
1396 btcoexist->btc_set(btcoexist, BTC_SET_ACT_SEND_MIMO_PS, &mimops);
1397 }
1398
1399 static void halbtc8192e2ant_switch_sstype(struct btc_coexist *btcoexist,
1400 bool force_exec, u8 new_sstype)
1401 {
1402 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
1403 "[BTCoex], %s Switch SS Type = %d\n",
1404 (force_exec ? "force to":""), new_sstype);
1405 coex_dm->cur_sstype = new_sstype;
1406
1407 if (!force_exec) {
1408 if (coex_dm->pre_sstype == coex_dm->cur_sstype)
1409 return;
1410 }
1411 halbtc8192e2ant_set_switch_sstype(btcoexist, coex_dm->cur_sstype);
1412
1413 coex_dm->pre_sstype = coex_dm->cur_sstype;
1414 }
1415
1416 static void halbtc8192e2ant_coex_alloff(struct btc_coexist *btcoexist)
1417 {
1418 /* fw all off */
1419 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
1420 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
1421 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
1422
1423 /* sw all off */
1424 halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
1425 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
1426
1427 /* hw all off */
1428 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
1429 }
1430
1431 static void halbtc8192e2ant_init_coex_dm(struct btc_coexist *btcoexist)
1432 {
1433 /* force to reset coex mechanism */
1434
1435 halbtc8192e2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 1);
1436 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, FORCE_EXEC, 6);
1437 halbtc8192e2ant_dec_btpwr(btcoexist, FORCE_EXEC, 0);
1438
1439 halbtc8192e2ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0);
1440 halbtc8192e2ant_switch_sstype(btcoexist, FORCE_EXEC, 2);
1441
1442 halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
1443 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
1444 }
1445
1446 static void halbtc8192e2ant_action_bt_inquiry(struct btc_coexist *btcoexist)
1447 {
1448 bool low_pwr_disable = true;
1449
1450 btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER,
1451 &low_pwr_disable);
1452
1453 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
1454
1455 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
1456 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 3);
1457 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
1458 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
1459
1460 halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
1461 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
1462 }
1463
1464 static bool halbtc8192e2ant_is_common_action(struct btc_coexist *btcoexist)
1465 {
1466 struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
1467 bool common = false, wifi_connected = false, wifi_busy = false;
1468 bool bt_hson = false, low_pwr_disable = false;
1469
1470 btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hson);
1471 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
1472 &wifi_connected);
1473 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
1474
1475 if (bt_link_info->sco_exist || bt_link_info->hid_exist)
1476 halbtc8192e2ant_limited_tx(btcoexist, NORMAL_EXEC, 1, 0, 0, 0);
1477 else
1478 halbtc8192e2ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0);
1479
1480 if (!wifi_connected) {
1481 low_pwr_disable = false;
1482 btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER,
1483 &low_pwr_disable);
1484
1485 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
1486 "[BTCoex], Wifi non-connected idle!!\n");
1487
1488 if ((BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE ==
1489 coex_dm->bt_status) ||
1490 (BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE ==
1491 coex_dm->bt_status)) {
1492 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC,
1493 2);
1494 halbtc8192e2ant_coex_table_with_type(btcoexist,
1495 NORMAL_EXEC, 1);
1496 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
1497 0);
1498 } else {
1499 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC,
1500 1);
1501 halbtc8192e2ant_coex_table_with_type(btcoexist,
1502 NORMAL_EXEC, 0);
1503 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
1504 1);
1505 }
1506
1507 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
1508 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
1509
1510 halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false,
1511 false);
1512 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false,
1513 0x18);
1514
1515 common = true;
1516 } else {
1517 if (BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE ==
1518 coex_dm->bt_status) {
1519 low_pwr_disable = false;
1520 btcoexist->btc_set(btcoexist,
1521 BTC_SET_ACT_DISABLE_LOW_POWER,
1522 &low_pwr_disable);
1523
1524 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
1525 "Wifi connected + BT non connected-idle!!\n");
1526
1527 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC,
1528 2);
1529 halbtc8192e2ant_coex_table_with_type(btcoexist,
1530 NORMAL_EXEC, 1);
1531 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
1532 0);
1533 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC,
1534 6);
1535 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
1536
1537 halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
1538 false, false);
1539 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
1540 false, 0x18);
1541
1542 common = true;
1543 } else if (BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE ==
1544 coex_dm->bt_status) {
1545 low_pwr_disable = true;
1546 btcoexist->btc_set(btcoexist,
1547 BTC_SET_ACT_DISABLE_LOW_POWER,
1548 &low_pwr_disable);
1549
1550 if (bt_hson)
1551 return false;
1552 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
1553 "Wifi connected + BT connected-idle!!\n");
1554
1555 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC,
1556 2);
1557 halbtc8192e2ant_coex_table_with_type(btcoexist,
1558 NORMAL_EXEC, 1);
1559 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
1560 0);
1561 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC,
1562 6);
1563 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
1564
1565 halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
1566 false, false);
1567 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
1568 false, 0x18);
1569
1570 common = true;
1571 } else {
1572 low_pwr_disable = true;
1573 btcoexist->btc_set(btcoexist,
1574 BTC_SET_ACT_DISABLE_LOW_POWER,
1575 &low_pwr_disable);
1576
1577 if (wifi_busy) {
1578 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
1579 "Wifi Connected-Busy + BT Busy!!\n");
1580 common = false;
1581 } else {
1582 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
1583 "Wifi Connected-Idle + BT Busy!!\n");
1584
1585 halbtc8192e2ant_switch_sstype(btcoexist,
1586 NORMAL_EXEC, 1);
1587 halbtc8192e2ant_coex_table_with_type(btcoexist,
1588 NORMAL_EXEC,
1589 2);
1590 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1591 true, 21);
1592 halbtc8192e2ant_fw_dac_swinglvl(btcoexist,
1593 NORMAL_EXEC, 6);
1594 halbtc8192e2ant_dec_btpwr(btcoexist,
1595 NORMAL_EXEC, 0);
1596 halbtc8192e2ant_sw_mechanism1(btcoexist, false,
1597 false, false,
1598 false);
1599 halbtc8192e2ant_sw_mechanism2(btcoexist, false,
1600 false, false,
1601 0x18);
1602 common = true;
1603 }
1604 }
1605 }
1606 return common;
1607 }
1608
1609 static void halbtc8192e2ant_tdma_duration_adjust(struct btc_coexist *btcoexist,
1610 bool sco_hid, bool tx_pause,
1611 u8 max_interval)
1612 {
1613 static int up, dn, m, n, wait_cnt;
1614 /* 0: no change, +1: increase WiFi duration,
1615 * -1: decrease WiFi duration */
1616 int result;
1617 u8 retry_cnt = 0;
1618
1619 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW,
1620 "[BTCoex], TdmaDurationAdjust()\n");
1621
1622 if (!coex_dm->auto_tdma_adjust) {
1623 coex_dm->auto_tdma_adjust = true;
1624 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
1625 "[BTCoex], first run TdmaDurationAdjust()!!\n");
1626 if (sco_hid) {
1627 if (tx_pause) {
1628 if (max_interval == 1) {
1629 halbtc8192e2ant_ps_tdma(btcoexist,
1630 NORMAL_EXEC,
1631 true, 13);
1632 coex_dm->ps_tdma_du_adj_type = 13;
1633 } else if (max_interval == 2) {
1634 halbtc8192e2ant_ps_tdma(btcoexist,
1635 NORMAL_EXEC,
1636 true, 14);
1637 coex_dm->ps_tdma_du_adj_type = 14;
1638 } else if (max_interval == 3) {
1639 halbtc8192e2ant_ps_tdma(btcoexist,
1640 NORMAL_EXEC,
1641 true, 15);
1642 coex_dm->ps_tdma_du_adj_type = 15;
1643 } else {
1644 halbtc8192e2ant_ps_tdma(btcoexist,
1645 NORMAL_EXEC,
1646 true, 15);
1647 coex_dm->ps_tdma_du_adj_type = 15;
1648 }
1649 } else {
1650 if (max_interval == 1) {
1651 halbtc8192e2ant_ps_tdma(btcoexist,
1652 NORMAL_EXEC,
1653 true, 9);
1654 coex_dm->ps_tdma_du_adj_type = 9;
1655 } else if (max_interval == 2) {
1656 halbtc8192e2ant_ps_tdma(btcoexist,
1657 NORMAL_EXEC,
1658 true, 10);
1659 coex_dm->ps_tdma_du_adj_type = 10;
1660 } else if (max_interval == 3) {
1661 halbtc8192e2ant_ps_tdma(btcoexist,
1662 NORMAL_EXEC,
1663 true, 11);
1664 coex_dm->ps_tdma_du_adj_type = 11;
1665 } else {
1666 halbtc8192e2ant_ps_tdma(btcoexist,
1667 NORMAL_EXEC,
1668 true, 11);
1669 coex_dm->ps_tdma_du_adj_type = 11;
1670 }
1671 }
1672 } else {
1673 if (tx_pause) {
1674 if (max_interval == 1) {
1675 halbtc8192e2ant_ps_tdma(btcoexist,
1676 NORMAL_EXEC,
1677 true, 5);
1678 coex_dm->ps_tdma_du_adj_type = 5;
1679 } else if (max_interval == 2) {
1680 halbtc8192e2ant_ps_tdma(btcoexist,
1681 NORMAL_EXEC,
1682 true, 6);
1683 coex_dm->ps_tdma_du_adj_type = 6;
1684 } else if (max_interval == 3) {
1685 halbtc8192e2ant_ps_tdma(btcoexist,
1686 NORMAL_EXEC,
1687 true, 7);
1688 coex_dm->ps_tdma_du_adj_type = 7;
1689 } else {
1690 halbtc8192e2ant_ps_tdma(btcoexist,
1691 NORMAL_EXEC,
1692 true, 7);
1693 coex_dm->ps_tdma_du_adj_type = 7;
1694 }
1695 } else {
1696 if (max_interval == 1) {
1697 halbtc8192e2ant_ps_tdma(btcoexist,
1698 NORMAL_EXEC,
1699 true, 1);
1700 coex_dm->ps_tdma_du_adj_type = 1;
1701 } else if (max_interval == 2) {
1702 halbtc8192e2ant_ps_tdma(btcoexist,
1703 NORMAL_EXEC,
1704 true, 2);
1705 coex_dm->ps_tdma_du_adj_type = 2;
1706 } else if (max_interval == 3) {
1707 halbtc8192e2ant_ps_tdma(btcoexist,
1708 NORMAL_EXEC,
1709 true, 3);
1710 coex_dm->ps_tdma_du_adj_type = 3;
1711 } else {
1712 halbtc8192e2ant_ps_tdma(btcoexist,
1713 NORMAL_EXEC,
1714 true, 3);
1715 coex_dm->ps_tdma_du_adj_type = 3;
1716 }
1717 }
1718 }
1719
1720 up = 0;
1721 dn = 0;
1722 m = 1;
1723 n = 3;
1724 result = 0;
1725 wait_cnt = 0;
1726 } else {
1727 /* acquire the BT TRx retry count from BT_Info byte2 */
1728 retry_cnt = coex_sta->bt_retry_cnt;
1729 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
1730 "[BTCoex], retry_cnt = %d\n", retry_cnt);
1731 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
1732 "[BTCoex], up=%d, dn=%d, m=%d, n=%d, wait_cnt=%d\n",
1733 up, dn, m, n, wait_cnt);
1734 result = 0;
1735 wait_cnt++;
1736 /* no retry in the last 2-second duration */
1737 if (retry_cnt == 0) {
1738 up++;
1739 dn--;
1740
1741 if (dn <= 0)
1742 dn = 0;
1743
1744 if (up >= n) {
1745 wait_cnt = 0;
1746 n = 3;
1747 up = 0;
1748 dn = 0;
1749 result = 1;
1750 BTC_PRINT(BTC_MSG_ALGORITHM,
1751 ALGO_TRACE_FW_DETAIL,
1752 "[BTCoex]Increase wifi duration!!\n");
1753 }
1754 } else if (retry_cnt <= 3) {
1755 up--;
1756 dn++;
1757
1758 if (up <= 0)
1759 up = 0;
1760
1761 if (dn == 2) {
1762 if (wait_cnt <= 2)
1763 m++;
1764 else
1765 m = 1;
1766
1767 if (m >= 20)
1768 m = 20;
1769
1770 n = 3 * m;
1771 up = 0;
1772 dn = 0;
1773 wait_cnt = 0;
1774 result = -1;
1775 BTC_PRINT(BTC_MSG_ALGORITHM,
1776 ALGO_TRACE_FW_DETAIL,
1777 "Reduce wifi duration for retry<3\n");
1778 }
1779 } else {
1780 if (wait_cnt == 1)
1781 m++;
1782 else
1783 m = 1;
1784
1785 if (m >= 20)
1786 m = 20;
1787
1788 n = 3*m;
1789 up = 0;
1790 dn = 0;
1791 wait_cnt = 0;
1792 result = -1;
1793 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
1794 "Decrease wifi duration for retryCounter>3!!\n");
1795 }
1796
1797 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
1798 "[BTCoex], max Interval = %d\n", max_interval);
1799 if (max_interval == 1) {
1800 if (tx_pause) {
1801 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
1802 "[BTCoex], TxPause = 1\n");
1803
1804 if (coex_dm->cur_ps_tdma == 71) {
1805 halbtc8192e2ant_ps_tdma(btcoexist,
1806 NORMAL_EXEC,
1807 true, 5);
1808 coex_dm->ps_tdma_du_adj_type = 5;
1809 } else if (coex_dm->cur_ps_tdma == 1) {
1810 halbtc8192e2ant_ps_tdma(btcoexist,
1811 NORMAL_EXEC,
1812 true, 5);
1813 coex_dm->ps_tdma_du_adj_type = 5;
1814 } else if (coex_dm->cur_ps_tdma == 2) {
1815 halbtc8192e2ant_ps_tdma(btcoexist,
1816 NORMAL_EXEC,
1817 true, 6);
1818 coex_dm->ps_tdma_du_adj_type = 6;
1819 } else if (coex_dm->cur_ps_tdma == 3) {
1820 halbtc8192e2ant_ps_tdma(btcoexist,
1821 NORMAL_EXEC,
1822 true, 7);
1823 coex_dm->ps_tdma_du_adj_type = 7;
1824 } else if (coex_dm->cur_ps_tdma == 4) {
1825 halbtc8192e2ant_ps_tdma(btcoexist,
1826 NORMAL_EXEC,
1827 true, 8);
1828 coex_dm->ps_tdma_du_adj_type = 8;
1829 }
1830 if (coex_dm->cur_ps_tdma == 9) {
1831 halbtc8192e2ant_ps_tdma(btcoexist,
1832 NORMAL_EXEC,
1833 true, 13);
1834 coex_dm->ps_tdma_du_adj_type = 13;
1835 } else if (coex_dm->cur_ps_tdma == 10) {
1836 halbtc8192e2ant_ps_tdma(btcoexist,
1837 NORMAL_EXEC,
1838 true, 14);
1839 coex_dm->ps_tdma_du_adj_type = 14;
1840 } else if (coex_dm->cur_ps_tdma == 11) {
1841 halbtc8192e2ant_ps_tdma(btcoexist,
1842 NORMAL_EXEC,
1843 true, 15);
1844 coex_dm->ps_tdma_du_adj_type = 15;
1845 } else if (coex_dm->cur_ps_tdma == 12) {
1846 halbtc8192e2ant_ps_tdma(btcoexist,
1847 NORMAL_EXEC,
1848 true, 16);
1849 coex_dm->ps_tdma_du_adj_type = 16;
1850 }
1851
1852 if (result == -1) {
1853 if (coex_dm->cur_ps_tdma == 5) {
1854 halbtc8192e2ant_ps_tdma(
1855 btcoexist,
1856 NORMAL_EXEC,
1857 true, 6);
1858 coex_dm->ps_tdma_du_adj_type =
1859 6;
1860 } else if (coex_dm->cur_ps_tdma == 6) {
1861 halbtc8192e2ant_ps_tdma(
1862 btcoexist,
1863 NORMAL_EXEC,
1864 true, 7);
1865 coex_dm->ps_tdma_du_adj_type =
1866 7;
1867 } else if (coex_dm->cur_ps_tdma == 7) {
1868 halbtc8192e2ant_ps_tdma(
1869 btcoexist,
1870 NORMAL_EXEC,
1871 true, 8);
1872 coex_dm->ps_tdma_du_adj_type =
1873 8;
1874 } else if (coex_dm->cur_ps_tdma == 13) {
1875 halbtc8192e2ant_ps_tdma(
1876 btcoexist,
1877 NORMAL_EXEC,
1878 true, 14);
1879 coex_dm->ps_tdma_du_adj_type =
1880 14;
1881 } else if (coex_dm->cur_ps_tdma == 14) {
1882 halbtc8192e2ant_ps_tdma(
1883 btcoexist,
1884 NORMAL_EXEC,
1885 true, 15);
1886 coex_dm->ps_tdma_du_adj_type =
1887 15;
1888 } else if (coex_dm->cur_ps_tdma == 15) {
1889 halbtc8192e2ant_ps_tdma(
1890 btcoexist,
1891 NORMAL_EXEC,
1892 true, 16);
1893 coex_dm->ps_tdma_du_adj_type =
1894 16;
1895 }
1896 } else if (result == 1) {
1897 if (coex_dm->cur_ps_tdma == 8) {
1898 halbtc8192e2ant_ps_tdma(
1899 btcoexist,
1900 NORMAL_EXEC,
1901 true, 7);
1902 coex_dm->ps_tdma_du_adj_type =
1903 7;
1904 } else if (coex_dm->cur_ps_tdma == 7) {
1905 halbtc8192e2ant_ps_tdma(
1906 btcoexist,
1907 NORMAL_EXEC,
1908 true, 6);
1909 coex_dm->ps_tdma_du_adj_type =
1910 6;
1911 } else if (coex_dm->cur_ps_tdma == 6) {
1912 halbtc8192e2ant_ps_tdma(
1913 btcoexist,
1914 NORMAL_EXEC,
1915 true, 5);
1916 coex_dm->ps_tdma_du_adj_type =
1917 5;
1918 } else if (coex_dm->cur_ps_tdma == 16) {
1919 halbtc8192e2ant_ps_tdma(
1920 btcoexist,
1921 NORMAL_EXEC,
1922 true, 15);
1923 coex_dm->ps_tdma_du_adj_type =
1924 15;
1925 } else if (coex_dm->cur_ps_tdma == 15) {
1926 halbtc8192e2ant_ps_tdma(
1927 btcoexist,
1928 NORMAL_EXEC,
1929 true, 14);
1930 coex_dm->ps_tdma_du_adj_type =
1931 14;
1932 } else if (coex_dm->cur_ps_tdma == 14) {
1933 halbtc8192e2ant_ps_tdma(
1934 btcoexist,
1935 NORMAL_EXEC,
1936 true, 13);
1937 coex_dm->ps_tdma_du_adj_type =
1938 13;
1939 }
1940 }
1941 } else {
1942 BTC_PRINT(BTC_MSG_ALGORITHM,
1943 ALGO_TRACE_FW_DETAIL,
1944 "[BTCoex], TxPause = 0\n");
1945 if (coex_dm->cur_ps_tdma == 5) {
1946 halbtc8192e2ant_ps_tdma(btcoexist,
1947 NORMAL_EXEC,
1948 true, 71);
1949 coex_dm->ps_tdma_du_adj_type = 71;
1950 } else if (coex_dm->cur_ps_tdma == 6) {
1951 halbtc8192e2ant_ps_tdma(btcoexist,
1952 NORMAL_EXEC,
1953 true, 2);
1954 coex_dm->ps_tdma_du_adj_type = 2;
1955 } else if (coex_dm->cur_ps_tdma == 7) {
1956 halbtc8192e2ant_ps_tdma(btcoexist,
1957 NORMAL_EXEC,
1958 true, 3);
1959 coex_dm->ps_tdma_du_adj_type = 3;
1960 } else if (coex_dm->cur_ps_tdma == 8) {
1961 halbtc8192e2ant_ps_tdma(btcoexist,
1962 NORMAL_EXEC,
1963 true, 4);
1964 coex_dm->ps_tdma_du_adj_type = 4;
1965 }
1966 if (coex_dm->cur_ps_tdma == 13) {
1967 halbtc8192e2ant_ps_tdma(btcoexist,
1968 NORMAL_EXEC,
1969 true, 9);
1970 coex_dm->ps_tdma_du_adj_type = 9;
1971 } else if (coex_dm->cur_ps_tdma == 14) {
1972 halbtc8192e2ant_ps_tdma(btcoexist,
1973 NORMAL_EXEC,
1974 true, 10);
1975 coex_dm->ps_tdma_du_adj_type = 10;
1976 } else if (coex_dm->cur_ps_tdma == 15) {
1977 halbtc8192e2ant_ps_tdma(btcoexist,
1978 NORMAL_EXEC,
1979 true, 11);
1980 coex_dm->ps_tdma_du_adj_type = 11;
1981 } else if (coex_dm->cur_ps_tdma == 16) {
1982 halbtc8192e2ant_ps_tdma(btcoexist,
1983 NORMAL_EXEC,
1984 true, 12);
1985 coex_dm->ps_tdma_du_adj_type = 12;
1986 }
1987
1988 if (result == -1) {
1989 if (coex_dm->cur_ps_tdma == 71) {
1990 halbtc8192e2ant_ps_tdma(
1991 btcoexist,
1992 NORMAL_EXEC,
1993 true, 1);
1994 coex_dm->ps_tdma_du_adj_type =
1995 1;
1996 } else if (coex_dm->cur_ps_tdma == 1) {
1997 halbtc8192e2ant_ps_tdma(
1998 btcoexist,
1999 NORMAL_EXEC,
2000 true, 2);
2001 coex_dm->ps_tdma_du_adj_type =
2002 2;
2003 } else if (coex_dm->cur_ps_tdma == 2) {
2004 halbtc8192e2ant_ps_tdma(
2005 btcoexist,
2006 NORMAL_EXEC,
2007 true, 3);
2008 coex_dm->ps_tdma_du_adj_type =
2009 3;
2010 } else if (coex_dm->cur_ps_tdma == 3) {
2011 halbtc8192e2ant_ps_tdma(
2012 btcoexist,
2013 NORMAL_EXEC,
2014 true, 4);
2015 coex_dm->ps_tdma_du_adj_type =
2016 4;
2017 } else if (coex_dm->cur_ps_tdma == 9) {
2018 halbtc8192e2ant_ps_tdma(
2019 btcoexist,
2020 NORMAL_EXEC,
2021 true, 10);
2022 coex_dm->ps_tdma_du_adj_type =
2023 10;
2024 } else if (coex_dm->cur_ps_tdma == 10) {
2025 halbtc8192e2ant_ps_tdma(
2026 btcoexist,
2027 NORMAL_EXEC,
2028 true, 11);
2029 coex_dm->ps_tdma_du_adj_type =
2030 11;
2031 } else if (coex_dm->cur_ps_tdma == 11) {
2032 halbtc8192e2ant_ps_tdma(
2033 btcoexist,
2034 NORMAL_EXEC,
2035 true, 12);
2036 coex_dm->ps_tdma_du_adj_type =
2037 12;
2038 }
2039 } else if (result == 1) {
2040 if (coex_dm->cur_ps_tdma == 4) {
2041 halbtc8192e2ant_ps_tdma(
2042 btcoexist,
2043 NORMAL_EXEC,
2044 true, 3);
2045 coex_dm->ps_tdma_du_adj_type =
2046 3;
2047 } else if (coex_dm->cur_ps_tdma == 3) {
2048 halbtc8192e2ant_ps_tdma(
2049 btcoexist,
2050 NORMAL_EXEC,
2051 true, 2);
2052 coex_dm->ps_tdma_du_adj_type =
2053 2;
2054 } else if (coex_dm->cur_ps_tdma == 2) {
2055 halbtc8192e2ant_ps_tdma(
2056 btcoexist,
2057 NORMAL_EXEC,
2058 true, 1);
2059 coex_dm->ps_tdma_du_adj_type =
2060 1;
2061 } else if (coex_dm->cur_ps_tdma == 1) {
2062 halbtc8192e2ant_ps_tdma(
2063 btcoexist,
2064 NORMAL_EXEC,
2065 true, 71);
2066 coex_dm->ps_tdma_du_adj_type =
2067 71;
2068 } else if (coex_dm->cur_ps_tdma == 12) {
2069 halbtc8192e2ant_ps_tdma(
2070 btcoexist,
2071 NORMAL_EXEC,
2072 true, 11);
2073 coex_dm->ps_tdma_du_adj_type =
2074 11;
2075 } else if (coex_dm->cur_ps_tdma == 11) {
2076 halbtc8192e2ant_ps_tdma(
2077 btcoexist,
2078 NORMAL_EXEC,
2079 true, 10);
2080 coex_dm->ps_tdma_du_adj_type =
2081 10;
2082 } else if (coex_dm->cur_ps_tdma == 10) {
2083 halbtc8192e2ant_ps_tdma(
2084 btcoexist,
2085 NORMAL_EXEC,
2086 true, 9);
2087 coex_dm->ps_tdma_du_adj_type =
2088 9;
2089 }
2090 }
2091 }
2092 } else if (max_interval == 2) {
2093 if (tx_pause) {
2094 BTC_PRINT(BTC_MSG_ALGORITHM,
2095 ALGO_TRACE_FW_DETAIL,
2096 "[BTCoex], TxPause = 1\n");
2097 if (coex_dm->cur_ps_tdma == 1) {
2098 halbtc8192e2ant_ps_tdma(btcoexist,
2099 NORMAL_EXEC,
2100 true, 6);
2101 coex_dm->ps_tdma_du_adj_type = 6;
2102 } else if (coex_dm->cur_ps_tdma == 2) {
2103 halbtc8192e2ant_ps_tdma(btcoexist,
2104 NORMAL_EXEC,
2105 true, 6);
2106 coex_dm->ps_tdma_du_adj_type = 6;
2107 } else if (coex_dm->cur_ps_tdma == 3) {
2108 halbtc8192e2ant_ps_tdma(btcoexist,
2109 NORMAL_EXEC,
2110 true, 7);
2111 coex_dm->ps_tdma_du_adj_type = 7;
2112 } else if (coex_dm->cur_ps_tdma == 4) {
2113 halbtc8192e2ant_ps_tdma(btcoexist,
2114 NORMAL_EXEC,
2115 true, 8);
2116 coex_dm->ps_tdma_du_adj_type = 8;
2117 }
2118 if (coex_dm->cur_ps_tdma == 9) {
2119 halbtc8192e2ant_ps_tdma(btcoexist,
2120 NORMAL_EXEC,
2121 true, 14);
2122 coex_dm->ps_tdma_du_adj_type = 14;
2123 } else if (coex_dm->cur_ps_tdma == 10) {
2124 halbtc8192e2ant_ps_tdma(btcoexist,
2125 NORMAL_EXEC,
2126 true, 14);
2127 coex_dm->ps_tdma_du_adj_type = 14;
2128 } else if (coex_dm->cur_ps_tdma == 11) {
2129 halbtc8192e2ant_ps_tdma(btcoexist,
2130 NORMAL_EXEC,
2131 true, 15);
2132 coex_dm->ps_tdma_du_adj_type = 15;
2133 } else if (coex_dm->cur_ps_tdma == 12) {
2134 halbtc8192e2ant_ps_tdma(btcoexist,
2135 NORMAL_EXEC,
2136 true, 16);
2137 coex_dm->ps_tdma_du_adj_type = 16;
2138 }
2139 if (result == -1) {
2140 if (coex_dm->cur_ps_tdma == 5) {
2141 halbtc8192e2ant_ps_tdma(
2142 btcoexist,
2143 NORMAL_EXEC,
2144 true, 6);
2145 coex_dm->ps_tdma_du_adj_type =
2146 6;
2147 } else if (coex_dm->cur_ps_tdma == 6) {
2148 halbtc8192e2ant_ps_tdma(
2149 btcoexist,
2150 NORMAL_EXEC,
2151 true, 7);
2152 coex_dm->ps_tdma_du_adj_type =
2153 7;
2154 } else if (coex_dm->cur_ps_tdma == 7) {
2155 halbtc8192e2ant_ps_tdma(
2156 btcoexist,
2157 NORMAL_EXEC,
2158 true, 8);
2159 coex_dm->ps_tdma_du_adj_type =
2160 8;
2161 } else if (coex_dm->cur_ps_tdma == 13) {
2162 halbtc8192e2ant_ps_tdma(
2163 btcoexist,
2164 NORMAL_EXEC,
2165 true, 14);
2166 coex_dm->ps_tdma_du_adj_type =
2167 14;
2168 } else if (coex_dm->cur_ps_tdma == 14) {
2169 halbtc8192e2ant_ps_tdma(
2170 btcoexist,
2171 NORMAL_EXEC,
2172 true, 15);
2173 coex_dm->ps_tdma_du_adj_type =
2174 15;
2175 } else if (coex_dm->cur_ps_tdma == 15) {
2176 halbtc8192e2ant_ps_tdma(
2177 btcoexist,
2178 NORMAL_EXEC,
2179 true, 16);
2180 coex_dm->ps_tdma_du_adj_type =
2181 16;
2182 }
2183 } else if (result == 1) {
2184 if (coex_dm->cur_ps_tdma == 8) {
2185 halbtc8192e2ant_ps_tdma(
2186 btcoexist,
2187 NORMAL_EXEC,
2188 true, 7);
2189 coex_dm->ps_tdma_du_adj_type =
2190 7;
2191 } else if (coex_dm->cur_ps_tdma == 7) {
2192 halbtc8192e2ant_ps_tdma(
2193 btcoexist,
2194 NORMAL_EXEC,
2195 true, 6);
2196 coex_dm->ps_tdma_du_adj_type =
2197 6;
2198 } else if (coex_dm->cur_ps_tdma == 6) {
2199 halbtc8192e2ant_ps_tdma(
2200 btcoexist,
2201 NORMAL_EXEC,
2202 true, 6);
2203 coex_dm->ps_tdma_du_adj_type =
2204 6;
2205 } else if (coex_dm->cur_ps_tdma == 16) {
2206 halbtc8192e2ant_ps_tdma(
2207 btcoexist,
2208 NORMAL_EXEC,
2209 true, 15);
2210 coex_dm->ps_tdma_du_adj_type =
2211 15;
2212 } else if (coex_dm->cur_ps_tdma == 15) {
2213 halbtc8192e2ant_ps_tdma(
2214 btcoexist,
2215 NORMAL_EXEC,
2216 true, 14);
2217 coex_dm->ps_tdma_du_adj_type =
2218 14;
2219 } else if (coex_dm->cur_ps_tdma == 14) {
2220 halbtc8192e2ant_ps_tdma(
2221 btcoexist,
2222 NORMAL_EXEC,
2223 true, 14);
2224 coex_dm->ps_tdma_du_adj_type =
2225 14;
2226 }
2227 }
2228 } else {
2229 BTC_PRINT(BTC_MSG_ALGORITHM,
2230 ALGO_TRACE_FW_DETAIL,
2231 "[BTCoex], TxPause = 0\n");
2232 if (coex_dm->cur_ps_tdma == 5) {
2233 halbtc8192e2ant_ps_tdma(btcoexist,
2234 NORMAL_EXEC,
2235 true, 2);
2236 coex_dm->ps_tdma_du_adj_type = 2;
2237 } else if (coex_dm->cur_ps_tdma == 6) {
2238 halbtc8192e2ant_ps_tdma(btcoexist,
2239 NORMAL_EXEC,
2240 true, 2);
2241 coex_dm->ps_tdma_du_adj_type = 2;
2242 } else if (coex_dm->cur_ps_tdma == 7) {
2243 halbtc8192e2ant_ps_tdma(btcoexist,
2244 NORMAL_EXEC,
2245 true, 3);
2246 coex_dm->ps_tdma_du_adj_type = 3;
2247 } else if (coex_dm->cur_ps_tdma == 8) {
2248 halbtc8192e2ant_ps_tdma(btcoexist,
2249 NORMAL_EXEC,
2250 true, 4);
2251 coex_dm->ps_tdma_du_adj_type = 4;
2252 }
2253 if (coex_dm->cur_ps_tdma == 13) {
2254 halbtc8192e2ant_ps_tdma(btcoexist,
2255 NORMAL_EXEC,
2256 true, 10);
2257 coex_dm->ps_tdma_du_adj_type = 10;
2258 } else if (coex_dm->cur_ps_tdma == 14) {
2259 halbtc8192e2ant_ps_tdma(btcoexist,
2260 NORMAL_EXEC,
2261 true, 10);
2262 coex_dm->ps_tdma_du_adj_type = 10;
2263 } else if (coex_dm->cur_ps_tdma == 15) {
2264 halbtc8192e2ant_ps_tdma(btcoexist,
2265 NORMAL_EXEC,
2266 true, 11);
2267 coex_dm->ps_tdma_du_adj_type = 11;
2268 } else if (coex_dm->cur_ps_tdma == 16) {
2269 halbtc8192e2ant_ps_tdma(btcoexist,
2270 NORMAL_EXEC,
2271 true, 12);
2272 coex_dm->ps_tdma_du_adj_type = 12;
2273 }
2274 if (result == -1) {
2275 if (coex_dm->cur_ps_tdma == 1) {
2276 halbtc8192e2ant_ps_tdma(
2277 btcoexist,
2278 NORMAL_EXEC,
2279 true, 2);
2280 coex_dm->ps_tdma_du_adj_type =
2281 2;
2282 } else if (coex_dm->cur_ps_tdma == 2) {
2283 halbtc8192e2ant_ps_tdma(
2284 btcoexist,
2285 NORMAL_EXEC,
2286 true, 3);
2287 coex_dm->ps_tdma_du_adj_type =
2288 3;
2289 } else if (coex_dm->cur_ps_tdma == 3) {
2290 halbtc8192e2ant_ps_tdma(
2291 btcoexist,
2292 NORMAL_EXEC,
2293 true, 4);
2294 coex_dm->ps_tdma_du_adj_type =
2295 4;
2296 } else if (coex_dm->cur_ps_tdma == 9) {
2297 halbtc8192e2ant_ps_tdma(
2298 btcoexist,
2299 NORMAL_EXEC,
2300 true, 10);
2301 coex_dm->ps_tdma_du_adj_type =
2302 10;
2303 } else if (coex_dm->cur_ps_tdma == 10) {
2304 halbtc8192e2ant_ps_tdma(
2305 btcoexist,
2306 NORMAL_EXEC,
2307 true, 11);
2308 coex_dm->ps_tdma_du_adj_type =
2309 11;
2310 } else if (coex_dm->cur_ps_tdma == 11) {
2311 halbtc8192e2ant_ps_tdma(
2312 btcoexist,
2313 NORMAL_EXEC,
2314 true, 12);
2315 coex_dm->ps_tdma_du_adj_type =
2316 12;
2317 }
2318 } else if (result == 1) {
2319 if (coex_dm->cur_ps_tdma == 4) {
2320 halbtc8192e2ant_ps_tdma(
2321 btcoexist,
2322 NORMAL_EXEC,
2323 true, 3);
2324 coex_dm->ps_tdma_du_adj_type =
2325 3;
2326 } else if (coex_dm->cur_ps_tdma == 3) {
2327 halbtc8192e2ant_ps_tdma(
2328 btcoexist,
2329 NORMAL_EXEC,
2330 true, 2);
2331 coex_dm->ps_tdma_du_adj_type =
2332 2;
2333 } else if (coex_dm->cur_ps_tdma == 2) {
2334 halbtc8192e2ant_ps_tdma(
2335 btcoexist,
2336 NORMAL_EXEC,
2337 true, 2);
2338 coex_dm->ps_tdma_du_adj_type =
2339 2;
2340 } else if (coex_dm->cur_ps_tdma == 12) {
2341 halbtc8192e2ant_ps_tdma(
2342 btcoexist,
2343 NORMAL_EXEC,
2344 true, 11);
2345 coex_dm->ps_tdma_du_adj_type =
2346 11;
2347 } else if (coex_dm->cur_ps_tdma == 11) {
2348 halbtc8192e2ant_ps_tdma(
2349 btcoexist,
2350 NORMAL_EXEC,
2351 true, 10);
2352 coex_dm->ps_tdma_du_adj_type =
2353 10;
2354 } else if (coex_dm->cur_ps_tdma == 10) {
2355 halbtc8192e2ant_ps_tdma(
2356 btcoexist,
2357 NORMAL_EXEC,
2358 true, 10);
2359 coex_dm->ps_tdma_du_adj_type =
2360 10;
2361 }
2362 }
2363 }
2364 } else if (max_interval == 3) {
2365 if (tx_pause) {
2366 BTC_PRINT(BTC_MSG_ALGORITHM,
2367 ALGO_TRACE_FW_DETAIL,
2368 "[BTCoex], TxPause = 1\n");
2369 if (coex_dm->cur_ps_tdma == 1) {
2370 halbtc8192e2ant_ps_tdma(btcoexist,
2371 NORMAL_EXEC,
2372 true, 7);
2373 coex_dm->ps_tdma_du_adj_type = 7;
2374 } else if (coex_dm->cur_ps_tdma == 2) {
2375 halbtc8192e2ant_ps_tdma(btcoexist,
2376 NORMAL_EXEC,
2377 true, 7);
2378 coex_dm->ps_tdma_du_adj_type = 7;
2379 } else if (coex_dm->cur_ps_tdma == 3) {
2380 halbtc8192e2ant_ps_tdma(btcoexist,
2381 NORMAL_EXEC,
2382 true, 7);
2383 coex_dm->ps_tdma_du_adj_type = 7;
2384 } else if (coex_dm->cur_ps_tdma == 4) {
2385 halbtc8192e2ant_ps_tdma(btcoexist,
2386 NORMAL_EXEC,
2387 true, 8);
2388 coex_dm->ps_tdma_du_adj_type = 8;
2389 }
2390 if (coex_dm->cur_ps_tdma == 9) {
2391 halbtc8192e2ant_ps_tdma(btcoexist,
2392 NORMAL_EXEC,
2393 true, 15);
2394 coex_dm->ps_tdma_du_adj_type = 15;
2395 } else if (coex_dm->cur_ps_tdma == 10) {
2396 halbtc8192e2ant_ps_tdma(btcoexist,
2397 NORMAL_EXEC,
2398 true, 15);
2399 coex_dm->ps_tdma_du_adj_type = 15;
2400 } else if (coex_dm->cur_ps_tdma == 11) {
2401 halbtc8192e2ant_ps_tdma(btcoexist,
2402 NORMAL_EXEC,
2403 true, 15);
2404 coex_dm->ps_tdma_du_adj_type = 15;
2405 } else if (coex_dm->cur_ps_tdma == 12) {
2406 halbtc8192e2ant_ps_tdma(btcoexist,
2407 NORMAL_EXEC,
2408 true, 16);
2409 coex_dm->ps_tdma_du_adj_type = 16;
2410 }
2411 if (result == -1) {
2412 if (coex_dm->cur_ps_tdma == 5) {
2413 halbtc8192e2ant_ps_tdma(
2414 btcoexist,
2415 NORMAL_EXEC,
2416 true, 7);
2417 coex_dm->ps_tdma_du_adj_type =
2418 7;
2419 } else if (coex_dm->cur_ps_tdma == 6) {
2420 halbtc8192e2ant_ps_tdma(
2421 btcoexist,
2422 NORMAL_EXEC,
2423 true, 7);
2424 coex_dm->ps_tdma_du_adj_type =
2425 7;
2426 } else if (coex_dm->cur_ps_tdma == 7) {
2427 halbtc8192e2ant_ps_tdma(
2428 btcoexist,
2429 NORMAL_EXEC,
2430 true, 8);
2431 coex_dm->ps_tdma_du_adj_type =
2432 8;
2433 } else if (coex_dm->cur_ps_tdma == 13) {
2434 halbtc8192e2ant_ps_tdma(
2435 btcoexist,
2436 NORMAL_EXEC,
2437 true, 15);
2438 coex_dm->ps_tdma_du_adj_type =
2439 15;
2440 } else if (coex_dm->cur_ps_tdma == 14) {
2441 halbtc8192e2ant_ps_tdma(
2442 btcoexist,
2443 NORMAL_EXEC,
2444 true, 15);
2445 coex_dm->ps_tdma_du_adj_type =
2446 15;
2447 } else if (coex_dm->cur_ps_tdma == 15) {
2448 halbtc8192e2ant_ps_tdma(
2449 btcoexist,
2450 NORMAL_EXEC,
2451 true, 16);
2452 coex_dm->ps_tdma_du_adj_type =
2453 16;
2454 }
2455 } else if (result == 1) {
2456 if (coex_dm->cur_ps_tdma == 8) {
2457 halbtc8192e2ant_ps_tdma(
2458 btcoexist,
2459 NORMAL_EXEC,
2460 true, 7);
2461 coex_dm->ps_tdma_du_adj_type =
2462 7;
2463 } else if (coex_dm->cur_ps_tdma == 7) {
2464 halbtc8192e2ant_ps_tdma(
2465 btcoexist,
2466 NORMAL_EXEC,
2467 true, 7);
2468 coex_dm->ps_tdma_du_adj_type =
2469 7;
2470 } else if (coex_dm->cur_ps_tdma == 6) {
2471 halbtc8192e2ant_ps_tdma(
2472 btcoexist,
2473 NORMAL_EXEC,
2474 true, 7);
2475 coex_dm->ps_tdma_du_adj_type =
2476 7;
2477 } else if (coex_dm->cur_ps_tdma == 16) {
2478 halbtc8192e2ant_ps_tdma(
2479 btcoexist,
2480 NORMAL_EXEC,
2481 true, 15);
2482 coex_dm->ps_tdma_du_adj_type =
2483 15;
2484 } else if (coex_dm->cur_ps_tdma == 15) {
2485 halbtc8192e2ant_ps_tdma(
2486 btcoexist,
2487 NORMAL_EXEC,
2488 true, 15);
2489 coex_dm->ps_tdma_du_adj_type =
2490 15;
2491 } else if (coex_dm->cur_ps_tdma == 14) {
2492 halbtc8192e2ant_ps_tdma(
2493 btcoexist,
2494 NORMAL_EXEC,
2495 true, 15);
2496 coex_dm->ps_tdma_du_adj_type =
2497 15;
2498 }
2499 }
2500 } else {
2501 BTC_PRINT(BTC_MSG_ALGORITHM,
2502 ALGO_TRACE_FW_DETAIL,
2503 "[BTCoex], TxPause = 0\n");
2504 if (coex_dm->cur_ps_tdma == 5) {
2505 halbtc8192e2ant_ps_tdma(btcoexist,
2506 NORMAL_EXEC,
2507 true, 3);
2508 coex_dm->ps_tdma_du_adj_type = 3;
2509 } else if (coex_dm->cur_ps_tdma == 6) {
2510 halbtc8192e2ant_ps_tdma(btcoexist,
2511 NORMAL_EXEC,
2512 true, 3);
2513 coex_dm->ps_tdma_du_adj_type = 3;
2514 } else if (coex_dm->cur_ps_tdma == 7) {
2515 halbtc8192e2ant_ps_tdma(btcoexist,
2516 NORMAL_EXEC,
2517 true, 3);
2518 coex_dm->ps_tdma_du_adj_type = 3;
2519 } else if (coex_dm->cur_ps_tdma == 8) {
2520 halbtc8192e2ant_ps_tdma(btcoexist,
2521 NORMAL_EXEC,
2522 true, 4);
2523 coex_dm->ps_tdma_du_adj_type = 4;
2524 }
2525 if (coex_dm->cur_ps_tdma == 13) {
2526 halbtc8192e2ant_ps_tdma(btcoexist,
2527 NORMAL_EXEC,
2528 true, 11);
2529 coex_dm->ps_tdma_du_adj_type = 11;
2530 } else if (coex_dm->cur_ps_tdma == 14) {
2531 halbtc8192e2ant_ps_tdma(btcoexist,
2532 NORMAL_EXEC,
2533 true, 11);
2534 coex_dm->ps_tdma_du_adj_type = 11;
2535 } else if (coex_dm->cur_ps_tdma == 15) {
2536 halbtc8192e2ant_ps_tdma(btcoexist,
2537 NORMAL_EXEC,
2538 true, 11);
2539 coex_dm->ps_tdma_du_adj_type = 11;
2540 } else if (coex_dm->cur_ps_tdma == 16) {
2541 halbtc8192e2ant_ps_tdma(btcoexist,
2542 NORMAL_EXEC,
2543 true, 12);
2544 coex_dm->ps_tdma_du_adj_type = 12;
2545 }
2546 if (result == -1) {
2547 if (coex_dm->cur_ps_tdma == 1) {
2548 halbtc8192e2ant_ps_tdma(
2549 btcoexist,
2550 NORMAL_EXEC,
2551 true, 3);
2552 coex_dm->ps_tdma_du_adj_type =
2553 3;
2554 } else if (coex_dm->cur_ps_tdma == 2) {
2555 halbtc8192e2ant_ps_tdma(
2556 btcoexist,
2557 NORMAL_EXEC,
2558 true, 3);
2559 coex_dm->ps_tdma_du_adj_type =
2560 3;
2561 } else if (coex_dm->cur_ps_tdma == 3) {
2562 halbtc8192e2ant_ps_tdma(
2563 btcoexist,
2564 NORMAL_EXEC,
2565 true, 4);
2566 coex_dm->ps_tdma_du_adj_type =
2567 4;
2568 } else if (coex_dm->cur_ps_tdma == 9) {
2569 halbtc8192e2ant_ps_tdma(
2570 btcoexist,
2571 NORMAL_EXEC,
2572 true, 11);
2573 coex_dm->ps_tdma_du_adj_type =
2574 11;
2575 } else if (coex_dm->cur_ps_tdma == 10) {
2576 halbtc8192e2ant_ps_tdma(
2577 btcoexist,
2578 NORMAL_EXEC,
2579 true, 11);
2580 coex_dm->ps_tdma_du_adj_type =
2581 11;
2582 } else if (coex_dm->cur_ps_tdma == 11) {
2583 halbtc8192e2ant_ps_tdma(
2584 btcoexist,
2585 NORMAL_EXEC,
2586 true, 12);
2587 coex_dm->ps_tdma_du_adj_type =
2588 12;
2589 }
2590 } else if (result == 1) {
2591 if (coex_dm->cur_ps_tdma == 4) {
2592 halbtc8192e2ant_ps_tdma(
2593 btcoexist,
2594 NORMAL_EXEC,
2595 true, 3);
2596 coex_dm->ps_tdma_du_adj_type =
2597 3;
2598 } else if (coex_dm->cur_ps_tdma == 3) {
2599 halbtc8192e2ant_ps_tdma(
2600 btcoexist,
2601 NORMAL_EXEC,
2602 true, 3);
2603 coex_dm->ps_tdma_du_adj_type =
2604 3;
2605 } else if (coex_dm->cur_ps_tdma == 2) {
2606 halbtc8192e2ant_ps_tdma(
2607 btcoexist,
2608 NORMAL_EXEC,
2609 true, 3);
2610 coex_dm->ps_tdma_du_adj_type =
2611 3;
2612 } else if (coex_dm->cur_ps_tdma == 12) {
2613 halbtc8192e2ant_ps_tdma(
2614 btcoexist,
2615 NORMAL_EXEC,
2616 true, 11);
2617 coex_dm->ps_tdma_du_adj_type =
2618 11;
2619 } else if (coex_dm->cur_ps_tdma == 11) {
2620 halbtc8192e2ant_ps_tdma(
2621 btcoexist,
2622 NORMAL_EXEC,
2623 true, 11);
2624 coex_dm->ps_tdma_du_adj_type =
2625 11;
2626 } else if (coex_dm->cur_ps_tdma == 10) {
2627 halbtc8192e2ant_ps_tdma(
2628 btcoexist,
2629 NORMAL_EXEC,
2630 true, 11);
2631 coex_dm->ps_tdma_du_adj_type =
2632 11;
2633 }
2634 }
2635 }
2636 }
2637 }
2638
2639 /* if current PsTdma not match with
2640 * the recorded one (when scan, dhcp...),
2641 * then we have to adjust it back to the previous record one. */
2642 if (coex_dm->cur_ps_tdma != coex_dm->ps_tdma_du_adj_type) {
2643 bool scan = false, link = false, roam = false;
2644 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
2645 "[BTCoex], PsTdma type dismatch!!!, ");
2646 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
2647 "curPsTdma=%d, recordPsTdma=%d\n",
2648 coex_dm->cur_ps_tdma, coex_dm->ps_tdma_du_adj_type);
2649
2650 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
2651 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
2652 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
2653
2654 if (!scan && !link && !roam)
2655 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2656 true,
2657 coex_dm->ps_tdma_du_adj_type);
2658 else
2659 BTC_PRINT(BTC_MSG_ALGORITHM,
2660 ALGO_TRACE_FW_DETAIL,
2661 "[BTCoex], roaming/link/scan is under progress, will adjust next time!!!\n");
2662 }
2663 }
2664
2665 /* SCO only or SCO+PAN(HS) */
2666 static void halbtc8192e2ant_action_sco(struct btc_coexist *btcoexist)
2667 {
2668 u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_STAY_LOW;
2669 u32 wifi_bw;
2670
2671 wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
2672
2673 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
2674 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2675
2676 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
2677
2678 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
2679
2680 btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
2681
2682 if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
2683 (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2684 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
2685 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 13);
2686 } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
2687 (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
2688 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
2689 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
2690 } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
2691 (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2692 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
2693 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
2694 }
2695
2696 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2697
2698 /* sw mechanism */
2699 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2700 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2701 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2702 halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
2703 false, false);
2704 halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
2705 false, 0x6);
2706 } else {
2707 halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
2708 false, false);
2709 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
2710 false, 0x6);
2711 }
2712 } else {
2713 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2714 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2715 halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
2716 false, false);
2717 halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
2718 false, 0x6);
2719 } else {
2720 halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
2721 false, false);
2722 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
2723 false, 0x6);
2724 }
2725 }
2726 }
2727
2728 static void halbtc8192e2ant_action_sco_pan(struct btc_coexist *btcoexist)
2729 {
2730 u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_STAY_LOW;
2731 u32 wifi_bw;
2732
2733 wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
2734
2735 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
2736 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2737
2738 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
2739
2740 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
2741
2742 btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
2743
2744 if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
2745 (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2746 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
2747 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 14);
2748 } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
2749 (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
2750 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
2751 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10);
2752 } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
2753 (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2754 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
2755 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10);
2756 }
2757
2758 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2759
2760 /* sw mechanism */
2761 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2762 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2763 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2764 halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
2765 false, false);
2766 halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
2767 false, 0x6);
2768 } else {
2769 halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
2770 false, false);
2771 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
2772 false, 0x6);
2773 }
2774 } else {
2775 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2776 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2777 halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
2778 false, false);
2779 halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
2780 false, 0x6);
2781 } else {
2782 halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
2783 false, false);
2784 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
2785 false, 0x6);
2786 }
2787 }
2788 }
2789
2790 static void halbtc8192e2ant_action_hid(struct btc_coexist *btcoexist)
2791 {
2792 u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
2793 u32 wifi_bw;
2794
2795 wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
2796 btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
2797
2798 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
2799 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2800
2801 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
2802
2803 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2804
2805 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
2806
2807 if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
2808 (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2809 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
2810 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 13);
2811 } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
2812 (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
2813 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
2814 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
2815 } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
2816 (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2817 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
2818 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
2819 }
2820
2821 /* sw mechanism */
2822 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2823 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2824 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2825 halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
2826 false, false);
2827 halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
2828 false, 0x18);
2829 } else {
2830 halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
2831 false, false);
2832 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
2833 false, 0x18);
2834 }
2835 } else {
2836 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2837 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2838 halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
2839 false, false);
2840 halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
2841 false, 0x18);
2842 } else {
2843 halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
2844 false, false);
2845 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
2846 false, 0x18);
2847 }
2848 }
2849 }
2850
2851 /* A2DP only / PAN(EDR) only/ A2DP+PAN(HS) */
2852 static void halbtc8192e2ant_action_a2dp(struct btc_coexist *btcoexist)
2853 {
2854 u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
2855 u32 wifi_bw;
2856 bool long_dist = false;
2857
2858 wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
2859 btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
2860
2861 if ((btrssi_state == BTC_RSSI_STATE_LOW ||
2862 btrssi_state == BTC_RSSI_STATE_STAY_LOW) &&
2863 (wifirssi_state == BTC_RSSI_STATE_LOW ||
2864 wifirssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2865 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
2866 "[BTCoex], A2dp, wifi/bt rssi both LOW!!\n");
2867 long_dist = true;
2868 }
2869 if (long_dist) {
2870 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 2);
2871 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, true,
2872 0x4);
2873 } else {
2874 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
2875 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false,
2876 0x8);
2877 }
2878
2879 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
2880
2881 if (long_dist)
2882 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
2883 else
2884 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
2885
2886
2887 if (long_dist) {
2888 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 17);
2889 coex_dm->auto_tdma_adjust = false;
2890 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
2891 } else {
2892 if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
2893 (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2894 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false,
2895 true, 1);
2896 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
2897 } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
2898 (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
2899 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false,
2900 false, 1);
2901 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
2902 } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
2903 (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2904 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false,
2905 false, 1);
2906 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
2907 }
2908 }
2909
2910 /* sw mechanism */
2911 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2912 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2913 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2914 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2915 halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
2916 false, false);
2917 halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
2918 false, 0x18);
2919 } else {
2920 halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
2921 false, false);
2922 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
2923 false, 0x18);
2924 }
2925 } else {
2926 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2927 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2928 halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
2929 false, false);
2930 halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
2931 false, 0x18);
2932 } else {
2933 halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
2934 false, false);
2935 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
2936 false, 0x18);
2937 }
2938 }
2939 }
2940
2941 static void halbtc8192e2ant_action_a2dp_pan_hs(struct btc_coexist *btcoexist)
2942 {
2943 u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
2944 u32 wifi_bw;
2945
2946 wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
2947 btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
2948
2949 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
2950 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2951
2952 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
2953 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
2954
2955 if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
2956 (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2957 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, true, 2);
2958 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
2959 } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
2960 (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
2961 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, false,
2962 2);
2963 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
2964 } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
2965 (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2966 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, false,
2967 2);
2968 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
2969 }
2970
2971 /* sw mechanism */
2972 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2973 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2974 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2975 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2976 halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
2977 false, false);
2978 halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
2979 true, 0x6);
2980 } else {
2981 halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
2982 false, false);
2983 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
2984 true, 0x6);
2985 }
2986 } else {
2987 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2988 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2989 halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
2990 false, false);
2991 halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
2992 true, 0x6);
2993 } else {
2994 halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
2995 false, false);
2996 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
2997 true, 0x6);
2998 }
2999 }
3000 }
3001
3002 static void halbtc8192e2ant_action_pan_edr(struct btc_coexist *btcoexist)
3003 {
3004 u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
3005 u32 wifi_bw;
3006
3007 wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
3008 btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
3009
3010 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
3011 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3012
3013 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
3014
3015 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
3016
3017 if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
3018 (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
3019 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
3020 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5);
3021 } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
3022 (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
3023 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
3024 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 1);
3025 } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
3026 (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3027 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
3028 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 1);
3029 }
3030
3031 /* sw mechanism */
3032 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3033 if (BTC_WIFI_BW_HT40 == wifi_bw) {
3034 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
3035 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3036 halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
3037 false, false);
3038 halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3039 false, 0x18);
3040 } else {
3041 halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
3042 false, false);
3043 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3044 false, 0x18);
3045 }
3046 } else {
3047 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
3048 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3049 halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
3050 false, false);
3051 halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3052 false, 0x18);
3053 } else {
3054 halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
3055 false, false);
3056 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3057 false, 0x18);
3058 }
3059 }
3060 }
3061
3062 /* PAN(HS) only */
3063 static void halbtc8192e2ant_action_pan_hs(struct btc_coexist *btcoexist)
3064 {
3065 u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
3066 u32 wifi_bw;
3067
3068 wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
3069 btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
3070
3071 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
3072 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3073
3074 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
3075
3076 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
3077
3078 if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
3079 (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
3080 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
3081 } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
3082 (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
3083 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
3084 } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
3085 (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3086 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
3087 }
3088 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
3089
3090 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3091 if (BTC_WIFI_BW_HT40 == wifi_bw) {
3092 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
3093 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3094 halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
3095 false, false);
3096 halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3097 false, 0x18);
3098 } else {
3099 halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
3100 false, false);
3101 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3102 false, 0x18);
3103 }
3104 } else {
3105 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
3106 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3107 halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
3108 false, false);
3109 halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3110 false, 0x18);
3111 } else {
3112 halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
3113 false, false);
3114 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3115 false, 0x18);
3116 }
3117 }
3118 }
3119
3120 /* PAN(EDR)+A2DP */
3121 static void halbtc8192e2ant_action_pan_edr_a2dp(struct btc_coexist *btcoexist)
3122 {
3123 u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
3124 u32 wifi_bw;
3125
3126 wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
3127 btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
3128
3129 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
3130 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3131
3132 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
3133
3134 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
3135
3136 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3137
3138 if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
3139 (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
3140 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
3141 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, true, 3);
3142 } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
3143 (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
3144 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
3145 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, false,
3146 3);
3147 } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
3148 (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3149 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
3150 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, false,
3151 3);
3152 }
3153
3154 /* sw mechanism */
3155 if (BTC_WIFI_BW_HT40 == wifi_bw) {
3156 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
3157 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3158 halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
3159 false, false);
3160 halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3161 false, 0x18);
3162 } else {
3163 halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
3164 false, false);
3165 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3166 false, 0x18);
3167 }
3168 } else {
3169 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
3170 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3171 halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
3172 false, false);
3173 halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3174 false, 0x18);
3175 } else {
3176 halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
3177 false, false);
3178 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3179 false, 0x18);
3180 }
3181 }
3182 }
3183
3184 static void halbtc8192e2ant_action_pan_edr_hid(struct btc_coexist *btcoexist)
3185 {
3186 u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
3187 u32 wifi_bw;
3188
3189 wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
3190 btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
3191
3192 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3193
3194 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
3195 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3196
3197 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
3198
3199 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
3200
3201 if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
3202 (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
3203 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
3204 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 14);
3205 } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
3206 (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
3207 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
3208 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10);
3209 } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
3210 (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3211 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
3212 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10);
3213 }
3214
3215 /* sw mechanism */
3216 if (BTC_WIFI_BW_HT40 == wifi_bw) {
3217 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
3218 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3219 halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
3220 false, false);
3221 halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3222 false, 0x18);
3223 } else {
3224 halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
3225 false, false);
3226 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3227 false, 0x18);
3228 }
3229 } else {
3230 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
3231 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3232 halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
3233 false, false);
3234 halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3235 false, 0x18);
3236 } else {
3237 halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
3238 false, false);
3239 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3240 false, 0x18);
3241 }
3242 }
3243 }
3244
3245 /* HID+A2DP+PAN(EDR) */
3246 static void halbtc8192e2ant_action_hid_a2dp_pan_edr(struct btc_coexist *btcoexist)
3247 {
3248 u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
3249 u32 wifi_bw;
3250
3251 wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
3252 btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
3253
3254 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
3255 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3256
3257 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
3258
3259 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3260
3261 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
3262
3263 if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
3264 (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
3265 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
3266 halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, true, 3);
3267 } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
3268 (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
3269 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
3270 halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 3);
3271 } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
3272 (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3273 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
3274 halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 3);
3275 }
3276
3277 /* sw mechanism */
3278 if (BTC_WIFI_BW_HT40 == wifi_bw) {
3279 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
3280 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3281 halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
3282 false, false);
3283 halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3284 false, 0x18);
3285 } else {
3286 halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
3287 false, false);
3288 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3289 false, 0x18);
3290 }
3291 } else {
3292 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
3293 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3294 halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
3295 false, false);
3296 halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3297 false, 0x18);
3298 } else {
3299 halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
3300 false, false);
3301 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3302 false, 0x18);
3303 }
3304 }
3305 }
3306
3307 static void halbtc8192e2ant_action_hid_a2dp(struct btc_coexist *btcoexist)
3308 {
3309 u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
3310 u32 wifi_bw;
3311
3312 wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
3313 btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
3314
3315 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
3316 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3317
3318 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3319
3320 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
3321
3322 if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
3323 (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
3324 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
3325 halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, true, 2);
3326 } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
3327 (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
3328 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
3329 halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 2);
3330 } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
3331 (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3332 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
3333 halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 2);
3334 }
3335
3336 /* sw mechanism */
3337 if (BTC_WIFI_BW_HT40 == wifi_bw) {
3338 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
3339 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3340 halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
3341 false, false);
3342 halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3343 false, 0x18);
3344 } else {
3345 halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
3346 false, false);
3347 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3348 false, 0x18);
3349 }
3350 } else {
3351 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
3352 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3353 halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
3354 false, false);
3355 halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3356 false, 0x18);
3357 } else {
3358 halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
3359 false, false);
3360 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3361 false, 0x18);
3362 }
3363 }
3364 }
3365
3366 static void halbtc8192e2ant_run_coexist_mechanism(struct btc_coexist *btcoexist)
3367 {
3368 u8 algorithm = 0;
3369
3370 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3371 "[BTCoex], RunCoexistMechanism()===>\n");
3372
3373 if (btcoexist->manual_control) {
3374 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3375 "[BTCoex], return for Manual CTRL <===\n");
3376 return;
3377 }
3378
3379 if (coex_sta->under_ips) {
3380 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3381 "[BTCoex], wifi is under IPS !!!\n");
3382 return;
3383 }
3384
3385 algorithm = halbtc8192e2ant_action_algorithm(btcoexist);
3386 if (coex_sta->c2h_bt_inquiry_page &&
3387 (BT_8192E_2ANT_COEX_ALGO_PANHS != algorithm)) {
3388 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3389 "[BTCoex], BT is under inquiry/page scan !!\n");
3390 halbtc8192e2ant_action_bt_inquiry(btcoexist);
3391 return;
3392 }
3393
3394 coex_dm->cur_algorithm = algorithm;
3395 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3396 "[BTCoex], Algorithm = %d\n", coex_dm->cur_algorithm);
3397
3398 if (halbtc8192e2ant_is_common_action(btcoexist)) {
3399 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3400 "[BTCoex], Action 2-Ant common.\n");
3401 coex_dm->auto_tdma_adjust = false;
3402 } else {
3403 if (coex_dm->cur_algorithm != coex_dm->pre_algorithm) {
3404 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3405 "[BTCoex] preAlgorithm=%d, curAlgorithm=%d\n",
3406 coex_dm->pre_algorithm,
3407 coex_dm->cur_algorithm);
3408 coex_dm->auto_tdma_adjust = false;
3409 }
3410 switch (coex_dm->cur_algorithm) {
3411 case BT_8192E_2ANT_COEX_ALGO_SCO:
3412 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3413 "Action 2-Ant, algorithm = SCO.\n");
3414 halbtc8192e2ant_action_sco(btcoexist);
3415 break;
3416 case BT_8192E_2ANT_COEX_ALGO_SCO_PAN:
3417 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3418 "Action 2-Ant, algorithm = SCO+PAN(EDR).\n");
3419 halbtc8192e2ant_action_sco_pan(btcoexist);
3420 break;
3421 case BT_8192E_2ANT_COEX_ALGO_HID:
3422 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3423 "Action 2-Ant, algorithm = HID.\n");
3424 halbtc8192e2ant_action_hid(btcoexist);
3425 break;
3426 case BT_8192E_2ANT_COEX_ALGO_A2DP:
3427 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3428 "Action 2-Ant, algorithm = A2DP.\n");
3429 halbtc8192e2ant_action_a2dp(btcoexist);
3430 break;
3431 case BT_8192E_2ANT_COEX_ALGO_A2DP_PANHS:
3432 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3433 "Action 2-Ant, algorithm = A2DP+PAN(HS).\n");
3434 halbtc8192e2ant_action_a2dp_pan_hs(btcoexist);
3435 break;
3436 case BT_8192E_2ANT_COEX_ALGO_PANEDR:
3437 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3438 "Action 2-Ant, algorithm = PAN(EDR).\n");
3439 halbtc8192e2ant_action_pan_edr(btcoexist);
3440 break;
3441 case BT_8192E_2ANT_COEX_ALGO_PANHS:
3442 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3443 "Action 2-Ant, algorithm = HS mode.\n");
3444 halbtc8192e2ant_action_pan_hs(btcoexist);
3445 break;
3446 case BT_8192E_2ANT_COEX_ALGO_PANEDR_A2DP:
3447 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3448 "Action 2-Ant, algorithm = PAN+A2DP.\n");
3449 halbtc8192e2ant_action_pan_edr_a2dp(btcoexist);
3450 break;
3451 case BT_8192E_2ANT_COEX_ALGO_PANEDR_HID:
3452 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3453 "Action 2-Ant, algorithm = PAN(EDR)+HID.\n");
3454 halbtc8192e2ant_action_pan_edr_hid(btcoexist);
3455 break;
3456 case BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR:
3457 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3458 "Action 2-Ant, algorithm = HID+A2DP+PAN.\n");
3459 halbtc8192e2ant_action_hid_a2dp_pan_edr(btcoexist);
3460 break;
3461 case BT_8192E_2ANT_COEX_ALGO_HID_A2DP:
3462 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3463 "Action 2-Ant, algorithm = HID+A2DP.\n");
3464 halbtc8192e2ant_action_hid_a2dp(btcoexist);
3465 break;
3466 default:
3467 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3468 "Action 2-Ant, algorithm = unknown!!\n");
3469 /* halbtc8192e2ant_coex_alloff(btcoexist); */
3470 break;
3471 }
3472 coex_dm->pre_algorithm = coex_dm->cur_algorithm;
3473 }
3474 }
3475
3476 static void halbtc8192e2ant_init_hwconfig(struct btc_coexist *btcoexist,
3477 bool backup)
3478 {
3479 u16 u16tmp = 0;
3480 u8 u8tmp = 0;
3481
3482 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT,
3483 "[BTCoex], 2Ant Init HW Config!!\n");
3484
3485 if (backup) {
3486 /* backup rf 0x1e value */
3487 coex_dm->bt_rf0x1e_backup =
3488 btcoexist->btc_get_rf_reg(btcoexist, BTC_RF_A,
3489 0x1e, 0xfffff);
3490
3491 coex_dm->backup_arfr_cnt1 = btcoexist->btc_read_4byte(btcoexist,
3492 0x430);
3493 coex_dm->backup_arfr_cnt2 = btcoexist->btc_read_4byte(btcoexist,
3494 0x434);
3495 coex_dm->backup_retrylimit = btcoexist->btc_read_2byte(
3496 btcoexist,
3497 0x42a);
3498 coex_dm->backup_ampdu_maxtime = btcoexist->btc_read_1byte(
3499 btcoexist,
3500 0x456);
3501 }
3502
3503 /* antenna sw ctrl to bt */
3504 btcoexist->btc_write_1byte(btcoexist, 0x4f, 0x6);
3505 btcoexist->btc_write_1byte(btcoexist, 0x944, 0x24);
3506 btcoexist->btc_write_4byte(btcoexist, 0x930, 0x700700);
3507 btcoexist->btc_write_1byte(btcoexist, 0x92c, 0x20);
3508 if (btcoexist->chip_interface == BTC_INTF_USB)
3509 btcoexist->btc_write_4byte(btcoexist, 0x64, 0x30430004);
3510 else
3511 btcoexist->btc_write_4byte(btcoexist, 0x64, 0x30030004);
3512
3513 halbtc8192e2ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0);
3514
3515 /* antenna switch control parameter */
3516 btcoexist->btc_write_4byte(btcoexist, 0x858, 0x55555555);
3517
3518 /* coex parameters */
3519 btcoexist->btc_write_1byte(btcoexist, 0x778, 0x3);
3520 /* 0x790[5:0]=0x5 */
3521 u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x790);
3522 u8tmp &= 0xc0;
3523 u8tmp |= 0x5;
3524 btcoexist->btc_write_1byte(btcoexist, 0x790, u8tmp);
3525
3526 /* enable counter statistics */
3527 btcoexist->btc_write_1byte(btcoexist, 0x76e, 0x4);
3528
3529 /* enable PTA */
3530 btcoexist->btc_write_1byte(btcoexist, 0x40, 0x20);
3531 /* enable mailbox interface */
3532 u16tmp = btcoexist->btc_read_2byte(btcoexist, 0x40);
3533 u16tmp |= BIT9;
3534 btcoexist->btc_write_2byte(btcoexist, 0x40, u16tmp);
3535
3536 /* enable PTA I2C mailbox */
3537 u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x101);
3538 u8tmp |= BIT4;
3539 btcoexist->btc_write_1byte(btcoexist, 0x101, u8tmp);
3540
3541 /* enable bt clock when wifi is disabled. */
3542 u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x93);
3543 u8tmp |= BIT0;
3544 btcoexist->btc_write_1byte(btcoexist, 0x93, u8tmp);
3545 /* enable bt clock when suspend. */
3546 u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x7);
3547 u8tmp |= BIT0;
3548 btcoexist->btc_write_1byte(btcoexist, 0x7, u8tmp);
3549 }
3550
3551 /*************************************************************
3552 * work around function start with wa_halbtc8192e2ant_
3553 *************************************************************/
3554
3555 /************************************************************
3556 * extern function start with EXhalbtc8192e2ant_
3557 ************************************************************/
3558
3559 void ex_halbtc8192e2ant_init_hwconfig(struct btc_coexist *btcoexist)
3560 {
3561 halbtc8192e2ant_init_hwconfig(btcoexist, true);
3562 }
3563
3564 void ex_halbtc8192e2ant_init_coex_dm(struct btc_coexist *btcoexist)
3565 {
3566 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT,
3567 "[BTCoex], Coex Mechanism Init!!\n");
3568 halbtc8192e2ant_init_coex_dm(btcoexist);
3569 }
3570
3571 void ex_halbtc8192e2ant_display_coex_info(struct btc_coexist *btcoexist)
3572 {
3573 struct btc_board_info *board_info = &btcoexist->board_info;
3574 struct btc_stack_info *stack_info = &btcoexist->stack_info;
3575 u8 *cli_buf = btcoexist->cli_buf;
3576 u8 u8tmp[4], i, bt_info_ext, ps_tdma_case = 0;
3577 u16 u16tmp[4];
3578 u32 u32tmp[4];
3579 bool roam = false, scan = false, link = false, wifi_under_5g = false;
3580 bool bt_hson = false, wifi_busy = false;
3581 int wifirssi = 0, bt_hs_rssi = 0;
3582 u32 wifi_bw, wifi_traffic_dir;
3583 u8 wifi_dot11_chnl, wifi_hs_chnl;
3584 u32 fw_ver = 0, bt_patch_ver = 0;
3585
3586 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3587 "\r\n ============[BT Coexist info]============");
3588 CL_PRINTF(cli_buf);
3589
3590 if (btcoexist->manual_control) {
3591 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3592 "\r\n ===========[Under Manual Control]===========");
3593 CL_PRINTF(cli_buf);
3594 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3595 "\r\n ==========================================");
3596 CL_PRINTF(cli_buf);
3597 }
3598
3599 if (!board_info->bt_exist) {
3600 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n BT not exists !!!");
3601 CL_PRINTF(cli_buf);
3602 return;
3603 }
3604
3605 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3606 "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:",
3607 board_info->pg_ant_num, board_info->btdm_ant_num);
3608 CL_PRINTF(cli_buf);
3609
3610 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d",
3611 "BT stack/ hci ext ver",
3612 ((stack_info->profile_notified) ? "Yes" : "No"),
3613 stack_info->hci_version);
3614 CL_PRINTF(cli_buf);
3615
3616 btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER, &bt_patch_ver);
3617 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver);
3618 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3619 "\r\n %-35s = %d_%d/ 0x%x/ 0x%x(%d)",
3620 "CoexVer/ FwVer/ PatchVer",
3621 glcoex_ver_date_8192e_2ant, glcoex_ver_8192e_2ant,
3622 fw_ver, bt_patch_ver, bt_patch_ver);
3623 CL_PRINTF(cli_buf);
3624
3625 btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hson);
3626 btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_DOT11_CHNL,
3627 &wifi_dot11_chnl);
3628 btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_HS_CHNL, &wifi_hs_chnl);
3629 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d(%d)",
3630 "Dot11 channel / HsMode(HsChnl)",
3631 wifi_dot11_chnl, bt_hson, wifi_hs_chnl);
3632 CL_PRINTF(cli_buf);
3633
3634 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ",
3635 "H2C Wifi inform bt chnl Info", coex_dm->wifi_chnl_info[0],
3636 coex_dm->wifi_chnl_info[1], coex_dm->wifi_chnl_info[2]);
3637 CL_PRINTF(cli_buf);
3638
3639 btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifirssi);
3640 btcoexist->btc_get(btcoexist, BTC_GET_S4_HS_RSSI, &bt_hs_rssi);
3641 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
3642 "Wifi rssi/ HS rssi", wifirssi, bt_hs_rssi);
3643 CL_PRINTF(cli_buf);
3644
3645 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
3646 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
3647 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
3648 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ",
3649 "Wifi link/ roam/ scan", link, roam, scan);
3650 CL_PRINTF(cli_buf);
3651
3652 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_5G, &wifi_under_5g);
3653 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3654 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
3655 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION,
3656 &wifi_traffic_dir);
3657 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %s/ %s ",
3658 "Wifi status", (wifi_under_5g ? "5G" : "2.4G"),
3659 ((BTC_WIFI_BW_LEGACY == wifi_bw) ? "Legacy" :
3660 (((BTC_WIFI_BW_HT40 == wifi_bw) ? "HT40" : "HT20"))),
3661 ((!wifi_busy) ? "idle" :
3662 ((BTC_WIFI_TRAFFIC_TX == wifi_traffic_dir) ?
3663 "uplink" : "downlink")));
3664 CL_PRINTF(cli_buf);
3665
3666 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d] ",
3667 "BT [status/ rssi/ retryCnt]",
3668 ((btcoexist->bt_info.bt_disabled) ? ("disabled") :
3669 ((coex_sta->c2h_bt_inquiry_page) ?
3670 ("inquiry/page scan") :
3671 ((BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE ==
3672 coex_dm->bt_status) ? "non-connected idle" :
3673 ((BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE ==
3674 coex_dm->bt_status) ? "connected-idle" : "busy")))),
3675 coex_sta->bt_rssi, coex_sta->bt_retry_cnt);
3676 CL_PRINTF(cli_buf);
3677
3678 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d",
3679 "SCO/HID/PAN/A2DP", stack_info->sco_exist,
3680 stack_info->hid_exist, stack_info->pan_exist,
3681 stack_info->a2dp_exist);
3682 CL_PRINTF(cli_buf);
3683 btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_BT_LINK_INFO);
3684
3685 bt_info_ext = coex_sta->bt_info_ext;
3686 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s",
3687 "BT Info A2DP rate",
3688 (bt_info_ext&BIT0) ? "Basic rate" : "EDR rate");
3689 CL_PRINTF(cli_buf);
3690
3691 for (i = 0; i < BT_INFO_SRC_8192E_2ANT_MAX; i++) {
3692 if (coex_sta->bt_info_c2h_cnt[i]) {
3693 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3694 "\r\n %-35s = %02x %02x %02x %02x ",
3695 GLBtInfoSrc8192e2Ant[i],
3696 coex_sta->bt_info_c2h[i][0],
3697 coex_sta->bt_info_c2h[i][1],
3698 coex_sta->bt_info_c2h[i][2],
3699 coex_sta->bt_info_c2h[i][3]);
3700 CL_PRINTF(cli_buf);
3701 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3702 "%02x %02x %02x(%d)",
3703 coex_sta->bt_info_c2h[i][4],
3704 coex_sta->bt_info_c2h[i][5],
3705 coex_sta->bt_info_c2h[i][6],
3706 coex_sta->bt_info_c2h_cnt[i]);
3707 CL_PRINTF(cli_buf);
3708 }
3709 }
3710
3711 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/%s",
3712 "PS state, IPS/LPS",
3713 ((coex_sta->under_ips ? "IPS ON" : "IPS OFF")),
3714 ((coex_sta->under_lps ? "LPS ON" : "LPS OFF")));
3715 CL_PRINTF(cli_buf);
3716 btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_FW_PWR_MODE_CMD);
3717
3718 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x ", "SS Type",
3719 coex_dm->cur_sstype);
3720 CL_PRINTF(cli_buf);
3721
3722 /* Sw mechanism */
3723 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
3724 "============[Sw mechanism]============");
3725 CL_PRINTF(cli_buf);
3726 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ",
3727 "SM1[ShRf/ LpRA/ LimDig]", coex_dm->cur_rf_rx_lpf_shrink,
3728 coex_dm->cur_low_penalty_ra, coex_dm->limited_dig);
3729 CL_PRINTF(cli_buf);
3730 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d(0x%x) ",
3731 "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]",
3732 coex_dm->cur_agc_table_en, coex_dm->cur_adc_back_off,
3733 coex_dm->cur_dac_swing_on, coex_dm->cur_dac_swing_lvl);
3734 CL_PRINTF(cli_buf);
3735
3736 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x ", "Rate Mask",
3737 btcoexist->bt_info.ra_mask);
3738 CL_PRINTF(cli_buf);
3739
3740 /* Fw mechanism */
3741 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
3742 "============[Fw mechanism]============");
3743 CL_PRINTF(cli_buf);
3744
3745 ps_tdma_case = coex_dm->cur_ps_tdma;
3746 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3747 "\r\n %-35s = %02x %02x %02x %02x %02x case-%d (auto:%d)",
3748 "PS TDMA", coex_dm->ps_tdma_para[0],
3749 coex_dm->ps_tdma_para[1], coex_dm->ps_tdma_para[2],
3750 coex_dm->ps_tdma_para[3], coex_dm->ps_tdma_para[4],
3751 ps_tdma_case, coex_dm->auto_tdma_adjust);
3752 CL_PRINTF(cli_buf);
3753
3754 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ",
3755 "DecBtPwr/ IgnWlanAct",
3756 coex_dm->cur_dec_bt_pwr, coex_dm->cur_ignore_wlan_act);
3757 CL_PRINTF(cli_buf);
3758
3759 /* Hw setting */
3760 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
3761 "============[Hw setting]============");
3762 CL_PRINTF(cli_buf);
3763
3764 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x",
3765 "RF-A, 0x1e initVal", coex_dm->bt_rf0x1e_backup);
3766 CL_PRINTF(cli_buf);
3767
3768 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x",
3769 "backup ARFR1/ARFR2/RL/AMaxTime", coex_dm->backup_arfr_cnt1,
3770 coex_dm->backup_arfr_cnt2, coex_dm->backup_retrylimit,
3771 coex_dm->backup_ampdu_maxtime);
3772 CL_PRINTF(cli_buf);
3773
3774 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x430);
3775 u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x434);
3776 u16tmp[0] = btcoexist->btc_read_2byte(btcoexist, 0x42a);
3777 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x456);
3778 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x",
3779 "0x430/0x434/0x42a/0x456",
3780 u32tmp[0], u32tmp[1], u16tmp[0], u8tmp[0]);
3781 CL_PRINTF(cli_buf);
3782
3783 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xc04);
3784 u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0xd04);
3785 u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x90c);
3786 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x",
3787 "0xc04/ 0xd04/ 0x90c", u32tmp[0], u32tmp[1], u32tmp[2]);
3788 CL_PRINTF(cli_buf);
3789
3790 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x778);
3791 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x778",
3792 u8tmp[0]);
3793 CL_PRINTF(cli_buf);
3794
3795 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x92c);
3796 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x930);
3797 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
3798 "0x92c/ 0x930", (u8tmp[0]), u32tmp[0]);
3799 CL_PRINTF(cli_buf);
3800
3801 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x40);
3802 u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x4f);
3803 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
3804 "0x40/ 0x4f", u8tmp[0], u8tmp[1]);
3805 CL_PRINTF(cli_buf);
3806
3807 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x550);
3808 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x522);
3809 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
3810 "0x550(bcn ctrl)/0x522", u32tmp[0], u8tmp[0]);
3811 CL_PRINTF(cli_buf);
3812
3813 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xc50);
3814 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0xc50(dig)",
3815 u32tmp[0]);
3816 CL_PRINTF(cli_buf);
3817
3818 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x6c0);
3819 u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x6c4);
3820 u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x6c8);
3821 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x6cc);
3822 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3823 "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x",
3824 "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)",
3825 u32tmp[0], u32tmp[1], u32tmp[2], u8tmp[0]);
3826 CL_PRINTF(cli_buf);
3827
3828 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
3829 "0x770(hp rx[31:16]/tx[15:0])",
3830 coex_sta->high_priority_rx, coex_sta->high_priority_tx);
3831 CL_PRINTF(cli_buf);
3832 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
3833 "0x774(lp rx[31:16]/tx[15:0])",
3834 coex_sta->low_priority_rx, coex_sta->low_priority_tx);
3835 CL_PRINTF(cli_buf);
3836 #if (BT_AUTO_REPORT_ONLY_8192E_2ANT == 1)
3837 halbtc8192e2ant_monitor_bt_ctr(btcoexist);
3838 #endif
3839 btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_COEX_STATISTICS);
3840 }
3841
3842
3843 void ex_halbtc8192e2ant_ips_notify(struct btc_coexist *btcoexist, u8 type)
3844 {
3845 if (BTC_IPS_ENTER == type) {
3846 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3847 "[BTCoex], IPS ENTER notify\n");
3848 coex_sta->under_ips = true;
3849 halbtc8192e2ant_coex_alloff(btcoexist);
3850 } else if (BTC_IPS_LEAVE == type) {
3851 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3852 "[BTCoex], IPS LEAVE notify\n");
3853 coex_sta->under_ips = false;
3854 }
3855 }
3856
3857 void ex_halbtc8192e2ant_lps_notify(struct btc_coexist *btcoexist, u8 type)
3858 {
3859 if (BTC_LPS_ENABLE == type) {
3860 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3861 "[BTCoex], LPS ENABLE notify\n");
3862 coex_sta->under_lps = true;
3863 } else if (BTC_LPS_DISABLE == type) {
3864 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3865 "[BTCoex], LPS DISABLE notify\n");
3866 coex_sta->under_lps = false;
3867 }
3868 }
3869
3870 void ex_halbtc8192e2ant_scan_notify(struct btc_coexist *btcoexist, u8 type)
3871 {
3872 if (BTC_SCAN_START == type)
3873 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3874 "[BTCoex], SCAN START notify\n");
3875 else if (BTC_SCAN_FINISH == type)
3876 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3877 "[BTCoex], SCAN FINISH notify\n");
3878 }
3879
3880 void ex_halbtc8192e2ant_connect_notify(struct btc_coexist *btcoexist, u8 type)
3881 {
3882 if (BTC_ASSOCIATE_START == type)
3883 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3884 "[BTCoex], CONNECT START notify\n");
3885 else if (BTC_ASSOCIATE_FINISH == type)
3886 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3887 "[BTCoex], CONNECT FINISH notify\n");
3888 }
3889
3890 void ex_halbtc8192e2ant_media_status_notify(struct btc_coexist *btcoexist,
3891 u8 type)
3892 {
3893 u8 h2c_parameter[3] = {0};
3894 u32 wifi_bw;
3895 u8 wifi_center_chnl;
3896
3897 if (btcoexist->manual_control ||
3898 btcoexist->stop_coex_dm ||
3899 btcoexist->bt_info.bt_disabled)
3900 return;
3901
3902 if (BTC_MEDIA_CONNECT == type)
3903 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3904 "[BTCoex], MEDIA connect notify\n");
3905 else
3906 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3907 "[BTCoex], MEDIA disconnect notify\n");
3908
3909 /* only 2.4G we need to inform bt the chnl mask */
3910 btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL,
3911 &wifi_center_chnl);
3912 if ((BTC_MEDIA_CONNECT == type) &&
3913 (wifi_center_chnl <= 14)) {
3914 h2c_parameter[0] = 0x1;
3915 h2c_parameter[1] = wifi_center_chnl;
3916 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3917 if (BTC_WIFI_BW_HT40 == wifi_bw)
3918 h2c_parameter[2] = 0x30;
3919 else
3920 h2c_parameter[2] = 0x20;
3921 }
3922
3923 coex_dm->wifi_chnl_info[0] = h2c_parameter[0];
3924 coex_dm->wifi_chnl_info[1] = h2c_parameter[1];
3925 coex_dm->wifi_chnl_info[2] = h2c_parameter[2];
3926
3927 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
3928 "[BTCoex], FW write 0x66=0x%x\n",
3929 h2c_parameter[0] << 16 | h2c_parameter[1] << 8 |
3930 h2c_parameter[2]);
3931
3932 btcoexist->btc_fill_h2c(btcoexist, 0x66, 3, h2c_parameter);
3933 }
3934
3935 void ex_halbtc8192e2ant_special_packet_notify(struct btc_coexist *btcoexist,
3936 u8 type)
3937 {
3938 if (type == BTC_PACKET_DHCP)
3939 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3940 "[BTCoex], DHCP Packet notify\n");
3941 }
3942
3943 void ex_halbtc8192e2ant_bt_info_notify(struct btc_coexist *btcoexist,
3944 u8 *tmp_buf, u8 length)
3945 {
3946 u8 bt_info = 0;
3947 u8 i, rspSource = 0;
3948 bool bt_busy = false, limited_dig = false;
3949 bool wifi_connected = false;
3950
3951 coex_sta->c2h_bt_info_req_sent = false;
3952
3953 rspSource = tmp_buf[0] & 0xf;
3954 if (rspSource >= BT_INFO_SRC_8192E_2ANT_MAX)
3955 rspSource = BT_INFO_SRC_8192E_2ANT_WIFI_FW;
3956 coex_sta->bt_info_c2h_cnt[rspSource]++;
3957
3958 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3959 "[BTCoex], Bt info[%d], length=%d, hex data=[",
3960 rspSource, length);
3961 for (i = 0; i < length; i++) {
3962 coex_sta->bt_info_c2h[rspSource][i] = tmp_buf[i];
3963 if (i == 1)
3964 bt_info = tmp_buf[i];
3965 if (i == length-1)
3966 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3967 "0x%02x]\n", tmp_buf[i]);
3968 else
3969 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3970 "0x%02x, ", tmp_buf[i]);
3971 }
3972
3973 if (BT_INFO_SRC_8192E_2ANT_WIFI_FW != rspSource) {
3974 coex_sta->bt_retry_cnt = /* [3:0] */
3975 coex_sta->bt_info_c2h[rspSource][2] & 0xf;
3976
3977 coex_sta->bt_rssi =
3978 coex_sta->bt_info_c2h[rspSource][3] * 2 + 10;
3979
3980 coex_sta->bt_info_ext =
3981 coex_sta->bt_info_c2h[rspSource][4];
3982
3983 /* Here we need to resend some wifi info to BT
3984 * because bt is reset and loss of the info. */
3985 if ((coex_sta->bt_info_ext & BIT1)) {
3986 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3987 "bit1, send wifi BW&Chnl to BT!!\n");
3988 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
3989 &wifi_connected);
3990 if (wifi_connected)
3991 ex_halbtc8192e2ant_media_status_notify(
3992 btcoexist,
3993 BTC_MEDIA_CONNECT);
3994 else
3995 ex_halbtc8192e2ant_media_status_notify(
3996 btcoexist,
3997 BTC_MEDIA_DISCONNECT);
3998 }
3999
4000 if ((coex_sta->bt_info_ext & BIT3)) {
4001 if (!btcoexist->manual_control &&
4002 !btcoexist->stop_coex_dm) {
4003 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
4004 "bit3, BT NOT ignore Wlan active!\n");
4005 halbtc8192e2ant_IgnoreWlanAct(btcoexist,
4006 FORCE_EXEC,
4007 false);
4008 }
4009 } else {
4010 /* BT already NOT ignore Wlan active,
4011 * do nothing here. */
4012 }
4013
4014 #if (BT_AUTO_REPORT_ONLY_8192E_2ANT == 0)
4015 if ((coex_sta->bt_info_ext & BIT4)) {
4016 /* BT auto report already enabled, do nothing */
4017 } else {
4018 halbtc8192e2ant_bt_autoreport(btcoexist, FORCE_EXEC,
4019 true);
4020 }
4021 #endif
4022 }
4023
4024 /* check BIT2 first ==> check if bt is under inquiry or page scan */
4025 if (bt_info & BT_INFO_8192E_2ANT_B_INQ_PAGE)
4026 coex_sta->c2h_bt_inquiry_page = true;
4027 else
4028 coex_sta->c2h_bt_inquiry_page = false;
4029
4030 /* set link exist status */
4031 if (!(bt_info&BT_INFO_8192E_2ANT_B_CONNECTION)) {
4032 coex_sta->bt_link_exist = false;
4033 coex_sta->pan_exist = false;
4034 coex_sta->a2dp_exist = false;
4035 coex_sta->hid_exist = false;
4036 coex_sta->sco_exist = false;
4037 } else {/* connection exists */
4038 coex_sta->bt_link_exist = true;
4039 if (bt_info & BT_INFO_8192E_2ANT_B_FTP)
4040 coex_sta->pan_exist = true;
4041 else
4042 coex_sta->pan_exist = false;
4043 if (bt_info & BT_INFO_8192E_2ANT_B_A2DP)
4044 coex_sta->a2dp_exist = true;
4045 else
4046 coex_sta->a2dp_exist = false;
4047 if (bt_info & BT_INFO_8192E_2ANT_B_HID)
4048 coex_sta->hid_exist = true;
4049 else
4050 coex_sta->hid_exist = false;
4051 if (bt_info & BT_INFO_8192E_2ANT_B_SCO_ESCO)
4052 coex_sta->sco_exist = true;
4053 else
4054 coex_sta->sco_exist = false;
4055 }
4056
4057 halbtc8192e2ant_update_btlink_info(btcoexist);
4058
4059 if (!(bt_info&BT_INFO_8192E_2ANT_B_CONNECTION)) {
4060 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE;
4061 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
4062 "[BTCoex], BT Non-Connected idle!!!\n");
4063 } else if (bt_info == BT_INFO_8192E_2ANT_B_CONNECTION) {
4064 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE;
4065 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
4066 "[BTCoex], bt_infoNotify(), BT Connected-idle!!!\n");
4067 } else if ((bt_info&BT_INFO_8192E_2ANT_B_SCO_ESCO) ||
4068 (bt_info&BT_INFO_8192E_2ANT_B_SCO_BUSY)) {
4069 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_SCO_BUSY;
4070 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
4071 "[BTCoex], bt_infoNotify(), BT SCO busy!!!\n");
4072 } else if (bt_info&BT_INFO_8192E_2ANT_B_ACL_BUSY) {
4073 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_ACL_BUSY;
4074 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
4075 "[BTCoex], bt_infoNotify(), BT ACL busy!!!\n");
4076 } else {
4077 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_MAX;
4078 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
4079 "[BTCoex]bt_infoNotify(), BT Non-Defined state!!!\n");
4080 }
4081
4082 if ((BT_8192E_2ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) ||
4083 (BT_8192E_2ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) ||
4084 (BT_8192E_2ANT_BT_STATUS_ACL_SCO_BUSY == coex_dm->bt_status)) {
4085 bt_busy = true;
4086 limited_dig = true;
4087 } else {
4088 bt_busy = false;
4089 limited_dig = false;
4090 }
4091
4092 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bt_busy);
4093
4094 coex_dm->limited_dig = limited_dig;
4095 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_LIMITED_DIG, &limited_dig);
4096
4097 halbtc8192e2ant_run_coexist_mechanism(btcoexist);
4098 }
4099
4100 void ex_halbtc8192e2ant_stack_operation_notify(struct btc_coexist *btcoexist,
4101 u8 type)
4102 {
4103 if (BTC_STACK_OP_INQ_PAGE_PAIR_START == type)
4104 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
4105 "[BTCoex] StackOP Inquiry/page/pair start notify\n");
4106 else if (BTC_STACK_OP_INQ_PAGE_PAIR_FINISH == type)
4107 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
4108 "[BTCoex] StackOP Inquiry/page/pair finish notify\n");
4109 }
4110
4111 void ex_halbtc8192e2ant_halt_notify(struct btc_coexist *btcoexist)
4112 {
4113 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, "[BTCoex], Halt notify\n");
4114
4115 halbtc8192e2ant_IgnoreWlanAct(btcoexist, FORCE_EXEC, true);
4116 ex_halbtc8192e2ant_media_status_notify(btcoexist, BTC_MEDIA_DISCONNECT);
4117 }
4118
4119 void ex_halbtc8192e2ant_periodical(struct btc_coexist *btcoexist)
4120 {
4121 static u8 dis_ver_info_cnt = 0;
4122 u32 fw_ver = 0, bt_patch_ver = 0;
4123 struct btc_board_info *board_info = &btcoexist->board_info;
4124 struct btc_stack_info *stack_info = &btcoexist->stack_info;
4125
4126 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
4127 "=======================Periodical=======================\n");
4128 if (dis_ver_info_cnt <= 5) {
4129 dis_ver_info_cnt += 1;
4130 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT,
4131 "************************************************\n");
4132 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT,
4133 "Ant PG Num/ Ant Mech/ Ant Pos = %d/ %d/ %d\n",
4134 board_info->pg_ant_num, board_info->btdm_ant_num,
4135 board_info->btdm_ant_pos);
4136 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT,
4137 "BT stack/ hci ext ver = %s / %d\n",
4138 ((stack_info->profile_notified) ? "Yes" : "No"),
4139 stack_info->hci_version);
4140 btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER,
4141 &bt_patch_ver);
4142 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver);
4143 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT,
4144 "CoexVer/ FwVer/ PatchVer = %d_%x/ 0x%x/ 0x%x(%d)\n",
4145 glcoex_ver_date_8192e_2ant, glcoex_ver_8192e_2ant,
4146 fw_ver, bt_patch_ver, bt_patch_ver);
4147 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT,
4148 "************************************************\n");
4149 }
4150
4151 #if (BT_AUTO_REPORT_ONLY_8192E_2ANT == 0)
4152 halbtc8192e2ant_querybt_info(btcoexist);
4153 halbtc8192e2ant_monitor_bt_ctr(btcoexist);
4154 halbtc8192e2ant_monitor_bt_enable_disable(btcoexist);
4155 #else
4156 if (halbtc8192e2ant_iswifi_status_changed(btcoexist) ||
4157 coex_dm->auto_tdma_adjust)
4158 halbtc8192e2ant_run_coexist_mechanism(btcoexist);
4159 #endif
4160 }
4161
Linux kernel - Deliverables
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