projects / deliverable / linux.git / blob
? search:


7cdf2fadb2de71cf16ec3c3dbec7cab4e3ffed44
[deliverable/linux.git] / drivers / staging / slicoss / slicoss.c
1 /**************************************************************************
2 *
3 * Copyright 2000-2006 Alacritech, Inc. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above
12 * copyright notice, this list of conditions and the following
13 * disclaimer in the documentation and/or other materials provided
14 * with the distribution.
15 *
16 * Alternatively, this software may be distributed under the terms of the
17 * GNU General Public License ("GPL") version 2 as published by the Free
18 * Software Foundation.
19 *
20 * THIS SOFTWARE IS PROVIDED BY ALACRITECH, INC. ``AS IS'' AND ANY
21 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ALACRITECH, INC. OR
24 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
27 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
28 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
30 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 *
33 * The views and conclusions contained in the software and documentation
34 * are those of the authors and should not be interpreted as representing
35 * official policies, either expressed or implied, of Alacritech, Inc.
36 *
37 **************************************************************************/
38
39 /*
40 * FILENAME: slicoss.c
41 *
42 * The SLICOSS driver for Alacritech's IS-NIC products.
43 *
44 * This driver is supposed to support:
45 *
46 * Mojave cards (single port PCI Gigabit) both copper and fiber
47 * Oasis cards (single and dual port PCI-x Gigabit) copper and fiber
48 * Kalahari cards (dual and quad port PCI-e Gigabit) copper and fiber
49 *
50 * The driver was acutally tested on Oasis and Kalahari cards.
51 *
52 *
53 * NOTE: This is the standard, non-accelerated version of Alacritech's
54 * IS-NIC driver.
55 */
56
57
58 #define SLIC_DUMP_ENABLED 0
59 #define KLUDGE_FOR_4GB_BOUNDARY 1
60 #define DEBUG_MICROCODE 1
61 #define SLIC_PRODUCTION_BUILD 1
62 #define SLIC_FAILURE_RESET 1
63 #define DBG 1
64 #define SLIC_ASSERT_ENABLED 1
65 #define SLIC_GET_STATS_ENABLED 1
66 #define SLIC_GET_STATS_TIMER_ENABLED 0
67 #define SLIC_PING_TIMER_ENABLED 1
68 #define SLIC_POWER_MANAGEMENT_ENABLED 0
69 #define SLIC_INTERRUPT_PROCESS_LIMIT 1
70 #define LINUX_FREES_ADAPTER_RESOURCES 1
71 #define SLIC_OFFLOAD_IP_CHECKSUM 1
72 #define STATS_TIMER_INTERVAL 2
73 #define PING_TIMER_INTERVAL 1
74
75 #include <linux/kernel.h>
76 #include <linux/string.h>
77 #include <linux/errno.h>
78 #include <linux/ioport.h>
79 #include <linux/slab.h>
80 #include <linux/interrupt.h>
81 #include <linux/timer.h>
82 #include <linux/pci.h>
83 #include <linux/spinlock.h>
84 #include <linux/init.h>
85 #include <linux/bitops.h>
86 #include <linux/io.h>
87 #include <linux/netdevice.h>
88 #include <linux/etherdevice.h>
89 #include <linux/skbuff.h>
90 #include <linux/delay.h>
91 #include <linux/debugfs.h>
92 #include <linux/seq_file.h>
93 #include <linux/kthread.h>
94 #include <linux/module.h>
95 #include <linux/moduleparam.h>
96
97 #include <linux/firmware.h>
98 #include <linux/types.h>
99 #include <linux/dma-mapping.h>
100 #include <linux/mii.h>
101 #include <linux/if_vlan.h>
102 #include <asm/unaligned.h>
103
104 #include <linux/ethtool.h>
105 #define SLIC_ETHTOOL_SUPPORT 1
106
107 #include <linux/uaccess.h>
108 #include "slicinc.h"
109
110 #if SLIC_DUMP_ENABLED
111 #include "slicdump.h"
112 #endif
113
114 #define SLIC_POWER_MANAGEMENT 0
115
116 static uint slic_first_init = 1;
117 static char *slic_banner = "Alacritech SLIC Technology(tm) Server "\
118 "and Storage Accelerator (Non-Accelerated)\n";
119
120 static char *slic_proc_version = "2.0.351 2006/07/14 12:26:00";
121 static char *slic_product_name = "SLIC Technology(tm) Server "\
122 "and Storage Accelerator (Non-Accelerated)";
123 static char *slic_vendor = "Alacritech, Inc.";
124
125 static int slic_debug = 1;
126 static int debug = -1;
127 static struct net_device *head_netdevice;
128
129 static struct base_driver slic_global = { {}, 0, 0, 0, 1, NULL, NULL };
130 static int intagg_delay = 100;
131 static u32 dynamic_intagg;
132 static int errormsg;
133 static int goodmsg;
134 static unsigned int rcv_count;
135 static struct dentry *slic_debugfs;
136
137 #define DRV_NAME "slicoss"
138 #define DRV_VERSION "2.0.1"
139 #define DRV_AUTHOR "Alacritech, Inc. Engineering"
140 #define DRV_DESCRIPTION "Alacritech SLIC Techonology(tm) "\
141 "Non-Accelerated Driver"
142 #define DRV_COPYRIGHT "Copyright 2000-2006 Alacritech, Inc. "\
143 "All rights reserved."
144 #define PFX DRV_NAME " "
145
146 MODULE_AUTHOR(DRV_AUTHOR);
147 MODULE_DESCRIPTION(DRV_DESCRIPTION);
148 MODULE_LICENSE("Dual BSD/GPL");
149
150 module_param(dynamic_intagg, int, 0);
151 MODULE_PARM_DESC(dynamic_intagg, "Dynamic Interrupt Aggregation Setting");
152 module_param(intagg_delay, int, 0);
153 MODULE_PARM_DESC(intagg_delay, "uSec Interrupt Aggregation Delay");
154
155 static struct pci_device_id slic_pci_tbl[] __devinitdata = {
156 {PCI_VENDOR_ID_ALACRITECH,
157 SLIC_1GB_DEVICE_ID,
158 PCI_ANY_ID, PCI_ANY_ID,},
159 {PCI_VENDOR_ID_ALACRITECH,
160 SLIC_2GB_DEVICE_ID,
161 PCI_ANY_ID, PCI_ANY_ID,},
162 {0,}
163 };
164
165 MODULE_DEVICE_TABLE(pci, slic_pci_tbl);
166
167 #define SLIC_GET_SLIC_HANDLE(_adapter, _pslic_handle) \
168 { \
169 spin_lock_irqsave(&_adapter->handle_lock.lock, \
170 _adapter->handle_lock.flags); \
171 _pslic_handle = _adapter->pfree_slic_handles; \
172 if (_pslic_handle) { \
173 ASSERT(_pslic_handle->type == SLIC_HANDLE_FREE); \
174 _adapter->pfree_slic_handles = _pslic_handle->next; \
175 } \
176 spin_unlock_irqrestore(&_adapter->handle_lock.lock, \
177 _adapter->handle_lock.flags); \
178 }
179
180 #define SLIC_FREE_SLIC_HANDLE(_adapter, _pslic_handle) \
181 { \
182 _pslic_handle->type = SLIC_HANDLE_FREE; \
183 spin_lock_irqsave(&_adapter->handle_lock.lock, \
184 _adapter->handle_lock.flags); \
185 _pslic_handle->next = _adapter->pfree_slic_handles; \
186 _adapter->pfree_slic_handles = _pslic_handle; \
187 spin_unlock_irqrestore(&_adapter->handle_lock.lock, \
188 _adapter->handle_lock.flags); \
189 }
190
191 static void slic_debug_init(void);
192 static void slic_debug_cleanup(void);
193 static void slic_debug_adapter_create(struct adapter *adapter);
194 static void slic_debug_adapter_destroy(struct adapter *adapter);
195 static void slic_debug_card_create(struct sliccard *card);
196 static void slic_debug_card_destroy(struct sliccard *card);
197
198 static inline void slic_reg32_write(void __iomem *reg, u32 value, uint flush)
199 {
200 writel(value, reg);
201 if (flush)
202 mb();
203 }
204
205 static inline void slic_reg64_write(struct adapter *adapter,
206 void __iomem *reg,
207 u32 value,
208 void __iomem *regh, u32 paddrh, uint flush)
209 {
210 spin_lock_irqsave(&adapter->bit64reglock.lock,
211 adapter->bit64reglock.flags);
212 if (paddrh != adapter->curaddrupper) {
213 adapter->curaddrupper = paddrh;
214 writel(paddrh, regh);
215 }
216 writel(value, reg);
217 if (flush)
218 mb();
219 spin_unlock_irqrestore(&adapter->bit64reglock.lock,
220 adapter->bit64reglock.flags);
221 }
222
223 static void slic_init_driver(void)
224 {
225 if (slic_first_init) {
226 DBG_MSG("slicoss: %s slic_first_init set jiffies[%lx]\n",
227 __func__, jiffies);
228 slic_first_init = 0;
229 spin_lock_init(&slic_global.driver_lock.lock);
230 slic_debug_init();
231 }
232 }
233
234 static void slic_dbg_macaddrs(struct adapter *adapter)
235 {
236 DBG_MSG(" (%s) curr %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n",
237 adapter->netdev->name, adapter->currmacaddr[0],
238 adapter->currmacaddr[1], adapter->currmacaddr[2],
239 adapter->currmacaddr[3], adapter->currmacaddr[4],
240 adapter->currmacaddr[5]);
241 DBG_MSG(" (%s) mac %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n",
242 adapter->netdev->name, adapter->macaddr[0],
243 adapter->macaddr[1], adapter->macaddr[2],
244 adapter->macaddr[3], adapter->macaddr[4], adapter->macaddr[5]);
245 return;
246 }
247
248 #ifdef DEBUG_REGISTER_TRACE
249 static void slic_dbg_register_trace(struct adapter *adapter,
250 struct sliccard *card)
251 {
252 uint i;
253
254 DBG_ERROR("Dump Register Write Trace: curr_ix == %d\n", card->debug_ix);
255 for (i = 0; i < 32; i++) {
256 DBG_ERROR("%2d %d %4x %x %x\n",
257 i, card->reg_type[i], card->reg_offset[i],
258 card->reg_value[i], card->reg_valueh[i]);
259 }
260 }
261 #endif
262
263 static void slic_init_adapter(struct net_device *netdev,
264 struct pci_dev *pcidev,
265 const struct pci_device_id *pci_tbl_entry,
266 void __iomem *memaddr, int chip_idx)
267 {
268 ushort index;
269 struct slic_handle *pslic_handle;
270 struct adapter *adapter = (struct adapter *)netdev_priv(netdev);
271 /*
272 DBG_MSG("slicoss: %s (%s)\n netdev [%p]\n adapter[%p]\n "
273 "pcidev [%p]\n", __func__, netdev->name, netdev, adapter, pcidev);*/
274 /* adapter->pcidev = pcidev;*/
275 adapter->vendid = pci_tbl_entry->vendor;
276 adapter->devid = pci_tbl_entry->device;
277 adapter->subsysid = pci_tbl_entry->subdevice;
278 adapter->busnumber = pcidev->bus->number;
279 adapter->slotnumber = ((pcidev->devfn >> 3) & 0x1F);
280 adapter->functionnumber = (pcidev->devfn & 0x7);
281 adapter->memorylength = pci_resource_len(pcidev, 0);
282 adapter->slic_regs = (__iomem struct slic_regs *)memaddr;
283 adapter->irq = pcidev->irq;
284 /* adapter->netdev = netdev;*/
285 adapter->next_netdevice = head_netdevice;
286 head_netdevice = netdev;
287 adapter->chipid = chip_idx;
288 adapter->port = 0; /*adapter->functionnumber;*/
289 adapter->cardindex = adapter->port;
290 adapter->memorybase = memaddr;
291 spin_lock_init(&adapter->upr_lock.lock);
292 spin_lock_init(&adapter->bit64reglock.lock);
293 spin_lock_init(&adapter->adapter_lock.lock);
294 spin_lock_init(&adapter->reset_lock.lock);
295 spin_lock_init(&adapter->handle_lock.lock);
296
297 adapter->card_size = 1;
298 /*
299 Initialize slic_handle array
300 */
301 ASSERT(SLIC_CMDQ_MAXCMDS <= 0xFFFF);
302 /*
303 Start with 1. 0 is an invalid host handle.
304 */
305 for (index = 1, pslic_handle = &adapter->slic_handles[1];
306 index < SLIC_CMDQ_MAXCMDS; index++, pslic_handle++) {
307
308 pslic_handle->token.handle_index = index;
309 pslic_handle->type = SLIC_HANDLE_FREE;
310 pslic_handle->next = adapter->pfree_slic_handles;
311 adapter->pfree_slic_handles = pslic_handle;
312 }
313 /*
314 DBG_MSG(".........\nix[%d] phandle[%p] pfree[%p] next[%p]\n",
315 index, pslic_handle, adapter->pfree_slic_handles, pslic_handle->next);*/
316 adapter->pshmem = (struct slic_shmem *)
317 pci_alloc_consistent(adapter->pcidev,
318 sizeof(struct slic_shmem),
319 &adapter->
320 phys_shmem);
321 /*
322 DBG_MSG("slicoss: %s (%s)\n pshmem [%p]\n phys_shmem[%p]\n"\
323 "slic_regs [%p]\n", __func__, netdev->name, adapter->pshmem,
324 (void *)adapter->phys_shmem, adapter->slic_regs);
325 */
326 ASSERT(adapter->pshmem);
327
328 memset(adapter->pshmem, 0, sizeof(struct slic_shmem));
329
330 return;
331 }
332
333 static int __devinit slic_entry_probe(struct pci_dev *pcidev,
334 const struct pci_device_id *pci_tbl_entry)
335 {
336 static int cards_found;
337 static int did_version;
338 int err;
339 struct net_device *netdev;
340 struct adapter *adapter;
341 void __iomem *memmapped_ioaddr = NULL;
342 u32 status = 0;
343 ulong mmio_start = 0;
344 ulong mmio_len = 0;
345 struct sliccard *card = NULL;
346
347 DBG_MSG("slicoss: %s 2.6 VERSION ENTER jiffies[%lx] cpu %d\n",
348 __func__, jiffies, smp_processor_id());
349
350 slic_global.dynamic_intagg = dynamic_intagg;
351
352 err = pci_enable_device(pcidev);
353
354 DBG_MSG("Call pci_enable_device(%p) status[%x]\n", pcidev, err);
355 if (err)
356 return err;
357
358 if (slic_debug > 0 && did_version++ == 0) {
359 printk(slic_banner);
360 printk(slic_proc_version);
361 }
362
363 err = pci_set_dma_mask(pcidev, DMA_64BIT_MASK);
364 if (!err) {
365 DBG_MSG("pci_set_dma_mask(DMA_64BIT_MASK) successful\n");
366 } else {
367 err = pci_set_dma_mask(pcidev, DMA_32BIT_MASK);
368 if (err) {
369 DBG_MSG
370 ("No usable DMA configuration, aborting err[%x]\n",
371 err);
372 return err;
373 }
374 DBG_MSG("pci_set_dma_mask(DMA_32BIT_MASK) successful\n");
375 }
376
377 DBG_MSG("Call pci_request_regions\n");
378
379 err = pci_request_regions(pcidev, DRV_NAME);
380 if (err) {
381 DBG_MSG("pci_request_regions FAILED err[%x]\n", err);
382 return err;
383 }
384
385 DBG_MSG("call pci_set_master\n");
386 pci_set_master(pcidev);
387
388 DBG_MSG("call alloc_etherdev\n");
389 netdev = alloc_etherdev(sizeof(struct adapter));
390 if (!netdev) {
391 err = -ENOMEM;
392 goto err_out_exit_slic_probe;
393 }
394 DBG_MSG("alloc_etherdev for slic netdev[%p]\n", netdev);
395
396 SET_NETDEV_DEV(netdev, &pcidev->dev);
397
398 pci_set_drvdata(pcidev, netdev);
399 adapter = netdev_priv(netdev);
400 adapter->netdev = netdev;
401 adapter->pcidev = pcidev;
402
403 mmio_start = pci_resource_start(pcidev, 0);
404 mmio_len = pci_resource_len(pcidev, 0);
405
406 DBG_MSG("slicoss: call ioremap(mmio_start[%lx], mmio_len[%lx])\n",
407 mmio_start, mmio_len);
408
409 /* memmapped_ioaddr = (u32)ioremap_nocache(mmio_start, mmio_len);*/
410 memmapped_ioaddr = ioremap(mmio_start, mmio_len);
411 DBG_MSG("slicoss: %s MEMMAPPED_IOADDR [%p]\n", __func__,
412 memmapped_ioaddr);
413 if (!memmapped_ioaddr) {
414 DBG_ERROR("%s cannot remap MMIO region %lx @ %lx\n",
415 __func__, mmio_len, mmio_start);
416 goto err_out_free_mmio_region;
417 }
418
419 DBG_MSG
420 ("slicoss: %s found Alacritech SLICOSS PCI, MMIO at %p, "\
421 "start[%lx] len[%lx], IRQ %d.\n",
422 __func__, memmapped_ioaddr, mmio_start, mmio_len, pcidev->irq);
423
424 slic_config_pci(pcidev);
425
426 slic_init_driver();
427
428 slic_init_adapter(netdev,
429 pcidev, pci_tbl_entry, memmapped_ioaddr, cards_found);
430
431 status = slic_card_locate(adapter);
432 if (status) {
433 DBG_ERROR("%s cannot locate card\n", __func__);
434 goto err_out_free_mmio_region;
435 }
436
437 card = adapter->card;
438
439 if (!adapter->allocated) {
440 card->adapters_allocated++;
441 adapter->allocated = 1;
442 }
443
444 DBG_MSG("slicoss: %s card: %p\n", __func__,
445 adapter->card);
446 DBG_MSG("slicoss: %s card->adapter[%d] == [%p]\n", __func__,
447 (uint) adapter->port, adapter);
448 DBG_MSG("slicoss: %s card->adapters_allocated [%d]\n", __func__,
449 card->adapters_allocated);
450 DBG_MSG("slicoss: %s card->adapters_activated [%d]\n", __func__,
451 card->adapters_activated);
452
453 status = slic_card_init(card, adapter);
454
455 if (status != STATUS_SUCCESS) {
456 card->state = CARD_FAIL;
457 adapter->state = ADAPT_FAIL;
458 adapter->linkstate = LINK_DOWN;
459 DBG_ERROR("slic_card_init FAILED status[%x]\n", status);
460 } else {
461 slic_adapter_set_hwaddr(adapter);
462 }
463
464 netdev->base_addr = (unsigned long)adapter->memorybase;
465 netdev->irq = adapter->irq;
466 netdev->open = slic_entry_open;
467 netdev->stop = slic_entry_halt;
468 netdev->hard_start_xmit = slic_xmit_start;
469 netdev->do_ioctl = slic_ioctl;
470 netdev->set_mac_address = slic_mac_set_address;
471 #if SLIC_GET_STATS_ENABLED
472 netdev->get_stats = slic_get_stats;
473 #endif
474 netdev->set_multicast_list = slic_mcast_set_list;
475
476 slic_debug_adapter_create(adapter);
477
478 strcpy(netdev->name, "eth%d");
479 err = register_netdev(netdev);
480 if (err) {
481 DBG_ERROR("Cannot register net device, aborting.\n");
482 goto err_out_unmap;
483 }
484
485 DBG_MSG
486 ("slicoss: addr 0x%lx, irq %d, MAC addr "\
487 "%02X:%02X:%02X:%02X:%02X:%02X\n",
488 mmio_start, /*pci_resource_start(pcidev, 0), */ pcidev->irq,
489 netdev->dev_addr[0], netdev->dev_addr[1], netdev->dev_addr[2],
490 netdev->dev_addr[3], netdev->dev_addr[4], netdev->dev_addr[5]);
491
492 cards_found++;
493 DBG_MSG("slicoss: %s EXIT status[%x] jiffies[%lx] cpu %d\n",
494 __func__, status, jiffies, smp_processor_id());
495
496 return status;
497
498 err_out_unmap:
499 iounmap(memmapped_ioaddr);
500
501 err_out_free_mmio_region:
502 release_mem_region(mmio_start, mmio_len);
503
504 err_out_exit_slic_probe:
505 pci_release_regions(pcidev);
506 DBG_ERROR("%s EXIT jiffies[%lx] cpu %d\n", __func__, jiffies,
507 smp_processor_id());
508
509 return -ENODEV;
510 }
511
512 static int slic_entry_open(struct net_device *dev)
513 {
514 struct adapter *adapter = (struct adapter *) netdev_priv(dev);
515 struct sliccard *card = adapter->card;
516 u32 locked = 0;
517 int status;
518
519 ASSERT(adapter);
520 ASSERT(card);
521 DBG_MSG
522 ("slicoss: %s adapter->activated[%d] card->adapters[%x] "\
523 "allocd[%x]\n", __func__, adapter->activated,
524 card->adapters_activated,
525 card->adapters_allocated);
526 DBG_MSG
527 ("slicoss: %s (%s): [jiffies[%lx] cpu %d] dev[%p] adapt[%p] "\
528 "port[%d] card[%p]\n",
529 __func__, adapter->netdev->name, jiffies, smp_processor_id(),
530 adapter->netdev, adapter, adapter->port, card);
531
532 netif_stop_queue(adapter->netdev);
533
534 spin_lock_irqsave(&slic_global.driver_lock.lock,
535 slic_global.driver_lock.flags);
536 locked = 1;
537 if (!adapter->activated) {
538 card->adapters_activated++;
539 slic_global.num_slic_ports_active++;
540 adapter->activated = 1;
541 }
542 status = slic_if_init(adapter);
543
544 if (status != STATUS_SUCCESS) {
545 if (adapter->activated) {
546 card->adapters_activated--;
547 slic_global.num_slic_ports_active--;
548 adapter->activated = 0;
549 }
550 if (locked) {
551 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
552 slic_global.driver_lock.flags);
553 locked = 0;
554 }
555 return status;
556 }
557 DBG_MSG("slicoss: %s set card->master[%p] adapter[%p]\n", __func__,
558 card->master, adapter);
559 if (!card->master)
560 card->master = adapter;
561 #if SLIC_DUMP_ENABLED
562 if (!(card->dumpthread_running))
563 init_waitqueue_head(&card->dump_wq);
564 #endif
565
566 if (locked) {
567 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
568 slic_global.driver_lock.flags);
569 locked = 0;
570 }
571 #if SLIC_DUMP_ENABLED
572 if (!(card->dumpthread_running)) {
573 DBG_MSG("attempt to initialize dump thread\n");
574 status = slic_init_dump_thread(card);
575 /*
576 Even if the dump thread fails, we will continue at this point
577 */
578 }
579 #endif
580
581 return STATUS_SUCCESS;
582 }
583
584 static void __devexit slic_entry_remove(struct pci_dev *pcidev)
585 {
586 struct net_device *dev = pci_get_drvdata(pcidev);
587 u32 mmio_start = 0;
588 uint mmio_len = 0;
589 struct adapter *adapter = (struct adapter *) netdev_priv(dev);
590 struct sliccard *card;
591 struct mcast_address *mcaddr, *mlist;
592
593 ASSERT(adapter);
594 DBG_MSG("slicoss: %s ENTER dev[%p] adapter[%p]\n", __func__, dev,
595 adapter);
596 slic_adapter_freeresources(adapter);
597 slic_unmap_mmio_space(adapter);
598 DBG_MSG("slicoss: %s unregister_netdev\n", __func__);
599 unregister_netdev(dev);
600
601 mmio_start = pci_resource_start(pcidev, 0);
602 mmio_len = pci_resource_len(pcidev, 0);
603
604 DBG_MSG("slicoss: %s rel_region(0) start[%x] len[%x]\n", __func__,
605 mmio_start, mmio_len);
606 release_mem_region(mmio_start, mmio_len);
607
608 DBG_MSG("slicoss: %s iounmap dev->base_addr[%x]\n", __func__,
609 (uint) dev->base_addr);
610 iounmap((void __iomem *)dev->base_addr);
611 /* free multicast addresses */
612 mlist = adapter->mcastaddrs;
613 while (mlist) {
614 mcaddr = mlist;
615 mlist = mlist->next;
616 kfree(mcaddr);
617 }
618 ASSERT(adapter->card);
619 card = adapter->card;
620 ASSERT(card->adapters_allocated);
621 card->adapters_allocated--;
622 adapter->allocated = 0;
623 DBG_MSG
624 ("slicoss: %s init[%x] alloc[%x] card[%p] adapter[%p]\n",
625 __func__, card->adapters_activated, card->adapters_allocated,
626 card, adapter);
627 if (!card->adapters_allocated) {
628 struct sliccard *curr_card = slic_global.slic_card;
629 if (curr_card == card) {
630 slic_global.slic_card = card->next;
631 } else {
632 while (curr_card->next != card)
633 curr_card = curr_card->next;
634 ASSERT(curr_card);
635 curr_card->next = card->next;
636 }
637 ASSERT(slic_global.num_slic_cards);
638 slic_global.num_slic_cards--;
639 slic_card_cleanup(card);
640 }
641 DBG_MSG("slicoss: %s deallocate device\n", __func__);
642 kfree(dev);
643 pci_release_regions(pcidev);
644 DBG_MSG("slicoss: %s EXIT\n", __func__);
645 }
646
647 static int slic_entry_halt(struct net_device *dev)
648 {
649 struct adapter *adapter = (struct adapter *)netdev_priv(dev);
650 struct sliccard *card = adapter->card;
651 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
652
653 spin_lock_irqsave(&slic_global.driver_lock.lock,
654 slic_global.driver_lock.flags);
655 ASSERT(card);
656 DBG_MSG("slicoss: %s (%s) ENTER\n", __func__, dev->name);
657 DBG_MSG("slicoss: %s (%s) actvtd[%d] alloc[%d] state[%x] adapt[%p]\n",
658 __func__, dev->name, card->adapters_activated,
659 card->adapters_allocated, card->state, adapter);
660 slic_if_stop_queue(adapter);
661 adapter->state = ADAPT_DOWN;
662 adapter->linkstate = LINK_DOWN;
663 adapter->upr_list = NULL;
664 adapter->upr_busy = 0;
665 adapter->devflags_prev = 0;
666 DBG_MSG("slicoss: %s (%s) set adapter[%p] state to ADAPT_DOWN(%d)\n",
667 __func__, dev->name, adapter, adapter->state);
668 ASSERT(card->adapter[adapter->cardindex] == adapter);
669 WRITE_REG(slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
670 adapter->all_reg_writes++;
671 adapter->icr_reg_writes++;
672 slic_config_clear(adapter);
673 DBG_MSG("slicoss: %s (%s) dev[%p] adapt[%p] card[%p]\n",
674 __func__, dev->name, dev, adapter, card);
675 if (adapter->activated) {
676 card->adapters_activated--;
677 slic_global.num_slic_ports_active--;
678 adapter->activated = 0;
679 }
680 #ifdef AUTOMATIC_RESET
681 WRITE_REG(slic_regs->slic_reset_iface, 0, FLUSH);
682 #endif
683 /*
684 * Reset the adapter's rsp, cmd, and rcv queues
685 */
686 slic_cmdq_reset(adapter);
687 slic_rspqueue_reset(adapter);
688 slic_rcvqueue_reset(adapter);
689
690 #ifdef AUTOMATIC_RESET
691 if (!card->adapters_activated) {
692
693 #if SLIC_DUMP_ENABLED
694 if (card->dumpthread_running) {
695 uint status;
696 DBG_MSG("attempt to terminate dump thread pid[%x]\n",
697 card->dump_task_id);
698 status = kill_proc(card->dump_task_id->pid, SIGKILL, 1);
699
700 if (!status) {
701 int count = 10 * 100;
702 while (card->dumpthread_running && --count) {
703 current->state = TASK_INTERRUPTIBLE;
704 schedule_timeout(1);
705 }
706
707 if (!count) {
708 DBG_MSG
709 ("slicmon thread cleanup FAILED \
710 pid[%x]\n",
711 card->dump_task_id->pid);
712 }
713 }
714 }
715 #endif
716 DBG_MSG("slicoss: %s (%s) initiate CARD_HALT\n", __func__,
717 dev->name);
718
719 slic_card_init(card, adapter);
720 }
721 #endif
722
723 DBG_MSG("slicoss: %s (%s) EXIT\n", __func__, dev->name);
724 DBG_MSG("slicoss: %s EXIT\n", __func__);
725 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
726 slic_global.driver_lock.flags);
727 return STATUS_SUCCESS;
728 }
729
730 static int slic_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
731 {
732 ASSERT(rq);
733 /*
734 DBG_MSG("slicoss: %s cmd[%x] rq[%p] dev[%p]\n", __func__, cmd, rq, dev);
735 */
736 switch (cmd) {
737 case SIOCSLICSETINTAGG:
738 {
739 struct adapter *adapter = (struct adapter *)
740 netdev_priv(dev);
741 u32 data[7];
742 u32 intagg;
743
744 if (copy_from_user(data, rq->ifr_data, 28)) {
745 DBG_ERROR
746 ("copy_from_user FAILED getting initial \
747 params\n");
748 return -EFAULT;
749 }
750 intagg = data[0];
751 printk(KERN_EMERG
752 "%s: set interrupt aggregation to %d\n",
753 __func__, intagg);
754 slic_intagg_set(adapter, intagg);
755 return 0;
756 }
757 #ifdef SLIC_USER_REQUEST_DUMP_ENABLED
758 case SIOCSLICDUMPCARD:
759 {
760 struct adapter *adapter = netdev_priv(dev);
761 struct sliccard *card;
762
763 ASSERT(adapter);
764 ASSERT(adapter->card)
765 card = adapter->card;
766
767 DBG_IOCTL("slic_ioctl SIOCSLIC_DUMP_CARD\n");
768
769 if (card->dump_requested == SLIC_DUMP_DONE) {
770 printk(SLICLEVEL
771 "SLIC Card dump to be overwritten\n");
772 card->dump_requested = SLIC_DUMP_REQUESTED;
773 } else if ((card->dump_requested == SLIC_DUMP_REQUESTED)
774 || (card->dump_requested ==
775 SLIC_DUMP_IN_PROGRESS)) {
776 printk(SLICLEVEL
777 "SLIC Card dump Requested but already \
778 in progress... ignore\n");
779 } else {
780 printk(SLICLEVEL
781 "SLIC Card #%d Dump Requested\n",
782 card->cardnum);
783 card->dump_requested = SLIC_DUMP_REQUESTED;
784 }
785 return 0;
786 }
787 #endif
788
789 #ifdef SLIC_TRACE_DUMP_ENABLED
790 case SIOCSLICTRACEDUMP:
791 {
792 ulong data[7];
793 ulong value;
794
795 DBG_IOCTL("slic_ioctl SIOCSLIC_TRACE_DUMP\n");
796
797 if (copy_from_user(data, rq->ifr_data, 28)) {
798 PRINT_ERROR
799 ("slic: copy_from_user FAILED getting \
800 initial simba param\n");
801 return -EFAULT;
802 }
803
804 value = data[0];
805 if (tracemon_request == SLIC_DUMP_DONE) {
806 PRINT_ERROR
807 ("ATK Diagnostic Trace Dump Requested\n");
808 tracemon_request = SLIC_DUMP_REQUESTED;
809 tracemon_request_type = value;
810 tracemon_timestamp = jiffies;
811 } else if ((tracemon_request == SLIC_DUMP_REQUESTED) ||
812 (tracemon_request ==
813 SLIC_DUMP_IN_PROGRESS)) {
814 PRINT_ERROR
815 ("ATK Diagnostic Trace Dump Requested but \
816 already in progress... ignore\n");
817 } else {
818 PRINT_ERROR
819 ("ATK Diagnostic Trace Dump Requested\n");
820 tracemon_request = SLIC_DUMP_REQUESTED;
821 tracemon_request_type = value;
822 tracemon_timestamp = jiffies;
823 }
824 return 0;
825 }
826 #endif
827 #if SLIC_ETHTOOL_SUPPORT
828 case SIOCETHTOOL:
829 {
830 struct adapter *adapter = (struct adapter *)
831 netdev_priv(dev);
832 struct ethtool_cmd data;
833 struct ethtool_cmd ecmd;
834
835 ASSERT(adapter);
836 /* DBG_MSG("slicoss: %s SIOCETHTOOL\n", __func__); */
837 if (copy_from_user(&ecmd, rq->ifr_data, sizeof(ecmd)))
838 return -EFAULT;
839
840 if (ecmd.cmd == ETHTOOL_GSET) {
841 data.supported =
842 (SUPPORTED_10baseT_Half |
843 SUPPORTED_10baseT_Full |
844 SUPPORTED_100baseT_Half |
845 SUPPORTED_100baseT_Full |
846 SUPPORTED_Autoneg | SUPPORTED_MII);
847 data.port = PORT_MII;
848 data.transceiver = XCVR_INTERNAL;
849 data.phy_address = 0;
850 if (adapter->linkspeed == LINK_100MB)
851 data.speed = SPEED_100;
852 else if (adapter->linkspeed == LINK_10MB)
853 data.speed = SPEED_10;
854 else
855 data.speed = 0;
856
857 if (adapter->linkduplex == LINK_FULLD)
858 data.duplex = DUPLEX_FULL;
859 else
860 data.duplex = DUPLEX_HALF;
861
862 data.autoneg = AUTONEG_ENABLE;
863 data.maxtxpkt = 1;
864 data.maxrxpkt = 1;
865 if (copy_to_user
866 (rq->ifr_data, &data, sizeof(data)))
867 return -EFAULT;
868
869 } else if (ecmd.cmd == ETHTOOL_SSET) {
870 if (!capable(CAP_NET_ADMIN))
871 return -EPERM;
872
873 if (adapter->linkspeed == LINK_100MB)
874 data.speed = SPEED_100;
875 else if (adapter->linkspeed == LINK_10MB)
876 data.speed = SPEED_10;
877 else
878 data.speed = 0;
879
880 if (adapter->linkduplex == LINK_FULLD)
881 data.duplex = DUPLEX_FULL;
882 else
883 data.duplex = DUPLEX_HALF;
884
885 data.autoneg = AUTONEG_ENABLE;
886 data.maxtxpkt = 1;
887 data.maxrxpkt = 1;
888 if ((ecmd.speed != data.speed) ||
889 (ecmd.duplex != data.duplex)) {
890 u32 speed;
891 u32 duplex;
892
893 if (ecmd.speed == SPEED_10) {
894 speed = 0;
895 SLIC_DISPLAY
896 ("%s: slic ETHTOOL set \
897 link speed==10MB",
898 dev->name);
899 } else {
900 speed = PCR_SPEED_100;
901 SLIC_DISPLAY
902 ("%s: slic ETHTOOL set \
903 link speed==100MB",
904 dev->name);
905 }
906 if (ecmd.duplex == DUPLEX_FULL) {
907 duplex = PCR_DUPLEX_FULL;
908 SLIC_DISPLAY
909 (": duplex==FULL\n");
910 } else {
911 duplex = 0;
912 SLIC_DISPLAY
913 (": duplex==HALF\n");
914 }
915 slic_link_config(adapter,
916 speed, duplex);
917 slic_link_event_handler(adapter);
918 }
919 }
920 return 0;
921 }
922 #endif
923 default:
924 /* DBG_MSG("slicoss: %s UNSUPPORTED[%x]\n", __func__, cmd); */
925 return -EOPNOTSUPP;
926 }
927 }
928
929 #define XMIT_FAIL_LINK_STATE 1
930 #define XMIT_FAIL_ZERO_LENGTH 2
931 #define XMIT_FAIL_HOSTCMD_FAIL 3
932
933 static void slic_xmit_build_request(struct adapter *adapter,
934 struct slic_hostcmd *hcmd, struct sk_buff *skb)
935 {
936 struct slic_host64_cmd *ihcmd;
937 ulong phys_addr;
938
939 ihcmd = &hcmd->cmd64;
940
941 ihcmd->flags = (adapter->port << IHFLG_IFSHFT);
942 ihcmd->command = IHCMD_XMT_REQ;
943 ihcmd->u.slic_buffers.totlen = skb->len;
944 phys_addr = pci_map_single(adapter->pcidev, skb->data, skb->len,
945 PCI_DMA_TODEVICE);
946 ihcmd->u.slic_buffers.bufs[0].paddrl = SLIC_GET_ADDR_LOW(phys_addr);
947 ihcmd->u.slic_buffers.bufs[0].paddrh = SLIC_GET_ADDR_HIGH(phys_addr);
948 ihcmd->u.slic_buffers.bufs[0].length = skb->len;
949 #if defined(CONFIG_X86_64)
950 hcmd->cmdsize = (u32) ((((u64)&ihcmd->u.slic_buffers.bufs[1] -
951 (u64) hcmd) + 31) >> 5);
952 #elif defined(CONFIG_X86)
953 hcmd->cmdsize = ((((u32) &ihcmd->u.slic_buffers.bufs[1] -
954 (u32) hcmd) + 31) >> 5);
955 #else
956 Stop Compilation;
957 #endif
958 }
959
960 #define NORMAL_ETHFRAME 0
961
962 static int slic_xmit_start(struct sk_buff *skb, struct net_device *dev)
963 {
964 struct sliccard *card;
965 struct adapter *adapter = (struct adapter *)netdev_priv(dev);
966 struct slic_hostcmd *hcmd = NULL;
967 u32 status = 0;
968 u32 skbtype = NORMAL_ETHFRAME;
969 void *offloadcmd = NULL;
970
971 card = adapter->card;
972 ASSERT(card);
973 /*
974 DBG_ERROR("xmit_start (%s) ENTER skb[%p] len[%d] linkstate[%x] state[%x]\n",
975 adapter->netdev->name, skb, skb->len, adapter->linkstate,
976 adapter->state);
977 */
978 if ((adapter->linkstate != LINK_UP) ||
979 (adapter->state != ADAPT_UP) || (card->state != CARD_UP)) {
980 status = XMIT_FAIL_LINK_STATE;
981 goto xmit_fail;
982
983 } else if (skb->len == 0) {
984 status = XMIT_FAIL_ZERO_LENGTH;
985 goto xmit_fail;
986 }
987
988 if (skbtype == NORMAL_ETHFRAME) {
989 hcmd = slic_cmdq_getfree(adapter);
990 if (!hcmd) {
991 adapter->xmitq_full = 1;
992 status = XMIT_FAIL_HOSTCMD_FAIL;
993 goto xmit_fail;
994 }
995 ASSERT(hcmd->pslic_handle);
996 ASSERT(hcmd->cmd64.hosthandle ==
997 hcmd->pslic_handle->token.handle_token);
998 hcmd->skb = skb;
999 hcmd->busy = 1;
1000 hcmd->type = SLIC_CMD_DUMB;
1001 if (skbtype == NORMAL_ETHFRAME)
1002 slic_xmit_build_request(adapter, hcmd, skb);
1003 }
1004 adapter->stats.tx_packets++;
1005 adapter->stats.tx_bytes += skb->len;
1006
1007 #ifdef DEBUG_DUMP
1008 if (adapter->kill_card) {
1009 struct slic_host64_cmd ihcmd;
1010
1011 ihcmd = &hcmd->cmd64;
1012
1013 ihcmd->flags |= 0x40;
1014 adapter->kill_card = 0; /* only do this once */
1015 }
1016 #endif
1017 if (hcmd->paddrh == 0) {
1018 WRITE_REG(adapter->slic_regs->slic_cbar,
1019 (hcmd->paddrl | hcmd->cmdsize), DONT_FLUSH);
1020 } else {
1021 WRITE_REG64(adapter,
1022 adapter->slic_regs->slic_cbar64,
1023 (hcmd->paddrl | hcmd->cmdsize),
1024 adapter->slic_regs->slic_addr_upper,
1025 hcmd->paddrh, DONT_FLUSH);
1026 }
1027 xmit_done:
1028 return 0;
1029 xmit_fail:
1030 slic_xmit_fail(adapter, skb, offloadcmd, skbtype, status);
1031 goto xmit_done;
1032 }
1033
1034 static void slic_xmit_fail(struct adapter *adapter,
1035 struct sk_buff *skb,
1036 void *cmd, u32 skbtype, u32 status)
1037 {
1038 if (adapter->xmitq_full)
1039 slic_if_stop_queue(adapter);
1040 if ((cmd == NULL) && (status <= XMIT_FAIL_HOSTCMD_FAIL)) {
1041 switch (status) {
1042 case XMIT_FAIL_LINK_STATE:
1043 DBG_ERROR
1044 ("(%s) reject xmit skb[%p: %x] linkstate[%s] \
1045 adapter[%s:%d] card[%s:%d]\n",
1046 adapter->netdev->name, skb, skb->pkt_type,
1047 SLIC_LINKSTATE(adapter->linkstate),
1048 SLIC_ADAPTER_STATE(adapter->state), adapter->state,
1049 SLIC_CARD_STATE(adapter->card->state),
1050 adapter->card->state);
1051 break;
1052 case XMIT_FAIL_ZERO_LENGTH:
1053 DBG_ERROR
1054 ("xmit_start skb->len == 0 skb[%p] type[%x]!!!! \n",
1055 skb, skb->pkt_type);
1056 break;
1057 case XMIT_FAIL_HOSTCMD_FAIL:
1058 DBG_ERROR
1059 ("xmit_start skb[%p] type[%x] No host commands \
1060 available !!!! \n",
1061 skb, skb->pkt_type);
1062 break;
1063 default:
1064 ASSERT(0);
1065 }
1066 }
1067 dev_kfree_skb(skb);
1068 adapter->stats.tx_dropped++;
1069 }
1070
1071 static void slic_rcv_handle_error(struct adapter *adapter,
1072 struct slic_rcvbuf *rcvbuf)
1073 {
1074 struct slic_hddr_wds *hdr = (struct slic_hddr_wds *)rcvbuf->data;
1075
1076 if (adapter->devid != SLIC_1GB_DEVICE_ID) {
1077 if (hdr->frame_status14 & VRHSTAT_802OE)
1078 adapter->if_events.oflow802++;
1079 if (hdr->frame_status14 & VRHSTAT_TPOFLO)
1080 adapter->if_events.Tprtoflow++;
1081 if (hdr->frame_status_b14 & VRHSTATB_802UE)
1082 adapter->if_events.uflow802++;
1083 if (hdr->frame_status_b14 & VRHSTATB_RCVE) {
1084 adapter->if_events.rcvearly++;
1085 adapter->stats.rx_fifo_errors++;
1086 }
1087 if (hdr->frame_status_b14 & VRHSTATB_BUFF) {
1088 adapter->if_events.Bufov++;
1089 adapter->stats.rx_over_errors++;
1090 }
1091 if (hdr->frame_status_b14 & VRHSTATB_CARRE) {
1092 adapter->if_events.Carre++;
1093 adapter->stats.tx_carrier_errors++;
1094 }
1095 if (hdr->frame_status_b14 & VRHSTATB_LONGE)
1096 adapter->if_events.Longe++;
1097 if (hdr->frame_status_b14 & VRHSTATB_PREA)
1098 adapter->if_events.Invp++;
1099 if (hdr->frame_status_b14 & VRHSTATB_CRC) {
1100 adapter->if_events.Crc++;
1101 adapter->stats.rx_crc_errors++;
1102 }
1103 if (hdr->frame_status_b14 & VRHSTATB_DRBL)
1104 adapter->if_events.Drbl++;
1105 if (hdr->frame_status_b14 & VRHSTATB_CODE)
1106 adapter->if_events.Code++;
1107 if (hdr->frame_status_b14 & VRHSTATB_TPCSUM)
1108 adapter->if_events.TpCsum++;
1109 if (hdr->frame_status_b14 & VRHSTATB_TPHLEN)
1110 adapter->if_events.TpHlen++;
1111 if (hdr->frame_status_b14 & VRHSTATB_IPCSUM)
1112 adapter->if_events.IpCsum++;
1113 if (hdr->frame_status_b14 & VRHSTATB_IPLERR)
1114 adapter->if_events.IpLen++;
1115 if (hdr->frame_status_b14 & VRHSTATB_IPHERR)
1116 adapter->if_events.IpHlen++;
1117 } else {
1118 if (hdr->frame_statusGB & VGBSTAT_XPERR) {
1119 u32 xerr = hdr->frame_statusGB >> VGBSTAT_XERRSHFT;
1120
1121 if (xerr == VGBSTAT_XCSERR)
1122 adapter->if_events.TpCsum++;
1123 if (xerr == VGBSTAT_XUFLOW)
1124 adapter->if_events.Tprtoflow++;
1125 if (xerr == VGBSTAT_XHLEN)
1126 adapter->if_events.TpHlen++;
1127 }
1128 if (hdr->frame_statusGB & VGBSTAT_NETERR) {
1129 u32 nerr =
1130 (hdr->
1131 frame_statusGB >> VGBSTAT_NERRSHFT) &
1132 VGBSTAT_NERRMSK;
1133 if (nerr == VGBSTAT_NCSERR)
1134 adapter->if_events.IpCsum++;
1135 if (nerr == VGBSTAT_NUFLOW)
1136 adapter->if_events.IpLen++;
1137 if (nerr == VGBSTAT_NHLEN)
1138 adapter->if_events.IpHlen++;
1139 }
1140 if (hdr->frame_statusGB & VGBSTAT_LNKERR) {
1141 u32 lerr = hdr->frame_statusGB & VGBSTAT_LERRMSK;
1142
1143 if (lerr == VGBSTAT_LDEARLY)
1144 adapter->if_events.rcvearly++;
1145 if (lerr == VGBSTAT_LBOFLO)
1146 adapter->if_events.Bufov++;
1147 if (lerr == VGBSTAT_LCODERR)
1148 adapter->if_events.Code++;
1149 if (lerr == VGBSTAT_LDBLNBL)
1150 adapter->if_events.Drbl++;
1151 if (lerr == VGBSTAT_LCRCERR)
1152 adapter->if_events.Crc++;
1153 if (lerr == VGBSTAT_LOFLO)
1154 adapter->if_events.oflow802++;
1155 if (lerr == VGBSTAT_LUFLO)
1156 adapter->if_events.uflow802++;
1157 }
1158 }
1159 return;
1160 }
1161
1162 #define TCP_OFFLOAD_FRAME_PUSHFLAG 0x10000000
1163 #define M_FAST_PATH 0x0040
1164
1165 static void slic_rcv_handler(struct adapter *adapter)
1166 {
1167 struct sk_buff *skb;
1168 struct slic_rcvbuf *rcvbuf;
1169 u32 frames = 0;
1170
1171 while ((skb = slic_rcvqueue_getnext(adapter))) {
1172 u32 rx_bytes;
1173
1174 ASSERT(skb->head);
1175 rcvbuf = (struct slic_rcvbuf *)skb->head;
1176 adapter->card->events++;
1177 if (rcvbuf->status & IRHDDR_ERR) {
1178 adapter->rx_errors++;
1179 slic_rcv_handle_error(adapter, rcvbuf);
1180 slic_rcvqueue_reinsert(adapter, skb);
1181 continue;
1182 }
1183
1184 if (!slic_mac_filter(adapter, (struct ether_header *)
1185 rcvbuf->data)) {
1186 #if 0
1187 DBG_MSG
1188 ("slicoss: %s (%s) drop frame due to mac filter\n",
1189 __func__, adapter->netdev->name);
1190 #endif
1191 slic_rcvqueue_reinsert(adapter, skb);
1192 continue;
1193 }
1194 skb_pull(skb, SLIC_RCVBUF_HEADSIZE);
1195 rx_bytes = (rcvbuf->length & IRHDDR_FLEN_MSK);
1196 skb_put(skb, rx_bytes);
1197 adapter->stats.rx_packets++;
1198 adapter->stats.rx_bytes += rx_bytes;
1199 #if SLIC_OFFLOAD_IP_CHECKSUM
1200 skb->ip_summed = CHECKSUM_UNNECESSARY;
1201 #endif
1202
1203 skb->dev = adapter->netdev;
1204 skb->protocol = eth_type_trans(skb, skb->dev);
1205 netif_rx(skb);
1206
1207 ++frames;
1208 #if SLIC_INTERRUPT_PROCESS_LIMIT
1209 if (frames >= SLIC_RCVQ_MAX_PROCESS_ISR) {
1210 adapter->rcv_interrupt_yields++;
1211 break;
1212 }
1213 #endif
1214 }
1215 adapter->max_isr_rcvs = max(adapter->max_isr_rcvs, frames);
1216 }
1217
1218 static void slic_xmit_complete(struct adapter *adapter)
1219 {
1220 struct slic_hostcmd *hcmd;
1221 struct slic_rspbuf *rspbuf;
1222 u32 frames = 0;
1223 struct slic_handle_word slic_handle_word;
1224
1225 do {
1226 rspbuf = slic_rspqueue_getnext(adapter);
1227 if (!rspbuf)
1228 break;
1229 adapter->xmit_completes++;
1230 adapter->card->events++;
1231 /*
1232 Get the complete host command buffer
1233 */
1234 slic_handle_word.handle_token = rspbuf->hosthandle;
1235 ASSERT(slic_handle_word.handle_index);
1236 ASSERT(slic_handle_word.handle_index <= SLIC_CMDQ_MAXCMDS);
1237 hcmd =
1238 (struct slic_hostcmd *)
1239 adapter->slic_handles[slic_handle_word.handle_index].
1240 address;
1241 /* hcmd = (struct slic_hostcmd *) rspbuf->hosthandle; */
1242 ASSERT(hcmd);
1243 ASSERT(hcmd->pslic_handle ==
1244 &adapter->slic_handles[slic_handle_word.handle_index]);
1245 /*
1246 DBG_ERROR("xmit_complete (%s) hcmd[%p] hosthandle[%x]\n",
1247 adapter->netdev->name, hcmd, hcmd->cmd64.hosthandle);
1248 DBG_ERROR(" skb[%p] len %d hcmdtype[%x]\n", hcmd->skb,
1249 hcmd->skb->len, hcmd->type);
1250 */
1251 if (hcmd->type == SLIC_CMD_DUMB) {
1252 if (hcmd->skb)
1253 dev_kfree_skb_irq(hcmd->skb);
1254 slic_cmdq_putdone_irq(adapter, hcmd);
1255 }
1256 rspbuf->status = 0;
1257 rspbuf->hosthandle = 0;
1258 frames++;
1259 } while (1);
1260 adapter->max_isr_xmits = max(adapter->max_isr_xmits, frames);
1261 }
1262
1263 static irqreturn_t slic_interrupt(int irq, void *dev_id)
1264 {
1265 struct net_device *dev = (struct net_device *)dev_id;
1266 struct adapter *adapter = (struct adapter *)netdev_priv(dev);
1267 u32 isr;
1268
1269 if ((adapter->pshmem) && (adapter->pshmem->isr)) {
1270 WRITE_REG(adapter->slic_regs->slic_icr, ICR_INT_MASK, FLUSH);
1271 isr = adapter->isrcopy = adapter->pshmem->isr;
1272 adapter->pshmem->isr = 0;
1273 adapter->num_isrs++;
1274 switch (adapter->card->state) {
1275 case CARD_UP:
1276 if (isr & ~ISR_IO) {
1277 if (isr & ISR_ERR) {
1278 adapter->error_interrupts++;
1279 if (isr & ISR_RMISS) {
1280 int count;
1281 int pre_count;
1282 int errors;
1283
1284 struct slic_rcvqueue *rcvq =
1285 &adapter->rcvqueue;
1286
1287 adapter->
1288 error_rmiss_interrupts++;
1289 if (!rcvq->errors)
1290 rcv_count = rcvq->count;
1291 pre_count = rcvq->count;
1292 errors = rcvq->errors;
1293
1294 while (rcvq->count <
1295 SLIC_RCVQ_FILLTHRESH) {
1296 count =
1297 slic_rcvqueue_fill
1298 (adapter);
1299 if (!count)
1300 break;
1301 }
1302 DBG_MSG
1303 ("(%s): [%x] ISR_RMISS \
1304 initial[%x] pre[%x] \
1305 errors[%x] \
1306 post_count[%x]\n",
1307 adapter->netdev->name,
1308 isr, rcv_count, pre_count,
1309 errors, rcvq->count);
1310 } else if (isr & ISR_XDROP) {
1311 DBG_ERROR
1312 ("isr & ISR_ERR [%x] \
1313 ISR_XDROP \n",
1314 isr);
1315 } else {
1316 DBG_ERROR
1317 ("isr & ISR_ERR [%x]\n",
1318 isr);
1319 }
1320 }
1321
1322 if (isr & ISR_LEVENT) {
1323 /*DBG_MSG("%s (%s) ISR_LEVENT \n",
1324 __func__, adapter->netdev->name);*/
1325 adapter->linkevent_interrupts++;
1326 slic_link_event_handler(adapter);
1327 }
1328
1329 if ((isr & ISR_UPC) ||
1330 (isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) {
1331 adapter->upr_interrupts++;
1332 slic_upr_request_complete(adapter, isr);
1333 }
1334 }
1335
1336 if (isr & ISR_RCV) {
1337 adapter->rcv_interrupts++;
1338 slic_rcv_handler(adapter);
1339 }
1340
1341 if (isr & ISR_CMD) {
1342 adapter->xmit_interrupts++;
1343 slic_xmit_complete(adapter);
1344 }
1345 break;
1346
1347 case CARD_DOWN:
1348 if ((isr & ISR_UPC) ||
1349 (isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) {
1350 adapter->upr_interrupts++;
1351 slic_upr_request_complete(adapter, isr);
1352 }
1353 break;
1354
1355 default:
1356 break;
1357 }
1358
1359 adapter->isrcopy = 0;
1360 adapter->all_reg_writes += 2;
1361 adapter->isr_reg_writes++;
1362 WRITE_REG(adapter->slic_regs->slic_isr, 0, FLUSH);
1363 } else {
1364 adapter->false_interrupts++;
1365 }
1366 return IRQ_HANDLED;
1367 }
1368
1369 /*
1370 * slic_link_event_handler -
1371 *
1372 * Initiate a link configuration sequence. The link configuration begins
1373 * by issuing a READ_LINK_STATUS command to the Utility Processor on the
1374 * SLIC. Since the command finishes asynchronously, the slic_upr_comlete
1375 * routine will follow it up witha UP configuration write command, which
1376 * will also complete asynchronously.
1377 *
1378 */
1379 static void slic_link_event_handler(struct adapter *adapter)
1380 {
1381 int status;
1382 struct slic_shmem *pshmem;
1383
1384 if (adapter->state != ADAPT_UP) {
1385 /* Adapter is not operational. Ignore. */
1386 return;
1387 }
1388
1389 pshmem = (struct slic_shmem *)adapter->phys_shmem;
1390
1391 #if defined(CONFIG_X86_64)
1392 /*
1393 DBG_MSG("slic_event_handler pshmem->linkstatus[%x] pshmem[%p]\n \
1394 &linkstatus[%p] &isr[%p]\n", adapter->pshmem->linkstatus, pshmem,
1395 &pshmem->linkstatus, &pshmem->isr);
1396 */
1397 status = slic_upr_request(adapter,
1398 SLIC_UPR_RLSR,
1399 SLIC_GET_ADDR_LOW(&pshmem->linkstatus),
1400 SLIC_GET_ADDR_HIGH(&pshmem->linkstatus),
1401 0, 0);
1402 #elif defined(CONFIG_X86)
1403 status = slic_upr_request(adapter, SLIC_UPR_RLSR,
1404 (u32) &pshmem->linkstatus, /* no 4GB wrap guaranteed */
1405 0, 0, 0);
1406 #else
1407 Stop compilation;
1408 #endif
1409 ASSERT((status == STATUS_SUCCESS) || (status == STATUS_PENDING));
1410 }
1411
1412 static void slic_init_cleanup(struct adapter *adapter)
1413 {
1414 DBG_MSG("slicoss: %s ENTER adapter[%p] ", __func__, adapter);
1415 if (adapter->intrregistered) {
1416 DBG_MSG("FREE_IRQ ");
1417 adapter->intrregistered = 0;
1418 free_irq(adapter->netdev->irq, adapter->netdev);
1419
1420 }
1421 if (adapter->pshmem) {
1422 DBG_MSG("FREE_SHMEM ");
1423 DBG_MSG("adapter[%p] port %d pshmem[%p] FreeShmem ",
1424 adapter, adapter->port, (void *) adapter->pshmem);
1425 pci_free_consistent(adapter->pcidev,
1426 sizeof(struct slic_shmem),
1427 adapter->pshmem, adapter->phys_shmem);
1428 adapter->pshmem = NULL;
1429 adapter->phys_shmem = (dma_addr_t) NULL;
1430 }
1431 #if SLIC_GET_STATS_TIMER_ENABLED
1432 if (adapter->statstimerset) {
1433 DBG_MSG("statstimer ");
1434 adapter->statstimerset = 0;
1435 del_timer(&adapter->statstimer);
1436 }
1437 #endif
1438 #if !SLIC_DUMP_ENABLED && SLIC_PING_TIMER_ENABLED
1439 /*#if SLIC_DUMP_ENABLED && SLIC_PING_TIMER_ENABLED*/
1440 if (adapter->pingtimerset) {
1441 DBG_MSG("pingtimer ");
1442 adapter->pingtimerset = 0;
1443 del_timer(&adapter->pingtimer);
1444 }
1445 #endif
1446 slic_rspqueue_free(adapter);
1447 slic_cmdq_free(adapter);
1448 slic_rcvqueue_free(adapter);
1449
1450 DBG_MSG("\n");
1451 }
1452
1453 #if SLIC_GET_STATS_ENABLED
1454 static struct net_device_stats *slic_get_stats(struct net_device *dev)
1455 {
1456 struct adapter *adapter = (struct adapter *)netdev_priv(dev);
1457 struct net_device_stats *stats;
1458
1459 ASSERT(adapter);
1460 stats = &adapter->stats;
1461 stats->collisions = adapter->slic_stats.iface.xmit_collisions;
1462 stats->rx_errors = adapter->slic_stats.iface.rcv_errors;
1463 stats->tx_errors = adapter->slic_stats.iface.xmt_errors;
1464 stats->rx_missed_errors = adapter->slic_stats.iface.rcv_discards;
1465 stats->tx_heartbeat_errors = 0;
1466 stats->tx_aborted_errors = 0;
1467 stats->tx_window_errors = 0;
1468 stats->tx_fifo_errors = 0;
1469 stats->rx_frame_errors = 0;
1470 stats->rx_length_errors = 0;
1471 return &adapter->stats;
1472 }
1473 #endif
1474
1475 /*
1476 * Allocate a mcast_address structure to hold the multicast address.
1477 * Link it in.
1478 */
1479 static int slic_mcast_add_list(struct adapter *adapter, char *address)
1480 {
1481 struct mcast_address *mcaddr, *mlist;
1482 bool equaladdr;
1483
1484 /* Check to see if it already exists */
1485 mlist = adapter->mcastaddrs;
1486 while (mlist) {
1487 ETHER_EQ_ADDR(mlist->address, address, equaladdr);
1488 if (equaladdr)
1489 return STATUS_SUCCESS;
1490 mlist = mlist->next;
1491 }
1492
1493 /* Doesn't already exist. Allocate a structure to hold it */
1494 mcaddr = kmalloc(sizeof(struct mcast_address), GFP_ATOMIC);
1495 if (mcaddr == NULL)
1496 return 1;
1497
1498 memcpy(mcaddr->address, address, 6);
1499
1500 mcaddr->next = adapter->mcastaddrs;
1501 adapter->mcastaddrs = mcaddr;
1502
1503 return STATUS_SUCCESS;
1504 }
1505
1506 /*
1507 * Functions to obtain the CRC corresponding to the destination mac address.
1508 * This is a standard ethernet CRC in that it is a 32-bit, reflected CRC using
1509 * the polynomial:
1510 * x^32 + x^26 + x^23 + x^22 + x^16 + x^12 + x^11 + x^10 + x^8 + x^7 + x^5 +
1511 * x^4 + x^2 + x^1.
1512 *
1513 * After the CRC for the 6 bytes is generated (but before the value is
1514 * complemented),
1515 * we must then transpose the value and return bits 30-23.
1516 *
1517 */
1518 static u32 slic_crc_table[256]; /* Table of CRCs for all possible byte values */
1519 static u32 slic_crc_init; /* Is table initialized */
1520
1521 /*
1522 * Contruct the CRC32 table
1523 */
1524 static void slic_mcast_init_crc32(void)
1525 {
1526 u32 c; /* CRC shit reg */
1527 u32 e = 0; /* Poly X-or pattern */
1528 int i; /* counter */
1529 int k; /* byte being shifted into crc */
1530
1531 static int p[] = { 0, 1, 2, 4, 5, 7, 8, 10, 11, 12, 16, 22, 23, 26 };
1532
1533 for (i = 0; i < sizeof(p) / sizeof(int); i++)
1534 e |= 1L << (31 - p[i]);
1535
1536 for (i = 1; i < 256; i++) {
1537 c = i;
1538 for (k = 8; k; k--)
1539 c = c & 1 ? (c >> 1) ^ e : c >> 1;
1540 slic_crc_table[i] = c;
1541 }
1542 }
1543
1544 /*
1545 * Return the MAC hast as described above.
1546 */
1547 static unsigned char slic_mcast_get_mac_hash(char *macaddr)
1548 {
1549 u32 crc;
1550 char *p;
1551 int i;
1552 unsigned char machash = 0;
1553
1554 if (!slic_crc_init) {
1555 slic_mcast_init_crc32();
1556 slic_crc_init = 1;
1557 }
1558
1559 crc = 0xFFFFFFFF; /* Preload shift register, per crc-32 spec */
1560 for (i = 0, p = macaddr; i < 6; ++p, ++i)
1561 crc = (crc >> 8) ^ slic_crc_table[(crc ^ *p) & 0xFF];
1562
1563 /* Return bits 1-8, transposed */
1564 for (i = 1; i < 9; i++)
1565 machash |= (((crc >> i) & 1) << (8 - i));
1566
1567 return machash;
1568 }
1569
1570 static void slic_mcast_set_bit(struct adapter *adapter, char *address)
1571 {
1572 unsigned char crcpoly;
1573
1574 /* Get the CRC polynomial for the mac address */
1575 crcpoly = slic_mcast_get_mac_hash(address);
1576
1577 /* We only have space on the SLIC for 64 entries. Lop
1578 * off the top two bits. (2^6 = 64)
1579 */
1580 crcpoly &= 0x3F;
1581
1582 /* OR in the new bit into our 64 bit mask. */
1583 adapter->mcastmask |= (u64) 1 << crcpoly;
1584 }
1585
1586 static void slic_mcast_set_list(struct net_device *dev)
1587 {
1588 struct adapter *adapter = (struct adapter *)netdev_priv(dev);
1589 int status = STATUS_SUCCESS;
1590 int i;
1591 char *addresses;
1592 struct dev_mc_list *mc_list = dev->mc_list;
1593 int mc_count = dev->mc_count;
1594
1595 ASSERT(adapter);
1596
1597 for (i = 1; i <= mc_count; i++) {
1598 addresses = (char *) &mc_list->dmi_addr;
1599 if (mc_list->dmi_addrlen == 6) {
1600 status = slic_mcast_add_list(adapter, addresses);
1601 if (status != STATUS_SUCCESS)
1602 break;
1603 } else {
1604 status = -EINVAL;
1605 break;
1606 }
1607 slic_mcast_set_bit(adapter, addresses);
1608 mc_list = mc_list->next;
1609 }
1610
1611 DBG_MSG("%s a->devflags_prev[%x] dev->flags[%x] status[%x]\n",
1612 __func__, adapter->devflags_prev, dev->flags, status);
1613 if (adapter->devflags_prev != dev->flags) {
1614 adapter->macopts = MAC_DIRECTED;
1615 if (dev->flags) {
1616 if (dev->flags & IFF_BROADCAST)
1617 adapter->macopts |= MAC_BCAST;
1618 if (dev->flags & IFF_PROMISC)
1619 adapter->macopts |= MAC_PROMISC;
1620 if (dev->flags & IFF_ALLMULTI)
1621 adapter->macopts |= MAC_ALLMCAST;
1622 if (dev->flags & IFF_MULTICAST)
1623 adapter->macopts |= MAC_MCAST;
1624 }
1625 adapter->devflags_prev = dev->flags;
1626 DBG_MSG("%s call slic_config_set adapter->macopts[%x]\n",
1627 __func__, adapter->macopts);
1628 slic_config_set(adapter, TRUE);
1629 } else {
1630 if (status == STATUS_SUCCESS)
1631 slic_mcast_set_mask(adapter);
1632 }
1633 return;
1634 }
1635
1636 static void slic_mcast_set_mask(struct adapter *adapter)
1637 {
1638 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
1639
1640 DBG_MSG("%s ENTER (%s) macopts[%x] mask[%llx]\n", __func__,
1641 adapter->netdev->name, (uint) adapter->macopts,
1642 adapter->mcastmask);
1643
1644 if (adapter->macopts & (MAC_ALLMCAST | MAC_PROMISC)) {
1645 /* Turn on all multicast addresses. We have to do this for
1646 * promiscuous mode as well as ALLMCAST mode. It saves the
1647 * Microcode from having to keep state about the MAC
1648 * configuration.
1649 */
1650 /* DBG_MSG("slicoss: %s macopts = MAC_ALLMCAST | MAC_PROMISC\n\
1651 SLUT MODE!!!\n",__func__); */
1652 WRITE_REG(slic_regs->slic_mcastlow, 0xFFFFFFFF, FLUSH);
1653 WRITE_REG(slic_regs->slic_mcasthigh, 0xFFFFFFFF, FLUSH);
1654 /* DBG_MSG("%s (%s) WRITE to slic_regs slic_mcastlow&high 0xFFFFFFFF\n",
1655 _func__, adapter->netdev->name); */
1656 } else {
1657 /* Commit our multicast mast to the SLIC by writing to the
1658 * multicast address mask registers
1659 */
1660 DBG_MSG("%s (%s) WRITE mcastlow[%x] mcasthigh[%x]\n",
1661 __func__, adapter->netdev->name,
1662 ((ulong) (adapter->mcastmask & 0xFFFFFFFF)),
1663 ((ulong) ((adapter->mcastmask >> 32) & 0xFFFFFFFF)));
1664
1665 WRITE_REG(slic_regs->slic_mcastlow,
1666 (u32) (adapter->mcastmask & 0xFFFFFFFF), FLUSH);
1667 WRITE_REG(slic_regs->slic_mcasthigh,
1668 (u32) ((adapter->mcastmask >> 32) & 0xFFFFFFFF),
1669 FLUSH);
1670 }
1671 }
1672
1673 static void slic_timer_ping(ulong dev)
1674 {
1675 struct adapter *adapter;
1676 struct sliccard *card;
1677
1678 ASSERT(dev);
1679 adapter = netdev_priv((struct net_device *)dev);
1680 ASSERT(adapter);
1681 card = adapter->card;
1682 ASSERT(card);
1683 #if !SLIC_DUMP_ENABLED
1684 /*#if SLIC_DUMP_ENABLED*/
1685 if ((adapter->state == ADAPT_UP) && (card->state == CARD_UP)) {
1686 int status;
1687
1688 if (card->pingstatus != ISR_PINGMASK) {
1689 if (errormsg++ < 5) {
1690 DBG_MSG
1691 ("%s (%s) CARD HAS CRASHED PING_status == \
1692 %x ERRORMSG# %d\n",
1693 __func__, adapter->netdev->name,
1694 card->pingstatus, errormsg);
1695 }
1696 /* ASSERT(card->pingstatus == ISR_PINGMASK); */
1697 } else {
1698 if (goodmsg++ < 5) {
1699 DBG_MSG
1700 ("slicoss: %s (%s) PING_status == %x \
1701 GOOD!!!!!!!! msg# %d\n",
1702 __func__, adapter->netdev->name,
1703 card->pingstatus, errormsg);
1704 }
1705 }
1706 card->pingstatus = 0;
1707 status = slic_upr_request(adapter, SLIC_UPR_PING, 0, 0, 0, 0);
1708
1709 ASSERT(status == 0);
1710 } else {
1711 DBG_MSG("slicoss %s (%s) adapter[%p] NOT UP!!!!\n",
1712 __func__, adapter->netdev->name, adapter);
1713 }
1714 #endif
1715 adapter->pingtimer.expires =
1716 jiffies + SLIC_SECS_TO_JIFFS(PING_TIMER_INTERVAL);
1717 add_timer(&adapter->pingtimer);
1718 }
1719
1720 static void slic_if_stop_queue(struct adapter *adapter)
1721 {
1722 netif_stop_queue(adapter->netdev);
1723 }
1724
1725 static void slic_if_start_queue(struct adapter *adapter)
1726 {
1727 netif_start_queue(adapter->netdev);
1728 }
1729
1730 /*
1731 * slic_if_init
1732 *
1733 * Perform initialization of our slic interface.
1734 *
1735 */
1736 static int slic_if_init(struct adapter *adapter)
1737 {
1738 struct sliccard *card = adapter->card;
1739 struct net_device *dev = adapter->netdev;
1740 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
1741 struct slic_shmem *pshmem;
1742 int status = 0;
1743
1744 ASSERT(card);
1745 DBG_MSG("slicoss: %s (%s) ENTER states[%d:%d:%d:%d] flags[%x]\n",
1746 __func__, adapter->netdev->name,
1747 adapter->queues_initialized, adapter->state, adapter->linkstate,
1748 card->state, dev->flags);
1749
1750 /* adapter should be down at this point */
1751 if (adapter->state != ADAPT_DOWN) {
1752 DBG_ERROR("slic_if_init adapter->state != ADAPT_DOWN\n");
1753 return -EIO;
1754 }
1755 ASSERT(adapter->linkstate == LINK_DOWN);
1756
1757 adapter->devflags_prev = dev->flags;
1758 adapter->macopts = MAC_DIRECTED;
1759 if (dev->flags) {
1760 DBG_MSG("slicoss: %s (%s) Set MAC options: ", __func__,
1761 adapter->netdev->name);
1762 if (dev->flags & IFF_BROADCAST) {
1763 adapter->macopts |= MAC_BCAST;
1764 DBG_MSG("BCAST ");
1765 }
1766 if (dev->flags & IFF_PROMISC) {
1767 adapter->macopts |= MAC_PROMISC;
1768 DBG_MSG("PROMISC ");
1769 }
1770 if (dev->flags & IFF_ALLMULTI) {
1771 adapter->macopts |= MAC_ALLMCAST;
1772 DBG_MSG("ALL_MCAST ");
1773 }
1774 if (dev->flags & IFF_MULTICAST) {
1775 adapter->macopts |= MAC_MCAST;
1776 DBG_MSG("MCAST ");
1777 }
1778 DBG_MSG("\n");
1779 }
1780 status = slic_adapter_allocresources(adapter);
1781 if (status != STATUS_SUCCESS) {
1782 DBG_ERROR
1783 ("slic_if_init: slic_adapter_allocresources FAILED %x\n",
1784 status);
1785 slic_adapter_freeresources(adapter);
1786 return status;
1787 }
1788
1789 if (!adapter->queues_initialized) {
1790 DBG_MSG("slicoss: %s call slic_rspqueue_init\n", __func__);
1791 if (slic_rspqueue_init(adapter))
1792 return -ENOMEM;
1793 DBG_MSG
1794 ("slicoss: %s call slic_cmdq_init adapter[%p] port %d \n",
1795 __func__, adapter, adapter->port);
1796 if (slic_cmdq_init(adapter))
1797 return -ENOMEM;
1798 DBG_MSG
1799 ("slicoss: %s call slic_rcvqueue_init adapter[%p] \
1800 port %d \n", __func__, adapter, adapter->port);
1801 if (slic_rcvqueue_init(adapter))
1802 return -ENOMEM;
1803 adapter->queues_initialized = 1;
1804 }
1805 DBG_MSG("slicoss: %s disable interrupts(slic)\n", __func__);
1806
1807 WRITE_REG(slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
1808 mdelay(1);
1809
1810 if (!adapter->isp_initialized) {
1811 pshmem = (struct slic_shmem *)adapter->phys_shmem;
1812
1813 spin_lock_irqsave(&adapter->bit64reglock.lock,
1814 adapter->bit64reglock.flags);
1815
1816 #if defined(CONFIG_X86_64)
1817 WRITE_REG(slic_regs->slic_addr_upper,
1818 SLIC_GET_ADDR_HIGH(&pshmem->isr), DONT_FLUSH);
1819 WRITE_REG(slic_regs->slic_isp,
1820 SLIC_GET_ADDR_LOW(&pshmem->isr), FLUSH);
1821 #elif defined(CONFIG_X86)
1822 WRITE_REG(slic_regs->slic_addr_upper, (u32) 0, DONT_FLUSH);
1823 WRITE_REG(slic_regs->slic_isp, (u32) &pshmem->isr, FLUSH);
1824 #else
1825 Stop Compilations
1826 #endif
1827 spin_unlock_irqrestore(&adapter->bit64reglock.lock,
1828 adapter->bit64reglock.flags);
1829 adapter->isp_initialized = 1;
1830 }
1831
1832 adapter->state = ADAPT_UP;
1833 if (!card->loadtimerset) {
1834 init_timer(&card->loadtimer);
1835 card->loadtimer.expires =
1836 jiffies + SLIC_SECS_TO_JIFFS(SLIC_LOADTIMER_PERIOD);
1837 card->loadtimer.data = (ulong) card;
1838 card->loadtimer.function = &slic_timer_load_check;
1839 add_timer(&card->loadtimer);
1840
1841 card->loadtimerset = 1;
1842 }
1843 #if SLIC_GET_STATS_TIMER_ENABLED
1844 if (!adapter->statstimerset) {
1845 DBG_MSG("slicoss: %s start getstats_timer(slic)\n",
1846 __func__);
1847 init_timer(&adapter->statstimer);
1848 adapter->statstimer.expires =
1849 jiffies + SLIC_SECS_TO_JIFFS(STATS_TIMER_INTERVAL);
1850 adapter->statstimer.data = (ulong) adapter->netdev;
1851 adapter->statstimer.function = &slic_timer_get_stats;
1852 add_timer(&adapter->statstimer);
1853 adapter->statstimerset = 1;
1854 }
1855 #endif
1856 #if !SLIC_DUMP_ENABLED && SLIC_PING_TIMER_ENABLED
1857 /*#if SLIC_DUMP_ENABLED && SLIC_PING_TIMER_ENABLED*/
1858 if (!adapter->pingtimerset) {
1859 DBG_MSG("slicoss: %s start card_ping_timer(slic)\n",
1860 __func__);
1861 init_timer(&adapter->pingtimer);
1862 adapter->pingtimer.expires =
1863 jiffies + SLIC_SECS_TO_JIFFS(PING_TIMER_INTERVAL);
1864 adapter->pingtimer.data = (ulong) dev;
1865 adapter->pingtimer.function = &slic_timer_ping;
1866 add_timer(&adapter->pingtimer);
1867 adapter->pingtimerset = 1;
1868 adapter->card->pingstatus = ISR_PINGMASK;
1869 }
1870 #endif
1871
1872 /*
1873 * clear any pending events, then enable interrupts
1874 */
1875 DBG_MSG("slicoss: %s ENABLE interrupts(slic)\n", __func__);
1876 adapter->isrcopy = 0;
1877 adapter->pshmem->isr = 0;
1878 WRITE_REG(slic_regs->slic_isr, 0, FLUSH);
1879 WRITE_REG(slic_regs->slic_icr, ICR_INT_ON, FLUSH);
1880
1881 DBG_MSG("slicoss: %s call slic_link_config(slic)\n", __func__);
1882 slic_link_config(adapter, LINK_AUTOSPEED, LINK_AUTOD);
1883 slic_link_event_handler(adapter);
1884
1885 DBG_MSG("slicoss: %s EXIT\n", __func__);
1886 return STATUS_SUCCESS;
1887 }
1888
1889 static void slic_unmap_mmio_space(struct adapter *adapter)
1890 {
1891 #if LINUX_FREES_ADAPTER_RESOURCES
1892 if (adapter->slic_regs)
1893 iounmap(adapter->slic_regs);
1894 adapter->slic_regs = NULL;
1895 #endif
1896 }
1897
1898 static int slic_adapter_allocresources(struct adapter *adapter)
1899 {
1900 if (!adapter->intrregistered) {
1901 int retval;
1902
1903 DBG_MSG
1904 ("slicoss: %s AllocAdaptRsrcs adapter[%p] shmem[%p] \
1905 phys_shmem[%p] dev->irq[%x] %x\n",
1906 __func__, adapter, adapter->pshmem,
1907 (void *)adapter->phys_shmem, adapter->netdev->irq,
1908 NR_IRQS);
1909
1910 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
1911 slic_global.driver_lock.flags);
1912
1913 retval = request_irq(adapter->netdev->irq,
1914 &slic_interrupt,
1915 IRQF_SHARED,
1916 adapter->netdev->name, adapter->netdev);
1917
1918 spin_lock_irqsave(&slic_global.driver_lock.lock,
1919 slic_global.driver_lock.flags);
1920
1921 if (retval) {
1922 DBG_ERROR("slicoss: request_irq (%s) FAILED [%x]\n",
1923 adapter->netdev->name, retval);
1924 return retval;
1925 }
1926 adapter->intrregistered = 1;
1927 DBG_MSG
1928 ("slicoss: %s AllocAdaptRsrcs adapter[%p] shmem[%p] \
1929 pshmem[%p] dev->irq[%x]\n",
1930 __func__, adapter, adapter->pshmem,
1931 (void *)adapter->pshmem, adapter->netdev->irq);
1932 }
1933 return STATUS_SUCCESS;
1934 }
1935
1936 static void slic_config_pci(struct pci_dev *pcidev)
1937 {
1938 u16 pci_command;
1939 u16 new_command;
1940
1941 pci_read_config_word(pcidev, PCI_COMMAND, &pci_command);
1942 DBG_MSG("slicoss: %s PCI command[%4.4x]\n", __func__, pci_command);
1943
1944 new_command = pci_command | PCI_COMMAND_MASTER
1945 | PCI_COMMAND_MEMORY
1946 | PCI_COMMAND_INVALIDATE
1947 | PCI_COMMAND_PARITY | PCI_COMMAND_SERR | PCI_COMMAND_FAST_BACK;
1948 if (pci_command != new_command) {
1949 DBG_MSG("%s -- Updating PCI COMMAND register %4.4x->%4.4x.\n",
1950 __func__, pci_command, new_command);
1951 pci_write_config_word(pcidev, PCI_COMMAND, new_command);
1952 }
1953 }
1954
1955 static void slic_adapter_freeresources(struct adapter *adapter)
1956 {
1957 DBG_MSG("slicoss: %s ENTER adapter[%p]\n", __func__, adapter);
1958 slic_init_cleanup(adapter);
1959 memset(&adapter->stats, 0, sizeof(struct net_device_stats));
1960 adapter->error_interrupts = 0;
1961 adapter->rcv_interrupts = 0;
1962 adapter->xmit_interrupts = 0;
1963 adapter->linkevent_interrupts = 0;
1964 adapter->upr_interrupts = 0;
1965 adapter->num_isrs = 0;
1966 adapter->xmit_completes = 0;
1967 adapter->rcv_broadcasts = 0;
1968 adapter->rcv_multicasts = 0;
1969 adapter->rcv_unicasts = 0;
1970 DBG_MSG("slicoss: %s EXIT\n", __func__);
1971 }
1972
1973 /*
1974 * slic_link_config
1975 *
1976 * Write phy control to configure link duplex/speed
1977 *
1978 */
1979 static void slic_link_config(struct adapter *adapter,
1980 u32 linkspeed, u32 linkduplex)
1981 {
1982 u32 speed;
1983 u32 duplex;
1984 u32 phy_config;
1985 u32 phy_advreg;
1986 u32 phy_gctlreg;
1987
1988 if (adapter->state != ADAPT_UP) {
1989 DBG_MSG
1990 ("%s (%s) ADAPT Not up yet, Return! speed[%x] duplex[%x]\n",
1991 __func__, adapter->netdev->name, linkspeed,
1992 linkduplex);
1993 return;
1994 }
1995 DBG_MSG("slicoss: %s (%s) slic_link_config: speed[%x] duplex[%x]\n",
1996 __func__, adapter->netdev->name, linkspeed, linkduplex);
1997
1998 ASSERT((adapter->devid == SLIC_1GB_DEVICE_ID)
1999 || (adapter->devid == SLIC_2GB_DEVICE_ID));
2000
2001 if (linkspeed > LINK_1000MB)
2002 linkspeed = LINK_AUTOSPEED;
2003 if (linkduplex > LINK_AUTOD)
2004 linkduplex = LINK_AUTOD;
2005
2006 if ((linkspeed == LINK_AUTOSPEED) || (linkspeed == LINK_1000MB)) {
2007 if (adapter->flags & ADAPT_FLAGS_FIBERMEDIA) {
2008 /* We've got a fiber gigabit interface, and register
2009 * 4 is different in fiber mode than in copper mode
2010 */
2011
2012 /* advertise FD only @1000 Mb */
2013 phy_advreg = (MIICR_REG_4 | (PAR_ADV1000XFD));
2014 /* enable PAUSE frames */
2015 phy_advreg |= PAR_ASYMPAUSE_FIBER;
2016 WRITE_REG(adapter->slic_regs->slic_wphy, phy_advreg,
2017 FLUSH);
2018
2019 if (linkspeed == LINK_AUTOSPEED) {
2020 /* reset phy, enable auto-neg */
2021 phy_config =
2022 (MIICR_REG_PCR |
2023 (PCR_RESET | PCR_AUTONEG |
2024 PCR_AUTONEG_RST));
2025 WRITE_REG(adapter->slic_regs->slic_wphy,
2026 phy_config, FLUSH);
2027 } else { /* forced 1000 Mb FD*/
2028 /* power down phy to break link
2029 this may not work) */
2030 phy_config = (MIICR_REG_PCR | PCR_POWERDOWN);
2031 WRITE_REG(adapter->slic_regs->slic_wphy,
2032 phy_config, FLUSH);
2033 /* wait, Marvell says 1 sec,
2034 try to get away with 10 ms */
2035 mdelay(10);
2036
2037 /* disable auto-neg, set speed/duplex,
2038 soft reset phy, powerup */
2039 phy_config =
2040 (MIICR_REG_PCR |
2041 (PCR_RESET | PCR_SPEED_1000 |
2042 PCR_DUPLEX_FULL));
2043 WRITE_REG(adapter->slic_regs->slic_wphy,
2044 phy_config, FLUSH);
2045 }
2046 } else { /* copper gigabit */
2047
2048 /* Auto-Negotiate or 1000 Mb must be auto negotiated
2049 * We've got a copper gigabit interface, and
2050 * register 4 is different in copper mode than
2051 * in fiber mode
2052 */
2053 if (linkspeed == LINK_AUTOSPEED) {
2054 /* advertise 10/100 Mb modes */
2055 phy_advreg =
2056 (MIICR_REG_4 |
2057 (PAR_ADV100FD | PAR_ADV100HD | PAR_ADV10FD
2058 | PAR_ADV10HD));
2059 } else {
2060 /* linkspeed == LINK_1000MB -
2061 don't advertise 10/100 Mb modes */
2062 phy_advreg = MIICR_REG_4;
2063 }
2064 /* enable PAUSE frames */
2065 phy_advreg |= PAR_ASYMPAUSE;
2066 /* required by the Cicada PHY */
2067 phy_advreg |= PAR_802_3;
2068 WRITE_REG(adapter->slic_regs->slic_wphy, phy_advreg,
2069 FLUSH);
2070 /* advertise FD only @1000 Mb */
2071 phy_gctlreg = (MIICR_REG_9 | (PGC_ADV1000FD));
2072 WRITE_REG(adapter->slic_regs->slic_wphy, phy_gctlreg,
2073 FLUSH);
2074
2075 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
2076 /* if a Marvell PHY
2077 enable auto crossover */
2078 phy_config =
2079 (MIICR_REG_16 | (MRV_REG16_XOVERON));
2080 WRITE_REG(adapter->slic_regs->slic_wphy,
2081 phy_config, FLUSH);
2082
2083 /* reset phy, enable auto-neg */
2084 phy_config =
2085 (MIICR_REG_PCR |
2086 (PCR_RESET | PCR_AUTONEG |
2087 PCR_AUTONEG_RST));
2088 WRITE_REG(adapter->slic_regs->slic_wphy,
2089 phy_config, FLUSH);
2090 } else { /* it's a Cicada PHY */
2091 /* enable and restart auto-neg (don't reset) */
2092 phy_config =
2093 (MIICR_REG_PCR |
2094 (PCR_AUTONEG | PCR_AUTONEG_RST));
2095 WRITE_REG(adapter->slic_regs->slic_wphy,
2096 phy_config, FLUSH);
2097 }
2098 }
2099 } else {
2100 /* Forced 10/100 */
2101 if (linkspeed == LINK_10MB)
2102 speed = 0;
2103 else
2104 speed = PCR_SPEED_100;
2105 if (linkduplex == LINK_HALFD)
2106 duplex = 0;
2107 else
2108 duplex = PCR_DUPLEX_FULL;
2109
2110 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
2111 /* if a Marvell PHY
2112 disable auto crossover */
2113 phy_config = (MIICR_REG_16 | (MRV_REG16_XOVEROFF));
2114 WRITE_REG(adapter->slic_regs->slic_wphy, phy_config,
2115 FLUSH);
2116 }
2117
2118 /* power down phy to break link (this may not work) */
2119 phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN | speed | duplex));
2120 WRITE_REG(adapter->slic_regs->slic_wphy, phy_config, FLUSH);
2121
2122 /* wait, Marvell says 1 sec, try to get away with 10 ms */
2123 mdelay(10);
2124
2125 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
2126 /* if a Marvell PHY
2127 disable auto-neg, set speed,
2128 soft reset phy, powerup */
2129 phy_config =
2130 (MIICR_REG_PCR | (PCR_RESET | speed | duplex));
2131 WRITE_REG(adapter->slic_regs->slic_wphy, phy_config,
2132 FLUSH);
2133 } else { /* it's a Cicada PHY */
2134 /* disable auto-neg, set speed, powerup */
2135 phy_config = (MIICR_REG_PCR | (speed | duplex));
2136 WRITE_REG(adapter->slic_regs->slic_wphy, phy_config,
2137 FLUSH);
2138 }
2139 }
2140
2141 DBG_MSG
2142 ("slicoss: %s (%s) EXIT slic_link_config : state[%d] \
2143 phy_config[%x]\n", __func__, adapter->netdev->name, adapter->state,
2144 phy_config);
2145 }
2146
2147 static void slic_card_cleanup(struct sliccard *card)
2148 {
2149 DBG_MSG("slicoss: %s ENTER\n", __func__);
2150
2151 #if SLIC_DUMP_ENABLED
2152 if (card->dumpbuffer) {
2153 card->dumpbuffer_phys = 0;
2154 card->dumpbuffer_physl = 0;
2155 card->dumpbuffer_physh = 0;
2156 kfree(card->dumpbuffer);
2157 card->dumpbuffer = NULL;
2158 }
2159 if (card->cmdbuffer) {
2160 card->cmdbuffer_phys = 0;
2161 card->cmdbuffer_physl = 0;
2162 card->cmdbuffer_physh = 0;
2163 kfree(card->cmdbuffer);
2164 card->cmdbuffer = NULL;
2165 }
2166 #endif
2167
2168 if (card->loadtimerset) {
2169 card->loadtimerset = 0;
2170 del_timer(&card->loadtimer);
2171 }
2172
2173 slic_debug_card_destroy(card);
2174
2175 kfree(card);
2176 DBG_MSG("slicoss: %s EXIT\n", __func__);
2177 }
2178
2179 static int slic_card_download_gbrcv(struct adapter *adapter)
2180 {
2181 const struct firmware *fw;
2182 const char *file = "";
2183 int ret;
2184 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2185 u32 codeaddr;
2186 u32 instruction;
2187 int index = 0;
2188 u32 rcvucodelen = 0;
2189
2190 switch (adapter->devid) {
2191 case SLIC_2GB_DEVICE_ID:
2192 file = "oasisrcvucode.sys";
2193 break;
2194 case SLIC_1GB_DEVICE_ID:
2195 file = "gbrcvucode.sys";
2196 break;
2197 default:
2198 ASSERT(0);
2199 break;
2200 }
2201
2202 ret = request_firmware(&fw, file, &adapter->pcidev->dev);
2203 if (ret) {
2204 printk(KERN_ERR "SLICOSS: Failed to load firmware %s\n", file);
2205 return ret;
2206 }
2207
2208 rcvucodelen = *(u32 *)(fw->data + index);
2209 index += 4;
2210 switch (adapter->devid) {
2211 case SLIC_2GB_DEVICE_ID:
2212 if (rcvucodelen != OasisRcvUCodeLen)
2213 return -EINVAL;
2214 break;
2215 case SLIC_1GB_DEVICE_ID:
2216 if (rcvucodelen != GBRcvUCodeLen)
2217 return -EINVAL;
2218 break;
2219 default:
2220 ASSERT(0);
2221 break;
2222 }
2223 /* start download */
2224 WRITE_REG(slic_regs->slic_rcv_wcs, SLIC_RCVWCS_BEGIN, FLUSH);
2225 /* download the rcv sequencer ucode */
2226 for (codeaddr = 0; codeaddr < rcvucodelen; codeaddr++) {
2227 /* write out instruction address */
2228 WRITE_REG(slic_regs->slic_rcv_wcs, codeaddr, FLUSH);
2229
2230 instruction = *(u32 *)(fw->data + index);
2231 index += 4;
2232 /* write out the instruction data low addr */
2233 WRITE_REG(slic_regs->slic_rcv_wcs,
2234 instruction, FLUSH);
2235
2236 instruction = *(u8 *)(fw->data + index);
2237 index++;
2238 /* write out the instruction data high addr */
2239 WRITE_REG(slic_regs->slic_rcv_wcs, (u8)instruction,
2240 FLUSH);
2241 }
2242
2243 /* download finished */
2244 release_firmware(fw);
2245 WRITE_REG(slic_regs->slic_rcv_wcs, SLIC_RCVWCS_FINISH, FLUSH);
2246 return 0;
2247 }
2248
2249 static int slic_card_download(struct adapter *adapter)
2250 {
2251 const struct firmware *fw;
2252 const char *file = "";
2253 int ret;
2254 u32 section;
2255 int thissectionsize;
2256 int codeaddr;
2257 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2258 u32 instruction;
2259 u32 baseaddress;
2260 u32 failure;
2261 u32 i;
2262 u32 numsects = 0;
2263 u32 sectsize[3];
2264 u32 sectstart[3];
2265 int ucode_start, index = 0;
2266
2267 /* DBG_MSG ("slicoss: %s (%s) adapter[%p] card[%p] devid[%x] \
2268 jiffies[%lx] cpu %d\n", __func__, adapter->netdev->name, adapter,
2269 adapter->card, adapter->devid,jiffies, smp_processor_id()); */
2270
2271 switch (adapter->devid) {
2272 case SLIC_2GB_DEVICE_ID:
2273 file = "oasisdownload.sys";
2274 break;
2275 case SLIC_1GB_DEVICE_ID:
2276 file = "gbdownload.sys";
2277 break;
2278 default:
2279 ASSERT(0);
2280 break;
2281 }
2282 ret = request_firmware(&fw, file, &adapter->pcidev->dev);
2283 if (ret) {
2284 printk(KERN_ERR "SLICOSS: Failed to load firmware %s\n", file);
2285 return ret;
2286 }
2287 numsects = *(u32 *)(fw->data + index);
2288 index += 4;
2289 ASSERT(numsects <= 3);
2290 for (i = 0; i < numsects; i++) {
2291 sectsize[i] = *(u32 *)(fw->data + index);
2292 index += 4;
2293 }
2294 for (i = 0; i < numsects; i++) {
2295 sectstart[i] = *(u32 *)(fw->data + index);
2296 index += 4;
2297 }
2298 ucode_start = index;
2299 instruction = *(u32 *)(fw->data + index);
2300 index += 4;
2301 for (section = 0; section < numsects; section++) {
2302 baseaddress = sectstart[section];
2303 thissectionsize = sectsize[section] >> 3;
2304
2305 for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) {
2306 /* Write out instruction address */
2307 WRITE_REG(slic_regs->slic_wcs, baseaddress + codeaddr,
2308 FLUSH);
2309 /* Write out instruction to low addr */
2310 WRITE_REG(slic_regs->slic_wcs, instruction, FLUSH);
2311 instruction = *(u32 *)(fw->data + index);
2312 index += 4;
2313
2314 /* Write out instruction to high addr */
2315 WRITE_REG(slic_regs->slic_wcs, instruction, FLUSH);
2316 instruction = *(u32 *)(fw->data + index);
2317 index += 4;
2318 }
2319 }
2320 index = ucode_start;
2321 for (section = 0; section < numsects; section++) {
2322 instruction = *(u32 *)(fw->data + index);
2323 baseaddress = sectstart[section];
2324 if (baseaddress < 0x8000)
2325 continue;
2326 thissectionsize = sectsize[section] >> 3;
2327
2328 /* DBG_MSG ("slicoss: COMPARE secton[%x] baseaddr[%x] sectnsize[%x]\n",
2329 (uint)section,baseaddress,thissectionsize);*/
2330 for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) {
2331 /* Write out instruction address */
2332 WRITE_REG(slic_regs->slic_wcs,
2333 SLIC_WCS_COMPARE | (baseaddress + codeaddr),
2334 FLUSH);
2335 /* Write out instruction to low addr */
2336 WRITE_REG(slic_regs->slic_wcs, instruction, FLUSH);
2337 instruction = *(u32 *)(fw->data + index);
2338 index += 4;
2339 /* Write out instruction to high addr */
2340 WRITE_REG(slic_regs->slic_wcs, instruction, FLUSH);
2341 instruction = *(u32 *)(fw->data + index);
2342 index += 4;
2343
2344 /* Check SRAM location zero. If it is non-zero. Abort.*/
2345 /* failure = readl((u32 __iomem *)&slic_regs->slic_reset);
2346 if (failure) {
2347 DBG_MSG
2348 ("slicoss: %s FAILURE EXIT codeaddr[%x] "
2349 "thissectionsize[%x] failure[%x]\n",
2350 __func__, codeaddr, thissectionsize,
2351 failure);
2352 release_firmware(fw);
2353 return -EIO;
2354 }*/
2355 }
2356 }
2357 /* DBG_MSG ("slicoss: Compare done\n");*/
2358 release_firmware(fw);
2359 /* Everything OK, kick off the card */
2360 mdelay(10);
2361 WRITE_REG(slic_regs->slic_wcs, SLIC_WCS_START, FLUSH);
2362
2363 /* stall for 20 ms, long enough for ucode to init card
2364 and reach mainloop */
2365 mdelay(20);
2366
2367 DBG_MSG("slicoss: %s (%s) EXIT adapter[%p] card[%p]\n",
2368 __func__, adapter->netdev->name, adapter, adapter->card);
2369
2370 return STATUS_SUCCESS;
2371 }
2372
2373 static void slic_adapter_set_hwaddr(struct adapter *adapter)
2374 {
2375 struct sliccard *card = adapter->card;
2376
2377 /* DBG_MSG ("%s ENTER card->config_set[%x] port[%d] physport[%d] funct#[%d]\n",
2378 __func__, card->config_set, adapter->port, adapter->physport,
2379 adapter->functionnumber);
2380
2381 slic_dbg_macaddrs(adapter); */
2382
2383 if ((adapter->card) && (card->config_set)) {
2384 memcpy(adapter->macaddr,
2385 card->config.MacInfo[adapter->functionnumber].macaddrA,
2386 sizeof(struct slic_config_mac));
2387 /* DBG_MSG ("%s AFTER copying from config.macinfo into currmacaddr\n",
2388 __func__);
2389 slic_dbg_macaddrs(adapter);*/
2390 if (!(adapter->currmacaddr[0] || adapter->currmacaddr[1] ||
2391 adapter->currmacaddr[2] || adapter->currmacaddr[3] ||
2392 adapter->currmacaddr[4] || adapter->currmacaddr[5])) {
2393 memcpy(adapter->currmacaddr, adapter->macaddr, 6);
2394 }
2395 if (adapter->netdev) {
2396 memcpy(adapter->netdev->dev_addr, adapter->currmacaddr,
2397 6);
2398 }
2399 }
2400 /* DBG_MSG ("%s EXIT port %d\n", __func__, adapter->port);
2401 slic_dbg_macaddrs(adapter); */
2402 }
2403
2404 static void slic_intagg_set(struct adapter *adapter, u32 value)
2405 {
2406 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2407
2408 WRITE_REG(slic_regs->slic_intagg, value, FLUSH);
2409 adapter->card->loadlevel_current = value;
2410 }
2411
2412 static int slic_card_init(struct sliccard *card, struct adapter *adapter)
2413 {
2414 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2415 struct slic_eeprom *peeprom;
2416 struct oslic_eeprom *pOeeprom;
2417 dma_addr_t phys_config;
2418 u32 phys_configh;
2419 u32 phys_configl;
2420 u32 i = 0;
2421 struct slic_shmem *pshmem;
2422 int status;
2423 uint macaddrs = card->card_size;
2424 ushort eecodesize;
2425 ushort dramsize;
2426 ushort ee_chksum;
2427 ushort calc_chksum;
2428 struct slic_config_mac *pmac;
2429 unsigned char fruformat;
2430 unsigned char oemfruformat;
2431 struct atk_fru *patkfru;
2432 union oemfru *poemfru;
2433
2434 DBG_MSG
2435 ("slicoss: %s ENTER card[%p] adapter[%p] card->state[%x] \
2436 size[%d]\n", __func__, card, adapter, card->state, card->card_size);
2437
2438 /* Reset everything except PCI configuration space */
2439 slic_soft_reset(adapter);
2440
2441 /* Download the microcode */
2442 status = slic_card_download(adapter);
2443
2444 if (status != STATUS_SUCCESS) {
2445 DBG_ERROR("SLIC download failed bus %d slot %d\n",
2446 (uint) adapter->busnumber,
2447 (uint) adapter->slotnumber);
2448 return status;
2449 }
2450
2451 if (!card->config_set) {
2452 peeprom = pci_alloc_consistent(adapter->pcidev,
2453 sizeof(struct slic_eeprom),
2454 &phys_config);
2455
2456 phys_configl = SLIC_GET_ADDR_LOW(phys_config);
2457 phys_configh = SLIC_GET_ADDR_HIGH(phys_config);
2458
2459 DBG_MSG("slicoss: %s Eeprom info adapter [%p]\n "
2460 "size [%x]\n peeprom [%p]\n "
2461 "phys_config [%p]\n phys_configl[%x]\n "
2462 "phys_configh[%x]\n",
2463 __func__, adapter,
2464 (u32)sizeof(struct slic_eeprom),
2465 peeprom, (void *) phys_config, phys_configl,
2466 phys_configh);
2467 if (!peeprom) {
2468 DBG_ERROR
2469 ("SLIC eeprom read failed to get memory bus %d \
2470 slot %d\n",
2471 (uint) adapter->busnumber,
2472 (uint) adapter->slotnumber);
2473 return -ENOMEM;
2474 } else {
2475 memset(peeprom, 0, sizeof(struct slic_eeprom));
2476 }
2477 WRITE_REG(slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
2478 mdelay(1);
2479 pshmem = (struct slic_shmem *)adapter->phys_shmem;
2480
2481 spin_lock_irqsave(&adapter->bit64reglock.lock,
2482 adapter->bit64reglock.flags);
2483 WRITE_REG(slic_regs->slic_addr_upper, 0, DONT_FLUSH);
2484 WRITE_REG(slic_regs->slic_isp,
2485 SLIC_GET_ADDR_LOW(&pshmem->isr), FLUSH);
2486 spin_unlock_irqrestore(&adapter->bit64reglock.lock,
2487 adapter->bit64reglock.flags);
2488
2489 slic_config_get(adapter, phys_configl, phys_configh);
2490
2491 for (;;) {
2492 if (adapter->pshmem->isr) {
2493 DBG_MSG("%s shmem[%p] shmem->isr[%x]\n",
2494 __func__, adapter->pshmem,
2495 adapter->pshmem->isr);
2496
2497 if (adapter->pshmem->isr & ISR_UPC) {
2498 adapter->pshmem->isr = 0;
2499 WRITE_REG64(adapter,
2500 slic_regs->slic_isp,
2501 0,
2502 slic_regs->slic_addr_upper,
2503 0, FLUSH);
2504 WRITE_REG(slic_regs->slic_isr, 0,
2505 FLUSH);
2506
2507 slic_upr_request_complete(adapter, 0);
2508 break;
2509 } else {
2510 adapter->pshmem->isr = 0;
2511 WRITE_REG(slic_regs->slic_isr, 0,
2512 FLUSH);
2513 }
2514 } else {
2515 mdelay(1);
2516 i++;
2517 if (i > 5000) {
2518 DBG_ERROR
2519 ("SLIC: %d config data fetch timed "
2520 "out!\n", adapter->port);
2521 DBG_MSG("%s shmem[%p] shmem->isr[%x]\n",
2522 __func__, adapter->pshmem,
2523 adapter->pshmem->isr);
2524 WRITE_REG64(adapter,
2525 slic_regs->slic_isp, 0,
2526 slic_regs->slic_addr_upper,
2527 0, FLUSH);
2528 return -EINVAL;
2529 }
2530 }
2531 }
2532
2533 switch (adapter->devid) {
2534 /* Oasis card */
2535 case SLIC_2GB_DEVICE_ID:
2536 /* extract EEPROM data and pointers to EEPROM data */
2537 pOeeprom = (struct oslic_eeprom *) peeprom;
2538 eecodesize = pOeeprom->EecodeSize;
2539 dramsize = pOeeprom->DramSize;
2540 pmac = pOeeprom->MacInfo;
2541 fruformat = pOeeprom->FruFormat;
2542 patkfru = &pOeeprom->AtkFru;
2543 oemfruformat = pOeeprom->OemFruFormat;
2544 poemfru = &pOeeprom->OemFru;
2545 macaddrs = 2;
2546 /* Minor kludge for Oasis card
2547 get 2 MAC addresses from the
2548 EEPROM to ensure that function 1
2549 gets the Port 1 MAC address */
2550 break;
2551 default:
2552 /* extract EEPROM data and pointers to EEPROM data */
2553 eecodesize = peeprom->EecodeSize;
2554 dramsize = peeprom->DramSize;
2555 pmac = peeprom->u2.mac.MacInfo;
2556 fruformat = peeprom->FruFormat;
2557 patkfru = &peeprom->AtkFru;
2558 oemfruformat = peeprom->OemFruFormat;
2559 poemfru = &peeprom->OemFru;
2560 break;
2561 }
2562
2563 card->config.EepromValid = FALSE;
2564
2565 /* see if the EEPROM is valid by checking it's checksum */
2566 if ((eecodesize <= MAX_EECODE_SIZE) &&
2567 (eecodesize >= MIN_EECODE_SIZE)) {
2568
2569 ee_chksum =
2570 *(u16 *) ((char *) peeprom + (eecodesize - 2));
2571 /*
2572 calculate the EEPROM checksum
2573 */
2574 calc_chksum =
2575 ~slic_eeprom_cksum((char *) peeprom,
2576 (eecodesize - 2));
2577 /*
2578 if the ucdoe chksum flag bit worked,
2579 we wouldn't need this shit
2580 */
2581 if (ee_chksum == calc_chksum)
2582 card->config.EepromValid = TRUE;
2583 }
2584 /* copy in the DRAM size */
2585 card->config.DramSize = dramsize;
2586
2587 /* copy in the MAC address(es) */
2588 for (i = 0; i < macaddrs; i++) {
2589 memcpy(&card->config.MacInfo[i],
2590 &pmac[i], sizeof(struct slic_config_mac));
2591 }
2592 /* DBG_MSG ("%s EEPROM Checksum Good? %d MacAddress\n",__func__,
2593 card->config.EepromValid); */
2594
2595 /* copy the Alacritech FRU information */
2596 card->config.FruFormat = fruformat;
2597 memcpy(&card->config.AtkFru, patkfru,
2598 sizeof(struct atk_fru));
2599
2600 pci_free_consistent(adapter->pcidev,
2601 sizeof(struct slic_eeprom),
2602 peeprom, phys_config);
2603 DBG_MSG
2604 ("slicoss: %s adapter%d [%p] size[%x] FREE peeprom[%p] \
2605 phys_config[%p]\n",
2606 __func__, adapter->port, adapter,
2607 (u32) sizeof(struct slic_eeprom), peeprom,
2608 (void *) phys_config);
2609
2610 if ((!card->config.EepromValid) &&
2611 (adapter->reg_params.fail_on_bad_eeprom)) {
2612 WRITE_REG64(adapter,
2613 slic_regs->slic_isp,
2614 0, slic_regs->slic_addr_upper, 0, FLUSH);
2615 DBG_ERROR
2616 ("unsupported CONFIGURATION EEPROM invalid\n");
2617 return -EINVAL;
2618 }
2619
2620 card->config_set = 1;
2621 }
2622
2623 if (slic_card_download_gbrcv(adapter)) {
2624 DBG_ERROR("%s unable to download GB receive microcode\n",
2625 __func__);
2626 return -EINVAL;
2627 }
2628
2629 if (slic_global.dynamic_intagg) {
2630 DBG_MSG
2631 ("Dynamic Interrupt Aggregation[ENABLED]: slic%d \
2632 SET intagg to %d\n",
2633 card->cardnum, 0);
2634 slic_intagg_set(adapter, 0);
2635 } else {
2636 slic_intagg_set(adapter, intagg_delay);
2637 DBG_MSG
2638 ("Dynamic Interrupt Aggregation[DISABLED]: slic%d \
2639 SET intagg to %d\n",
2640 card->cardnum, intagg_delay);
2641 }
2642
2643 /*
2644 * Initialize ping status to "ok"
2645 */
2646 card->pingstatus = ISR_PINGMASK;
2647
2648 #if SLIC_DUMP_ENABLED
2649 if (!card->dumpbuffer) {
2650 card->dumpbuffer = kmalloc(DUMP_PAGE_SIZE, GFP_ATOMIC);
2651
2652 ASSERT(card->dumpbuffer);
2653 if (card->dumpbuffer == NULL)
2654 return -ENOMEM;
2655 }
2656 /*
2657 * Smear the shared memory structure and then obtain
2658 * the PHYSICAL address of this structure
2659 */
2660 memset(card->dumpbuffer, 0, DUMP_PAGE_SIZE);
2661 card->dumpbuffer_phys = virt_to_bus(card->dumpbuffer);
2662 card->dumpbuffer_physh = SLIC_GET_ADDR_HIGH(card->dumpbuffer_phys);
2663 card->dumpbuffer_physl = SLIC_GET_ADDR_LOW(card->dumpbuffer_phys);
2664
2665 /*
2666 * Allocate COMMAND BUFFER
2667 */
2668 if (!card->cmdbuffer) {
2669 card->cmdbuffer = kmalloc(sizeof(struct dump_cmd), GFP_ATOMIC);
2670
2671 ASSERT(card->cmdbuffer);
2672 if (card->cmdbuffer == NULL)
2673 return -ENOMEM;
2674 }
2675 /*
2676 * Smear the shared memory structure and then obtain
2677 * the PHYSICAL address of this structure
2678 */
2679 memset(card->cmdbuffer, 0, sizeof(struct dump_cmd));
2680 card->cmdbuffer_phys = virt_to_bus(card->cmdbuffer);
2681 card->cmdbuffer_physh = SLIC_GET_ADDR_HIGH(card->cmdbuffer_phys);
2682 card->cmdbuffer_physl = SLIC_GET_ADDR_LOW(card->cmdbuffer_phys);
2683 #endif
2684
2685 /*
2686 * Lastly, mark our card state as up and return success
2687 */
2688 card->state = CARD_UP;
2689 card->reset_in_progress = 0;
2690 DBG_MSG("slicoss: %s EXIT card[%p] adapter[%p] card->state[%x]\n",
2691 __func__, card, adapter, card->state);
2692
2693 return STATUS_SUCCESS;
2694 }
2695
2696 static u32 slic_card_locate(struct adapter *adapter)
2697 {
2698 struct sliccard *card = slic_global.slic_card;
2699 struct physcard *physcard = slic_global.phys_card;
2700 ushort card_hostid;
2701 u16 __iomem *hostid_reg;
2702 uint i;
2703 uint rdhostid_offset = 0;
2704
2705 DBG_MSG("slicoss: %s adapter[%p] slot[%x] bus[%x] port[%x]\n",
2706 __func__, adapter, adapter->slotnumber, adapter->busnumber,
2707 adapter->port);
2708
2709 switch (adapter->devid) {
2710 case SLIC_2GB_DEVICE_ID:
2711 rdhostid_offset = SLIC_RDHOSTID_2GB;
2712 break;
2713 case SLIC_1GB_DEVICE_ID:
2714 rdhostid_offset = SLIC_RDHOSTID_1GB;
2715 break;
2716 default:
2717 ASSERT(0);
2718 break;
2719 }
2720
2721 hostid_reg =
2722 (u16 __iomem *) (((u8 __iomem *) (adapter->slic_regs)) +
2723 rdhostid_offset);
2724 DBG_MSG("slicoss: %s *hostid_reg[%p] == ", __func__, hostid_reg);
2725
2726 /* read the 16 bit hostid from SRAM */
2727 card_hostid = (ushort) readw(hostid_reg);
2728 DBG_MSG(" card_hostid[%x]\n", card_hostid);
2729
2730 /* Initialize a new card structure if need be */
2731 if (card_hostid == SLIC_HOSTID_DEFAULT) {
2732 card = kzalloc(sizeof(struct sliccard), GFP_KERNEL);
2733 if (card == NULL)
2734 return -ENOMEM;
2735
2736 card->next = slic_global.slic_card;
2737 slic_global.slic_card = card;
2738 #if DBG
2739 if (adapter->devid == SLIC_2GB_DEVICE_ID) {
2740 DBG_MSG
2741 ("SLICOSS ==> Initialize 2 Port Gigabit Server "
2742 "and Storage Accelerator\n");
2743 } else {
2744 DBG_MSG
2745 ("SLICOSS ==> Initialize 1 Port Gigabit Server "
2746 "and Storage Accelerator\n");
2747 }
2748 #endif
2749 card->busnumber = adapter->busnumber;
2750 card->slotnumber = adapter->slotnumber;
2751
2752 /* Find an available cardnum */
2753 for (i = 0; i < SLIC_MAX_CARDS; i++) {
2754 if (slic_global.cardnuminuse[i] == 0) {
2755 slic_global.cardnuminuse[i] = 1;
2756 card->cardnum = i;
2757 break;
2758 }
2759 }
2760 slic_global.num_slic_cards++;
2761 DBG_MSG("\nCARDNUM == %d Total %d Card[%p]\n\n",
2762 card->cardnum, slic_global.num_slic_cards, card);
2763
2764 slic_debug_card_create(card);
2765 } else {
2766 DBG_MSG
2767 ("slicoss: %s CARD already allocated, find the \
2768 correct card\n", __func__);
2769 /* Card exists, find the card this adapter belongs to */
2770 while (card) {
2771 DBG_MSG
2772 ("slicoss: %s card[%p] slot[%x] bus[%x] \
2773 adaptport[%p] hostid[%x] cardnum[%x]\n",
2774 __func__, card, card->slotnumber,
2775 card->busnumber, card->adapter[adapter->port],
2776 card_hostid, card->cardnum);
2777
2778 if (card->cardnum == card_hostid)
2779 break;
2780 card = card->next;
2781 }
2782 }
2783
2784 ASSERT(card);
2785 if (!card)
2786 return STATUS_FAILURE;
2787 /* Put the adapter in the card's adapter list */
2788 ASSERT(card->adapter[adapter->port] == NULL);
2789 if (!card->adapter[adapter->port]) {
2790 card->adapter[adapter->port] = adapter;
2791 adapter->card = card;
2792 }
2793
2794 card->card_size = 1; /* one port per *logical* card */
2795
2796 while (physcard) {
2797 for (i = 0; i < SLIC_MAX_PORTS; i++) {
2798 if (!physcard->adapter[i])
2799 continue;
2800 else
2801 break;
2802 }
2803 ASSERT(i != SLIC_MAX_PORTS);
2804 if (physcard->adapter[i]->slotnumber == adapter->slotnumber)
2805 break;
2806 physcard = physcard->next;
2807 }
2808 if (!physcard) {
2809 /* no structure allocated for this physical card yet */
2810 physcard = kzalloc(sizeof(struct physcard), GFP_ATOMIC);
2811 ASSERT(physcard);
2812
2813 DBG_MSG
2814 ("\n%s Allocate a PHYSICALcard:\n PHYSICAL_Card[%p]\n"
2815 " LogicalCard [%p]\n adapter [%p]\n",
2816 __func__, physcard, card, adapter);
2817
2818 physcard->next = slic_global.phys_card;
2819 slic_global.phys_card = physcard;
2820 physcard->adapters_allocd = 1;
2821 } else {
2822 physcard->adapters_allocd++;
2823 }
2824 /* Note - this is ZERO relative */
2825 adapter->physport = physcard->adapters_allocd - 1;
2826
2827 ASSERT(physcard->adapter[adapter->physport] == NULL);
2828 physcard->adapter[adapter->physport] = adapter;
2829 adapter->physcard = physcard;
2830 DBG_MSG(" PHYSICAL_Port %d Logical_Port %d\n", adapter->physport,
2831 adapter->port);
2832
2833 return 0;
2834 }
2835
2836 static void slic_soft_reset(struct adapter *adapter)
2837 {
2838 if (adapter->card->state == CARD_UP) {
2839 DBG_MSG("slicoss: %s QUIESCE adapter[%p] card[%p] devid[%x]\n",
2840 __func__, adapter, adapter->card, adapter->devid);
2841 WRITE_REG(adapter->slic_regs->slic_quiesce, 0, FLUSH);
2842 mdelay(1);
2843 }
2844 /* DBG_MSG ("slicoss: %s (%s) adapter[%p] card[%p] devid[%x]\n",
2845 __func__, adapter->netdev->name, adapter, adapter->card,
2846 adapter->devid); */
2847
2848 WRITE_REG(adapter->slic_regs->slic_reset, SLIC_RESET_MAGIC, FLUSH);
2849 mdelay(1);
2850 }
2851
2852 static void slic_config_set(struct adapter *adapter, bool linkchange)
2853 {
2854 u32 value;
2855 u32 RcrReset;
2856 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2857
2858 DBG_MSG("slicoss: %s (%s) slic_interface_enable[%p](%d)\n",
2859 __func__, adapter->netdev->name, adapter,
2860 adapter->cardindex);
2861
2862 if (linkchange) {
2863 /* Setup MAC */
2864 slic_mac_config(adapter);
2865 RcrReset = GRCR_RESET;
2866 } else {
2867 slic_mac_address_config(adapter);
2868 RcrReset = 0;
2869 }
2870
2871 if (adapter->linkduplex == LINK_FULLD) {
2872 /* setup xmtcfg */
2873 value = (GXCR_RESET | /* Always reset */
2874 GXCR_XMTEN | /* Enable transmit */
2875 GXCR_PAUSEEN); /* Enable pause */
2876
2877 DBG_MSG("slicoss: FDX adapt[%p] set xmtcfg to [%x]\n", adapter,
2878 value);
2879 WRITE_REG(slic_regs->slic_wxcfg, value, FLUSH);
2880
2881 /* Setup rcvcfg last */
2882 value = (RcrReset | /* Reset, if linkchange */
2883 GRCR_CTLEN | /* Enable CTL frames */
2884 GRCR_ADDRAEN | /* Address A enable */
2885 GRCR_RCVBAD | /* Rcv bad frames */
2886 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
2887 } else {
2888 /* setup xmtcfg */
2889 value = (GXCR_RESET | /* Always reset */
2890 GXCR_XMTEN); /* Enable transmit */
2891
2892 DBG_MSG("slicoss: HDX adapt[%p] set xmtcfg to [%x]\n", adapter,
2893 value);
2894 WRITE_REG(slic_regs->slic_wxcfg, value, FLUSH);
2895
2896 /* Setup rcvcfg last */
2897 value = (RcrReset | /* Reset, if linkchange */
2898 GRCR_ADDRAEN | /* Address A enable */
2899 GRCR_RCVBAD | /* Rcv bad frames */
2900 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
2901 }
2902
2903 if (adapter->state != ADAPT_DOWN) {
2904 /* Only enable receive if we are restarting or running */
2905 value |= GRCR_RCVEN;
2906 }
2907
2908 if (adapter->macopts & MAC_PROMISC)
2909 value |= GRCR_RCVALL;
2910
2911 DBG_MSG("slicoss: adapt[%p] set rcvcfg to [%x]\n", adapter, value);
2912 WRITE_REG(slic_regs->slic_wrcfg, value, FLUSH);
2913 }
2914
2915 /*
2916 * Turn off RCV and XMT, power down PHY
2917 */
2918 static void slic_config_clear(struct adapter *adapter)
2919 {
2920 u32 value;
2921 u32 phy_config;
2922 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2923
2924 /* Setup xmtcfg */
2925 value = (GXCR_RESET | /* Always reset */
2926 GXCR_PAUSEEN); /* Enable pause */
2927
2928 WRITE_REG(slic_regs->slic_wxcfg, value, FLUSH);
2929
2930 value = (GRCR_RESET | /* Always reset */
2931 GRCR_CTLEN | /* Enable CTL frames */
2932 GRCR_ADDRAEN | /* Address A enable */
2933 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
2934
2935 WRITE_REG(slic_regs->slic_wrcfg, value, FLUSH);
2936
2937 /* power down phy */
2938 phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN));
2939 WRITE_REG(slic_regs->slic_wphy, phy_config, FLUSH);
2940 }
2941
2942 static void slic_config_get(struct adapter *adapter, u32 config,
2943 u32 config_h)
2944 {
2945 int status;
2946
2947 status = slic_upr_request(adapter,
2948 SLIC_UPR_RCONFIG,
2949 (u32) config, (u32) config_h, 0, 0);
2950 ASSERT(status == 0);
2951 }
2952
2953 static void slic_mac_address_config(struct adapter *adapter)
2954 {
2955 u32 value;
2956 u32 value2;
2957 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2958
2959 value = *(u32 *) &adapter->currmacaddr[2];
2960 value = ntohl(value);
2961 WRITE_REG(slic_regs->slic_wraddral, value, FLUSH);
2962 WRITE_REG(slic_regs->slic_wraddrbl, value, FLUSH);
2963
2964 value2 = (u32) ((adapter->currmacaddr[0] << 8 |
2965 adapter->currmacaddr[1]) & 0xFFFF);
2966
2967 WRITE_REG(slic_regs->slic_wraddrah, value2, FLUSH);
2968 WRITE_REG(slic_regs->slic_wraddrbh, value2, FLUSH);
2969
2970 DBG_MSG("%s value1[%x] value2[%x] Call slic_mcast_set_mask\n",
2971 __func__, value, value2);
2972 slic_dbg_macaddrs(adapter);
2973
2974 /* Write our multicast mask out to the card. This is done */
2975 /* here in addition to the slic_mcast_addr_set routine */
2976 /* because ALL_MCAST may have been enabled or disabled */
2977 slic_mcast_set_mask(adapter);
2978 }
2979
2980 static void slic_mac_config(struct adapter *adapter)
2981 {
2982 u32 value;
2983 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2984
2985 /* Setup GMAC gaps */
2986 if (adapter->linkspeed == LINK_1000MB) {
2987 value = ((GMCR_GAPBB_1000 << GMCR_GAPBB_SHIFT) |
2988 (GMCR_GAPR1_1000 << GMCR_GAPR1_SHIFT) |
2989 (GMCR_GAPR2_1000 << GMCR_GAPR2_SHIFT));
2990 } else {
2991 value = ((GMCR_GAPBB_100 << GMCR_GAPBB_SHIFT) |
2992 (GMCR_GAPR1_100 << GMCR_GAPR1_SHIFT) |
2993 (GMCR_GAPR2_100 << GMCR_GAPR2_SHIFT));
2994 }
2995
2996 /* enable GMII */
2997 if (adapter->linkspeed == LINK_1000MB)
2998 value |= GMCR_GBIT;
2999
3000 /* enable fullduplex */
3001 if ((adapter->linkduplex == LINK_FULLD)
3002 || (adapter->macopts & MAC_LOOPBACK)) {
3003 value |= GMCR_FULLD;
3004 }
3005
3006 /* write mac config */
3007 WRITE_REG(slic_regs->slic_wmcfg, value, FLUSH);
3008
3009 /* setup mac addresses */
3010 slic_mac_address_config(adapter);
3011 }
3012
3013 static bool slic_mac_filter(struct adapter *adapter,
3014 struct ether_header *ether_frame)
3015 {
3016 u32 opts = adapter->macopts;
3017 u32 *dhost4 = (u32 *)&ether_frame->ether_dhost[0];
3018 u16 *dhost2 = (u16 *)&ether_frame->ether_dhost[4];
3019 bool equaladdr;
3020
3021 if (opts & MAC_PROMISC) {
3022 DBG_MSG("slicoss: %s (%s) PROMISCUOUS. Accept frame\n",
3023 __func__, adapter->netdev->name);
3024 return TRUE;
3025 }
3026
3027 if ((*dhost4 == 0xFFFFFFFF) && (*dhost2 == 0xFFFF)) {
3028 if (opts & MAC_BCAST) {
3029 adapter->rcv_broadcasts++;
3030 return TRUE;
3031 } else {
3032 return FALSE;
3033 }
3034 }
3035
3036 if (ether_frame->ether_dhost[0] & 0x01) {
3037 if (opts & MAC_ALLMCAST) {
3038 adapter->rcv_multicasts++;
3039 adapter->stats.multicast++;
3040 return TRUE;
3041 }
3042 if (opts & MAC_MCAST) {
3043 struct mcast_address *mcaddr = adapter->mcastaddrs;
3044
3045 while (mcaddr) {
3046 ETHER_EQ_ADDR(mcaddr->address,
3047 ether_frame->ether_dhost,
3048 equaladdr);
3049 if (equaladdr) {
3050 adapter->rcv_multicasts++;
3051 adapter->stats.multicast++;
3052 return TRUE;
3053 }
3054 mcaddr = mcaddr->next;
3055 }
3056 return FALSE;
3057 } else {
3058 return FALSE;
3059 }
3060 }
3061 if (opts & MAC_DIRECTED) {
3062 adapter->rcv_unicasts++;
3063 return TRUE;
3064 }
3065 return FALSE;
3066
3067 }
3068
3069 static int slic_mac_set_address(struct net_device *dev, void *ptr)
3070 {
3071 struct adapter *adapter = (struct adapter *)netdev_priv(dev);
3072 struct sockaddr *addr = ptr;
3073
3074 DBG_MSG("%s ENTER (%s)\n", __func__, adapter->netdev->name);
3075
3076 if (netif_running(dev))
3077 return -EBUSY;
3078 if (!adapter)
3079 return -EBUSY;
3080 DBG_MSG("slicoss: %s (%s) curr %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n",
3081 __func__, adapter->netdev->name, adapter->currmacaddr[0],
3082 adapter->currmacaddr[1], adapter->currmacaddr[2],
3083 adapter->currmacaddr[3], adapter->currmacaddr[4],
3084 adapter->currmacaddr[5]);
3085 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
3086 memcpy(adapter->currmacaddr, addr->sa_data, dev->addr_len);
3087 DBG_MSG("slicoss: %s (%s) new %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n",
3088 __func__, adapter->netdev->name, adapter->currmacaddr[0],
3089 adapter->currmacaddr[1], adapter->currmacaddr[2],
3090 adapter->currmacaddr[3], adapter->currmacaddr[4],
3091 adapter->currmacaddr[5]);
3092
3093 slic_config_set(adapter, TRUE);
3094 return 0;
3095 }
3096
3097 /*
3098 * slic_timer_get_stats
3099 *
3100 * Timer function used to suck the statistics out of the card every
3101 * 50 seconds or whatever STATS_TIMER_INTERVAL is set to.
3102 *
3103 */
3104 #if SLIC_GET_STATS_TIMER_ENABLED
3105 static void slic_timer_get_stats(ulong dev)
3106 {
3107 struct adapter *adapter;
3108 struct sliccard *card;
3109 struct slic_shmem *pshmem;
3110
3111 ASSERT(dev);
3112 adapter = netdev_priv((struct net_device *)dev);
3113 ASSERT(adapter);
3114 card = adapter->card;
3115 ASSERT(card);
3116
3117 if ((card->state == CARD_UP) &&
3118 (adapter->state == ADAPT_UP) && (adapter->linkstate == LINK_UP)) {
3119 pshmem = (struct slic_shmem *)adapter->phys_shmem;
3120 #ifdef CONFIG_X86_64
3121 slic_upr_request(adapter,
3122 SLIC_UPR_STATS,
3123 SLIC_GET_ADDR_LOW(&pshmem->inicstats),
3124 SLIC_GET_ADDR_HIGH(&pshmem->inicstats), 0, 0);
3125 #elif defined(CONFIG_X86)
3126 slic_upr_request(adapter,
3127 SLIC_UPR_STATS,
3128 (u32) &pshmem->inicstats, 0, 0, 0);
3129 #else
3130 Stop compilation;
3131 #endif
3132 } else {
3133 /* DBG_MSG ("slicoss: %s adapter[%p] linkstate[%x] NOT UP!\n",
3134 __func__, adapter, adapter->linkstate); */
3135 }
3136 adapter->statstimer.expires = jiffies +
3137 SLIC_SECS_TO_JIFFS(STATS_TIMER_INTERVAL);
3138 add_timer(&adapter->statstimer);
3139 }
3140 #endif
3141 static void slic_timer_load_check(ulong cardaddr)
3142 {
3143 struct sliccard *card = (struct sliccard *)cardaddr;
3144 struct adapter *adapter = card->master;
3145 u32 load = card->events;
3146 u32 level = 0;
3147
3148 if ((adapter) && (adapter->state == ADAPT_UP) &&
3149 (card->state == CARD_UP) && (slic_global.dynamic_intagg)) {
3150 if (adapter->devid == SLIC_1GB_DEVICE_ID) {
3151 if (adapter->linkspeed == LINK_1000MB)
3152 level = 100;
3153 else {
3154 if (load > SLIC_LOAD_5)
3155 level = SLIC_INTAGG_5;
3156 else if (load > SLIC_LOAD_4)
3157 level = SLIC_INTAGG_4;
3158 else if (load > SLIC_LOAD_3)
3159 level = SLIC_INTAGG_3;
3160 else if (load > SLIC_LOAD_2)
3161 level = SLIC_INTAGG_2;
3162 else if (load > SLIC_LOAD_1)
3163 level = SLIC_INTAGG_1;
3164 else
3165 level = SLIC_INTAGG_0;
3166 }
3167 if (card->loadlevel_current != level) {
3168 card->loadlevel_current = level;
3169 WRITE_REG(adapter->slic_regs->slic_intagg,
3170 level, FLUSH);
3171 }
3172 } else {
3173 if (load > SLIC_LOAD_5)
3174 level = SLIC_INTAGG_5;
3175 else if (load > SLIC_LOAD_4)
3176 level = SLIC_INTAGG_4;
3177 else if (load > SLIC_LOAD_3)
3178 level = SLIC_INTAGG_3;
3179 else if (load > SLIC_LOAD_2)
3180 level = SLIC_INTAGG_2;
3181 else if (load > SLIC_LOAD_1)
3182 level = SLIC_INTAGG_1;
3183 else
3184 level = SLIC_INTAGG_0;
3185 if (card->loadlevel_current != level) {
3186 card->loadlevel_current = level;
3187 WRITE_REG(adapter->slic_regs->slic_intagg,
3188 level, FLUSH);
3189 }
3190 }
3191 }
3192 card->events = 0;
3193 card->loadtimer.expires =
3194 jiffies + SLIC_SECS_TO_JIFFS(SLIC_LOADTIMER_PERIOD);
3195 add_timer(&card->loadtimer);
3196 }
3197
3198 static void slic_assert_fail(void)
3199 {
3200 u32 cpuid;
3201 u32 curr_pid;
3202 cpuid = smp_processor_id();
3203 curr_pid = current->pid;
3204
3205 DBG_ERROR("%s CPU # %d ---- PID # %d\n", __func__, cpuid, curr_pid);
3206 }
3207
3208 static int slic_upr_queue_request(struct adapter *adapter,
3209 u32 upr_request,
3210 u32 upr_data,
3211 u32 upr_data_h,
3212 u32 upr_buffer, u32 upr_buffer_h)
3213 {
3214 struct slic_upr *upr;
3215 struct slic_upr *uprqueue;
3216
3217 upr = kmalloc(sizeof(struct slic_upr), GFP_ATOMIC);
3218 if (!upr) {
3219 DBG_MSG("%s COULD NOT ALLOCATE UPR MEM\n", __func__);
3220
3221 return -ENOMEM;
3222 }
3223 upr->adapter = adapter->port;
3224 upr->upr_request = upr_request;
3225 upr->upr_data = upr_data;
3226 upr->upr_buffer = upr_buffer;
3227 upr->upr_data_h = upr_data_h;
3228 upr->upr_buffer_h = upr_buffer_h;
3229 upr->next = NULL;
3230 if (adapter->upr_list) {
3231 uprqueue = adapter->upr_list;
3232
3233 while (uprqueue->next)
3234 uprqueue = uprqueue->next;
3235 uprqueue->next = upr;
3236 } else {
3237 adapter->upr_list = upr;
3238 }
3239 return STATUS_SUCCESS;
3240 }
3241
3242 static int slic_upr_request(struct adapter *adapter,
3243 u32 upr_request,
3244 u32 upr_data,
3245 u32 upr_data_h,
3246 u32 upr_buffer, u32 upr_buffer_h)
3247 {
3248 int status;
3249
3250 spin_lock_irqsave(&adapter->upr_lock.lock, adapter->upr_lock.flags);
3251 status = slic_upr_queue_request(adapter,
3252 upr_request,
3253 upr_data,
3254 upr_data_h, upr_buffer, upr_buffer_h);
3255 if (status != STATUS_SUCCESS) {
3256 spin_unlock_irqrestore(&adapter->upr_lock.lock,
3257 adapter->upr_lock.flags);
3258 return status;
3259 }
3260 slic_upr_start(adapter);
3261 spin_unlock_irqrestore(&adapter->upr_lock.lock,
3262 adapter->upr_lock.flags);
3263 return STATUS_PENDING;
3264 }
3265
3266 static void slic_upr_request_complete(struct adapter *adapter, u32 isr)
3267 {
3268 struct sliccard *card = adapter->card;
3269 struct slic_upr *upr;
3270
3271 /* if (card->dump_requested) {
3272 DBG_MSG("ENTER slic_upr_request_complete Dump in progress ISR[%x]\n",
3273 isr);
3274 } */
3275 spin_lock_irqsave(&adapter->upr_lock.lock, adapter->upr_lock.flags);
3276 upr = adapter->upr_list;
3277 if (!upr) {
3278 ASSERT(0);
3279 spin_unlock_irqrestore(&adapter->upr_lock.lock,
3280 adapter->upr_lock.flags);
3281 return;
3282 }
3283 adapter->upr_list = upr->next;
3284 upr->next = NULL;
3285 adapter->upr_busy = 0;
3286 ASSERT(adapter->port == upr->adapter);
3287 switch (upr->upr_request) {
3288 case SLIC_UPR_STATS:
3289 {
3290 #if SLIC_GET_STATS_ENABLED
3291 struct slic_stats *slicstats =
3292 (struct slic_stats *) &adapter->pshmem->inicstats;
3293 struct slic_stats *newstats = slicstats;
3294 struct slic_stats *old = &adapter->inicstats_prev;
3295 struct slicnet_stats *stst = &adapter->slic_stats;
3296 #endif
3297 if (isr & ISR_UPCERR) {
3298 DBG_ERROR
3299 ("SLIC_UPR_STATS command failed isr[%x]\n",
3300 isr);
3301
3302 break;
3303 }
3304 #if SLIC_GET_STATS_ENABLED
3305 /* DBG_MSG ("slicoss: %s rcv %lx:%lx:%lx:%lx:%lx %lx %lx "
3306 "xmt %lx:%lx:%lx:%lx:%lx %lx %lx\n",
3307 __func__,
3308 slicstats->rcv_unicasts100,
3309 slicstats->rcv_bytes100,
3310 slicstats->rcv_bytes100,
3311 slicstats->rcv_tcp_bytes100,
3312 slicstats->rcv_tcp_segs100,
3313 slicstats->rcv_other_error100,
3314 slicstats->rcv_drops100,
3315 slicstats->xmit_unicasts100,
3316 slicstats->xmit_bytes100,
3317 slicstats->xmit_bytes100,
3318 slicstats->xmit_tcp_bytes100,
3319 slicstats->xmit_tcp_segs100,
3320 slicstats->xmit_other_error100,
3321 slicstats->xmit_collisions100);*/
3322 UPDATE_STATS_GB(stst->tcp.xmit_tcp_segs,
3323 newstats->xmit_tcp_segs_gb,
3324 old->xmit_tcp_segs_gb);
3325
3326 UPDATE_STATS_GB(stst->tcp.xmit_tcp_bytes,
3327 newstats->xmit_tcp_bytes_gb,
3328 old->xmit_tcp_bytes_gb);
3329
3330 UPDATE_STATS_GB(stst->tcp.rcv_tcp_segs,
3331 newstats->rcv_tcp_segs_gb,
3332 old->rcv_tcp_segs_gb);
3333
3334 UPDATE_STATS_GB(stst->tcp.rcv_tcp_bytes,
3335 newstats->rcv_tcp_bytes_gb,
3336 old->rcv_tcp_bytes_gb);
3337
3338 UPDATE_STATS_GB(stst->iface.xmt_bytes,
3339 newstats->xmit_bytes_gb,
3340 old->xmit_bytes_gb);
3341
3342 UPDATE_STATS_GB(stst->iface.xmt_ucast,
3343 newstats->xmit_unicasts_gb,
3344 old->xmit_unicasts_gb);
3345
3346 UPDATE_STATS_GB(stst->iface.rcv_bytes,
3347 newstats->rcv_bytes_gb,
3348 old->rcv_bytes_gb);
3349
3350 UPDATE_STATS_GB(stst->iface.rcv_ucast,
3351 newstats->rcv_unicasts_gb,
3352 old->rcv_unicasts_gb);
3353
3354 UPDATE_STATS_GB(stst->iface.xmt_errors,
3355 newstats->xmit_collisions_gb,
3356 old->xmit_collisions_gb);
3357
3358 UPDATE_STATS_GB(stst->iface.xmt_errors,
3359 newstats->xmit_excess_collisions_gb,
3360 old->xmit_excess_collisions_gb);
3361
3362 UPDATE_STATS_GB(stst->iface.xmt_errors,
3363 newstats->xmit_other_error_gb,
3364 old->xmit_other_error_gb);
3365
3366 UPDATE_STATS_GB(stst->iface.rcv_errors,
3367 newstats->rcv_other_error_gb,
3368 old->rcv_other_error_gb);
3369
3370 UPDATE_STATS_GB(stst->iface.rcv_discards,
3371 newstats->rcv_drops_gb,
3372 old->rcv_drops_gb);
3373
3374 if (newstats->rcv_drops_gb > old->rcv_drops_gb) {
3375 adapter->rcv_drops +=
3376 (newstats->rcv_drops_gb -
3377 old->rcv_drops_gb);
3378 }
3379 memcpy(old, newstats, sizeof(struct slic_stats));
3380 #endif
3381 break;
3382 }
3383 case SLIC_UPR_RLSR:
3384 slic_link_upr_complete(adapter, isr);
3385 break;
3386 case SLIC_UPR_RCONFIG:
3387 break;
3388 case SLIC_UPR_RPHY:
3389 ASSERT(0);
3390 break;
3391 case SLIC_UPR_ENLB:
3392 ASSERT(0);
3393 break;
3394 case SLIC_UPR_ENCT:
3395 ASSERT(0);
3396 break;
3397 case SLIC_UPR_PDWN:
3398 ASSERT(0);
3399 break;
3400 case SLIC_UPR_PING:
3401 card->pingstatus |= (isr & ISR_PINGDSMASK);
3402 break;
3403 #if SLIC_DUMP_ENABLED
3404 case SLIC_UPR_DUMP:
3405 card->dumpstatus |= (isr & ISR_UPCMASK);
3406 break;
3407 #endif
3408 default:
3409 ASSERT(0);
3410 }
3411 kfree(upr);
3412 slic_upr_start(adapter);
3413 spin_unlock_irqrestore(&adapter->upr_lock.lock,
3414 adapter->upr_lock.flags);
3415 }
3416
3417 static void slic_upr_start(struct adapter *adapter)
3418 {
3419 struct slic_upr *upr;
3420 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
3421 /*
3422 char * ptr1;
3423 char * ptr2;
3424 uint cmdoffset;
3425 */
3426 upr = adapter->upr_list;
3427 if (!upr)
3428 return;
3429 if (adapter->upr_busy)
3430 return;
3431 adapter->upr_busy = 1;
3432
3433 switch (upr->upr_request) {
3434 case SLIC_UPR_STATS:
3435 if (upr->upr_data_h == 0) {
3436 WRITE_REG(slic_regs->slic_stats, upr->upr_data, FLUSH);
3437 } else {
3438 WRITE_REG64(adapter,
3439 slic_regs->slic_stats64,
3440 upr->upr_data,
3441 slic_regs->slic_addr_upper,
3442 upr->upr_data_h, FLUSH);
3443 }
3444 break;
3445
3446 case SLIC_UPR_RLSR:
3447 WRITE_REG64(adapter,
3448 slic_regs->slic_rlsr,
3449 upr->upr_data,
3450 slic_regs->slic_addr_upper, upr->upr_data_h, FLUSH);
3451 break;
3452
3453 case SLIC_UPR_RCONFIG:
3454 DBG_MSG("%s SLIC_UPR_RCONFIG!!!!\n", __func__);
3455 DBG_MSG("WRITE_REG64 adapter[%p]\n"
3456 " a->slic_regs[%p] slic_regs[%p]\n"
3457 " &slic_rconfig[%p] &slic_addr_upper[%p]\n"
3458 " upr[%p]\n"
3459 " uprdata[%x] uprdatah[%x]\n",
3460 adapter, adapter->slic_regs, slic_regs,
3461 &slic_regs->slic_rconfig, &slic_regs->slic_addr_upper,
3462 upr, upr->upr_data, upr->upr_data_h);
3463 WRITE_REG64(adapter,
3464 slic_regs->slic_rconfig,
3465 upr->upr_data,
3466 slic_regs->slic_addr_upper, upr->upr_data_h, FLUSH);
3467 break;
3468 #if SLIC_DUMP_ENABLED
3469 case SLIC_UPR_DUMP:
3470 #if 0
3471 DBG_MSG("%s SLIC_UPR_DUMP!!!!\n", __func__);
3472 DBG_MSG("WRITE_REG64 adapter[%p]\n"
3473 " upr_buffer[%x] upr_bufferh[%x]\n"
3474 " upr_data[%x] upr_datah[%x]\n"
3475 " cmdbuff[%p] cmdbuffP[%p]\n"
3476 " dumpbuff[%p] dumpbuffP[%p]\n",
3477 adapter, upr->upr_buffer, upr->upr_buffer_h,
3478 upr->upr_data, upr->upr_data_h,
3479 adapter->card->cmdbuffer,
3480 (void *)adapter->card->cmdbuffer_phys,
3481 adapter->card->dumpbuffer, (
3482 void *)adapter->card->dumpbuffer_phys);
3483
3484 ptr1 = (char *)slic_regs;
3485 ptr2 = (char *)(&slic_regs->slic_dump_cmd);
3486 cmdoffset = ptr2 - ptr1;
3487 DBG_MSG("slic_dump_cmd register offset [%x]\n", cmdoffset);
3488 #endif
3489 if (upr->upr_buffer || upr->upr_buffer_h) {
3490 WRITE_REG64(adapter,
3491 slic_regs->slic_dump_data,
3492 upr->upr_buffer,
3493 slic_regs->slic_addr_upper,
3494 upr->upr_buffer_h, FLUSH);
3495 }
3496 WRITE_REG64(adapter,
3497 slic_regs->slic_dump_cmd,
3498 upr->upr_data,
3499 slic_regs->slic_addr_upper, upr->upr_data_h, FLUSH);
3500 break;
3501 #endif
3502 case SLIC_UPR_PING:
3503 WRITE_REG(slic_regs->slic_ping, 1, FLUSH);
3504 break;
3505 default:
3506 ASSERT(0);
3507 }
3508 }
3509
3510 static void slic_link_upr_complete(struct adapter *adapter, u32 isr)
3511 {
3512 u32 linkstatus = adapter->pshmem->linkstatus;
3513 uint linkup;
3514 unsigned char linkspeed;
3515 unsigned char linkduplex;
3516
3517 DBG_MSG("%s: %s ISR[%x] linkstatus[%x]\n adapter[%p](%d)\n",
3518 __func__, adapter->netdev->name, isr, linkstatus, adapter,
3519 adapter->cardindex);
3520
3521 if ((isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) {
3522 struct slic_shmem *pshmem;
3523
3524 pshmem = (struct slic_shmem *)adapter->phys_shmem;
3525 #if defined(CONFIG_X86_64)
3526 slic_upr_queue_request(adapter,
3527 SLIC_UPR_RLSR,
3528 SLIC_GET_ADDR_LOW(&pshmem->linkstatus),
3529 SLIC_GET_ADDR_HIGH(&pshmem->linkstatus),
3530 0, 0);
3531 #elif defined(CONFIG_X86)
3532 slic_upr_queue_request(adapter,
3533 SLIC_UPR_RLSR,
3534 (u32) &pshmem->linkstatus,
3535 SLIC_GET_ADDR_HIGH(pshmem), 0, 0);
3536 #else
3537 Stop Compilation;
3538 #endif
3539 return;
3540 }
3541 if (adapter->state != ADAPT_UP)
3542 return;
3543
3544 ASSERT((adapter->devid == SLIC_1GB_DEVICE_ID)
3545 || (adapter->devid == SLIC_2GB_DEVICE_ID));
3546
3547 linkup = linkstatus & GIG_LINKUP ? LINK_UP : LINK_DOWN;
3548 if (linkstatus & GIG_SPEED_1000) {
3549 linkspeed = LINK_1000MB;
3550 DBG_MSG("slicoss: %s (%s) GIGABIT Speed==1000MB ",
3551 __func__, adapter->netdev->name);
3552 } else if (linkstatus & GIG_SPEED_100) {
3553 linkspeed = LINK_100MB;
3554 DBG_MSG("slicoss: %s (%s) GIGABIT Speed==100MB ", __func__,
3555 adapter->netdev->name);
3556 } else {
3557 linkspeed = LINK_10MB;
3558 DBG_MSG("slicoss: %s (%s) GIGABIT Speed==10MB ", __func__,
3559 adapter->netdev->name);
3560 }
3561 if (linkstatus & GIG_FULLDUPLEX) {
3562 linkduplex = LINK_FULLD;
3563 DBG_MSG(" Duplex == FULL\n");
3564 } else {
3565 linkduplex = LINK_HALFD;
3566 DBG_MSG(" Duplex == HALF\n");
3567 }
3568
3569 if ((adapter->linkstate == LINK_DOWN) && (linkup == LINK_DOWN)) {
3570 DBG_MSG("slicoss: %s (%s) physport(%d) link still down\n",
3571 __func__, adapter->netdev->name, adapter->physport);
3572 return;
3573 }
3574
3575 /* link up event, but nothing has changed */
3576 if ((adapter->linkstate == LINK_UP) &&
3577 (linkup == LINK_UP) &&
3578 (adapter->linkspeed == linkspeed) &&
3579 (adapter->linkduplex == linkduplex)) {
3580 DBG_MSG("slicoss: %s (%s) port(%d) link still up\n",
3581 __func__, adapter->netdev->name, adapter->physport);
3582 return;
3583 }
3584
3585 /* link has changed at this point */
3586
3587 /* link has gone from up to down */
3588 if (linkup == LINK_DOWN) {
3589 adapter->linkstate = LINK_DOWN;
3590 DBG_MSG("slicoss: %s %d LinkDown!\n", __func__,
3591 adapter->physport);
3592 return;
3593 }
3594
3595 /* link has gone from down to up */
3596 adapter->linkspeed = linkspeed;
3597 adapter->linkduplex = linkduplex;
3598
3599 if (adapter->linkstate != LINK_UP) {
3600 /* setup the mac */
3601 DBG_MSG("%s call slic_config_set\n", __func__);
3602 slic_config_set(adapter, TRUE);
3603 adapter->linkstate = LINK_UP;
3604 DBG_MSG("\n(%s) Link UP: CALL slic_if_start_queue",
3605 adapter->netdev->name);
3606 slic_if_start_queue(adapter);
3607 }
3608 #if 1
3609 switch (linkspeed) {
3610 case LINK_1000MB:
3611 DBG_MSG
3612 ("\n(%s) LINK UP!: GIGABIT SPEED == 1000MB duplex[%x]\n",
3613 adapter->netdev->name, adapter->linkduplex);
3614 break;
3615 case LINK_100MB:
3616 DBG_MSG("\n(%s) LINK UP!: SPEED == 100MB duplex[%x]\n",
3617 adapter->netdev->name, adapter->linkduplex);
3618 break;
3619 default:
3620 DBG_MSG("\n(%s) LINK UP!: SPEED == 10MB duplex[%x]\n",
3621 adapter->netdev->name, adapter->linkduplex);
3622 break;
3623 }
3624 #endif
3625 }
3626
3627 /*
3628 * this is here to checksum the eeprom, there is some ucode bug
3629 * which prevens us from using the ucode result.
3630 * remove this once ucode is fixed.
3631 */
3632 static ushort slic_eeprom_cksum(char *m, int len)
3633 {
3634 #define ADDCARRY(x) (x > 65535 ? x -= 65535 : x)
3635 #define REDUCE {l_util.l = sum; sum = l_util.s[0] + l_util.s[1]; ADDCARRY(sum);\
3636 }
3637
3638 u16 *w;
3639 u32 sum = 0;
3640 u32 byte_swapped = 0;
3641 u32 w_int;
3642
3643 union {
3644 char c[2];
3645 ushort s;
3646 } s_util;
3647
3648 union {
3649 ushort s[2];
3650 int l;
3651 } l_util;
3652
3653 l_util.l = 0;
3654 s_util.s = 0;
3655
3656 w = (u16 *)m;
3657 #ifdef CONFIG_X86_64
3658 w_int = (u32) ((ulong) w & 0x00000000FFFFFFFF);
3659 #else
3660 w_int = (u32) (w);
3661 #endif
3662 if ((1 & w_int) && (len > 0)) {
3663 REDUCE;
3664 sum <<= 8;
3665 s_util.c[0] = *(unsigned char *)w;
3666 w = (u16 *)((char *)w + 1);
3667 len--;
3668 byte_swapped = 1;
3669 }
3670
3671 /* Unroll the loop to make overhead from branches &c small. */
3672 while ((len -= 32) >= 0) {
3673 sum += w[0];
3674 sum += w[1];
3675 sum += w[2];
3676 sum += w[3];
3677 sum += w[4];
3678 sum += w[5];
3679 sum += w[6];
3680 sum += w[7];
3681 sum += w[8];
3682 sum += w[9];
3683 sum += w[10];
3684 sum += w[11];
3685 sum += w[12];
3686 sum += w[13];
3687 sum += w[14];
3688 sum += w[15];
3689 w = (u16 *)((ulong) w + 16); /* verify */
3690 }
3691 len += 32;
3692 while ((len -= 8) >= 0) {
3693 sum += w[0];
3694 sum += w[1];
3695 sum += w[2];
3696 sum += w[3];
3697 w = (u16 *)((ulong) w + 4); /* verify */
3698 }
3699 len += 8;
3700 if (len != 0 || byte_swapped != 0) {
3701 REDUCE;
3702 while ((len -= 2) >= 0)
3703 sum += *w++; /* verify */
3704 if (byte_swapped) {
3705 REDUCE;
3706 sum <<= 8;
3707 byte_swapped = 0;
3708 if (len == -1) {
3709 s_util.c[1] = *(char *) w;
3710 sum += s_util.s;
3711 len = 0;
3712 } else {
3713 len = -1;
3714 }
3715
3716 } else if (len == -1) {
3717 s_util.c[0] = *(char *) w;
3718 }
3719
3720 if (len == -1) {
3721 s_util.c[1] = 0;
3722 sum += s_util.s;
3723 }
3724 }
3725 REDUCE;
3726 return (ushort) sum;
3727 }
3728
3729 static int slic_rspqueue_init(struct adapter *adapter)
3730 {
3731 int i;
3732 struct slic_rspqueue *rspq = &adapter->rspqueue;
3733 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
3734 u32 paddrh = 0;
3735
3736 DBG_MSG("slicoss: %s (%s) ENTER adapter[%p]\n", __func__,
3737 adapter->netdev->name, adapter);
3738 ASSERT(adapter->state == ADAPT_DOWN);
3739 memset(rspq, 0, sizeof(struct slic_rspqueue));
3740
3741 rspq->num_pages = SLIC_RSPQ_PAGES_GB;
3742
3743 for (i = 0; i < rspq->num_pages; i++) {
3744 rspq->vaddr[i] =
3745 pci_alloc_consistent(adapter->pcidev, PAGE_SIZE,
3746 &rspq->paddr[i]);
3747 if (!rspq->vaddr[i]) {
3748 DBG_ERROR
3749 ("rspqueue_init_failed pci_alloc_consistent\n");
3750 slic_rspqueue_free(adapter);
3751 return STATUS_FAILURE;
3752 }
3753 #ifndef CONFIG_X86_64
3754 ASSERT(((u32) rspq->vaddr[i] & 0xFFFFF000) ==
3755 (u32) rspq->vaddr[i]);
3756 ASSERT(((u32) rspq->paddr[i] & 0xFFFFF000) ==
3757 (u32) rspq->paddr[i]);
3758 #endif
3759 memset(rspq->vaddr[i], 0, PAGE_SIZE);
3760 /* DBG_MSG("slicoss: %s UPLOAD RSPBUFF Page pageix[%x] paddr[%p] "
3761 "vaddr[%p]\n",
3762 __func__, i, (void *)rspq->paddr[i], rspq->vaddr[i]); */
3763
3764 if (paddrh == 0) {
3765 WRITE_REG(slic_regs->slic_rbar,
3766 (rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE),
3767 DONT_FLUSH);
3768 } else {
3769 WRITE_REG64(adapter,
3770 slic_regs->slic_rbar64,
3771 (rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE),
3772 slic_regs->slic_addr_upper,
3773 paddrh, DONT_FLUSH);
3774 }
3775 }
3776 rspq->offset = 0;
3777 rspq->pageindex = 0;
3778 rspq->rspbuf = (struct slic_rspbuf *)rspq->vaddr[0];
3779 DBG_MSG("slicoss: %s (%s) EXIT adapter[%p]\n", __func__,
3780 adapter->netdev->name, adapter);
3781 return STATUS_SUCCESS;
3782 }
3783
3784 static int slic_rspqueue_reset(struct adapter *adapter)
3785 {
3786 struct slic_rspqueue *rspq = &adapter->rspqueue;
3787
3788 DBG_MSG("slicoss: %s (%s) ENTER adapter[%p]\n", __func__,
3789 adapter->netdev->name, adapter);
3790 ASSERT(adapter->state == ADAPT_DOWN);
3791 ASSERT(rspq);
3792
3793 DBG_MSG("slicoss: Nothing to do. rspq[%p]\n"
3794 " offset[%x]\n"
3795 " pageix[%x]\n"
3796 " rspbuf[%p]\n",
3797 rspq, rspq->offset, rspq->pageindex, rspq->rspbuf);
3798
3799 DBG_MSG("slicoss: %s (%s) EXIT adapter[%p]\n", __func__,
3800 adapter->netdev->name, adapter);
3801 return STATUS_SUCCESS;
3802 }
3803
3804 static void slic_rspqueue_free(struct adapter *adapter)
3805 {
3806 int i;
3807 struct slic_rspqueue *rspq = &adapter->rspqueue;
3808
3809 DBG_MSG("slicoss: %s adapter[%p] port %d rspq[%p] FreeRSPQ\n",
3810 __func__, adapter, adapter->physport, rspq);
3811 for (i = 0; i < rspq->num_pages; i++) {
3812 if (rspq->vaddr[i]) {
3813 DBG_MSG
3814 ("slicoss: pci_free_consistent rspq->vaddr[%p] \
3815 paddr[%p]\n",
3816 rspq->vaddr[i], (void *) rspq->paddr[i]);
3817 pci_free_consistent(adapter->pcidev, PAGE_SIZE,
3818 rspq->vaddr[i], rspq->paddr[i]);
3819 }
3820 rspq->vaddr[i] = NULL;
3821 rspq->paddr[i] = 0;
3822 }
3823 rspq->offset = 0;
3824 rspq->pageindex = 0;
3825 rspq->rspbuf = NULL;
3826 }
3827
3828 static struct slic_rspbuf *slic_rspqueue_getnext(struct adapter *adapter)
3829 {
3830 struct slic_rspqueue *rspq = &adapter->rspqueue;
3831 struct slic_rspbuf *buf;
3832
3833 if (!(rspq->rspbuf->status))
3834 return NULL;
3835
3836 buf = rspq->rspbuf;
3837 #ifndef CONFIG_X86_64
3838 ASSERT((buf->status & 0xFFFFFFE0) == 0);
3839 #endif
3840 ASSERT(buf->hosthandle);
3841 if (++rspq->offset < SLIC_RSPQ_BUFSINPAGE) {
3842 rspq->rspbuf++;
3843 #ifndef CONFIG_X86_64
3844 ASSERT(((u32) rspq->rspbuf & 0xFFFFFFE0) ==
3845 (u32) rspq->rspbuf);
3846 #endif
3847 } else {
3848 ASSERT(rspq->offset == SLIC_RSPQ_BUFSINPAGE);
3849 WRITE_REG64(adapter,
3850 adapter->slic_regs->slic_rbar64,
3851 (rspq->
3852 paddr[rspq->pageindex] | SLIC_RSPQ_BUFSINPAGE),
3853 adapter->slic_regs->slic_addr_upper, 0, DONT_FLUSH);
3854 rspq->pageindex = (++rspq->pageindex) % rspq->num_pages;
3855 rspq->offset = 0;
3856 rspq->rspbuf = (struct slic_rspbuf *)
3857 rspq->vaddr[rspq->pageindex];
3858 #ifndef CONFIG_X86_64
3859 ASSERT(((u32) rspq->rspbuf & 0xFFFFF000) ==
3860 (u32) rspq->rspbuf);
3861 #endif
3862 }
3863 #ifndef CONFIG_X86_64
3864 ASSERT(((u32) buf & 0xFFFFFFE0) == (u32) buf);
3865 #endif
3866 return buf;
3867 }
3868
3869 static void slic_cmdqmem_init(struct adapter *adapter)
3870 {
3871 struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem;
3872
3873 memset(cmdqmem, 0, sizeof(struct slic_cmdqmem));
3874 }
3875
3876 static void slic_cmdqmem_free(struct adapter *adapter)
3877 {
3878 struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem;
3879 int i;
3880
3881 DBG_MSG("slicoss: (%s) adapter[%p] port %d rspq[%p] Free CMDQ Memory\n",
3882 __func__, adapter, adapter->physport, cmdqmem);
3883 for (i = 0; i < SLIC_CMDQ_MAXPAGES; i++) {
3884 if (cmdqmem->pages[i]) {
3885 DBG_MSG("slicoss: %s Deallocate page CmdQPage[%p]\n",
3886 __func__, (void *) cmdqmem->pages[i]);
3887 pci_free_consistent(adapter->pcidev,
3888 PAGE_SIZE,
3889 (void *) cmdqmem->pages[i],
3890 cmdqmem->dma_pages[i]);
3891 }
3892 }
3893 memset(cmdqmem, 0, sizeof(struct slic_cmdqmem));
3894 }
3895
3896 static u32 *slic_cmdqmem_addpage(struct adapter *adapter)
3897 {
3898 struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem;
3899 u32 *pageaddr;
3900
3901 if (cmdqmem->pagecnt >= SLIC_CMDQ_MAXPAGES)
3902 return NULL;
3903 pageaddr = pci_alloc_consistent(adapter->pcidev,
3904 PAGE_SIZE,
3905 &cmdqmem->dma_pages[cmdqmem->pagecnt]);
3906 if (!pageaddr)
3907 return NULL;
3908 #ifndef CONFIG_X86_64
3909 ASSERT(((u32) pageaddr & 0xFFFFF000) == (u32) pageaddr);
3910 #endif
3911 cmdqmem->pages[cmdqmem->pagecnt] = pageaddr;
3912 cmdqmem->pagecnt++;
3913 return pageaddr;
3914 }
3915
3916 static int slic_cmdq_init(struct adapter *adapter)
3917 {
3918 int i;
3919 u32 *pageaddr;
3920
3921 DBG_MSG("slicoss: %s ENTER adapter[%p]\n", __func__, adapter);
3922 ASSERT(adapter->state == ADAPT_DOWN);
3923 memset(&adapter->cmdq_all, 0, sizeof(struct slic_cmdqueue));
3924 memset(&adapter->cmdq_free, 0, sizeof(struct slic_cmdqueue));
3925 memset(&adapter->cmdq_done, 0, sizeof(struct slic_cmdqueue));
3926 spin_lock_init(&adapter->cmdq_all.lock.lock);
3927 spin_lock_init(&adapter->cmdq_free.lock.lock);
3928 spin_lock_init(&adapter->cmdq_done.lock.lock);
3929 slic_cmdqmem_init(adapter);
3930 adapter->slic_handle_ix = 1;
3931 for (i = 0; i < SLIC_CMDQ_INITPAGES; i++) {
3932 pageaddr = slic_cmdqmem_addpage(adapter);
3933 #ifndef CONFIG_X86_64
3934 ASSERT(((u32) pageaddr & 0xFFFFF000) == (u32) pageaddr);
3935 #endif
3936 if (!pageaddr) {
3937 slic_cmdq_free(adapter);
3938 return STATUS_FAILURE;
3939 }
3940 slic_cmdq_addcmdpage(adapter, pageaddr);
3941 }
3942 adapter->slic_handle_ix = 1;
3943 DBG_MSG("slicoss: %s reset slic_handle_ix to ONE\n", __func__);
3944
3945 return STATUS_SUCCESS;
3946 }
3947
3948 static void slic_cmdq_free(struct adapter *adapter)
3949 {
3950 struct slic_hostcmd *cmd;
3951
3952 DBG_MSG("slicoss: %s adapter[%p] port %d FreeCommandsFrom CMDQ\n",
3953 __func__, adapter, adapter->physport);
3954 cmd = adapter->cmdq_all.head;
3955 while (cmd) {
3956 if (cmd->busy) {
3957 struct sk_buff *tempskb;
3958
3959 tempskb = cmd->skb;
3960 if (tempskb) {
3961 cmd->skb = NULL;
3962 dev_kfree_skb_irq(tempskb);
3963 }
3964 }
3965 cmd = cmd->next_all;
3966 }
3967 memset(&adapter->cmdq_all, 0, sizeof(struct slic_cmdqueue));
3968 memset(&adapter->cmdq_free, 0, sizeof(struct slic_cmdqueue));
3969 memset(&adapter->cmdq_done, 0, sizeof(struct slic_cmdqueue));
3970 slic_cmdqmem_free(adapter);
3971 }
3972
3973 static void slic_cmdq_reset(struct adapter *adapter)
3974 {
3975 struct slic_hostcmd *hcmd;
3976 struct sk_buff *skb;
3977 u32 outstanding;
3978
3979 DBG_MSG("%s ENTER adapter[%p]\n", __func__, adapter);
3980 spin_lock_irqsave(&adapter->cmdq_free.lock.lock,
3981 adapter->cmdq_free.lock.flags);
3982 spin_lock_irqsave(&adapter->cmdq_done.lock.lock,
3983 adapter->cmdq_done.lock.flags);
3984 outstanding = adapter->cmdq_all.count - adapter->cmdq_done.count;
3985 outstanding -= adapter->cmdq_free.count;
3986 hcmd = adapter->cmdq_all.head;
3987 while (hcmd) {
3988 if (hcmd->busy) {
3989 skb = hcmd->skb;
3990 ASSERT(skb);
3991 DBG_MSG("slicoss: %s hcmd[%p] skb[%p] ", __func__,
3992 hcmd, skb);
3993 hcmd->busy = 0;
3994 hcmd->skb = NULL;
3995 DBG_MSG(" Free SKB\n");
3996 dev_kfree_skb_irq(skb);
3997 }
3998 hcmd = hcmd->next_all;
3999 }
4000 adapter->cmdq_free.count = 0;
4001 adapter->cmdq_free.head = NULL;
4002 adapter->cmdq_free.tail = NULL;
4003 adapter->cmdq_done.count = 0;
4004 adapter->cmdq_done.head = NULL;
4005 adapter->cmdq_done.tail = NULL;
4006 adapter->cmdq_free.head = adapter->cmdq_all.head;
4007 hcmd = adapter->cmdq_all.head;
4008 while (hcmd) {
4009 adapter->cmdq_free.count++;
4010 hcmd->next = hcmd->next_all;
4011 hcmd = hcmd->next_all;
4012 }
4013 if (adapter->cmdq_free.count != adapter->cmdq_all.count) {
4014 DBG_ERROR("%s free_count %d != all count %d\n", __func__,
4015 adapter->cmdq_free.count, adapter->cmdq_all.count);
4016 }
4017 spin_unlock_irqrestore(&adapter->cmdq_done.lock.lock,
4018 adapter->cmdq_done.lock.flags);
4019 spin_unlock_irqrestore(&adapter->cmdq_free.lock.lock,
4020 adapter->cmdq_free.lock.flags);
4021 DBG_MSG("%s EXIT adapter[%p]\n", __func__, adapter);
4022 }
4023
4024 static void slic_cmdq_addcmdpage(struct adapter *adapter, u32 *page)
4025 {
4026 struct slic_hostcmd *cmd;
4027 struct slic_hostcmd *prev;
4028 struct slic_hostcmd *tail;
4029 struct slic_cmdqueue *cmdq;
4030 int cmdcnt;
4031 void *cmdaddr;
4032 ulong phys_addr;
4033 u32 phys_addrl;
4034 u32 phys_addrh;
4035 struct slic_handle *pslic_handle;
4036
4037 cmdaddr = page;
4038 cmd = (struct slic_hostcmd *)cmdaddr;
4039 /* DBG_MSG("CMDQ Page addr[%p] ix[%d] pfree[%p]\n", cmdaddr, slic_handle_ix,
4040 adapter->pfree_slic_handles); */
4041 cmdcnt = 0;
4042
4043 phys_addr = virt_to_bus((void *)page);
4044 phys_addrl = SLIC_GET_ADDR_LOW(phys_addr);
4045 phys_addrh = SLIC_GET_ADDR_HIGH(phys_addr);
4046
4047 prev = NULL;
4048 tail = cmd;
4049 while ((cmdcnt < SLIC_CMDQ_CMDSINPAGE) &&
4050 (adapter->slic_handle_ix < 256)) {
4051 /* Allocate and initialize a SLIC_HANDLE for this command */
4052 SLIC_GET_SLIC_HANDLE(adapter, pslic_handle);
4053 if (pslic_handle == NULL)
4054 ASSERT(0);
4055 ASSERT(pslic_handle ==
4056 &adapter->slic_handles[pslic_handle->token.
4057 handle_index]);
4058 pslic_handle->type = SLIC_HANDLE_CMD;
4059 pslic_handle->address = (void *) cmd;
4060 pslic_handle->offset = (ushort) adapter->slic_handle_ix++;
4061 pslic_handle->other_handle = NULL;
4062 pslic_handle->next = NULL;
4063
4064 cmd->pslic_handle = pslic_handle;
4065 cmd->cmd64.hosthandle = pslic_handle->token.handle_token;
4066 cmd->busy = FALSE;
4067 cmd->paddrl = phys_addrl;
4068 cmd->paddrh = phys_addrh;
4069 cmd->next_all = prev;
4070 cmd->next = prev;
4071 prev = cmd;
4072 phys_addrl += SLIC_HOSTCMD_SIZE;
4073 cmdaddr += SLIC_HOSTCMD_SIZE;
4074
4075 cmd = (struct slic_hostcmd *)cmdaddr;
4076 cmdcnt++;
4077 }
4078
4079 cmdq = &adapter->cmdq_all;
4080 cmdq->count += cmdcnt; /* SLIC_CMDQ_CMDSINPAGE; mooktodo */
4081 tail->next_all = cmdq->head;
4082 ASSERT(VALID_ADDRESS(prev));
4083 cmdq->head = prev;
4084 cmdq = &adapter->cmdq_free;
4085 spin_lock_irqsave(&cmdq->lock.lock, cmdq->lock.flags);
4086 cmdq->count += cmdcnt; /* SLIC_CMDQ_CMDSINPAGE; mooktodo */
4087 tail->next = cmdq->head;
4088 ASSERT(VALID_ADDRESS(prev));
4089 cmdq->head = prev;
4090 spin_unlock_irqrestore(&cmdq->lock.lock, cmdq->lock.flags);
4091 }
4092
4093 static struct slic_hostcmd *slic_cmdq_getfree(struct adapter *adapter)
4094 {
4095 struct slic_cmdqueue *cmdq = &adapter->cmdq_free;
4096 struct slic_hostcmd *cmd = NULL;
4097
4098 lock_and_retry:
4099 spin_lock_irqsave(&cmdq->lock.lock, cmdq->lock.flags);
4100 retry:
4101 cmd = cmdq->head;
4102 if (cmd) {
4103 cmdq->head = cmd->next;
4104 cmdq->count--;
4105 spin_unlock_irqrestore(&cmdq->lock.lock, cmdq->lock.flags);
4106 } else {
4107 slic_cmdq_getdone(adapter);
4108 cmd = cmdq->head;
4109 if (cmd) {
4110 goto retry;
4111 } else {
4112 u32 *pageaddr;
4113
4114 spin_unlock_irqrestore(&cmdq->lock.lock,
4115 cmdq->lock.flags);
4116 pageaddr = slic_cmdqmem_addpage(adapter);
4117 if (pageaddr) {
4118 slic_cmdq_addcmdpage(adapter, pageaddr);
4119 goto lock_and_retry;
4120 }
4121 }
4122 }
4123 return cmd;
4124 }
4125
4126 static void slic_cmdq_getdone(struct adapter *adapter)
4127 {
4128 struct slic_cmdqueue *done_cmdq = &adapter->cmdq_done;
4129 struct slic_cmdqueue *free_cmdq = &adapter->cmdq_free;
4130
4131 ASSERT(free_cmdq->head == NULL);
4132 spin_lock_irqsave(&done_cmdq->lock.lock, done_cmdq->lock.flags);
4133 ASSERT(VALID_ADDRESS(done_cmdq->head));
4134
4135 free_cmdq->head = done_cmdq->head;
4136 free_cmdq->count = done_cmdq->count;
4137 done_cmdq->head = NULL;
4138 done_cmdq->tail = NULL;
4139 done_cmdq->count = 0;
4140 spin_unlock_irqrestore(&done_cmdq->lock.lock, done_cmdq->lock.flags);
4141 }
4142
4143 static void slic_cmdq_putdone_irq(struct adapter *adapter,
4144 struct slic_hostcmd *cmd)
4145 {
4146 struct slic_cmdqueue *cmdq = &adapter->cmdq_done;
4147
4148 spin_lock(&cmdq->lock.lock);
4149 cmd->busy = 0;
4150 ASSERT(VALID_ADDRESS(cmdq->head));
4151 cmd->next = cmdq->head;
4152 ASSERT(VALID_ADDRESS(cmd));
4153 cmdq->head = cmd;
4154 cmdq->count++;
4155 if ((adapter->xmitq_full) && (cmdq->count > 10))
4156 netif_wake_queue(adapter->netdev);
4157 spin_unlock(&cmdq->lock.lock);
4158 }
4159
4160 static int slic_rcvqueue_init(struct adapter *adapter)
4161 {
4162 int i, count;
4163 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
4164
4165 DBG_MSG("slicoss: %s ENTER adapter[%p]\n", __func__, adapter);
4166 ASSERT(adapter->state == ADAPT_DOWN);
4167 rcvq->tail = NULL;
4168 rcvq->head = NULL;
4169 rcvq->size = SLIC_RCVQ_ENTRIES;
4170 rcvq->errors = 0;
4171 rcvq->count = 0;
4172 i = (SLIC_RCVQ_ENTRIES / SLIC_RCVQ_FILLENTRIES);
4173 count = 0;
4174 while (i) {
4175 count += slic_rcvqueue_fill(adapter);
4176 i--;
4177 }
4178 if (rcvq->count < SLIC_RCVQ_MINENTRIES) {
4179 slic_rcvqueue_free(adapter);
4180 return STATUS_FAILURE;
4181 }
4182 DBG_MSG("slicoss: %s EXIT adapter[%p]\n", __func__, adapter);
4183 return STATUS_SUCCESS;
4184 }
4185
4186 static int slic_rcvqueue_reset(struct adapter *adapter)
4187 {
4188 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
4189
4190 DBG_MSG("slicoss: %s ENTER adapter[%p]\n", __func__, adapter);
4191 ASSERT(adapter->state == ADAPT_DOWN);
4192 ASSERT(rcvq);
4193
4194 DBG_MSG("slicoss: Nothing to do. rcvq[%p]\n"
4195 " count[%x]\n"
4196 " head[%p]\n"
4197 " tail[%p]\n",
4198 rcvq, rcvq->count, rcvq->head, rcvq->tail);
4199
4200 DBG_MSG("slicoss: %s EXIT adapter[%p]\n", __func__, adapter);
4201 return STATUS_SUCCESS;
4202 }
4203
4204 static void slic_rcvqueue_free(struct adapter *adapter)
4205 {
4206 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
4207 struct sk_buff *skb;
4208
4209 while (rcvq->head) {
4210 skb = rcvq->head;
4211 rcvq->head = rcvq->head->next;
4212 dev_kfree_skb(skb);
4213 }
4214 rcvq->tail = NULL;
4215 rcvq->head = NULL;
4216 rcvq->count = 0;
4217 }
4218
4219 static struct sk_buff *slic_rcvqueue_getnext(struct adapter *adapter)
4220 {
4221 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
4222 struct sk_buff *skb;
4223 struct slic_rcvbuf *rcvbuf;
4224 int count;
4225
4226 if (rcvq->count) {
4227 skb = rcvq->head;
4228 rcvbuf = (struct slic_rcvbuf *)skb->head;
4229 ASSERT(rcvbuf);
4230
4231 if (rcvbuf->status & IRHDDR_SVALID) {
4232 rcvq->head = rcvq->head->next;
4233 skb->next = NULL;
4234 rcvq->count--;
4235 } else {
4236 skb = NULL;
4237 }
4238 } else {
4239 DBG_ERROR("RcvQ Empty!! adapter[%p] rcvq[%p] count[%x]\n",
4240 adapter, rcvq, rcvq->count);
4241 skb = NULL;
4242 }
4243 while (rcvq->count < SLIC_RCVQ_FILLTHRESH) {
4244 count = slic_rcvqueue_fill(adapter);
4245 if (!count)
4246 break;
4247 }
4248 if (skb)
4249 rcvq->errors = 0;
4250 return skb;
4251 }
4252
4253 static int slic_rcvqueue_fill(struct adapter *adapter)
4254 {
4255 void *paddr;
4256 u32 paddrl;
4257 u32 paddrh;
4258 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
4259 int i = 0;
4260
4261 while (i < SLIC_RCVQ_FILLENTRIES) {
4262 struct slic_rcvbuf *rcvbuf;
4263 struct sk_buff *skb;
4264 #ifdef KLUDGE_FOR_4GB_BOUNDARY
4265 retry_rcvqfill:
4266 #endif
4267 skb = alloc_skb(SLIC_RCVQ_RCVBUFSIZE, GFP_ATOMIC);
4268 if (skb) {
4269 paddr = (void *)pci_map_single(adapter->pcidev,
4270 skb->data,
4271 SLIC_RCVQ_RCVBUFSIZE,
4272 PCI_DMA_FROMDEVICE);
4273 paddrl = SLIC_GET_ADDR_LOW(paddr);
4274 paddrh = SLIC_GET_ADDR_HIGH(paddr);
4275
4276 skb->len = SLIC_RCVBUF_HEADSIZE;
4277 rcvbuf = (struct slic_rcvbuf *)skb->head;
4278 rcvbuf->status = 0;
4279 skb->next = NULL;
4280 #ifdef KLUDGE_FOR_4GB_BOUNDARY
4281 if (paddrl == 0) {
4282 DBG_ERROR
4283 ("%s: LOW 32bits PHYSICAL ADDRESS == 0 "
4284 "skb[%p] PROBLEM\n"
4285 " skbdata[%p]\n"
4286 " skblen[%x]\n"
4287 " paddr[%p]\n"
4288 " paddrl[%x]\n"
4289 " paddrh[%x]\n", __func__, skb,
4290 skb->data, skb->len, paddr, paddrl,
4291 paddrh);
4292 DBG_ERROR(" rcvq->head[%p]\n"
4293 " rcvq->tail[%p]\n"
4294 " rcvq->count[%x]\n",
4295 rcvq->head, rcvq->tail, rcvq->count);
4296 DBG_ERROR("SKIP THIS SKB!!!!!!!!\n");
4297 goto retry_rcvqfill;
4298 }
4299 #else
4300 if (paddrl == 0) {
4301 DBG_ERROR
4302 ("\n\n%s: LOW 32bits PHYSICAL ADDRESS == 0 "
4303 "skb[%p] GIVE TO CARD ANYWAY\n"
4304 " skbdata[%p]\n"
4305 " paddr[%p]\n"
4306 " paddrl[%x]\n"
4307 " paddrh[%x]\n", __func__, skb,
4308 skb->data, paddr, paddrl, paddrh);
4309 }
4310 #endif
4311 if (paddrh == 0) {
4312 WRITE_REG(adapter->slic_regs->slic_hbar,
4313 (u32) paddrl, DONT_FLUSH);
4314 } else {
4315 WRITE_REG64(adapter,
4316 adapter->slic_regs->slic_hbar64,
4317 (u32) paddrl,
4318 adapter->slic_regs->slic_addr_upper,
4319 (u32) paddrh, DONT_FLUSH);
4320 }
4321 if (rcvq->head)
4322 rcvq->tail->next = skb;
4323 else
4324 rcvq->head = skb;
4325 rcvq->tail = skb;
4326 rcvq->count++;
4327 i++;
4328 } else {
4329 DBG_ERROR
4330 ("%s slic_rcvqueue_fill could only get [%d] "
4331 "skbuffs\n",
4332 adapter->netdev->name, i);
4333 break;
4334 }
4335 }
4336 return i;
4337 }
4338
4339 static u32 slic_rcvqueue_reinsert(struct adapter *adapter, struct sk_buff *skb)
4340 {
4341 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
4342 void *paddr;
4343 u32 paddrl;
4344 u32 paddrh;
4345 struct slic_rcvbuf *rcvbuf = (struct slic_rcvbuf *)skb->head;
4346
4347 ASSERT(skb->len == SLIC_RCVBUF_HEADSIZE);
4348
4349 paddr = (void *)pci_map_single(adapter->pcidev, skb->head,
4350 SLIC_RCVQ_RCVBUFSIZE, PCI_DMA_FROMDEVICE);
4351 rcvbuf->status = 0;
4352 skb->next = NULL;
4353
4354 paddrl = SLIC_GET_ADDR_LOW(paddr);
4355 paddrh = SLIC_GET_ADDR_HIGH(paddr);
4356
4357 if (paddrl == 0) {
4358 DBG_ERROR
4359 ("%s: LOW 32bits PHYSICAL ADDRESS == 0 skb[%p] PROBLEM\n"
4360 " skbdata[%p]\n" " skblen[%x]\n"
4361 " paddr[%p]\n" " paddrl[%x]\n"
4362 " paddrh[%x]\n", __func__, skb, skb->data,
4363 skb->len, paddr, paddrl, paddrh);
4364 DBG_ERROR(" rcvq->head[%p]\n"
4365 " rcvq->tail[%p]\n"
4366 " rcvq->count[%x]\n", rcvq->head, rcvq->tail,
4367 rcvq->count);
4368 }
4369 if (paddrh == 0) {
4370 WRITE_REG(adapter->slic_regs->slic_hbar, (u32) paddrl,
4371 DONT_FLUSH);
4372 } else {
4373 WRITE_REG64(adapter,
4374 adapter->slic_regs->slic_hbar64,
4375 paddrl,
4376 adapter->slic_regs->slic_addr_upper,
4377 paddrh, DONT_FLUSH);
4378 }
4379 if (rcvq->head)
4380 rcvq->tail->next = skb;
4381 else
4382 rcvq->head = skb;
4383 rcvq->tail = skb;
4384 rcvq->count++;
4385 return rcvq->count;
4386 }
4387
4388 static int slic_debug_card_show(struct seq_file *seq, void *v)
4389 {
4390 #ifdef MOOKTODO
4391 int i;
4392 struct sliccard *card = seq->private;
4393 struct slic_config *config = &card->config;
4394 unsigned char *fru = (unsigned char *)(&card->config.atk_fru);
4395 unsigned char *oemfru = (unsigned char *)(&card->config.OemFru);
4396 #endif
4397
4398 seq_printf(seq, "driver_version : %s\n", slic_proc_version);
4399 seq_printf(seq, "Microcode versions: \n");
4400 seq_printf(seq, " Gigabit (gb) : %s %s\n",
4401 MOJAVE_UCODE_VERS_STRING, MOJAVE_UCODE_VERS_DATE);
4402 seq_printf(seq, " Gigabit Receiver : %s %s\n",
4403 GB_RCVUCODE_VERS_STRING, GB_RCVUCODE_VERS_DATE);
4404 seq_printf(seq, "Vendor : %s\n", slic_vendor);
4405 seq_printf(seq, "Product Name : %s\n", slic_product_name);
4406 #ifdef MOOKTODO
4407 seq_printf(seq, "VendorId : %4.4X\n",
4408 config->VendorId);
4409 seq_printf(seq, "DeviceId : %4.4X\n",
4410 config->DeviceId);
4411 seq_printf(seq, "RevisionId : %2.2x\n",
4412 config->RevisionId);
4413 seq_printf(seq, "Bus # : %d\n", card->busnumber);
4414 seq_printf(seq, "Device # : %d\n", card->slotnumber);
4415 seq_printf(seq, "Interfaces : %d\n", card->card_size);
4416 seq_printf(seq, " Initialized : %d\n",
4417 card->adapters_activated);
4418 seq_printf(seq, " Allocated : %d\n",
4419 card->adapters_allocated);
4420 ASSERT(card->card_size <= SLIC_NBR_MACS);
4421 for (i = 0; i < card->card_size; i++) {
4422 seq_printf(seq,
4423 " MAC%d : %2.2X %2.2X %2.2X %2.2X %2.2X %2.2X\n",
4424 i, config->macinfo[i].macaddrA[0],
4425 config->macinfo[i].macaddrA[1],
4426 config->macinfo[i].macaddrA[2],
4427 config->macinfo[i].macaddrA[3],
4428 config->macinfo[i].macaddrA[4],
4429 config->macinfo[i].macaddrA[5]);
4430 }
4431 seq_printf(seq, " IF Init State Duplex/Speed irq\n");
4432 seq_printf(seq, " -------------------------------\n");
4433 for (i = 0; i < card->adapters_allocated; i++) {
4434 struct adapter *adapter;
4435
4436 adapter = card->adapter[i];
4437 if (adapter) {
4438 seq_printf(seq,
4439 " %d %d %s %s %s 0x%X\n",
4440 adapter->physport, adapter->state,
4441 SLIC_LINKSTATE(adapter->linkstate),
4442 SLIC_DUPLEX(adapter->linkduplex),
4443 SLIC_SPEED(adapter->linkspeed),
4444 (uint) adapter->irq);
4445 }
4446 }
4447 seq_printf(seq, "Generation # : %4.4X\n", card->gennumber);
4448 seq_printf(seq, "RcvQ max entries : %4.4X\n",
4449 SLIC_RCVQ_ENTRIES);
4450 seq_printf(seq, "Ping Status : %8.8X\n",
4451 card->pingstatus);
4452 seq_printf(seq, "Minimum grant : %2.2x\n",
4453 config->MinGrant);
4454 seq_printf(seq, "Maximum Latency : %2.2x\n", config->MaxLat);
4455 seq_printf(seq, "PciStatus : %4.4x\n",
4456 config->Pcistatus);
4457 seq_printf(seq, "Debug Device Id : %4.4x\n",
4458 config->DbgDevId);
4459 seq_printf(seq, "DRAM ROM Function : %4.4x\n",
4460 config->DramRomFn);
4461 seq_printf(seq, "Network interface Pin 1 : %2.2x\n",
4462 config->NetIntPin1);
4463 seq_printf(seq, "Network interface Pin 2 : %2.2x\n",
4464 config->NetIntPin1);
4465 seq_printf(seq, "Network interface Pin 3 : %2.2x\n",
4466 config->NetIntPin1);
4467 seq_printf(seq, "PM capabilities : %4.4X\n",
4468 config->PMECapab);
4469 seq_printf(seq, "Network Clock Controls : %4.4X\n",
4470 config->NwClkCtrls);
4471
4472 switch (config->FruFormat) {
4473 case ATK_FRU_FORMAT:
4474 {
4475 seq_printf(seq,
4476 "Vendor : Alacritech, Inc.\n");
4477 seq_printf(seq,
4478 "Assembly # : %c%c%c%c%c%c\n",
4479 fru[0], fru[1], fru[2], fru[3], fru[4],
4480 fru[5]);
4481 seq_printf(seq,
4482 "Revision # : %c%c\n",
4483 fru[6], fru[7]);
4484
4485 if (config->OEMFruFormat == VENDOR4_FRU_FORMAT) {
4486 seq_printf(seq,
4487 "Serial # : "
4488 "%c%c%c%c%c%c%c%c%c%c%c%c\n",
4489 fru[8], fru[9], fru[10],
4490 fru[11], fru[12], fru[13],
4491 fru[16], fru[17], fru[18],
4492 fru[19], fru[20], fru[21]);
4493 } else {
4494 seq_printf(seq,
4495 "Serial # : "
4496 "%c%c%c%c%c%c%c%c%c%c%c%c%c%c\n",
4497 fru[8], fru[9], fru[10],
4498 fru[11], fru[12], fru[13],
4499 fru[14], fru[15], fru[16],
4500 fru[17], fru[18], fru[19],
4501 fru[20], fru[21]);
4502 }
4503 break;
4504 }
4505
4506 default:
4507 {
4508 seq_printf(seq,
4509 "Vendor : Alacritech, Inc.\n");
4510 seq_printf(seq,
4511 "Serial # : Empty FRU\n");
4512 break;
4513 }
4514 }
4515
4516 switch (config->OEMFruFormat) {
4517 case VENDOR1_FRU_FORMAT:
4518 {
4519 seq_printf(seq, "FRU Information:\n");
4520 seq_printf(seq, " Commodity # : %c\n",
4521 oemfru[0]);
4522 seq_printf(seq,
4523 " Assembly # : %c%c%c%c\n",
4524 oemfru[1], oemfru[2], oemfru[3], oemfru[4]);
4525 seq_printf(seq,
4526 " Revision # : %c%c\n",
4527 oemfru[5], oemfru[6]);
4528 seq_printf(seq,
4529 " Supplier # : %c%c\n",
4530 oemfru[7], oemfru[8]);
4531 seq_printf(seq,
4532 " Date : %c%c\n",
4533 oemfru[9], oemfru[10]);
4534 seq_sprintf(seq,
4535 " Sequence # : %c%c%c\n",
4536 oemfru[11], oemfru[12], oemfru[13]);
4537 break;
4538 }
4539
4540 case VENDOR2_FRU_FORMAT:
4541 {
4542 seq_printf(seq, "FRU Information:\n");
4543 seq_printf(seq,
4544 " Part # : "
4545 "%c%c%c%c%c%c%c%c\n",
4546 oemfru[0], oemfru[1], oemfru[2],
4547 oemfru[3], oemfru[4], oemfru[5],
4548 oemfru[6], oemfru[7]);
4549 seq_printf(seq,
4550 " Supplier # : %c%c%c%c%c\n",
4551 oemfru[8], oemfru[9], oemfru[10],
4552 oemfru[11], oemfru[12]);
4553 seq_printf(seq,
4554 " Date : %c%c%c\n",
4555 oemfru[13], oemfru[14], oemfru[15]);
4556 seq_sprintf(seq,
4557 " Sequence # : %c%c%c%c\n",
4558 oemfru[16], oemfru[17], oemfru[18],
4559 oemfru[19]);
4560 break;
4561 }
4562
4563 case VENDOR3_FRU_FORMAT:
4564 {
4565 seq_printf(seq, "FRU Information:\n");
4566 }
4567
4568 case VENDOR4_FRU_FORMAT:
4569 {
4570 seq_printf(seq, "FRU Information:\n");
4571 seq_printf(seq,
4572 " FRU Number : "
4573 "%c%c%c%c%c%c%c%c\n",
4574 oemfru[0], oemfru[1], oemfru[2],
4575 oemfru[3], oemfru[4], oemfru[5],
4576 oemfru[6], oemfru[7]);
4577 seq_sprintf(seq,
4578 " Part Number : "
4579 "%c%c%c%c%c%c%c%c\n",
4580 oemfru[8], oemfru[9], oemfru[10],
4581 oemfru[11], oemfru[12], oemfru[13],
4582 oemfru[14], oemfru[15]);
4583 seq_printf(seq,
4584 " EC Level : "
4585 "%c%c%c%c%c%c%c%c\n",
4586 oemfru[16], oemfru[17], oemfru[18],
4587 oemfru[19], oemfru[20], oemfru[21],
4588 oemfru[22], oemfru[23]);
4589 break;
4590 }
4591
4592 default:
4593 break;
4594 }
4595 #endif
4596
4597 return 0;
4598 }
4599
4600 static int slic_debug_adapter_show(struct seq_file *seq, void *v)
4601 {
4602 struct adapter *adapter = seq->private;
4603
4604 if ((adapter->netdev) && (adapter->netdev->name)) {
4605 seq_printf(seq, "info: interface : %s\n",
4606 adapter->netdev->name);
4607 }
4608 seq_printf(seq, "info: status : %s\n",
4609 SLIC_LINKSTATE(adapter->linkstate));
4610 seq_printf(seq, "info: port : %d\n",
4611 adapter->physport);
4612 seq_printf(seq, "info: speed : %s\n",
4613 SLIC_SPEED(adapter->linkspeed));
4614 seq_printf(seq, "info: duplex : %s\n",
4615 SLIC_DUPLEX(adapter->linkduplex));
4616 seq_printf(seq, "info: irq : 0x%X\n",
4617 (uint) adapter->irq);
4618 seq_printf(seq, "info: Interrupt Agg Delay: %d usec\n",
4619 adapter->card->loadlevel_current);
4620 seq_printf(seq, "info: RcvQ max entries : %4.4X\n",
4621 SLIC_RCVQ_ENTRIES);
4622 seq_printf(seq, "info: RcvQ current : %4.4X\n",
4623 adapter->rcvqueue.count);
4624 seq_printf(seq, "rx stats: packets : %8.8lX\n",
4625 adapter->stats.rx_packets);
4626 seq_printf(seq, "rx stats: bytes : %8.8lX\n",
4627 adapter->stats.rx_bytes);
4628 seq_printf(seq, "rx stats: broadcasts : %8.8X\n",
4629 adapter->rcv_broadcasts);
4630 seq_printf(seq, "rx stats: multicasts : %8.8X\n",
4631 adapter->rcv_multicasts);
4632 seq_printf(seq, "rx stats: unicasts : %8.8X\n",
4633 adapter->rcv_unicasts);
4634 seq_printf(seq, "rx stats: errors : %8.8X\n",
4635 (u32) adapter->slic_stats.iface.rcv_errors);
4636 seq_printf(seq, "rx stats: Missed errors : %8.8X\n",
4637 (u32) adapter->slic_stats.iface.rcv_discards);
4638 seq_printf(seq, "rx stats: drops : %8.8X\n",
4639 (u32) adapter->rcv_drops);
4640 seq_printf(seq, "tx stats: packets : %8.8lX\n",
4641 adapter->stats.tx_packets);
4642 seq_printf(seq, "tx stats: bytes : %8.8lX\n",
4643 adapter->stats.tx_bytes);
4644 seq_printf(seq, "tx stats: errors : %8.8X\n",
4645 (u32) adapter->slic_stats.iface.xmt_errors);
4646 seq_printf(seq, "rx stats: multicasts : %8.8lX\n",
4647 adapter->stats.multicast);
4648 seq_printf(seq, "tx stats: collision errors : %8.8X\n",
4649 (u32) adapter->slic_stats.iface.xmit_collisions);
4650 seq_printf(seq, "perf: Max rcv frames/isr : %8.8X\n",
4651 adapter->max_isr_rcvs);
4652 seq_printf(seq, "perf: Rcv interrupt yields : %8.8X\n",
4653 adapter->rcv_interrupt_yields);
4654 seq_printf(seq, "perf: Max xmit complete/isr : %8.8X\n",
4655 adapter->max_isr_xmits);
4656 seq_printf(seq, "perf: error interrupts : %8.8X\n",
4657 adapter->error_interrupts);
4658 seq_printf(seq, "perf: error rmiss interrupts : %8.8X\n",
4659 adapter->error_rmiss_interrupts);
4660 seq_printf(seq, "perf: rcv interrupts : %8.8X\n",
4661 adapter->rcv_interrupts);
4662 seq_printf(seq, "perf: xmit interrupts : %8.8X\n",
4663 adapter->xmit_interrupts);
4664 seq_printf(seq, "perf: link event interrupts : %8.8X\n",
4665 adapter->linkevent_interrupts);
4666 seq_printf(seq, "perf: UPR interrupts : %8.8X\n",
4667 adapter->upr_interrupts);
4668 seq_printf(seq, "perf: interrupt count : %8.8X\n",
4669 adapter->num_isrs);
4670 seq_printf(seq, "perf: false interrupts : %8.8X\n",
4671 adapter->false_interrupts);
4672 seq_printf(seq, "perf: All register writes : %8.8X\n",
4673 adapter->all_reg_writes);
4674 seq_printf(seq, "perf: ICR register writes : %8.8X\n",
4675 adapter->icr_reg_writes);
4676 seq_printf(seq, "perf: ISR register writes : %8.8X\n",
4677 adapter->isr_reg_writes);
4678 seq_printf(seq, "ifevents: overflow 802 errors : %8.8X\n",
4679 adapter->if_events.oflow802);
4680 seq_printf(seq, "ifevents: transport overflow errors: %8.8X\n",
4681 adapter->if_events.Tprtoflow);
4682 seq_printf(seq, "ifevents: underflow errors : %8.8X\n",
4683 adapter->if_events.uflow802);
4684 seq_printf(seq, "ifevents: receive early : %8.8X\n",
4685 adapter->if_events.rcvearly);
4686 seq_printf(seq, "ifevents: buffer overflows : %8.8X\n",
4687 adapter->if_events.Bufov);
4688 seq_printf(seq, "ifevents: carrier errors : %8.8X\n",
4689 adapter->if_events.Carre);
4690 seq_printf(seq, "ifevents: Long : %8.8X\n",
4691 adapter->if_events.Longe);
4692 seq_printf(seq, "ifevents: invalid preambles : %8.8X\n",
4693 adapter->if_events.Invp);
4694 seq_printf(seq, "ifevents: CRC errors : %8.8X\n",
4695 adapter->if_events.Crc);
4696 seq_printf(seq, "ifevents: dribble nibbles : %8.8X\n",
4697 adapter->if_events.Drbl);
4698 seq_printf(seq, "ifevents: Code violations : %8.8X\n",
4699 adapter->if_events.Code);
4700 seq_printf(seq, "ifevents: TCP checksum errors : %8.8X\n",
4701 adapter->if_events.TpCsum);
4702 seq_printf(seq, "ifevents: TCP header short errors : %8.8X\n",
4703 adapter->if_events.TpHlen);
4704 seq_printf(seq, "ifevents: IP checksum errors : %8.8X\n",
4705 adapter->if_events.IpCsum);
4706 seq_printf(seq, "ifevents: IP frame incompletes : %8.8X\n",
4707 adapter->if_events.IpLen);
4708 seq_printf(seq, "ifevents: IP headers shorts : %8.8X\n",
4709 adapter->if_events.IpHlen);
4710
4711 return 0;
4712 }
4713 static int slic_debug_adapter_open(struct inode *inode, struct file *file)
4714 {
4715 return single_open(file, slic_debug_adapter_show, inode->i_private);
4716 }
4717
4718 static int slic_debug_card_open(struct inode *inode, struct file *file)
4719 {
4720 return single_open(file, slic_debug_card_show, inode->i_private);
4721 }
4722
4723 static const struct file_operations slic_debug_adapter_fops = {
4724 .owner = THIS_MODULE,
4725 .open = slic_debug_adapter_open,
4726 .read = seq_read,
4727 .llseek = seq_lseek,
4728 .release = single_release,
4729 };
4730
4731 static const struct file_operations slic_debug_card_fops = {
4732 .owner = THIS_MODULE,
4733 .open = slic_debug_card_open,
4734 .read = seq_read,
4735 .llseek = seq_lseek,
4736 .release = single_release,
4737 };
4738
4739 static void slic_debug_adapter_create(struct adapter *adapter)
4740 {
4741 struct dentry *d;
4742 char name[7];
4743 struct sliccard *card = adapter->card;
4744
4745 if (!card->debugfs_dir)
4746 return;
4747
4748 sprintf(name, "port%d", adapter->port);
4749 d = debugfs_create_file(name, S_IRUGO,
4750 card->debugfs_dir, adapter,
4751 &slic_debug_adapter_fops);
4752 if (!d || IS_ERR(d))
4753 pr_info(PFX "%s: debugfs create failed\n", name);
4754 else
4755 adapter->debugfs_entry = d;
4756 }
4757
4758 static void slic_debug_adapter_destroy(struct adapter *adapter)
4759 {
4760 if (adapter->debugfs_entry) {
4761 debugfs_remove(adapter->debugfs_entry);
4762 adapter->debugfs_entry = NULL;
4763 }
4764 }
4765
4766 static void slic_debug_card_create(struct sliccard *card)
4767 {
4768 struct dentry *d;
4769 char name[IFNAMSIZ];
4770
4771 snprintf(name, sizeof(name), "slic%d", card->cardnum);
4772 d = debugfs_create_dir(name, slic_debugfs);
4773 if (!d || IS_ERR(d))
4774 pr_info(PFX "%s: debugfs create dir failed\n",
4775 name);
4776 else {
4777 card->debugfs_dir = d;
4778 d = debugfs_create_file("cardinfo", S_IRUGO,
4779 slic_debugfs, card,
4780 &slic_debug_card_fops);
4781 if (!d || IS_ERR(d))
4782 pr_info(PFX "%s: debugfs create failed\n",
4783 name);
4784 else
4785 card->debugfs_cardinfo = d;
4786 }
4787 }
4788
4789 static void slic_debug_card_destroy(struct sliccard *card)
4790 {
4791 int i;
4792
4793 for (i = 0; i < card->card_size; i++) {
4794 struct adapter *adapter;
4795
4796 adapter = card->adapter[i];
4797 if (adapter)
4798 slic_debug_adapter_destroy(adapter);
4799 }
4800 if (card->debugfs_cardinfo) {
4801 debugfs_remove(card->debugfs_cardinfo);
4802 card->debugfs_cardinfo = NULL;
4803 }
4804 if (card->debugfs_dir) {
4805 debugfs_remove(card->debugfs_dir);
4806 card->debugfs_dir = NULL;
4807 }
4808 }
4809
4810 static void slic_debug_init(void)
4811 {
4812 struct dentry *ent;
4813
4814 ent = debugfs_create_dir("slic", NULL);
4815 if (!ent || IS_ERR(ent)) {
4816 pr_info(PFX "debugfs create directory failed\n");
4817 return;
4818 }
4819
4820 slic_debugfs = ent;
4821 }
4822
4823 static void slic_debug_cleanup(void)
4824 {
4825 if (slic_debugfs) {
4826 debugfs_remove(slic_debugfs);
4827 slic_debugfs = NULL;
4828 }
4829 }
4830
4831 /*=============================================================================
4832 =============================================================================
4833 === ===
4834 === SLIC DUMP MANAGEMENT SECTION ===
4835 === ===
4836 === ===
4837 === Dump routines ===
4838 === ===
4839 === ===
4840 =============================================================================
4841 ============================================================================*/
4842
4843 #if SLIC_DUMP_ENABLED
4844
4845 #include <stdarg.h>
4846
4847 void *slic_dump_handle; /* thread handle */
4848
4849 /*
4850 * These are the only things you should do on a core-file: use only these
4851 * functions to write out all the necessary info.
4852 */
4853 static int slic_dump_seek(struct file *SLIChandle, u32 file_offset)
4854 {
4855 if (SLIChandle->f_pos != file_offset) {
4856 /*DBG_MSG("slic_dump_seek now needed [%x : %x]\n",
4857 (u32)SLIChandle->f_pos, (u32)file_offset); */
4858 if (SLIChandle->f_op->llseek) {
4859 if (SLIChandle->f_op->
4860 llseek(SLIChandle, file_offset, 0) != file_offset)
4861 return 0;
4862 } else {
4863 SLIChandle->f_pos = file_offset;
4864 }
4865 }
4866 return 1;
4867 }
4868
4869 static int slic_dump_write(struct sliccard *card,
4870 const void *addr, int size, u32 file_offset)
4871 {
4872 int r = 1;
4873 u32 result = 0;
4874 struct file *SLIChandle = card->dumphandle;
4875
4876 #ifdef HISTORICAL /* legacy */
4877 down(&SLIChandle->f_dentry->d_inode->i_sem);
4878 #endif
4879 if (size) {
4880 slic_dump_seek(SLIChandle, file_offset);
4881
4882 result =
4883 SLIChandle->f_op->write(SLIChandle, addr, size,
4884 &SLIChandle->f_pos);
4885
4886 r = result == size;
4887 }
4888
4889 card->dumptime_complete = jiffies;
4890 card->dumptime_delta = card->dumptime_complete - card->dumptime_start;
4891 card->dumptime_start = jiffies;
4892
4893 #ifdef HISTORICAL
4894 up(&SLIChandle->f_dentry->d_inode->i_sem);
4895 #endif
4896 if (!r) {
4897 DBG_ERROR("%s: addr[%p] size[%x] result[%x] file_offset[%x]\n",
4898 __func__, addr, size, result, file_offset);
4899 }
4900 return r;
4901 }
4902
4903 static uint slic_init_dump_thread(struct sliccard *card)
4904 {
4905 card->dump_task_id = kthread_run(slic_dump_thread, (void *)card, 0);
4906
4907 /* DBG_MSG("create slic_dump_thread dump_pid[%x]\n", card->dump_pid); */
4908 if (IS_ERR(card->dump_task_id)) {
4909 DBG_MSG("create slic_dump_thread FAILED \n");
4910 return STATUS_FAILURE;
4911 }
4912
4913 return STATUS_SUCCESS;
4914 }
4915
4916 static int slic_dump_thread(void *context)
4917 {
4918 struct sliccard *card = (struct sliccard *)context;
4919 struct adapter *adapter;
4920 struct adapter *dump_adapter = NULL;
4921 u32 dump_complete = 0;
4922 u32 delay = SLIC_SECS_TO_JIFFS(PING_TIMER_INTERVAL);
4923 struct slic_regs *pregs;
4924 u32 i;
4925 struct slic_upr *upr, *uprnext;
4926 u32 dump_card;
4927
4928 ASSERT(card);
4929
4930 card->dumpthread_running = 1;
4931
4932 #ifdef HISTORICAL
4933 lock_kernel();
4934 /*
4935 * This thread doesn't need any user-level access,
4936 * so get rid of all our resources
4937 */
4938 exit_files(current); /* daemonize doesn't do exit_files */
4939 current->files = init_task.files;
4940 atomic_inc(&current->files->count);
4941 #endif
4942
4943 daemonize("%s", "slicmon");
4944
4945 /* Setup a nice name */
4946 strcpy(current->comm, "slicmon");
4947 DBG_ERROR
4948 ("slic_dump_thread[slicmon] daemon is alive card[%p] pid[%x]\n",
4949 card, card->dump_task_id->pid);
4950
4951 /*
4952 * Send me a signal to get me to die (for debugging)
4953 */
4954 do {
4955 /*
4956 * If card state is not set to up, skip
4957 */
4958 if (card->state != CARD_UP) {
4959 if (card->adapters_activated)
4960 goto wait;
4961 else
4962 goto end_thread;
4963 }
4964 /*
4965 * Check the results of our last ping.
4966 */
4967 dump_card = 0;
4968 #ifdef SLIC_FAILURE_DUMP
4969 if (card->pingstatus != ISR_PINGMASK) {
4970 DBG_MSG
4971 ("\n[slicmon] CARD #%d TIMED OUT - status "
4972 "%x: DUMP THE CARD!\n",
4973 card->cardnum, card->pingstatus);
4974 dump_card = 1;
4975 }
4976 #else
4977 /*
4978 * Cause a card RESET instead?
4979 */
4980 if (card->pingstatus != ISR_PINGMASK) {
4981 /* todo. do we want to reset the card in production */
4982 /* DBG_MSG("\n[slicmon] CARD #%d TIMED OUT - "
4983 status %x: RESET THE CARD!\n", card->cardnum,
4984 card->pingstatus); */
4985 DBG_ERROR
4986 ("\n[slicmon] CARD #%d TIMED OUT - status %x: "
4987 "DUMP THE CARD!\n",
4988 card->cardnum, card->pingstatus);
4989 dump_card = 1;
4990 }
4991 #endif
4992 if ((dump_card)
4993 || (card->dump_requested == SLIC_DUMP_REQUESTED)) {
4994 if (card->dump_requested == SLIC_DUMP_REQUESTED) {
4995 DBG_ERROR
4996 ("[slicmon]: Dump card Requested: Card %x\n",
4997 card->cardnum);
4998 }
4999 if (card->pingstatus != ISR_PINGMASK) {
5000 ushort cpuid = 0;
5001 ushort crashpc = 0;
5002
5003 if (card->adapter[0]) {
5004 if ((card->adapter[0])->memorylength >=
5005 CRASH_INFO_OFFSET +
5006 sizeof(slic_crash_info)) {
5007 char *crashptr;
5008 p_slic_crash_info crashinfo;
5009
5010 crashptr =
5011 ((char *)card->adapter[0]->
5012 slic_regs) +
5013 CRASH_INFO_OFFSET;
5014 crashinfo =
5015 (p_slic_crash_info)
5016 crashptr;
5017 cpuid = crashinfo->cpu_id;
5018 crashpc = crashinfo->crash_pc;
5019 }
5020 }
5021 DBG_ERROR
5022 ("[slicmon]: Dump card: Card %x crashed "
5023 "and failed to answer PING. "
5024 "CPUID[%x] PC[%x]\n ",
5025 card->cardnum, cpuid, crashpc);
5026 }
5027
5028 card->dump_requested = SLIC_DUMP_IN_PROGRESS;
5029
5030 /*
5031 * Set the card state to DOWN and the adapter states
5032 * to RESET.They will check this in SimbaCheckForHang
5033 * and initiate interface reset (which in turn will
5034 * reinitialize the card).
5035 */
5036 card->state = CARD_DOWN;
5037
5038 for (i = 0; i < card->card_size; i++) {
5039 adapter = card->adapter[i];
5040 if (adapter) {
5041 slic_if_stop_queue(adapter);
5042
5043 if (adapter->state == ADAPT_UP) {
5044 adapter->state = ADAPT_RESET;
5045 adapter->linkstate = LINK_DOWN;
5046 DBG_ERROR
5047 ("[slicmon]: SLIC Card[%d] "
5048 "Port[%d] adapter[%p] "
5049 "down\n",
5050 (uint) card->cardnum,
5051 (uint) i, adapter);
5052 }
5053 #if SLIC_GET_STATS_TIMER_ENABLED
5054 /* free stats timer */
5055 if (adapter->statstimerset) {
5056 adapter->statstimerset = 0;
5057 del_timer(&adapter->statstimer);
5058 }
5059 #endif
5060 }
5061 }
5062
5063 for (i = 0; i < card->card_size; i++) {
5064 adapter = card->adapter[i];
5065 if ((adapter) && (adapter->activated)) {
5066 pregs = adapter->slic_regs;
5067 dump_adapter = adapter;
5068
5069 /*
5070 * If the dump status is zero, then
5071 * the utility processor has crashed.
5072 * If this is the case, any pending
5073 * utilityprocessor requests will not
5074 * complete and our dump commands will
5075 * not be issued.
5076 *
5077 * To avoid this we will clear any
5078 * pending utility processor requests
5079 * now.
5080 */
5081 if (!card->pingstatus) {
5082 spin_lock_irqsave(
5083 &adapter->upr_lock.lock,
5084 adapter->upr_lock.flags);
5085 upr = adapter->upr_list;
5086 while (upr) {
5087 uprnext = upr->next;
5088 kfree(upr);
5089 upr = uprnext;
5090 }
5091 adapter->upr_list = 0;
5092 adapter->upr_busy = 0;
5093 spin_unlock_irqrestore(
5094 &adapter->upr_lock.lock,
5095 adapter->upr_lock.flags);
5096 }
5097
5098 slic_dump_card(card, FALSE);
5099 dump_complete = 1;
5100 }
5101
5102 if (dump_complete) {
5103 DBG_ERROR("SLIC Dump Complete\n");
5104 /* Only dump the card one time */
5105 break;
5106 }
5107 }
5108
5109 if (dump_adapter) {
5110 DBG_ERROR
5111 ("slic dump completed. "
5112 "Reenable interfaces\n");
5113 slic_card_init(card, dump_adapter);
5114
5115 /*
5116 * Reenable the adapters that were reset
5117 */
5118 for (i = 0; i < card->card_size; i++) {
5119 adapter = card->adapter[i];
5120 if (adapter) {
5121 if (adapter->state ==
5122 ADAPT_RESET) {
5123 DBG_ERROR
5124 ("slicdump: SLIC "
5125 "Card[%d] Port[%d] adapter[%p] "
5126 "bring UP\n",
5127 (uint) card->
5128 cardnum, (uint) i,
5129 adapter);
5130 adapter->state =
5131 ADAPT_DOWN;
5132 adapter->linkstate =
5133 LINK_DOWN;
5134 slic_entry_open
5135 (adapter->netdev);
5136 }
5137 }
5138 }
5139
5140 card->dump_requested = SLIC_DUMP_DONE;
5141 }
5142 } else {
5143 /* if pingstatus != ISR_PINGMASK) || dump_requested...ELSE
5144 * We received a valid ping response.
5145 * Clear the Pingstatus field, find a valid adapter
5146 * structure and send another ping.
5147 */
5148 for (i = 0; i < card->card_size; i++) {
5149 adapter = card->adapter[i];
5150 if (adapter && (adapter->state == ADAPT_UP)) {
5151 card->pingstatus = 0;
5152 slic_upr_request(adapter, SLIC_UPR_PING,
5153 0, 0, 0, 0);
5154 break; /* Only issue one per card */
5155 }
5156 }
5157 }
5158 wait:
5159 SLIC_INTERRUPTIBLE_SLEEP_ON_TIMEOUT(card->dump_wq, delay);
5160 } while (!signal_pending(current));
5161
5162 end_thread:
5163 /* DBG_MSG("[slicmon] slic_dump_thread card[%p] pid[%x] ENDING\n",
5164 card, card->dump_pid); */
5165 card->dumpthread_running = 0;
5166
5167 return 0;
5168 }
5169
5170 /*
5171 * Read a single byte from our dump index file. This
5172 * value is used as our suffix for our dump path. The
5173 * value is incremented and written back to the file
5174 */
5175 static unsigned char slic_get_dump_index(char *path)
5176 {
5177 unsigned char index = 0;
5178 #ifdef SLIC_DUMP_INDEX_SUPPORT
5179 u32 status;
5180 void *FileHandle;
5181 u32 offset;
5182
5183 offset = 0;
5184
5185 /*
5186 * Open the index file. If one doesn't exist, create it
5187 */
5188 status = create_file(&FileHandle);
5189
5190 if (status != STATUS_SUCCESS)
5191 return (unsigned char) 0;
5192
5193 status = read_file(FileHandle, &index, 1, &offset);
5194
5195 index++;
5196
5197 status = write_file(FileHandle, &index, 1, &offset);
5198
5199 close_file(FileHandle);
5200 #else
5201 index = 0;
5202 #endif
5203 return index;
5204 }
5205
5206 static struct file *slic_dump_open_file(struct sliccard *card)
5207 {
5208 struct file *SLIChandle = NULL;
5209 struct dentry *dentry = NULL;
5210 struct inode *inode = NULL;
5211 char SLICfile[50];
5212
5213 card->dumpfile_fs = get_fs();
5214
5215 set_fs(KERNEL_DS);
5216
5217 memset(SLICfile, 0, sizeof(SLICfile));
5218 sprintf(SLICfile, "/var/tmp/slic%d-dump-%d", card->cardnum,
5219 (uint) card->dump_count);
5220 card->dump_count++;
5221
5222 SLIChandle =
5223 filp_open(SLICfile, O_CREAT | O_RDWR | O_SYNC | O_LARGEFILE, 0666);
5224
5225 DBG_MSG("[slicmon]: Dump Card #%d to file: %s \n", card->cardnum,
5226 SLICfile);
5227
5228 /* DBG_MSG("[slicmon] filp_open %s SLIChandle[%p]\n", SLICfile, SLIChandle);*/
5229
5230 if (IS_ERR(SLIChandle))
5231 goto end_slicdump;
5232
5233 dentry = SLIChandle->f_dentry;
5234 inode = dentry->d_inode;
5235
5236 /* DBG_MSG("[slicmon] inode[%p] i_nlink[%x] i_mode[%x] i_op[%p] i_fop[%p]\n"
5237 "f_op->write[%p]\n",
5238 inode, inode->i_nlink, inode->i_mode, inode->i_op,
5239 inode->i_fop, SLIChandle->f_op->write); */
5240 if (inode->i_nlink > 1)
5241 goto close_slicdump; /* multiple links - don't dump */
5242 #ifdef HISTORICAL
5243 if (!S_ISREG(inode->i_mode))
5244 goto close_slicdump;
5245 #endif
5246 if (!inode->i_op || !inode->i_fop)
5247 goto close_slicdump;
5248
5249 if (!SLIChandle->f_op->write)
5250 goto close_slicdump;
5251
5252 /*
5253 * If we got here we have SUCCESSFULLY OPENED the dump file
5254 */
5255 /* DBG_MSG("opened %s SLIChandle[%p]\n", SLICfile, SLIChandle); */
5256 return SLIChandle;
5257
5258 close_slicdump:
5259 DBG_MSG("[slicmon] slic_dump_open_file failed close SLIChandle[%p]\n",
5260 SLIChandle);
5261 filp_close(SLIChandle, NULL);
5262
5263 end_slicdump:
5264 set_fs(card->dumpfile_fs);
5265
5266 return NULL;
5267 }
5268
5269 static void slic_dump_close_file(struct sliccard *card)
5270 {
5271
5272 /* DBG_MSG("[slicmon] slic_dump_CLOSE_file close SLIChandle[%p]\n",
5273 card->dumphandle); */
5274
5275 filp_close(card->dumphandle, NULL);
5276
5277 set_fs(card->dumpfile_fs);
5278 }
5279
5280 static u32 slic_dump_card(struct sliccard *card, bool resume)
5281 {
5282 struct adapter *adapter = card->master;
5283 u32 status;
5284 u32 queue;
5285 u32 len, offset;
5286 u32 sram_size, dram_size, regs;
5287 struct sliccore_hdr corehdr;
5288 u32 file_offset;
5289 char *namestr;
5290 u32 i;
5291 u32 max_queues = 0;
5292 u32 result;
5293
5294 card->dumphandle = slic_dump_open_file(card);
5295
5296 if (card->dumphandle == NULL) {
5297 DBG_MSG("[slicmon] Cant create Dump file - dump failed\n");
5298 return -ENOMEM;
5299 }
5300 if (!card->dumpbuffer) {
5301 DBG_MSG("[slicmon] Insufficient memory for dump\n");
5302 return -ENOMEM;
5303 }
5304 if (!card->cmdbuffer) {
5305 DBG_MSG("[slicmon] Insufficient cmd memory for dump\n");
5306 return -ENOMEM;
5307 }
5308
5309 /*
5310 * Write the file version to the core header.
5311 */
5312 namestr = slic_proc_version;
5313 for (i = 0; i < (DRIVER_NAME_SIZE - 1); i++, namestr++) {
5314 if (!namestr)
5315 break;
5316 corehdr.driver_version[i] = *namestr;
5317 }
5318 corehdr.driver_version[i] = 0;
5319
5320 file_offset = sizeof(struct sliccore_hdr);
5321
5322 /*
5323 * Issue the following debug commands to the SLIC:
5324 * - Halt both receive and transmit
5325 * - Dump receive registers
5326 * - Dump transmit registers
5327 * - Dump sram
5328 * - Dump dram
5329 * - Dump queues
5330 */
5331 DBG_MSG("slicDump HALT Receive Processor\n");
5332 card->dumptime_start = jiffies;
5333
5334 status = slic_dump_halt(card, PROC_RECEIVE);
5335 if (status != STATUS_SUCCESS) {
5336 DBG_ERROR
5337 ("Cant halt receive sequencer - dump failed status[%x]\n",
5338 status);
5339 goto done;
5340 }
5341
5342 DBG_MSG("slicDump HALT Transmit Processor\n");
5343 status = slic_dump_halt(card, PROC_TRANSMIT);
5344 if (status != STATUS_SUCCESS) {
5345 DBG_ERROR("Cant halt transmit sequencer - dump failed\n");
5346 goto done;
5347 }
5348
5349 /* Dump receive regs */
5350 status = slic_dump_reg(card, PROC_RECEIVE);
5351 if (status != STATUS_SUCCESS) {
5352 DBG_ERROR("Cant dump receive registers - dump failed\n");
5353 goto done;
5354 }
5355
5356 DBG_MSG("slicDump Write Receive REGS len[%x] offset[%x]\n",
5357 (SLIC_NUM_REG * 4), file_offset);
5358
5359 result =
5360 slic_dump_write(card, card->dumpbuffer, SLIC_NUM_REG * 4,
5361 file_offset);
5362 if (!result) {
5363 DBG_ERROR
5364 ("Cant write rcv registers to dump file - dump failed\n");
5365 goto done;
5366 }
5367
5368 corehdr.RcvRegOff = file_offset;
5369 corehdr.RcvRegsize = SLIC_NUM_REG * 4;
5370 file_offset += SLIC_NUM_REG * 4;
5371
5372 /* Dump transmit regs */
5373 status = slic_dump_reg(card, PROC_TRANSMIT);
5374 if (status != STATUS_SUCCESS) {
5375 DBG_ERROR("Cant dump transmit registers - dump failed\n");
5376 goto done;
5377 }
5378
5379 DBG_MSG("slicDump Write XMIT REGS len[%x] offset[%x]\n",
5380 (SLIC_NUM_REG * 4), file_offset);
5381
5382 result =
5383 slic_dump_write(card, card->dumpbuffer, SLIC_NUM_REG * 4,
5384 file_offset);
5385 if (!result) {
5386 DBG_ERROR
5387 ("Cant write xmt registers to dump file - dump failed\n");
5388 goto done;
5389 }
5390
5391 corehdr.XmtRegOff = file_offset;
5392 corehdr.XmtRegsize = SLIC_NUM_REG * 4;
5393 file_offset += SLIC_NUM_REG * 4;
5394
5395 regs = SLIC_GBMAX_REG;
5396
5397 corehdr.FileRegOff = file_offset;
5398 corehdr.FileRegsize = regs * 4;
5399
5400 for (offset = 0; regs;) {
5401 len = MIN(regs, 16); /* Can only xfr 16 regs at a time */
5402
5403 status = slic_dump_data(card, offset, (ushort) len, DESC_RFILE);
5404
5405 if (status != STATUS_SUCCESS) {
5406 DBG_ERROR("Cant dump register file - dump failed\n");
5407 goto done;
5408 }
5409
5410 DBG_MSG("slicDump Write RegisterFile len[%x] offset[%x]\n",
5411 (len * 4), file_offset);
5412
5413 result =
5414 slic_dump_write(card, card->dumpbuffer, len * 4,
5415 file_offset);
5416 if (!result) {
5417 DBG_ERROR
5418 ("Cant write register file to dump file - "
5419 "dump failed\n");
5420 goto done;
5421 }
5422
5423 file_offset += len * 4;
5424 offset += len;
5425 regs -= len;
5426 }
5427
5428 dram_size = card->config.DramSize * 0x10000;
5429
5430 switch (adapter->devid) {
5431 case SLIC_2GB_DEVICE_ID:
5432 sram_size = SLIC_SRAM_SIZE2GB;
5433 break;
5434 case SLIC_1GB_DEVICE_ID:
5435 sram_size = SLIC_SRAM_SIZE1GB;
5436 break;
5437 default:
5438 sram_size = 0;
5439 ASSERT(0);
5440 break;
5441 }
5442
5443 corehdr.SramOff = file_offset;
5444 corehdr.Sramsize = sram_size;
5445
5446 for (offset = 0; sram_size;) {
5447 len = MIN(sram_size, DUMP_BUF_SIZE);
5448 status = slic_dump_data(card, offset, (ushort) len, DESC_SRAM);
5449 if (status != STATUS_SUCCESS) {
5450 DBG_ERROR
5451 ("[slicmon] Cant dump SRAM at offset %x - "
5452 "dump failed\n", (uint) offset);
5453 goto done;
5454 }
5455
5456 DBG_MSG("[slicmon] slicDump Write SRAM len[%x] offset[%x]\n",
5457 len, file_offset);
5458
5459 result =
5460 slic_dump_write(card, card->dumpbuffer, len, file_offset);
5461 if (!result) {
5462 DBG_ERROR
5463 ("[slicmon] Cant write SRAM to dump file - "
5464 "dump failed\n");
5465 goto done;
5466 }
5467
5468 file_offset += len;
5469 offset += len;
5470 sram_size -= len;
5471 }
5472
5473 corehdr.DramOff = file_offset;
5474 corehdr.Dramsize = dram_size;
5475
5476 for (offset = 0; dram_size;) {
5477 len = MIN(dram_size, DUMP_BUF_SIZE);
5478
5479 status = slic_dump_data(card, offset, (ushort) len, DESC_DRAM);
5480 if (status != STATUS_SUCCESS) {
5481 DBG_ERROR
5482 ("[slicmon] Cant dump dram at offset %x - "
5483 "dump failed\n", (uint) offset);
5484 goto done;
5485 }
5486
5487 DBG_MSG("slicDump Write DRAM len[%x] offset[%x]\n", len,
5488 file_offset);
5489
5490 result =
5491 slic_dump_write(card, card->dumpbuffer, len, file_offset);
5492 if (!result) {
5493 DBG_ERROR
5494 ("[slicmon] Cant write DRAM to dump file - "
5495 "dump failed\n");
5496 goto done;
5497 }
5498
5499 file_offset += len;
5500 offset += len;
5501 dram_size -= len;
5502 }
5503
5504 max_queues = SLIC_MAX_QUEUE;
5505
5506 for (queue = 0; queue < max_queues; queue++) {
5507 u32 *qarray = (u32 *) card->dumpbuffer;
5508 u32 qarray_physl = card->dumpbuffer_physl;
5509 u32 qarray_physh = card->dumpbuffer_physh;
5510 u32 qstart;
5511 u32 qdelta;
5512 u32 qtotal = 0;
5513
5514 DBG_MSG("[slicmon] Start Dump of QUEUE #0x%x\n", (uint) queue);
5515
5516 for (offset = 0; offset < (DUMP_BUF_SIZE >> 2); offset++) {
5517 qstart = jiffies;
5518 qdelta = 0;
5519
5520 status = slic_dump_queue(card,
5521 qarray_physl,
5522 qarray_physh, queue);
5523 qarray_physl += 4;
5524
5525 if (status != STATUS_SUCCESS)
5526 break;
5527
5528 if (jiffies > qstart) {
5529 qdelta = jiffies - qstart;
5530 qtotal += qdelta;
5531 }
5532 }
5533
5534 if (offset)
5535 qdelta = qtotal / offset;
5536 else
5537 qdelta = 0;
5538
5539 /* DBG_MSG(" slicDump Write QUEUE #0x%x len[%x] offset[%x] "
5540 "avgjiffs[%x]\n", queue, (offset*4), file_offset, qdelta); */
5541
5542 result =
5543 slic_dump_write(card, card->dumpbuffer, offset * 4,
5544 file_offset);
5545
5546 if (!result) {
5547 DBG_ERROR
5548 ("[slicmon] Cant write QUEUES to dump file - "
5549 "dump failed\n");
5550 goto done;
5551 }
5552
5553 corehdr.queues[queue].queueOff = file_offset;
5554 corehdr.queues[queue].queuesize = offset * 4;
5555 file_offset += offset * 4;
5556
5557 /* DBG_MSG(" Reload QUEUE #0x%x elements[%x]\n", (uint)queue, offset);*/
5558 /*
5559 * Fill the queue back up
5560 */
5561 for (i = 0; i < offset; i++) {
5562 qstart = jiffies;
5563 qdelta = 0;
5564
5565 status = slic_dump_load_queue(card, qarray[i], queue);
5566 if (status != STATUS_SUCCESS)
5567 break;
5568
5569 if (jiffies > qstart) {
5570 qdelta = jiffies - qstart;
5571 qtotal += qdelta;
5572 }
5573 }
5574
5575 if (offset)
5576 qdelta = qtotal / offset;
5577 else
5578 qdelta = 0;
5579
5580 /* DBG_MSG(" Reload DONE avgjiffs[%x]\n", qdelta); */
5581
5582 resume = 1;
5583 }
5584
5585 len = SLIC_GB_CAMAB_SZE * 4;
5586 status = slic_dump_cam(card, 0, len, DUMP_CAM_A);
5587 if (status != STATUS_SUCCESS) {
5588 DBG_ERROR("[slicmon] Can't dump CAM_A - dump failed\n");
5589 goto done;
5590 }
5591
5592 result = slic_dump_write(card, card->dumpbuffer, len, file_offset);
5593 if (result) {
5594 DBG_ERROR
5595 ("[slicmon] Can't write CAM_A data to dump file - "
5596 "dump failed\n");
5597 goto done;
5598 }
5599 corehdr.CamAMOff = file_offset;
5600 corehdr.CamASize = len;
5601 file_offset += len;
5602
5603 len = SLIC_GB_CAMCD_SZE * 4;
5604 status = slic_dump_cam(card, 0, len, DUMP_CAM_C);
5605 if (status) {
5606 DBG_ERROR("[slicmon] Can't dump CAM_C - dump failed\n");
5607 goto done;
5608 }
5609
5610 result = slic_dump_write(card, card->dumpbuffer, len, file_offset);
5611 if (result) {
5612 DBG_ERROR
5613 ("[slicmon] Can't write CAM_C data to dump file - "
5614 "dump failed\n");
5615 goto done;
5616 }
5617 corehdr.CamCMOff = file_offset;
5618 corehdr.CamCSize = len;
5619 file_offset += len;
5620
5621 done:
5622 /*
5623 * Write out the core header
5624 */
5625 file_offset = 0;
5626 DBG_MSG("[slicmon] Write CoreHeader len[%x] offset[%x]\n",
5627 (uint) sizeof(struct sliccore_hdr), file_offset);
5628
5629 result =
5630 slic_dump_write(card, &corehdr, sizeof(struct sliccore_hdr),
5631 file_offset);
5632 DBG_MSG("[slicmon] corehdr xoff[%x] xsz[%x]\n"
5633 " roff[%x] rsz[%x] fileoff[%x] filesz[%x]\n"
5634 " sramoff[%x] sramsz[%x], dramoff[%x] dramsz[%x]\n"
5635 " corehdr_offset[%x]\n", corehdr.XmtRegOff,
5636 corehdr.XmtRegsize, corehdr.RcvRegOff, corehdr.RcvRegsize,
5637 corehdr.FileRegOff, corehdr.FileRegsize, corehdr.SramOff,
5638 corehdr.Sramsize, corehdr.DramOff, corehdr.Dramsize,
5639 (uint) sizeof(struct sliccore_hdr));
5640 for (i = 0; i < max_queues; i++) {
5641 DBG_MSG("[slicmon] QUEUE 0x%x offset[%x] size[%x]\n",
5642 (uint) i, corehdr.queues[i].queueOff,
5643 corehdr.queues[i].queuesize);
5644
5645 }
5646
5647 slic_dump_close_file(card);
5648
5649 if (resume) {
5650 DBG_MSG("slicDump RESTART RECEIVE and XMIT PROCESSORS\n\n");
5651 slic_dump_resume(card, PROC_RECEIVE);
5652 slic_dump_resume(card, PROC_TRANSMIT);
5653 }
5654
5655 return status;
5656 }
5657
5658 static u32 slic_dump_halt(struct sliccard *card, unsigned char proc)
5659 {
5660 unsigned char *cmd = card->cmdbuffer;
5661
5662 *cmd = COMMAND_BYTE(CMD_HALT, 0, proc);
5663
5664 return slic_dump_send_cmd(card,
5665 card->cmdbuffer_physl,
5666 card->cmdbuffer_physh, 0, 0);
5667 }
5668
5669 static u32 slic_dump_resume(struct sliccard *card, unsigned char proc)
5670 {
5671 unsigned char *cmd = card->cmdbuffer;
5672
5673 *cmd = COMMAND_BYTE(CMD_RUN, 0, proc);
5674
5675 return slic_dump_send_cmd(card,
5676 card->cmdbuffer_physl,
5677 card->cmdbuffer_physh, 0, 0);
5678 }
5679
5680 static u32 slic_dump_reg(struct sliccard *card, unsigned char proc)
5681 {
5682 struct dump_cmd *dump = (struct dump_cmd *)card->cmdbuffer;
5683
5684 dump->cmd = COMMAND_BYTE(CMD_DUMP, 0, proc);
5685 dump->desc = DESC_REG;
5686 dump->count = 0;
5687 dump->addr = 0;
5688
5689 return slic_dump_send_cmd(card,
5690 card->cmdbuffer_physl,
5691 card->cmdbuffer_physh,
5692 card->dumpbuffer_physl,
5693 card->dumpbuffer_physh);
5694 }
5695
5696 static u32 slic_dump_data(struct sliccard *card,
5697 u32 addr, ushort count, unsigned char desc)
5698 {
5699 struct dump_cmd *dump = (struct dump_cmd *)card->cmdbuffer;
5700
5701 dump->cmd = COMMAND_BYTE(CMD_DUMP, 0, PROC_RECEIVE);
5702 dump->desc = desc;
5703 dump->count = count;
5704 dump->addr = addr;
5705
5706 return slic_dump_send_cmd(card,
5707 card->cmdbuffer_physl,
5708 card->cmdbuffer_physh,
5709 card->dumpbuffer_physl,
5710 card->dumpbuffer_physh);
5711 }
5712
5713 static u32 slic_dump_queue(struct sliccard *card,
5714 u32 addr, u32 buf_physh, u32 queue)
5715 {
5716 struct dump_cmd *dump = (struct dump_cmd *)card->cmdbuffer;
5717
5718 dump->cmd = COMMAND_BYTE(CMD_DUMP, 0, PROC_RECEIVE);
5719 dump->desc = DESC_QUEUE;
5720 dump->count = 1;
5721 dump->addr = queue;
5722
5723 return slic_dump_send_cmd(card,
5724 card->cmdbuffer_physl,
5725 card->cmdbuffer_physh,
5726 addr, card->dumpbuffer_physh);
5727 }
5728
5729 static u32 slic_dump_load_queue(struct sliccard *card, u32 data,
5730 u32 queue)
5731 {
5732 struct dump_cmd *load = (struct dump_cmd *) card->cmdbuffer;
5733
5734 load->cmd = COMMAND_BYTE(CMD_LOAD, 0, PROC_RECEIVE);
5735 load->desc = DESC_QUEUE;
5736 load->count = (ushort) queue;
5737 load->addr = data;
5738
5739 return slic_dump_send_cmd(card,
5740 card->cmdbuffer_physl,
5741 card->cmdbuffer_physh, 0, 0);
5742 }
5743
5744 static u32 slic_dump_cam(struct sliccard *card,
5745 u32 addr, u32 count, unsigned char desc)
5746 {
5747 struct dump_cmd *dump = (struct dump_cmd *)card->cmdbuffer;
5748
5749 dump->cmd = COMMAND_BYTE(CMD_CAM_OPS, 0, PROC_NONE);
5750 dump->desc = desc;
5751 dump->count = count;
5752 dump->addr = 0;
5753
5754 return slic_dump_send_cmd(card,
5755 card->cmdbuffer_physl,
5756 card->cmdbuffer_physh,
5757 addr, card->dumpbuffer_physh);
5758 }
5759
5760 static u32 slic_dump_send_cmd(struct sliccard *card,
5761 u32 cmd_physl,
5762 u32 cmd_physh,
5763 u32 buf_physl, u32 buf_physh)
5764 {
5765 ulong timeout = SLIC_MS_TO_JIFFIES(500); /* 500 msec */
5766 u32 attempts = 5;
5767 u32 delay = SLIC_MS_TO_JIFFIES(10); /* 10 msec */
5768 struct adapter *adapter = card->master;
5769
5770 ASSERT(adapter);
5771 do {
5772 /*
5773 * Zero the Dumpstatus field of the adapter structure
5774 */
5775 card->dumpstatus = 0;
5776 /*
5777 * Issue the dump command via a utility processor request.
5778 *
5779 * Kludge: We use the Informationbuffer parameter to hold
5780 * the buffer address
5781 */
5782 slic_upr_request(adapter, SLIC_UPR_DUMP, cmd_physl, cmd_physh,
5783 buf_physl, buf_physh);
5784
5785 timeout += jiffies;
5786 /*
5787 * Spin until completion or timeout.
5788 */
5789 while (!card->dumpstatus) {
5790 int num_sleeps = 0;
5791
5792 if (jiffies > timeout) {
5793 /*
5794 * Complete the timed-out DUMP UPR request.
5795 */
5796 slic_upr_request_complete(adapter, 0);
5797 DBG_ERROR
5798 ("%s: TIMED OUT num_sleeps[%x] "
5799 "status[%x]\n",
5800 __func__, num_sleeps, STATUS_FAILURE);
5801
5802 return STATUS_FAILURE;
5803 }
5804 num_sleeps++;
5805 SLIC_INTERRUPTIBLE_SLEEP_ON_TIMEOUT(card->dump_wq,
5806 delay);
5807 }
5808
5809 if (card->dumpstatus & ISR_UPCERR) {
5810 /*
5811 * Error (or queue empty)
5812 */
5813 /* DBG_ERROR("[slicmon] %s: DUMP_STATUS & ISR_UPCERR status[%x]\n",
5814 __func__, STATUS_FAILURE); */
5815
5816 return STATUS_FAILURE;
5817 } else if (card->dumpstatus & ISR_UPCBSY) {
5818 /*
5819 * Retry
5820 */
5821 DBG_ERROR("%s: ISR_UPCBUSY attempt[%x]\n", __func__,
5822 attempts);
5823
5824 attempts--;
5825 } else {
5826 /*
5827 * success
5828 */
5829 return STATUS_SUCCESS;
5830 }
5831
5832 } while (attempts);
5833
5834 DBG_ERROR("%s: GAVE UP AFTER SEVERAL ATTEMPTS status[%x]\n",
5835 __func__, STATUS_FAILURE);
5836
5837 /*
5838 * Gave up after several attempts
5839 */
5840 return STATUS_FAILURE;
5841 }
5842
5843 #endif
5844 /*=============================================================================
5845 =============================================================================
5846 === ===
5847 === *** END **** END **** END **** END *** ===
5848 === SLIC DUMP MANAGEMENT SECTION ===
5849 === ===
5850 === ===
5851 === ===
5852 =============================================================================
5853 ============================================================================*/
5854
5855 /******************************************************************************/
5856 /**************** MODULE INITIATION / TERMINATION FUNCTIONS ***************/
5857 /******************************************************************************/
5858
5859 static struct pci_driver slic_driver = {
5860 .name = DRV_NAME,
5861 .id_table = slic_pci_tbl,
5862 .probe = slic_entry_probe,
5863 .remove = slic_entry_remove,
5864 #if SLIC_POWER_MANAGEMENT_ENABLED
5865 .suspend = slicpm_suspend,
5866 .resume = slicpm_resume,
5867 #endif
5868 /* .shutdown = slic_shutdown, MOOK_INVESTIGATE */
5869 };
5870
5871 static int __init slic_module_init(void)
5872 {
5873 struct pci_device_id *pcidev;
5874 int ret;
5875
5876 /* DBG_MSG("slicoss: %s ENTER cpu %d\n", __func__, smp_processor_id()); */
5877
5878 slic_init_driver();
5879
5880 if (debug >= 0 && slic_debug != debug)
5881 printk(SLICLEVEL "slicoss: debug level is %d.\n", debug);
5882 if (debug >= 0)
5883 slic_debug = debug;
5884
5885 pcidev = (struct pci_device_id *)slic_driver.id_table;
5886 /* DBG_MSG("slicoss: %s call pci_module_init jiffies[%lx] cpu #%d\n",
5887 __func__, jiffies, smp_processor_id()); */
5888
5889 ret = pci_register_driver(&slic_driver);
5890
5891 /* DBG_MSG("slicoss: %s EXIT after call pci_module_init jiffies[%lx] "
5892 "cpu #%d status[%x]\n",__func__, jiffies,
5893 smp_processor_id(), ret); */
5894
5895 return ret;
5896 }
5897
5898 static void __exit slic_module_cleanup(void)
5899 {
5900 /* DBG_MSG("slicoss: %s ENTER\n", __func__); */
5901 pci_unregister_driver(&slic_driver);
5902 slic_debug_cleanup();
5903 /* DBG_MSG("slicoss: %s EXIT\n", __func__); */
5904 }
5905
5906 module_init(slic_module_init);
5907 module_exit(slic_module_cleanup);
Linux kernel - Deliverables
This page took 0.285057 seconds and 4 git commands to generate.