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[deliverable/linux.git] / drivers / staging / sm7xx / smtcfb.c
1 /*
2 * Silicon Motion SM7XX frame buffer device
3 *
4 * Copyright (C) 2006 Silicon Motion Technology Corp.
5 * Authors: Ge Wang, gewang@siliconmotion.com
6 * Boyod boyod.yang@siliconmotion.com.cn
7 *
8 * Copyright (C) 2009 Lemote, Inc.
9 * Author: Wu Zhangjin, wuzhangjin@gmail.com
10 *
11 * Copyright (C) 2011 Igalia, S.L.
12 * Author: Javier M. Mellid <jmunhoz@igalia.com>
13 *
14 * This file is subject to the terms and conditions of the GNU General Public
15 * License. See the file COPYING in the main directory of this archive for
16 * more details.
17 *
18 */
19
20 #include <linux/io.h>
21 #include <linux/fb.h>
22 #include <linux/pci.h>
23 #include <linux/init.h>
24 #include <linux/slab.h>
25 #include <linux/uaccess.h>
26 #include <linux/module.h>
27 #include <linux/console.h>
28 #include <linux/screen_info.h>
29
30 #ifdef CONFIG_PM
31 #include <linux/pm.h>
32 #endif
33
34 #include "smtcfb.h"
35
36 struct screen_info smtc_screen_info;
37
38 /*
39 * Private structure
40 */
41 struct smtcfb_info {
42 struct fb_info fb;
43 struct pci_dev *pdev;
44 struct {
45 u8 red, green, blue;
46 } palette[NR_RGB];
47 u_int palette_size;
48
49 u16 chipID;
50 unsigned char __iomem *m_pMMIO;
51 char __iomem *m_pLFB;
52 char *m_pDPR;
53 char *m_pVPR;
54 char *m_pCPR;
55
56 u_int width;
57 u_int height;
58 u_int hz;
59 u_long BaseAddressInVRAM;
60 u8 chipRevID;
61 };
62
63 struct vesa_mode_table {
64 char mode_index[6];
65 u16 lfb_width;
66 u16 lfb_height;
67 u16 lfb_depth;
68 };
69
70 static struct vesa_mode_table vesa_mode[] = {
71 {"0x301", 640, 480, 8},
72 {"0x303", 800, 600, 8},
73 {"0x305", 1024, 768, 8},
74 {"0x307", 1280, 1024, 8},
75
76 {"0x311", 640, 480, 16},
77 {"0x314", 800, 600, 16},
78 {"0x317", 1024, 768, 16},
79 {"0x31A", 1280, 1024, 16},
80
81 {"0x312", 640, 480, 24},
82 {"0x315", 800, 600, 24},
83 {"0x318", 1024, 768, 24},
84 {"0x31B", 1280, 1024, 24},
85 };
86
87 char __iomem *smtc_RegBaseAddress; /* Memory Map IO starting address */
88 char __iomem *smtc_VRAMBaseAddress; /* video memory starting address */
89
90 static u32 colreg[17];
91
92 static struct fb_var_screeninfo smtcfb_var = {
93 .xres = 1024,
94 .yres = 600,
95 .xres_virtual = 1024,
96 .yres_virtual = 600,
97 .bits_per_pixel = 16,
98 .red = {16, 8, 0},
99 .green = {8, 8, 0},
100 .blue = {0, 8, 0},
101 .activate = FB_ACTIVATE_NOW,
102 .height = -1,
103 .width = -1,
104 .vmode = FB_VMODE_NONINTERLACED,
105 };
106
107 static struct fb_fix_screeninfo smtcfb_fix = {
108 .id = "sm712fb",
109 .type = FB_TYPE_PACKED_PIXELS,
110 .visual = FB_VISUAL_TRUECOLOR,
111 .line_length = 800 * 3,
112 .accel = FB_ACCEL_SMI_LYNX,
113 };
114
115 static void sm712_set_timing(struct smtcfb_info *sfb)
116 {
117 int i = 0, j = 0;
118 u32 m_nScreenStride;
119
120 dev_dbg(&sfb->pdev->dev,
121 "sfb->width=%d sfb->height=%d "
122 "sfb->fb.var.bits_per_pixel=%d sfb->hz=%d\n",
123 sfb->width, sfb->height, sfb->fb.var.bits_per_pixel, sfb->hz);
124
125 for (j = 0; j < numVGAModes; j++) {
126 if (VGAMode[j].mmSizeX == sfb->width &&
127 VGAMode[j].mmSizeY == sfb->height &&
128 VGAMode[j].bpp == sfb->fb.var.bits_per_pixel &&
129 VGAMode[j].hz == sfb->hz) {
130
131 dev_dbg(&sfb->pdev->dev,
132 "VGAMode[j].mmSizeX=%d VGAMode[j].mmSizeY=%d "
133 "VGAMode[j].bpp=%d VGAMode[j].hz=%d\n",
134 VGAMode[j].mmSizeX, VGAMode[j].mmSizeY,
135 VGAMode[j].bpp, VGAMode[j].hz);
136
137 dev_dbg(&sfb->pdev->dev, "VGAMode index=%d\n", j);
138
139 smtc_mmiowb(0x0, 0x3c6);
140
141 smtc_seqw(0, 0x1);
142
143 smtc_mmiowb(VGAMode[j].Init_MISC, 0x3c2);
144
145 /* init SEQ register SR00 - SR04 */
146 for (i = 0; i < SIZE_SR00_SR04; i++)
147 smtc_seqw(i, VGAMode[j].Init_SR00_SR04[i]);
148
149 /* init SEQ register SR10 - SR24 */
150 for (i = 0; i < SIZE_SR10_SR24; i++)
151 smtc_seqw(i + 0x10,
152 VGAMode[j].Init_SR10_SR24[i]);
153
154 /* init SEQ register SR30 - SR75 */
155 for (i = 0; i < SIZE_SR30_SR75; i++)
156 if (((i + 0x30) != 0x62) \
157 && ((i + 0x30) != 0x6a) \
158 && ((i + 0x30) != 0x6b))
159 smtc_seqw(i + 0x30,
160 VGAMode[j].Init_SR30_SR75[i]);
161
162 /* init SEQ register SR80 - SR93 */
163 for (i = 0; i < SIZE_SR80_SR93; i++)
164 smtc_seqw(i + 0x80,
165 VGAMode[j].Init_SR80_SR93[i]);
166
167 /* init SEQ register SRA0 - SRAF */
168 for (i = 0; i < SIZE_SRA0_SRAF; i++)
169 smtc_seqw(i + 0xa0,
170 VGAMode[j].Init_SRA0_SRAF[i]);
171
172 /* init Graphic register GR00 - GR08 */
173 for (i = 0; i < SIZE_GR00_GR08; i++)
174 smtc_grphw(i, VGAMode[j].Init_GR00_GR08[i]);
175
176 /* init Attribute register AR00 - AR14 */
177 for (i = 0; i < SIZE_AR00_AR14; i++)
178 smtc_attrw(i, VGAMode[j].Init_AR00_AR14[i]);
179
180 /* init CRTC register CR00 - CR18 */
181 for (i = 0; i < SIZE_CR00_CR18; i++)
182 smtc_crtcw(i, VGAMode[j].Init_CR00_CR18[i]);
183
184 /* init CRTC register CR30 - CR4D */
185 for (i = 0; i < SIZE_CR30_CR4D; i++)
186 smtc_crtcw(i + 0x30,
187 VGAMode[j].Init_CR30_CR4D[i]);
188
189 /* init CRTC register CR90 - CRA7 */
190 for (i = 0; i < SIZE_CR90_CRA7; i++)
191 smtc_crtcw(i + 0x90,
192 VGAMode[j].Init_CR90_CRA7[i]);
193 }
194 }
195 smtc_mmiowb(0x67, 0x3c2);
196
197 /* set VPR registers */
198 writel(0x0, sfb->m_pVPR + 0x0C);
199 writel(0x0, sfb->m_pVPR + 0x40);
200
201 /* set data width */
202 m_nScreenStride =
203 (sfb->width * sfb->fb.var.bits_per_pixel) / 64;
204 switch (sfb->fb.var.bits_per_pixel) {
205 case 8:
206 writel(0x0, sfb->m_pVPR + 0x0);
207 break;
208 case 16:
209 writel(0x00020000, sfb->m_pVPR + 0x0);
210 break;
211 case 24:
212 writel(0x00040000, sfb->m_pVPR + 0x0);
213 break;
214 case 32:
215 writel(0x00030000, sfb->m_pVPR + 0x0);
216 break;
217 }
218 writel((u32) (((m_nScreenStride + 2) << 16) | m_nScreenStride),
219 sfb->m_pVPR + 0x10);
220
221 }
222
223 static void sm712_setpalette(int regno, unsigned red, unsigned green,
224 unsigned blue, struct fb_info *info)
225 {
226 struct smtcfb_info *sfb = info->par;
227
228 if (sfb->BaseAddressInVRAM)
229 /*
230 * second display palette for dual head. Enable CRT RAM, 6-bit
231 * RAM
232 */
233 smtc_seqw(0x66, (smtc_seqr(0x66) & 0xC3) | 0x20);
234 else
235 /* primary display palette. Enable LCD RAM only, 6-bit RAM */
236 smtc_seqw(0x66, (smtc_seqr(0x66) & 0xC3) | 0x10);
237 smtc_mmiowb(regno, dac_reg);
238 smtc_mmiowb(red >> 10, dac_val);
239 smtc_mmiowb(green >> 10, dac_val);
240 smtc_mmiowb(blue >> 10, dac_val);
241 }
242
243 static void smtc_set_timing(struct smtcfb_info *sfb)
244 {
245 switch (sfb->chipID) {
246 case 0x710:
247 case 0x712:
248 case 0x720:
249 sm712_set_timing(sfb);
250 break;
251 }
252 }
253
254 /* chan_to_field
255 *
256 * convert a colour value into a field position
257 *
258 * from pxafb.c
259 */
260
261 static inline unsigned int chan_to_field(unsigned int chan,
262 struct fb_bitfield *bf)
263 {
264 chan &= 0xffff;
265 chan >>= 16 - bf->length;
266 return chan << bf->offset;
267 }
268
269 static int smtc_blank(int blank_mode, struct fb_info *info)
270 {
271 /* clear DPMS setting */
272 switch (blank_mode) {
273 case FB_BLANK_UNBLANK:
274 /* Screen On: HSync: On, VSync : On */
275 smtc_seqw(0x01, (smtc_seqr(0x01) & (~0x20)));
276 smtc_seqw(0x6a, 0x16);
277 smtc_seqw(0x6b, 0x02);
278 smtc_seqw(0x21, (smtc_seqr(0x21) & 0x77));
279 smtc_seqw(0x22, (smtc_seqr(0x22) & (~0x30)));
280 smtc_seqw(0x23, (smtc_seqr(0x23) & (~0xc0)));
281 smtc_seqw(0x24, (smtc_seqr(0x24) | 0x01));
282 smtc_seqw(0x31, (smtc_seqr(0x31) | 0x03));
283 break;
284 case FB_BLANK_NORMAL:
285 /* Screen Off: HSync: On, VSync : On Soft blank */
286 smtc_seqw(0x01, (smtc_seqr(0x01) & (~0x20)));
287 smtc_seqw(0x6a, 0x16);
288 smtc_seqw(0x6b, 0x02);
289 smtc_seqw(0x22, (smtc_seqr(0x22) & (~0x30)));
290 smtc_seqw(0x23, (smtc_seqr(0x23) & (~0xc0)));
291 smtc_seqw(0x24, (smtc_seqr(0x24) | 0x01));
292 smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
293 break;
294 case FB_BLANK_VSYNC_SUSPEND:
295 /* Screen On: HSync: On, VSync : Off */
296 smtc_seqw(0x01, (smtc_seqr(0x01) | 0x20));
297 smtc_seqw(0x20, (smtc_seqr(0x20) & (~0xB0)));
298 smtc_seqw(0x6a, 0x0c);
299 smtc_seqw(0x6b, 0x02);
300 smtc_seqw(0x21, (smtc_seqr(0x21) | 0x88));
301 smtc_seqw(0x22, ((smtc_seqr(0x22) & (~0x30)) | 0x20));
302 smtc_seqw(0x23, ((smtc_seqr(0x23) & (~0xc0)) | 0x20));
303 smtc_seqw(0x24, (smtc_seqr(0x24) & (~0x01)));
304 smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
305 smtc_seqw(0x34, (smtc_seqr(0x34) | 0x80));
306 break;
307 case FB_BLANK_HSYNC_SUSPEND:
308 /* Screen On: HSync: Off, VSync : On */
309 smtc_seqw(0x01, (smtc_seqr(0x01) | 0x20));
310 smtc_seqw(0x20, (smtc_seqr(0x20) & (~0xB0)));
311 smtc_seqw(0x6a, 0x0c);
312 smtc_seqw(0x6b, 0x02);
313 smtc_seqw(0x21, (smtc_seqr(0x21) | 0x88));
314 smtc_seqw(0x22, ((smtc_seqr(0x22) & (~0x30)) | 0x10));
315 smtc_seqw(0x23, ((smtc_seqr(0x23) & (~0xc0)) | 0xD8));
316 smtc_seqw(0x24, (smtc_seqr(0x24) & (~0x01)));
317 smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
318 smtc_seqw(0x34, (smtc_seqr(0x34) | 0x80));
319 break;
320 case FB_BLANK_POWERDOWN:
321 /* Screen On: HSync: Off, VSync : Off */
322 smtc_seqw(0x01, (smtc_seqr(0x01) | 0x20));
323 smtc_seqw(0x20, (smtc_seqr(0x20) & (~0xB0)));
324 smtc_seqw(0x6a, 0x0c);
325 smtc_seqw(0x6b, 0x02);
326 smtc_seqw(0x21, (smtc_seqr(0x21) | 0x88));
327 smtc_seqw(0x22, ((smtc_seqr(0x22) & (~0x30)) | 0x30));
328 smtc_seqw(0x23, ((smtc_seqr(0x23) & (~0xc0)) | 0xD8));
329 smtc_seqw(0x24, (smtc_seqr(0x24) & (~0x01)));
330 smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
331 smtc_seqw(0x34, (smtc_seqr(0x34) | 0x80));
332 break;
333 default:
334 return -EINVAL;
335 }
336
337 return 0;
338 }
339
340 static int smtc_setcolreg(unsigned regno, unsigned red, unsigned green,
341 unsigned blue, unsigned trans, struct fb_info *info)
342 {
343 struct smtcfb_info *sfb = (struct smtcfb_info *)info;
344 u32 val;
345
346 if (regno > 255)
347 return 1;
348
349 switch (sfb->fb.fix.visual) {
350 case FB_VISUAL_DIRECTCOLOR:
351 case FB_VISUAL_TRUECOLOR:
352 /*
353 * 16/32 bit true-colour, use pseuo-palette for 16 base color
354 */
355 if (regno < 16) {
356 if (sfb->fb.var.bits_per_pixel == 16) {
357 u32 *pal = sfb->fb.pseudo_palette;
358 val = chan_to_field(red, &sfb->fb.var.red);
359 val |= chan_to_field(green, \
360 &sfb->fb.var.green);
361 val |= chan_to_field(blue, &sfb->fb.var.blue);
362 #ifdef __BIG_ENDIAN
363 pal[regno] =
364 ((red & 0xf800) >> 8) |
365 ((green & 0xe000) >> 13) |
366 ((green & 0x1c00) << 3) |
367 ((blue & 0xf800) >> 3);
368 #else
369 pal[regno] = val;
370 #endif
371 } else {
372 u32 *pal = sfb->fb.pseudo_palette;
373 val = chan_to_field(red, &sfb->fb.var.red);
374 val |= chan_to_field(green, \
375 &sfb->fb.var.green);
376 val |= chan_to_field(blue, &sfb->fb.var.blue);
377 #ifdef __BIG_ENDIAN
378 val =
379 (val & 0xff00ff00 >> 8) |
380 (val & 0x00ff00ff << 8);
381 #endif
382 pal[regno] = val;
383 }
384 }
385 break;
386
387 case FB_VISUAL_PSEUDOCOLOR:
388 /* color depth 8 bit */
389 sm712_setpalette(regno, red, green, blue, info);
390 break;
391
392 default:
393 return 1; /* unknown type */
394 }
395
396 return 0;
397
398 }
399
400 #ifdef __BIG_ENDIAN
401 static ssize_t smtcfb_read(struct fb_info *info, char __user *buf, size_t
402 count, loff_t *ppos)
403 {
404 unsigned long p = *ppos;
405
406 u32 *buffer, *dst;
407 u32 __iomem *src;
408 int c, i, cnt = 0, err = 0;
409 unsigned long total_size;
410
411 if (!info || !info->screen_base)
412 return -ENODEV;
413
414 if (info->state != FBINFO_STATE_RUNNING)
415 return -EPERM;
416
417 total_size = info->screen_size;
418
419 if (total_size == 0)
420 total_size = info->fix.smem_len;
421
422 if (p >= total_size)
423 return 0;
424
425 if (count >= total_size)
426 count = total_size;
427
428 if (count + p > total_size)
429 count = total_size - p;
430
431 buffer = kmalloc((count > PAGE_SIZE) ? PAGE_SIZE : count, GFP_KERNEL);
432 if (!buffer)
433 return -ENOMEM;
434
435 src = (u32 __iomem *) (info->screen_base + p);
436
437 if (info->fbops->fb_sync)
438 info->fbops->fb_sync(info);
439
440 while (count) {
441 c = (count > PAGE_SIZE) ? PAGE_SIZE : count;
442 dst = buffer;
443 for (i = c >> 2; i--;) {
444 *dst = fb_readl(src++);
445 *dst =
446 (*dst & 0xff00ff00 >> 8) |
447 (*dst & 0x00ff00ff << 8);
448 dst++;
449 }
450 if (c & 3) {
451 u8 *dst8 = (u8 *) dst;
452 u8 __iomem *src8 = (u8 __iomem *) src;
453
454 for (i = c & 3; i--;) {
455 if (i & 1) {
456 *dst8++ = fb_readb(++src8);
457 } else {
458 *dst8++ = fb_readb(--src8);
459 src8 += 2;
460 }
461 }
462 src = (u32 __iomem *) src8;
463 }
464
465 if (copy_to_user(buf, buffer, c)) {
466 err = -EFAULT;
467 break;
468 }
469 *ppos += c;
470 buf += c;
471 cnt += c;
472 count -= c;
473 }
474
475 kfree(buffer);
476
477 return (err) ? err : cnt;
478 }
479
480 static ssize_t
481 smtcfb_write(struct fb_info *info, const char __user *buf, size_t count,
482 loff_t *ppos)
483 {
484 unsigned long p = *ppos;
485
486 u32 *buffer, *src;
487 u32 __iomem *dst;
488 int c, i, cnt = 0, err = 0;
489 unsigned long total_size;
490
491 if (!info || !info->screen_base)
492 return -ENODEV;
493
494 if (info->state != FBINFO_STATE_RUNNING)
495 return -EPERM;
496
497 total_size = info->screen_size;
498
499 if (total_size == 0)
500 total_size = info->fix.smem_len;
501
502 if (p > total_size)
503 return -EFBIG;
504
505 if (count > total_size) {
506 err = -EFBIG;
507 count = total_size;
508 }
509
510 if (count + p > total_size) {
511 if (!err)
512 err = -ENOSPC;
513
514 count = total_size - p;
515 }
516
517 buffer = kmalloc((count > PAGE_SIZE) ? PAGE_SIZE : count, GFP_KERNEL);
518 if (!buffer)
519 return -ENOMEM;
520
521 dst = (u32 __iomem *) (info->screen_base + p);
522
523 if (info->fbops->fb_sync)
524 info->fbops->fb_sync(info);
525
526 while (count) {
527 c = (count > PAGE_SIZE) ? PAGE_SIZE : count;
528 src = buffer;
529
530 if (copy_from_user(src, buf, c)) {
531 err = -EFAULT;
532 break;
533 }
534
535 for (i = c >> 2; i--;) {
536 fb_writel((*src & 0xff00ff00 >> 8) |
537 (*src & 0x00ff00ff << 8), dst++);
538 src++;
539 }
540 if (c & 3) {
541 u8 *src8 = (u8 *) src;
542 u8 __iomem *dst8 = (u8 __iomem *) dst;
543
544 for (i = c & 3; i--;) {
545 if (i & 1) {
546 fb_writeb(*src8++, ++dst8);
547 } else {
548 fb_writeb(*src8++, --dst8);
549 dst8 += 2;
550 }
551 }
552 dst = (u32 __iomem *) dst8;
553 }
554
555 *ppos += c;
556 buf += c;
557 cnt += c;
558 count -= c;
559 }
560
561 kfree(buffer);
562
563 return (cnt) ? cnt : err;
564 }
565 #endif /* ! __BIG_ENDIAN */
566
567 void smtcfb_setmode(struct smtcfb_info *sfb)
568 {
569 switch (sfb->fb.var.bits_per_pixel) {
570 case 32:
571 sfb->fb.fix.visual = FB_VISUAL_TRUECOLOR;
572 sfb->fb.fix.line_length = sfb->fb.var.xres * 4;
573 sfb->fb.var.red.length = 8;
574 sfb->fb.var.green.length = 8;
575 sfb->fb.var.blue.length = 8;
576 sfb->fb.var.red.offset = 16;
577 sfb->fb.var.green.offset = 8;
578 sfb->fb.var.blue.offset = 0;
579
580 break;
581 case 8:
582 sfb->fb.fix.visual = FB_VISUAL_PSEUDOCOLOR;
583 sfb->fb.fix.line_length = sfb->fb.var.xres;
584 sfb->fb.var.red.offset = 5;
585 sfb->fb.var.red.length = 3;
586 sfb->fb.var.green.offset = 2;
587 sfb->fb.var.green.length = 3;
588 sfb->fb.var.blue.offset = 0;
589 sfb->fb.var.blue.length = 2;
590 break;
591 case 24:
592 sfb->fb.fix.visual = FB_VISUAL_TRUECOLOR;
593 sfb->fb.fix.line_length = sfb->fb.var.xres * 3;
594 sfb->fb.var.red.length = 8;
595 sfb->fb.var.green.length = 8;
596 sfb->fb.var.blue.length = 8;
597
598 sfb->fb.var.red.offset = 16;
599 sfb->fb.var.green.offset = 8;
600 sfb->fb.var.blue.offset = 0;
601
602 break;
603 case 16:
604 default:
605 sfb->fb.fix.visual = FB_VISUAL_TRUECOLOR;
606 sfb->fb.fix.line_length = sfb->fb.var.xres * 2;
607
608 sfb->fb.var.red.length = 5;
609 sfb->fb.var.green.length = 6;
610 sfb->fb.var.blue.length = 5;
611
612 sfb->fb.var.red.offset = 11;
613 sfb->fb.var.green.offset = 5;
614 sfb->fb.var.blue.offset = 0;
615
616 break;
617 }
618
619 sfb->width = sfb->fb.var.xres;
620 sfb->height = sfb->fb.var.yres;
621 sfb->hz = 60;
622 smtc_set_timing(sfb);
623 }
624
625 static int smtc_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
626 {
627 /* sanity checks */
628 if (var->xres_virtual < var->xres)
629 var->xres_virtual = var->xres;
630
631 if (var->yres_virtual < var->yres)
632 var->yres_virtual = var->yres;
633
634 /* set valid default bpp */
635 if ((var->bits_per_pixel != 8) && (var->bits_per_pixel != 16) &&
636 (var->bits_per_pixel != 24) && (var->bits_per_pixel != 32))
637 var->bits_per_pixel = 16;
638
639 return 0;
640 }
641
642 static int smtc_set_par(struct fb_info *info)
643 {
644 struct smtcfb_info *sfb = (struct smtcfb_info *)info;
645
646 smtcfb_setmode(sfb);
647
648 return 0;
649 }
650
651 static struct fb_ops smtcfb_ops = {
652 .owner = THIS_MODULE,
653 .fb_check_var = smtc_check_var,
654 .fb_set_par = smtc_set_par,
655 .fb_setcolreg = smtc_setcolreg,
656 .fb_blank = smtc_blank,
657 .fb_fillrect = cfb_fillrect,
658 .fb_imageblit = cfb_imageblit,
659 .fb_copyarea = cfb_copyarea,
660 #ifdef __BIG_ENDIAN
661 .fb_read = smtcfb_read,
662 .fb_write = smtcfb_write,
663 #endif
664 };
665
666 /*
667 * Alloc struct smtcfb_info and assign the default value
668 */
669 static struct smtcfb_info *smtc_alloc_fb_info(struct pci_dev *pdev, char *name)
670 {
671 struct smtcfb_info *sfb;
672
673 sfb = kzalloc(sizeof(*sfb), GFP_KERNEL);
674
675 if (!sfb)
676 return NULL;
677
678 sfb->pdev = pdev;
679
680 /*** Init sfb->fb with default value ***/
681 sfb->fb.flags = FBINFO_FLAG_DEFAULT;
682 sfb->fb.fbops = &smtcfb_ops;
683 sfb->fb.var = smtcfb_var;
684 sfb->fb.fix = smtcfb_fix;
685
686 strcpy(sfb->fb.fix.id, name);
687
688 sfb->fb.fix.type = FB_TYPE_PACKED_PIXELS;
689 sfb->fb.fix.type_aux = 0;
690 sfb->fb.fix.xpanstep = 0;
691 sfb->fb.fix.ypanstep = 0;
692 sfb->fb.fix.ywrapstep = 0;
693 sfb->fb.fix.accel = FB_ACCEL_SMI_LYNX;
694
695 sfb->fb.var.nonstd = 0;
696 sfb->fb.var.activate = FB_ACTIVATE_NOW;
697 sfb->fb.var.height = -1;
698 sfb->fb.var.width = -1;
699 /* text mode acceleration */
700 sfb->fb.var.accel_flags = FB_ACCELF_TEXT;
701 sfb->fb.var.vmode = FB_VMODE_NONINTERLACED;
702
703 sfb->fb.par = sfb;
704
705 sfb->fb.pseudo_palette = colreg;
706
707 return sfb;
708 }
709
710 /*
711 * Unmap in the memory mapped IO registers
712 */
713
714 static void smtc_unmap_mmio(struct smtcfb_info *sfb)
715 {
716 if (sfb && smtc_RegBaseAddress)
717 smtc_RegBaseAddress = NULL;
718 }
719
720 /*
721 * Map in the screen memory
722 */
723
724 static int smtc_map_smem(struct smtcfb_info *sfb,
725 struct pci_dev *pdev, u_long smem_len)
726 {
727
728 sfb->fb.fix.smem_start = pci_resource_start(pdev, 0);
729
730 #ifdef __BIG_ENDIAN
731 if (sfb->fb.var.bits_per_pixel == 32)
732 sfb->fb.fix.smem_start += 0x800000;
733 #endif
734
735 sfb->fb.fix.smem_len = smem_len;
736
737 sfb->fb.screen_base = smtc_VRAMBaseAddress;
738
739 if (!sfb->fb.screen_base) {
740 dev_err(&pdev->dev,
741 "%s: unable to map screen memory\n", sfb->fb.fix.id);
742 return -ENOMEM;
743 }
744
745 return 0;
746 }
747
748 /*
749 * Unmap in the screen memory
750 *
751 */
752 static void smtc_unmap_smem(struct smtcfb_info *sfb)
753 {
754 if (sfb && sfb->fb.screen_base) {
755 iounmap(sfb->fb.screen_base);
756 sfb->fb.screen_base = NULL;
757 }
758 }
759
760 /*
761 * We need to wake up the LynxEM+, and make sure its in linear memory mode.
762 */
763 static inline void sm7xx_init_hw(void)
764 {
765 outb_p(0x18, 0x3c4);
766 outb_p(0x11, 0x3c5);
767 }
768
769 static void smtc_free_fb_info(struct smtcfb_info *sfb)
770 {
771 if (sfb) {
772 fb_alloc_cmap(&sfb->fb.cmap, 0, 0);
773 kfree(sfb);
774 }
775 }
776
777 /*
778 * sm712vga_setup - process command line options, get vga parameter
779 * @options: string of options
780 * Returns zero.
781 *
782 */
783 static int __init sm712vga_setup(char *options)
784 {
785 int index;
786
787 if (!options || !*options)
788 return -EINVAL;
789
790 smtc_screen_info.lfb_width = 0;
791 smtc_screen_info.lfb_height = 0;
792 smtc_screen_info.lfb_depth = 0;
793
794 pr_debug("sm712vga_setup = %s\n", options);
795
796 for (index = 0;
797 index < ARRAY_SIZE(vesa_mode);
798 index++) {
799 if (strstr(options, vesa_mode[index].mode_index)) {
800 smtc_screen_info.lfb_width = vesa_mode[index].lfb_width;
801 smtc_screen_info.lfb_height =
802 vesa_mode[index].lfb_height;
803 smtc_screen_info.lfb_depth = vesa_mode[index].lfb_depth;
804 return 0;
805 }
806 }
807
808 return -1;
809 }
810 __setup("vga=", sm712vga_setup);
811
812 static int __devinit smtcfb_pci_probe(struct pci_dev *pdev,
813 const struct pci_device_id *ent)
814 {
815 struct smtcfb_info *sfb;
816 u_long smem_size = 0x00800000; /* default 8MB */
817 char name[16];
818 int err;
819 unsigned long pFramebufferPhysical;
820
821 dev_info(&pdev->dev, "Silicon Motion display driver.");
822
823 err = pci_enable_device(pdev); /* enable SMTC chip */
824 if (err)
825 return err;
826
827 sfb = smtc_alloc_fb_info(pdev, name);
828
829 if (!sfb)
830 goto failed_free;
831
832 sfb->chipID = ent->device;
833 sprintf(name, "sm%Xfb", sfb->chipID);
834
835 pci_set_drvdata(pdev, sfb);
836
837 sm7xx_init_hw();
838
839 /*get mode parameter from smtc_screen_info */
840 if (smtc_screen_info.lfb_width != 0) {
841 sfb->fb.var.xres = smtc_screen_info.lfb_width;
842 sfb->fb.var.yres = smtc_screen_info.lfb_height;
843 sfb->fb.var.bits_per_pixel = smtc_screen_info.lfb_depth;
844 } else {
845 /* default resolution 1024x600 16bit mode */
846 sfb->fb.var.xres = SCREEN_X_RES;
847 sfb->fb.var.yres = SCREEN_Y_RES;
848 sfb->fb.var.bits_per_pixel = SCREEN_BPP;
849 }
850
851 #ifdef __BIG_ENDIAN
852 if (sfb->fb.var.bits_per_pixel == 24)
853 sfb->fb.var.bits_per_pixel = (smtc_screen_info.lfb_depth = 32);
854 #endif
855 /* Map address and memory detection */
856 pFramebufferPhysical = pci_resource_start(pdev, 0);
857 pci_read_config_byte(pdev, PCI_REVISION_ID, &sfb->chipRevID);
858
859 switch (sfb->chipID) {
860 case 0x710:
861 case 0x712:
862 sfb->fb.fix.mmio_start = pFramebufferPhysical + 0x00400000;
863 sfb->fb.fix.mmio_len = 0x00400000;
864 smem_size = SM712_VIDEOMEMORYSIZE;
865 #ifdef __BIG_ENDIAN
866 sfb->m_pLFB = (smtc_VRAMBaseAddress =
867 ioremap(pFramebufferPhysical, 0x00c00000));
868 #else
869 sfb->m_pLFB = (smtc_VRAMBaseAddress =
870 ioremap(pFramebufferPhysical, 0x00800000));
871 #endif
872 sfb->m_pMMIO = (smtc_RegBaseAddress =
873 smtc_VRAMBaseAddress + 0x00700000);
874 sfb->m_pDPR = smtc_VRAMBaseAddress + 0x00408000;
875 sfb->m_pVPR = sfb->m_pLFB + 0x0040c000;
876 #ifdef __BIG_ENDIAN
877 if (sfb->fb.var.bits_per_pixel == 32) {
878 smtc_VRAMBaseAddress += 0x800000;
879 sfb->m_pLFB += 0x800000;
880 dev_info(&pdev->dev,
881 "smtc_VRAMBaseAddress=%p sfb->m_pLFB=%p",
882 smtc_VRAMBaseAddress, sfb->m_pLFB);
883 }
884 #endif
885 if (!smtc_RegBaseAddress) {
886 dev_err(&pdev->dev,
887 "%s: unable to map memory mapped IO!",
888 sfb->fb.fix.id);
889 err = -ENOMEM;
890 goto failed_fb;
891 }
892
893 /* set MCLK = 14.31818 * (0x16 / 0x2) */
894 smtc_seqw(0x6a, 0x16);
895 smtc_seqw(0x6b, 0x02);
896 smtc_seqw(0x62, 0x3e);
897 /* enable PCI burst */
898 smtc_seqw(0x17, 0x20);
899 /* enable word swap */
900 #ifdef __BIG_ENDIAN
901 if (sfb->fb.var.bits_per_pixel == 32)
902 smtc_seqw(0x17, 0x30);
903 #endif
904 break;
905 case 0x720:
906 sfb->fb.fix.mmio_start = pFramebufferPhysical;
907 sfb->fb.fix.mmio_len = 0x00200000;
908 smem_size = SM722_VIDEOMEMORYSIZE;
909 sfb->m_pDPR = ioremap(pFramebufferPhysical, 0x00a00000);
910 sfb->m_pLFB = (smtc_VRAMBaseAddress =
911 sfb->m_pDPR + 0x00200000);
912 sfb->m_pMMIO = (smtc_RegBaseAddress =
913 sfb->m_pDPR + 0x000c0000);
914 sfb->m_pVPR = sfb->m_pDPR + 0x800;
915
916 smtc_seqw(0x62, 0xff);
917 smtc_seqw(0x6a, 0x0d);
918 smtc_seqw(0x6b, 0x02);
919 break;
920 default:
921 dev_err(&pdev->dev,
922 "No valid Silicon Motion display chip was detected!");
923
924 goto failed_fb;
925 }
926
927 /* can support 32 bpp */
928 if (15 == sfb->fb.var.bits_per_pixel)
929 sfb->fb.var.bits_per_pixel = 16;
930
931 sfb->fb.var.xres_virtual = sfb->fb.var.xres;
932 sfb->fb.var.yres_virtual = sfb->fb.var.yres;
933 err = smtc_map_smem(sfb, pdev, smem_size);
934 if (err)
935 goto failed;
936
937 smtcfb_setmode(sfb);
938 /* Primary display starting from 0 position */
939 sfb->BaseAddressInVRAM = 0;
940
941 err = register_framebuffer(&sfb->fb);
942 if (err < 0)
943 goto failed;
944
945 dev_info(&pdev->dev,
946 "Silicon Motion SM%X Rev%X primary display mode %dx%d-%d Init Complete.",
947 sfb->chipID, sfb->chipRevID, sfb->fb.var.xres,
948 sfb->fb.var.yres, sfb->fb.var.bits_per_pixel);
949
950 return 0;
951
952 failed:
953 dev_err(&pdev->dev, "Silicon Motion, Inc. primary display init fail.");
954
955 smtc_unmap_smem(sfb);
956 smtc_unmap_mmio(sfb);
957 failed_fb:
958 smtc_free_fb_info(sfb);
959
960 failed_free:
961 pci_disable_device(pdev);
962
963 return err;
964 }
965
966
967 static DEFINE_PCI_DEVICE_TABLE(smtcfb_pci_table) = {
968 { PCI_DEVICE(0x126f, 0x710), },
969 { PCI_DEVICE(0x126f, 0x712), },
970 { PCI_DEVICE(0x126f, 0x720), },
971 {0,}
972 };
973
974
975 static void __devexit smtcfb_pci_remove(struct pci_dev *pdev)
976 {
977 struct smtcfb_info *sfb;
978
979 sfb = pci_get_drvdata(pdev);
980 pci_set_drvdata(pdev, NULL);
981 smtc_unmap_smem(sfb);
982 smtc_unmap_mmio(sfb);
983 unregister_framebuffer(&sfb->fb);
984 smtc_free_fb_info(sfb);
985 }
986
987 #ifdef CONFIG_PM
988 static int smtcfb_pci_suspend(struct device *device)
989 {
990 struct pci_dev *pdev = to_pci_dev(device);
991 struct smtcfb_info *sfb;
992
993 sfb = pci_get_drvdata(pdev);
994
995 /* set the hw in sleep mode use externel clock and self memory refresh
996 * so that we can turn off internal PLLs later on
997 */
998 smtc_seqw(0x20, (smtc_seqr(0x20) | 0xc0));
999 smtc_seqw(0x69, (smtc_seqr(0x69) & 0xf7));
1000
1001 console_lock();
1002 fb_set_suspend(&sfb->fb, 1);
1003 console_unlock();
1004
1005 /* additionally turn off all function blocks including internal PLLs */
1006 smtc_seqw(0x21, 0xff);
1007
1008 return 0;
1009 }
1010
1011 static int smtcfb_pci_resume(struct device *device)
1012 {
1013 struct pci_dev *pdev = to_pci_dev(device);
1014 struct smtcfb_info *sfb;
1015
1016 sfb = pci_get_drvdata(pdev);
1017
1018 /* reinit hardware */
1019 sm7xx_init_hw();
1020 switch (sfb->chipID) {
1021 case 0x710:
1022 case 0x712:
1023 /* set MCLK = 14.31818 * (0x16 / 0x2) */
1024 smtc_seqw(0x6a, 0x16);
1025 smtc_seqw(0x6b, 0x02);
1026 smtc_seqw(0x62, 0x3e);
1027 /* enable PCI burst */
1028 smtc_seqw(0x17, 0x20);
1029 #ifdef __BIG_ENDIAN
1030 if (sfb->fb.var.bits_per_pixel == 32)
1031 smtc_seqw(0x17, 0x30);
1032 #endif
1033 break;
1034 case 0x720:
1035 smtc_seqw(0x62, 0xff);
1036 smtc_seqw(0x6a, 0x0d);
1037 smtc_seqw(0x6b, 0x02);
1038 break;
1039 }
1040
1041 smtc_seqw(0x34, (smtc_seqr(0x34) | 0xc0));
1042 smtc_seqw(0x33, ((smtc_seqr(0x33) | 0x08) & 0xfb));
1043
1044 smtcfb_setmode(sfb);
1045
1046 console_lock();
1047 fb_set_suspend(&sfb->fb, 0);
1048 console_unlock();
1049
1050 return 0;
1051 }
1052
1053 static const struct dev_pm_ops sm7xx_pm_ops = {
1054 .suspend = smtcfb_pci_suspend,
1055 .resume = smtcfb_pci_resume,
1056 .freeze = smtcfb_pci_suspend,
1057 .thaw = smtcfb_pci_resume,
1058 .poweroff = smtcfb_pci_suspend,
1059 .restore = smtcfb_pci_resume,
1060 };
1061
1062 #define SM7XX_PM_OPS (&sm7xx_pm_ops)
1063
1064 #else /* !CONFIG_PM */
1065
1066 #define SM7XX_PM_OPS NULL
1067
1068 #endif /* !CONFIG_PM */
1069
1070 static struct pci_driver smtcfb_driver = {
1071 .name = "smtcfb",
1072 .id_table = smtcfb_pci_table,
1073 .probe = smtcfb_pci_probe,
1074 .remove = __devexit_p(smtcfb_pci_remove),
1075 .driver.pm = SM7XX_PM_OPS,
1076 };
1077
1078 static int __init smtcfb_init(void)
1079 {
1080 return pci_register_driver(&smtcfb_driver);
1081 }
1082
1083 static void __exit smtcfb_exit(void)
1084 {
1085 pci_unregister_driver(&smtcfb_driver);
1086 }
1087
1088 module_init(smtcfb_init);
1089 module_exit(smtcfb_exit);
1090
1091 MODULE_AUTHOR("Siliconmotion ");
1092 MODULE_DESCRIPTION("Framebuffer driver for SMI Graphic Cards");
1093 MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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