2 * Silicon Motion SM7XX frame buffer device
4 * Copyright (C) 2006 Silicon Motion Technology Corp.
5 * Authors: Ge Wang, gewang@siliconmotion.com
6 * Boyod boyod.yang@siliconmotion.com.cn
8 * Copyright (C) 2009 Lemote, Inc.
9 * Author: Wu Zhangjin, wuzhangjin@gmail.com
11 * Copyright (C) 2011 Igalia, S.L.
12 * Author: Javier M. Mellid <jmunhoz@igalia.com>
14 * This file is subject to the terms and conditions of the GNU General Public
15 * License. See the file COPYING in the main directory of this archive for
18 * Framebuffer driver for Silicon Motion SM710, SM712, SM721 and SM722 chips
23 #include <linux/pci.h>
24 #include <linux/init.h>
25 #include <linux/slab.h>
26 #include <linux/uaccess.h>
27 #include <linux/module.h>
28 #include <linux/console.h>
29 #include <linux/screen_info.h>
46 void __iomem
*lfb
; /* linear frame buffer */
47 void __iomem
*dp_regs
; /* drawing processor control regs */
48 void __iomem
*vp_regs
; /* video processor control regs */
49 void __iomem
*cp_regs
; /* capture processor control regs */
50 void __iomem
*mmio
; /* memory map IO port */
59 void __iomem
*smtc_regbaseaddress
; /* Memory Map IO starting address */
61 static struct fb_var_screeninfo smtcfb_var
= {
70 .activate
= FB_ACTIVATE_NOW
,
73 .vmode
= FB_VMODE_NONINTERLACED
,
75 .accel_flags
= FB_ACCELF_TEXT
,
78 static struct fb_fix_screeninfo smtcfb_fix
= {
80 .type
= FB_TYPE_PACKED_PIXELS
,
81 .visual
= FB_VISUAL_TRUECOLOR
,
82 .line_length
= 800 * 3,
83 .accel
= FB_ACCEL_SMI_LYNX
,
97 static struct vesa_mode vesa_mode_table
[] = {
98 {"0x301", 640, 480, 8},
99 {"0x303", 800, 600, 8},
100 {"0x305", 1024, 768, 8},
101 {"0x307", 1280, 1024, 8},
103 {"0x311", 640, 480, 16},
104 {"0x314", 800, 600, 16},
105 {"0x317", 1024, 768, 16},
106 {"0x31A", 1280, 1024, 16},
108 {"0x312", 640, 480, 24},
109 {"0x315", 800, 600, 24},
110 {"0x318", 1024, 768, 24},
111 {"0x31B", 1280, 1024, 24},
114 static struct screen_info smtc_scr_info
;
116 /* process command line options, get vga parameter */
117 static int __init
sm7xx_vga_setup(char *options
)
121 if (!options
|| !*options
)
124 smtc_scr_info
.lfb_width
= 0;
125 smtc_scr_info
.lfb_height
= 0;
126 smtc_scr_info
.lfb_depth
= 0;
128 pr_debug("sm7xx_vga_setup = %s\n", options
);
130 for (i
= 0; i
< ARRAY_SIZE(vesa_mode_table
); i
++) {
131 if (strstr(options
, vesa_mode_table
[i
].index
)) {
132 smtc_scr_info
.lfb_width
= vesa_mode_table
[i
].lfb_width
;
133 smtc_scr_info
.lfb_height
=
134 vesa_mode_table
[i
].lfb_height
;
135 smtc_scr_info
.lfb_depth
= vesa_mode_table
[i
].lfb_depth
;
142 __setup("vga=", sm7xx_vga_setup
);
144 static void sm712_setpalette(int regno
, unsigned red
, unsigned green
,
145 unsigned blue
, struct fb_info
*info
)
147 /* set bit 5:4 = 01 (write LCD RAM only) */
148 smtc_seqw(0x66, (smtc_seqr(0x66) & 0xC3) | 0x10);
150 smtc_mmiowb(regno
, dac_reg
);
151 smtc_mmiowb(red
>> 10, dac_val
);
152 smtc_mmiowb(green
>> 10, dac_val
);
153 smtc_mmiowb(blue
>> 10, dac_val
);
158 * convert a colour value into a field position
163 static inline unsigned int chan_to_field(unsigned int chan
,
164 struct fb_bitfield
*bf
)
167 chan
>>= 16 - bf
->length
;
168 return chan
<< bf
->offset
;
171 static int smtc_blank(int blank_mode
, struct fb_info
*info
)
173 /* clear DPMS setting */
174 switch (blank_mode
) {
175 case FB_BLANK_UNBLANK
:
176 /* Screen On: HSync: On, VSync : On */
177 smtc_seqw(0x01, (smtc_seqr(0x01) & (~0x20)));
178 smtc_seqw(0x6a, 0x16);
179 smtc_seqw(0x6b, 0x02);
180 smtc_seqw(0x21, (smtc_seqr(0x21) & 0x77));
181 smtc_seqw(0x22, (smtc_seqr(0x22) & (~0x30)));
182 smtc_seqw(0x23, (smtc_seqr(0x23) & (~0xc0)));
183 smtc_seqw(0x24, (smtc_seqr(0x24) | 0x01));
184 smtc_seqw(0x31, (smtc_seqr(0x31) | 0x03));
186 case FB_BLANK_NORMAL
:
187 /* Screen Off: HSync: On, VSync : On Soft blank */
188 smtc_seqw(0x01, (smtc_seqr(0x01) & (~0x20)));
189 smtc_seqw(0x6a, 0x16);
190 smtc_seqw(0x6b, 0x02);
191 smtc_seqw(0x22, (smtc_seqr(0x22) & (~0x30)));
192 smtc_seqw(0x23, (smtc_seqr(0x23) & (~0xc0)));
193 smtc_seqw(0x24, (smtc_seqr(0x24) | 0x01));
194 smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
196 case FB_BLANK_VSYNC_SUSPEND
:
197 /* Screen On: HSync: On, VSync : Off */
198 smtc_seqw(0x01, (smtc_seqr(0x01) | 0x20));
199 smtc_seqw(0x20, (smtc_seqr(0x20) & (~0xB0)));
200 smtc_seqw(0x6a, 0x0c);
201 smtc_seqw(0x6b, 0x02);
202 smtc_seqw(0x21, (smtc_seqr(0x21) | 0x88));
203 smtc_seqw(0x22, ((smtc_seqr(0x22) & (~0x30)) | 0x20));
204 smtc_seqw(0x23, ((smtc_seqr(0x23) & (~0xc0)) | 0x20));
205 smtc_seqw(0x24, (smtc_seqr(0x24) & (~0x01)));
206 smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
207 smtc_seqw(0x34, (smtc_seqr(0x34) | 0x80));
209 case FB_BLANK_HSYNC_SUSPEND
:
210 /* Screen On: HSync: Off, VSync : On */
211 smtc_seqw(0x01, (smtc_seqr(0x01) | 0x20));
212 smtc_seqw(0x20, (smtc_seqr(0x20) & (~0xB0)));
213 smtc_seqw(0x6a, 0x0c);
214 smtc_seqw(0x6b, 0x02);
215 smtc_seqw(0x21, (smtc_seqr(0x21) | 0x88));
216 smtc_seqw(0x22, ((smtc_seqr(0x22) & (~0x30)) | 0x10));
217 smtc_seqw(0x23, ((smtc_seqr(0x23) & (~0xc0)) | 0xD8));
218 smtc_seqw(0x24, (smtc_seqr(0x24) & (~0x01)));
219 smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
220 smtc_seqw(0x34, (smtc_seqr(0x34) | 0x80));
222 case FB_BLANK_POWERDOWN
:
223 /* Screen On: HSync: Off, VSync : Off */
224 smtc_seqw(0x01, (smtc_seqr(0x01) | 0x20));
225 smtc_seqw(0x20, (smtc_seqr(0x20) & (~0xB0)));
226 smtc_seqw(0x6a, 0x0c);
227 smtc_seqw(0x6b, 0x02);
228 smtc_seqw(0x21, (smtc_seqr(0x21) | 0x88));
229 smtc_seqw(0x22, ((smtc_seqr(0x22) & (~0x30)) | 0x30));
230 smtc_seqw(0x23, ((smtc_seqr(0x23) & (~0xc0)) | 0xD8));
231 smtc_seqw(0x24, (smtc_seqr(0x24) & (~0x01)));
232 smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
233 smtc_seqw(0x34, (smtc_seqr(0x34) | 0x80));
242 static int smtc_setcolreg(unsigned regno
, unsigned red
, unsigned green
,
243 unsigned blue
, unsigned trans
, struct fb_info
*info
)
245 struct smtcfb_info
*sfb
;
253 switch (sfb
->fb
.fix
.visual
) {
254 case FB_VISUAL_DIRECTCOLOR
:
255 case FB_VISUAL_TRUECOLOR
:
257 * 16/32 bit true-colour, use pseudo-palette for 16 base color
260 if (sfb
->fb
.var
.bits_per_pixel
== 16) {
261 u32
*pal
= sfb
->fb
.pseudo_palette
;
263 val
= chan_to_field(red
, &sfb
->fb
.var
.red
);
264 val
|= chan_to_field(green
, &sfb
->fb
.var
.green
);
265 val
|= chan_to_field(blue
, &sfb
->fb
.var
.blue
);
268 ((red
& 0xf800) >> 8) |
269 ((green
& 0xe000) >> 13) |
270 ((green
& 0x1c00) << 3) |
271 ((blue
& 0xf800) >> 3);
276 u32
*pal
= sfb
->fb
.pseudo_palette
;
278 val
= chan_to_field(red
, &sfb
->fb
.var
.red
);
279 val
|= chan_to_field(green
, &sfb
->fb
.var
.green
);
280 val
|= chan_to_field(blue
, &sfb
->fb
.var
.blue
);
283 (val
& 0xff00ff00 >> 8) |
284 (val
& 0x00ff00ff << 8);
291 case FB_VISUAL_PSEUDOCOLOR
:
292 /* color depth 8 bit */
293 sm712_setpalette(regno
, red
, green
, blue
, info
);
297 return 1; /* unknown type */
304 static ssize_t
smtcfb_read(struct fb_info
*info
, char __user
*buf
, size_t
307 unsigned long p
= *ppos
;
311 int c
, i
, cnt
= 0, err
= 0;
312 unsigned long total_size
;
314 if (!info
|| !info
->screen_base
)
317 if (info
->state
!= FBINFO_STATE_RUNNING
)
320 total_size
= info
->screen_size
;
323 total_size
= info
->fix
.smem_len
;
328 if (count
>= total_size
)
331 if (count
+ p
> total_size
)
332 count
= total_size
- p
;
334 buffer
= kmalloc((count
> PAGE_SIZE
) ? PAGE_SIZE
: count
, GFP_KERNEL
);
338 src
= (u32 __iomem
*) (info
->screen_base
+ p
);
340 if (info
->fbops
->fb_sync
)
341 info
->fbops
->fb_sync(info
);
344 c
= (count
> PAGE_SIZE
) ? PAGE_SIZE
: count
;
346 for (i
= c
>> 2; i
--;) {
347 *dst
= fb_readl(src
++);
349 (*dst
& 0xff00ff00 >> 8) |
350 (*dst
& 0x00ff00ff << 8);
354 u8
*dst8
= (u8
*)dst
;
355 u8 __iomem
*src8
= (u8 __iomem
*)src
;
357 for (i
= c
& 3; i
--;) {
359 *dst8
++ = fb_readb(++src8
);
361 *dst8
++ = fb_readb(--src8
);
365 src
= (u32 __iomem
*)src8
;
368 if (copy_to_user(buf
, buffer
, c
)) {
380 return (err
) ? err
: cnt
;
384 smtcfb_write(struct fb_info
*info
, const char __user
*buf
, size_t count
,
387 unsigned long p
= *ppos
;
391 int c
, i
, cnt
= 0, err
= 0;
392 unsigned long total_size
;
394 if (!info
|| !info
->screen_base
)
397 if (info
->state
!= FBINFO_STATE_RUNNING
)
400 total_size
= info
->screen_size
;
403 total_size
= info
->fix
.smem_len
;
408 if (count
> total_size
) {
413 if (count
+ p
> total_size
) {
417 count
= total_size
- p
;
420 buffer
= kmalloc((count
> PAGE_SIZE
) ? PAGE_SIZE
: count
, GFP_KERNEL
);
424 dst
= (u32 __iomem
*) (info
->screen_base
+ p
);
426 if (info
->fbops
->fb_sync
)
427 info
->fbops
->fb_sync(info
);
430 c
= (count
> PAGE_SIZE
) ? PAGE_SIZE
: count
;
433 if (copy_from_user(src
, buf
, c
)) {
438 for (i
= c
>> 2; i
--;) {
439 fb_writel((*src
& 0xff00ff00 >> 8) |
440 (*src
& 0x00ff00ff << 8), dst
++);
444 u8
*src8
= (u8
*)src
;
445 u8 __iomem
*dst8
= (u8 __iomem
*)dst
;
447 for (i
= c
& 3; i
--;) {
449 fb_writeb(*src8
++, ++dst8
);
451 fb_writeb(*src8
++, --dst8
);
455 dst
= (u32 __iomem
*)dst8
;
466 return (cnt
) ? cnt
: err
;
468 #endif /* ! __BIG_ENDIAN */
470 static void sm7xx_set_timing(struct smtcfb_info
*sfb
)
475 dev_dbg(&sfb
->pdev
->dev
,
476 "sfb->width=%d sfb->height=%d sfb->fb.var.bits_per_pixel=%d sfb->hz=%d\n",
477 sfb
->width
, sfb
->height
, sfb
->fb
.var
.bits_per_pixel
, sfb
->hz
);
479 for (j
= 0; j
< numvgamodes
; j
++) {
480 if (vgamode
[j
].mmsizex
== sfb
->width
&&
481 vgamode
[j
].mmsizey
== sfb
->height
&&
482 vgamode
[j
].bpp
== sfb
->fb
.var
.bits_per_pixel
&&
483 vgamode
[j
].hz
== sfb
->hz
) {
484 dev_dbg(&sfb
->pdev
->dev
,
485 "vgamode[j].mmsizex=%d vgamode[j].mmSizeY=%d vgamode[j].bpp=%d vgamode[j].hz=%d\n",
486 vgamode
[j
].mmsizex
, vgamode
[j
].mmsizey
,
487 vgamode
[j
].bpp
, vgamode
[j
].hz
);
489 dev_dbg(&sfb
->pdev
->dev
, "vgamode index=%d\n", j
);
491 smtc_mmiowb(0x0, 0x3c6);
495 smtc_mmiowb(vgamode
[j
].init_misc
, 0x3c2);
497 /* init SEQ register SR00 - SR04 */
498 for (i
= 0; i
< SIZE_SR00_SR04
; i
++)
499 smtc_seqw(i
, vgamode
[j
].init_sr00_sr04
[i
]);
501 /* init SEQ register SR10 - SR24 */
502 for (i
= 0; i
< SIZE_SR10_SR24
; i
++)
504 vgamode
[j
].init_sr10_sr24
[i
]);
506 /* init SEQ register SR30 - SR75 */
507 for (i
= 0; i
< SIZE_SR30_SR75
; i
++)
508 if ((i
+ 0x30) != 0x62 &&
509 (i
+ 0x30) != 0x6a &&
512 vgamode
[j
].init_sr30_sr75
[i
]);
514 /* init SEQ register SR80 - SR93 */
515 for (i
= 0; i
< SIZE_SR80_SR93
; i
++)
517 vgamode
[j
].init_sr80_sr93
[i
]);
519 /* init SEQ register SRA0 - SRAF */
520 for (i
= 0; i
< SIZE_SRA0_SRAF
; i
++)
522 vgamode
[j
].init_sra0_sraf
[i
]);
524 /* init Graphic register GR00 - GR08 */
525 for (i
= 0; i
< SIZE_GR00_GR08
; i
++)
526 smtc_grphw(i
, vgamode
[j
].init_gr00_gr08
[i
]);
528 /* init Attribute register AR00 - AR14 */
529 for (i
= 0; i
< SIZE_AR00_AR14
; i
++)
530 smtc_attrw(i
, vgamode
[j
].init_ar00_ar14
[i
]);
532 /* init CRTC register CR00 - CR18 */
533 for (i
= 0; i
< SIZE_CR00_CR18
; i
++)
534 smtc_crtcw(i
, vgamode
[j
].init_cr00_cr18
[i
]);
536 /* init CRTC register CR30 - CR4D */
537 for (i
= 0; i
< SIZE_CR30_CR4D
; i
++)
539 vgamode
[j
].init_cr30_cr4d
[i
]);
541 /* init CRTC register CR90 - CRA7 */
542 for (i
= 0; i
< SIZE_CR90_CRA7
; i
++)
544 vgamode
[j
].init_cr90_cra7
[i
]);
547 smtc_mmiowb(0x67, 0x3c2);
549 /* set VPR registers */
550 writel(0x0, sfb
->vp_regs
+ 0x0C);
551 writel(0x0, sfb
->vp_regs
+ 0x40);
555 (sfb
->width
* sfb
->fb
.var
.bits_per_pixel
) / 64;
556 switch (sfb
->fb
.var
.bits_per_pixel
) {
558 writel(0x0, sfb
->vp_regs
+ 0x0);
561 writel(0x00020000, sfb
->vp_regs
+ 0x0);
564 writel(0x00040000, sfb
->vp_regs
+ 0x0);
567 writel(0x00030000, sfb
->vp_regs
+ 0x0);
570 writel((u32
) (((m_nscreenstride
+ 2) << 16) | m_nscreenstride
),
571 sfb
->vp_regs
+ 0x10);
574 static void smtc_set_timing(struct smtcfb_info
*sfb
)
576 switch (sfb
->chip_id
) {
580 sm7xx_set_timing(sfb
);
585 static void smtcfb_setmode(struct smtcfb_info
*sfb
)
587 switch (sfb
->fb
.var
.bits_per_pixel
) {
589 sfb
->fb
.fix
.visual
= FB_VISUAL_TRUECOLOR
;
590 sfb
->fb
.fix
.line_length
= sfb
->fb
.var
.xres
* 4;
591 sfb
->fb
.var
.red
.length
= 8;
592 sfb
->fb
.var
.green
.length
= 8;
593 sfb
->fb
.var
.blue
.length
= 8;
594 sfb
->fb
.var
.red
.offset
= 16;
595 sfb
->fb
.var
.green
.offset
= 8;
596 sfb
->fb
.var
.blue
.offset
= 0;
599 sfb
->fb
.fix
.visual
= FB_VISUAL_TRUECOLOR
;
600 sfb
->fb
.fix
.line_length
= sfb
->fb
.var
.xres
* 3;
601 sfb
->fb
.var
.red
.length
= 8;
602 sfb
->fb
.var
.green
.length
= 8;
603 sfb
->fb
.var
.blue
.length
= 8;
604 sfb
->fb
.var
.red
.offset
= 16;
605 sfb
->fb
.var
.green
.offset
= 8;
606 sfb
->fb
.var
.blue
.offset
= 0;
609 sfb
->fb
.fix
.visual
= FB_VISUAL_PSEUDOCOLOR
;
610 sfb
->fb
.fix
.line_length
= sfb
->fb
.var
.xres
;
611 sfb
->fb
.var
.red
.length
= 3;
612 sfb
->fb
.var
.green
.length
= 3;
613 sfb
->fb
.var
.blue
.length
= 2;
614 sfb
->fb
.var
.red
.offset
= 5;
615 sfb
->fb
.var
.green
.offset
= 2;
616 sfb
->fb
.var
.blue
.offset
= 0;
620 sfb
->fb
.fix
.visual
= FB_VISUAL_TRUECOLOR
;
621 sfb
->fb
.fix
.line_length
= sfb
->fb
.var
.xres
* 2;
622 sfb
->fb
.var
.red
.length
= 5;
623 sfb
->fb
.var
.green
.length
= 6;
624 sfb
->fb
.var
.blue
.length
= 5;
625 sfb
->fb
.var
.red
.offset
= 11;
626 sfb
->fb
.var
.green
.offset
= 5;
627 sfb
->fb
.var
.blue
.offset
= 0;
631 sfb
->width
= sfb
->fb
.var
.xres
;
632 sfb
->height
= sfb
->fb
.var
.yres
;
634 smtc_set_timing(sfb
);
637 static int smtc_check_var(struct fb_var_screeninfo
*var
, struct fb_info
*info
)
640 if (var
->xres_virtual
< var
->xres
)
641 var
->xres_virtual
= var
->xres
;
643 if (var
->yres_virtual
< var
->yres
)
644 var
->yres_virtual
= var
->yres
;
646 /* set valid default bpp */
647 if ((var
->bits_per_pixel
!= 8) && (var
->bits_per_pixel
!= 16) &&
648 (var
->bits_per_pixel
!= 24) && (var
->bits_per_pixel
!= 32))
649 var
->bits_per_pixel
= 16;
654 static int smtc_set_par(struct fb_info
*info
)
656 smtcfb_setmode(info
->par
);
661 static struct fb_ops smtcfb_ops
= {
662 .owner
= THIS_MODULE
,
663 .fb_check_var
= smtc_check_var
,
664 .fb_set_par
= smtc_set_par
,
665 .fb_setcolreg
= smtc_setcolreg
,
666 .fb_blank
= smtc_blank
,
667 .fb_fillrect
= cfb_fillrect
,
668 .fb_imageblit
= cfb_imageblit
,
669 .fb_copyarea
= cfb_copyarea
,
671 .fb_read
= smtcfb_read
,
672 .fb_write
= smtcfb_write
,
677 * alloc struct smtcfb_info and assign default values
679 static struct smtcfb_info
*smtc_alloc_fb_info(struct pci_dev
*pdev
)
681 struct smtcfb_info
*sfb
;
683 sfb
= kzalloc(sizeof(*sfb
), GFP_KERNEL
);
690 sfb
->fb
.flags
= FBINFO_FLAG_DEFAULT
;
691 sfb
->fb
.fbops
= &smtcfb_ops
;
692 sfb
->fb
.fix
= smtcfb_fix
;
693 sfb
->fb
.var
= smtcfb_var
;
694 sfb
->fb
.pseudo_palette
= sfb
->colreg
;
701 * free struct smtcfb_info
703 static void smtc_free_fb_info(struct smtcfb_info
*sfb
)
709 * Unmap in the memory mapped IO registers
712 static void smtc_unmap_mmio(struct smtcfb_info
*sfb
)
714 if (sfb
&& smtc_regbaseaddress
)
715 smtc_regbaseaddress
= NULL
;
719 * Map in the screen memory
722 static int smtc_map_smem(struct smtcfb_info
*sfb
,
723 struct pci_dev
*pdev
, u_long smem_len
)
725 sfb
->fb
.fix
.smem_start
= pci_resource_start(pdev
, 0);
728 if (sfb
->fb
.var
.bits_per_pixel
== 32)
729 sfb
->fb
.fix
.smem_start
+= 0x800000;
732 sfb
->fb
.fix
.smem_len
= smem_len
;
734 sfb
->fb
.screen_base
= sfb
->lfb
;
736 if (!sfb
->fb
.screen_base
) {
738 "%s: unable to map screen memory\n", sfb
->fb
.fix
.id
);
746 * Unmap in the screen memory
749 static void smtc_unmap_smem(struct smtcfb_info
*sfb
)
751 if (sfb
&& sfb
->fb
.screen_base
) {
752 iounmap(sfb
->fb
.screen_base
);
753 sfb
->fb
.screen_base
= NULL
;
758 * We need to wake up the device and make sure its in linear memory mode.
760 static inline void sm7xx_init_hw(void)
766 static int smtcfb_pci_probe(struct pci_dev
*pdev
,
767 const struct pci_device_id
*ent
)
769 struct smtcfb_info
*sfb
;
770 u_long smem_size
= 0x00800000; /* default 8MB */
772 unsigned long mmio_base
;
774 dev_info(&pdev
->dev
, "Silicon Motion display driver.");
776 err
= pci_enable_device(pdev
); /* enable SMTC chip */
780 sprintf(smtcfb_fix
.id
, "sm%Xfb", ent
->device
);
782 sfb
= smtc_alloc_fb_info(pdev
);
789 sfb
->chip_id
= ent
->device
;
791 pci_set_drvdata(pdev
, sfb
);
795 /* get mode parameter from smtc_scr_info */
796 if (smtc_scr_info
.lfb_width
!= 0) {
797 sfb
->fb
.var
.xres
= smtc_scr_info
.lfb_width
;
798 sfb
->fb
.var
.yres
= smtc_scr_info
.lfb_height
;
799 sfb
->fb
.var
.bits_per_pixel
= smtc_scr_info
.lfb_depth
;
801 /* default resolution 1024x600 16bit mode */
802 sfb
->fb
.var
.xres
= SCREEN_X_RES
;
803 sfb
->fb
.var
.yres
= SCREEN_Y_RES
;
804 sfb
->fb
.var
.bits_per_pixel
= SCREEN_BPP
;
808 if (sfb
->fb
.var
.bits_per_pixel
== 24)
809 sfb
->fb
.var
.bits_per_pixel
= (smtc_scr_info
.lfb_depth
= 32);
811 /* Map address and memory detection */
812 mmio_base
= pci_resource_start(pdev
, 0);
813 pci_read_config_byte(pdev
, PCI_REVISION_ID
, &sfb
->chip_rev_id
);
815 switch (sfb
->chip_id
) {
818 sfb
->fb
.fix
.mmio_start
= mmio_base
+ 0x00400000;
819 sfb
->fb
.fix
.mmio_len
= 0x00400000;
820 smem_size
= SM712_VIDEOMEMORYSIZE
;
822 sfb
->lfb
= ioremap(mmio_base
, 0x00c00000);
824 sfb
->lfb
= ioremap(mmio_base
, 0x00800000);
826 sfb
->mmio
= (smtc_regbaseaddress
=
827 sfb
->lfb
+ 0x00700000);
828 sfb
->dp_regs
= sfb
->lfb
+ 0x00408000;
829 sfb
->vp_regs
= sfb
->lfb
+ 0x0040c000;
831 if (sfb
->fb
.var
.bits_per_pixel
== 32) {
832 sfb
->lfb
+= 0x800000;
833 dev_info(&pdev
->dev
, "sfb->lfb=%p", sfb
->lfb
);
836 if (!smtc_regbaseaddress
) {
838 "%s: unable to map memory mapped IO!",
844 /* set MCLK = 14.31818 * (0x16 / 0x2) */
845 smtc_seqw(0x6a, 0x16);
846 smtc_seqw(0x6b, 0x02);
847 smtc_seqw(0x62, 0x3e);
848 /* enable PCI burst */
849 smtc_seqw(0x17, 0x20);
850 /* enable word swap */
852 if (sfb
->fb
.var
.bits_per_pixel
== 32)
853 smtc_seqw(0x17, 0x30);
857 sfb
->fb
.fix
.mmio_start
= mmio_base
;
858 sfb
->fb
.fix
.mmio_len
= 0x00200000;
859 smem_size
= SM722_VIDEOMEMORYSIZE
;
860 sfb
->dp_regs
= ioremap(mmio_base
, 0x00a00000);
861 sfb
->lfb
= sfb
->dp_regs
+ 0x00200000;
862 sfb
->mmio
= (smtc_regbaseaddress
=
863 sfb
->dp_regs
+ 0x000c0000);
864 sfb
->vp_regs
= sfb
->dp_regs
+ 0x800;
866 smtc_seqw(0x62, 0xff);
867 smtc_seqw(0x6a, 0x0d);
868 smtc_seqw(0x6b, 0x02);
872 "No valid Silicon Motion display chip was detected!");
877 /* can support 32 bpp */
878 if (15 == sfb
->fb
.var
.bits_per_pixel
)
879 sfb
->fb
.var
.bits_per_pixel
= 16;
881 sfb
->fb
.var
.xres_virtual
= sfb
->fb
.var
.xres
;
882 sfb
->fb
.var
.yres_virtual
= sfb
->fb
.var
.yres
;
883 err
= smtc_map_smem(sfb
, pdev
, smem_size
);
889 err
= register_framebuffer(&sfb
->fb
);
894 "Silicon Motion SM%X Rev%X primary display mode %dx%d-%d Init Complete.",
895 sfb
->chip_id
, sfb
->chip_rev_id
, sfb
->fb
.var
.xres
,
896 sfb
->fb
.var
.yres
, sfb
->fb
.var
.bits_per_pixel
);
901 dev_err(&pdev
->dev
, "Silicon Motion, Inc. primary display init fail.");
903 smtc_unmap_smem(sfb
);
904 smtc_unmap_mmio(sfb
);
906 smtc_free_fb_info(sfb
);
909 pci_disable_device(pdev
);
917 * 0x720 (Lynx3DM, Lynx3DM+)
919 static const struct pci_device_id smtcfb_pci_table
[] = {
920 { PCI_DEVICE(0x126f, 0x710), },
921 { PCI_DEVICE(0x126f, 0x712), },
922 { PCI_DEVICE(0x126f, 0x720), },
926 static void smtcfb_pci_remove(struct pci_dev
*pdev
)
928 struct smtcfb_info
*sfb
;
930 sfb
= pci_get_drvdata(pdev
);
931 smtc_unmap_smem(sfb
);
932 smtc_unmap_mmio(sfb
);
933 unregister_framebuffer(&sfb
->fb
);
934 smtc_free_fb_info(sfb
);
938 static int smtcfb_pci_suspend(struct device
*device
)
940 struct pci_dev
*pdev
= to_pci_dev(device
);
941 struct smtcfb_info
*sfb
;
943 sfb
= pci_get_drvdata(pdev
);
945 /* set the hw in sleep mode use external clock and self memory refresh
946 * so that we can turn off internal PLLs later on
948 smtc_seqw(0x20, (smtc_seqr(0x20) | 0xc0));
949 smtc_seqw(0x69, (smtc_seqr(0x69) & 0xf7));
952 fb_set_suspend(&sfb
->fb
, 1);
955 /* additionally turn off all function blocks including internal PLLs */
956 smtc_seqw(0x21, 0xff);
961 static int smtcfb_pci_resume(struct device
*device
)
963 struct pci_dev
*pdev
= to_pci_dev(device
);
964 struct smtcfb_info
*sfb
;
966 sfb
= pci_get_drvdata(pdev
);
968 /* reinit hardware */
970 switch (sfb
->chip_id
) {
973 /* set MCLK = 14.31818 * (0x16 / 0x2) */
974 smtc_seqw(0x6a, 0x16);
975 smtc_seqw(0x6b, 0x02);
976 smtc_seqw(0x62, 0x3e);
977 /* enable PCI burst */
978 smtc_seqw(0x17, 0x20);
980 if (sfb
->fb
.var
.bits_per_pixel
== 32)
981 smtc_seqw(0x17, 0x30);
985 smtc_seqw(0x62, 0xff);
986 smtc_seqw(0x6a, 0x0d);
987 smtc_seqw(0x6b, 0x02);
991 smtc_seqw(0x34, (smtc_seqr(0x34) | 0xc0));
992 smtc_seqw(0x33, ((smtc_seqr(0x33) | 0x08) & 0xfb));
997 fb_set_suspend(&sfb
->fb
, 0);
1003 static SIMPLE_DEV_PM_OPS(sm7xx_pm_ops
, smtcfb_pci_suspend
, smtcfb_pci_resume
);
1004 #define SM7XX_PM_OPS (&sm7xx_pm_ops)
1006 #else /* !CONFIG_PM */
1008 #define SM7XX_PM_OPS NULL
1010 #endif /* !CONFIG_PM */
1012 static struct pci_driver smtcfb_driver
= {
1014 .id_table
= smtcfb_pci_table
,
1015 .probe
= smtcfb_pci_probe
,
1016 .remove
= smtcfb_pci_remove
,
1017 .driver
.pm
= SM7XX_PM_OPS
,
1020 module_pci_driver(smtcfb_driver
);
1022 MODULE_AUTHOR("Siliconmotion ");
1023 MODULE_DESCRIPTION("Framebuffer driver for SMI Graphic Cards");
1024 MODULE_LICENSE("GPL");