drivers/staging/vt6655/mac.c

   1 /*
   2  * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
   3  * All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License as published by
   7  * the Free Software Foundation; either version 2 of the License, or
   8  * (at your option) any later version.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License along
  16  * with this program; if not, write to the Free Software Foundation, Inc.,
  17  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  *
  20  * File: mac.c
  21  *
  22  * Purpose:  MAC routines
  23  *
  24  * Author: Tevin Chen
  25  *
  26  * Date: May 21, 1996
  27  *
  28  * Functions:
  29  *      MACbIsRegBitsOn - Test if All test Bits On
  30  *      MACbIsRegBitsOff - Test if All test Bits Off
  31  *      MACbIsIntDisable - Test if MAC interrupt disable
  32  *      MACvSetShortRetryLimit - Set 802.11 Short Retry limit
  33  *      MACvSetLongRetryLimit - Set 802.11 Long Retry limit
  34  *      MACvSetLoopbackMode - Set MAC Loopback Mode
  35  *      MACvSaveContext - Save Context of MAC Registers
  36  *      MACvRestoreContext - Restore Context of MAC Registers
  37  *      MACbSoftwareReset - Software Reset MAC
  38  *      MACbSafeRxOff - Turn Off MAC Rx
  39  *      MACbSafeTxOff - Turn Off MAC Tx
  40  *      MACbSafeStop - Stop MAC function
  41  *      MACbShutdown - Shut down MAC
  42  *      MACvInitialize - Initialize MAC
  43  *      MACvSetCurrRxDescAddr - Set Rx Descriptors Address
  44  *      MACvSetCurrTx0DescAddr - Set Tx0 Descriptors Address
  45  *      MACvSetCurrTx1DescAddr - Set Tx1 Descriptors Address
  46  *      MACvTimer0MicroSDelay - Micro Second Delay Loop by MAC
  47  *
  48  * Revision History:
  49  *      08-22-2003 Kyle Hsu     :  Porting MAC functions from sim53
  50  *      09-03-2003 Bryan YC Fan :  Add MACvClearBusSusInd()& MACvEnableBusSusEn()
  51  *      09-18-2003 Jerry Chen   :  Add MACvSetKeyEntry & MACvDisableKeyEntry
  52  *
  53  */
  54
  55 #include "tmacro.h"
  56 #include "mac.h"
  57
  58 /*
  59  * Description:
  60  *      Test if all test bits on
  61  *
  62  * Parameters:
  63  *  In:
  64  *      io_base    - Base Address for MAC
  65  *      byRegOfs    - Offset of MAC Register
  66  *      byTestBits  - Test bits
  67  *  Out:
  68  *      none
  69  *
  70  * Return Value: true if all test bits On; otherwise false
  71  *
  72  */
  73 bool MACbIsRegBitsOn(struct vnt_private *priv, unsigned char byRegOfs,
  74                      unsigned char byTestBits)
  75 {
  76         void __iomem *io_base = priv->PortOffset;
  77
  78         return (ioread8(io_base + byRegOfs) & byTestBits) == byTestBits;
  79 }
  80
  81 /*
  82  * Description:
  83  *      Test if all test bits off
  84  *
  85  * Parameters:
  86  *  In:
  87  *      io_base    - Base Address for MAC
  88  *      byRegOfs    - Offset of MAC Register
  89  *      byTestBits  - Test bits
  90  *  Out:
  91  *      none
  92  *
  93  * Return Value: true if all test bits Off; otherwise false
  94  *
  95  */
  96 bool MACbIsRegBitsOff(struct vnt_private *priv, unsigned char byRegOfs,
  97                       unsigned char byTestBits)
  98 {
  99         void __iomem *io_base = priv->PortOffset;
 100
 101         return !(ioread8(io_base + byRegOfs) & byTestBits);
 102 }
 103
 104 /*
 105  * Description:
 106  *      Test if MAC interrupt disable
 107  *
 108  * Parameters:
 109  *  In:
 110  *      io_base    - Base Address for MAC
 111  *  Out:
 112  *      none
 113  *
 114  * Return Value: true if interrupt is disable; otherwise false
 115  *
 116  */
 117 bool MACbIsIntDisable(struct vnt_private *priv)
 118 {
 119         void __iomem *io_base = priv->PortOffset;
 120
 121         if (ioread32(io_base + MAC_REG_IMR))
 122                 return false;
 123
 124         return true;
 125 }
 126
 127 /*
 128  * Description:
 129  *      Set 802.11 Short Retry Limit
 130  *
 131  * Parameters:
 132  *  In:
 133  *      io_base    - Base Address for MAC
 134  *      byRetryLimit- Retry Limit
 135  *  Out:
 136  *      none
 137  *
 138  * Return Value: none
 139  *
 140  */
 141 void MACvSetShortRetryLimit(struct vnt_private *priv, unsigned char byRetryLimit)
 142 {
 143         void __iomem *io_base = priv->PortOffset;
 144         /* set SRT */
 145         VNSvOutPortB(io_base + MAC_REG_SRT, byRetryLimit);
 146 }
 147
 148
 149 /*
 150  * Description:
 151  *      Set 802.11 Long Retry Limit
 152  *
 153  * Parameters:
 154  *  In:
 155  *      io_base    - Base Address for MAC
 156  *      byRetryLimit- Retry Limit
 157  *  Out:
 158  *      none
 159  *
 160  * Return Value: none
 161  *
 162  */
 163 void MACvSetLongRetryLimit(struct vnt_private *priv, unsigned char byRetryLimit)
 164 {
 165         void __iomem *io_base = priv->PortOffset;
 166         /* set LRT */
 167         VNSvOutPortB(io_base + MAC_REG_LRT, byRetryLimit);
 168 }
 169
 170 /*
 171  * Description:
 172  *      Set MAC Loopback mode
 173  *
 174  * Parameters:
 175  *  In:
 176  *      io_base        - Base Address for MAC
 177  *      byLoopbackMode  - Loopback Mode
 178  *  Out:
 179  *      none
 180  *
 181  * Return Value: none
 182  *
 183  */
 184 void MACvSetLoopbackMode(struct vnt_private *priv, unsigned char byLoopbackMode)
 185 {
 186         void __iomem *io_base = priv->PortOffset;
 187         unsigned char byOrgValue;
 188
 189         byLoopbackMode <<= 6;
 190         /* set TCR */
 191         VNSvInPortB(io_base + MAC_REG_TEST, &byOrgValue);
 192         byOrgValue = byOrgValue & 0x3F;
 193         byOrgValue = byOrgValue | byLoopbackMode;
 194         VNSvOutPortB(io_base + MAC_REG_TEST, byOrgValue);
 195 }
 196
 197 /*
 198  * Description:
 199  *      Save MAC registers to context buffer
 200  *
 201  * Parameters:
 202  *  In:
 203  *      io_base    - Base Address for MAC
 204  *  Out:
 205  *      cxt_buf   - Context buffer
 206  *
 207  * Return Value: none
 208  *
 209  */
 210 void MACvSaveContext(struct vnt_private *priv, unsigned char *cxt_buf)
 211 {
 212         void __iomem *io_base = priv->PortOffset;
 213
 214         /* read page0 register */
 215         memcpy_fromio(cxt_buf, io_base, MAC_MAX_CONTEXT_SIZE_PAGE0);
 216
 217         MACvSelectPage1(io_base);
 218
 219         /* read page1 register */
 220         memcpy_fromio(cxt_buf + MAC_MAX_CONTEXT_SIZE_PAGE0, io_base,
 221                       MAC_MAX_CONTEXT_SIZE_PAGE1);
 222
 223         MACvSelectPage0(io_base);
 224 }
 225
 226 /*
 227  * Description:
 228  *      Restore MAC registers from context buffer
 229  *
 230  * Parameters:
 231  *  In:
 232  *      io_base    - Base Address for MAC
 233  *      cxt_buf   - Context buffer
 234  *  Out:
 235  *      none
 236  *
 237  * Return Value: none
 238  *
 239  */
 240 void MACvRestoreContext(struct vnt_private *priv, unsigned char *cxt_buf)
 241 {
 242         void __iomem *io_base = priv->PortOffset;
 243
 244         MACvSelectPage1(io_base);
 245         /* restore page1 */
 246         memcpy_toio(io_base, cxt_buf + MAC_MAX_CONTEXT_SIZE_PAGE0,
 247                     MAC_MAX_CONTEXT_SIZE_PAGE1);
 248
 249         MACvSelectPage0(io_base);
 250
 251         /* restore RCR,TCR,IMR... */
 252         memcpy_toio(io_base + MAC_REG_RCR, cxt_buf + MAC_REG_RCR,
 253                     MAC_REG_ISR - MAC_REG_RCR);
 254
 255         /* restore MAC Config. */
 256         memcpy_toio(io_base + MAC_REG_LRT, cxt_buf + MAC_REG_LRT,
 257                     MAC_REG_PAGE1SEL - MAC_REG_LRT);
 258
 259         VNSvOutPortB(io_base + MAC_REG_CFG, *(cxt_buf + MAC_REG_CFG));
 260
 261         /* restore PS Config. */
 262         memcpy_toio(io_base + MAC_REG_PSCFG, cxt_buf + MAC_REG_PSCFG,
 263                     MAC_REG_BBREGCTL - MAC_REG_PSCFG);
 264
 265         /* restore CURR_RX_DESC_ADDR, CURR_TX_DESC_ADDR */
 266         iowrite32(*(u32 *)(cxt_buf + MAC_REG_TXDMAPTR0),
 267                   io_base + MAC_REG_TXDMAPTR0);
 268         iowrite32(*(u32 *)(cxt_buf + MAC_REG_AC0DMAPTR),
 269                   io_base + MAC_REG_AC0DMAPTR);
 270         iowrite32(*(u32 *)(cxt_buf + MAC_REG_BCNDMAPTR),
 271                   io_base + MAC_REG_BCNDMAPTR);
 272         iowrite32(*(u32 *)(cxt_buf + MAC_REG_RXDMAPTR0),
 273                   io_base + MAC_REG_RXDMAPTR0);
 274         iowrite32(*(u32 *)(cxt_buf + MAC_REG_RXDMAPTR1),
 275                   io_base + MAC_REG_RXDMAPTR1);
 276 }
 277
 278 /*
 279  * Description:
 280  *      Software Reset MAC
 281  *
 282  * Parameters:
 283  *  In:
 284  *      io_base    - Base Address for MAC
 285  *  Out:
 286  *      none
 287  *
 288  * Return Value: true if Reset Success; otherwise false
 289  *
 290  */
 291 bool MACbSoftwareReset(struct vnt_private *priv)
 292 {
 293         void __iomem *io_base = priv->PortOffset;
 294         unsigned short ww;
 295
 296         /* turn on HOSTCR_SOFTRST, just write 0x01 to reset */
 297         VNSvOutPortB(io_base + MAC_REG_HOSTCR, 0x01);
 298
 299         for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
 300                 if (!(ioread8(io_base + MAC_REG_HOSTCR) & HOSTCR_SOFTRST))
 301                         break;
 302         }
 303         if (ww == W_MAX_TIMEOUT)
 304                 return false;
 305         return true;
 306 }
 307
 308 /*
 309  * Description:
 310  *      save some important register's value, then do reset, then restore register's value
 311  *
 312  * Parameters:
 313  *  In:
 314  *      io_base    - Base Address for MAC
 315  *  Out:
 316  *      none
 317  *
 318  * Return Value: true if success; otherwise false
 319  *
 320  */
 321 bool MACbSafeSoftwareReset(struct vnt_private *priv)
 322 {
 323         unsigned char abyTmpRegData[MAC_MAX_CONTEXT_SIZE_PAGE0+MAC_MAX_CONTEXT_SIZE_PAGE1];
 324         bool bRetVal;
 325
 326         /* PATCH....
 327          * save some important register's value, then do
 328          * reset, then restore register's value
 329          */
 330         /* save MAC context */
 331         MACvSaveContext(priv, abyTmpRegData);
 332         /* do reset */
 333         bRetVal = MACbSoftwareReset(priv);
 334         /* restore MAC context, except CR0 */
 335         MACvRestoreContext(priv, abyTmpRegData);
 336
 337         return bRetVal;
 338 }
 339
 340 /*
 341  * Description:
 342  *      Turn Off MAC Rx
 343  *
 344  * Parameters:
 345  *  In:
 346  *      io_base    - Base Address for MAC
 347  *  Out:
 348  *      none
 349  *
 350  * Return Value: true if success; otherwise false
 351  *
 352  */
 353 bool MACbSafeRxOff(struct vnt_private *priv)
 354 {
 355         void __iomem *io_base = priv->PortOffset;
 356         unsigned short ww;
 357
 358         /* turn off wow temp for turn off Rx safely */
 359
 360         /* Clear RX DMA0,1 */
 361         iowrite32(DMACTL_CLRRUN, io_base + MAC_REG_RXDMACTL0);
 362         iowrite32(DMACTL_CLRRUN, io_base + MAC_REG_RXDMACTL1);
 363         for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
 364                 if (!(ioread32(io_base + MAC_REG_RXDMACTL0) & DMACTL_RUN))
 365                         break;
 366         }
 367         if (ww == W_MAX_TIMEOUT) {
 368                 pr_debug(" DBG_PORT80(0x10)\n");
 369                 return false;
 370         }
 371         for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
 372                 if (!(ioread32(io_base + MAC_REG_RXDMACTL1) & DMACTL_RUN))
 373                         break;
 374         }
 375         if (ww == W_MAX_TIMEOUT) {
 376                 pr_debug(" DBG_PORT80(0x11)\n");
 377                 return false;
 378         }
 379
 380         /* try to safe shutdown RX */
 381         MACvRegBitsOff(io_base, MAC_REG_HOSTCR, HOSTCR_RXON);
 382         /* W_MAX_TIMEOUT is the timeout period */
 383         for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
 384                 if (!(ioread8(io_base + MAC_REG_HOSTCR) & HOSTCR_RXONST))
 385                         break;
 386         }
 387         if (ww == W_MAX_TIMEOUT) {
 388                 pr_debug(" DBG_PORT80(0x12)\n");
 389                 return false;
 390         }
 391         return true;
 392 }
 393
 394 /*
 395  * Description:
 396  *      Turn Off MAC Tx
 397  *
 398  * Parameters:
 399  *  In:
 400  *      io_base    - Base Address for MAC
 401  *  Out:
 402  *      none
 403  *
 404  * Return Value: true if success; otherwise false
 405  *
 406  */
 407 bool MACbSafeTxOff(struct vnt_private *priv)
 408 {
 409         void __iomem *io_base = priv->PortOffset;
 410         unsigned short ww;
 411
 412         /* Clear TX DMA */
 413         /* Tx0 */
 414         iowrite32(DMACTL_CLRRUN, io_base + MAC_REG_TXDMACTL0);
 415         /* AC0 */
 416         iowrite32(DMACTL_CLRRUN, io_base + MAC_REG_AC0DMACTL);
 417
 418         for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
 419                 if (!(ioread32(io_base + MAC_REG_TXDMACTL0) & DMACTL_RUN))
 420                         break;
 421         }
 422         if (ww == W_MAX_TIMEOUT) {
 423                 pr_debug(" DBG_PORT80(0x20)\n");
 424                 return false;
 425         }
 426         for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
 427                 if (!(ioread32(io_base + MAC_REG_AC0DMACTL) & DMACTL_RUN))
 428                         break;
 429         }
 430         if (ww == W_MAX_TIMEOUT) {
 431                 pr_debug(" DBG_PORT80(0x21)\n");
 432                 return false;
 433         }
 434
 435         /* try to safe shutdown TX */
 436         MACvRegBitsOff(io_base, MAC_REG_HOSTCR, HOSTCR_TXON);
 437
 438         /* W_MAX_TIMEOUT is the timeout period */
 439         for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
 440                 if (!(ioread8(io_base + MAC_REG_HOSTCR) & HOSTCR_TXONST))
 441                         break;
 442         }
 443         if (ww == W_MAX_TIMEOUT) {
 444                 pr_debug(" DBG_PORT80(0x24)\n");
 445                 return false;
 446         }
 447         return true;
 448 }
 449
 450 /*
 451  * Description:
 452  *      Stop MAC function
 453  *
 454  * Parameters:
 455  *  In:
 456  *      io_base    - Base Address for MAC
 457  *  Out:
 458  *      none
 459  *
 460  * Return Value: true if success; otherwise false
 461  *
 462  */
 463 bool MACbSafeStop(struct vnt_private *priv)
 464 {
 465         void __iomem *io_base = priv->PortOffset;
 466
 467         MACvRegBitsOff(io_base, MAC_REG_TCR, TCR_AUTOBCNTX);
 468
 469         if (!MACbSafeRxOff(priv)) {
 470                 pr_debug(" MACbSafeRxOff == false)\n");
 471                 MACbSafeSoftwareReset(priv);
 472                 return false;
 473         }
 474         if (!MACbSafeTxOff(priv)) {
 475                 pr_debug(" MACbSafeTxOff == false)\n");
 476                 MACbSafeSoftwareReset(priv);
 477                 return false;
 478         }
 479
 480         MACvRegBitsOff(io_base, MAC_REG_HOSTCR, HOSTCR_MACEN);
 481
 482         return true;
 483 }
 484
 485 /*
 486  * Description:
 487  *      Shut Down MAC
 488  *
 489  * Parameters:
 490  *  In:
 491  *      io_base    - Base Address for MAC
 492  *  Out:
 493  *      none
 494  *
 495  * Return Value: true if success; otherwise false
 496  *
 497  */
 498 bool MACbShutdown(struct vnt_private *priv)
 499 {
 500         void __iomem *io_base = priv->PortOffset;
 501         /* disable MAC IMR */
 502         MACvIntDisable(io_base);
 503         MACvSetLoopbackMode(priv, MAC_LB_INTERNAL);
 504         /* stop the adapter */
 505         if (!MACbSafeStop(priv)) {
 506                 MACvSetLoopbackMode(priv, MAC_LB_NONE);
 507                 return false;
 508         }
 509         MACvSetLoopbackMode(priv, MAC_LB_NONE);
 510         return true;
 511 }
 512
 513 /*
 514  * Description:
 515  *      Initialize MAC
 516  *
 517  * Parameters:
 518  *  In:
 519  *      io_base    - Base Address for MAC
 520  *  Out:
 521  *      none
 522  *
 523  * Return Value: none
 524  *
 525  */
 526 void MACvInitialize(struct vnt_private *priv)
 527 {
 528         void __iomem *io_base = priv->PortOffset;
 529         /* clear sticky bits */
 530         MACvClearStckDS(io_base);
 531         /* disable force PME-enable */
 532         VNSvOutPortB(io_base + MAC_REG_PMC1, PME_OVR);
 533         /* only 3253 A */
 534
 535         /* do reset */
 536         MACbSoftwareReset(priv);
 537
 538         /* reset TSF counter */
 539         VNSvOutPortB(io_base + MAC_REG_TFTCTL, TFTCTL_TSFCNTRST);
 540         /* enable TSF counter */
 541         VNSvOutPortB(io_base + MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
 542 }
 543
 544 /*
 545  * Description:
 546  *      Set the chip with current rx descriptor address
 547  *
 548  * Parameters:
 549  *  In:
 550  *      io_base        - Base Address for MAC
 551  *      dwCurrDescAddr  - Descriptor Address
 552  *  Out:
 553  *      none
 554  *
 555  * Return Value: none
 556  *
 557  */
 558 void MACvSetCurrRx0DescAddr(struct vnt_private *priv, u32 dwCurrDescAddr)
 559 {
 560         void __iomem *io_base = priv->PortOffset;
 561         unsigned short ww;
 562         unsigned char byOrgDMACtl;
 563
 564         VNSvInPortB(io_base + MAC_REG_RXDMACTL0, &byOrgDMACtl);
 565         if (byOrgDMACtl & DMACTL_RUN)
 566                 VNSvOutPortB(io_base + MAC_REG_RXDMACTL0+2, DMACTL_RUN);
 567
 568         for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
 569                 if (!(ioread8(io_base + MAC_REG_RXDMACTL0) & DMACTL_RUN))
 570                         break;
 571         }
 572
 573         iowrite32(dwCurrDescAddr, io_base + MAC_REG_RXDMAPTR0);
 574         if (byOrgDMACtl & DMACTL_RUN)
 575                 VNSvOutPortB(io_base + MAC_REG_RXDMACTL0, DMACTL_RUN);
 576 }
 577
 578 /*
 579  * Description:
 580  *      Set the chip with current rx descriptor address
 581  *
 582  * Parameters:
 583  *  In:
 584  *      io_base        - Base Address for MAC
 585  *      dwCurrDescAddr  - Descriptor Address
 586  *  Out:
 587  *      none
 588  *
 589  * Return Value: none
 590  *
 591  */
 592 void MACvSetCurrRx1DescAddr(struct vnt_private *priv, u32 dwCurrDescAddr)
 593 {
 594         void __iomem *io_base = priv->PortOffset;
 595         unsigned short ww;
 596         unsigned char byOrgDMACtl;
 597
 598         VNSvInPortB(io_base + MAC_REG_RXDMACTL1, &byOrgDMACtl);
 599         if (byOrgDMACtl & DMACTL_RUN)
 600                 VNSvOutPortB(io_base + MAC_REG_RXDMACTL1+2, DMACTL_RUN);
 601
 602         for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
 603                 if (!(ioread8(io_base + MAC_REG_RXDMACTL1) & DMACTL_RUN))
 604                         break;
 605         }
 606
 607         iowrite32(dwCurrDescAddr, io_base + MAC_REG_RXDMAPTR1);
 608         if (byOrgDMACtl & DMACTL_RUN)
 609                 VNSvOutPortB(io_base + MAC_REG_RXDMACTL1, DMACTL_RUN);
 610
 611 }
 612
 613 /*
 614  * Description:
 615  *      Set the chip with current tx0 descriptor address
 616  *
 617  * Parameters:
 618  *  In:
 619  *      io_base        - Base Address for MAC
 620  *      dwCurrDescAddr  - Descriptor Address
 621  *  Out:
 622  *      none
 623  *
 624  * Return Value: none
 625  *
 626  */
 627 void MACvSetCurrTx0DescAddrEx(struct vnt_private *priv,
 628                               u32 dwCurrDescAddr)
 629 {
 630         void __iomem *io_base = priv->PortOffset;
 631         unsigned short ww;
 632         unsigned char byOrgDMACtl;
 633
 634         VNSvInPortB(io_base + MAC_REG_TXDMACTL0, &byOrgDMACtl);
 635         if (byOrgDMACtl & DMACTL_RUN)
 636                 VNSvOutPortB(io_base + MAC_REG_TXDMACTL0+2, DMACTL_RUN);
 637
 638         for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
 639                 if (!(ioread8(io_base + MAC_REG_TXDMACTL0) & DMACTL_RUN))
 640                         break;
 641         }
 642
 643         iowrite32(dwCurrDescAddr, io_base + MAC_REG_TXDMAPTR0);
 644         if (byOrgDMACtl & DMACTL_RUN)
 645                 VNSvOutPortB(io_base + MAC_REG_TXDMACTL0, DMACTL_RUN);
 646 }
 647
 648 /*
 649  * Description:
 650  *      Set the chip with current AC0 descriptor address
 651  *
 652  * Parameters:
 653  *  In:
 654  *      io_base        - Base Address for MAC
 655  *      dwCurrDescAddr  - Descriptor Address
 656  *  Out:
 657  *      none
 658  *
 659  * Return Value: none
 660  *
 661  */
 662 /* TxDMA1 = AC0DMA */
 663 void MACvSetCurrAC0DescAddrEx(struct vnt_private *priv,
 664                               u32 dwCurrDescAddr)
 665 {
 666         void __iomem *io_base = priv->PortOffset;
 667         unsigned short ww;
 668         unsigned char byOrgDMACtl;
 669
 670         VNSvInPortB(io_base + MAC_REG_AC0DMACTL, &byOrgDMACtl);
 671         if (byOrgDMACtl & DMACTL_RUN)
 672                 VNSvOutPortB(io_base + MAC_REG_AC0DMACTL+2, DMACTL_RUN);
 673
 674         for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
 675                 if (!(ioread8(io_base + MAC_REG_AC0DMACTL) & DMACTL_RUN))
 676                         break;
 677         }
 678         if (ww == W_MAX_TIMEOUT)
 679                 pr_debug(" DBG_PORT80(0x26)\n");
 680         iowrite32(dwCurrDescAddr, io_base + MAC_REG_AC0DMAPTR);
 681         if (byOrgDMACtl & DMACTL_RUN)
 682                 VNSvOutPortB(io_base + MAC_REG_AC0DMACTL, DMACTL_RUN);
 683 }
 684
 685 void MACvSetCurrTXDescAddr(int iTxType, struct vnt_private *priv,
 686                            u32 dwCurrDescAddr)
 687 {
 688         if (iTxType == TYPE_AC0DMA)
 689                 MACvSetCurrAC0DescAddrEx(priv, dwCurrDescAddr);
 690         else if (iTxType == TYPE_TXDMA0)
 691                 MACvSetCurrTx0DescAddrEx(priv, dwCurrDescAddr);
 692 }
 693
 694 /*
 695  * Description:
 696  *      Micro Second Delay via MAC
 697  *
 698  * Parameters:
 699  *  In:
 700  *      io_base    - Base Address for MAC
 701  *      uDelay      - Delay time (timer resolution is 4 us)
 702  *  Out:
 703  *      none
 704  *
 705  * Return Value: none
 706  *
 707  */
 708 void MACvTimer0MicroSDelay(struct vnt_private *priv, unsigned int uDelay)
 709 {
 710         void __iomem *io_base = priv->PortOffset;
 711         unsigned char byValue;
 712         unsigned int uu, ii;
 713
 714         VNSvOutPortB(io_base + MAC_REG_TMCTL0, 0);
 715         iowrite32(uDelay, io_base + MAC_REG_TMDATA0);
 716         VNSvOutPortB(io_base + MAC_REG_TMCTL0, (TMCTL_TMD | TMCTL_TE));
 717         for (ii = 0; ii < 66; ii++) {  /* assume max PCI clock is 66Mhz */
 718                 for (uu = 0; uu < uDelay; uu++) {
 719                         VNSvInPortB(io_base + MAC_REG_TMCTL0, &byValue);
 720                         if ((byValue == 0) ||
 721                             (byValue & TMCTL_TSUSP)) {
 722                                 VNSvOutPortB(io_base + MAC_REG_TMCTL0, 0);
 723                                 return;
 724                         }
 725                 }
 726         }
 727         VNSvOutPortB(io_base + MAC_REG_TMCTL0, 0);
 728 }
 729
 730 /*
 731  * Description:
 732  *      Micro Second One shot timer via MAC
 733  *
 734  * Parameters:
 735  *  In:
 736  *      io_base    - Base Address for MAC
 737  *      uDelay      - Delay time
 738  *  Out:
 739  *      none
 740  *
 741  * Return Value: none
 742  *
 743  */
 744 void MACvOneShotTimer1MicroSec(struct vnt_private *priv, unsigned int uDelayTime)
 745 {
 746         void __iomem *io_base = priv->PortOffset;
 747
 748         VNSvOutPortB(io_base + MAC_REG_TMCTL1, 0);
 749         iowrite32(uDelayTime, io_base + MAC_REG_TMDATA1);
 750         VNSvOutPortB(io_base + MAC_REG_TMCTL1, (TMCTL_TMD | TMCTL_TE));
 751 }
 752
 753 void MACvSetMISCFifo(struct vnt_private *priv, unsigned short wOffset,
 754                      u32 dwData)
 755 {
 756         void __iomem *io_base = priv->PortOffset;
 757
 758         if (wOffset > 273)
 759                 return;
 760         iowrite16(wOffset, io_base + MAC_REG_MISCFFNDEX);
 761         iowrite32(dwData, io_base + MAC_REG_MISCFFDATA);
 762         iowrite16(MISCFFCTL_WRITE, io_base + MAC_REG_MISCFFCTL);
 763 }
 764
 765 bool MACbPSWakeup(struct vnt_private *priv)
 766 {
 767         void __iomem *io_base = priv->PortOffset;
 768         unsigned char byOrgValue;
 769         unsigned int ww;
 770         /* Read PSCTL */
 771         if (MACbIsRegBitsOff(priv, MAC_REG_PSCTL, PSCTL_PS))
 772                 return true;
 773
 774         /* Disable PS */
 775         MACvRegBitsOff(io_base, MAC_REG_PSCTL, PSCTL_PSEN);
 776
 777         /* Check if SyncFlushOK */
 778         for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
 779                 VNSvInPortB(io_base + MAC_REG_PSCTL, &byOrgValue);
 780                 if (byOrgValue & PSCTL_WAKEDONE)
 781                         break;
 782         }
 783         if (ww == W_MAX_TIMEOUT) {
 784                 pr_debug(" DBG_PORT80(0x33)\n");
 785                 return false;
 786         }
 787         return true;
 788 }
 789
 790 /*
 791  * Description:
 792  *      Set the Key by MISCFIFO
 793  *
 794  * Parameters:
 795  *  In:
 796  *      io_base        - Base Address for MAC
 797  *
 798  *  Out:
 799  *      none
 800  *
 801  * Return Value: none
 802  *
 803  */
 804
 805 void MACvSetKeyEntry(struct vnt_private *priv, unsigned short wKeyCtl,
 806                      unsigned int uEntryIdx, unsigned int uKeyIdx,
 807                      unsigned char *pbyAddr, u32 *pdwKey,
 808                      unsigned char byLocalID)
 809 {
 810         void __iomem *io_base = priv->PortOffset;
 811         unsigned short wOffset;
 812         u32 dwData;
 813         int     ii;
 814
 815         if (byLocalID <= 1)
 816                 return;
 817
 818         pr_debug("MACvSetKeyEntry\n");
 819         wOffset = MISCFIFO_KEYETRY0;
 820         wOffset += (uEntryIdx * MISCFIFO_KEYENTRYSIZE);
 821
 822         dwData = 0;
 823         dwData |= wKeyCtl;
 824         dwData <<= 16;
 825         dwData |= MAKEWORD(*(pbyAddr+4), *(pbyAddr+5));
 826         pr_debug("1. wOffset: %d, Data: %X, KeyCtl:%X\n",
 827                  wOffset, dwData, wKeyCtl);
 828
 829         iowrite16(wOffset, io_base + MAC_REG_MISCFFNDEX);
 830         iowrite32(dwData, io_base + MAC_REG_MISCFFDATA);
 831         iowrite16(MISCFFCTL_WRITE, io_base + MAC_REG_MISCFFCTL);
 832         wOffset++;
 833
 834         dwData = 0;
 835         dwData |= *(pbyAddr+3);
 836         dwData <<= 8;
 837         dwData |= *(pbyAddr+2);
 838         dwData <<= 8;
 839         dwData |= *(pbyAddr+1);
 840         dwData <<= 8;
 841         dwData |= *(pbyAddr+0);
 842         pr_debug("2. wOffset: %d, Data: %X\n", wOffset, dwData);
 843
 844         iowrite16(wOffset, io_base + MAC_REG_MISCFFNDEX);
 845         iowrite32(dwData, io_base + MAC_REG_MISCFFDATA);
 846         iowrite16(MISCFFCTL_WRITE, io_base + MAC_REG_MISCFFCTL);
 847         wOffset++;
 848
 849         wOffset += (uKeyIdx * 4);
 850         for (ii = 0; ii < 4; ii++) {
 851                 /* always push 128 bits */
 852                 pr_debug("3.(%d) wOffset: %d, Data: %X\n",
 853                          ii, wOffset+ii, *pdwKey);
 854                 iowrite16(wOffset + ii, io_base + MAC_REG_MISCFFNDEX);
 855                 iowrite32(*pdwKey++, io_base + MAC_REG_MISCFFDATA);
 856                 iowrite16(MISCFFCTL_WRITE, io_base + MAC_REG_MISCFFCTL);
 857         }
 858 }
 859
 860 /*
 861  * Description:
 862  *      Disable the Key Entry by MISCFIFO
 863  *
 864  * Parameters:
 865  *  In:
 866  *      io_base        - Base Address for MAC
 867  *
 868  *  Out:
 869  *      none
 870  *
 871  * Return Value: none
 872  *
 873  */
 874 void MACvDisableKeyEntry(struct vnt_private *priv, unsigned int uEntryIdx)
 875 {
 876         void __iomem *io_base = priv->PortOffset;
 877         unsigned short wOffset;
 878
 879         wOffset = MISCFIFO_KEYETRY0;
 880         wOffset += (uEntryIdx * MISCFIFO_KEYENTRYSIZE);
 881
 882         iowrite16(wOffset, io_base + MAC_REG_MISCFFNDEX);
 883         iowrite32(0, io_base + MAC_REG_MISCFFDATA);
 884         iowrite16(MISCFFCTL_WRITE, io_base + MAC_REG_MISCFFCTL);
 885 }