2 * exynos_tmu.c - Samsung EXYNOS TMU (Thermal Management Unit)
4 * Copyright (C) 2011 Samsung Electronics
5 * Donggeun Kim <dg77.kim@samsung.com>
6 * Amit Daniel Kachhap <amit.kachhap@linaro.org>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 #include <linux/clk.h>
26 #include <linux/interrupt.h>
27 #include <linux/module.h>
29 #include <linux/of_address.h>
30 #include <linux/of_irq.h>
31 #include <linux/platform_device.h>
33 #include "exynos_thermal_common.h"
34 #include "exynos_tmu.h"
35 #include "exynos_tmu_data.h"
38 * struct exynos_tmu_data : A structure to hold the private data of the TMU
40 * @id: identifier of the one instance of the TMU controller.
41 * @pdata: pointer to the tmu platform/configuration data
42 * @base: base address of the single instance of the TMU controller.
43 * @irq: irq number of the TMU controller.
44 * @soc: id of the SOC type.
45 * @irq_work: pointer to the irq work structure.
46 * @lock: lock to implement synchronization.
47 * @clk: pointer to the clock structure.
48 * @temp_error1: fused value of the first point trim.
49 * @temp_error2: fused value of the second point trim.
50 * @reg_conf: pointer to structure to register with core thermal.
52 struct exynos_tmu_data
{
54 struct exynos_tmu_platform_data
*pdata
;
58 struct work_struct irq_work
;
61 u8 temp_error1
, temp_error2
;
62 struct thermal_sensor_conf
*reg_conf
;
66 * TMU treats temperature as a mapped temperature code.
67 * The temperature is converted differently depending on the calibration type.
69 static int temp_to_code(struct exynos_tmu_data
*data
, u8 temp
)
71 struct exynos_tmu_platform_data
*pdata
= data
->pdata
;
74 if (data
->soc
== SOC_ARCH_EXYNOS4210
)
75 /* temp should range between 25 and 125 */
76 if (temp
< 25 || temp
> 125) {
81 switch (pdata
->cal_type
) {
82 case TYPE_TWO_POINT_TRIMMING
:
83 temp_code
= (temp
- pdata
->first_point_trim
) *
84 (data
->temp_error2
- data
->temp_error1
) /
85 (pdata
->second_point_trim
- pdata
->first_point_trim
) +
88 case TYPE_ONE_POINT_TRIMMING
:
89 temp_code
= temp
+ data
->temp_error1
- pdata
->first_point_trim
;
92 temp_code
= temp
+ pdata
->default_temp_offset
;
100 * Calculate a temperature value from a temperature code.
101 * The unit of the temperature is degree Celsius.
103 static int code_to_temp(struct exynos_tmu_data
*data
, u8 temp_code
)
105 struct exynos_tmu_platform_data
*pdata
= data
->pdata
;
108 if (data
->soc
== SOC_ARCH_EXYNOS4210
)
109 /* temp_code should range between 75 and 175 */
110 if (temp_code
< 75 || temp_code
> 175) {
115 switch (pdata
->cal_type
) {
116 case TYPE_TWO_POINT_TRIMMING
:
117 temp
= (temp_code
- data
->temp_error1
) *
118 (pdata
->second_point_trim
- pdata
->first_point_trim
) /
119 (data
->temp_error2
- data
->temp_error1
) +
120 pdata
->first_point_trim
;
122 case TYPE_ONE_POINT_TRIMMING
:
123 temp
= temp_code
- data
->temp_error1
+ pdata
->first_point_trim
;
126 temp
= temp_code
- pdata
->default_temp_offset
;
133 static int exynos_tmu_initialize(struct platform_device
*pdev
)
135 struct exynos_tmu_data
*data
= platform_get_drvdata(pdev
);
136 struct exynos_tmu_platform_data
*pdata
= data
->pdata
;
137 const struct exynos_tmu_registers
*reg
= pdata
->registers
;
138 unsigned int status
, trim_info
= 0, con
;
139 unsigned int rising_threshold
= 0, falling_threshold
= 0;
140 int ret
= 0, threshold_code
, i
, trigger_levs
= 0;
142 mutex_lock(&data
->lock
);
143 clk_enable(data
->clk
);
145 status
= readb(data
->base
+ reg
->tmu_status
);
151 if (data
->soc
== SOC_ARCH_EXYNOS
)
152 __raw_writel(1, data
->base
+ reg
->triminfo_ctrl
);
154 /* Save trimming info in order to perform calibration */
155 trim_info
= readl(data
->base
+ reg
->triminfo_data
);
156 data
->temp_error1
= trim_info
& EXYNOS_TMU_TEMP_MASK
;
157 data
->temp_error2
= ((trim_info
>> reg
->triminfo_85_shift
) &
158 EXYNOS_TMU_TEMP_MASK
);
160 if ((pdata
->min_efuse_value
> data
->temp_error1
) ||
161 (data
->temp_error1
> pdata
->max_efuse_value
) ||
162 (data
->temp_error2
!= 0))
163 data
->temp_error1
= pdata
->efuse_value
;
165 if (pdata
->max_trigger_level
> MAX_THRESHOLD_LEVS
) {
166 dev_err(&pdev
->dev
, "Invalid max trigger level\n");
170 for (i
= 0; i
< pdata
->max_trigger_level
; i
++) {
171 if (!pdata
->trigger_levels
[i
])
174 if ((pdata
->trigger_type
[i
] == HW_TRIP
) &&
175 (!pdata
->trigger_levels
[pdata
->max_trigger_level
- 1])) {
176 dev_err(&pdev
->dev
, "Invalid hw trigger level\n");
181 /* Count trigger levels except the HW trip*/
182 if (!(pdata
->trigger_type
[i
] == HW_TRIP
))
186 if (data
->soc
== SOC_ARCH_EXYNOS4210
) {
187 /* Write temperature code for threshold */
188 threshold_code
= temp_to_code(data
, pdata
->threshold
);
189 if (threshold_code
< 0) {
190 ret
= threshold_code
;
193 writeb(threshold_code
,
194 data
->base
+ reg
->threshold_temp
);
195 for (i
= 0; i
< trigger_levs
; i
++)
196 writeb(pdata
->trigger_levels
[i
], data
->base
+
197 reg
->threshold_th0
+ i
* sizeof(reg
->threshold_th0
));
199 writel(reg
->inten_rise_mask
, data
->base
+ reg
->tmu_intclear
);
200 } else if (data
->soc
== SOC_ARCH_EXYNOS
) {
201 /* Write temperature code for rising and falling threshold */
203 i
< trigger_levs
&& i
< EXYNOS_MAX_TRIGGER_PER_REG
; i
++) {
204 threshold_code
= temp_to_code(data
,
205 pdata
->trigger_levels
[i
]);
206 if (threshold_code
< 0) {
207 ret
= threshold_code
;
210 rising_threshold
|= threshold_code
<< 8 * i
;
211 if (pdata
->threshold_falling
) {
212 threshold_code
= temp_to_code(data
,
213 pdata
->trigger_levels
[i
] -
214 pdata
->threshold_falling
);
215 if (threshold_code
> 0)
217 threshold_code
<< 8 * i
;
221 writel(rising_threshold
,
222 data
->base
+ reg
->threshold_th0
);
223 writel(falling_threshold
,
224 data
->base
+ reg
->threshold_th1
);
226 writel((reg
->inten_rise_mask
<< reg
->inten_rise_shift
) |
227 (reg
->inten_fall_mask
<< reg
->inten_fall_shift
),
228 data
->base
+ reg
->tmu_intclear
);
230 /* if last threshold limit is also present */
231 i
= pdata
->max_trigger_level
- 1;
232 if (pdata
->trigger_levels
[i
] &&
233 (pdata
->trigger_type
[i
] == HW_TRIP
)) {
234 threshold_code
= temp_to_code(data
,
235 pdata
->trigger_levels
[i
]);
236 if (threshold_code
< 0) {
237 ret
= threshold_code
;
240 rising_threshold
|= threshold_code
<< 8 * i
;
241 writel(rising_threshold
,
242 data
->base
+ reg
->threshold_th0
);
243 con
= readl(data
->base
+ reg
->tmu_ctrl
);
244 con
|= (1 << reg
->therm_trip_en_shift
);
245 writel(con
, data
->base
+ reg
->tmu_ctrl
);
249 clk_disable(data
->clk
);
250 mutex_unlock(&data
->lock
);
255 static void exynos_tmu_control(struct platform_device
*pdev
, bool on
)
257 struct exynos_tmu_data
*data
= platform_get_drvdata(pdev
);
258 struct exynos_tmu_platform_data
*pdata
= data
->pdata
;
259 const struct exynos_tmu_registers
*reg
= pdata
->registers
;
260 unsigned int con
, interrupt_en
;
262 mutex_lock(&data
->lock
);
263 clk_enable(data
->clk
);
265 con
= readl(data
->base
+ reg
->tmu_ctrl
);
267 if (pdata
->reference_voltage
) {
268 con
&= ~(reg
->buf_vref_sel_mask
<< reg
->buf_vref_sel_shift
);
269 con
|= pdata
->reference_voltage
<< reg
->buf_vref_sel_shift
;
273 con
&= ~(reg
->buf_slope_sel_mask
<< reg
->buf_slope_sel_shift
);
274 con
|= (pdata
->gain
<< reg
->buf_slope_sel_shift
);
277 if (pdata
->noise_cancel_mode
) {
278 con
&= ~(reg
->therm_trip_mode_mask
<<
279 reg
->therm_trip_mode_shift
);
280 con
|= (pdata
->noise_cancel_mode
<< reg
->therm_trip_mode_shift
);
284 con
|= (1 << reg
->core_en_shift
);
286 pdata
->trigger_enable
[3] << reg
->inten_rise3_shift
|
287 pdata
->trigger_enable
[2] << reg
->inten_rise2_shift
|
288 pdata
->trigger_enable
[1] << reg
->inten_rise1_shift
|
289 pdata
->trigger_enable
[0] << reg
->inten_rise0_shift
;
290 if (pdata
->threshold_falling
)
292 interrupt_en
<< reg
->inten_fall0_shift
;
294 con
&= ~(1 << reg
->core_en_shift
);
295 interrupt_en
= 0; /* Disable all interrupts */
297 writel(interrupt_en
, data
->base
+ reg
->tmu_inten
);
298 writel(con
, data
->base
+ reg
->tmu_ctrl
);
300 clk_disable(data
->clk
);
301 mutex_unlock(&data
->lock
);
304 static int exynos_tmu_read(struct exynos_tmu_data
*data
)
306 struct exynos_tmu_platform_data
*pdata
= data
->pdata
;
307 const struct exynos_tmu_registers
*reg
= pdata
->registers
;
311 mutex_lock(&data
->lock
);
312 clk_enable(data
->clk
);
314 temp_code
= readb(data
->base
+ reg
->tmu_cur_temp
);
315 temp
= code_to_temp(data
, temp_code
);
317 clk_disable(data
->clk
);
318 mutex_unlock(&data
->lock
);
323 #ifdef CONFIG_THERMAL_EMULATION
324 static int exynos_tmu_set_emulation(void *drv_data
, unsigned long temp
)
326 struct exynos_tmu_data
*data
= drv_data
;
327 struct exynos_tmu_platform_data
*pdata
= data
->pdata
;
328 const struct exynos_tmu_registers
*reg
= pdata
->registers
;
332 if (data
->soc
== SOC_ARCH_EXYNOS4210
)
335 if (temp
&& temp
< MCELSIUS
)
338 mutex_lock(&data
->lock
);
339 clk_enable(data
->clk
);
341 val
= readl(data
->base
+ reg
->emul_con
);
346 val
= (EXYNOS_EMUL_TIME
<< reg
->emul_time_shift
) |
347 (temp_to_code(data
, temp
)
348 << reg
->emul_temp_shift
) | EXYNOS_EMUL_ENABLE
;
350 val
&= ~EXYNOS_EMUL_ENABLE
;
353 writel(val
, data
->base
+ reg
->emul_con
);
355 clk_disable(data
->clk
);
356 mutex_unlock(&data
->lock
);
362 static int exynos_tmu_set_emulation(void *drv_data
, unsigned long temp
)
364 #endif/*CONFIG_THERMAL_EMULATION*/
366 static void exynos_tmu_work(struct work_struct
*work
)
368 struct exynos_tmu_data
*data
= container_of(work
,
369 struct exynos_tmu_data
, irq_work
);
370 struct exynos_tmu_platform_data
*pdata
= data
->pdata
;
371 const struct exynos_tmu_registers
*reg
= pdata
->registers
;
372 unsigned int val_irq
;
374 exynos_report_trigger(data
->reg_conf
);
375 mutex_lock(&data
->lock
);
376 clk_enable(data
->clk
);
378 /* TODO: take action based on particular interrupt */
379 val_irq
= readl(data
->base
+ reg
->tmu_intstat
);
380 /* clear the interrupts */
381 writel(val_irq
, data
->base
+ reg
->tmu_intclear
);
383 clk_disable(data
->clk
);
384 mutex_unlock(&data
->lock
);
386 enable_irq(data
->irq
);
389 static irqreturn_t
exynos_tmu_irq(int irq
, void *id
)
391 struct exynos_tmu_data
*data
= id
;
393 disable_irq_nosync(irq
);
394 schedule_work(&data
->irq_work
);
400 static const struct of_device_id exynos_tmu_match
[] = {
402 .compatible
= "samsung,exynos4210-tmu",
403 .data
= (void *)EXYNOS4210_TMU_DRV_DATA
,
406 .compatible
= "samsung,exynos4412-tmu",
407 .data
= (void *)EXYNOS5250_TMU_DRV_DATA
,
410 .compatible
= "samsung,exynos5250-tmu",
411 .data
= (void *)EXYNOS5250_TMU_DRV_DATA
,
415 MODULE_DEVICE_TABLE(of
, exynos_tmu_match
);
418 static inline struct exynos_tmu_platform_data
*exynos_get_driver_data(
419 struct platform_device
*pdev
, int id
)
422 struct exynos_tmu_init_data
*data_table
;
423 struct exynos_tmu_platform_data
*tmu_data
;
424 if (pdev
->dev
.of_node
) {
425 const struct of_device_id
*match
;
426 match
= of_match_node(exynos_tmu_match
, pdev
->dev
.of_node
);
429 data_table
= (struct exynos_tmu_init_data
*) match
->data
;
430 if (!data_table
|| id
>= data_table
->tmu_count
)
432 tmu_data
= data_table
->tmu_data
;
433 return (struct exynos_tmu_platform_data
*) (tmu_data
+ id
);
439 static int exynos_map_dt_data(struct platform_device
*pdev
)
441 struct exynos_tmu_data
*data
= platform_get_drvdata(pdev
);
442 struct exynos_tmu_platform_data
*pdata
;
448 data
->id
= of_alias_get_id(pdev
->dev
.of_node
, "tmuctrl");
452 data
->irq
= irq_of_parse_and_map(pdev
->dev
.of_node
, 0);
453 if (data
->irq
<= 0) {
454 dev_err(&pdev
->dev
, "failed to get IRQ\n");
458 if (of_address_to_resource(pdev
->dev
.of_node
, 0, &res
)) {
459 dev_err(&pdev
->dev
, "failed to get Resource 0\n");
463 data
->base
= devm_ioremap(&pdev
->dev
, res
.start
, resource_size(&res
));
465 dev_err(&pdev
->dev
, "Failed to ioremap memory\n");
466 return -EADDRNOTAVAIL
;
469 pdata
= exynos_get_driver_data(pdev
, data
->id
);
471 dev_err(&pdev
->dev
, "No platform init data supplied.\n");
479 static int exynos_tmu_probe(struct platform_device
*pdev
)
481 struct exynos_tmu_data
*data
;
482 struct exynos_tmu_platform_data
*pdata
;
483 struct thermal_sensor_conf
*sensor_conf
;
486 data
= devm_kzalloc(&pdev
->dev
, sizeof(struct exynos_tmu_data
),
489 dev_err(&pdev
->dev
, "Failed to allocate driver structure\n");
493 platform_set_drvdata(pdev
, data
);
494 mutex_init(&data
->lock
);
496 ret
= exynos_map_dt_data(pdev
);
502 INIT_WORK(&data
->irq_work
, exynos_tmu_work
);
504 data
->clk
= devm_clk_get(&pdev
->dev
, "tmu_apbif");
505 if (IS_ERR(data
->clk
)) {
506 dev_err(&pdev
->dev
, "Failed to get clock\n");
507 return PTR_ERR(data
->clk
);
510 ret
= clk_prepare(data
->clk
);
514 if (pdata
->type
== SOC_ARCH_EXYNOS
||
515 pdata
->type
== SOC_ARCH_EXYNOS4210
)
516 data
->soc
= pdata
->type
;
519 dev_err(&pdev
->dev
, "Platform not supported\n");
523 ret
= exynos_tmu_initialize(pdev
);
525 dev_err(&pdev
->dev
, "Failed to initialize TMU\n");
529 exynos_tmu_control(pdev
, true);
531 /* Allocate a structure to register with the exynos core thermal */
532 sensor_conf
= devm_kzalloc(&pdev
->dev
,
533 sizeof(struct thermal_sensor_conf
), GFP_KERNEL
);
535 dev_err(&pdev
->dev
, "Failed to allocate registration struct\n");
539 sprintf(sensor_conf
->name
, "therm_zone%d", data
->id
);
540 sensor_conf
->read_temperature
= (int (*)(void *))exynos_tmu_read
;
541 sensor_conf
->write_emul_temp
=
542 (int (*)(void *, unsigned long))exynos_tmu_set_emulation
;
543 sensor_conf
->driver_data
= data
;
544 sensor_conf
->trip_data
.trip_count
= pdata
->trigger_enable
[0] +
545 pdata
->trigger_enable
[1] + pdata
->trigger_enable
[2]+
546 pdata
->trigger_enable
[3];
548 for (i
= 0; i
< sensor_conf
->trip_data
.trip_count
; i
++) {
549 sensor_conf
->trip_data
.trip_val
[i
] =
550 pdata
->threshold
+ pdata
->trigger_levels
[i
];
551 sensor_conf
->trip_data
.trip_type
[i
] =
552 pdata
->trigger_type
[i
];
555 sensor_conf
->trip_data
.trigger_falling
= pdata
->threshold_falling
;
557 sensor_conf
->cooling_data
.freq_clip_count
= pdata
->freq_tab_count
;
558 for (i
= 0; i
< pdata
->freq_tab_count
; i
++) {
559 sensor_conf
->cooling_data
.freq_data
[i
].freq_clip_max
=
560 pdata
->freq_tab
[i
].freq_clip_max
;
561 sensor_conf
->cooling_data
.freq_data
[i
].temp_level
=
562 pdata
->freq_tab
[i
].temp_level
;
564 sensor_conf
->dev
= &pdev
->dev
;
565 /* Register the sensor with thermal management interface */
566 ret
= exynos_register_thermal(sensor_conf
);
568 dev_err(&pdev
->dev
, "Failed to register thermal interface\n");
571 data
->reg_conf
= sensor_conf
;
573 ret
= devm_request_irq(&pdev
->dev
, data
->irq
, exynos_tmu_irq
,
574 IRQF_TRIGGER_RISING
| IRQF_SHARED
, dev_name(&pdev
->dev
), data
);
576 dev_err(&pdev
->dev
, "Failed to request irq: %d\n", data
->irq
);
582 clk_unprepare(data
->clk
);
586 static int exynos_tmu_remove(struct platform_device
*pdev
)
588 struct exynos_tmu_data
*data
= platform_get_drvdata(pdev
);
590 exynos_tmu_control(pdev
, false);
592 exynos_unregister_thermal(data
->reg_conf
);
594 clk_unprepare(data
->clk
);
599 #ifdef CONFIG_PM_SLEEP
600 static int exynos_tmu_suspend(struct device
*dev
)
602 exynos_tmu_control(to_platform_device(dev
), false);
607 static int exynos_tmu_resume(struct device
*dev
)
609 struct platform_device
*pdev
= to_platform_device(dev
);
611 exynos_tmu_initialize(pdev
);
612 exynos_tmu_control(pdev
, true);
617 static SIMPLE_DEV_PM_OPS(exynos_tmu_pm
,
618 exynos_tmu_suspend
, exynos_tmu_resume
);
619 #define EXYNOS_TMU_PM (&exynos_tmu_pm)
621 #define EXYNOS_TMU_PM NULL
624 static struct platform_driver exynos_tmu_driver
= {
626 .name
= "exynos-tmu",
627 .owner
= THIS_MODULE
,
629 .of_match_table
= of_match_ptr(exynos_tmu_match
),
631 .probe
= exynos_tmu_probe
,
632 .remove
= exynos_tmu_remove
,
635 module_platform_driver(exynos_tmu_driver
);
637 MODULE_DESCRIPTION("EXYNOS TMU Driver");
638 MODULE_AUTHOR("Donggeun Kim <dg77.kim@samsung.com>");
639 MODULE_LICENSE("GPL");
640 MODULE_ALIAS("platform:exynos-tmu");