drivers/thermal/samsung/exynos_tmu.h

   1 /*
   2  * exynos_tmu.h - Samsung EXYNOS TMU (Thermal Management Unit)
   3  *
   4  *  Copyright (C) 2011 Samsung Electronics
   5  *  Donggeun Kim <dg77.kim@samsung.com>
   6  *  Amit Daniel Kachhap <amit.daniel@samsung.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  21  */
  22
  23 #ifndef _EXYNOS_TMU_H
  24 #define _EXYNOS_TMU_H
  25 #include <linux/cpu_cooling.h>
  26
  27 #include "exynos_thermal_common.h"
  28
  29 enum calibration_type {
  30         TYPE_ONE_POINT_TRIMMING,
  31         TYPE_ONE_POINT_TRIMMING_25,
  32         TYPE_ONE_POINT_TRIMMING_85,
  33         TYPE_TWO_POINT_TRIMMING,
  34         TYPE_NONE,
  35 };
  36
  37 enum soc_type {
  38         SOC_ARCH_EXYNOS3250 = 1,
  39         SOC_ARCH_EXYNOS4210,
  40         SOC_ARCH_EXYNOS4412,
  41         SOC_ARCH_EXYNOS5250,
  42         SOC_ARCH_EXYNOS5260,
  43         SOC_ARCH_EXYNOS5420,
  44         SOC_ARCH_EXYNOS5420_TRIMINFO,
  45         SOC_ARCH_EXYNOS5440,
  46 };
  47
  48 /**
  49  * EXYNOS TMU supported features.
  50  * TMU_SUPPORT_EMULATION - This features is used to set user defined
  51  *                      temperature to the TMU controller.
  52  * TMU_SUPPORT_MULTI_INST - This features denotes that the soc
  53  *                      has many instances of TMU.
  54  * TMU_SUPPORT_FALLING_TRIP - This features shows that interrupt can
  55  *                      be registered for falling trips also.
  56  * TMU_SUPPORT_EMUL_TIME - This features allows to set next temp emulation
  57  *                      sample time.
  58  * TMU_SUPPORT_ADDRESS_MULTIPLE - This feature tells that the different TMU
  59  *                      sensors shares some common registers.
  60  * TMU_SUPPORT - macro to compare the above features with the supplied.
  61  */
  62 #define TMU_SUPPORT_EMULATION                   BIT(0)
  63 #define TMU_SUPPORT_MULTI_INST                  BIT(1)
  64 #define TMU_SUPPORT_FALLING_TRIP                BIT(2)
  65 #define TMU_SUPPORT_EMUL_TIME                   BIT(3)
  66 #define TMU_SUPPORT_ADDRESS_MULTIPLE            BIT(4)
  67
  68 #define TMU_SUPPORTS(a, b)      (a->features & TMU_SUPPORT_ ## b)
  69
  70 /**
  71  * struct exynos_tmu_register - register descriptors to access registers.
  72  * The register validity may vary slightly across different exynos SOC's.
  73  * @tmu_intstat: Register containing the interrupt status values.
  74  * @tmu_intclear: Register for clearing the raised interrupt status.
  75  * @emul_con: TMU emulation controller register.
  76  */
  77 struct exynos_tmu_registers {
  78         u32     tmu_intstat;
  79         u32     tmu_intclear;
  80         u32     emul_con;
  81 };
  82
  83 /**
  84  * struct exynos_tmu_platform_data
  85  * @threshold: basic temperature for generating interrupt
  86  *             25 <= threshold <= 125 [unit: degree Celsius]
  87  * @threshold_falling: differntial value for setting threshold
  88  *                     of temperature falling interrupt.
  89  * @trigger_levels: array for each interrupt levels
  90  *      [unit: degree Celsius]
  91  *      0: temperature for trigger_level0 interrupt
  92  *         condition for trigger_level0 interrupt:
  93  *              current temperature > threshold + trigger_levels[0]
  94  *      1: temperature for trigger_level1 interrupt
  95  *         condition for trigger_level1 interrupt:
  96  *              current temperature > threshold + trigger_levels[1]
  97  *      2: temperature for trigger_level2 interrupt
  98  *         condition for trigger_level2 interrupt:
  99  *              current temperature > threshold + trigger_levels[2]
 100  *      3: temperature for trigger_level3 interrupt
 101  *         condition for trigger_level3 interrupt:
 102  *              current temperature > threshold + trigger_levels[3]
 103  * @trigger_type: defines the type of trigger. Possible values are,
 104  *      THROTTLE_ACTIVE trigger type
 105  *      THROTTLE_PASSIVE trigger type
 106  *      SW_TRIP trigger type
 107  *      HW_TRIP
 108  * @trigger_enable[]: array to denote which trigger levels are enabled.
 109  *      1 = enable trigger_level[] interrupt,
 110  *      0 = disable trigger_level[] interrupt
 111  * @max_trigger_level: max trigger level supported by the TMU
 112  * @non_hw_trigger_levels: number of defined non-hardware trigger levels
 113  * @gain: gain of amplifier in the positive-TC generator block
 114  *      0 < gain <= 15
 115  * @reference_voltage: reference voltage of amplifier
 116  *      in the positive-TC generator block
 117  *      0 < reference_voltage <= 31
 118  * @noise_cancel_mode: noise cancellation mode
 119  *      000, 100, 101, 110 and 111 can be different modes
 120  * @type: determines the type of SOC
 121  * @efuse_value: platform defined fuse value
 122  * @min_efuse_value: minimum valid trimming data
 123  * @max_efuse_value: maximum valid trimming data
 124  * @first_point_trim: temp value of the first point trimming
 125  * @second_point_trim: temp value of the second point trimming
 126  * @default_temp_offset: default temperature offset in case of no trimming
 127  * @test_mux; information if SoC supports test MUX
 128  * @cal_type: calibration type for temperature
 129  * @freq_clip_table: Table representing frequency reduction percentage.
 130  * @freq_tab_count: Count of the above table as frequency reduction may
 131  *      applicable to only some of the trigger levels.
 132  * @registers: Pointer to structure containing all the TMU controller registers
 133  *      and bitfields shifts and masks.
 134  * @features: a bitfield value indicating the features supported in SOC like
 135  *      emulation, multi instance etc
 136  *
 137  * This structure is required for configuration of exynos_tmu driver.
 138  */
 139 struct exynos_tmu_platform_data {
 140         u8 threshold;
 141         u8 threshold_falling;
 142         u8 trigger_levels[MAX_TRIP_COUNT];
 143         enum trigger_type trigger_type[MAX_TRIP_COUNT];
 144         bool trigger_enable[MAX_TRIP_COUNT];
 145         u8 max_trigger_level;
 146         u8 non_hw_trigger_levels;
 147         u8 gain;
 148         u8 reference_voltage;
 149         u8 noise_cancel_mode;
 150
 151         u32 efuse_value;
 152         u32 min_efuse_value;
 153         u32 max_efuse_value;
 154         u8 first_point_trim;
 155         u8 second_point_trim;
 156         u8 default_temp_offset;
 157         u8 test_mux;
 158
 159         enum calibration_type cal_type;
 160         enum soc_type type;
 161         struct freq_clip_table freq_tab[4];
 162         unsigned int freq_tab_count;
 163         const struct exynos_tmu_registers *registers;
 164         unsigned int features;
 165 };
 166
 167 /**
 168  * struct exynos_tmu_init_data
 169  * @tmu_count: number of TMU instances.
 170  * @tmu_data: platform data of all TMU instances.
 171  * This structure is required to store data for multi-instance exynos tmu
 172  * driver.
 173  */
 174 struct exynos_tmu_init_data {
 175         int tmu_count;
 176         struct exynos_tmu_platform_data tmu_data[];
 177 };
 178
 179 #endif /* _EXYNOS_TMU_H */