2 * TTY driver for MIPS EJTAG Fast Debug Channels.
4 * Copyright (C) 2007-2015 Imagination Technologies Ltd
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file COPYING in the main directory of this archive for more
11 #include <linux/atomic.h>
12 #include <linux/bitops.h>
13 #include <linux/completion.h>
14 #include <linux/console.h>
15 #include <linux/delay.h>
16 #include <linux/export.h>
17 #include <linux/init.h>
18 #include <linux/interrupt.h>
19 #include <linux/kernel.h>
20 #include <linux/kthread.h>
21 #include <linux/sched.h>
22 #include <linux/serial.h>
23 #include <linux/slab.h>
24 #include <linux/spinlock.h>
25 #include <linux/string.h>
26 #include <linux/timer.h>
27 #include <linux/tty.h>
28 #include <linux/tty_driver.h>
29 #include <linux/tty_flip.h>
30 #include <linux/uaccess.h>
35 /* Register offsets */
36 #define REG_FDACSR 0x00 /* FDC Access Control and Status Register */
37 #define REG_FDCFG 0x08 /* FDC Configuration Register */
38 #define REG_FDSTAT 0x10 /* FDC Status Register */
39 #define REG_FDRX 0x18 /* FDC Receive Register */
40 #define REG_FDTX(N) (0x20+0x8*(N)) /* FDC Transmit Register n (0..15) */
44 #define REG_FDCFG_TXINTTHRES_SHIFT 18
45 #define REG_FDCFG_TXINTTHRES (0x3 << REG_FDCFG_TXINTTHRES_SHIFT)
46 #define REG_FDCFG_TXINTTHRES_DISABLED (0x0 << REG_FDCFG_TXINTTHRES_SHIFT)
47 #define REG_FDCFG_TXINTTHRES_EMPTY (0x1 << REG_FDCFG_TXINTTHRES_SHIFT)
48 #define REG_FDCFG_TXINTTHRES_NOTFULL (0x2 << REG_FDCFG_TXINTTHRES_SHIFT)
49 #define REG_FDCFG_TXINTTHRES_NEAREMPTY (0x3 << REG_FDCFG_TXINTTHRES_SHIFT)
50 #define REG_FDCFG_RXINTTHRES_SHIFT 16
51 #define REG_FDCFG_RXINTTHRES (0x3 << REG_FDCFG_RXINTTHRES_SHIFT)
52 #define REG_FDCFG_RXINTTHRES_DISABLED (0x0 << REG_FDCFG_RXINTTHRES_SHIFT)
53 #define REG_FDCFG_RXINTTHRES_FULL (0x1 << REG_FDCFG_RXINTTHRES_SHIFT)
54 #define REG_FDCFG_RXINTTHRES_NOTEMPTY (0x2 << REG_FDCFG_RXINTTHRES_SHIFT)
55 #define REG_FDCFG_RXINTTHRES_NEARFULL (0x3 << REG_FDCFG_RXINTTHRES_SHIFT)
56 #define REG_FDCFG_TXFIFOSIZE_SHIFT 8
57 #define REG_FDCFG_TXFIFOSIZE (0xff << REG_FDCFG_TXFIFOSIZE_SHIFT)
58 #define REG_FDCFG_RXFIFOSIZE_SHIFT 0
59 #define REG_FDCFG_RXFIFOSIZE (0xff << REG_FDCFG_RXFIFOSIZE_SHIFT)
61 #define REG_FDSTAT_TXCOUNT_SHIFT 24
62 #define REG_FDSTAT_TXCOUNT (0xff << REG_FDSTAT_TXCOUNT_SHIFT)
63 #define REG_FDSTAT_RXCOUNT_SHIFT 16
64 #define REG_FDSTAT_RXCOUNT (0xff << REG_FDSTAT_RXCOUNT_SHIFT)
65 #define REG_FDSTAT_RXCHAN_SHIFT 4
66 #define REG_FDSTAT_RXCHAN (0xf << REG_FDSTAT_RXCHAN_SHIFT)
67 #define REG_FDSTAT_RXE BIT(3) /* Rx Empty */
68 #define REG_FDSTAT_RXF BIT(2) /* Rx Full */
69 #define REG_FDSTAT_TXE BIT(1) /* Tx Empty */
70 #define REG_FDSTAT_TXF BIT(0) /* Tx Full */
72 /* Default channel for the early console */
73 #define CONSOLE_CHANNEL 1
75 #define NUM_TTY_CHANNELS 16
77 #define RX_BUF_SIZE 1024
80 * When the IRQ is unavailable, the FDC state must be polled for incoming data
81 * and space becoming available in TX FIFO.
83 #define FDC_TTY_POLL (HZ / 50)
85 struct mips_ejtag_fdc_tty
;
88 * struct mips_ejtag_fdc_tty_port - Wrapper struct for FDC tty_port.
89 * @port: TTY port data
90 * @driver: TTY driver.
91 * @rx_lock: Lock for rx_buf.
92 * This protects between the hard interrupt and user
93 * context. It's also held during read SWITCH operations.
94 * @rx_buf: Read buffer.
95 * @xmit_lock: Lock for xmit_*, and port.xmit_buf.
96 * This protects between user context and kernel thread.
97 * It is used from chars_in_buffer()/write_room() TTY
98 * callbacks which are used during wait operations, so a
99 * mutex is unsuitable.
100 * @xmit_cnt: Size of xmit buffer contents.
101 * @xmit_head: Head of xmit buffer where data is written.
102 * @xmit_tail: Tail of xmit buffer where data is read.
103 * @xmit_empty: Completion for xmit buffer being empty.
105 struct mips_ejtag_fdc_tty_port
{
106 struct tty_port port
;
107 struct mips_ejtag_fdc_tty
*driver
;
108 raw_spinlock_t rx_lock
;
110 spinlock_t xmit_lock
;
111 unsigned int xmit_cnt
;
112 unsigned int xmit_head
;
113 unsigned int xmit_tail
;
114 struct completion xmit_empty
;
118 * struct mips_ejtag_fdc_tty - Driver data for FDC as a whole.
119 * @dev: FDC device (for dev_*() logging).
120 * @driver: TTY driver.
121 * @cpu: CPU number for this FDC.
122 * @fdc_name: FDC name (not for base of channel names).
123 * @driver_name: Base of driver name.
124 * @ports: Per-channel data.
125 * @waitqueue: Wait queue for waiting for TX data, or for space in TX
127 * @lock: Lock to protect FDCFG (interrupt enable).
128 * @thread: KThread for writing out data to FDC.
129 * @reg: FDC registers.
130 * @tx_fifo: TX FIFO size.
131 * @xmit_size: Size of each port's xmit buffer.
132 * @xmit_total: Total number of bytes (from all ports) to transmit.
133 * @xmit_next: Next port number to transmit from (round robin).
134 * @xmit_full: Indicates TX FIFO is full, we're waiting for space.
135 * @irq: IRQ number (negative if no IRQ).
136 * @removing: Indicates the device is being removed and @poll_timer
137 * should not be restarted.
138 * @poll_timer: Timer for polling for interrupt events when @irq < 0.
140 struct mips_ejtag_fdc_tty
{
142 struct tty_driver
*driver
;
145 char driver_name
[16];
146 struct mips_ejtag_fdc_tty_port ports
[NUM_TTY_CHANNELS
];
147 wait_queue_head_t waitqueue
;
149 struct task_struct
*thread
;
154 unsigned int xmit_size
;
156 unsigned int xmit_next
;
161 struct timer_list poll_timer
;
164 /* Hardware access */
166 static inline void mips_ejtag_fdc_write(struct mips_ejtag_fdc_tty
*priv
,
167 unsigned int offs
, unsigned int data
)
169 iowrite32(data
, priv
->reg
+ offs
);
172 static inline unsigned int mips_ejtag_fdc_read(struct mips_ejtag_fdc_tty
*priv
,
175 return ioread32(priv
->reg
+ offs
);
178 /* Encoding of byte stream in FDC words */
181 * struct fdc_word - FDC word encoding some number of bytes of data.
182 * @word: Raw FDC word.
183 * @bytes: Number of bytes encoded by @word.
191 * This is a compact encoding which allows every 1 byte, 2 byte, and 3 byte
192 * sequence to be encoded in a single word, while allowing the majority of 4
193 * byte sequences (including all ASCII and common binary data) to be encoded in
195 * _______________________ _____________
197 * |31-24|23-16|15-8 | 7-0 | Bytes |
198 * |_____|_____|_____|_____|_____________|
200 * |0x80 |0x80 |0x80 | WW | WW |
201 * |0x81 |0x81 | XX | WW | WW XX |
202 * |0x82 | YY | XX | WW | WW XX YY |
203 * | ZZ | YY | XX | WW | WW XX YY ZZ |
204 * |_____|_____|_____|_____|_____________|
206 * Note that the 4-byte encoding can only be used where none of the other 3
207 * encodings match, otherwise it must fall back to the 3 byte encoding.
210 /* ranges >= 1 && sizes[0] >= 1 */
211 static struct fdc_word
mips_ejtag_fdc_encode(const char **ptrs
,
215 struct fdc_word word
= { 0, 0 };
216 const char **ptrs_end
= ptrs
+ ranges
;
218 for (; ptrs
< ptrs_end
; ++ptrs
) {
219 const char *ptr
= *(ptrs
++);
220 const char *end
= ptr
+ *(sizes
++);
222 for (; ptr
< end
; ++ptr
) {
223 word
.word
|= (u8
)*ptr
<< (8*word
.bytes
);
230 /* Choose the appropriate encoding */
231 switch (word
.bytes
) {
233 /* 4 byte encoding, but don't match the 1-3 byte encodings */
234 if ((word
.word
>> 8) != 0x808080 &&
235 (word
.word
>> 16) != 0x8181 &&
236 (word
.word
>> 24) != 0x82)
238 /* Fall back to a 3 byte encoding */
240 word
.word
&= 0x00ffffff;
242 /* 3 byte encoding */
243 word
.word
|= 0x82000000;
246 /* 2 byte encoding */
247 word
.word
|= 0x81810000;
250 /* 1 byte encoding */
251 word
.word
|= 0x80808000;
257 static unsigned int mips_ejtag_fdc_decode(u32 word
, char *buf
)
261 if (word
== 0x808080)
275 /* Console operations */
278 * struct mips_ejtag_fdc_console - Wrapper struct for FDC consoles.
279 * @cons: Console object.
280 * @tty_drv: TTY driver associated with this console.
281 * @lock: Lock to protect concurrent access to other fields.
282 * This is raw because it may be used very early.
283 * @initialised: Whether the console is initialised.
284 * @regs: Registers base address for each CPU.
286 struct mips_ejtag_fdc_console
{
288 struct tty_driver
*tty_drv
;
291 void __iomem
*regs
[NR_CPUS
];
294 /* Low level console write shared by early console and normal console */
295 static void mips_ejtag_fdc_console_write(struct console
*c
, const char *s
,
298 struct mips_ejtag_fdc_console
*cons
=
299 container_of(c
, struct mips_ejtag_fdc_console
, cons
);
301 struct fdc_word word
;
303 unsigned int i
, buf_len
, cpu
;
304 bool done_cr
= false;
306 const char *buf_ptr
= buf
;
307 /* Number of bytes of input data encoded up to each byte in buf */
310 local_irq_save(flags
);
311 cpu
= smp_processor_id();
312 regs
= cons
->regs
[cpu
];
313 /* First console output on this CPU? */
315 regs
= mips_cdmm_early_probe(0xfd);
316 cons
->regs
[cpu
] = regs
;
318 /* Already tried and failed to find FDC on this CPU? */
323 * Copy the next few characters to a buffer so we can inject
324 * carriage returns before newlines.
326 for (buf_len
= 0, i
= 0; buf_len
< 4 && i
< count
; ++buf_len
) {
327 if (s
[i
] == '\n' && !done_cr
) {
337 word
= mips_ejtag_fdc_encode(&buf_ptr
, &buf_len
, 1);
338 count
-= inc
[word
.bytes
- 1];
339 s
+= inc
[word
.bytes
- 1];
341 /* Busy wait until there's space in fifo */
342 while (ioread32(regs
+ REG_FDSTAT
) & REG_FDSTAT_TXF
)
344 iowrite32(word
.word
, regs
+ REG_FDTX(c
->index
));
347 local_irq_restore(flags
);
350 static struct tty_driver
*mips_ejtag_fdc_console_device(struct console
*c
,
353 struct mips_ejtag_fdc_console
*cons
=
354 container_of(c
, struct mips_ejtag_fdc_console
, cons
);
357 return cons
->tty_drv
;
360 /* Initialise an FDC console (early or normal */
361 static int __init
mips_ejtag_fdc_console_init(struct mips_ejtag_fdc_console
*c
)
367 raw_spin_lock_irqsave(&c
->lock
, flags
);
368 /* Don't init twice */
371 /* Look for the FDC device */
372 regs
= mips_cdmm_early_probe(0xfd);
378 c
->initialised
= true;
379 c
->regs
[smp_processor_id()] = regs
;
380 register_console(&c
->cons
);
382 raw_spin_unlock_irqrestore(&c
->lock
, flags
);
386 static struct mips_ejtag_fdc_console mips_ejtag_fdc_con
= {
389 .write
= mips_ejtag_fdc_console_write
,
390 .device
= mips_ejtag_fdc_console_device
,
391 .flags
= CON_PRINTBUFFER
,
394 .lock
= __RAW_SPIN_LOCK_UNLOCKED(mips_ejtag_fdc_con
.lock
),
397 /* TTY RX/TX operations */
400 * mips_ejtag_fdc_put_chan() - Write out a block of channel data.
401 * @priv: Pointer to driver private data.
402 * @chan: Channel number.
404 * Write a single block of data out to the debug adapter. If the circular buffer
405 * is wrapped then only the first block is written.
407 * Returns: The number of bytes that were written.
409 static unsigned int mips_ejtag_fdc_put_chan(struct mips_ejtag_fdc_tty
*priv
,
412 struct mips_ejtag_fdc_tty_port
*dport
;
413 struct tty_struct
*tty
;
415 unsigned int sizes
[2] = { 0 };
416 struct fdc_word word
= { .bytes
= 0 };
419 dport
= &priv
->ports
[chan
];
420 spin_lock(&dport
->xmit_lock
);
421 if (dport
->xmit_cnt
) {
422 ptrs
[0] = dport
->port
.xmit_buf
+ dport
->xmit_tail
;
423 sizes
[0] = min_t(unsigned int,
424 priv
->xmit_size
- dport
->xmit_tail
,
426 ptrs
[1] = dport
->port
.xmit_buf
;
427 sizes
[1] = dport
->xmit_cnt
- sizes
[0];
428 word
= mips_ejtag_fdc_encode(ptrs
, sizes
, 1 + !!sizes
[1]);
430 dev_dbg(priv
->dev
, "%s%u: out %08x: \"%*pE%*pE\"\n",
431 priv
->driver_name
, chan
, word
.word
,
432 min_t(int, word
.bytes
, sizes
[0]), ptrs
[0],
433 max_t(int, 0, word
.bytes
- sizes
[0]), ptrs
[1]);
435 local_irq_save(flags
);
436 /* Maybe we raced with the console and TX FIFO is full */
437 if (mips_ejtag_fdc_read(priv
, REG_FDSTAT
) & REG_FDSTAT_TXF
)
440 mips_ejtag_fdc_write(priv
, REG_FDTX(chan
), word
.word
);
441 local_irq_restore(flags
);
443 dport
->xmit_cnt
-= word
.bytes
;
444 if (!dport
->xmit_cnt
) {
445 /* Reset pointers to avoid wraps */
446 dport
->xmit_head
= 0;
447 dport
->xmit_tail
= 0;
448 complete(&dport
->xmit_empty
);
450 dport
->xmit_tail
+= word
.bytes
;
451 if (dport
->xmit_tail
>= priv
->xmit_size
)
452 dport
->xmit_tail
-= priv
->xmit_size
;
454 atomic_sub(word
.bytes
, &priv
->xmit_total
);
456 spin_unlock(&dport
->xmit_lock
);
458 /* If we've made more data available, wake up tty */
459 if (sizes
[0] && word
.bytes
) {
460 tty
= tty_port_tty_get(&dport
->port
);
471 * mips_ejtag_fdc_put() - Kernel thread to write out channel data to FDC.
472 * @arg: Driver pointer.
474 * This kernel thread runs while @priv->xmit_total != 0, and round robins the
475 * channels writing out blocks of buffered data to the FDC TX FIFO.
477 static int mips_ejtag_fdc_put(void *arg
)
479 struct mips_ejtag_fdc_tty
*priv
= arg
;
480 struct mips_ejtag_fdc_tty_port
*dport
;
484 __set_current_state(TASK_RUNNING
);
485 while (!kthread_should_stop()) {
486 /* Wait for data to actually write */
487 wait_event_interruptible(priv
->waitqueue
,
488 atomic_read(&priv
->xmit_total
) ||
489 kthread_should_stop());
490 if (kthread_should_stop())
493 /* Wait for TX FIFO space to write data */
494 raw_spin_lock_irq(&priv
->lock
);
495 if (mips_ejtag_fdc_read(priv
, REG_FDSTAT
) & REG_FDSTAT_TXF
) {
496 priv
->xmit_full
= true;
497 if (priv
->irq
>= 0) {
498 /* Enable TX interrupt */
499 cfg
= mips_ejtag_fdc_read(priv
, REG_FDCFG
);
500 cfg
&= ~REG_FDCFG_TXINTTHRES
;
501 cfg
|= REG_FDCFG_TXINTTHRES_NOTFULL
;
502 mips_ejtag_fdc_write(priv
, REG_FDCFG
, cfg
);
505 raw_spin_unlock_irq(&priv
->lock
);
506 wait_event_interruptible(priv
->waitqueue
,
507 !(mips_ejtag_fdc_read(priv
, REG_FDSTAT
)
509 kthread_should_stop());
510 if (kthread_should_stop())
513 /* Find next channel with data to output */
515 dport
= &priv
->ports
[priv
->xmit_next
];
516 spin_lock(&dport
->xmit_lock
);
517 ret
= dport
->xmit_cnt
;
518 spin_unlock(&dport
->xmit_lock
);
523 if (priv
->xmit_next
>= NUM_TTY_CHANNELS
)
527 /* Try writing data to the chosen channel */
528 ret
= mips_ejtag_fdc_put_chan(priv
, priv
->xmit_next
);
531 * If anything was output, move on to the next channel so as not
532 * to starve other channels.
536 if (priv
->xmit_next
>= NUM_TTY_CHANNELS
)
545 * mips_ejtag_fdc_handle() - Handle FDC events.
546 * @priv: Pointer to driver private data.
548 * Handle FDC events, such as new incoming data which needs draining out of the
549 * RX FIFO and feeding into the appropriate TTY ports, and space becoming
550 * available in the TX FIFO which would allow more data to be written out.
552 static void mips_ejtag_fdc_handle(struct mips_ejtag_fdc_tty
*priv
)
554 struct mips_ejtag_fdc_tty_port
*dport
;
555 unsigned int stat
, channel
, data
, cfg
, i
, flipped
;
560 /* Find which channel the next FDC word is destined for */
561 stat
= mips_ejtag_fdc_read(priv
, REG_FDSTAT
);
562 if (stat
& REG_FDSTAT_RXE
)
564 channel
= (stat
& REG_FDSTAT_RXCHAN
) >> REG_FDSTAT_RXCHAN_SHIFT
;
565 dport
= &priv
->ports
[channel
];
567 /* Read out the FDC word, decode it, and pass to tty layer */
568 raw_spin_lock(&dport
->rx_lock
);
569 data
= mips_ejtag_fdc_read(priv
, REG_FDRX
);
571 /* Check the port isn't being shut down */
575 len
= mips_ejtag_fdc_decode(data
, buf
);
576 dev_dbg(priv
->dev
, "%s%u: in %08x: \"%*pE\"\n",
577 priv
->driver_name
, channel
, data
, len
, buf
);
580 for (i
= 0; i
< len
; ++i
)
581 flipped
+= tty_insert_flip_char(&dport
->port
, buf
[i
],
584 tty_flip_buffer_push(&dport
->port
);
586 raw_spin_unlock(&dport
->rx_lock
);
589 /* If TX FIFO no longer full we may be able to write more data */
590 raw_spin_lock(&priv
->lock
);
591 if (priv
->xmit_full
&& !(stat
& REG_FDSTAT_TXF
)) {
592 priv
->xmit_full
= false;
594 /* Disable TX interrupt */
595 cfg
= mips_ejtag_fdc_read(priv
, REG_FDCFG
);
596 cfg
&= ~REG_FDCFG_TXINTTHRES
;
597 cfg
|= REG_FDCFG_TXINTTHRES_DISABLED
;
598 mips_ejtag_fdc_write(priv
, REG_FDCFG
, cfg
);
600 /* Wait the kthread so it can try writing more data */
601 wake_up_interruptible(&priv
->waitqueue
);
603 raw_spin_unlock(&priv
->lock
);
607 * mips_ejtag_fdc_isr() - Interrupt handler.
609 * @dev_id: Pointer to driver private data.
611 * This is the interrupt handler, used when interrupts are enabled.
613 * It simply triggers the common FDC handler code.
615 * Returns: IRQ_HANDLED if an FDC interrupt was pending.
616 * IRQ_NONE otherwise.
618 static irqreturn_t
mips_ejtag_fdc_isr(int irq
, void *dev_id
)
620 struct mips_ejtag_fdc_tty
*priv
= dev_id
;
623 * We're not using proper per-cpu IRQs, so we must be careful not to
624 * handle IRQs on CPUs we're not interested in.
626 * Ideally proper per-cpu IRQ handlers could be used, but that doesn't
627 * fit well with the whole sharing of the main CPU IRQ lines. When we
628 * have something with a GIC that routes the FDC IRQs (i.e. no sharing
629 * between handlers) then support could be added more easily.
631 if (smp_processor_id() != priv
->cpu
)
634 /* If no FDC interrupt pending, it wasn't for us */
635 if (!(read_c0_cause() & CAUSEF_FDCI
))
638 mips_ejtag_fdc_handle(priv
);
643 * mips_ejtag_fdc_tty_timer() - Poll FDC for incoming data.
644 * @opaque: Pointer to driver private data.
646 * This is the timer handler for when interrupts are disabled and polling the
647 * FDC state is required.
649 * It simply triggers the common FDC handler code and arranges for further
652 static void mips_ejtag_fdc_tty_timer(unsigned long opaque
)
654 struct mips_ejtag_fdc_tty
*priv
= (void *)opaque
;
656 mips_ejtag_fdc_handle(priv
);
658 mod_timer_pinned(&priv
->poll_timer
, jiffies
+ FDC_TTY_POLL
);
661 /* TTY Port operations */
663 static int mips_ejtag_fdc_tty_port_activate(struct tty_port
*port
,
664 struct tty_struct
*tty
)
666 struct mips_ejtag_fdc_tty_port
*dport
=
667 container_of(port
, struct mips_ejtag_fdc_tty_port
, port
);
670 /* Allocate the buffer we use for writing data */
671 if (tty_port_alloc_xmit_buf(port
) < 0)
674 /* Allocate the buffer we use for reading data */
675 rx_buf
= kzalloc(RX_BUF_SIZE
, GFP_KERNEL
);
679 raw_spin_lock_irq(&dport
->rx_lock
);
680 dport
->rx_buf
= rx_buf
;
681 raw_spin_unlock_irq(&dport
->rx_lock
);
685 tty_port_free_xmit_buf(port
);
690 static void mips_ejtag_fdc_tty_port_shutdown(struct tty_port
*port
)
692 struct mips_ejtag_fdc_tty_port
*dport
=
693 container_of(port
, struct mips_ejtag_fdc_tty_port
, port
);
694 struct mips_ejtag_fdc_tty
*priv
= dport
->driver
;
698 spin_lock(&dport
->xmit_lock
);
699 count
= dport
->xmit_cnt
;
700 spin_unlock(&dport
->xmit_lock
);
703 * There's still data to write out, so wake and wait for the
704 * writer thread to drain the buffer.
706 wake_up_interruptible(&priv
->waitqueue
);
707 wait_for_completion(&dport
->xmit_empty
);
710 /* Null the read buffer (timer could still be running!) */
711 raw_spin_lock_irq(&dport
->rx_lock
);
712 rx_buf
= dport
->rx_buf
;
713 dport
->rx_buf
= NULL
;
714 raw_spin_unlock_irq(&dport
->rx_lock
);
715 /* Free the read buffer */
718 /* Free the write buffer */
719 tty_port_free_xmit_buf(port
);
722 static const struct tty_port_operations mips_ejtag_fdc_tty_port_ops
= {
723 .activate
= mips_ejtag_fdc_tty_port_activate
,
724 .shutdown
= mips_ejtag_fdc_tty_port_shutdown
,
729 static int mips_ejtag_fdc_tty_install(struct tty_driver
*driver
,
730 struct tty_struct
*tty
)
732 struct mips_ejtag_fdc_tty
*priv
= driver
->driver_state
;
734 tty
->driver_data
= &priv
->ports
[tty
->index
];
735 return tty_port_install(&priv
->ports
[tty
->index
].port
, driver
, tty
);
738 static int mips_ejtag_fdc_tty_open(struct tty_struct
*tty
, struct file
*filp
)
740 return tty_port_open(tty
->port
, tty
, filp
);
743 static void mips_ejtag_fdc_tty_close(struct tty_struct
*tty
, struct file
*filp
)
745 return tty_port_close(tty
->port
, tty
, filp
);
748 static void mips_ejtag_fdc_tty_hangup(struct tty_struct
*tty
)
750 struct mips_ejtag_fdc_tty_port
*dport
= tty
->driver_data
;
751 struct mips_ejtag_fdc_tty
*priv
= dport
->driver
;
753 /* Drop any data in the xmit buffer */
754 spin_lock(&dport
->xmit_lock
);
755 if (dport
->xmit_cnt
) {
756 atomic_sub(dport
->xmit_cnt
, &priv
->xmit_total
);
758 dport
->xmit_head
= 0;
759 dport
->xmit_tail
= 0;
760 complete(&dport
->xmit_empty
);
762 spin_unlock(&dport
->xmit_lock
);
764 tty_port_hangup(tty
->port
);
767 static int mips_ejtag_fdc_tty_write(struct tty_struct
*tty
,
768 const unsigned char *buf
, int total
)
771 struct mips_ejtag_fdc_tty_port
*dport
= tty
->driver_data
;
772 struct mips_ejtag_fdc_tty
*priv
= dport
->driver
;
775 * Write to output buffer.
777 * The reason that we asynchronously write the buffer is because if we
778 * were to write the buffer synchronously then because the channels are
779 * per-CPU the buffer would be written to the channel of whatever CPU
782 * What we actually want to happen is have all input and output done on
785 spin_lock(&dport
->xmit_lock
);
786 /* Work out how many bytes we can write to the xmit buffer */
787 total
= min(total
, (int)(priv
->xmit_size
- dport
->xmit_cnt
));
788 atomic_add(total
, &priv
->xmit_total
);
789 dport
->xmit_cnt
+= total
;
790 /* Write the actual bytes (may need splitting if it wraps) */
791 for (count
= total
; count
; count
-= block
) {
792 block
= min(count
, (int)(priv
->xmit_size
- dport
->xmit_head
));
793 memcpy(dport
->port
.xmit_buf
+ dport
->xmit_head
, buf
, block
);
794 dport
->xmit_head
+= block
;
795 if (dport
->xmit_head
>= priv
->xmit_size
)
796 dport
->xmit_head
-= priv
->xmit_size
;
799 count
= dport
->xmit_cnt
;
800 /* Xmit buffer no longer empty? */
802 reinit_completion(&dport
->xmit_empty
);
803 spin_unlock(&dport
->xmit_lock
);
805 /* Wake up the kthread */
807 wake_up_interruptible(&priv
->waitqueue
);
811 static int mips_ejtag_fdc_tty_write_room(struct tty_struct
*tty
)
813 struct mips_ejtag_fdc_tty_port
*dport
= tty
->driver_data
;
814 struct mips_ejtag_fdc_tty
*priv
= dport
->driver
;
817 /* Report the space in the xmit buffer */
818 spin_lock(&dport
->xmit_lock
);
819 room
= priv
->xmit_size
- dport
->xmit_cnt
;
820 spin_unlock(&dport
->xmit_lock
);
825 static int mips_ejtag_fdc_tty_chars_in_buffer(struct tty_struct
*tty
)
827 struct mips_ejtag_fdc_tty_port
*dport
= tty
->driver_data
;
830 /* Report the number of bytes in the xmit buffer */
831 spin_lock(&dport
->xmit_lock
);
832 chars
= dport
->xmit_cnt
;
833 spin_unlock(&dport
->xmit_lock
);
838 static const struct tty_operations mips_ejtag_fdc_tty_ops
= {
839 .install
= mips_ejtag_fdc_tty_install
,
840 .open
= mips_ejtag_fdc_tty_open
,
841 .close
= mips_ejtag_fdc_tty_close
,
842 .hangup
= mips_ejtag_fdc_tty_hangup
,
843 .write
= mips_ejtag_fdc_tty_write
,
844 .write_room
= mips_ejtag_fdc_tty_write_room
,
845 .chars_in_buffer
= mips_ejtag_fdc_tty_chars_in_buffer
,
848 static int mips_ejtag_fdc_tty_probe(struct mips_cdmm_device
*dev
)
851 struct mips_ejtag_fdc_tty_port
*dport
;
852 struct mips_ejtag_fdc_tty
*priv
;
853 struct tty_driver
*driver
;
854 unsigned int cfg
, tx_fifo
;
856 priv
= devm_kzalloc(&dev
->dev
, sizeof(*priv
), GFP_KERNEL
);
859 priv
->cpu
= dev
->cpu
;
860 priv
->dev
= &dev
->dev
;
861 mips_cdmm_set_drvdata(dev
, priv
);
862 atomic_set(&priv
->xmit_total
, 0);
863 raw_spin_lock_init(&priv
->lock
);
865 priv
->reg
= devm_ioremap_nocache(priv
->dev
, dev
->res
.start
,
866 resource_size(&dev
->res
));
868 dev_err(priv
->dev
, "ioremap failed for resource %pR\n",
873 cfg
= mips_ejtag_fdc_read(priv
, REG_FDCFG
);
874 tx_fifo
= (cfg
& REG_FDCFG_TXFIFOSIZE
) >> REG_FDCFG_TXFIFOSIZE_SHIFT
;
875 /* Disable interrupts */
876 cfg
&= ~(REG_FDCFG_TXINTTHRES
| REG_FDCFG_RXINTTHRES
);
877 cfg
|= REG_FDCFG_TXINTTHRES_DISABLED
;
878 cfg
|= REG_FDCFG_RXINTTHRES_DISABLED
;
879 mips_ejtag_fdc_write(priv
, REG_FDCFG
, cfg
);
881 /* Make each port's xmit FIFO big enough to fill FDC TX FIFO */
882 priv
->xmit_size
= min(tx_fifo
* 4, (unsigned int)SERIAL_XMIT_SIZE
);
884 driver
= tty_alloc_driver(NUM_TTY_CHANNELS
, TTY_DRIVER_REAL_RAW
);
886 return PTR_ERR(driver
);
887 priv
->driver
= driver
;
889 driver
->driver_name
= "ejtag_fdc";
890 snprintf(priv
->fdc_name
, sizeof(priv
->fdc_name
), "ttyFDC%u", dev
->cpu
);
891 snprintf(priv
->driver_name
, sizeof(priv
->driver_name
), "%sc",
893 driver
->name
= priv
->driver_name
;
894 driver
->major
= 0; /* Auto-allocate */
895 driver
->minor_start
= 0;
896 driver
->type
= TTY_DRIVER_TYPE_SERIAL
;
897 driver
->subtype
= SERIAL_TYPE_NORMAL
;
898 driver
->init_termios
= tty_std_termios
;
899 driver
->init_termios
.c_cflag
|= CLOCAL
;
900 driver
->driver_state
= priv
;
902 tty_set_operations(driver
, &mips_ejtag_fdc_tty_ops
);
903 for (nport
= 0; nport
< NUM_TTY_CHANNELS
; nport
++) {
904 dport
= &priv
->ports
[nport
];
905 dport
->driver
= priv
;
906 tty_port_init(&dport
->port
);
907 dport
->port
.ops
= &mips_ejtag_fdc_tty_port_ops
;
908 raw_spin_lock_init(&dport
->rx_lock
);
909 spin_lock_init(&dport
->xmit_lock
);
910 /* The xmit buffer starts empty, i.e. completely written */
911 init_completion(&dport
->xmit_empty
);
912 complete(&dport
->xmit_empty
);
915 /* Set up the console */
916 mips_ejtag_fdc_con
.regs
[dev
->cpu
] = priv
->reg
;
918 mips_ejtag_fdc_con
.tty_drv
= driver
;
920 init_waitqueue_head(&priv
->waitqueue
);
921 priv
->thread
= kthread_create(mips_ejtag_fdc_put
, priv
, priv
->fdc_name
);
922 if (IS_ERR(priv
->thread
)) {
923 ret
= PTR_ERR(priv
->thread
);
924 dev_err(priv
->dev
, "Couldn't create kthread (%d)\n", ret
);
925 goto err_destroy_ports
;
928 * Bind the writer thread to the right CPU so it can't migrate.
929 * The channels are per-CPU and we want all channel I/O to be on a
930 * single predictable CPU.
932 kthread_bind(priv
->thread
, dev
->cpu
);
933 wake_up_process(priv
->thread
);
935 /* Look for an FDC IRQ */
938 priv
->irq
= get_c0_fdc_int();
940 /* Try requesting the IRQ */
941 if (priv
->irq
>= 0) {
943 * IRQF_SHARED, IRQF_NO_SUSPEND: The FDC IRQ may be shared with
944 * other local interrupts such as the timer which sets
945 * IRQF_TIMER (including IRQF_NO_SUSPEND).
947 * IRQF_NO_THREAD: The FDC IRQ isn't individually maskable so it
948 * cannot be deferred and handled by a thread on RT kernels. For
949 * this reason any spinlocks used from the ISR are raw.
951 ret
= devm_request_irq(priv
->dev
, priv
->irq
, mips_ejtag_fdc_isr
,
952 IRQF_PERCPU
| IRQF_SHARED
|
953 IRQF_NO_THREAD
| IRQF_NO_SUSPEND
,
954 priv
->fdc_name
, priv
);
958 if (priv
->irq
>= 0) {
959 /* IRQ is usable, enable RX interrupt */
960 raw_spin_lock_irq(&priv
->lock
);
961 cfg
= mips_ejtag_fdc_read(priv
, REG_FDCFG
);
962 cfg
&= ~REG_FDCFG_RXINTTHRES
;
963 cfg
|= REG_FDCFG_RXINTTHRES_NOTEMPTY
;
964 mips_ejtag_fdc_write(priv
, REG_FDCFG
, cfg
);
965 raw_spin_unlock_irq(&priv
->lock
);
967 /* If we didn't get an usable IRQ, poll instead */
968 setup_timer(&priv
->poll_timer
, mips_ejtag_fdc_tty_timer
,
969 (unsigned long)priv
);
970 priv
->poll_timer
.expires
= jiffies
+ FDC_TTY_POLL
;
972 * Always attach the timer to the right CPU. The channels are
973 * per-CPU so all polling should be from a single CPU.
975 add_timer_on(&priv
->poll_timer
, dev
->cpu
);
977 dev_info(priv
->dev
, "No usable IRQ, polling enabled\n");
980 ret
= tty_register_driver(driver
);
982 dev_err(priv
->dev
, "Couldn't install tty driver (%d)\n", ret
);
989 if (priv
->irq
>= 0) {
990 raw_spin_lock_irq(&priv
->lock
);
991 cfg
= mips_ejtag_fdc_read(priv
, REG_FDCFG
);
992 /* Disable interrupts */
993 cfg
&= ~(REG_FDCFG_TXINTTHRES
| REG_FDCFG_RXINTTHRES
);
994 cfg
|= REG_FDCFG_TXINTTHRES_DISABLED
;
995 cfg
|= REG_FDCFG_RXINTTHRES_DISABLED
;
996 mips_ejtag_fdc_write(priv
, REG_FDCFG
, cfg
);
997 raw_spin_unlock_irq(&priv
->lock
);
999 priv
->removing
= true;
1000 del_timer_sync(&priv
->poll_timer
);
1002 kthread_stop(priv
->thread
);
1005 mips_ejtag_fdc_con
.tty_drv
= NULL
;
1006 for (nport
= 0; nport
< NUM_TTY_CHANNELS
; nport
++) {
1007 dport
= &priv
->ports
[nport
];
1008 tty_port_destroy(&dport
->port
);
1010 put_tty_driver(priv
->driver
);
1014 static int mips_ejtag_fdc_tty_remove(struct mips_cdmm_device
*dev
)
1016 struct mips_ejtag_fdc_tty
*priv
= mips_cdmm_get_drvdata(dev
);
1017 struct mips_ejtag_fdc_tty_port
*dport
;
1021 if (priv
->irq
>= 0) {
1022 raw_spin_lock_irq(&priv
->lock
);
1023 cfg
= mips_ejtag_fdc_read(priv
, REG_FDCFG
);
1024 /* Disable interrupts */
1025 cfg
&= ~(REG_FDCFG_TXINTTHRES
| REG_FDCFG_RXINTTHRES
);
1026 cfg
|= REG_FDCFG_TXINTTHRES_DISABLED
;
1027 cfg
|= REG_FDCFG_RXINTTHRES_DISABLED
;
1028 mips_ejtag_fdc_write(priv
, REG_FDCFG
, cfg
);
1029 raw_spin_unlock_irq(&priv
->lock
);
1031 priv
->removing
= true;
1032 del_timer_sync(&priv
->poll_timer
);
1034 kthread_stop(priv
->thread
);
1036 mips_ejtag_fdc_con
.tty_drv
= NULL
;
1037 tty_unregister_driver(priv
->driver
);
1038 for (nport
= 0; nport
< NUM_TTY_CHANNELS
; nport
++) {
1039 dport
= &priv
->ports
[nport
];
1040 tty_port_destroy(&dport
->port
);
1042 put_tty_driver(priv
->driver
);
1046 static int mips_ejtag_fdc_tty_cpu_down(struct mips_cdmm_device
*dev
)
1048 struct mips_ejtag_fdc_tty
*priv
= mips_cdmm_get_drvdata(dev
);
1051 if (priv
->irq
>= 0) {
1052 raw_spin_lock_irq(&priv
->lock
);
1053 cfg
= mips_ejtag_fdc_read(priv
, REG_FDCFG
);
1054 /* Disable interrupts */
1055 cfg
&= ~(REG_FDCFG_TXINTTHRES
| REG_FDCFG_RXINTTHRES
);
1056 cfg
|= REG_FDCFG_TXINTTHRES_DISABLED
;
1057 cfg
|= REG_FDCFG_RXINTTHRES_DISABLED
;
1058 mips_ejtag_fdc_write(priv
, REG_FDCFG
, cfg
);
1059 raw_spin_unlock_irq(&priv
->lock
);
1061 priv
->removing
= true;
1062 del_timer_sync(&priv
->poll_timer
);
1064 kthread_stop(priv
->thread
);
1069 static int mips_ejtag_fdc_tty_cpu_up(struct mips_cdmm_device
*dev
)
1071 struct mips_ejtag_fdc_tty
*priv
= mips_cdmm_get_drvdata(dev
);
1075 if (priv
->irq
>= 0) {
1077 * IRQ is usable, enable RX interrupt
1078 * This must be before kthread is restarted, as kthread may
1079 * enable TX interrupt.
1081 raw_spin_lock_irq(&priv
->lock
);
1082 cfg
= mips_ejtag_fdc_read(priv
, REG_FDCFG
);
1083 cfg
&= ~(REG_FDCFG_TXINTTHRES
| REG_FDCFG_RXINTTHRES
);
1084 cfg
|= REG_FDCFG_TXINTTHRES_DISABLED
;
1085 cfg
|= REG_FDCFG_RXINTTHRES_NOTEMPTY
;
1086 mips_ejtag_fdc_write(priv
, REG_FDCFG
, cfg
);
1087 raw_spin_unlock_irq(&priv
->lock
);
1089 /* Restart poll timer */
1090 priv
->removing
= false;
1091 add_timer_on(&priv
->poll_timer
, dev
->cpu
);
1094 /* Restart the kthread */
1095 priv
->thread
= kthread_create(mips_ejtag_fdc_put
, priv
, priv
->fdc_name
);
1096 if (IS_ERR(priv
->thread
)) {
1097 ret
= PTR_ERR(priv
->thread
);
1098 dev_err(priv
->dev
, "Couldn't re-create kthread (%d)\n", ret
);
1101 /* Bind it back to the right CPU and set it off */
1102 kthread_bind(priv
->thread
, dev
->cpu
);
1103 wake_up_process(priv
->thread
);
1108 static struct mips_cdmm_device_id mips_ejtag_fdc_tty_ids
[] = {
1113 static struct mips_cdmm_driver mips_ejtag_fdc_tty_driver
= {
1115 .name
= "mips_ejtag_fdc",
1117 .probe
= mips_ejtag_fdc_tty_probe
,
1118 .remove
= mips_ejtag_fdc_tty_remove
,
1119 .cpu_down
= mips_ejtag_fdc_tty_cpu_down
,
1120 .cpu_up
= mips_ejtag_fdc_tty_cpu_up
,
1121 .id_table
= mips_ejtag_fdc_tty_ids
,
1123 module_mips_cdmm_driver(mips_ejtag_fdc_tty_driver
);
1125 static int __init
mips_ejtag_fdc_init_console(void)
1127 return mips_ejtag_fdc_console_init(&mips_ejtag_fdc_con
);
1129 console_initcall(mips_ejtag_fdc_init_console
);
1131 #ifdef CONFIG_MIPS_EJTAG_FDC_EARLYCON
1132 static struct mips_ejtag_fdc_console mips_ejtag_fdc_earlycon
= {
1134 .name
= "early_fdc",
1135 .write
= mips_ejtag_fdc_console_write
,
1136 .flags
= CON_PRINTBUFFER
| CON_BOOT
,
1137 .index
= CONSOLE_CHANNEL
,
1139 .lock
= __RAW_SPIN_LOCK_UNLOCKED(mips_ejtag_fdc_earlycon
.lock
),
1142 int __init
setup_early_fdc_console(void)
1144 return mips_ejtag_fdc_console_init(&mips_ejtag_fdc_earlycon
);