2 * Driver for 8250/16550-type serial ports
4 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
6 * Copyright (C) 2001 Russell King.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * A note about mapbase / membase
15 * mapbase is the physical address of the IO port.
16 * membase is an 'ioremapped' cookie.
19 #if defined(CONFIG_SERIAL_8250_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
23 #include <linux/module.h>
24 #include <linux/moduleparam.h>
25 #include <linux/ioport.h>
26 #include <linux/init.h>
27 #include <linux/console.h>
28 #include <linux/sysrq.h>
29 #include <linux/delay.h>
30 #include <linux/platform_device.h>
31 #include <linux/tty.h>
32 #include <linux/ratelimit.h>
33 #include <linux/tty_flip.h>
34 #include <linux/serial_reg.h>
35 #include <linux/serial_core.h>
36 #include <linux/serial.h>
37 #include <linux/serial_8250.h>
38 #include <linux/nmi.h>
39 #include <linux/mutex.h>
40 #include <linux/slab.h>
42 #include <linux/sunserialcore.h>
52 * share_irqs - whether we pass IRQF_SHARED to request_irq(). This option
53 * is unsafe when used on edge-triggered interrupts.
55 static unsigned int share_irqs
= SERIAL8250_SHARE_IRQS
;
57 static unsigned int nr_uarts
= CONFIG_SERIAL_8250_RUNTIME_UARTS
;
59 static struct uart_driver serial8250_reg
;
61 static int serial_index(struct uart_port
*port
)
63 return (serial8250_reg
.minor
- 64) + port
->line
;
66 static unsigned int skip_txen_test
; /* force skip of txen test at init time */
72 #define DEBUG_AUTOCONF(fmt...) printk(fmt)
74 #define DEBUG_AUTOCONF(fmt...) do { } while (0)
78 #define DEBUG_INTR(fmt...) printk(fmt)
80 #define DEBUG_INTR(fmt...) do { } while (0)
83 #define PASS_LIMIT 512
85 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
88 #ifdef CONFIG_SERIAL_8250_DETECT_IRQ
89 #define CONFIG_SERIAL_DETECT_IRQ 1
91 #ifdef CONFIG_SERIAL_8250_MANY_PORTS
92 #define CONFIG_SERIAL_MANY_PORTS 1
96 * HUB6 is always on. This will be removed once the header
97 * files have been cleaned.
101 #include <asm/serial.h>
103 * SERIAL_PORT_DFNS tells us about built-in ports that have no
104 * standard enumeration mechanism. Platforms that can find all
105 * serial ports via mechanisms like ACPI or PCI need not supply it.
107 #ifndef SERIAL_PORT_DFNS
108 #define SERIAL_PORT_DFNS
111 static const struct old_serial_port old_serial_port
[] = {
112 SERIAL_PORT_DFNS
/* defined in asm/serial.h */
115 #define UART_NR CONFIG_SERIAL_8250_NR_UARTS
117 #ifdef CONFIG_SERIAL_8250_RSA
119 #define PORT_RSA_MAX 4
120 static unsigned long probe_rsa
[PORT_RSA_MAX
];
121 static unsigned int probe_rsa_count
;
122 #endif /* CONFIG_SERIAL_8250_RSA */
125 struct hlist_node node
;
127 spinlock_t lock
; /* Protects list not the hash */
128 struct list_head
*head
;
131 #define NR_IRQ_HASH 32 /* Can be adjusted later */
132 static struct hlist_head irq_lists
[NR_IRQ_HASH
];
133 static DEFINE_MUTEX(hash_mutex
); /* Used to walk the hash */
136 * Here we define the default xmit fifo size used for each type of UART.
138 static const struct serial8250_config uart_config
[] = {
163 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_10
,
164 .flags
= UART_CAP_FIFO
,
175 .flags
= UART_CAP_FIFO
| UART_CAP_EFR
| UART_CAP_SLEEP
,
181 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_01
|
183 .flags
= UART_CAP_FIFO
| UART_CAP_EFR
| UART_CAP_SLEEP
,
189 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_10
|
191 .flags
= UART_CAP_FIFO
| UART_CAP_SLEEP
| UART_CAP_AFE
,
199 .name
= "16C950/954",
202 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_10
,
203 /* UART_CAP_EFR breaks billionon CF bluetooth card. */
204 .flags
= UART_CAP_FIFO
| UART_CAP_SLEEP
,
210 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_01
|
212 .flags
= UART_CAP_FIFO
| UART_CAP_EFR
| UART_CAP_SLEEP
,
218 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_10
,
219 .flags
= UART_CAP_FIFO
| UART_CAP_EFR
| UART_CAP_SLEEP
,
225 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_11
,
226 .flags
= UART_CAP_FIFO
,
232 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_10
,
233 .flags
= UART_CAP_FIFO
| UART_NATSEMI
,
239 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_10
,
240 .flags
= UART_CAP_FIFO
| UART_CAP_UUE
| UART_CAP_RTOIE
,
246 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_10
,
247 .flags
= UART_CAP_FIFO
,
253 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_10
,
254 .flags
= UART_CAP_FIFO
,
260 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_00
,
261 .flags
= UART_CAP_FIFO
| UART_CAP_AFE
,
267 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_10
,
268 .flags
= UART_CAP_FIFO
| UART_CAP_AFE
,
274 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_01
|
276 .flags
= UART_CAP_FIFO
| UART_CAP_RTOIE
,
282 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_10
,
283 .flags
= UART_CAP_FIFO
| UART_CAP_AFE
| UART_CAP_EFR
,
287 /* Uart divisor latch read */
288 static int default_serial_dl_read(struct uart_8250_port
*up
)
290 return serial_in(up
, UART_DLL
) | serial_in(up
, UART_DLM
) << 8;
293 /* Uart divisor latch write */
294 static void default_serial_dl_write(struct uart_8250_port
*up
, int value
)
296 serial_out(up
, UART_DLL
, value
& 0xff);
297 serial_out(up
, UART_DLM
, value
>> 8 & 0xff);
300 #ifdef CONFIG_MIPS_ALCHEMY
302 /* Au1x00 UART hardware has a weird register layout */
303 static const u8 au_io_in_map
[] = {
313 static const u8 au_io_out_map
[] = {
321 static unsigned int au_serial_in(struct uart_port
*p
, int offset
)
323 offset
= au_io_in_map
[offset
] << p
->regshift
;
324 return __raw_readl(p
->membase
+ offset
);
327 static void au_serial_out(struct uart_port
*p
, int offset
, int value
)
329 offset
= au_io_out_map
[offset
] << p
->regshift
;
330 __raw_writel(value
, p
->membase
+ offset
);
333 /* Au1x00 haven't got a standard divisor latch */
334 static int au_serial_dl_read(struct uart_8250_port
*up
)
336 return __raw_readl(up
->port
.membase
+ 0x28);
339 static void au_serial_dl_write(struct uart_8250_port
*up
, int value
)
341 __raw_writel(value
, up
->port
.membase
+ 0x28);
346 #ifdef CONFIG_SERIAL_8250_RM9K
370 static unsigned int rm9k_serial_in(struct uart_port
*p
, int offset
)
372 offset
= regmap_in
[offset
] << p
->regshift
;
373 return readl(p
->membase
+ offset
);
376 static void rm9k_serial_out(struct uart_port
*p
, int offset
, int value
)
378 offset
= regmap_out
[offset
] << p
->regshift
;
379 writel(value
, p
->membase
+ offset
);
382 static int rm9k_serial_dl_read(struct uart_8250_port
*up
)
384 return ((__raw_readl(up
->port
.membase
+ 0x10) << 8) |
385 (__raw_readl(up
->port
.membase
+ 0x08) & 0xff)) & 0xffff;
388 static void rm9k_serial_dl_write(struct uart_8250_port
*up
, int value
)
390 __raw_writel(value
, up
->port
.membase
+ 0x08);
391 __raw_writel(value
>> 8, up
->port
.membase
+ 0x10);
396 static unsigned int hub6_serial_in(struct uart_port
*p
, int offset
)
398 offset
= offset
<< p
->regshift
;
399 outb(p
->hub6
- 1 + offset
, p
->iobase
);
400 return inb(p
->iobase
+ 1);
403 static void hub6_serial_out(struct uart_port
*p
, int offset
, int value
)
405 offset
= offset
<< p
->regshift
;
406 outb(p
->hub6
- 1 + offset
, p
->iobase
);
407 outb(value
, p
->iobase
+ 1);
410 static unsigned int mem_serial_in(struct uart_port
*p
, int offset
)
412 offset
= offset
<< p
->regshift
;
413 return readb(p
->membase
+ offset
);
416 static void mem_serial_out(struct uart_port
*p
, int offset
, int value
)
418 offset
= offset
<< p
->regshift
;
419 writeb(value
, p
->membase
+ offset
);
422 static void mem32_serial_out(struct uart_port
*p
, int offset
, int value
)
424 offset
= offset
<< p
->regshift
;
425 writel(value
, p
->membase
+ offset
);
428 static unsigned int mem32_serial_in(struct uart_port
*p
, int offset
)
430 offset
= offset
<< p
->regshift
;
431 return readl(p
->membase
+ offset
);
434 static unsigned int io_serial_in(struct uart_port
*p
, int offset
)
436 offset
= offset
<< p
->regshift
;
437 return inb(p
->iobase
+ offset
);
440 static void io_serial_out(struct uart_port
*p
, int offset
, int value
)
442 offset
= offset
<< p
->regshift
;
443 outb(value
, p
->iobase
+ offset
);
446 static int serial8250_default_handle_irq(struct uart_port
*port
);
448 static void set_io_from_upio(struct uart_port
*p
)
450 struct uart_8250_port
*up
=
451 container_of(p
, struct uart_8250_port
, port
);
453 up
->dl_read
= default_serial_dl_read
;
454 up
->dl_write
= default_serial_dl_write
;
458 p
->serial_in
= hub6_serial_in
;
459 p
->serial_out
= hub6_serial_out
;
463 p
->serial_in
= mem_serial_in
;
464 p
->serial_out
= mem_serial_out
;
468 p
->serial_in
= mem32_serial_in
;
469 p
->serial_out
= mem32_serial_out
;
472 #ifdef CONFIG_SERIAL_8250_RM9K
474 p
->serial_in
= rm9k_serial_in
;
475 p
->serial_out
= rm9k_serial_out
;
476 up
->dl_read
= rm9k_serial_dl_read
;
477 up
->dl_write
= rm9k_serial_dl_write
;
481 #ifdef CONFIG_MIPS_ALCHEMY
483 p
->serial_in
= au_serial_in
;
484 p
->serial_out
= au_serial_out
;
485 up
->dl_read
= au_serial_dl_read
;
486 up
->dl_write
= au_serial_dl_write
;
491 p
->serial_in
= io_serial_in
;
492 p
->serial_out
= io_serial_out
;
495 /* Remember loaded iotype */
496 up
->cur_iotype
= p
->iotype
;
497 p
->handle_irq
= serial8250_default_handle_irq
;
501 serial_port_out_sync(struct uart_port
*p
, int offset
, int value
)
507 p
->serial_out(p
, offset
, value
);
508 p
->serial_in(p
, UART_LCR
); /* safe, no side-effects */
511 p
->serial_out(p
, offset
, value
);
518 static void serial_icr_write(struct uart_8250_port
*up
, int offset
, int value
)
520 serial_out(up
, UART_SCR
, offset
);
521 serial_out(up
, UART_ICR
, value
);
524 static unsigned int serial_icr_read(struct uart_8250_port
*up
, int offset
)
528 serial_icr_write(up
, UART_ACR
, up
->acr
| UART_ACR_ICRRD
);
529 serial_out(up
, UART_SCR
, offset
);
530 value
= serial_in(up
, UART_ICR
);
531 serial_icr_write(up
, UART_ACR
, up
->acr
);
539 static void serial8250_clear_fifos(struct uart_8250_port
*p
)
541 if (p
->capabilities
& UART_CAP_FIFO
) {
542 serial_out(p
, UART_FCR
, UART_FCR_ENABLE_FIFO
);
543 serial_out(p
, UART_FCR
, UART_FCR_ENABLE_FIFO
|
544 UART_FCR_CLEAR_RCVR
| UART_FCR_CLEAR_XMIT
);
545 serial_out(p
, UART_FCR
, 0);
549 void serial8250_clear_and_reinit_fifos(struct uart_8250_port
*p
)
553 serial8250_clear_fifos(p
);
554 fcr
= uart_config
[p
->port
.type
].fcr
;
555 serial_out(p
, UART_FCR
, fcr
);
557 EXPORT_SYMBOL_GPL(serial8250_clear_and_reinit_fifos
);
560 * IER sleep support. UARTs which have EFRs need the "extended
561 * capability" bit enabled. Note that on XR16C850s, we need to
562 * reset LCR to write to IER.
564 static void serial8250_set_sleep(struct uart_8250_port
*p
, int sleep
)
566 if (p
->capabilities
& UART_CAP_SLEEP
) {
567 if (p
->capabilities
& UART_CAP_EFR
) {
568 serial_out(p
, UART_LCR
, UART_LCR_CONF_MODE_B
);
569 serial_out(p
, UART_EFR
, UART_EFR_ECB
);
570 serial_out(p
, UART_LCR
, 0);
572 serial_out(p
, UART_IER
, sleep
? UART_IERX_SLEEP
: 0);
573 if (p
->capabilities
& UART_CAP_EFR
) {
574 serial_out(p
, UART_LCR
, UART_LCR_CONF_MODE_B
);
575 serial_out(p
, UART_EFR
, 0);
576 serial_out(p
, UART_LCR
, 0);
581 #ifdef CONFIG_SERIAL_8250_RSA
583 * Attempts to turn on the RSA FIFO. Returns zero on failure.
584 * We set the port uart clock rate if we succeed.
586 static int __enable_rsa(struct uart_8250_port
*up
)
591 mode
= serial_in(up
, UART_RSA_MSR
);
592 result
= mode
& UART_RSA_MSR_FIFO
;
595 serial_out(up
, UART_RSA_MSR
, mode
| UART_RSA_MSR_FIFO
);
596 mode
= serial_in(up
, UART_RSA_MSR
);
597 result
= mode
& UART_RSA_MSR_FIFO
;
601 up
->port
.uartclk
= SERIAL_RSA_BAUD_BASE
* 16;
606 static void enable_rsa(struct uart_8250_port
*up
)
608 if (up
->port
.type
== PORT_RSA
) {
609 if (up
->port
.uartclk
!= SERIAL_RSA_BAUD_BASE
* 16) {
610 spin_lock_irq(&up
->port
.lock
);
612 spin_unlock_irq(&up
->port
.lock
);
614 if (up
->port
.uartclk
== SERIAL_RSA_BAUD_BASE
* 16)
615 serial_out(up
, UART_RSA_FRR
, 0);
620 * Attempts to turn off the RSA FIFO. Returns zero on failure.
621 * It is unknown why interrupts were disabled in here. However,
622 * the caller is expected to preserve this behaviour by grabbing
623 * the spinlock before calling this function.
625 static void disable_rsa(struct uart_8250_port
*up
)
630 if (up
->port
.type
== PORT_RSA
&&
631 up
->port
.uartclk
== SERIAL_RSA_BAUD_BASE
* 16) {
632 spin_lock_irq(&up
->port
.lock
);
634 mode
= serial_in(up
, UART_RSA_MSR
);
635 result
= !(mode
& UART_RSA_MSR_FIFO
);
638 serial_out(up
, UART_RSA_MSR
, mode
& ~UART_RSA_MSR_FIFO
);
639 mode
= serial_in(up
, UART_RSA_MSR
);
640 result
= !(mode
& UART_RSA_MSR_FIFO
);
644 up
->port
.uartclk
= SERIAL_RSA_BAUD_BASE_LO
* 16;
645 spin_unlock_irq(&up
->port
.lock
);
648 #endif /* CONFIG_SERIAL_8250_RSA */
651 * This is a quickie test to see how big the FIFO is.
652 * It doesn't work at all the time, more's the pity.
654 static int size_fifo(struct uart_8250_port
*up
)
656 unsigned char old_fcr
, old_mcr
, old_lcr
;
657 unsigned short old_dl
;
660 old_lcr
= serial_in(up
, UART_LCR
);
661 serial_out(up
, UART_LCR
, 0);
662 old_fcr
= serial_in(up
, UART_FCR
);
663 old_mcr
= serial_in(up
, UART_MCR
);
664 serial_out(up
, UART_FCR
, UART_FCR_ENABLE_FIFO
|
665 UART_FCR_CLEAR_RCVR
| UART_FCR_CLEAR_XMIT
);
666 serial_out(up
, UART_MCR
, UART_MCR_LOOP
);
667 serial_out(up
, UART_LCR
, UART_LCR_CONF_MODE_A
);
668 old_dl
= serial_dl_read(up
);
669 serial_dl_write(up
, 0x0001);
670 serial_out(up
, UART_LCR
, 0x03);
671 for (count
= 0; count
< 256; count
++)
672 serial_out(up
, UART_TX
, count
);
673 mdelay(20);/* FIXME - schedule_timeout */
674 for (count
= 0; (serial_in(up
, UART_LSR
) & UART_LSR_DR
) &&
675 (count
< 256); count
++)
676 serial_in(up
, UART_RX
);
677 serial_out(up
, UART_FCR
, old_fcr
);
678 serial_out(up
, UART_MCR
, old_mcr
);
679 serial_out(up
, UART_LCR
, UART_LCR_CONF_MODE_A
);
680 serial_dl_write(up
, old_dl
);
681 serial_out(up
, UART_LCR
, old_lcr
);
687 * Read UART ID using the divisor method - set DLL and DLM to zero
688 * and the revision will be in DLL and device type in DLM. We
689 * preserve the device state across this.
691 static unsigned int autoconfig_read_divisor_id(struct uart_8250_port
*p
)
693 unsigned char old_dll
, old_dlm
, old_lcr
;
696 old_lcr
= serial_in(p
, UART_LCR
);
697 serial_out(p
, UART_LCR
, UART_LCR_CONF_MODE_A
);
699 old_dll
= serial_in(p
, UART_DLL
);
700 old_dlm
= serial_in(p
, UART_DLM
);
702 serial_out(p
, UART_DLL
, 0);
703 serial_out(p
, UART_DLM
, 0);
705 id
= serial_in(p
, UART_DLL
) | serial_in(p
, UART_DLM
) << 8;
707 serial_out(p
, UART_DLL
, old_dll
);
708 serial_out(p
, UART_DLM
, old_dlm
);
709 serial_out(p
, UART_LCR
, old_lcr
);
715 * This is a helper routine to autodetect StarTech/Exar/Oxsemi UART's.
716 * When this function is called we know it is at least a StarTech
717 * 16650 V2, but it might be one of several StarTech UARTs, or one of
718 * its clones. (We treat the broken original StarTech 16650 V1 as a
719 * 16550, and why not? Startech doesn't seem to even acknowledge its
722 * What evil have men's minds wrought...
724 static void autoconfig_has_efr(struct uart_8250_port
*up
)
726 unsigned int id1
, id2
, id3
, rev
;
729 * Everything with an EFR has SLEEP
731 up
->capabilities
|= UART_CAP_EFR
| UART_CAP_SLEEP
;
734 * First we check to see if it's an Oxford Semiconductor UART.
736 * If we have to do this here because some non-National
737 * Semiconductor clone chips lock up if you try writing to the
738 * LSR register (which serial_icr_read does)
742 * Check for Oxford Semiconductor 16C950.
744 * EFR [4] must be set else this test fails.
746 * This shouldn't be necessary, but Mike Hudson (Exoray@isys.ca)
747 * claims that it's needed for 952 dual UART's (which are not
748 * recommended for new designs).
751 serial_out(up
, UART_LCR
, UART_LCR_CONF_MODE_B
);
752 serial_out(up
, UART_EFR
, UART_EFR_ECB
);
753 serial_out(up
, UART_LCR
, 0x00);
754 id1
= serial_icr_read(up
, UART_ID1
);
755 id2
= serial_icr_read(up
, UART_ID2
);
756 id3
= serial_icr_read(up
, UART_ID3
);
757 rev
= serial_icr_read(up
, UART_REV
);
759 DEBUG_AUTOCONF("950id=%02x:%02x:%02x:%02x ", id1
, id2
, id3
, rev
);
761 if (id1
== 0x16 && id2
== 0xC9 &&
762 (id3
== 0x50 || id3
== 0x52 || id3
== 0x54)) {
763 up
->port
.type
= PORT_16C950
;
766 * Enable work around for the Oxford Semiconductor 952 rev B
767 * chip which causes it to seriously miscalculate baud rates
770 if (id3
== 0x52 && rev
== 0x01)
771 up
->bugs
|= UART_BUG_QUOT
;
776 * We check for a XR16C850 by setting DLL and DLM to 0, and then
777 * reading back DLL and DLM. The chip type depends on the DLM
779 * 0x10 - XR16C850 and the DLL contains the chip revision.
783 id1
= autoconfig_read_divisor_id(up
);
784 DEBUG_AUTOCONF("850id=%04x ", id1
);
787 if (id2
== 0x10 || id2
== 0x12 || id2
== 0x14) {
788 up
->port
.type
= PORT_16850
;
793 * It wasn't an XR16C850.
795 * We distinguish between the '654 and the '650 by counting
796 * how many bytes are in the FIFO. I'm using this for now,
797 * since that's the technique that was sent to me in the
798 * serial driver update, but I'm not convinced this works.
799 * I've had problems doing this in the past. -TYT
801 if (size_fifo(up
) == 64)
802 up
->port
.type
= PORT_16654
;
804 up
->port
.type
= PORT_16650V2
;
808 * We detected a chip without a FIFO. Only two fall into
809 * this category - the original 8250 and the 16450. The
810 * 16450 has a scratch register (accessible with LCR=0)
812 static void autoconfig_8250(struct uart_8250_port
*up
)
814 unsigned char scratch
, status1
, status2
;
816 up
->port
.type
= PORT_8250
;
818 scratch
= serial_in(up
, UART_SCR
);
819 serial_out(up
, UART_SCR
, 0xa5);
820 status1
= serial_in(up
, UART_SCR
);
821 serial_out(up
, UART_SCR
, 0x5a);
822 status2
= serial_in(up
, UART_SCR
);
823 serial_out(up
, UART_SCR
, scratch
);
825 if (status1
== 0xa5 && status2
== 0x5a)
826 up
->port
.type
= PORT_16450
;
829 static int broken_efr(struct uart_8250_port
*up
)
832 * Exar ST16C2550 "A2" devices incorrectly detect as
833 * having an EFR, and report an ID of 0x0201. See
834 * http://linux.derkeiler.com/Mailing-Lists/Kernel/2004-11/4812.html
836 if (autoconfig_read_divisor_id(up
) == 0x0201 && size_fifo(up
) == 16)
842 static inline int ns16550a_goto_highspeed(struct uart_8250_port
*up
)
844 unsigned char status
;
846 status
= serial_in(up
, 0x04); /* EXCR2 */
847 #define PRESL(x) ((x) & 0x30)
848 if (PRESL(status
) == 0x10) {
849 /* already in high speed mode */
852 status
&= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
853 status
|= 0x10; /* 1.625 divisor for baud_base --> 921600 */
854 serial_out(up
, 0x04, status
);
860 * We know that the chip has FIFOs. Does it have an EFR? The
861 * EFR is located in the same register position as the IIR and
862 * we know the top two bits of the IIR are currently set. The
863 * EFR should contain zero. Try to read the EFR.
865 static void autoconfig_16550a(struct uart_8250_port
*up
)
867 unsigned char status1
, status2
;
868 unsigned int iersave
;
870 up
->port
.type
= PORT_16550A
;
871 up
->capabilities
|= UART_CAP_FIFO
;
874 * Check for presence of the EFR when DLAB is set.
875 * Only ST16C650V1 UARTs pass this test.
877 serial_out(up
, UART_LCR
, UART_LCR_CONF_MODE_A
);
878 if (serial_in(up
, UART_EFR
) == 0) {
879 serial_out(up
, UART_EFR
, 0xA8);
880 if (serial_in(up
, UART_EFR
) != 0) {
881 DEBUG_AUTOCONF("EFRv1 ");
882 up
->port
.type
= PORT_16650
;
883 up
->capabilities
|= UART_CAP_EFR
| UART_CAP_SLEEP
;
885 DEBUG_AUTOCONF("Motorola 8xxx DUART ");
887 serial_out(up
, UART_EFR
, 0);
892 * Maybe it requires 0xbf to be written to the LCR.
893 * (other ST16C650V2 UARTs, TI16C752A, etc)
895 serial_out(up
, UART_LCR
, UART_LCR_CONF_MODE_B
);
896 if (serial_in(up
, UART_EFR
) == 0 && !broken_efr(up
)) {
897 DEBUG_AUTOCONF("EFRv2 ");
898 autoconfig_has_efr(up
);
903 * Check for a National Semiconductor SuperIO chip.
904 * Attempt to switch to bank 2, read the value of the LOOP bit
905 * from EXCR1. Switch back to bank 0, change it in MCR. Then
906 * switch back to bank 2, read it from EXCR1 again and check
907 * it's changed. If so, set baud_base in EXCR2 to 921600. -- dwmw2
909 serial_out(up
, UART_LCR
, 0);
910 status1
= serial_in(up
, UART_MCR
);
911 serial_out(up
, UART_LCR
, 0xE0);
912 status2
= serial_in(up
, 0x02); /* EXCR1 */
914 if (!((status2
^ status1
) & UART_MCR_LOOP
)) {
915 serial_out(up
, UART_LCR
, 0);
916 serial_out(up
, UART_MCR
, status1
^ UART_MCR_LOOP
);
917 serial_out(up
, UART_LCR
, 0xE0);
918 status2
= serial_in(up
, 0x02); /* EXCR1 */
919 serial_out(up
, UART_LCR
, 0);
920 serial_out(up
, UART_MCR
, status1
);
922 if ((status2
^ status1
) & UART_MCR_LOOP
) {
925 serial_out(up
, UART_LCR
, 0xE0);
927 quot
= serial_dl_read(up
);
930 if (ns16550a_goto_highspeed(up
))
931 serial_dl_write(up
, quot
);
933 serial_out(up
, UART_LCR
, 0);
935 up
->port
.uartclk
= 921600*16;
936 up
->port
.type
= PORT_NS16550A
;
937 up
->capabilities
|= UART_NATSEMI
;
943 * No EFR. Try to detect a TI16750, which only sets bit 5 of
944 * the IIR when 64 byte FIFO mode is enabled when DLAB is set.
945 * Try setting it with and without DLAB set. Cheap clones
946 * set bit 5 without DLAB set.
948 serial_out(up
, UART_LCR
, 0);
949 serial_out(up
, UART_FCR
, UART_FCR_ENABLE_FIFO
| UART_FCR7_64BYTE
);
950 status1
= serial_in(up
, UART_IIR
) >> 5;
951 serial_out(up
, UART_FCR
, UART_FCR_ENABLE_FIFO
);
952 serial_out(up
, UART_LCR
, UART_LCR_CONF_MODE_A
);
953 serial_out(up
, UART_FCR
, UART_FCR_ENABLE_FIFO
| UART_FCR7_64BYTE
);
954 status2
= serial_in(up
, UART_IIR
) >> 5;
955 serial_out(up
, UART_FCR
, UART_FCR_ENABLE_FIFO
);
956 serial_out(up
, UART_LCR
, 0);
958 DEBUG_AUTOCONF("iir1=%d iir2=%d ", status1
, status2
);
960 if (status1
== 6 && status2
== 7) {
961 up
->port
.type
= PORT_16750
;
962 up
->capabilities
|= UART_CAP_AFE
| UART_CAP_SLEEP
;
967 * Try writing and reading the UART_IER_UUE bit (b6).
968 * If it works, this is probably one of the Xscale platform's
970 * We're going to explicitly set the UUE bit to 0 before
971 * trying to write and read a 1 just to make sure it's not
972 * already a 1 and maybe locked there before we even start start.
974 iersave
= serial_in(up
, UART_IER
);
975 serial_out(up
, UART_IER
, iersave
& ~UART_IER_UUE
);
976 if (!(serial_in(up
, UART_IER
) & UART_IER_UUE
)) {
978 * OK it's in a known zero state, try writing and reading
979 * without disturbing the current state of the other bits.
981 serial_out(up
, UART_IER
, iersave
| UART_IER_UUE
);
982 if (serial_in(up
, UART_IER
) & UART_IER_UUE
) {
985 * We'll leave the UART_IER_UUE bit set to 1 (enabled).
987 DEBUG_AUTOCONF("Xscale ");
988 up
->port
.type
= PORT_XSCALE
;
989 up
->capabilities
|= UART_CAP_UUE
| UART_CAP_RTOIE
;
994 * If we got here we couldn't force the IER_UUE bit to 0.
995 * Log it and continue.
997 DEBUG_AUTOCONF("Couldn't force IER_UUE to 0 ");
999 serial_out(up
, UART_IER
, iersave
);
1002 * Exar uarts have EFR in a weird location
1004 if (up
->port
.flags
& UPF_EXAR_EFR
) {
1005 up
->port
.type
= PORT_XR17D15X
;
1006 up
->capabilities
|= UART_CAP_AFE
| UART_CAP_EFR
;
1010 * We distinguish between 16550A and U6 16550A by counting
1011 * how many bytes are in the FIFO.
1013 if (up
->port
.type
== PORT_16550A
&& size_fifo(up
) == 64) {
1014 up
->port
.type
= PORT_U6_16550A
;
1015 up
->capabilities
|= UART_CAP_AFE
;
1020 * This routine is called by rs_init() to initialize a specific serial
1021 * port. It determines what type of UART chip this serial port is
1022 * using: 8250, 16450, 16550, 16550A. The important question is
1023 * whether or not this UART is a 16550A or not, since this will
1024 * determine whether or not we can use its FIFO features or not.
1026 static void autoconfig(struct uart_8250_port
*up
, unsigned int probeflags
)
1028 unsigned char status1
, scratch
, scratch2
, scratch3
;
1029 unsigned char save_lcr
, save_mcr
;
1030 struct uart_port
*port
= &up
->port
;
1031 unsigned long flags
;
1033 if (!port
->iobase
&& !port
->mapbase
&& !port
->membase
)
1036 DEBUG_AUTOCONF("ttyS%d: autoconf (0x%04lx, 0x%p): ",
1037 serial_index(port
), port
->iobase
, port
->membase
);
1040 * We really do need global IRQs disabled here - we're going to
1041 * be frobbing the chips IRQ enable register to see if it exists.
1043 spin_lock_irqsave(&port
->lock
, flags
);
1045 up
->capabilities
= 0;
1048 if (!(port
->flags
& UPF_BUGGY_UART
)) {
1050 * Do a simple existence test first; if we fail this,
1051 * there's no point trying anything else.
1053 * 0x80 is used as a nonsense port to prevent against
1054 * false positives due to ISA bus float. The
1055 * assumption is that 0x80 is a non-existent port;
1056 * which should be safe since include/asm/io.h also
1057 * makes this assumption.
1059 * Note: this is safe as long as MCR bit 4 is clear
1060 * and the device is in "PC" mode.
1062 scratch
= serial_in(up
, UART_IER
);
1063 serial_out(up
, UART_IER
, 0);
1068 * Mask out IER[7:4] bits for test as some UARTs (e.g. TL
1069 * 16C754B) allow only to modify them if an EFR bit is set.
1071 scratch2
= serial_in(up
, UART_IER
) & 0x0f;
1072 serial_out(up
, UART_IER
, 0x0F);
1076 scratch3
= serial_in(up
, UART_IER
) & 0x0f;
1077 serial_out(up
, UART_IER
, scratch
);
1078 if (scratch2
!= 0 || scratch3
!= 0x0F) {
1080 * We failed; there's nothing here
1082 DEBUG_AUTOCONF("IER test failed (%02x, %02x) ",
1083 scratch2
, scratch3
);
1088 save_mcr
= serial_in(up
, UART_MCR
);
1089 save_lcr
= serial_in(up
, UART_LCR
);
1092 * Check to see if a UART is really there. Certain broken
1093 * internal modems based on the Rockwell chipset fail this
1094 * test, because they apparently don't implement the loopback
1095 * test mode. So this test is skipped on the COM 1 through
1096 * COM 4 ports. This *should* be safe, since no board
1097 * manufacturer would be stupid enough to design a board
1098 * that conflicts with COM 1-4 --- we hope!
1100 if (!(port
->flags
& UPF_SKIP_TEST
)) {
1101 serial_out(up
, UART_MCR
, UART_MCR_LOOP
| 0x0A);
1102 status1
= serial_in(up
, UART_MSR
) & 0xF0;
1103 serial_out(up
, UART_MCR
, save_mcr
);
1104 if (status1
!= 0x90) {
1105 DEBUG_AUTOCONF("LOOP test failed (%02x) ",
1112 * We're pretty sure there's a port here. Lets find out what
1113 * type of port it is. The IIR top two bits allows us to find
1114 * out if it's 8250 or 16450, 16550, 16550A or later. This
1115 * determines what we test for next.
1117 * We also initialise the EFR (if any) to zero for later. The
1118 * EFR occupies the same register location as the FCR and IIR.
1120 serial_out(up
, UART_LCR
, UART_LCR_CONF_MODE_B
);
1121 serial_out(up
, UART_EFR
, 0);
1122 serial_out(up
, UART_LCR
, 0);
1124 serial_out(up
, UART_FCR
, UART_FCR_ENABLE_FIFO
);
1125 scratch
= serial_in(up
, UART_IIR
) >> 6;
1127 DEBUG_AUTOCONF("iir=%d ", scratch
);
1131 autoconfig_8250(up
);
1134 port
->type
= PORT_UNKNOWN
;
1137 port
->type
= PORT_16550
;
1140 autoconfig_16550a(up
);
1144 #ifdef CONFIG_SERIAL_8250_RSA
1146 * Only probe for RSA ports if we got the region.
1148 if (port
->type
== PORT_16550A
&& probeflags
& PROBE_RSA
) {
1151 for (i
= 0 ; i
< probe_rsa_count
; ++i
) {
1152 if (probe_rsa
[i
] == port
->iobase
&& __enable_rsa(up
)) {
1153 port
->type
= PORT_RSA
;
1160 serial_out(up
, UART_LCR
, save_lcr
);
1162 if (up
->capabilities
!= uart_config
[port
->type
].flags
) {
1164 "ttyS%d: detected caps %08x should be %08x\n",
1165 serial_index(port
), up
->capabilities
,
1166 uart_config
[port
->type
].flags
);
1169 port
->fifosize
= uart_config
[up
->port
.type
].fifo_size
;
1170 up
->capabilities
= uart_config
[port
->type
].flags
;
1171 up
->tx_loadsz
= uart_config
[port
->type
].tx_loadsz
;
1173 if (port
->type
== PORT_UNKNOWN
)
1179 #ifdef CONFIG_SERIAL_8250_RSA
1180 if (port
->type
== PORT_RSA
)
1181 serial_out(up
, UART_RSA_FRR
, 0);
1183 serial_out(up
, UART_MCR
, save_mcr
);
1184 serial8250_clear_fifos(up
);
1185 serial_in(up
, UART_RX
);
1186 if (up
->capabilities
& UART_CAP_UUE
)
1187 serial_out(up
, UART_IER
, UART_IER_UUE
);
1189 serial_out(up
, UART_IER
, 0);
1192 spin_unlock_irqrestore(&port
->lock
, flags
);
1193 DEBUG_AUTOCONF("type=%s\n", uart_config
[port
->type
].name
);
1196 static void autoconfig_irq(struct uart_8250_port
*up
)
1198 struct uart_port
*port
= &up
->port
;
1199 unsigned char save_mcr
, save_ier
;
1200 unsigned char save_ICP
= 0;
1201 unsigned int ICP
= 0;
1205 if (port
->flags
& UPF_FOURPORT
) {
1206 ICP
= (port
->iobase
& 0xfe0) | 0x1f;
1207 save_ICP
= inb_p(ICP
);
1212 /* forget possible initially masked and pending IRQ */
1213 probe_irq_off(probe_irq_on());
1214 save_mcr
= serial_in(up
, UART_MCR
);
1215 save_ier
= serial_in(up
, UART_IER
);
1216 serial_out(up
, UART_MCR
, UART_MCR_OUT1
| UART_MCR_OUT2
);
1218 irqs
= probe_irq_on();
1219 serial_out(up
, UART_MCR
, 0);
1221 if (port
->flags
& UPF_FOURPORT
) {
1222 serial_out(up
, UART_MCR
,
1223 UART_MCR_DTR
| UART_MCR_RTS
);
1225 serial_out(up
, UART_MCR
,
1226 UART_MCR_DTR
| UART_MCR_RTS
| UART_MCR_OUT2
);
1228 serial_out(up
, UART_IER
, 0x0f); /* enable all intrs */
1229 serial_in(up
, UART_LSR
);
1230 serial_in(up
, UART_RX
);
1231 serial_in(up
, UART_IIR
);
1232 serial_in(up
, UART_MSR
);
1233 serial_out(up
, UART_TX
, 0xFF);
1235 irq
= probe_irq_off(irqs
);
1237 serial_out(up
, UART_MCR
, save_mcr
);
1238 serial_out(up
, UART_IER
, save_ier
);
1240 if (port
->flags
& UPF_FOURPORT
)
1241 outb_p(save_ICP
, ICP
);
1243 port
->irq
= (irq
> 0) ? irq
: 0;
1246 static inline void __stop_tx(struct uart_8250_port
*p
)
1248 if (p
->ier
& UART_IER_THRI
) {
1249 p
->ier
&= ~UART_IER_THRI
;
1250 serial_out(p
, UART_IER
, p
->ier
);
1254 static void serial8250_stop_tx(struct uart_port
*port
)
1256 struct uart_8250_port
*up
=
1257 container_of(port
, struct uart_8250_port
, port
);
1262 * We really want to stop the transmitter from sending.
1264 if (port
->type
== PORT_16C950
) {
1265 up
->acr
|= UART_ACR_TXDIS
;
1266 serial_icr_write(up
, UART_ACR
, up
->acr
);
1270 static void serial8250_start_tx(struct uart_port
*port
)
1272 struct uart_8250_port
*up
=
1273 container_of(port
, struct uart_8250_port
, port
);
1275 if (!(up
->ier
& UART_IER_THRI
)) {
1276 up
->ier
|= UART_IER_THRI
;
1277 serial_port_out(port
, UART_IER
, up
->ier
);
1279 if (up
->bugs
& UART_BUG_TXEN
) {
1281 lsr
= serial_in(up
, UART_LSR
);
1282 up
->lsr_saved_flags
|= lsr
& LSR_SAVE_FLAGS
;
1283 if ((port
->type
== PORT_RM9000
) ?
1284 (lsr
& UART_LSR_THRE
) :
1285 (lsr
& UART_LSR_TEMT
))
1286 serial8250_tx_chars(up
);
1291 * Re-enable the transmitter if we disabled it.
1293 if (port
->type
== PORT_16C950
&& up
->acr
& UART_ACR_TXDIS
) {
1294 up
->acr
&= ~UART_ACR_TXDIS
;
1295 serial_icr_write(up
, UART_ACR
, up
->acr
);
1299 static void serial8250_stop_rx(struct uart_port
*port
)
1301 struct uart_8250_port
*up
=
1302 container_of(port
, struct uart_8250_port
, port
);
1304 up
->ier
&= ~UART_IER_RLSI
;
1305 up
->port
.read_status_mask
&= ~UART_LSR_DR
;
1306 serial_port_out(port
, UART_IER
, up
->ier
);
1309 static void serial8250_enable_ms(struct uart_port
*port
)
1311 struct uart_8250_port
*up
=
1312 container_of(port
, struct uart_8250_port
, port
);
1314 /* no MSR capabilities */
1315 if (up
->bugs
& UART_BUG_NOMSR
)
1318 up
->ier
|= UART_IER_MSI
;
1319 serial_port_out(port
, UART_IER
, up
->ier
);
1323 * serial8250_rx_chars: processes according to the passed in LSR
1324 * value, and returns the remaining LSR bits not handled
1325 * by this Rx routine.
1328 serial8250_rx_chars(struct uart_8250_port
*up
, unsigned char lsr
)
1330 struct uart_port
*port
= &up
->port
;
1331 struct tty_struct
*tty
= port
->state
->port
.tty
;
1333 int max_count
= 256;
1337 if (likely(lsr
& UART_LSR_DR
))
1338 ch
= serial_in(up
, UART_RX
);
1341 * Intel 82571 has a Serial Over Lan device that will
1342 * set UART_LSR_BI without setting UART_LSR_DR when
1343 * it receives a break. To avoid reading from the
1344 * receive buffer without UART_LSR_DR bit set, we
1345 * just force the read character to be 0
1352 lsr
|= up
->lsr_saved_flags
;
1353 up
->lsr_saved_flags
= 0;
1355 if (unlikely(lsr
& UART_LSR_BRK_ERROR_BITS
)) {
1356 if (lsr
& UART_LSR_BI
) {
1357 lsr
&= ~(UART_LSR_FE
| UART_LSR_PE
);
1360 * We do the SysRQ and SAK checking
1361 * here because otherwise the break
1362 * may get masked by ignore_status_mask
1363 * or read_status_mask.
1365 if (uart_handle_break(port
))
1367 } else if (lsr
& UART_LSR_PE
)
1368 port
->icount
.parity
++;
1369 else if (lsr
& UART_LSR_FE
)
1370 port
->icount
.frame
++;
1371 if (lsr
& UART_LSR_OE
)
1372 port
->icount
.overrun
++;
1375 * Mask off conditions which should be ignored.
1377 lsr
&= port
->read_status_mask
;
1379 if (lsr
& UART_LSR_BI
) {
1380 DEBUG_INTR("handling break....");
1382 } else if (lsr
& UART_LSR_PE
)
1384 else if (lsr
& UART_LSR_FE
)
1387 if (uart_handle_sysrq_char(port
, ch
))
1390 uart_insert_char(port
, lsr
, UART_LSR_OE
, ch
, flag
);
1393 lsr
= serial_in(up
, UART_LSR
);
1394 } while ((lsr
& (UART_LSR_DR
| UART_LSR_BI
)) && (max_count
-- > 0));
1395 spin_unlock(&port
->lock
);
1396 tty_flip_buffer_push(tty
);
1397 spin_lock(&port
->lock
);
1400 EXPORT_SYMBOL_GPL(serial8250_rx_chars
);
1402 void serial8250_tx_chars(struct uart_8250_port
*up
)
1404 struct uart_port
*port
= &up
->port
;
1405 struct circ_buf
*xmit
= &port
->state
->xmit
;
1409 serial_out(up
, UART_TX
, port
->x_char
);
1414 if (uart_tx_stopped(port
)) {
1415 serial8250_stop_tx(port
);
1418 if (uart_circ_empty(xmit
)) {
1423 count
= up
->tx_loadsz
;
1425 serial_out(up
, UART_TX
, xmit
->buf
[xmit
->tail
]);
1426 xmit
->tail
= (xmit
->tail
+ 1) & (UART_XMIT_SIZE
- 1);
1428 if (uart_circ_empty(xmit
))
1430 } while (--count
> 0);
1432 if (uart_circ_chars_pending(xmit
) < WAKEUP_CHARS
)
1433 uart_write_wakeup(port
);
1435 DEBUG_INTR("THRE...");
1437 if (uart_circ_empty(xmit
))
1440 EXPORT_SYMBOL_GPL(serial8250_tx_chars
);
1442 unsigned int serial8250_modem_status(struct uart_8250_port
*up
)
1444 struct uart_port
*port
= &up
->port
;
1445 unsigned int status
= serial_in(up
, UART_MSR
);
1447 status
|= up
->msr_saved_flags
;
1448 up
->msr_saved_flags
= 0;
1449 if (status
& UART_MSR_ANY_DELTA
&& up
->ier
& UART_IER_MSI
&&
1450 port
->state
!= NULL
) {
1451 if (status
& UART_MSR_TERI
)
1453 if (status
& UART_MSR_DDSR
)
1455 if (status
& UART_MSR_DDCD
)
1456 uart_handle_dcd_change(port
, status
& UART_MSR_DCD
);
1457 if (status
& UART_MSR_DCTS
)
1458 uart_handle_cts_change(port
, status
& UART_MSR_CTS
);
1460 wake_up_interruptible(&port
->state
->port
.delta_msr_wait
);
1465 EXPORT_SYMBOL_GPL(serial8250_modem_status
);
1468 * This handles the interrupt from one port.
1470 int serial8250_handle_irq(struct uart_port
*port
, unsigned int iir
)
1472 unsigned char status
;
1473 unsigned long flags
;
1474 struct uart_8250_port
*up
=
1475 container_of(port
, struct uart_8250_port
, port
);
1477 if (iir
& UART_IIR_NO_INT
)
1480 spin_lock_irqsave(&port
->lock
, flags
);
1482 status
= serial_port_in(port
, UART_LSR
);
1484 DEBUG_INTR("status = %x...", status
);
1486 if (status
& (UART_LSR_DR
| UART_LSR_BI
))
1487 status
= serial8250_rx_chars(up
, status
);
1488 serial8250_modem_status(up
);
1489 if (status
& UART_LSR_THRE
)
1490 serial8250_tx_chars(up
);
1492 spin_unlock_irqrestore(&port
->lock
, flags
);
1495 EXPORT_SYMBOL_GPL(serial8250_handle_irq
);
1497 static int serial8250_default_handle_irq(struct uart_port
*port
)
1499 unsigned int iir
= serial_port_in(port
, UART_IIR
);
1501 return serial8250_handle_irq(port
, iir
);
1505 * This is the serial driver's interrupt routine.
1507 * Arjan thinks the old way was overly complex, so it got simplified.
1508 * Alan disagrees, saying that need the complexity to handle the weird
1509 * nature of ISA shared interrupts. (This is a special exception.)
1511 * In order to handle ISA shared interrupts properly, we need to check
1512 * that all ports have been serviced, and therefore the ISA interrupt
1513 * line has been de-asserted.
1515 * This means we need to loop through all ports. checking that they
1516 * don't have an interrupt pending.
1518 static irqreturn_t
serial8250_interrupt(int irq
, void *dev_id
)
1520 struct irq_info
*i
= dev_id
;
1521 struct list_head
*l
, *end
= NULL
;
1522 int pass_counter
= 0, handled
= 0;
1524 DEBUG_INTR("serial8250_interrupt(%d)...", irq
);
1526 spin_lock(&i
->lock
);
1530 struct uart_8250_port
*up
;
1531 struct uart_port
*port
;
1533 up
= list_entry(l
, struct uart_8250_port
, list
);
1536 if (port
->handle_irq(port
)) {
1539 } else if (end
== NULL
)
1544 if (l
== i
->head
&& pass_counter
++ > PASS_LIMIT
) {
1545 /* If we hit this, we're dead. */
1546 printk_ratelimited(KERN_ERR
1547 "serial8250: too much work for irq%d\n", irq
);
1552 spin_unlock(&i
->lock
);
1554 DEBUG_INTR("end.\n");
1556 return IRQ_RETVAL(handled
);
1560 * To support ISA shared interrupts, we need to have one interrupt
1561 * handler that ensures that the IRQ line has been deasserted
1562 * before returning. Failing to do this will result in the IRQ
1563 * line being stuck active, and, since ISA irqs are edge triggered,
1564 * no more IRQs will be seen.
1566 static void serial_do_unlink(struct irq_info
*i
, struct uart_8250_port
*up
)
1568 spin_lock_irq(&i
->lock
);
1570 if (!list_empty(i
->head
)) {
1571 if (i
->head
== &up
->list
)
1572 i
->head
= i
->head
->next
;
1573 list_del(&up
->list
);
1575 BUG_ON(i
->head
!= &up
->list
);
1578 spin_unlock_irq(&i
->lock
);
1579 /* List empty so throw away the hash node */
1580 if (i
->head
== NULL
) {
1581 hlist_del(&i
->node
);
1586 static int serial_link_irq_chain(struct uart_8250_port
*up
)
1588 struct hlist_head
*h
;
1589 struct hlist_node
*n
;
1591 int ret
, irq_flags
= up
->port
.flags
& UPF_SHARE_IRQ
? IRQF_SHARED
: 0;
1593 mutex_lock(&hash_mutex
);
1595 h
= &irq_lists
[up
->port
.irq
% NR_IRQ_HASH
];
1597 hlist_for_each(n
, h
) {
1598 i
= hlist_entry(n
, struct irq_info
, node
);
1599 if (i
->irq
== up
->port
.irq
)
1604 i
= kzalloc(sizeof(struct irq_info
), GFP_KERNEL
);
1606 mutex_unlock(&hash_mutex
);
1609 spin_lock_init(&i
->lock
);
1610 i
->irq
= up
->port
.irq
;
1611 hlist_add_head(&i
->node
, h
);
1613 mutex_unlock(&hash_mutex
);
1615 spin_lock_irq(&i
->lock
);
1618 list_add(&up
->list
, i
->head
);
1619 spin_unlock_irq(&i
->lock
);
1623 INIT_LIST_HEAD(&up
->list
);
1624 i
->head
= &up
->list
;
1625 spin_unlock_irq(&i
->lock
);
1626 irq_flags
|= up
->port
.irqflags
;
1627 ret
= request_irq(up
->port
.irq
, serial8250_interrupt
,
1628 irq_flags
, "serial", i
);
1630 serial_do_unlink(i
, up
);
1636 static void serial_unlink_irq_chain(struct uart_8250_port
*up
)
1639 struct hlist_node
*n
;
1640 struct hlist_head
*h
;
1642 mutex_lock(&hash_mutex
);
1644 h
= &irq_lists
[up
->port
.irq
% NR_IRQ_HASH
];
1646 hlist_for_each(n
, h
) {
1647 i
= hlist_entry(n
, struct irq_info
, node
);
1648 if (i
->irq
== up
->port
.irq
)
1653 BUG_ON(i
->head
== NULL
);
1655 if (list_empty(i
->head
))
1656 free_irq(up
->port
.irq
, i
);
1658 serial_do_unlink(i
, up
);
1659 mutex_unlock(&hash_mutex
);
1663 * This function is used to handle ports that do not have an
1664 * interrupt. This doesn't work very well for 16450's, but gives
1665 * barely passable results for a 16550A. (Although at the expense
1666 * of much CPU overhead).
1668 static void serial8250_timeout(unsigned long data
)
1670 struct uart_8250_port
*up
= (struct uart_8250_port
*)data
;
1672 up
->port
.handle_irq(&up
->port
);
1673 mod_timer(&up
->timer
, jiffies
+ uart_poll_timeout(&up
->port
));
1676 static void serial8250_backup_timeout(unsigned long data
)
1678 struct uart_8250_port
*up
= (struct uart_8250_port
*)data
;
1679 unsigned int iir
, ier
= 0, lsr
;
1680 unsigned long flags
;
1682 spin_lock_irqsave(&up
->port
.lock
, flags
);
1685 * Must disable interrupts or else we risk racing with the interrupt
1689 ier
= serial_in(up
, UART_IER
);
1690 serial_out(up
, UART_IER
, 0);
1693 iir
= serial_in(up
, UART_IIR
);
1696 * This should be a safe test for anyone who doesn't trust the
1697 * IIR bits on their UART, but it's specifically designed for
1698 * the "Diva" UART used on the management processor on many HP
1699 * ia64 and parisc boxes.
1701 lsr
= serial_in(up
, UART_LSR
);
1702 up
->lsr_saved_flags
|= lsr
& LSR_SAVE_FLAGS
;
1703 if ((iir
& UART_IIR_NO_INT
) && (up
->ier
& UART_IER_THRI
) &&
1704 (!uart_circ_empty(&up
->port
.state
->xmit
) || up
->port
.x_char
) &&
1705 (lsr
& UART_LSR_THRE
)) {
1706 iir
&= ~(UART_IIR_ID
| UART_IIR_NO_INT
);
1707 iir
|= UART_IIR_THRI
;
1710 if (!(iir
& UART_IIR_NO_INT
))
1711 serial8250_tx_chars(up
);
1714 serial_out(up
, UART_IER
, ier
);
1716 spin_unlock_irqrestore(&up
->port
.lock
, flags
);
1718 /* Standard timer interval plus 0.2s to keep the port running */
1719 mod_timer(&up
->timer
,
1720 jiffies
+ uart_poll_timeout(&up
->port
) + HZ
/ 5);
1723 static unsigned int serial8250_tx_empty(struct uart_port
*port
)
1725 struct uart_8250_port
*up
=
1726 container_of(port
, struct uart_8250_port
, port
);
1727 unsigned long flags
;
1730 spin_lock_irqsave(&port
->lock
, flags
);
1731 lsr
= serial_port_in(port
, UART_LSR
);
1732 up
->lsr_saved_flags
|= lsr
& LSR_SAVE_FLAGS
;
1733 spin_unlock_irqrestore(&port
->lock
, flags
);
1735 return (lsr
& BOTH_EMPTY
) == BOTH_EMPTY
? TIOCSER_TEMT
: 0;
1738 static unsigned int serial8250_get_mctrl(struct uart_port
*port
)
1740 struct uart_8250_port
*up
=
1741 container_of(port
, struct uart_8250_port
, port
);
1742 unsigned int status
;
1745 status
= serial8250_modem_status(up
);
1748 if (status
& UART_MSR_DCD
)
1750 if (status
& UART_MSR_RI
)
1752 if (status
& UART_MSR_DSR
)
1754 if (status
& UART_MSR_CTS
)
1759 static void serial8250_set_mctrl(struct uart_port
*port
, unsigned int mctrl
)
1761 struct uart_8250_port
*up
=
1762 container_of(port
, struct uart_8250_port
, port
);
1763 unsigned char mcr
= 0;
1765 if (mctrl
& TIOCM_RTS
)
1766 mcr
|= UART_MCR_RTS
;
1767 if (mctrl
& TIOCM_DTR
)
1768 mcr
|= UART_MCR_DTR
;
1769 if (mctrl
& TIOCM_OUT1
)
1770 mcr
|= UART_MCR_OUT1
;
1771 if (mctrl
& TIOCM_OUT2
)
1772 mcr
|= UART_MCR_OUT2
;
1773 if (mctrl
& TIOCM_LOOP
)
1774 mcr
|= UART_MCR_LOOP
;
1776 mcr
= (mcr
& up
->mcr_mask
) | up
->mcr_force
| up
->mcr
;
1778 serial_port_out(port
, UART_MCR
, mcr
);
1781 static void serial8250_break_ctl(struct uart_port
*port
, int break_state
)
1783 struct uart_8250_port
*up
=
1784 container_of(port
, struct uart_8250_port
, port
);
1785 unsigned long flags
;
1787 spin_lock_irqsave(&port
->lock
, flags
);
1788 if (break_state
== -1)
1789 up
->lcr
|= UART_LCR_SBC
;
1791 up
->lcr
&= ~UART_LCR_SBC
;
1792 serial_port_out(port
, UART_LCR
, up
->lcr
);
1793 spin_unlock_irqrestore(&port
->lock
, flags
);
1797 * Wait for transmitter & holding register to empty
1799 static void wait_for_xmitr(struct uart_8250_port
*up
, int bits
)
1801 unsigned int status
, tmout
= 10000;
1803 /* Wait up to 10ms for the character(s) to be sent. */
1805 status
= serial_in(up
, UART_LSR
);
1807 up
->lsr_saved_flags
|= status
& LSR_SAVE_FLAGS
;
1809 if ((status
& bits
) == bits
)
1816 /* Wait up to 1s for flow control if necessary */
1817 if (up
->port
.flags
& UPF_CONS_FLOW
) {
1819 for (tmout
= 1000000; tmout
; tmout
--) {
1820 unsigned int msr
= serial_in(up
, UART_MSR
);
1821 up
->msr_saved_flags
|= msr
& MSR_SAVE_FLAGS
;
1822 if (msr
& UART_MSR_CTS
)
1825 touch_nmi_watchdog();
1830 #ifdef CONFIG_CONSOLE_POLL
1832 * Console polling routines for writing and reading from the uart while
1833 * in an interrupt or debug context.
1836 static int serial8250_get_poll_char(struct uart_port
*port
)
1838 unsigned char lsr
= serial_port_in(port
, UART_LSR
);
1840 if (!(lsr
& UART_LSR_DR
))
1841 return NO_POLL_CHAR
;
1843 return serial_port_in(port
, UART_RX
);
1847 static void serial8250_put_poll_char(struct uart_port
*port
,
1851 struct uart_8250_port
*up
=
1852 container_of(port
, struct uart_8250_port
, port
);
1855 * First save the IER then disable the interrupts
1857 ier
= serial_port_in(port
, UART_IER
);
1858 if (up
->capabilities
& UART_CAP_UUE
)
1859 serial_port_out(port
, UART_IER
, UART_IER_UUE
);
1861 serial_port_out(port
, UART_IER
, 0);
1863 wait_for_xmitr(up
, BOTH_EMPTY
);
1865 * Send the character out.
1866 * If a LF, also do CR...
1868 serial_port_out(port
, UART_TX
, c
);
1870 wait_for_xmitr(up
, BOTH_EMPTY
);
1871 serial_port_out(port
, UART_TX
, 13);
1875 * Finally, wait for transmitter to become empty
1876 * and restore the IER
1878 wait_for_xmitr(up
, BOTH_EMPTY
);
1879 serial_port_out(port
, UART_IER
, ier
);
1882 #endif /* CONFIG_CONSOLE_POLL */
1884 static int serial8250_startup(struct uart_port
*port
)
1886 struct uart_8250_port
*up
=
1887 container_of(port
, struct uart_8250_port
, port
);
1888 unsigned long flags
;
1889 unsigned char lsr
, iir
;
1892 port
->fifosize
= uart_config
[up
->port
.type
].fifo_size
;
1893 up
->tx_loadsz
= uart_config
[up
->port
.type
].tx_loadsz
;
1894 up
->capabilities
= uart_config
[up
->port
.type
].flags
;
1897 if (port
->iotype
!= up
->cur_iotype
)
1898 set_io_from_upio(port
);
1900 if (port
->type
== PORT_16C950
) {
1901 /* Wake up and initialize UART */
1903 serial_port_out(port
, UART_LCR
, UART_LCR_CONF_MODE_B
);
1904 serial_port_out(port
, UART_EFR
, UART_EFR_ECB
);
1905 serial_port_out(port
, UART_IER
, 0);
1906 serial_port_out(port
, UART_LCR
, 0);
1907 serial_icr_write(up
, UART_CSR
, 0); /* Reset the UART */
1908 serial_port_out(port
, UART_LCR
, UART_LCR_CONF_MODE_B
);
1909 serial_port_out(port
, UART_EFR
, UART_EFR_ECB
);
1910 serial_port_out(port
, UART_LCR
, 0);
1913 #ifdef CONFIG_SERIAL_8250_RSA
1915 * If this is an RSA port, see if we can kick it up to the
1916 * higher speed clock.
1922 * Clear the FIFO buffers and disable them.
1923 * (they will be reenabled in set_termios())
1925 serial8250_clear_fifos(up
);
1928 * Clear the interrupt registers.
1930 serial_port_in(port
, UART_LSR
);
1931 serial_port_in(port
, UART_RX
);
1932 serial_port_in(port
, UART_IIR
);
1933 serial_port_in(port
, UART_MSR
);
1936 * At this point, there's no way the LSR could still be 0xff;
1937 * if it is, then bail out, because there's likely no UART
1940 if (!(port
->flags
& UPF_BUGGY_UART
) &&
1941 (serial_port_in(port
, UART_LSR
) == 0xff)) {
1942 printk_ratelimited(KERN_INFO
"ttyS%d: LSR safety check engaged!\n",
1943 serial_index(port
));
1948 * For a XR16C850, we need to set the trigger levels
1950 if (port
->type
== PORT_16850
) {
1953 serial_out(up
, UART_LCR
, UART_LCR_CONF_MODE_B
);
1955 fctr
= serial_in(up
, UART_FCTR
) & ~(UART_FCTR_RX
|UART_FCTR_TX
);
1956 serial_port_out(port
, UART_FCTR
,
1957 fctr
| UART_FCTR_TRGD
| UART_FCTR_RX
);
1958 serial_port_out(port
, UART_TRG
, UART_TRG_96
);
1959 serial_port_out(port
, UART_FCTR
,
1960 fctr
| UART_FCTR_TRGD
| UART_FCTR_TX
);
1961 serial_port_out(port
, UART_TRG
, UART_TRG_96
);
1963 serial_port_out(port
, UART_LCR
, 0);
1969 * Test for UARTs that do not reassert THRE when the
1970 * transmitter is idle and the interrupt has already
1971 * been cleared. Real 16550s should always reassert
1972 * this interrupt whenever the transmitter is idle and
1973 * the interrupt is enabled. Delays are necessary to
1974 * allow register changes to become visible.
1976 spin_lock_irqsave(&port
->lock
, flags
);
1977 if (up
->port
.irqflags
& IRQF_SHARED
)
1978 disable_irq_nosync(port
->irq
);
1980 wait_for_xmitr(up
, UART_LSR_THRE
);
1981 serial_port_out_sync(port
, UART_IER
, UART_IER_THRI
);
1982 udelay(1); /* allow THRE to set */
1983 iir1
= serial_port_in(port
, UART_IIR
);
1984 serial_port_out(port
, UART_IER
, 0);
1985 serial_port_out_sync(port
, UART_IER
, UART_IER_THRI
);
1986 udelay(1); /* allow a working UART time to re-assert THRE */
1987 iir
= serial_port_in(port
, UART_IIR
);
1988 serial_port_out(port
, UART_IER
, 0);
1990 if (port
->irqflags
& IRQF_SHARED
)
1991 enable_irq(port
->irq
);
1992 spin_unlock_irqrestore(&port
->lock
, flags
);
1995 * If the interrupt is not reasserted, or we otherwise
1996 * don't trust the iir, setup a timer to kick the UART
1997 * on a regular basis.
1999 if ((!(iir1
& UART_IIR_NO_INT
) && (iir
& UART_IIR_NO_INT
)) ||
2000 up
->port
.flags
& UPF_BUG_THRE
) {
2001 up
->bugs
|= UART_BUG_THRE
;
2002 pr_debug("ttyS%d - using backup timer\n",
2003 serial_index(port
));
2008 * The above check will only give an accurate result the first time
2009 * the port is opened so this value needs to be preserved.
2011 if (up
->bugs
& UART_BUG_THRE
) {
2012 up
->timer
.function
= serial8250_backup_timeout
;
2013 up
->timer
.data
= (unsigned long)up
;
2014 mod_timer(&up
->timer
, jiffies
+
2015 uart_poll_timeout(port
) + HZ
/ 5);
2019 * If the "interrupt" for this port doesn't correspond with any
2020 * hardware interrupt, we use a timer-based system. The original
2021 * driver used to do this with IRQ0.
2024 up
->timer
.data
= (unsigned long)up
;
2025 mod_timer(&up
->timer
, jiffies
+ uart_poll_timeout(port
));
2027 retval
= serial_link_irq_chain(up
);
2033 * Now, initialize the UART
2035 serial_port_out(port
, UART_LCR
, UART_LCR_WLEN8
);
2037 spin_lock_irqsave(&port
->lock
, flags
);
2038 if (up
->port
.flags
& UPF_FOURPORT
) {
2040 up
->port
.mctrl
|= TIOCM_OUT1
;
2043 * Most PC uarts need OUT2 raised to enable interrupts.
2046 up
->port
.mctrl
|= TIOCM_OUT2
;
2048 serial8250_set_mctrl(port
, port
->mctrl
);
2050 /* Serial over Lan (SoL) hack:
2051 Intel 8257x Gigabit ethernet chips have a
2052 16550 emulation, to be used for Serial Over Lan.
2053 Those chips take a longer time than a normal
2054 serial device to signalize that a transmission
2055 data was queued. Due to that, the above test generally
2056 fails. One solution would be to delay the reading of
2057 iir. However, this is not reliable, since the timeout
2058 is variable. So, let's just don't test if we receive
2059 TX irq. This way, we'll never enable UART_BUG_TXEN.
2061 if (skip_txen_test
|| up
->port
.flags
& UPF_NO_TXEN_TEST
)
2062 goto dont_test_tx_en
;
2065 * Do a quick test to see if we receive an
2066 * interrupt when we enable the TX irq.
2068 serial_port_out(port
, UART_IER
, UART_IER_THRI
);
2069 lsr
= serial_port_in(port
, UART_LSR
);
2070 iir
= serial_port_in(port
, UART_IIR
);
2071 serial_port_out(port
, UART_IER
, 0);
2073 if (lsr
& UART_LSR_TEMT
&& iir
& UART_IIR_NO_INT
) {
2074 if (!(up
->bugs
& UART_BUG_TXEN
)) {
2075 up
->bugs
|= UART_BUG_TXEN
;
2076 pr_debug("ttyS%d - enabling bad tx status workarounds\n",
2077 serial_index(port
));
2080 up
->bugs
&= ~UART_BUG_TXEN
;
2084 spin_unlock_irqrestore(&port
->lock
, flags
);
2087 * Clear the interrupt registers again for luck, and clear the
2088 * saved flags to avoid getting false values from polling
2089 * routines or the previous session.
2091 serial_port_in(port
, UART_LSR
);
2092 serial_port_in(port
, UART_RX
);
2093 serial_port_in(port
, UART_IIR
);
2094 serial_port_in(port
, UART_MSR
);
2095 up
->lsr_saved_flags
= 0;
2096 up
->msr_saved_flags
= 0;
2099 * Finally, enable interrupts. Note: Modem status interrupts
2100 * are set via set_termios(), which will be occurring imminently
2101 * anyway, so we don't enable them here.
2103 up
->ier
= UART_IER_RLSI
| UART_IER_RDI
;
2104 serial_port_out(port
, UART_IER
, up
->ier
);
2106 if (port
->flags
& UPF_FOURPORT
) {
2109 * Enable interrupts on the AST Fourport board
2111 icp
= (port
->iobase
& 0xfe0) | 0x01f;
2119 static void serial8250_shutdown(struct uart_port
*port
)
2121 struct uart_8250_port
*up
=
2122 container_of(port
, struct uart_8250_port
, port
);
2123 unsigned long flags
;
2126 * Disable interrupts from this port
2129 serial_port_out(port
, UART_IER
, 0);
2131 spin_lock_irqsave(&port
->lock
, flags
);
2132 if (port
->flags
& UPF_FOURPORT
) {
2133 /* reset interrupts on the AST Fourport board */
2134 inb((port
->iobase
& 0xfe0) | 0x1f);
2135 port
->mctrl
|= TIOCM_OUT1
;
2137 port
->mctrl
&= ~TIOCM_OUT2
;
2139 serial8250_set_mctrl(port
, port
->mctrl
);
2140 spin_unlock_irqrestore(&port
->lock
, flags
);
2143 * Disable break condition and FIFOs
2145 serial_port_out(port
, UART_LCR
,
2146 serial_port_in(port
, UART_LCR
) & ~UART_LCR_SBC
);
2147 serial8250_clear_fifos(up
);
2149 #ifdef CONFIG_SERIAL_8250_RSA
2151 * Reset the RSA board back to 115kbps compat mode.
2157 * Read data port to reset things, and then unlink from
2160 serial_port_in(port
, UART_RX
);
2162 del_timer_sync(&up
->timer
);
2163 up
->timer
.function
= serial8250_timeout
;
2165 serial_unlink_irq_chain(up
);
2168 static unsigned int serial8250_get_divisor(struct uart_port
*port
, unsigned int baud
)
2173 * Handle magic divisors for baud rates above baud_base on
2174 * SMSC SuperIO chips.
2176 if ((port
->flags
& UPF_MAGIC_MULTIPLIER
) &&
2177 baud
== (port
->uartclk
/4))
2179 else if ((port
->flags
& UPF_MAGIC_MULTIPLIER
) &&
2180 baud
== (port
->uartclk
/8))
2183 quot
= uart_get_divisor(port
, baud
);
2189 serial8250_do_set_termios(struct uart_port
*port
, struct ktermios
*termios
,
2190 struct ktermios
*old
)
2192 struct uart_8250_port
*up
=
2193 container_of(port
, struct uart_8250_port
, port
);
2194 unsigned char cval
, fcr
= 0;
2195 unsigned long flags
;
2196 unsigned int baud
, quot
;
2198 switch (termios
->c_cflag
& CSIZE
) {
2200 cval
= UART_LCR_WLEN5
;
2203 cval
= UART_LCR_WLEN6
;
2206 cval
= UART_LCR_WLEN7
;
2210 cval
= UART_LCR_WLEN8
;
2214 if (termios
->c_cflag
& CSTOPB
)
2215 cval
|= UART_LCR_STOP
;
2216 if (termios
->c_cflag
& PARENB
)
2217 cval
|= UART_LCR_PARITY
;
2218 if (!(termios
->c_cflag
& PARODD
))
2219 cval
|= UART_LCR_EPAR
;
2221 if (termios
->c_cflag
& CMSPAR
)
2222 cval
|= UART_LCR_SPAR
;
2226 * Ask the core to calculate the divisor for us.
2228 baud
= uart_get_baud_rate(port
, termios
, old
,
2229 port
->uartclk
/ 16 / 0xffff,
2230 port
->uartclk
/ 16);
2231 quot
= serial8250_get_divisor(port
, baud
);
2234 * Oxford Semi 952 rev B workaround
2236 if (up
->bugs
& UART_BUG_QUOT
&& (quot
& 0xff) == 0)
2239 if (up
->capabilities
& UART_CAP_FIFO
&& port
->fifosize
> 1) {
2240 fcr
= uart_config
[port
->type
].fcr
;
2242 fcr
&= ~UART_FCR_TRIGGER_MASK
;
2243 fcr
|= UART_FCR_TRIGGER_1
;
2248 * MCR-based auto flow control. When AFE is enabled, RTS will be
2249 * deasserted when the receive FIFO contains more characters than
2250 * the trigger, or the MCR RTS bit is cleared. In the case where
2251 * the remote UART is not using CTS auto flow control, we must
2252 * have sufficient FIFO entries for the latency of the remote
2253 * UART to respond. IOW, at least 32 bytes of FIFO.
2255 if (up
->capabilities
& UART_CAP_AFE
&& port
->fifosize
>= 32) {
2256 up
->mcr
&= ~UART_MCR_AFE
;
2257 if (termios
->c_cflag
& CRTSCTS
)
2258 up
->mcr
|= UART_MCR_AFE
;
2262 * Ok, we're now changing the port state. Do it with
2263 * interrupts disabled.
2265 spin_lock_irqsave(&port
->lock
, flags
);
2268 * Update the per-port timeout.
2270 uart_update_timeout(port
, termios
->c_cflag
, baud
);
2272 port
->read_status_mask
= UART_LSR_OE
| UART_LSR_THRE
| UART_LSR_DR
;
2273 if (termios
->c_iflag
& INPCK
)
2274 port
->read_status_mask
|= UART_LSR_FE
| UART_LSR_PE
;
2275 if (termios
->c_iflag
& (BRKINT
| PARMRK
))
2276 port
->read_status_mask
|= UART_LSR_BI
;
2279 * Characteres to ignore
2281 port
->ignore_status_mask
= 0;
2282 if (termios
->c_iflag
& IGNPAR
)
2283 port
->ignore_status_mask
|= UART_LSR_PE
| UART_LSR_FE
;
2284 if (termios
->c_iflag
& IGNBRK
) {
2285 port
->ignore_status_mask
|= UART_LSR_BI
;
2287 * If we're ignoring parity and break indicators,
2288 * ignore overruns too (for real raw support).
2290 if (termios
->c_iflag
& IGNPAR
)
2291 port
->ignore_status_mask
|= UART_LSR_OE
;
2295 * ignore all characters if CREAD is not set
2297 if ((termios
->c_cflag
& CREAD
) == 0)
2298 port
->ignore_status_mask
|= UART_LSR_DR
;
2301 * CTS flow control flag and modem status interrupts
2303 up
->ier
&= ~UART_IER_MSI
;
2304 if (!(up
->bugs
& UART_BUG_NOMSR
) &&
2305 UART_ENABLE_MS(&up
->port
, termios
->c_cflag
))
2306 up
->ier
|= UART_IER_MSI
;
2307 if (up
->capabilities
& UART_CAP_UUE
)
2308 up
->ier
|= UART_IER_UUE
;
2309 if (up
->capabilities
& UART_CAP_RTOIE
)
2310 up
->ier
|= UART_IER_RTOIE
;
2312 serial_port_out(port
, UART_IER
, up
->ier
);
2314 if (up
->capabilities
& UART_CAP_EFR
) {
2315 unsigned char efr
= 0;
2317 * TI16C752/Startech hardware flow control. FIXME:
2318 * - TI16C752 requires control thresholds to be set.
2319 * - UART_MCR_RTS is ineffective if auto-RTS mode is enabled.
2321 if (termios
->c_cflag
& CRTSCTS
)
2322 efr
|= UART_EFR_CTS
;
2324 serial_port_out(port
, UART_LCR
, UART_LCR_CONF_MODE_B
);
2325 if (port
->flags
& UPF_EXAR_EFR
)
2326 serial_port_out(port
, UART_XR_EFR
, efr
);
2328 serial_port_out(port
, UART_EFR
, efr
);
2331 #ifdef CONFIG_ARCH_OMAP
2332 /* Workaround to enable 115200 baud on OMAP1510 internal ports */
2333 if (cpu_is_omap1510() && is_omap_port(up
)) {
2334 if (baud
== 115200) {
2336 serial_port_out(port
, UART_OMAP_OSC_12M_SEL
, 1);
2338 serial_port_out(port
, UART_OMAP_OSC_12M_SEL
, 0);
2343 * For NatSemi, switch to bank 2 not bank 1, to avoid resetting EXCR2,
2344 * otherwise just set DLAB
2346 if (up
->capabilities
& UART_NATSEMI
)
2347 serial_port_out(port
, UART_LCR
, 0xe0);
2349 serial_port_out(port
, UART_LCR
, cval
| UART_LCR_DLAB
);
2351 serial_dl_write(up
, quot
);
2354 * LCR DLAB must be set to enable 64-byte FIFO mode. If the FCR
2355 * is written without DLAB set, this mode will be disabled.
2357 if (port
->type
== PORT_16750
)
2358 serial_port_out(port
, UART_FCR
, fcr
);
2360 serial_port_out(port
, UART_LCR
, cval
); /* reset DLAB */
2361 up
->lcr
= cval
; /* Save LCR */
2362 if (port
->type
!= PORT_16750
) {
2363 /* emulated UARTs (Lucent Venus 167x) need two steps */
2364 if (fcr
& UART_FCR_ENABLE_FIFO
)
2365 serial_port_out(port
, UART_FCR
, UART_FCR_ENABLE_FIFO
);
2366 serial_port_out(port
, UART_FCR
, fcr
); /* set fcr */
2368 serial8250_set_mctrl(port
, port
->mctrl
);
2369 spin_unlock_irqrestore(&port
->lock
, flags
);
2370 /* Don't rewrite B0 */
2371 if (tty_termios_baud_rate(termios
))
2372 tty_termios_encode_baud_rate(termios
, baud
, baud
);
2374 EXPORT_SYMBOL(serial8250_do_set_termios
);
2377 serial8250_set_termios(struct uart_port
*port
, struct ktermios
*termios
,
2378 struct ktermios
*old
)
2380 if (port
->set_termios
)
2381 port
->set_termios(port
, termios
, old
);
2383 serial8250_do_set_termios(port
, termios
, old
);
2387 serial8250_set_ldisc(struct uart_port
*port
, int new)
2390 port
->flags
|= UPF_HARDPPS_CD
;
2391 serial8250_enable_ms(port
);
2393 port
->flags
&= ~UPF_HARDPPS_CD
;
2397 void serial8250_do_pm(struct uart_port
*port
, unsigned int state
,
2398 unsigned int oldstate
)
2400 struct uart_8250_port
*p
=
2401 container_of(port
, struct uart_8250_port
, port
);
2403 serial8250_set_sleep(p
, state
!= 0);
2405 EXPORT_SYMBOL(serial8250_do_pm
);
2408 serial8250_pm(struct uart_port
*port
, unsigned int state
,
2409 unsigned int oldstate
)
2412 port
->pm(port
, state
, oldstate
);
2414 serial8250_do_pm(port
, state
, oldstate
);
2417 static unsigned int serial8250_port_size(struct uart_8250_port
*pt
)
2419 if (pt
->port
.iotype
== UPIO_AU
)
2421 #ifdef CONFIG_ARCH_OMAP
2422 if (is_omap_port(pt
))
2423 return 0x16 << pt
->port
.regshift
;
2425 return 8 << pt
->port
.regshift
;
2429 * Resource handling.
2431 static int serial8250_request_std_resource(struct uart_8250_port
*up
)
2433 unsigned int size
= serial8250_port_size(up
);
2434 struct uart_port
*port
= &up
->port
;
2437 switch (port
->iotype
) {
2445 if (!request_mem_region(port
->mapbase
, size
, "serial")) {
2450 if (port
->flags
& UPF_IOREMAP
) {
2451 port
->membase
= ioremap_nocache(port
->mapbase
, size
);
2452 if (!port
->membase
) {
2453 release_mem_region(port
->mapbase
, size
);
2461 if (!request_region(port
->iobase
, size
, "serial"))
2468 static void serial8250_release_std_resource(struct uart_8250_port
*up
)
2470 unsigned int size
= serial8250_port_size(up
);
2471 struct uart_port
*port
= &up
->port
;
2473 switch (port
->iotype
) {
2481 if (port
->flags
& UPF_IOREMAP
) {
2482 iounmap(port
->membase
);
2483 port
->membase
= NULL
;
2486 release_mem_region(port
->mapbase
, size
);
2491 release_region(port
->iobase
, size
);
2496 static int serial8250_request_rsa_resource(struct uart_8250_port
*up
)
2498 unsigned long start
= UART_RSA_BASE
<< up
->port
.regshift
;
2499 unsigned int size
= 8 << up
->port
.regshift
;
2500 struct uart_port
*port
= &up
->port
;
2503 switch (port
->iotype
) {
2506 start
+= port
->iobase
;
2507 if (request_region(start
, size
, "serial-rsa"))
2517 static void serial8250_release_rsa_resource(struct uart_8250_port
*up
)
2519 unsigned long offset
= UART_RSA_BASE
<< up
->port
.regshift
;
2520 unsigned int size
= 8 << up
->port
.regshift
;
2521 struct uart_port
*port
= &up
->port
;
2523 switch (port
->iotype
) {
2526 release_region(port
->iobase
+ offset
, size
);
2531 static void serial8250_release_port(struct uart_port
*port
)
2533 struct uart_8250_port
*up
=
2534 container_of(port
, struct uart_8250_port
, port
);
2536 serial8250_release_std_resource(up
);
2537 if (port
->type
== PORT_RSA
)
2538 serial8250_release_rsa_resource(up
);
2541 static int serial8250_request_port(struct uart_port
*port
)
2543 struct uart_8250_port
*up
=
2544 container_of(port
, struct uart_8250_port
, port
);
2547 ret
= serial8250_request_std_resource(up
);
2548 if (ret
== 0 && port
->type
== PORT_RSA
) {
2549 ret
= serial8250_request_rsa_resource(up
);
2551 serial8250_release_std_resource(up
);
2557 static void serial8250_config_port(struct uart_port
*port
, int flags
)
2559 struct uart_8250_port
*up
=
2560 container_of(port
, struct uart_8250_port
, port
);
2561 int probeflags
= PROBE_ANY
;
2565 * Find the region that we can probe for. This in turn
2566 * tells us whether we can probe for the type of port.
2568 ret
= serial8250_request_std_resource(up
);
2572 ret
= serial8250_request_rsa_resource(up
);
2574 probeflags
&= ~PROBE_RSA
;
2576 if (port
->iotype
!= up
->cur_iotype
)
2577 set_io_from_upio(port
);
2579 if (flags
& UART_CONFIG_TYPE
)
2580 autoconfig(up
, probeflags
);
2582 /* if access method is AU, it is a 16550 with a quirk */
2583 if (port
->type
== PORT_16550A
&& port
->iotype
== UPIO_AU
)
2584 up
->bugs
|= UART_BUG_NOMSR
;
2586 if (port
->type
!= PORT_UNKNOWN
&& flags
& UART_CONFIG_IRQ
)
2589 if (port
->type
!= PORT_RSA
&& probeflags
& PROBE_RSA
)
2590 serial8250_release_rsa_resource(up
);
2591 if (port
->type
== PORT_UNKNOWN
)
2592 serial8250_release_std_resource(up
);
2596 serial8250_verify_port(struct uart_port
*port
, struct serial_struct
*ser
)
2598 if (ser
->irq
>= nr_irqs
|| ser
->irq
< 0 ||
2599 ser
->baud_base
< 9600 || ser
->type
< PORT_UNKNOWN
||
2600 ser
->type
>= ARRAY_SIZE(uart_config
) || ser
->type
== PORT_CIRRUS
||
2601 ser
->type
== PORT_STARTECH
)
2607 serial8250_type(struct uart_port
*port
)
2609 int type
= port
->type
;
2611 if (type
>= ARRAY_SIZE(uart_config
))
2613 return uart_config
[type
].name
;
2616 static struct uart_ops serial8250_pops
= {
2617 .tx_empty
= serial8250_tx_empty
,
2618 .set_mctrl
= serial8250_set_mctrl
,
2619 .get_mctrl
= serial8250_get_mctrl
,
2620 .stop_tx
= serial8250_stop_tx
,
2621 .start_tx
= serial8250_start_tx
,
2622 .stop_rx
= serial8250_stop_rx
,
2623 .enable_ms
= serial8250_enable_ms
,
2624 .break_ctl
= serial8250_break_ctl
,
2625 .startup
= serial8250_startup
,
2626 .shutdown
= serial8250_shutdown
,
2627 .set_termios
= serial8250_set_termios
,
2628 .set_ldisc
= serial8250_set_ldisc
,
2629 .pm
= serial8250_pm
,
2630 .type
= serial8250_type
,
2631 .release_port
= serial8250_release_port
,
2632 .request_port
= serial8250_request_port
,
2633 .config_port
= serial8250_config_port
,
2634 .verify_port
= serial8250_verify_port
,
2635 #ifdef CONFIG_CONSOLE_POLL
2636 .poll_get_char
= serial8250_get_poll_char
,
2637 .poll_put_char
= serial8250_put_poll_char
,
2641 static struct uart_8250_port serial8250_ports
[UART_NR
];
2643 static void (*serial8250_isa_config
)(int port
, struct uart_port
*up
,
2644 unsigned short *capabilities
);
2646 void serial8250_set_isa_configurator(
2647 void (*v
)(int port
, struct uart_port
*up
, unsigned short *capabilities
))
2649 serial8250_isa_config
= v
;
2651 EXPORT_SYMBOL(serial8250_set_isa_configurator
);
2653 static void __init
serial8250_isa_init_ports(void)
2655 struct uart_8250_port
*up
;
2656 static int first
= 1;
2663 for (i
= 0; i
< nr_uarts
; i
++) {
2664 struct uart_8250_port
*up
= &serial8250_ports
[i
];
2665 struct uart_port
*port
= &up
->port
;
2668 spin_lock_init(&port
->lock
);
2670 init_timer(&up
->timer
);
2671 up
->timer
.function
= serial8250_timeout
;
2674 * ALPHA_KLUDGE_MCR needs to be killed.
2676 up
->mcr_mask
= ~ALPHA_KLUDGE_MCR
;
2677 up
->mcr_force
= ALPHA_KLUDGE_MCR
;
2679 port
->ops
= &serial8250_pops
;
2683 irqflag
= IRQF_SHARED
;
2685 for (i
= 0, up
= serial8250_ports
;
2686 i
< ARRAY_SIZE(old_serial_port
) && i
< nr_uarts
;
2688 struct uart_port
*port
= &up
->port
;
2690 port
->iobase
= old_serial_port
[i
].port
;
2691 port
->irq
= irq_canonicalize(old_serial_port
[i
].irq
);
2692 port
->irqflags
= old_serial_port
[i
].irqflags
;
2693 port
->uartclk
= old_serial_port
[i
].baud_base
* 16;
2694 port
->flags
= old_serial_port
[i
].flags
;
2695 port
->hub6
= old_serial_port
[i
].hub6
;
2696 port
->membase
= old_serial_port
[i
].iomem_base
;
2697 port
->iotype
= old_serial_port
[i
].io_type
;
2698 port
->regshift
= old_serial_port
[i
].iomem_reg_shift
;
2699 set_io_from_upio(port
);
2700 port
->irqflags
|= irqflag
;
2701 if (serial8250_isa_config
!= NULL
)
2702 serial8250_isa_config(i
, &up
->port
, &up
->capabilities
);
2708 serial8250_init_fixed_type_port(struct uart_8250_port
*up
, unsigned int type
)
2710 up
->port
.type
= type
;
2711 up
->port
.fifosize
= uart_config
[type
].fifo_size
;
2712 up
->capabilities
= uart_config
[type
].flags
;
2713 up
->tx_loadsz
= uart_config
[type
].tx_loadsz
;
2717 serial8250_register_ports(struct uart_driver
*drv
, struct device
*dev
)
2721 for (i
= 0; i
< nr_uarts
; i
++) {
2722 struct uart_8250_port
*up
= &serial8250_ports
[i
];
2723 up
->cur_iotype
= 0xFF;
2726 serial8250_isa_init_ports();
2728 for (i
= 0; i
< nr_uarts
; i
++) {
2729 struct uart_8250_port
*up
= &serial8250_ports
[i
];
2733 if (up
->port
.flags
& UPF_FIXED_TYPE
)
2734 serial8250_init_fixed_type_port(up
, up
->port
.type
);
2736 uart_add_one_port(drv
, &up
->port
);
2740 #ifdef CONFIG_SERIAL_8250_CONSOLE
2742 static void serial8250_console_putchar(struct uart_port
*port
, int ch
)
2744 struct uart_8250_port
*up
=
2745 container_of(port
, struct uart_8250_port
, port
);
2747 wait_for_xmitr(up
, UART_LSR_THRE
);
2748 serial_port_out(port
, UART_TX
, ch
);
2752 * Print a string to the serial port trying not to disturb
2753 * any possible real use of the port...
2755 * The console_lock must be held when we get here.
2758 serial8250_console_write(struct console
*co
, const char *s
, unsigned int count
)
2760 struct uart_8250_port
*up
= &serial8250_ports
[co
->index
];
2761 struct uart_port
*port
= &up
->port
;
2762 unsigned long flags
;
2766 touch_nmi_watchdog();
2768 local_irq_save(flags
);
2770 /* serial8250_handle_irq() already took the lock */
2772 } else if (oops_in_progress
) {
2773 locked
= spin_trylock(&port
->lock
);
2775 spin_lock(&port
->lock
);
2778 * First save the IER then disable the interrupts
2780 ier
= serial_port_in(port
, UART_IER
);
2782 if (up
->capabilities
& UART_CAP_UUE
)
2783 serial_port_out(port
, UART_IER
, UART_IER_UUE
);
2785 serial_port_out(port
, UART_IER
, 0);
2787 uart_console_write(port
, s
, count
, serial8250_console_putchar
);
2790 * Finally, wait for transmitter to become empty
2791 * and restore the IER
2793 wait_for_xmitr(up
, BOTH_EMPTY
);
2794 serial_port_out(port
, UART_IER
, ier
);
2797 * The receive handling will happen properly because the
2798 * receive ready bit will still be set; it is not cleared
2799 * on read. However, modem control will not, we must
2800 * call it if we have saved something in the saved flags
2801 * while processing with interrupts off.
2803 if (up
->msr_saved_flags
)
2804 serial8250_modem_status(up
);
2807 spin_unlock(&port
->lock
);
2808 local_irq_restore(flags
);
2811 static int __init
serial8250_console_setup(struct console
*co
, char *options
)
2813 struct uart_port
*port
;
2820 * Check whether an invalid uart number has been specified, and
2821 * if so, search for the first available port that does have
2824 if (co
->index
>= nr_uarts
)
2826 port
= &serial8250_ports
[co
->index
].port
;
2827 if (!port
->iobase
&& !port
->membase
)
2831 uart_parse_options(options
, &baud
, &parity
, &bits
, &flow
);
2833 return uart_set_options(port
, co
, baud
, parity
, bits
, flow
);
2836 static int serial8250_console_early_setup(void)
2838 return serial8250_find_port_for_earlycon();
2841 static struct console serial8250_console
= {
2843 .write
= serial8250_console_write
,
2844 .device
= uart_console_device
,
2845 .setup
= serial8250_console_setup
,
2846 .early_setup
= serial8250_console_early_setup
,
2847 .flags
= CON_PRINTBUFFER
| CON_ANYTIME
,
2849 .data
= &serial8250_reg
,
2852 static int __init
serial8250_console_init(void)
2854 if (nr_uarts
> UART_NR
)
2857 serial8250_isa_init_ports();
2858 register_console(&serial8250_console
);
2861 console_initcall(serial8250_console_init
);
2863 int serial8250_find_port(struct uart_port
*p
)
2866 struct uart_port
*port
;
2868 for (line
= 0; line
< nr_uarts
; line
++) {
2869 port
= &serial8250_ports
[line
].port
;
2870 if (uart_match_port(p
, port
))
2876 #define SERIAL8250_CONSOLE &serial8250_console
2878 #define SERIAL8250_CONSOLE NULL
2881 static struct uart_driver serial8250_reg
= {
2882 .owner
= THIS_MODULE
,
2883 .driver_name
= "serial",
2887 .cons
= SERIAL8250_CONSOLE
,
2891 * early_serial_setup - early registration for 8250 ports
2893 * Setup an 8250 port structure prior to console initialisation. Use
2894 * after console initialisation will cause undefined behaviour.
2896 int __init
early_serial_setup(struct uart_port
*port
)
2898 struct uart_port
*p
;
2900 if (port
->line
>= ARRAY_SIZE(serial8250_ports
))
2903 serial8250_isa_init_ports();
2904 p
= &serial8250_ports
[port
->line
].port
;
2905 p
->iobase
= port
->iobase
;
2906 p
->membase
= port
->membase
;
2908 p
->irqflags
= port
->irqflags
;
2909 p
->uartclk
= port
->uartclk
;
2910 p
->fifosize
= port
->fifosize
;
2911 p
->regshift
= port
->regshift
;
2912 p
->iotype
= port
->iotype
;
2913 p
->flags
= port
->flags
;
2914 p
->mapbase
= port
->mapbase
;
2915 p
->private_data
= port
->private_data
;
2916 p
->type
= port
->type
;
2917 p
->line
= port
->line
;
2919 set_io_from_upio(p
);
2920 if (port
->serial_in
)
2921 p
->serial_in
= port
->serial_in
;
2922 if (port
->serial_out
)
2923 p
->serial_out
= port
->serial_out
;
2924 if (port
->handle_irq
)
2925 p
->handle_irq
= port
->handle_irq
;
2927 p
->handle_irq
= serial8250_default_handle_irq
;
2933 * serial8250_suspend_port - suspend one serial port
2934 * @line: serial line number
2936 * Suspend one serial port.
2938 void serial8250_suspend_port(int line
)
2940 uart_suspend_port(&serial8250_reg
, &serial8250_ports
[line
].port
);
2944 * serial8250_resume_port - resume one serial port
2945 * @line: serial line number
2947 * Resume one serial port.
2949 void serial8250_resume_port(int line
)
2951 struct uart_8250_port
*up
= &serial8250_ports
[line
];
2952 struct uart_port
*port
= &up
->port
;
2954 if (up
->capabilities
& UART_NATSEMI
) {
2955 /* Ensure it's still in high speed mode */
2956 serial_port_out(port
, UART_LCR
, 0xE0);
2958 ns16550a_goto_highspeed(up
);
2960 serial_port_out(port
, UART_LCR
, 0);
2961 port
->uartclk
= 921600*16;
2963 uart_resume_port(&serial8250_reg
, port
);
2967 * Register a set of serial devices attached to a platform device. The
2968 * list is terminated with a zero flags entry, which means we expect
2969 * all entries to have at least UPF_BOOT_AUTOCONF set.
2971 static int __devinit
serial8250_probe(struct platform_device
*dev
)
2973 struct plat_serial8250_port
*p
= dev
->dev
.platform_data
;
2974 struct uart_port port
;
2975 int ret
, i
, irqflag
= 0;
2977 memset(&port
, 0, sizeof(struct uart_port
));
2980 irqflag
= IRQF_SHARED
;
2982 for (i
= 0; p
&& p
->flags
!= 0; p
++, i
++) {
2983 port
.iobase
= p
->iobase
;
2984 port
.membase
= p
->membase
;
2986 port
.irqflags
= p
->irqflags
;
2987 port
.uartclk
= p
->uartclk
;
2988 port
.regshift
= p
->regshift
;
2989 port
.iotype
= p
->iotype
;
2990 port
.flags
= p
->flags
;
2991 port
.mapbase
= p
->mapbase
;
2992 port
.hub6
= p
->hub6
;
2993 port
.private_data
= p
->private_data
;
2994 port
.type
= p
->type
;
2995 port
.serial_in
= p
->serial_in
;
2996 port
.serial_out
= p
->serial_out
;
2997 port
.handle_irq
= p
->handle_irq
;
2998 port
.handle_break
= p
->handle_break
;
2999 port
.set_termios
= p
->set_termios
;
3001 port
.dev
= &dev
->dev
;
3002 port
.irqflags
|= irqflag
;
3003 ret
= serial8250_register_port(&port
);
3005 dev_err(&dev
->dev
, "unable to register port at index %d "
3006 "(IO%lx MEM%llx IRQ%d): %d\n", i
,
3007 p
->iobase
, (unsigned long long)p
->mapbase
,
3015 * Remove serial ports registered against a platform device.
3017 static int __devexit
serial8250_remove(struct platform_device
*dev
)
3021 for (i
= 0; i
< nr_uarts
; i
++) {
3022 struct uart_8250_port
*up
= &serial8250_ports
[i
];
3024 if (up
->port
.dev
== &dev
->dev
)
3025 serial8250_unregister_port(i
);
3030 static int serial8250_suspend(struct platform_device
*dev
, pm_message_t state
)
3034 for (i
= 0; i
< UART_NR
; i
++) {
3035 struct uart_8250_port
*up
= &serial8250_ports
[i
];
3037 if (up
->port
.type
!= PORT_UNKNOWN
&& up
->port
.dev
== &dev
->dev
)
3038 uart_suspend_port(&serial8250_reg
, &up
->port
);
3044 static int serial8250_resume(struct platform_device
*dev
)
3048 for (i
= 0; i
< UART_NR
; i
++) {
3049 struct uart_8250_port
*up
= &serial8250_ports
[i
];
3051 if (up
->port
.type
!= PORT_UNKNOWN
&& up
->port
.dev
== &dev
->dev
)
3052 serial8250_resume_port(i
);
3058 static struct platform_driver serial8250_isa_driver
= {
3059 .probe
= serial8250_probe
,
3060 .remove
= __devexit_p(serial8250_remove
),
3061 .suspend
= serial8250_suspend
,
3062 .resume
= serial8250_resume
,
3064 .name
= "serial8250",
3065 .owner
= THIS_MODULE
,
3070 * This "device" covers _all_ ISA 8250-compatible serial devices listed
3071 * in the table in include/asm/serial.h
3073 static struct platform_device
*serial8250_isa_devs
;
3076 * serial8250_register_port and serial8250_unregister_port allows for
3077 * 16x50 serial ports to be configured at run-time, to support PCMCIA
3078 * modems and PCI multiport cards.
3080 static DEFINE_MUTEX(serial_mutex
);
3082 static struct uart_8250_port
*serial8250_find_match_or_unused(struct uart_port
*port
)
3087 * First, find a port entry which matches.
3089 for (i
= 0; i
< nr_uarts
; i
++)
3090 if (uart_match_port(&serial8250_ports
[i
].port
, port
))
3091 return &serial8250_ports
[i
];
3094 * We didn't find a matching entry, so look for the first
3095 * free entry. We look for one which hasn't been previously
3096 * used (indicated by zero iobase).
3098 for (i
= 0; i
< nr_uarts
; i
++)
3099 if (serial8250_ports
[i
].port
.type
== PORT_UNKNOWN
&&
3100 serial8250_ports
[i
].port
.iobase
== 0)
3101 return &serial8250_ports
[i
];
3104 * That also failed. Last resort is to find any entry which
3105 * doesn't have a real port associated with it.
3107 for (i
= 0; i
< nr_uarts
; i
++)
3108 if (serial8250_ports
[i
].port
.type
== PORT_UNKNOWN
)
3109 return &serial8250_ports
[i
];
3115 * serial8250_register_8250_port - register a serial port
3116 * @port: serial port template
3118 * Configure the serial port specified by the request. If the
3119 * port exists and is in use, it is hung up and unregistered
3122 * The port is then probed and if necessary the IRQ is autodetected
3123 * If this fails an error is returned.
3125 * On success the port is ready to use and the line number is returned.
3127 int serial8250_register_8250_port(struct uart_8250_port
*up
)
3129 struct uart_8250_port
*uart
;
3132 if (up
->port
.uartclk
== 0)
3135 mutex_lock(&serial_mutex
);
3137 uart
= serial8250_find_match_or_unused(&up
->port
);
3139 uart_remove_one_port(&serial8250_reg
, &uart
->port
);
3141 uart
->port
.iobase
= up
->port
.iobase
;
3142 uart
->port
.membase
= up
->port
.membase
;
3143 uart
->port
.irq
= up
->port
.irq
;
3144 uart
->port
.irqflags
= up
->port
.irqflags
;
3145 uart
->port
.uartclk
= up
->port
.uartclk
;
3146 uart
->port
.fifosize
= up
->port
.fifosize
;
3147 uart
->port
.regshift
= up
->port
.regshift
;
3148 uart
->port
.iotype
= up
->port
.iotype
;
3149 uart
->port
.flags
= up
->port
.flags
| UPF_BOOT_AUTOCONF
;
3150 uart
->port
.mapbase
= up
->port
.mapbase
;
3151 uart
->port
.private_data
= up
->port
.private_data
;
3153 uart
->port
.dev
= up
->port
.dev
;
3155 if (up
->port
.flags
& UPF_FIXED_TYPE
)
3156 serial8250_init_fixed_type_port(uart
, up
->port
.type
);
3158 set_io_from_upio(&uart
->port
);
3159 /* Possibly override default I/O functions. */
3160 if (up
->port
.serial_in
)
3161 uart
->port
.serial_in
= up
->port
.serial_in
;
3162 if (up
->port
.serial_out
)
3163 uart
->port
.serial_out
= up
->port
.serial_out
;
3164 if (up
->port
.handle_irq
)
3165 uart
->port
.handle_irq
= up
->port
.handle_irq
;
3166 /* Possibly override set_termios call */
3167 if (up
->port
.set_termios
)
3168 uart
->port
.set_termios
= up
->port
.set_termios
;
3170 uart
->port
.pm
= up
->port
.pm
;
3171 if (up
->port
.handle_break
)
3172 uart
->port
.handle_break
= up
->port
.handle_break
;
3174 uart
->dl_read
= up
->dl_read
;
3176 uart
->dl_write
= up
->dl_write
;
3178 if (serial8250_isa_config
!= NULL
)
3179 serial8250_isa_config(0, &uart
->port
,
3180 &uart
->capabilities
);
3182 ret
= uart_add_one_port(&serial8250_reg
, &uart
->port
);
3184 ret
= uart
->port
.line
;
3186 mutex_unlock(&serial_mutex
);
3190 EXPORT_SYMBOL(serial8250_register_8250_port
);
3193 * serial8250_register_port - register a serial port
3194 * @port: serial port template
3196 * Configure the serial port specified by the request. If the
3197 * port exists and is in use, it is hung up and unregistered
3200 * The port is then probed and if necessary the IRQ is autodetected
3201 * If this fails an error is returned.
3203 * On success the port is ready to use and the line number is returned.
3205 int serial8250_register_port(struct uart_port
*port
)
3207 struct uart_8250_port up
;
3209 memset(&up
, 0, sizeof(up
));
3210 memcpy(&up
.port
, port
, sizeof(*port
));
3211 return serial8250_register_8250_port(&up
);
3213 EXPORT_SYMBOL(serial8250_register_port
);
3216 * serial8250_unregister_port - remove a 16x50 serial port at runtime
3217 * @line: serial line number
3219 * Remove one serial port. This may not be called from interrupt
3220 * context. We hand the port back to the our control.
3222 void serial8250_unregister_port(int line
)
3224 struct uart_8250_port
*uart
= &serial8250_ports
[line
];
3226 mutex_lock(&serial_mutex
);
3227 uart_remove_one_port(&serial8250_reg
, &uart
->port
);
3228 if (serial8250_isa_devs
) {
3229 uart
->port
.flags
&= ~UPF_BOOT_AUTOCONF
;
3230 uart
->port
.type
= PORT_UNKNOWN
;
3231 uart
->port
.dev
= &serial8250_isa_devs
->dev
;
3232 uart
->capabilities
= uart_config
[uart
->port
.type
].flags
;
3233 uart_add_one_port(&serial8250_reg
, &uart
->port
);
3235 uart
->port
.dev
= NULL
;
3237 mutex_unlock(&serial_mutex
);
3239 EXPORT_SYMBOL(serial8250_unregister_port
);
3241 static int __init
serial8250_init(void)
3245 if (nr_uarts
> UART_NR
)
3248 printk(KERN_INFO
"Serial: 8250/16550 driver, "
3249 "%d ports, IRQ sharing %sabled\n", nr_uarts
,
3250 share_irqs
? "en" : "dis");
3253 ret
= sunserial_register_minors(&serial8250_reg
, UART_NR
);
3255 serial8250_reg
.nr
= UART_NR
;
3256 ret
= uart_register_driver(&serial8250_reg
);
3261 serial8250_isa_devs
= platform_device_alloc("serial8250",
3262 PLAT8250_DEV_LEGACY
);
3263 if (!serial8250_isa_devs
) {
3265 goto unreg_uart_drv
;
3268 ret
= platform_device_add(serial8250_isa_devs
);
3272 serial8250_register_ports(&serial8250_reg
, &serial8250_isa_devs
->dev
);
3274 ret
= platform_driver_register(&serial8250_isa_driver
);
3278 platform_device_del(serial8250_isa_devs
);
3280 platform_device_put(serial8250_isa_devs
);
3283 sunserial_unregister_minors(&serial8250_reg
, UART_NR
);
3285 uart_unregister_driver(&serial8250_reg
);
3291 static void __exit
serial8250_exit(void)
3293 struct platform_device
*isa_dev
= serial8250_isa_devs
;
3296 * This tells serial8250_unregister_port() not to re-register
3297 * the ports (thereby making serial8250_isa_driver permanently
3300 serial8250_isa_devs
= NULL
;
3302 platform_driver_unregister(&serial8250_isa_driver
);
3303 platform_device_unregister(isa_dev
);
3306 sunserial_unregister_minors(&serial8250_reg
, UART_NR
);
3308 uart_unregister_driver(&serial8250_reg
);
3312 module_init(serial8250_init
);
3313 module_exit(serial8250_exit
);
3315 EXPORT_SYMBOL(serial8250_suspend_port
);
3316 EXPORT_SYMBOL(serial8250_resume_port
);
3318 MODULE_LICENSE("GPL");
3319 MODULE_DESCRIPTION("Generic 8250/16x50 serial driver");
3321 module_param(share_irqs
, uint
, 0644);
3322 MODULE_PARM_DESC(share_irqs
, "Share IRQs with other non-8250/16x50 devices"
3325 module_param(nr_uarts
, uint
, 0644);
3326 MODULE_PARM_DESC(nr_uarts
, "Maximum number of UARTs supported. (1-" __MODULE_STRING(CONFIG_SERIAL_8250_NR_UARTS
) ")");
3328 module_param(skip_txen_test
, uint
, 0644);
3329 MODULE_PARM_DESC(skip_txen_test
, "Skip checking for the TXEN bug at init time");
3331 #ifdef CONFIG_SERIAL_8250_RSA
3332 module_param_array(probe_rsa
, ulong
, &probe_rsa_count
, 0444);
3333 MODULE_PARM_DESC(probe_rsa
, "Probe I/O ports for RSA");
3335 MODULE_ALIAS_CHARDEV_MAJOR(TTY_MAJOR
);