drivers/tty/serial/8250/8250.h

   1 /*
   2  *  Driver for 8250/16550-type serial ports
   3  *
   4  *  Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
   5  *
   6  *  Copyright (C) 2001 Russell King.
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  */
  13
  14 #include <linux/serial_8250.h>
  15
  16 struct old_serial_port {
  17         unsigned int uart;
  18         unsigned int baud_base;
  19         unsigned int port;
  20         unsigned int irq;
  21         unsigned int flags;
  22         unsigned char hub6;
  23         unsigned char io_type;
  24         unsigned char *iomem_base;
  25         unsigned short iomem_reg_shift;
  26         unsigned long irqflags;
  27 };
  28
  29 struct serial8250_config {
  30         const char      *name;
  31         unsigned short  fifo_size;
  32         unsigned short  tx_loadsz;
  33         unsigned char   fcr;
  34         unsigned int    flags;
  35 };
  36
  37 #define UART_CAP_FIFO   (1 << 8)        /* UART has FIFO */
  38 #define UART_CAP_EFR    (1 << 9)        /* UART has EFR */
  39 #define UART_CAP_SLEEP  (1 << 10)       /* UART has IER sleep */
  40 #define UART_CAP_AFE    (1 << 11)       /* MCR-based hw flow control */
  41 #define UART_CAP_UUE    (1 << 12)       /* UART needs IER bit 6 set (Xscale) */
  42 #define UART_CAP_RTOIE  (1 << 13)       /* UART needs IER bit 4 set (Xscale, Tegra) */
  43
  44 #define UART_BUG_QUOT   (1 << 0)        /* UART has buggy quot LSB */
  45 #define UART_BUG_TXEN   (1 << 1)        /* UART has buggy TX IIR status */
  46 #define UART_BUG_NOMSR  (1 << 2)        /* UART has buggy MSR status bits (Au1x00) */
  47 #define UART_BUG_THRE   (1 << 3)        /* UART has buggy THRE reassertion */
  48 #define UART_BUG_PARITY (1 << 4)        /* UART mishandles parity if FIFO enabled */
  49
  50 #define PROBE_RSA       (1 << 0)
  51 #define PROBE_ANY       (~0)
  52
  53 #define HIGH_BITS_OFFSET ((sizeof(long)-sizeof(int))*8)
  54
  55 #ifdef CONFIG_SERIAL_8250_SHARE_IRQ
  56 #define SERIAL8250_SHARE_IRQS 1
  57 #else
  58 #define SERIAL8250_SHARE_IRQS 0
  59 #endif
  60
  61 static inline int serial_in(struct uart_8250_port *up, int offset)
  62 {
  63         return up->port.serial_in(&up->port, offset);
  64 }
  65
  66 static inline void serial_out(struct uart_8250_port *up, int offset, int value)
  67 {
  68         up->port.serial_out(&up->port, offset, value);
  69 }
  70
  71 void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p);
  72
  73 static inline int serial_dl_read(struct uart_8250_port *up)
  74 {
  75         return up->dl_read(up);
  76 }
  77
  78 static inline void serial_dl_write(struct uart_8250_port *up, int value)
  79 {
  80         up->dl_write(up, value);
  81 }
  82
  83 #if defined(__alpha__) && !defined(CONFIG_PCI)
  84 /*
  85  * Digital did something really horribly wrong with the OUT1 and OUT2
  86  * lines on at least some ALPHA's.  The failure mode is that if either
  87  * is cleared, the machine locks up with endless interrupts.
  88  */
  89 #define ALPHA_KLUDGE_MCR  (UART_MCR_OUT2 | UART_MCR_OUT1)
  90 #elif defined(CONFIG_SBC8560)
  91 /*
  92  * WindRiver did something similarly broken on their SBC8560 board. The
  93  * UART tristates its IRQ output while OUT2 is clear, but they pulled
  94  * the interrupt line _up_ instead of down, so if we register the IRQ
  95  * while the UART is in that state, we die in an IRQ storm. */
  96 #define ALPHA_KLUDGE_MCR (UART_MCR_OUT2)
  97 #else
  98 #define ALPHA_KLUDGE_MCR 0
  99 #endif